|Electrical computers and digital processing systems: memory patents - Monitor Patents|
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Electrical computers and digital processing systems: memory June invention type 06/10Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 06/24/2010 > patent applications in patent subcategories. invention type
20100161873 - Compressed cache controller valid word status using pointers: An apparatus having a memory and a controller is disclosed. The memory may be configured to (i) store a plurality of cache lines, each of the cache line comprising a plurality of locations including a respective end location and (ii) accessing a particular one of the cache lines identified by... Agent: Christopher P Maiorana, PC Lsi Corporation
20100161874 - Multiple slot memory system: A memory system having a memory controller plus one or more registered memory modules, each registered memory module having a bank of memory chips and an associated register. A pre-register address/command bus connects the memory controller with the associated register. Each registered memory module has a post-register command/address bus that... Agent: Texas Instruments Incorporated
20100161875 - Simulator and simulating method for running guest program in host: A Simulator and a simulating method for running a guest program in a host are disclosed. The simulator includes: an initialization device configured for setting content of a hypervisor page table in the host, the hypervisor page table mapping a guest physical address space to a host physical address space.... Agent: Ibm Corporation, T.j. Watson Research Center
20100161876 - Method and system for data structure management: Embodiments of the present invention are directed to a method and system for allowing data structures to be moved between storage locations of varying performance and cost without changing the application firmware. In one embodiment, rather than application firmware directly accessing memory, the application firmware requests a data structure by... Agent: Nvidia C/o Murabito, Hao & Barnes LLP
20100161886 - Architecture for address mapping of managed non-volatile memory: The disclosed architecture uses address mapping to map a block address on a host interface to an internal block address of a non-volatile memory (NVM) device. The block address is mapped to an internal chip select for selecting a Concurrently Addressable Unit (CAU) identified by the block address. The disclosed... Agent: Fish & Richardson P.C.
20100161890 - Cache management method and cache device using sector set: A cache management method and a cache device using a sector sets, are provided. The cache management method includes receiving at least one of a write request and a read request for predetermined data, from a host device. The cache determines whether a cache memory is allocated to a sector... Agent: North Star Intellectual Property Law, PC
20100161888 - Data storage system with non-volatile memory using both page write and block program and block erase: An optimized data storage system including non-volatile re-writeable memory having both block program and erase and full or partial page write is disclosed. A memory controller of the system can use block data operations for large data transfers, and page data operations for small data transfers. Page data operations in... Agent: Unity Semiconductor Corporation
20100161889 - Delivering secured media using a portable memory device: In some embodiments an interface of a portable memory device is used to store content information in a hidden memory region of the portable memory device. The interface is also used to store information in a visible memory region of the portable memory device. The information stored in the visible... Agent: Intel Corporation C/o Cpa Global
20100161877 - Device and method for transferring data to a non-volatile memory device: A semiconductor device for transferring input data to a non-volatile memory device. The semiconductor device comprises a virtual page buffer including a plurality of data elements; a mask buffer including a corresponding plurality of data elements; control logic circuitry for (i) setting each of the mask buffer data elements to... Agent: Smart & Biggar
20100161879 - Efficient and secure main memory sharing across multiple processors: Various embodiments of the present invention provide systems and methods for using providing memory access across multiple virtual machines. For example, various embodiments of the present invention provide computing systems that include at least two processors each communicably coupled to a network switch via network interfaces. The computing systems further... Agent: Hamilton,desanctis & Cha (lsi)
20100161880 - Flash initiative wear leveling algorithm: A method and apparatus for initiative wear leveling for non-volatile memory. An embodiment of a method includes counting erase cycles for each of a set of multiple memory blocks of a non-volatile memory, the counting of erase cycles for each memory block including incrementing a first count for a physical... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP
20100161881 - Memory system: A memory system (10) is disclosed, which comprises a flash-EEPROM nonvolatile memory (11) having a plurality of memory cells that have floating gates and in which data items are electrically erasable and writable, a cache memory (13) that temporarily stores data of the flash-EEPROM nonvolatile memory (11), a control circuit... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100161891 - Method of controlling card-shaped memory device: Each of a plurality of memory areas includes a plurality of blocks. Each of the blocks includes a plurality of pages. Each of the memory areas also includes a data cache and a page buffer. A control unit controls a lower-limit value of the number of empty blocks in each... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100161878 - Method of unlocking portable memory device: A method of unlocking usable memory space of a portable memory device, such as a flash drive, includes connecting the portable memory device to a network access device, such as a computer. The network access device executes a control program and accesses a website through the network access device by... Agent: Leydig Voit & Mayer, Ltd
20100161882 - Methods for executing a command to write data from a source location to a destination location in a memory device: The embodiments described herein provide methods for executing a command to write data from a source location to a destination location in a memory device. In one embodiment, a memory device receives, from a host device, a command to write data from a source location to a destination location in... Agent: Brinks Hofer Gilson & Lione/sandisk
20100161883 - Nonvolatile semiconductor memory drive and data management method of nonvolatile semiconductor memory drive: According to one embodiment, a nonvolatile semiconductor memory drive includes a nonvolatile semiconductor memory, and a controller which controls a process of writing and reading data with respect to the nonvolatile semiconductor memory. The controller includes a logical address storage module which stores logical address information containing logical addresses indicating... Agent: Blakely Sokoloff Taylor & Zafman LLP
20100161884 - Nonvolatile semiconductor memory drive, information processing apparatus and management method of storage area in nonvolatile semiconductor memory drive: According to one embodiment, a nonvolatile semiconductor memory drive includes a nonvolatile semiconductor memory, and a controller which controls a process of writing and reading data with respect to the nonvolatile semiconductor memory. The controller includes a compaction control module which acquires free groups set in an unused state by... Agent: Blakely Sokoloff Taylor & Zafman LLP
20100161885 - Semiconductor storage device and storage controlling method: A semiconductor storage device includes a first storage unit having a plurality of first blocks as data write regions; an instructing unit that issues a write instruction of writing data into the first blocks; a converting unit that converts an external address of input data to a memory position in... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100161887 - Storage device, control method thereof, and electronic device using storage device: According to one embodiment, a storage device includes a physical address specifying module, a logical address group specifying module, a data writer, and a storage controller. The physical address specifying module specifies a physical address of write destination of data received together with a logical address among physical addresses each... Agent: Knobbe Martens Olson & Bear LLP
20100161893 - Disk system using memory control signal of processor: The disk system of the present invention decreases defects of a volume restriction and a volatile characteristic of a RAM disk using a memory control signal of a host. The preset invention provides a disk system including a central control unit generating a memory control signal corresponding to a RAM... Agent: Blakely Sokoloff Taylor & Zafman LLP
20100161892 - Pseudo dual-ported sram: A memory is described which includes a main memory array made up of multiple single-ported memory banks connected by parallel read and write buses, and a sideband memory equivalent to a single dual-ported memory bank. Control logic and tags state facilitates a pattern of access to the main memory and... Agent: Weaver Austin Villeneuve & Sampson LLP
20100161894 - Double density content addressable memory (cam) lookup scheme: The number of content addressable memory (CAM) lookups is reduced from two to one. Each side (left and right sides) of a CAM is programmed with network addresses, such as IP addresses, based on certain bits of the network addresses. These bits of the network addresses (which represent packet routes)... Agent: Townsend And Townsend And Crew LLP/foundry/brocade
20100161895 - Securing data on data cartridges: Techniques are described for securing data on data cartridges, such as a Linear Tape-Open (LTO) data cartridge. The techniques include modifying a portion of a cartridge memory (CM) chip of the cartridge in a way that a cartridge drive will be unable to access the data cartridge and to prevent... Agent: Shumaker & Sieffert. P.A.
20100161896 - Direct memory access transfer efficiency: A mechanism is provided for improving the efficiency of multiple smaller direct memory access transfers. The mechanism uses one input buffer and a small result buffer, or some temporary variables, to temporarily store computation results. The mechanism performs a computation on a segment of data in the input buffer and... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.
20100161897 - Metadata server and disk volume selecting method thereof: A metadata server in an asymmetric cluster file system detects the used capacity and the free capacity of a disk volume in a data server to allocate chucks. The method for selecting a disk volume includes receiving status information from a data server periodically and adjusting the standby command number... Agent: Ampacc Law Group
20100161900 - Data replication in a storage system: For a storage system having plural control units to which plural disk devices are connected, in the method for creating replication in a volume of the disk devices connected to different control units, when receiving update I/O of a replication source during an initial copy for replication, the reflection of... Agent: Brundidge & Stanger, P.C.
20100161899 - Disk drive array synchronization via short-range rf signaling: A plurality of disk drives in a disk drive array are synchronized. A synchronization signal is generated at a master disk drive. The synchronization signal is encoded as a radio frequency signal for transmission over a radio frequency network in communication with the plurality of disk drives. The transmitted radio... Agent: At&t Legal Department - Pk Attn: Patent Docketing
20100161898 - Method for preserving data integrity by breaking the redundant array of independent disks level 1(raid1): A method of breaking a redundant array of independent disks level 1 (RAID 1) for preservation of data integrity is disclosed. In one embodiment, a method for breaking a RAID 1 to preserve data integrity of the RAID 1 includes breaking a redundancy of the RAID 1 when a size... Agent: GlobalIPServices PLLC
20100161903 - Apparatus, method, computer program and mobile terminal for processing information: An apparatus for processing information, includes a memory storing a plurality of content items different in type and metadata containing time information of the content items, a cache processor for fetching from the memory the content item and the metadata of the content item to be displayed on a display... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100161902 - Method, system, and program for an adaptor to read and write to system memory: Provided are a method, system, and program for an adaptor to read and write to system memory. A plurality of blocks of data to write to storage are received at an adaptor. The blocks of data are added to a buffer in the adaptor. A determination is made of pages... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37
20100161901 - Correction of incorrect cache accesses: The application describes a data processor operable to process data, and comprising: a cache in which a storage location of a data item within said cache is identified by an address, said cache comprising a plurality of storage locations and said data processor comprising a cache directory operable to store... Agent: Nixon & Vanderhye, PC
20100161904 - Cache hierarchy with bounds on levels accessed: The present invention is directed to a system managing data in a multilevel cache memory system. Certain cache data is designated and stored only in particular levels of the multilevel cache, bypassing other levels of the multilevel cache. In a multiprocessor environment, the present invention includes cache coherency operations or... Agent: Dorsey & Whitney LLP On Behalf Of Sun Microsystems, Inc.
20100161905 - Latency reduction for cache coherent bus-based cache: In one embodiment, a system comprises a plurality of agents coupled to an interconnect and a cache coupled to the interconnect. The plurality of agents are configured to cache data. A first agent of the plurality of agents is configured to initiate a transaction on the interconnect by transmitting a... Agent: Mhkkg, PC/apple, Inc.
20100161906 - Pre-fetching virtual environment in a virtual universe based on previous traversals: An approach is provided for pre-fetching of virtual content in a virtual universe based on previous traversals. In one embodiment, there is a pre-fetching tool, including a ranking component configured to rank each of a plurality of parcels of locations previously visited by an avatar according to predefined ranking criteria.... Agent: Keohane & D'alessandro
20100161907 - Posting weakly ordered transactions: A processor may comprise a core area, a control unit, an uncore area. The core area may comprise multiple processing cores and line-fill buffers. A first processing core of the core area may store a first weakly ordered transaction in a first line-fill buffer. The firs processing core may offload... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP
20100161908 - Efficient memory allocation across multiple accessing systems: Various embodiments of the present invention provide systems and methods for reducing memory usage across multiple virtual machines. For example, various embodiments of the present invention provide methods for reducing resource duplication across multiple virtual machines. Such methods include allocating a shared memory resource between a first virtual machine and... Agent: Hamilton,desanctis & Cha (lsi)
20100161912 - Memory space management and mapping for memory area network: A mechanism for simultaneous multiple host access to shared centralized memory space via a virtualization protocol utilizing a network transport. The invention combines local memory interfacing with the handling of multiple hosts implementing virtualized memory-mapped I/O systems, such that the memory becomes a global resource. The end result is a... Agent: Law Office Of Robert C. Klinger
20100161911 - Method and apparatus for mpi program optimization: Machine readable media, methods, apparatus and system for MPI program optimization. In some embodiments, shared data may be retrieved from a message passing interface (MPI) program, wherein the shared data is sharable by a plurality of processes. Then, the shared data may be allocated to a shared memory, wherein the... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP
20100161910 - Stored value accessors in shared memory regions: Instruction sets in computing environments may execute within one of several domains, such as a natively executing domain, an interpretively executing domain, and a debugging executing domain. These domains may store values in a shared region of memory in different ways. It may be difficult to perform operations on such... Agent: Microsoft Corporation
20100161909 - Systems and methods for quota management in a memory appliance: Various embodiments of the present invention provide systems and methods for using providing memory access across multiple virtual machines. For example, various embodiments of the present invention provide thinly provisioned computing systems. Such thinly provisioned computing systems include a network switch, at least two or more processors each communicably coupled... Agent: Hamilton,desanctis & Cha (lsi)
20100161913 - Portable electronic device: In an IC card, an operating system manages the access order of each channel for each file using a channel management table. An application controls access to each file based on the access order managed in the channel management table. The channel management table stores, as an access order, an... Agent: Pillsbury Winthrop Shaw Pittman, LLP
20100161914 - Autonomous memory subsystems in computing platforms: Embodiments of the invention are generally directed to systems, methods, and apparatuses for autonomous memory subsystems in computing platforms. In some embodiments, the autonomous memory mechanism includes one or more autonomous memory logic instances (AMLs) and a transaction protocol to control the AMLs. The autonomous memory mechanism can be employed... Agent: Intel Corporation C/o Cpa Global
20100161916 - Method and apparatus for rebuilding data in a dispersed data storage network: A method begins by identifying a data slice requiring rebuilding to produce an identified data slice, wherein the identified data slice is one of a plurality of data slices that constitute a data segment and wherein each of the plurality of data slices is assigned for storage by a corresponding... Agent: Garlick Harrison & Markison (cs)
20100161915 - Method and system controlling page open time for memory device: A method and apparatus adaptively controlling a page open time for a memory device are disclosed. The method includes determining a page open maintenance time of an access-requested page based on system information and intellectual property (IP) request information; and controlling closing of an open page based on the determined... Agent: Volentine & Whitt PLLC
20100161917 - Automatic track description generator: A method includes generating a track description in real-time describing at least a portion of a track of a storage medium. An apparatus includes a dynamic track description generator configured to dynamically generate a track description describing a data wedge of a track on a storage medium, wherein the track... Agent: Hensley Kim & Holzer, LLC
20100161918 - Third dimensional memory with compress engine: An integrated circuit and method for modifying data by compressing the data in third dimensional memory technology is disclosed. In a specific embodiment, an integrated circuit is configured to perform compression of data disposed in third dimensional memory. For example, the integrated circuit can include a third dimensional memory array... Agent: Unity Semiconductor Corporation
20100161919 - Block-level data storage using an outstanding write list: A secure storage appliance is disclosed, along with methods of storing and reading data in a secure storage network. The secure storage appliance is configured to present to a client a virtual disk, the virtual disk mapped to the plurality of physical storage devices. The secure storage appliance is capable... Agent: Unisys Corporation
20100161920 - Data management apparatus, data management system, and data management method: A data management apparatus, system and method are provided. The data management apparatus performing storage processing and readout processing of data for a plurality of storage devices includes a division unit that divides the data into two or more pieces of divided data, a storage destination selection unit that selects,... Agent: Staas & Halsey LLP
20100161921 - Flash rom programming: A method comprises providing a golden ROM unit comprising known good ROM code. The golden ROM is coupled to a ROM socket of a target system. The target system is booted, wherein booting comprises providing power to the target system and independently providing power to the ROM socket. The known... Agent: Ibm Corporation (pec) C/o Patrick E. Caldwell, Esq.
20100161925 - Information processing apparatus, information processing method, and computer-readable recording medium having an information processing program: An information processing apparatus includes a first storage unit; a second storage unit connected to the first storage unit via a data transfer channel; a HDD total capacity determination unit acquiring information about a total storage capacity of the first storage unit; a HDD partition capacity determination unit acquiring information... Agent: Harness, Dickey & Pierce P.L.C
20100161923 - Method and apparatus for reallocating memory content: Coherent memory copy logic is operative to copy data from a source memory location to a destination memory location and duplicate a write request to a source memory region to produce a duplicated write request. Coherent memory copy logic is also operative to execute the duplicated write request to copy... Agent: Advanced Micro Devices, Inc. C/o Vedder Price P.C.
20100161924 - Storage switch, storage system, and data copying method: A storage switch includes a first bitmap generator for generating a first bitmap, a controller for controlling copying of data, a first modifier, a second bitmap generator for generating a second bitmap, a second modifier, a merging controller for controlling to generate a third bitmap. When the writing of data... Agent: Fujitsu Patent Center C/o Cpa Global
20100161922 - Systems and methods for facilitating migration of virtual machines among a plurality of physical machines: A method for facilitating migration of virtual machines among a plurality of physical machines includes associating a virtual machine with at least one physical resource inaccessible by a first subset of the plurality of physical machines and available to a second subset of the plurality of physical machines, the virtual... Agent: Choate, Hall & Stewart / Citrix Systems, Inc.
20100161926 - Data protection by segmented storage: A device, method, and system are disclosed. In one embodiment the device includes logic to handle and protect data. Specifically, the device includes logic to segment data that can receive a data object that needs to be stored. The logic within the device can segment the data object into a... Agent: Intel Corporation C/o Cpa Global
20100161928 - Managing access to an address range in a storage device: Enhanced configuration of security and access control for data in a storage device is disclosed. A request is received to access an addressable memory location in a storage media within the storage device. A set of addressable memory locations with contiguous addresses identified by an address range is associated with... Agent: Brinks Hofer Gilson & Lione/sandisk
20100161927 - Method for using a captcha challenge to protect a removable mobile flash memory storage device: The embodiments described herein generally use a challenge to protect a removable mobile flash memory storage device, where the challenge may be in the form of a “Completely Automated Public Turing Test to Tell Computers and Humans Apart” (“CAPTCHA”). In one embodiment, a method is provided in which a removable... Agent: Brinks Hofer Gilson & Lione/sandisk
20100161929 - Flexible memory appliance and methods for using such: Various embodiments of the present invention provide systems and methods for using providing memory access across multiple virtual machines. For example, various embodiments of the present invention provide methods for configuring a shared main memory region. The methods include providing a memory appliance that includes a randomly accessible bank of... Agent: Hamilton,desanctis & Cha (lsi)
20100161931 - Method of managing sectors of a non-volatile memory: Machine-readable media, methods, apparatus and system for managing sectors of a non-volatile memory are described. In some embodiments, a plurality of file segments may be written to a plurality of memory sectors (501), each memory sector of the plurality of memory sectors for each file segment of the plurality of... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP
20100161930 - Statistics collection using path-value pairs for relational databases: A method, system, and computer readable medium for collecting statistics associated with data in a database are disclosed. The method comprises determining an amount of memory needed to collect statistics for data associated with a defined data type in a relational database. The defined data type is based upon a... Agent: Fleit Gibbons Gutman Bongini & Bianco P.l.
20100161932 - Methods for writing data from a source location to a destination location in a memory device: Methods for writing data from a source location to a destination location in a memory device are provided. In one embodiment, a memory device receives a command from a host device, wherein the command specifies a logical address of a source location in the memory and a logical address of... Agent: Brinks Hofer Gilson & Lione/sandisk
20100161933 - Storage device with manual learning: In a particular embodiment, a system is disclosed that includes a controller to read data from and write data to a first storage medium. The controller is adapted to monitor logical block addresses (LBAs) of each read operation from the first storage medium and to selectively store files associated with... Agent: Seagate Technology LLC C/o Westman, Champlin & Kelly, P.A.
20100161934 - Preselect list using hidden pages: Disclosed is a computer implemented method, computer program product, and apparatus for maintaining a preselect list. The method comprises software components detecting a page fault of a memory page. In response to detecting a page fault, the software components determine whether the memory page is referenced in the preselect list... Agent: Ibm Corp. (aus/rcr) C/o The Rolnik Law Firm, P.C.
20100161935 - Rapid memory buffer write storage system and method: Efficient and convenient storage systems and methods are presented. In one embodiment a storage system includes a host for processing information, a memory controller and a memory. The memory controller controls communication of the information between the host and the memory, wherein the memory controller routes data rapidly to a... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP
20100161937 - Memory system and computer system: A memory system of the present invention comprises a plurality of first blocks provided for storing user information therein, to which first physical addresses which are not duplicate are assigned, respectively, a plurality of second blocks provided for individually storing therein the first physical addresses of initial defective blocks out... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100161936 - Method and system for queuing transfers of multiple non-contiguous address ranges with a single command: Methods and systems for queuing transfers of multiple non-contiguous address ranges within a single command are disclosed. Embodiments of systems include system processors, memory to store data and executable software, and storage devices to receive transfer commands stored in system memory. A host controller interface driver is executed by one... Agent: Lawrence M. Mennemeier C/o Intellevate, LLC06/17/2010 > patent applications in patent subcategories. invention type
20100153616 - Methods and systems to allocate addresses in a high-endurance/low-endurance hybrid flash memory: Methods and systems to selectively map higher-usage addresses to higher-endurance memory cells of a flash memory, and lower-usage addresses to lower-endurance memory cells of the flash memory. Address usage may be determined with respect to the most recent write operation corresponding to an address and/or with respect to a frequency... Agent: Garrett Ip, LLC
20100153617 - Storage management system for virtual machines: A computer system (a method) for providing storage management solution that enables server virtualization in data centers is disclosed. The system comprises a plurality of storage devices for storing data and a plurality of storage management drivers configured to provide an abstraction of the plurality of the storage devices to... Agent: Fenwick & West LLP
20100153619 - Data processing and addressing methods for use in an electronic apparatus: An electronic apparatus is disclosed. The electronic apparatus comprises a random access memory (RAM), a read-only memory (ROM) and a processing unit. The RAM stores a call transfer table, wherein the code transfer table comprising at least one transferred address in the RAM. The ROM stores at least one code... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP
20100153618 - Shared memory access techniques: Memory access techniques, in accordance with embodiments of the present technology, redirect memory access requests received from a baseband processor to shared memory coupled to an application processor. The techniques enable substantially real time read and write accesses by the application and baseband processors to the shared memory coupled to... Agent: Nvidia C/o Murabito, Hao & Barnes LLP
20100153622 - Data access controller and data accessing method: A data access controller and data accessing method is provided. The data access controller includes: a flash memory configuration register unit for storing information used for data access in a flash memory; a flash memory control unit for generating a control signal for data access to a block and a... Agent: Squire, Sanders & Dempsey L.L.P.
20100153623 - Data managing method for flash memory and flash memory device using the same: A data management method for a flash memory apparatus, entailing a step for handling a plurality of flash chips, a step for enabling the flash chips in sequence, and a step for updating the first data in the first block on the first flash chip among the flash chips. Additionally... Agent: Wang Law Firm, Inc.
20100153624 - Data managing method for non-volatile memory and non-volatile memory device using the same: A data managing method for non-volatile memory which comprises a step for receiving a first logical block address and updated data, and a step for merging data in a plurality of physical blocks which have lowest usage rates according to usage parameters in a reference table when the first logical... Agent: Wang Law Firm, Inc.
20100153630 - Data storage system with complex memory and method of operating the same: A data storage system and a data storing method for the data storage system are provided. The data storage system includes a host unit, a storage unit, and a first input/output bus functioning as an interface between the host unit and the storage unit. The storage unit includes a non-volatile... Agent: Staas & Halsey LLP
20100153626 - Memory system: To provide a memory system that can surely restore management information even when a program error occurs during data writing. After “log writing (1)” for a pre-log, when a program error occurs when data writing is being performed (a data writing error), the memory system performs the data writing again... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100153631 - Method and data storage device for processing commands: A data storage device for processing a command includes a host interface and a controller. The host interface stores program information sent within the command from a host. The controller decodes the program information that indicates a memory type to be accessed for the command. In addition, the controller determines... Agent: Law Office Of Monica H Choi
20100153628 - Method of fabricating systems including heat-sensitive memory devices: A system code is stored in a first nonvolatile memory. The first nonvolatile memory and a second nonvolatile memory are heated during assembly of an electronic device including the first nonvolatile memory and a second nonvolatile memory. The heating is to a temperature sufficient to change a state of at... Agent: Myers Bigel Sibley & Sajovec
20100153621 - Methods, computer program products, and systems for providing an upgradeable hard disk: Methods, computer program products and systems for providing an upgradeable hard disk. The system includes a plurality of memory card slots and a controller. The controller includes a host interface in communication with a host computer, a memory card interface in communication with one or more memory cards located in... Agent: At&t Legal Department - Cc Attn: Patent Docketing
20100153632 - Non-volatile memory system storing data in single-level cell or multi-level cell according to data characteristics: Provided is a system storing data received from an application or file system in a non-volatile memory system of single-level cells and multi-level cells in accordance with one or more data characteristics. The non-volatile memory system includes a non-volatile memory cell array having a plurality of multi-level cells forming a... Agent: Volentine & Whitt PLLC
20100153625 - Semiconductor memory device: A semiconductor device including a plurality of flash memories, a connector for establishing connection with a host apparatus, a cache memory for data transmission between the flash memories and the host apparatus, a drive control circuit that controls the data transmission between the flash memories and the host apparatus, and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100153629 - Semiconductor memory device: A command analyzer 160 determines whether or not a first write command after power-on is issued. A new block reserve determinator 170 determines that a new physical block is reserved, in a case where the command analyzer 160 determines that first writing command after power-on is issued and the physical... Agent: Mark D. Saralino (pan) Renner, Otto, Boisselle & Sklar, LLP
20100153620 - Storage system snapshot assisted by ssd technology: A method and apparatus for taking a snapshot of a storage system employing a solid state disk (SSD). A plurality of mapping tables in the SSD store data needed to create a one or more point in time snapshots and a current view of the SSD. In response to a... Agent: Lsi Corporation C/o Suiter Swantz PC Llo
20100153627 - System and method for managing files in flash memory: A system and method for managing files in a flash memory. The flash memory has a first storage area and a second storage area for storing files. Each of the files has a file header and a data block. The method includes writing the file header of each of the... Agent: PCe Industry, Inc. Att. Steven Reiss
20100153633 - Pc architecture using fast nv ram in main memory: Systems and methods for a PC or server architecture have been disclosed. The architecture is characterized by using non-volatile RAM modules, such as MRAM modules, for at least a part of the main memory, thus accelerating the power-on sequence of the computer. Components, which were stored in prior art either... Agent: Saile Ackerman LLC
20100153635 - Storage device with expandable solid-state memory capacity: In a particular embodiment, a circuit device is disclosed that includes a first interface to a high speed data bus of a host system and a second interface coupled to a first data storage device. The circuit device further includes a solid-state storage device having a first solid-state data storage... Agent: Seagate Technology LLC C/o Westman, Champlin & Kelly, P.A.
20100153634 - System and method for data migration between computer cluster architecture and data storage devices: An improved duty cycle, increased effective bandwidth, and minimized power consumption are attained in a system for data migration between a compute cluster and disk drives by inclusion of a buffer node coupled to the compute cluster to store data received therefrom in a random fashion. The buffer node signals... Agent: Rosenberg, Klein & Lee
20100153637 - Arbitration for memory device with commands: A plurality of masters arbitrate for access to a shared memory device, such as a SDRAM (synchronous dynamic random access memory), amongst themselves using software and arbitration interfaces. The masters generate additional commands upon arbitration, such as MRS and PALL commands, for prevention of collision of commands, refresh starvation, and/or... Agent: Law Office Of Monica H Choi
20100153636 - Control system and method for memory access: A control system for memory access includes a system memory access command buffer, a memory access command parallel processor, a DRAM command controller and a read data buffer. The system memory access command buffer stores plural system memory access commands. The memory access command parallel processor is connected to the... Agent: Bacon & Thomas, PLLC
20100153638 - Grid storage system and method of operating thereof: There is provided a storage system and method of operating thereof. The storage system comprises a plurality of disk units adapted to store data at respective ranges of logical block addresses (LBAs), said addresses constituting an entire address space divided between a plurality of virtual partitions (VP), and a storage... Agent: Oliff & Berridge, PLC
20100153639 - Grid storage system and method of operating thereof: The is provided a method of hot backward compatible upgrade of a storage system comprising a plurality of disk units adapted to store data at respective ranges of logical block addresses (LBAs), said addresses constituting an entire address space divided between a plurality of virtual partitions (VPs), and a storage... Agent: Oliff & Berridge, PLC
20100153640 - Automatic raid volume generation and migration based on application type: A method and system of automatic redundant array of independent disks (RAID) volume generation based on an application type is disclosed. In one embodiment, a method for selecting a RAID level includes receiving setup data of an application type and a number of volumes for generating the RAID, assigning a... Agent: GlobalIPServices PLLC
20100153641 - Hierarchical storage management (hsm) for redundant array of independent disks (raid): Hierarchical storage management (HSM) for redundant array of independent disks (RAID) which comprise a plurality of drive trays of different types is disclosed. In one embodiment, a method for hierarchically managing RAID which includes a plurality of drive trays of different types, includes writing data to a tray of a... Agent: GlobalIPServices, PLLC
20100153643 - Information processing system capable of recognizing and accessing removable external storage device in simple scheme, method for controlling information processing system, and image input and output apparatus: It is recognized that an attached USB memory is an unanalyzable USB memory. Then, disconnect setting is made. A USB connection process is performed. A PC is instructed through a connection line to establish USB connection. The PC recognizes that the attached device is a USB-connected MFP. The PC acquires... Agent: Buchanan, Ingersoll & Rooney PC
20100153642 - Method and system for authenticating storage device connected through intermediate converter: A system provided for authenticating a storage device includes a computer system, an intermediate converter and a storage device. The computer system stores an application program to execute functions of a storage device. The intermediate converter connects the computer system and the storage device. The storage device store multiple predetermined... Agent: Volentine & Whitt PLLC
20100153645 - Cache control apparatus and method: A cache control apparatus and method are provided. The cache control apparatus may include a parameter input unit to receive a first parameter corresponding to a block-level cache in a main memory, a cache index extraction unit to extract a cache index from the first parameter, a cache tag extraction... Agent: Staas & Halsey LLP
20100153644 - On demand java application manager: A system, method and program product for providing an on demand Java application manager. A system is provided that includes: a bootstrap system for setting up a cache within a local storage and pointing to at least one application at a network resource; a class loader that loads class files... Agent: Hoffman Warnick LLC
20100153647 - Cache-to-cache cast-in: A data processing system includes a first processing unit and a second processing unit coupled by an interconnect fabric. The first processing unit has a first processor core and associated first upper and first lower level caches, and the second processing unit has a second processor core and associated second... Agent: Dillon & Yudell LLP
20100153646 - Memory hierarchy with non-volatile filter and victim caches: Various embodiments of the present invention are generally directed to an apparatus and method for non-volatile caching of data in a memory hierarchy of a data storage device. In accordance with some embodiments, a pipeline memory structure is provided to store data for use by a controller. The pipeline has... Agent: Fellers, Snider, Blankenship, Bailey & Tippens, PC (seagate Technology LLC)
20100153648 - Block driven computation using a caching policy specified in an operand data structure: A processor has an associated memory hierarchy including a cache memory. The processor includes an instruction sequencing unit that fetches instructions for processing, an operand data structure including a plurality of entries corresponding to operands of operations to be performed by the processor, and a computation engine. A first entry... Agent: Dillon & Yudell LLP
20100153649 - Shared cache memories for multi-core processors: Embodiments of shared cache memories for multi-core processors are presented. In one embodiment, a cache memory comprises a group of sampling cache sets and a controller to determine a number of misses that occur in the group of sampling cache sets. The controller is operable to determine a victim cache... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP
20100153651 - Efficient use of memory and accessing of stored records: Memory is used, including by receiving at a processor an indication that a first piece of metadata associated with a set of backup data is required during a block based backup and/or restore. The processor is used to retrieve from a metadata store a set of metadata that includes the... Agent: Van Pelt, Yi & James LLP And Emc Corporation
20100153650 - Victim cache line selection: A cache memory includes a cache array including a plurality of congruence classes each containing a plurality of cache lines, where each cache line belongs to one of multiple classes which include at least a first class and a second class. The cache memory also includes a cache directory of... Agent: Dillon & Yudell LLP
20100153652 - Cache management system: Embodiments disclosed herein provide a cache management system comprising a cache and a cache manager that can poll cached assets at different frequencies based on their relative activity status and independent of other applications. In one embodiment, the cache manager may maintain one or more lists, each corresponding to a... Agent: SprinkleIPLaw Group
20100153654 - Data processing method and device: In a data-processing method, first result data may be obtained using a plurality of configurable coarse-granular elements, the first result data may be written into a memory that includes spatially separate first and second memory areas and that is connected via a bus to the plurality of configurable coarse-granular elements,... Agent: Kenyon & Kenyon LLP
20100153653 - System and method for prefetching data: The present disclosure is directed towards a prefetch controller configured to communicate with a prefetch cache in order to increase system performance. In some embodiments, the prefetch controller may include an instruction lookup table (ILT) configured to receive a first tuple including a first instruction ID and a first missed... Agent: Ibm Corporation
20100153655 - Store queue with store-merging and forward-progress guarantees: Some embodiments of the present invention provide a system that performs stores in a memory system. During operation, the system performs a store for a first thread, which involves creating an entry for the store in a store queue for the first thread. It also involves attempting to store-mark a... Agent: Pvf -- Sun Microsystems Inc. C/o Park, Vaughan & Fleming LLP
20100153656 - Data processor: A data processor includes a cache memory control section which includes: a hit/miss determination section which is supplied with a request for data processing to determine whether data to be processed is present in a cache memory and outputs a cache hit/miss determination result and, if having determined that the... Agent: Turocy & Watson, LLP
20100153657 - Operation of an input/output link: Included are embodiments for facilitating operation of an input/output (I/O) link. At least one embodiment of a method includes receiving a first cache line from a memory controller and determining whether the first cache line corresponds to a first portion of data. Some embodiments include, when the first cache line... Agent: Hewlett-packard Company Intellectual Property Administration
20100153658 - Deadlock avoidance by marking cpu traffic as special: Deadlocks are avoided by marking read requests issued by a parallel processor to system memory as “special.” Read completions associated with read requests marked as special are routed on virtual channel 1 of the PCIe bus. Data returning on virtual channel 1 cannot become stalled by write requests in virtual... Agent: Patterson & Sheridan, L.L.P.
20100153659 - Servicing memory read requests: Included are embodiments for a method for servicing memory read requests. At least one embodiment of a method includes receiving read requests from the I/O device; testing predetermined fields from the read requests to predict a type of read request; and when the type of request is predicted to be... Agent: Hewlett-packard Company Intellectual Property Administration
20100153662 - Facilitating gated stores without data bypass: One embodiment of the present invention provides a system that facilitates precise exception semantics for a virtual machine. During operation, the system executes a program in the virtual machine using a processor that includes a gated store buffer that stores values to be written to a memory. This gated store... Agent: Pvf -- Sun Microsystems Inc. C/o Park, Vaughan & Fleming LLP
20100153663 - Memory access system and method: A memory access system has a first memory for storing data, a second memory for storing data, a processor for processing data, the processor including a first memory controller for reading out data from or writing data into the first memory, a second memory controller connected to the processor, for... Agent: Staas & Halsey LLP
20100153661 - Processing of read requests in a memory controller using pre-fetch mechanism: A memory controller provided according to an aspect of the present invention includes a predictor block which predicts future read requests after converting the memory address in a prior read request received from the processor to an address space consistent with the implementation of a memory unit. According to another... Agent: Nvidia C/o Murabito, Hao & Barnes LLP
20100153660 - Ruggedized memory device: A non-volatile storage device with built-in ruggedized features is disclosed. The device processes a write command to a logical block address by writing the data from the command to a non-volatile memory within the non-volatile storage device and conditionally associating the data received from the command with its corresponding logical... Agent: Brinks Hofer Gilson & Lione/sandisk
20100153664 - Controller and storage device for changing sequential order of executing commands: According to one embodiment, a controller includes: a memory configured to hold commands pre-assigned with a sequential order of execution and to hold for each of the commands a waiting time indicating an elapsed time period from a time point at which the command started being held; a selector configured... Agent: Knobbe Martens Olson & Bear LLP
20100153665 - Methods and apparatus for managing deletion of data: One embodiment is directed to the deletion of content units from a storage system. When a content unit is deleted, a reflection may be created and stored on the storage system. The reflection identifies the deleted content unit and may include additional information, such as a portion of the content... Agent: Emc Corporation C/o Wolf, Greenfield & Sacks, P.C.
20100153667 - Method, computer program and electronic device: A method for utilizing a secure memory in an electronic device for launching/running an application may include copying at least a portion of the application into the secure memory of the electronic device, and permanently storing the at least one portion of the application in the secure memory. The permanent... Agent: Harrity & Harrity, LLP
20100153669 - Storage device and storage device control method: According to one embodiment, a storage device includes a storage medium and a controller. The storage medium includes a plurality of normal sectors that stores data and a redundant sector that stores redundant sector data for restoring data stored in each of the normal sectors. The controller stores invalid information... Agent: Knobbe Martens Olson & Bear LLP
20100153666 - Storage system, method for calculating estimated value of data recovery available time and management computer: The invention provides a technology applicable to technologies other than a main frame technology and monitors data recovery available time while suppressing a monitoring error within a certain range in a storage system that performs Asynchronous Remote Copy among storage devices. A management computer in the storage system stores latest... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC
20100153668 - Storage system, storage managing device and storage managing method: A storage system, a storage managing device, and a storage managing method are provided. The storage system includes plural mount devices in which storage devices are mounted and includes a router connected to at least two loops in which plural mount devices are cascade-connected to one another, an initialization completion... Agent: Staas & Halsey LLP
20100153670 - Storage security using cryptographic splitting: Methods and systems for administrative management of a secure data storage network are disclosed. One system includes a secure storage appliance configured to host a plurality of volumes, each volume associated with a plurality of shares stored on a corresponding plurality of physical storage devices and having a plurality of... Agent: Unisys Corporation
20100153671 - System and method to secure a computer system by selective control of write access to a data storage medium: A system and method to securing a computer system from software viruses and other malicious code by intercepting attempts by the malicious code to write data to a storage medium. The invention intercepts the write access requests made by programs and verifies that the program is authorized to write before... Agent: Ted Sabety, C/o Sabety +associates, PLLC
20100153672 - Controlled data access to non-volatile memory: A method of controlling data access to non-volatile memory is disclosed. The method includes storing a data file in a non-volatile memory. The non-volatile memory includes a memory array including a plurality of address ranges one or more of which corresponding to a protected portion of the memory array and... Agent: Toler Law Group
20100153674 - Apparatus and method for managing process migration: An apparatus and method for managing process migration are provided. When a process of a source virtual machine is to be migrated to a target virtual machine based on a process migration request, and the source virtual machine and the target virtual machine are on the same operating system (OS),... Agent: North Star Intellectual Property Law, PC
20100153673 - Data access at a storage device using cluster information: Systems and methods for accessing data at a data storage device are disclosed. In a particular embodiment, a method includes receiving cluster information at a controller of a data storage device, the data storage device further including a memory, the cluster information being associated with a data file that is... Agent: Toler Law Group
20100153675 - Management of native memory usage: Described is a technology in a managed code/native code framework in which native code monitors memory usage (e.g., every fifty frames) to determine when memory usage has increased beyond a threshold. If so, the native memory requests that the managed code perform a garbage collection operation. The managed code may... Agent: Microsoft Corporation
20100153678 - Memory management apparatus and method: Disclosed is a memory management apparatus and method. The memory management apparatus includes a memory, an asymmetrical multi-core processor in which a core having a memory management unit and a core not having a memory management unit exist together, and a memory allocation processing unit. The memory allocation processing unit... Agent: Staas & Halsey LLP
20100153677 - Method for statically allocating stack based on multi thread: Provided is a method for statically allocating a stack based on multi thread. The method includes arbitrarily dividing a heap area and a stack area; allocating a stack space of each thread to the heap area at a predetermined size before executing the thread; swapping the stack of each thread... Agent: Staas & Halsey LLP
20100153676 - Semiconductor device: A semiconductor device disclosed herein is provided with a plurality of function reconfigurable cells, each comprising a memory circuit and a control circuit, for realizing variable logical functions. A function reconfigurable cell autonomously controls a read address in the memory circuit storing true value data by itself. For example, the... Agent: Miles & Stockbridge PC
20100153680 - Intelligent storage device controller: In a particular embodiment, a storage device includes a controller that is adapted to receive environmental data from a plurality of environmental sensors, where the environmental data is related to an operating environment of the storage device. Further, the controller is adapted to receive state information related to the data... Agent: Seagate Technology LLC C/o Westman, Champlin & Kelly, P.A.
20100153679 - Selection of a redundant controller based on resource view: A method, a system and a computer program product for selecting a primary controller for a server system based on the services offered by each controller. A primary controller designator (PCD) utility determines the relative importance of a controller based upon the services provided by the controller and the weighted... Agent: Dillon & Yudell LLP
20100153681 - Block driven computation with an address generation accelerator: A processor includes at least one execution unit that executes instructions, at least one register file, coupled to the at least one execution unit, that buffers operands for access by the at least one execution unit, an instruction sequencing unit that fetches instructions for execution by the at least one... Agent: Dillon & Yudell LLP
20100153682 - Mixed techniques for html crosstab rendering: What is described is a method and system for rendering HTML tables and crosstabs when insufficient data is available about the structure of the tables and data elements are positioned relative to the top-left corner of the table and not their first container, which is table data (TD).... Agent: Sap Ag
20100153683 - Specifying an addressing relationship in an operand data structure: A processor includes at least one execution unit that executes instructions, at least one register file, coupled to the at least one execution unit, that buffers operands for access by the at least one execution unit, and an instruction sequencing unit that fetches instructions for execution by the execution unit.... Agent: Dillon & Yudell LLP06/10/2010 > patent applications in patent subcategories. invention type
20100146195 - Defragmentation method for a machine-readable storage device: A defragmentation method includes the steps of: a) configuring a processor to determine a type of a target machine-readable storage device coupled electrically to the processor; b) configuring the processor to select, from among a plurality of pre-established defragmentation algorithms respectively for performing defragmentation on different types of machine-readable storage... Agent: Hunton & Williams LLP Intellectual Property Department
20100146187 - Endurance management technique: According to embodiments of the present invention, endurance management techniques are disclosures. Adherence to endurance and data retention ratings are ensured by managing write accesses to a memory device.... Agent: Rita M. Wisor C/o Intellevate, LLC
20100146190 - Flash memory storage system, and controller and method for anti-falsifying data thereof: A flash memory storage system is provided. The flash memory storage system includes a controller having a rewritable non-volatile memory and a flash memory chip. The rewritable non-volatile memory stores a data token and the flash memory chip stores a security data and a message digest. When the security data... Agent: J C Patents
20100146196 - Memory system having a plurality of types of memory chips and a memory controller for controlling the memory chips: A memory controller converts controller output signals output from a controller into memory input signals according to the operation specifications of memory chips to operate, and outputs the resultant to the memory chips through a common bus. The memory controller also receives memory output signals output from the memory chips... Agent: Arent Fox LLP
20100146192 - Methods for adaptively programming flash memory devices and flash memory systems incorporating same: A method for programming a plurality of data sequences into a corresponding plurality of flash memory functional units using a programming process having at least one selectable programming duration-controlling parameter controlling the duration of the programming process for a given data sequence, the method comprising providing at least one indication... Agent: Pearl Cohen Zedek Latzer, LLP
20100146197 - Non-volatile memory and method with memory allocation for a directly mapped file storage system: In a memory system with a file storage system, a scheme for allocating memory locations for a write operation is to write the files substantially contiguously in a memory block one after another rather than to start a new file in a new block. In this way, they are more... Agent: Davis Wright Tremaine LLP - Sandisk Corporation
20100146186 - Program control of a non-volatile memory: A method of storing data onto a non-volatile memory includes receiving, from a host, first data that is originally assigned to a first storage area, programming the first data to a second storage area, receiving second data from the host, and while receiving the second data from the host, programming,... Agent: Brinks Hofer Gilson & Lione/sandisk
20100146189 - Programming non volatile memories: Non volatile memories and methods of programming thereof are disclosed. In one embodiment, the method of programming a memory array includes receiving a series of data blocks, each data block having a number of bits that are to be programmed, determining the number of bits that are to be programmed... Agent: Slater & Matsil LLP
20100146188 - Replicated file system for electronic devices: Disclosed is a method, system, and computer readable medium for correcting corrupted data in an embedded file system (EFS) within a non-volatile memory (NVM) system. The NVM System further includes a replicated file system (RFS). A memory comparison is performed between EFS memory sectors and corresponding RFS memory sectors to... Agent: Williams Mullen
20100146194 - Storage device and data management method: A storage device includes two flash memories of different flash memory types, and respectively including multiple data blocks. Each data block corresponds to a physical and a logical block address. The storage device further includes a processing module including a controller, which is capable of accessing two mapping tables respectively... Agent: Hunton & Williams LLP Intellectual Property Department
20100146193 - System and method for cache synchronization: A system for cache synchronization includes a data managing unit and a storage medium. The data managing unit is configured to control storing of data of a buffer cache of the storage medium, in response to an event signal received from a host, by classifying the data of the buffer... Agent: Volentine & Whitt PLLC
20100146191 - System and methods employing mock thresholds to generate actual reading thresholds in flash memory devices: A method for reading at least one page within an erase sector of a flash memory device, the method comprising computing at least one mock reading threshold; using the at least one mock reading threshold to perform at least one mock read operation of at least a portion of at... Agent: Pearl Cohen Zedek Latzer, LLP
20100146198 - Optimal power usage in decoding a content stream stored in a secondary storage: Decoding a content of interest with optimal power usage. In an embodiment, a central processing unit (CPU) retrieves the frames of a data stream of interest from a secondary storage and stores them in a random access memory (RAM). The CPU forms an index table indicating the locations at which... Agent: Nvidia C/o Murabito, Hao & Barnes LLP
20100146199 - Memory system topologies including a buffer device and an integrated circuit memory device: Systems, among other embodiments, include topologies (data and/or control/address information) between an integrated circuit buffer device (that may be coupled to a master, such as a memory controller) and a plurality of integrated circuit memory devices. For example, data may be provided between the plurality of integrated circuit memory devices... Agent: Deniro/rambus
20100146200 - Non-snoop read/write operations in a system supporting snooping: Techniques that may utilize generic tracker structures to provide data coherency in a multi-node system that supports non-snoop read and write operations. The trackers may be organized as a two-dimensional queue structure that may be utilized to resolve conflicting read and/or write operations. Multiple queues having differing associated priorities may... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP
20100146201 - Memory device, memory controller and memory system: Provided is a memory device in which the decrease of the effective bandwidth caused by the refresh operation of the memory device has been solved, a memory controller of the memory device, and a memory system thereof. A memory device that is operated in response to a command from a... Agent: Arent Fox LLP
20100146202 - Microprocessor systems: A distribution medium (20) for providing an application to a host system (4) includes an interface element (21) for interfacing with the host (4), a memory or storage module (22) that stores application code representing the application and a hardware element (23). The hardware element (23) directly accesses application content... Agent: Greenberg Traurig, LLP (sv)IPDocketing
20100146204 - Stored data protection and recovery: A mechanism is provided in a computing system for controlling virtualized storage operable to communicate with a host and with mapped and unmapped storage resource pools. A selection component selects a target for a destructive data storage operation from the mapped storage resource pool. Responsive to the selection of the... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.
20100146203 - Using native command queuing tags to implement protection information for disk drives: A disk drive is disclosed comprising a disk and a head actuated over the disk. The disk drive further comprises control circuitry operable to receive a Native Command Queuing (NCQ) access command from a host, wherein the NCQ access command comprises at least one logical block address (LBA), and a... Agent: Western Digital Technologies, Inc. Attn: Lesley Ning
20100146205 - Storage device and method of writing data: In a particular embodiment, a device is disclosed that includes a controller adapted to store data to a first storage medium. The controller is adapted to receive data storage commands in an order received and to store the received data storage commands at a second storage medium. Further, the controller... Agent: Seagate Technology LLC C/o Westman, Champlin & Kelly, P.A.
20100146206 - Grid storage system and method of operating thereof: The is provided a storage system comprising a plurality of disk units adapted to store data at respective ranges of logical block addresses (LBAs), said addresses constituting an entire address space, and a storage control grid operatively connected to the plurality of disk units and comprising a plurality of data... Agent: Oliff & Berridge, PLC
20100146207 - Storage system and control method for the same: An object of the present invention is to improve the usage efficiency of a storage extent in a storage system using the AOU technique. A controller in the storage system allocates a storage extent in an actual volume to an extent in a virtual volume accessed by a host computer,... Agent: Foley And Lardner LLP Suite 500
20100146208 - Visualization method and storage apparatus for a storage system having external connectivity: A virtualization method for a storage system recognizes one or more logical devices located in a first and second storage apparatus and defined in a host apparatus as being connected to a channel, based on an inquiry command sent from the host apparatus when the channel comes on-line; detects one... Agent: Foley And Lardner LLP Suite 500
20100146209 - Method and apparatus for combining independent data caches: Methods, apparatus, computer programs and systems related to combining independent data caches are described. Various implementations can dynamically aggregate multiple level-one (L1) data caches from distinct processors together, change the degree of interleaving (e.g., how much consecutive data is mapped to each participating data cache before addresses go on to... Agent: Dorsey & Whitney LLP Intellectual Property Department
20100146211 - Shader complex with distributed level one cache system and centralized level two cache: A shader pipe texture filter utilizes a level one cache system as a primary method of storage but with the ability to have the level one cache system read and write to a level two cache system when necessary. The level one cache system communicates with the level two cache... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.
20100146212 - Accessing a cache memory with reduced power consumption: In one embodiment, a cache memory includes a data array having N ways and M sets and at least one fill buffer coupled to the data array, where the data array is segmented into multiple array portions such that only one of the portions is to be accessed to seek... Agent: Trop, Pruner & Hu, P.C.
20100146213 - Data cache processing method, system and data cache apparatus: A data cache processing method, system and a data cache apparatus. The method includes: configuring a node and a memory chunk corresponding to the node in a cache, the node storing a key of data, length of the data and a pointer pointing to the memory chunk, the memory chunk... Agent: Harness, Dickey & Pierce, P.L.C
20100146214 - Method and system for efficient cache locking mechanism: Systems and methods for the implementation of more efficient cache locking mechanisms are disclosed. These systems and methods may alleviate the need to present both a virtual address (VA) and a physical address (PA) to a cache mechanism. A translation table is utilized to store both the address and the... Agent: SprinkleIPLaw Group
20100146215 - Method and apparatus for filtering memory write snoop activity in a distributed shared memory computer: A method and apparatus for filtering memory probe activity for writes in a distributed shared memory computer. In one embodiment, the method may include assigning an uncached directory state to a cache data block in response to evicting the cache data block. In another embodiment, the method may include assigning... Agent: Mhkkg / Globalfoundries
20100146216 - Method and apparatus for filtering memory write snoop activity in a distributed shared memory computer: A method and apparatus for filtering memory probe activity for writes in a distributed shared memory computer. In one embodiment, the method may include assigning an uncached directory state to a cache data block in response to evicting the cache data block. In another embodiment, the method may include assigning... Agent: Mhkkg / Globalfoundries
20100146217 - Memory interface device and methods thereof: A data processing device includes a load/store module to provide an interface between a processor device and a bus. In response to receiving a load or store instruction from the processor device, the load/store module determines a predicted coherency state of a cache line associated with the load or store... Agent: Larson Newman & Abel, LLP
20100146218 - System and method for maintaining cache coherency across a serial interface bus: A method for executing processing operations using data stored in a memory. The method includes generating a snoop request configured to determine whether first data stored in a local memory is coherent relative to second data stored in a data cache, the snoop request including destination information that identifies the... Agent: Patterson & Sheridan, L.L.P.
20100146219 - Memory access device including multiple processors: Provided is a memory access device including multiple processors accessing a specific memory. The memory access device includes first and second processors, first and second transaction controllers, a memory access switch, and a memory controller. The first and second transaction controllers are connected respectively to the first and second processors.... Agent: Ampacc Law Group
20100146225 - Acyclic data transfer via a field bus coupler: A field bus coupler, a system with a field bus coupler, a transmission method for acyclic data via a field bus coupler and a computer program product are provided. The field bus coupler is configured to transmit acyclic data. The field bus coupler possesses a first and a second network... Agent: Siemens Corporation Intellectual Property Department
20100146223 - Apparatus and method for data management: Provided is a data processing method that may transmit, from a host unit including at least one host to a tiling unit, an input parameter and first data, tile the first data using a predetermined block interleaving scheme to convert the first data to second data, and store the converted... Agent: Staas & Halsey LLP
20100146222 - Chipset support for non-uniform memory access among heterogeneous processing units: A method for providing a first processor access to a memory associated with a second processor. The method includes receiving a first address map from the first processor that includes an MMIO aperture for a NUMA device, receiving a second address map from a second processor that includes MMIO apertures... Agent: Patterson & Sheridan, L.L.P.
20100146220 - Efficient program instrumentation for memory profiling: A system and method for performing efficient program instrumentation for memory profiling. A computing system comprises a memory profiler comprising a static binary instrumentation (SBI) tool and a dynamic binary analysis (DBA) tool. The profiler is configured to selectively instrument memory access operations of a software application. Instrumentation may be... Agent: Mhkkg/oracle (sun)
20100146226 - Integrating content-laden storage media with storage system: Integrating content into a storage system with substantially immediate access to that content. Providing high reliability and relatively easy operation with a storage system using redundant information for error correction. Having the storage system perform a “virtual write,” including substantially all steps associated with writing to the media to be... Agent: Kaleidescape, Inc.
20100146221 - Method for protecting memory data: A method for protecting memory data is provided, by extracting bad block addresses stored in the bad block information obtained during the memory scanning testing as memory label, and using an algorithm to compute an identification based on the memory label so that the memory will check the identification and... Agent: Lin & Associates Intellectual Property, Inc.
20100146224 - Request processing device, request processing system, and access testing method: A request processing device includes a request sender that sends a write request or a read request to a storage device, a response processor that receives a response to a request which the request sender has sent, and a test request processor that converts a read response which is a... Agent: Staas & Halsey LLP
20100146227 - Machine-implemented method for categorizing storage media, and machine-implemented method for storing target codes: A machine-implemented method, which is for categorizing a plurality of to-be-categorized storage units of a storage medium, includes: a) using a processor to write categorizing data for filling each of the to-be-categorized storage units of the storage medium; b) using a processor to determine a data access time of each... Agent: Hunton & Williams LLP Intellectual Property Department
20100146228 - Memory system and control method thereof: A memory system includes a nonvolatile memory including blocks as data erase units, a measuring unit which measures an erase time at which data in each block is erased, a block controller having a block table which associates a state value indicating one of a free state and a used... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100146229 - Interleaver and de-interleaver for iterative code systems: In exemplary embodiments, a skewed interleaving function for iterative code systems is described. The skewed interleaving function provides a skewed row and column memory partition and a layered structure for re-arranging data samples read from, for example, a first channel detector. An iterative decoder, such as an iterative decoder based... Agent: Ip Legal Services
20100146230 - System for storing and/or retrieving a data-set and method thereof: A system 1 for storing and/or retrieving a data-set is proposed, wherein the data-set comprises a plurality of data-files, the system comprising: storage means 3 for storing the data-set; at least one client 2 being operable to write the data-set to the storage means 3 and/or to read the data-set... Agent: Robert D. Shedd Patent Operations
20100146231 - Authenticating a backup image with bifurcated storage: Authenticating a backup image stored on a storage device prior to restoring the backup image. A value such as a hash value is generated based on the image to be preserved. The value is stored on the storage device in a first area accessible for writing only when the computing... Agent: Microsoft Corporation
20100146232 - Storage system, remote copy and management method therefor: A copy source storage controller received write data added with a time and issued from a host computer transfers the write data with the time to a copy destination storage controller. If there are a plurality of copy destination storage controllers, a representative copy destination storage controller compares times of... Agent: Brundidge & Stanger, P.C.
20100146234 - Arrangements having security protection: An external bus interface method including: receiving, via an access control unit, an access request conveyed through an external bus, and judging, via an access judging unit connected to the access control unit, whether the access request is to be honored or rejected, wherein upon receiving the access request, the... Agent: Antonelli, Terry, Stout & Kraus, LLP
20100146233 - Non-volatile memory device capable of initiating transactions: A non-volatile memory may operate, not in a master/slave arrangement, but in a peer-to-peer arrangement. In some embodiments, the memory may initiate a transaction with a device outside the memory. Thus, the memory may proactively perform tasks conventionally performed by memory controllers and other external devices.... Agent: Trop, Pruner & Hu, P.C.
20100146235 - Isolating received information on a locked device: Quarantining data received while a computing device is locked. While the computing device is locked, content items such as images, notifications, voice memos, telephone numbers, and the like are stored in a first memory area. The content items are transferred to a second memory area, separate from the first memory... Agent: Microsoft Corporation
20100146236 - System, method, and computer program product for rendering at least a portion of data useless in immediate response to a delete command: A system, method, and computer program product are provided for rendering at least a portion of data useless in immediate response to a delete command. In operation, a delete command directed to an operating system is received for deleting data from memory. Furthermore, in immediate response to the delete command,... Agent: Zilka-kotab, PC
20100146237 - Memory device, memory system, and access timing adjusting method in memory system: A memory device (103) includes a memory device controller (140), a delay adjustment storage unit (170) configured to store timing adjustment data which is read as both values 0 and 1 at a rise and a fall of a strobe signal, a memory cell (174), and a selector (172) configured... Agent: Mcdermott Will & Emery LLP
20100146238 - System and method for generating real addresses in data processing architectures: A system and method for generating a real address in data memory in response to a read/write request may include generating an access request to at least one of read and write data to a data memory. A connection ID may be received in association with the access request. This... Agent: Stevens Law Group
20100146239 - Continuous address space in non-volatile-memories (nvm) using efficient embedded management of array deficiencies: The invention provides a method of managing bad block in a data storage device having an OTP memory die in order to present a continues address space toward the user, by using some of the OTP memory space for the management and maintaining address replacement table. Fast and efficient programming... Agent: William H. Dippert Eckert Seamans Cherin & Mellott, LLC
20100146240 - Method, application system and storage device for managing application configuration information: The present invention provides a method, an application system and a storage device for managing the configuration information of applications, and it is applied to the storage device where an application extension area is created for every logical resource and their application extension area to physical resource mappings are maintained.... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP06/03/2010 > patent applications in patent subcategories. invention type
20100138587 - Shunted interleave for accessing plural memory banks, particularly those having partially accessed cells containing data for cache lines: A bank select device has a plurality of addressable locations and a plurality of storage locations correlated to each other so that each storage location is correlated to plural addressable locations and each addressable location is correlated to one storage location. Each storage location contains a respective bank select. The... Agent: Westman Champlin & Kelly, P.A.
20100138590 - Control apparatus for controlling peripheral device, non-volatile storage element, and method thereof: A control apparatus for controlling at least one peripheral device includes a non-volatile storage element and a controller. The non-volatile storage element is used for storing at least one control information set. The controller is externally coupled to the non-volatile storage element and includes a read-only storage element which stores... Agent: North America Intellectual Property Corporation
20100138594 - Flash memory data read/write processing method: A flash memory data read/write processing method is provided. The method includes the following steps. An encoding process is performed on the data to be written so that a number of a specific value in the encoded data is reduced compared with that in the original data, and the encoded... Agent: Seed Intellectual Property Law Group PLLC
20100138588 - Memory controller and a method of operating an electrically alterable non-volatile memory device: A controller operates a NAND non-volatile memory device which has an array of non-volatile memory cells. The array of non-volatile memory cells is susceptible to suffering loss of data stored in one or more memory cells of the array. The controller interfaces with a host device and receives from the... Agent: Dla Piper LLP (us )
20100138593 - Memory controller, semiconductor recording device, and method for notifying the number of times of rewriting: User data transferred from a host apparatus and a first information table 35 indicating correspondence between a logical address and a physical address are recorded in a first region of a flash memory 20. A second information table 38 composed of the physical block address storing the first information table... Agent: Mark D. Saralino (pan) Renner, Otto, Boisselle & Sklar, LLP
20100138592 - Memory device, memory system and mapping information recovering method: Disclosed is a memory device which comprises a data storing part having plural physical storage spaces; and a control part for storing data in the data storing part, wherein each of the physical storage spaces comprises a main area for storing user data at a write operation and a spare... Agent: Harness, Dickey & Pierce, P.L.C
20100138591 - Memory system: A memory system includes a volatile first storing unit, a nonvolatile second storing unit, and a controller. The controller stores management information of data stored in the second storing unit during a startup operation into the first storing unit and performs data management while updating the management information. The management... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100138595 - Semiconductor device comprising flash memory and address mapping method: A semiconductor device with flash memory includes; a log type determining unit configured to select log type from among a plurality of log types with respect to a log block storing program data requested to be programmed in the flash memory and generate a control signal indicating information indicating the... Agent: Volentine & Whitt PLLC
20100138589 - Storage optimizations by directory compaction in a fat file system: Storage optimizations by directory compaction in a file allocation table (FAT) file system. The method comprises determining if a cluster comprises a deleted content, indicating that the deleted content is deleted, and updating an entry of a FAT associated with the cluster to indicate that the cluster is free. The... Agent: Texas Instruments Incorporated
20100138596 - Information processor and information processing method: According to one embodiment, an information processor includes a connector, a determination module, a recognition module, and a cache control module. The connector connects a storage device to the information processor. The storage device is used as a cache by an operating system which controls the information processor. The determination... Agent: Knobbe Martens Olson & Bear LLP
20100138597 - Information processing system, system controller, and memory control method: According to one embodiment, an extreme data rate DRAM is a DRAM resetting data thereof in response to a reset signal. When power is initially supplied to a system, a system controller outputs the reset signal to the extreme data rate DRAM in response to a reset signal input from... Agent: Blakely Sokoloff Taylor & Zafman LLP
20100138598 - Memory devices with buffered command address bus: Circuits and methods are provided that alleviate overloading of the command address bus and limit decreases in command address bus bandwidth to allow increased numbers of memory modules to be included in a computer system. A plurality of switches is coupled between the command address bus (which is coupled to... Agent: Ropes & Gray LLP
20100138600 - Reducing content addressable memory (cam) power consumption counters: A method may include counting the number of times each of a plurality of entries in a content addressable memory (CAM) matches one or more searches; grouping entries in the CAM into a first subset and a second subset based on the number of times each of the plurality of... Agent: Harrity & Harrity, LLP
20100138599 - System and method for matching patterns: A pattern matching system detects strings contained in a target pattern to be detected within a data stream input by 1-byte data, and detects a regular expression representing the target pattern among regular expressions constructed by the detected strings.... Agent: Staas & Halsey LLP
20100138602 - Disk system adapted to be directly attached to network: A network-attached disk (NAD) system is disclosed that includes an NAD device for receiving a disk access command from a host through a network, and a device driver at the host for controlling the NAD device through the network, where the device driver creates a virtual host bus adapter so... Agent: Rothwell, Figg, Ernst & Manbeck, P.C.
20100138601 - Virtual volume control method involving device stop: Provided is a storage system capable of starting/stopping a disk drive. At the time of allocating a logical device, it is judged, based on attributes including a purpose of the logical device, whether or not control can be performed in terms of start/stop of an allocation target disk drive to... Agent: Antonelli, Terry, Stout & Kraus, LLP
20100138604 - Recording medium storing control program for decentralized data, storage management program, control node, and disk node: A number-of-slices collector collects number-of-slices information indicating the number of free slices, which are not assigned to a storage areas of a logical disk, from each of a plural disk nodes, divides the storage area of the corresponding storage device in units of slice, and stores an assignment relation of... Agent: Staas & Halsey LLP
20100138605 - System and method for multi-tiered meta-data caching and distribution in a clustered computer environment: A system and method caches and distributes meta-data for one or more data containers stored on a plurality of volumes configured as a striped volume set (SVS) and served by a plurality of nodes interconnected as a cluster. The SVS comprises one meta-data volume (MDV) configured to store a canonical... Agent: Cesari And Mckenna, LLP
20100138603 - System and method for preventing data corruption after power failure: A system and method for preventing data corruption after power failure is described. The system may include a host server, a disk array, a journaling disk, and/or a RAID controller. A method for preventing data corruption after power failure may include receiving at least one of a read command or... Agent: Lsi Corporation C/o Suiter Swantz PC Llo
20100138606 - Method for controlling non-volatile semiconductor memory system: In a memory system using a storage medium, which is inserted into an electronic apparatus via a connector to add a memory function thereto, the storage medium has a GROUND terminal, a power supply terminal, a control terminal and a data input/output terminal, and the connector has a function of... Agent: Hogan & Hartson L.L.P.
20100138607 - Increasing concurrency and controlling replication in a multi-core cache hierarchy: In one embodiment, the present invention includes a directory of a private cache hierarchy to maintain coherency between data stored in the cache hierarchy, where the directory is to enable concurrent cache-to-cache transfer of data to two private caches. Other embodiments are described and claimed.... Agent: Trop, Pruner & Hu, P.C.
20100138608 - Method and apparatus for pipeline inclusion and instruction restarts in a micro-op cache of a processor: Methods and apparatus for instruction restarts and inclusion in processor micro-op caches are disclosed. Embodiments of micro-op caches have way storage fields to record the instruction-cache ways storing corresponding macroinstructions. Instruction-cache in-use indications associated with the instruction-cache lines storing the instructions are updated upon micro-op cache hits. In-use indications can... Agent: Trop, Pruner & Hu, P.C.
20100138610 - Method and apparatus for inclusion of tlb entries in a micro-op cache of a processor: Methods and apparatus for inclusion of TLB (translation look-aside buffer) in processor micro-op caches are disclosed. Some embodiments for inclusion of TLB entries have micro-op cache inclusion fields, which are set responsive to accessing the TLB entry. Inclusion logic may the flush the micro-op cache or portions of the micro-op... Agent: Trop, Pruner & Hu, P.C.
20100138611 - Method and apparatus for pipeline inclusion and instruction restarts in a micro-op cache of a processor: Methods and apparatus for instruction restarts and inclusion in processor micro-op caches are disclosed. Embodiments of micro-op caches have way storage fields to record the instruction-cache ways storing corresponding macroinstructions. Instruction-cache in-use indications associated with the instruction-cache lines storing the instructions are updated upon micro-op cache hits. In-use indications can... Agent: Trop, Pruner & Hu, P.C.
20100138609 - Technique for controlling computing resources: A technique to enable resource allocation optimization within a computer system. In one embodiment, a gradient partition algorithm (GPA) module is used to continually measure performance and adjust allocation to shared resources among a plurality of data classes in order to achieve optimal performance.... Agent: Intel Corporation C/o Cpa Global
20100138612 - System and method for implementing cache sharing: A system for implementing cache sharing includes a main control unit and a plurality of service processing units, and further includes a shared cache unit respectively connected with the main control unit and the service processing units for implementing high-speed data interaction among the service processing units. A method for... Agent: Ladas & Parry LLP
20100138613 - Data caching: The invention relates to a method for improving caching efficiency in a computing device. It utilises metadata, that describes attributes of the data to which it relates, to determine an appropriate caching strategy for the data. The caching strategy may be based on the type of the data, and/or on... Agent: Nokia, Inc.
20100138614 - Compression status bit cache and backing store: One embodiment of the present invention sets forth a technique for increasing available storage space within compressed blocks of memory attached to data processing chips, without requiring a proportional increase in on-chip compression status bits. A compression status bit cache provides on-chip availability of compression status bits used to determine... Agent: Patterson & Sheridan, L.L.P.
20100138615 - Handling direct memory accesses: Methods and systems for efficiently processing direct memory access requests coherently. An external agent requests data from the memory system of a computer system at a target address. A snoop cache determines if the target address is within an address range known to be safe for external access. If the... Agent: Iv (transmeta) C/o Murabito, Hao & Barnes LLP
20100138616 - Input-output virtualization technique: Methods, systems, apparatuses and program products are disclosed for managing device virtualization in hypervisor and hypervisor-related environment which include both pass-thru I/O and emulated I/O.... Agent: Phoenix Technologies Ltd.
20100138617 - Method for initializing a memory: A method for initializing a control device of a memory, the control device executing commands for accessing the memory transmitted to the memory by a control signal, the method comprising steps of detecting the switching on of the memory and of at least partially initializing the control device following the... Agent: Seed Intellectual Property Law Group PLLC
20100138618 - Priority encoders: A priority encoder and a processing device having the priority encoder. The priority encoder includes a port selector for generating a plurality of prioritized read requests based on a plurality of write requests from a plurality of processing devices and a predetermined priority assigned to each of the plurality of... Agent: Henneman & Associates, PLC
20100138619 - Secure erasure of digital files: One or more target files are securely erased from a host storage medium such as a disk by overwriting the target files not just with “O's,” “1's” and/or random data, but also (or instead) by overwriting them with portions of other, selected, innocuous files found on the same medium. By... Agent: Potomac Patent Group PLLC
20100138622 - Backup apparatus, backup method and backup program: A backup apparatus has an address conversion table for storing, in correspondence with each other, a logical address and a physical address. The backup apparatus has a sequential data count setting unit, a sequential data information acquisition unit, and a reading unit. The sequential data count setting unit sets sequential... Agent: Fujitsu Patent Center C/o Cpa Global
20100138620 - Capturing and naming dynamic storage tiering configurations to support data pre-staging: A method for pre-staging data includes obtaining a DST configuration of a virtual volume at a first point in time. The method also includes creating a Point-in-Time copy (PiT) in a destination storage pool when the virtual volume includes at least one PiT, or reconfiguring at least one virtual volume... Agent: Lsi Corporation C/o Suiter Swantz PC Llo
20100138621 - Information processing system, controlling method in information processing system, and managing apparatus: A problem is to support to realize the efficient power saving according to the status of a remote copy in an information processing system provided with a storage apparatus. When newly using any one of volumes of a first storage apparatus and a second storage apparatus, a management apparatus of... Agent: Brundidge & Stanger, P.C.
20100138623 - Memory area protection system and methods: In one embodiment, a non-volatile memory device includes a plurality of protection bits denoting that an area of memory in the device must be protected from being erased or programmed. The memory device further includes a majority logic circuit for determining the logic state of the majority of the plurality... Agent: Dorsey & Whitney LLP Intellectual Property Department
20100138624 - Storage controller and storage control method: A storage control technique with which, even if not data, but only its management information is deleted, a host system can recognize storage areas storing unnecessary data and so use them effectively. When a file system in the host system deletes the management information for data stored in a page... Agent: Foley And Lardner LLP Suite 500
20100138625 - Recording medium storing update processing program for storage system, update processing method, and storage system: A reading and writing control unit has a synchronous mode for directly writing write data in storage devices and an asynchronous mode for accumulating the write data in a cache memory and writing the accumulated write data in the storage devices. A synchronization and asynchronization instructing unit instructs whether the... Agent: Fujitsu Patent Center C/o Cpa Global
20100138626 - Use of reservation concepts in managing maintenance actions in a storage control system: A computationally implemented method, system, and product for managing maintenance activities in a storage control system are disclosed. A disk drive has a reservation status that is monitored. A reservation ID is assigned to a successful reservation request. The reservation ID of a drive request is compared to the reservation... Agent: Lsi Corporation C/o Suiter Swantz PC Llo
20100138627 - Efficient alert mechanism for overutilization of storage resources: Disclosed is a method of issuing volume level alerts to provide a warning that indicates overutilization of storage resources in a computer system. Volume level checking is performed without the necessity of checking all the volumes, but only upon the occurrence of certain changes so that the only the most... Agent: Cochran Freund & Young LLC Lsi Corporation
20100138629 - Storage apparatus and storage area allocation method: A storage apparatus is provided with a storage area for storing data sent from a host computer, and a virtual/logical volume to which a dynamically variable storage area is allocated from within the storage area, the volume being provided to the host computer, and this storage apparatus is configured to... Agent: Foley And Lardner LLP Suite 500
20100138628 - System and method for dynamic memory allocation: A method for managing the allocation of memory to one or more applications. The method includes allocating a variety of fixed size memory blocks to a requesting application, each of the fixed size memory blocks being free of header information to maximize memory usage. Free, or unused blocks of data... Agent: Borden Ladner Gervais LLP
20100138630 - Data-processing unit: A data-processing unit comprises a register unit (10) comprising a register (20, R0-R3). The data-processing unit further comprises an address-generation unit (30) for generating a memory address to a memory unit (60). The address-generation unit (30) is adapted to fetch, from the register (20, R0-R3), a base address stored in... Agent: Potomac Patent Group PLLCPrevious industry: Electrical computers and digital data processing systems: input/output
Next industry: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors)
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