|Electrical computers and digital processing systems: memory patents - Monitor Patents|
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Electrical computers and digital processing systems: memory October categorized by USPTO classification 10/09Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 10/30/2009 > patent applications in patent subcategories. categorized by USPTO classification
10/23/2009 > patent applications in patent subcategories. categorized by USPTO classification
10/15/2009 > patent applications in patent subcategories. categorized by USPTO classification
20090259795 - Policy framework to treat data: Data can be retained upon a storage medium that has characteristics suitable for the data. However, as the storage mediums are used, time passes, etc., characteristics of memory can change and therefore data can reside upon an improper medium. Data can be dynamically moved from one storage location to another... Agent: Lee & Hayes, PLLC
20090259794 - Serviceability level indicator processing for storage alteration: A method, system, and computer program product for implementing Serviceability Level Indicator Processing (SLIPs) for storage alterations in a computer system is provided. A plurality of storage release requests is analyzed to identify an address monitored by a storage alteration slip. Upon identification of the address, the storage alteration slip... Agent: Griffiths & Seaton PLLC (ibm)
20090259793 - System and method for effectively implementing an erase mode for a memory device: A system and method for effectively implementing an erase mode for a memory device includes a memory array that is configured to temporarily store confidential or other types of data. A mode switch is provided on the memory device for permitting a device user to readily select between a normal... Agent: Gregory J. Koerner Redwood Patent Law
20090259796 - Data writing method for non-volatile memory and storage system and controller using the same: A data writing method for a non-volatile memory and a storage system and a controller using the same are provided. The data writing method includes executing a non-volatile memory writing program pre-stored in the non-volatile memory on a host, managing data desired to be written through the non-volatile memory writing... Agent: J C Patents
20090259804 - Calibrated transfer rate: Methods, systems, and devices are described for the implementation of a novel architecture to support a calibrated rate for the transfer of circuit configuration data. Sets of configuration data from a memory may be transferred to volatile memory to support reconfigurable circuit elements, for example, for use in a clock... Agent: Townsend And Townsend And Crew, LLP
20090259801 - Circular wear leveling: A method for flash memory management comprises providing a head pointer configured to define a first location in a flash memory, and a tail pointer configured to define a second location in a flash memory. The head pointer and tail pointer define a payload data area. Payload data is received... Agent: Snell & Wilmer L.L.P. (main)
20090259806 - Flash management using bad page tracking and high defect flash memory: Disclosed are techniques for flash memory management, including utilizing defect information corresponding to a granularity smaller than a physical erase block size of a flash memory chip.... Agent: Snell & Wilmer L.L.P. (main)
20090259805 - Flash management using logical page size: Disclosed are techniques for flash memory management, including tracking payload data via one or more data structures configured to define the size of logical pages in a flash memory. In various embodiments, the logical page size may be larger than, equal to, or smaller than a physical page size of... Agent: Snell & Wilmer L.L.P. (main)
20090259800 - Flash management using sequential techniques: Disclosed are techniques for flash memory management, including receiving data from a host, writing the data to a flash memory device in the order it was received from the host, and providing at least one data structure configured to locate the data written to the flash memory device.... Agent: Snell & Wilmer L.L.P. (main)
20090259807 - Flash memory architecture with separate storage of overhead and user data: A memory device has a plurality of dedicated data blocks for storing only user data and a plurality of dedicated overhead blocks for storing only overhead data. Current overhead segments of a dedicated overhead block can be consolidated and moved to a new dedicated overhead block.... Agent: Leffert Jay & Polglaze, P.A. Attn: Thomas W. Leffert
20090259799 - Method and apparatus for a volume management system in a non-volatile memory device: Embodiments for partitioning a non-volatile memory device is described. In one embodiment a memory system includes a first addressable range of memory blocks for storing different types of data. The memory system is partitioned to include a second addressable range of memory blocks capable of storing data indicating attributes of... Agent: Jennifer M. Lane, Esq. Dorsey & Whitney LLP
20090259798 - Method and system for accessing a storage system with multiple file systems: In order to write data to a storage system accessible with a first and second file system, a manager receives a data write request associated with a file. The manager determines if a function supported by the second file system is needed to complete the write request. If so, the... Agent: Brinks Hofer Gilson & Lione/sandisk
20090259797 - Method, apparatus and computer readable medium for storing data on a flash device using multiple writing modes: Methods, apparatus and computer readable medium for writing data into a flash memory device are disclosed. In some embodiments, the data is written in a writing mode selected in accordance with an extent to which the flash memory storage device or a flash die thereof is full of previously-stored data.... Agent: Mpg, LLP And Sandisk
20090259808 - Methods of sanitizing a flash-based data storage device: A data storage device includes one or more non-volatile, blockwise erasable data storage media and a mechanism for sanitizing the media in response to a single external stimulus or in response to a predetermined physical or logical condition. Optionally, only part of the media is sanitized, at a granularity finer... Agent: Mpg, LLP And Sandisk
20090259802 - Smart device recordation: Valuable information can be retained upon a storage device, such as a flash memory unit. Due to the portable nature of the memory, there can be increased likelihood of theft, less back up of important files not a reliable medium, legal physical transfer of the device between parties, and the... Agent: Lee & Hayes, PLLC
20090259803 - Systems, methods and computer program products for encoding data to be written to a nonvolatile memory based on wear-leveling information: A nonvolatile memory system is operated by providing data to be written to a nonvolatile memory, logically combining the data to be written to the nonvolatile memory with a random pattern to generate encoded data; and programming the encoded data in the nonvolatile memory.... Agent: Myers Bigel Sibley & Sajovec
20090259809 - Memory access apparatus and display using the same: A memory access apparatus and a display using the same are provided. The memory access apparatus includes a dynamic memory, a plurality of clients and a memory management unit. The dynamic memory is used to store a plurality of memory data. The clients access the dynamic memory and each client... Agent: Jianq Chyun Intellectual Property Office
20090259810 - Access control list rule compression using meter re-mapping: A system may include a content addressable memory (CAM) that is configured to include multiple services, receive a key, where the key includes source port information and IP information related to a packet received on one of multiple ports, and output a match index value in response to a search... Agent: Brake Hughes Bellermann LLP C/o Cpa Global
20090259811 - Method of performing table lookup operation with table index that exceeds cam key size: In a packet switching device or system, such as a router, switch, combination router/switch, or component thereof, a method of and system for performing a table lookup operation using a lookup table index that exceeds a CAM key size is provided. Multiple CAM accesses are performed, each using a CAM... Agent: Howrey LLP-ca
20090259812 - Storage system and data saving method: This storage system includes a plurality of data drives, a plurality of spare drives for storing data stored in at least one data drive among the plurality of data drives as save-target data, one or more RAID groups configured from the plurality of data drives, one or more spare RAID... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC
20090259813 - Multi-processor system and method of controlling the multi-processor system: A multi-processor system has a plurality of processor cores, a plurality of level-one caches, and a level-two cache. The level-two cache has a level-two cache memory which stores data, a level-two cache tag memory which stores a line bit indicative of whether an instruction code included in data stored in... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20090259814 - Memory control apparatus and method for controlling the same: Disclosed herein is a memory control apparatus including: a plurality of buffers configured to store data; a plurality of input ports configured to input the data to be written into the buffers; a plurality of output ports configured to output the data read from the buffers; a write control circuit... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20090259815 - Method and system for determining multiple unused registers in a processor: An improved method, device and system are presented for selecting a predetermined number of unused registers in a processor. The method includes partitioning registers in a processor into subsets; searching each subset for an unused register; determining whether every subset includes an unused register; if so, selecting an unused register... Agent: Dillon & Yudell LLP
20090259817 - Mirror consistency checking techniques for storage area networks and network based virtualization: A technique is provided for facilitating information management in a storage area network. The storage area network may utilize a fibre channel fabric which includes a plurality of ports. The storage area network may also comprise a first volume which includes a first mirror copy and a second mirror copy.... Agent: Weaver Austin Villeneuve & Sampson LLP
20090259818 - Storage controller and data management method: This storage controller providing a volume for storing data transmitted from a host system includes a management unit for managing the data written in the volume with a first block area, or a second block area in the first block area which is smaller than the first block area; a... Agent: Reed Smith LLP Suite 1400
20090259816 - Techniques for improving mirroring operations implemented in storage area networks and network based virtualization: A technique is provided for implementing online mirroring of a volume in a storage area network. A first instance of the volume is instantiated at a first port of the fibre channel fabric for enabling I/O operations to be performed at the volume. One or more mirroring procedures may be... Agent: Weaver Austin Villeneuve & Sampson LLP
20090259819 - Method of wear leveling for non-volatile memory: A method of wear leveling for a non-volatile memory is performed as follows. First, the non-volatile memory is divided into a plurality of zones including at least a first zone and a second zone. The first zone is written and/or erased in which one or more logical blocks have higher... Agent: Wpat, PC Intellectual Property Attorneys
20090259820 - Operation method for memory: An operation method for a memory is provided. When the memory is under a reset mode, a main data line (MDQ) and a local data line (LDQ) of the memory is forced to be a logic high level. Then, the memory cells in the memory are turned on by choosing... Agent: Jianq Chyun Intellectual Property Office
20090259821 - Apparatus and method for multimedia communication: A system that incorporates teachings of the present disclosure may include, for example, a server having a controller to receive media content from a communication device where the media content is to be accessed by one or more recipients, determine a memory capacity available for storage of the media content... Agent: At&t Legal Department - As Attn: Patent Docketing10/08/2009 > patent applications in patent subcategories. categorized by USPTO classification
20090254694 - Memory device with integrated parallel processing: A method for data processing includes accepting input data words including bits for storage in a memory, which includes multiple memory cells arranged in rows and columns. The accepted data words are stored so that the bits of each data word are stored in more than a single row of... Agent: Darby & Darby P.C.
20090254693 - Method and system for generating consistent snapshots for a group of data objects: Snapshots that are consistent across a group of data objects are generated. The snapshots are initiated by a coordinator, which transmits a sequence of commands to each storage node hosting a data object within a group of data objects. The first command prepares a data object for a snapshot. After... Agent: Vmware, Inc.
20090254695 - Storage system comprising plurality of storage system modules: A plurality of modules (1) and (2) comprise a plurality of virtual volumes with which the same volume identification number is associated. A module (2), which receives a write request from a computer, searches for an unallocated real area from among a plurality of real areas in the module (2)... Agent: Antonelli, Terry, Stout & Kraus, LLP
20090254696 - Semiconductor integrated circuit and method of operation for semiconductor integrated circuit: The semiconductor IC has a nonvolatile memory including twin cells, a selector, and a sense circuit. When complementary data are written into a pair of nonvolatile memory cells of each twin cell, the pair of nonvolatile memory cells is set to be in a written state where one cell of... Agent: Miles & Stockbridge PC
20090254700 - Dram controller for graphics processing operable to enable/disable burst transfer: An interface unit 20 assigns different SDRAMs 1 and 2 to adjacent drawing blocks in a frame-buffer area. In processing that extends across the adjacent drawing blocks, active commands, for example, are issued alternately to the SDRAMs 1 and 2 to reduce waiting cycles resulting from the issue interval restriction.... Agent: Mcdermott Will & Emery LLP
20090254697 - Memory with embedded associative section for computations: An integrated circuit device includes a semiconductor substrate and an array of random access memory (RAM) cells, which are arranged on the substrate in first columns and are configured to store data. A computational section in the device includes associative memory cells, which are arranged on the substrate in second... Agent: Darby & Darby P.C.
20090254698 - Multi port memory device with shared memory area using latch type memory cells and driving method: A multiport semiconductor memory device includes; first and second port units respectively coupled to first and second processors, first and second dedicated memory area accessed by first and second processors, respectively and implemented using DRAM cells, a shared memory area commonly accessed by the first and second processors via respective... Agent: Volentine & Whitt PLLC
20090254699 - Synchronous dynamic random access memory interface and method: A memory interface allows access to SDRAM by receiving a column address for a data read or write of a burst of data units. Each data unit in the burst has an expected bit size. The interface generates n (n>1) column memory addresses from the received column address. The interface... Agent: Dowell & Dowell P.C.
20090254702 - Recording medium storing data allocation control program, data allocation control device, data allocation control method, and multi-node storage-system: A data allocation control program manages data allocation when data is distributively stored in a plurality of disk nodes that are shifted to a power saving mode unless access is performed for a certain time. The program produces a plurality of allocation pattern candidates each indicating the disk nodes in... Agent: Fujitsu Patent Center C/o Cpa Global
20090254701 - Storage system and access count equalization method therefor: [Solution] When migrating data in pool volumes to equalize the data access counts, which data migration—data migration in units of pages or data migration in units of volumes—is most appropriate is judged based on the information stored in an access information table storing access information, which is the information about... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC
20090254703 - Disk order examining system for a dual-host redundant storage system and method thereof: This present invention is a disk order examining system for a dual-host redundant storage device and method thereof, implementing in a dual-host redundant storage device with a master controller and a slave controller. The invention is to examine if the linkage orders of disks to the master controller are the... Agent: Chih Feng Yeh Brian M. Mcinnis
20090254704 - Memory card: The memory card incorporates a memory device for storing information, and has a plurality of contact pads arranged parallel in the width direction for input and output of electric signals relating to the information to be recorded in the memory device or the information being read out from the memory... Agent: Greenblum & Bernstein, P.L.C
20090254705 - Bus attached compressed random access memory: A computer memory system having a three-level memory hierarchy structure is disclosed. The system includes a memory controller, a volatile memory, and a non-volatile memory. The volatile memory is divided into an uncompressed data region and a compressed data region.... Agent: Scully, Scott, Murphy & Presser, P.C.
20090254708 - Method and apparatus for delivering and caching multiple pieces of content: Aspects relate to systems and methods for providing the ability to customize content delivery. A device can cache multiple presentations. The device can establish a cache depth upon initiation of the subscription service. The device can provide an interface to select a cache depth. The cache depth can be the... Agent: Qualcomm Incorporated
20090254706 - Method and system for approximating object sizes in an object-oriented system: A method and system for increasing a system's performance and achieving improved memory utilization by approximating the memory sizes that will be required for data objects that can be deserialized and constructed in a memory cache. The method and system may use accurate calculations or measurements of similar objects to... Agent: King & Spalding
20090254707 - Partial content caching: A network device, known as an appliance, is located in the data path between a client and a server. The appliance includes a cache that is used to cache static and near-static cacheable content items. When a request is received, the appliance determines whether any portion of the requested data... Agent: Raubvogel Law Office
20090254709 - Prediction mechanism for subroutine returns in binary translation sub-systems of computers: A sequence of input language (IL) instructions of a guest system is converted, for example by binary translation, into a corresponding sequence of output language (OL) instructions of a host system, which executes the OL instructions. In order to determine the return address after any IL call to a subroutine... Agent: Vmware, Inc.
20090254710 - Device and method for controlling cache memory: A cache memory control device according to an embodiment of the present invention comprises: a refill counter that counts a refill request, and a cache-capacity determining unit that determines cache capacity. The cache-capacity determining unit transmits a cache-capacity-decrease command signal to the cache memory when a count value is equal... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.
20090254711 - Reducing cache pollution of a software controlled cache: Reducing cache pollution of a software controlled cache is provided. A request is received to prefetch data into the software controlled cache. A first designator is set for a first cache access to a first value. If there is the second cache access to prefetch, a determination is made as... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.
20090254712 - Adaptive cache organization for chip multiprocessors: A method, chip multiprocessor tile, and a chip multiprocessor with amorphous caching are disclosed. An initial processing core 404 may retrieve a data block from a data storage. An initial amorphous cache bank 410 adjacent to the initial processing core 404 may store an initial data block copy 422. A... Agent: Prass LLP
20090254713 - Access control to partitioned blocks in shared memory: A method for controlling multiple access to partitioned areas of a shared memory and a portable terminal having the shared memory are disclosed. According to an embodiment of the present invention, the storage area of a shared memory is partitioned to a plurality of storage areas, and each control unit... Agent: Birch Stewart Kolasch & Birch
20090254714 - Method and apparatus for exploiting parallelism across multiple traffic streams through a single channel: Methods of obtaining, enqueueing and executing several memory transactions are described, where the memory transactions may be generated in a first order but executed in a second order. Despite the relaxed ordering, essential programming paradigms such as producer-consumer relationships are not affected. Chipsets and systems using the methods are also... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP
20090254715 - Variable partitioned blocks in shared memory: A method and device for varying the size of partitioned areas of a shared memory is disclosed. The present invention resets the size of partitioned areas by expanding the size of a shared area when data that is larger than the writable area of the shared area is to be... Agent: Birch Stewart Kolasch & Birch
20090254716 - Coordinated remote and local machine configuration: A method, system, and computer program product for coordinating the configuration of local and remote storage subsystems for a local client is provided. A command sender is configured on a local storage subsystem to create remote command objects based on commands received from the local client, and deliver the remote... Agent: Griffiths & Seaton PLLC (ibm)
20090254718 - Local memories with permutation functionality for digital signal processors: A digital signal processor (DSP) co-processor according to a clustered architecture with local memories. Each cluster in the architecture includes multiple sub-clusters, each sub-cluster capable of executing one or two instructions that may be specifically directed to a particular DSP operation. The sub-clusters in each cluster communicate with global memory... Agent: Texas Instruments Incorporated
20090254717 - Storage system and method thereof: A storage system and a method thereof. The storage system comprises first and second storage devices, first and second analog front ends, and a controller. The first and second analog front ends, coupled to the first and second storage devices, receive first and second analog data from the first and... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP
20090254719 - Switch apparatus: A method for controlling a switch apparatus connected to a first and a second storage apparatus, and a host, the switch apparatus managing a virtual storage area maintained by the first and second storage apparatuses, the host accessible to the virtual storage area by transmitting a command for identifying a... Agent: Staas & Halsey LLP
20090254720 - System for rebuilding dispersed data: A digital data file storage system is disclosed in which original data files to be stored are dispersed using some form of information dispersal algorithm into a number of file “slices” or subsets in such a manner that the data in each file share is less usable or less recognizable... Agent: Law Offices Of Eugene M. Cummings, P.C.
20090254723 - Apparatus and method for incremental package deployment: A method and apparatus for incremental package deployment are described. In one embodiment, the method includes the redirection of disk input/output (I/O) requests to preserve contents of disk memory. Following redirection of the disk I/O request, a software distribution package is created according to disk I/O write requests redirected to... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP
20090254722 - Data storage apparatus: A method for controlling a storage apparatus connectable to a server, the storage apparatus including a first storage area and a second storage area for storing data, the method comprises: copying the data stored in the first storage area into the second storage area; copying data stored in the location... Agent: Staas & Halsey LLP
20090254724 - Method and system to manage memory accesses from multithread programs on multiprocessor systems: A method, computer program and system for controlling accesses to memory by threads created by a process executing on a multiprocessor computer. A page table structure is allocated for each new thread and copied from the existing threads. The page access is controlled by a present bit and a writable... Agent: Ibm Corporation (swp)
20090254721 - Storage apparatus and volume restoration method: A storage apparatus conducts, in a protection period, data protection processing for protecting, in a third logical volume, data stored in a first logical volume by using backup data stored in a second logical volume, and suspends the data protection processing in a no-protection period, during which backup relative to... Agent: Brundidge & Stanger, P.C.
20090254725 - Method and system for automatically preserving persistent storage: Computer-based methods, techniques, and systems for automatically protecting a storage device from unwanted alterations are provided. Example embodiments provide a Disk Access Redirection System, which includes a Redirection Driver, an Available Space Table (“AST”), a Protected Space Redirection Table (“PSRT”), and optionally an Unprotected Space Table (“UST”). The Redirection Driver... Agent: Black Lowe & Graham, PLLC
20090254726 - Method of address space layout randomization for windows operating systems: A system and method for address space layout randomization (“ASLR”) for a Windows operating system is disclosed. The address space layout includes one or more memory regions that are identified and then a particular implementation of the system randomizes the identified memory region in order to prevent any software vulnerabilities.... Agent: Polsinelli Shughart PC
20090254727 - Digital data reproducing apparatus and recording medium: A digital data reproducing apparatus comprising: a reading unit configured to read digital data stored in a recording medium at a speed higher than a reproduction speed to store the digital data into a first memory; an encoding unit configured to store encoded data obtained by encoding the digital data... Agent: SocalIPLaw Group LLP
20090254728 - Memory allocation to minimize translation lookaside buffer faults: In one embodiment, a method includes identifying first and second memory segments associated with a process in virtual memory, allocating memory for the first memory segment from a first contiguous physical memory space, allocating memory for the second memory segment from a second contiguous physical memory space, and mapping the... Agent: Cindy S. Kaplan
20090254730 - Memory pacing: A method, system, and program for managing memory page requests in a multi-processor data processing system determines a threshold value of available memory, and dynamically adjusts an allocation time to fulfill a page request if the available memory is below a threshold value. The allocation time to fulfill the page... Agent: Ibm Corp (ya) C/o Yee & Associates PC
20090254729 - Method of wear leveling for a non-volatile memory: According to the method of wear leveling for a non-volatile memory of the present invention, the non-volatile memory is divided into a plurality of windows, and a mapping table is built in which the logical block addresses having frequently accessed data are allocated equally to the plurality of windows. The... Agent: Wpat, PC Intellectual Property Attorneys
20090254731 - System and method for memory allocation in embedded or wireless communication systems: Systems and methods for an improved memory allocation service in embedded or wireless devices. Memory is allocated using a combination of container memory items and referencing memory items.... Agent: Qualcomm Incorporated
20090254732 - Enabling memory module slots in a computing system after a repair action: Methods, systems, and products are disclosed for enabling memory module slots in a computing system after a repair action, the computing system having a plurality of memory module slots and having at least one memory module installed in one of the memory module slots, that includes: determining, during a boot... Agent: Ibm (rps-blf) C/o Biggers & Ohanian, LLP
20090254733 - Dynamically controlling a prefetching range of a software controlled cache: Dynamically controlling a prefetching range of a software controlled cache is provided. A compiler analyzes source code to identify at least one of a plurality of loops that contain irregular memory references. For each irregular memory reference in the source code, the compiler determines whether the irregular memory reference is... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.10/01/2009 > patent applications in patent subcategories. categorized by USPTO classification
20090248951 - Maintaining processor resources during architectural events: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In... Agent: Trop, Pruner & Hu, P.c.
20090248949 - System and method for increased system availability in virtualized environments: A method is provided for managing errors in a virtualized information handling system that includes an error detection system and a hypervisor allowing multiple virtual machines to run on the information handling system. The hypervisor may assign at least one memory region to each of multiple virtual machines. The error... Agent: Baker Botts, LLP
20090248950 - User data protection method in server apparatus, server apparatus and computer program: A user data protection method in which a management server includes an address replacement table having correspondence relation of memory addresses of a memory assigned to a virtual server and memory addresses of a memory assigned to a virtualization mechanism which is different from that at usual time, comprising the... Agent: Mattingly & Malur, P.c.
20090248952 - Data conditioning to improve flash memory reliability: Methods and apparatus for managing data storage in memory devices utilizing memory arrays of varying density memory cells. Data can be initially stored in lower density memory. Data can be further read, compacted, conditioned and written to higher density memory as background operations. Methods of data conditioning to improve data... Agent: Leffert Jay & Polglaze, P.a.
20090248953 - Storage system: When sub-storage systems 20A, 20B are connected to each other, a storage system 100 is managed in such a manner that the sub-storage systems 20A and 20B are connected to each other via a connection cable 44 to constitute modules 20A and 20B respectively, pieces of coupling control information of... Agent: Brundidge & Stanger, P.c.
20090248954 - Storage system: Provided is a storage system capable of holding data by associating main data for long-term retention with sub data for maintaining its readability. The storage system: stores first data in a first location within a storage area upon reception of a storage request for the first data with a first... Agent: Juan Carlos A. Marquez C/o Stites & Harbison Pllc
20090248955 - Redundancy for code in rom: A memory device capable of replacing code in read-only memory (ROM) by using a ROM redundancy register is disclosed. The memory device includes a controller that accesses code in ROM by use of a ROM address. The memory device further includes a ROM redundancy register capable of storing one or... Agent: Cool Patent, P.c. C/o Cpa Global
20090248956 - Apparatus for storing management information in a computer system: An apparatus for providing management storage via a USB port of a computer system is disclosed. The apparatus includes a flash memory, a first and second switches, a first and second inverters, a designated port, and a controller. Coupled to the flash memory, the first and second switches are controlled... Agent: Dillon & Yudell LLP
20090248966 - Flash drive with user upgradeable capacity via removable flash: An exemplary data storage device includes a fixed storage medium, an expansion socket configured to selectively receive at least one removable memory card, and a controller configured to interface the fixed storage medium and the at least one removable memory card with a host device. An exemplary method includes verifying... Agent: Rader, Fishman & Grauer Pllc
20090248959 - Flash memory and operating system kernel: A memory system is provided. The system includes an operating system kernel that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the kernel to regulate read and write access to the... Agent: Turocy & Watson, LLP
20090248958 - Flash memory usability enhancements in main memory application: A memory system is provided. The system includes an operating system kernel that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the kernel to regulate read and write access to the... Agent: Turocy & Watson, LLP
20090248965 - Hybrid flash memory device and method of controlling the same: A hybrid flash memory device and a control method of the hybrid flash memory device are provided. The hybrid flash memory device includes a micro controller connected to a host bus for receiving data to be written in the hybrid flash memory device from a host via the host bus;... Agent: Kirton And Mcconkie
20090248963 - Memory controller and memory system including the same: A memory system includes a memory system includes a nonvolatile memory including a memory space which is formatted from outside by an additional-write type file system, and a memory controller controlling the nonvolatile memory, the memory controller transmitting a write protect error when the memory controller is instructed to write... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.
20090248961 - Memory management method and controller for non-volatile memory storage device: A memory management method and a controller for a non-volatile memory storage device are provided. The memor management method and the controller are adapted for establishing a logical-to-physical mapping table of each block in a memory buffer of the controller by merely reading the data stored in a system management... Agent: J C Patents, Inc.
20090248957 - Memory resource management for a flash aware kernel: A memory system is provided. The system includes an operating system kernel that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the kernel to regulate read and write access to the... Agent: Turocy & Watson, LLP
20090248964 - Memory system and method for controlling a nonvolatile semiconductor memory: A memory system includes a nonvolatile semiconductor memory having blocks, the block being data erasing unit; and a controller configured to execute; an update processing for; writing superseding data in a block, the superseding data being treated as valid data; and invalidating superseded data having the same logical address as... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.
20090248962 - Memory system and wear leveling method thereof: A memory system includes a variable resistance memory configured to input and output data by a first unit and a translation layer for managing the degree of wear of the variable resistance memory by a second unit, different from the first unit.... Agent: Staas & Halsey LLP
20090248960 - Methods and systems for creating and using virtual flash cards: Creating and using virtual flash cards is disclosed. A disclosed method includes receiving an input of sets of flash data into a portable handheld device, associating related sets of the flash data based on manual inputs that define the relationship between the related sets of flash data, presenting one of... Agent: Murabito, Hao & Barnes, LLP
20090248967 - Portable alarm configuration/update tool: A stand-alone portable alarm update tool includes a memory interface for receiving a computer readable memory; a serial port for interconnection to a security alarm panel, by way of a complementary port; a processor; and processor readable memory in communication with the processor, storing software adapting the processor to upload... Agent: Tyco International Ltd
20090248968 - Reduction of latency in store and forward architectures utilizing multiple internal bus protocols: Disclosed is a store and forward device that reduces latency. The store and forward device allows front end devices having various transfer protocols to be connected in a single path through a RAM, while reducing latency. Front end devices that transfer data on a piecemeal basis are required to transfer... Agent: Cochran Freund & Young Llc Lsi Corporation
20090248970 - Dual edge command: A technique to increase transfer rate of command and address signals via a given number of command and address pins in each of one or more integrated circuit memory devices during a clock cycle of a clock signal. In one example embodiment, the command and address signals are sent on... Agent: Schwegman, Lundberg & Woessner/micron
20090248969 - Registered dimm memory system: A Registered DIMM (RDIMM) system with reduced electrical loading on the data bus for increases memory capacity and operation frequency. In one embodiment, the data bus is buffered on the DIMM. In another embodiment, the data bus is selectively coupled to a group of memory chips via switches.... Agent: Ivy Y. Mei
20090248971 - System and dynamic random access memory device having a receiver: A dynamic random access memory device (DRAM) receiver circuit includes an input to receive a data signal, and also includes decision circuitry to make a decision about the received data signal based on a present sampled data signal and a coefficient value corresponding to at least one of a previously... Agent: Morgan Lewis & Bockius LLP/rambus Inc.
20090248972 - Dynamic memory supporting simultaneous refresh and data-access transactions: Described are dynamic memory systems that perform overlapping refresh and data-access (read or write) transactions that minimize the impact of the refresh transaction on memory performance. The memory systems support independent and simultaneous activate and precharge operations directed to different banks. Two sets of address registers enable the system to... Agent: Arthur J. Behiel
20090248973 - System and method for providing address decode and virtual function (vf) migration support in a peripheral component interconnect express (pcie) multi-root input/output virtualization (iov) environment: The present invention is a method for providing address decode and Virtual Function (VF) migration support in a Peripheral Component Interconnect Express (PCIE) multi-root Input/Output Virtualization (IOV) environment. The method may include receiving a Transaction Layer Packet (TLP) from the PCIE multi-root IOV environment. The method may further include comparing... Agent: Lsi Corporation
20090248974 - Optimizing operational requests of logical volumes: A method, system, apparatus and computer program product for determining an optimal file operational time in a data storage system for use with a tape media storing data in a serpentine pattern on tape media is provided. The operational time is optimized based on a “sequence on tape” algorithm, a... Agent: Hamilton & Terrile, LLP Ibm Tucson
20090248975 - Systems and methods for managing stalled storage devices: Embodiments relate to systems and methods for managing stalled storage devices of a storage system. In one embodiment, a method for managing access to storage devices includes determining that a first storage device, which stores a first resource, is stalled and transitioning the first storage device to a stalled state.... Agent: Knobbe Martens Olson & Bear LLP
20090248976 - Multi-core memory thermal throttling algorithms for improving power/performance tradeoffs: Embodiments of the invention are generally directed to systems, methods, and apparatuses for improving power/performance tradeoffs associated with multi-core memory thermal throttling algorithms. In some embodiments, the priority of shared resource allocation is changed on one or more points in a system, while the system is in dynamic random access... Agent: Philip A. Pedigo Intel Corporation
20090248977 - Virtual tape apparatus, virtual tape library system, and method for controlling power supply: A virtual tape apparatus, which can switch a power supply state to a tape apparatus to thereby suppress power consumption, has an access instruction unit and a power supply control unit. The access instruction unit determines whether or not it is necessary to supply power to a tape apparatus in... Agent: Staas & Halsey LLP
20090248979 - Storage apparatus and control method for same: The storage apparatus includes an external logical unit as a target of a plurality of host apparatuses, and an internal logical unit assigned to the external logical unit. The internal logical unit includes a common logical unit having common files commonly used by the plurality of host apparatuses, and an... Agent: Juan Carlos A. Marquez C/o Stites & Harbison Pllc
20090248980 - Storage system and capacity allocation method therefor: A storage system connected to a terminal, the computer system includes: a plurality of drive devices that respectively drive a plurality of physical disks each having a physical storage area; a RAID configuration unit that configures a plurality of RAID groups by grouping two or more of the plurality of... Agent: Townsend And Townsend And Crew, LLP
20090248978 - Usb data striping: A striping system and method for distributing a payload of data across a plurality of parallel USB cables from a source to a destination is described. The striping devices reside in the architecture of a source and destination connected by more than one standardized USB bus cable. The striping devices... Agent: Kirton & Mcconkie Attorneys At Law
20090248981 - Semiconductor storage device: Provided is a semiconductor storage device having a first interface section meeting a USB standard for connection to host equipment, a NAND memory section that is a first semiconductor memory section, a second interface section to which small memory cards can be connected, each small memory card having a second... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.
20090248982 - Cache control apparatus, information processing apparatus, and cache control method: A cache control apparatus determines whether to adopt or not data acquired by a speculative fetch by monitoring a status of the speculative fetch which is a memory fetch request output before it becomes clear whether data requested by a CPU is stored in a cache of the CPU and... Agent: Staas & Halsey LLP
20090248984 - Method and device for performing copy-on-write in a processor: There are disclosed a method and device for performing Copy-on-Write in a processor. The processor comprises: processor cores, L1 caches each of which is logically divided into a first L1 cache and a second L1 cache, and L2 caches. The first L1 cache is used for saving new data value,... Agent: Ibm Corporation (swp)
20090248983 - Technique to share information among different cache coherency domains: A technique to enable information sharing among agents within different cache coherency domains. In one embodiment, a graphics device may use one or more caches used by one or more processing cores to store or read information, which may be accessed by one or more processing cores in a manner... Agent: Intel Corporation C/o Cpa Global
20090248985 - Data transfer optimized software cache for regular memory references: Mechanisms are provided for optimizing regular memory references in computer code. These mechanisms may parse the computer code to identify memory references in the computer code. These mechanisms may further classify the memory references in the computer code as either regular memory references or irregular memory references. Moreover, the mechanisms... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.c.
20090248986 - Apparatus for and method of implementing multiple content based data caches: A novel and useful mechanism enabling the partitioning of a normally shared L1 data cache into several different independent caches, wherein each cache is dedicated to a specific data type. To further optimize performance each individual L1 data cache is placed in relative close physical proximity to its associated register... Agent: Ibm Corporation, T.j. Watson Research Center
20090248987 - Memory system and data storing method thereof: A memory system includes a memory device having a cache area and a main area, and a memory controller configured to control the memory device, wherein the memory controller is configured to dump file data into the cache area in response to a flush cache command.... Agent: F. Chau & Associates, Llc
20090248988 - Mechanism for maintaining consistency of data written by io devices: A multi-core microprocessor includes, in part, a cache coherence manager that maintains coherence among the multitude of microprocessor cores, and an I/O coherence unit that maintains coherent traffic between the I/O devices and the multitude of processing cores of the microprocessor. The I/O coherence unit stalls non-coherent I/O write requests... Agent: Townsend And Townsend And Crew LLP/mips
20090248989 - Multiprocessor computer system with reduced directory requirement: The invention has application in implementation of large Symmetric Multiprocessor Systems with a large number of nodes which include processing elements and associated cache memories. The illustrated embodiment of the invention provides for interconnection of a large number of multiprocessor nodes while reducing over the prior art the size of... Agent: Bull Information Systems Inc.
20090248990 - Partition-free multi-socket memory system architecture: A technique to increase memory bandwidth for throughput applications. In one embodiment, memory bandwidth can be increased, particularly for throughput applications, without increasing interconnect trace or pin count by pipelining pages between one or more memory storage areas on half cycles of a memory access clock.... Agent: Intel Corporation C/o Cpa Global
20090248991 - Termination of prefetch requests in shared memory controller: A real request from a CPU to the same memory bank as a prior prefetch request is transmitted to the per-memory bank logic along with a kill signal to terminate the prefetch request. This avoids waiting for a prefetch request to complete before sending the real request to the same... Agent: Texas Instruments Incorporated
20090248992 - Upgrade of low priority prefetch requests to high priority real requests in shared memory controller: A prefetch controller implements an upgrade when a real read access request hits the same memory bank and memory address as a previous prefetch request. In response per-memory bank logic promotes the priority of the prefetch request to that of a read request. If the prefetch request is still waiting... Agent: Texas Instruments Incorporated
20090248993 - Multiport memory and information processing system: In an information processing system, a plurality of information processing devices CHIP0 and CHIP1 are connected to multiport memory MPMEM0 that has a plurality of ports, and memory areas in multiport memory MPMEM0 can be altered to memory areas occupied by particular ports and memory areas shared by a plurality... Agent: Sughrue Mion, Pllc
20090248994 - Memory rank burst scheduling: A method, device, and system are disclosed. In one embodiment the method includes grouping multiple memory requests into multiple of memory rank queues. Each rank queue contains the memory requests that target addresses within the corresponding memory rank. The method also schedules a minimum burst number of memory requests within... Agent: Intel Corporation C/o Cpa Global
20090248995 - Allocation control apparatus and method thereof: An allocation control apparatus may access an address table storing addresses of slice areas allocated in a storage area for an entire storage system having a plurality of storage devices and addresses that do not correspond to allocated slice areas. The allocation control apparatus includes a reception unit receiving a... Agent: Greer, Burns & Crain
20090248996 - Apparatus and methods for widget-related memory management: Apparatus and methods for changing operational modes of a widget and changing content feed to a widget based on operational mode changes and/or memory availability on the wireless device are provided. Apparatus and methods for managing the runtime memory usage of mobile widgets on a wireless device by changing widget... Agent: Qualcomm Incorporated
20090248997 - De-interleaving using minimal memory: A de-interleaver for receiving data blocks including data units in an interleaved order, each data unit having a de-interleaved location within the data block, placing the data units in a memory buffer, and outputting the data units in a de-interleaved order from the memory buffer, the de-interleaver including an output... Agent: Martin D. Moynihan D/b/a Prtsi, Inc.
20090248998 - Storage system, control unit, image forming apparatus, image forming method, and computer readable medium: A storage system includes: N pieces of storages that stores electronic information, N being an integral number that is two or more; and a controller that obtains electronic information to be written, wherein the controller, in a case where the electronic information to be written is a first kind of... Agent: Sughrue-265550
20090248999 - Memory control apparatus, memory control method and information processing system: A memory control apparatus, a memory control method and an information processing system are disclosed. Fetch response data retrieved from a main storage unit is received, while bypassing a storage unit, by a first port in which the received fetch response data can be set. The fetch response data retrieved... Agent: Fujitsu Patent Center C/o Cpa Global
20090249000 - Method and system for error correction of a storage media: A data file on a storage media is processed during playback or execution to identify unreadable data. Replacement data corresponding to the unreadable data is obtained over a communications network, and the replacement data is used to playback or execute the data file as if the data file does not... Agent: Lerner, David, Littenberg, Krumholz & Mentlik
20090249002 - Information collection apparatus, method, and program: An information collection apparatus which collects, from a plurality of devices each having a plurality of states including a power-supply state indicating ON or OFF of a power-supply, state information indicating a state of each device, the apparatus (a) stores, in a first memory, the power-supply state of each device,... Agent: Charles N.j. Ruggiero, Esq. Ohlandt, Greeley, Ruggiero & Perle, L.l.p.
20090249001 - Storage systems using write off-loading: Improved storage systems which use write off-loading are described. When a request to store some data in a particular storage location is received, if the particular storage location is unavailable, the data is stored in an alternative location. In an embodiment, the particular storage location may be unavailable because it... Agent: Lee & Hayes, Pllc
20090249010 - Apparatus and method for controlling copying: Pre-update data is copied from a first storage device onto a second storage device in response to an update instruction to update data on the backup target volume on the first storage device. A copy status of each data on the backup target volume is managed with position information of... Agent: Staas & Halsey LLP
20090249004 - Data caching for distributed execution computing: Embodiments for caching and accessing Directed Acyclic Graph (DAG) data to and from a computing device of a DAG distributed execution engine during the processing of an iterative algorithm. In accordance with one embodiment, a method includes processing a first subgraph of the plurality of subgraphs from the distributed storage... Agent: Lee & Hayes, Pllc
20090249011 - Delivery data backup apparatus, delivery data backup method and delivery data backup program: A delivery data backup apparatus, a delivery data backup method, and delivery data backup program are provided. The apparatus includes a delivery data receiving part receiving, from a data delivery server, delivery data transmitted from the data delivery server to a terminal device in response to a download request for... Agent: Staas & Halsey LLP
20090249008 - Disk array device: In control of the disk array device (backup system), when a blackout occurs, the disk array device is first operated in a first method to backed up a main memory by using a power supply from a battery. During the first method, a blackout continuous time and the like are... Agent: Juan Carlos A. Marquez C/o Stites & Harbison Pllc
20090249007 - Method and system for accessing data using an asymmetric cache device: A system configured to receive a first request for a first datum, query the cache metadata to determine whether the first datum is present in the main memory or the asymmetric cache device (ACD), retrieve the first datum from the main memory when the first datum is present in the... Agent: Osha Liang L.l.p./sun
20090249003 - Method and system for multiplexing concatenated storage disk arrays to form a rules-based array of disks: A method, system and computer-readable medium are disclosed for efficiently multiplexing concatenated storage devices. An intelligent storage controller continuously monitors data access of a number of concatenated storage devices. In response to a request to write new data, the controller writes a primary data copy to the concatenated storage device... Agent: International Business Machines Corporation
20090249009 - Method for copying data from an external storage device to a computer, and computer capable of performing the method: In a method for copying data from an external storage device to a computer, the computer is provided with a basic input/output system (BIOS) program used for performing the method. The method includes the steps of: (a) after the computer is powered on, initializing the external storage device in response... Agent: Sheppard, Mullin, Richter & Hampton LLP
20090249005 - System and method for providing a backup/restore interface for third party hsm clients: A method for performing a backup of a stub object located on a file system managed by a hierarchical storage manager configured to migrate data objects from the file system to a migration storage pool is provided. The stub object includes information for recalling a migrated data object. The method... Agent: Cantor Colburn LLP - Ibm Tuscon Division
20090249006 - System and method for setting an activation state for a device used in a backup operation: Various embodiments of a system and method for performing a backup operation are disclosed. Backup operation information may be stored, where the backup operation information specifies a backup operation to be performed using at least a first device. Subsequent to storing the backup operation information, state information for the first... Agent: Meyertons, Hood, Kivlin, Kowert, Goetzel/symantec
20090249012 - System managing a plurality of virtual volumes and a virtual volume management method for the system: This invention provides a control technique of a data processing system, in which functions of a highly-functional high-performance storage system are achieved in an inexpensive storage system so as to effectively use the existing system and reduce the cost of its entire system. This system has a RAID system, an... Agent: Mattingly & Malur, P.c.
20090249013 - Systems and methods for managing stalled storage devices: Embodiments relate to systems and methods for managing stalled storage devices of a storage system. In one embodiment, a method for managing access to storage devices includes determining that a first storage device, which stores a first resource, is stalled and transitioning the first storage device to a stalled state.... Agent: Knobbe Martens Olson & Bear LLP
20090249014 - Secure management of memory regions in a memory: Systems and/or methods that facilitate controlling access to memory regions in a memory component(s) are presented. A memory component can comprise an access management component that can facilitate controlling access to memory regions that can be respectively associated with authentication credentials. The access control component can facilitate access of a... Agent: Turocy & Watson, LLP
20090249015 - Operating system based dram / flash management scheme: A memory system is provided. The system includes an operating system kernel that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the kernel to regulate read and write access to the... Agent: Turocy & Watson, LLP
20090249016 - Apparatus and method to establish a logical configuration for a data storage library: A method to configure a storage library, comprising the steps of establishing a logical configuration for said storage library comprising a plurality of physical objects, by configuring a plurality of logical objects using a plurality of logical configuration commands, and adding that plurality of logical objects to the logical configuration.... Agent: Dale F. Regelman Quarles & Brady, LLP
20090249018 - Storage management method, storage management program, storage management apparatus, and storage management system: A storage management method for allocating a dynamic allocation pool so as to avoid throughput reduction. An operation management server determines the dynamic allocation pool managing allocation of a real volume in a storage device to a virtual volume. The operation management server acquires an I/O characteristic of an application... Agent: Antonelli, Terry, Stout & Kraus, LLP
20090249017 - Systems and methods for memory management for rasterization: Methods for managing a single memory pool comprising frame buffer memory and display list memory are presented. The single memory pool can comprise sub-pools including: a super-block pool comprising a plurality of super-block objects; a node pool comprising a plurality of node objects; and a block-pool comprising a plurality of... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20090249019 - Method of allocating physical memory in specified address range under linux system platform: A method of allocating a physical memory in a specified address range under a Linux system platform is applied in a testing process of a physical memory under a Linux operating system. In this method, according to a specified address range and a size of a memory to be allocated,... Agent: Workman Nydegger 1000 Eagle Gate Tower
20090249020 - Techniques for optimizing configuration partitioning: Techniques for optimizing configuration partitioning are disclosed. In one particular exemplary embodiment, the techniques may be realized as a system for configuration partitioning comprising a module for providing one or more policy managers, a module for providing one or more applications, the one or more applications assigned to one or... Agent: Hunton & Williams LLP / Symantec Corporation Intellectual Property Dept.
20090249021 - Method and systems for invoking an advice operation associated with a joinpoint: Methods and systems are described for invoking an advice operation associated with a joinpoint. In one embodiment, the method includes identifying, based on a pointcut specification included in an aspect specification, a joinpoint in a machine code program component. The joinpoint includes a machine code instruction. The method further includes... Agent: Scenera Research, Llc
20090249022 - Method for achieving sequential i/o performance from a random workload: Some embodiments of the present invention provide methods, computer media encoding instructions, and systems for receiving write requests directed to non-sequential logical block addresses and writing the write requests to sequential disk block addresses in a storage system. Some embodiments further include overprovisioning a storage system to include an increment... Agent: Dorsey & Whitney LLP Us Bank Center
20090249023 - Applying various hash methods used in conjunction with a query with a group by clause: A novel method is described for applying various hash methods used in conjunction with a query with a Group By clause. A plurality of drawers are identified, wherein each of the drawers is made up of a collection of cells from a single partition of a Group By column and... Agent: Ip Authority, Llc Ramraj Soundararajan
20090249024 - Address generation for quadratic permutation polynomial interleaving: For address generation, a block size and a skip value are obtained, and at least one address, at least one increment value, and a step value are initialized. For a count index not in excess of a block size, iteratively performed are: selection of an output address for output from... Agent: Xilinx, Inc Attn: Legal DepartmentPrevious industry: Electrical computers and digital data processing systems: input/output
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