Electrical computers and digital processing systems: memory inventions 10/09

20090248951 - Maintaining processor resources during architectural events: In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In... Agent: Trop, Pruner & Hu, P.c.

20090248949 - System and method for increased system availability in virtualized environments: A method is provided for managing errors in a virtualized information handling system that includes an error detection system and a hypervisor allowing multiple virtual machines to run on the information handling system. The hypervisor may assign at least one memory region to each of multiple virtual machines. The error... Agent: Baker Botts, LLP

20090248950 - User data protection method in server apparatus, server apparatus and computer program: A user data protection method in which a management server includes an address replacement table having correspondence relation of memory addresses of a memory assigned to a virtual server and memory addresses of a memory assigned to a virtualization mechanism which is different from that at usual time, comprising the... Agent: Mattingly & Malur, P.c.

20090248952 - Data conditioning to improve flash memory reliability: Methods and apparatus for managing data storage in memory devices utilizing memory arrays of varying density memory cells. Data can be initially stored in lower density memory. Data can be further read, compacted, conditioned and written to higher density memory as background operations. Methods of data conditioning to improve data... Agent: Leffert Jay & Polglaze, P.a.

20090248953 - Storage system: When sub-storage systems 20A, 20B are connected to each other, a storage system 100 is managed in such a manner that the sub-storage systems 20A and 20B are connected to each other via a connection cable 44 to constitute modules 20A and 20B respectively, pieces of coupling control information of... Agent: Brundidge & Stanger, P.c.

20090248954 - Storage system: Provided is a storage system capable of holding data by associating main data for long-term retention with sub data for maintaining its readability. The storage system: stores first data in a first location within a storage area upon reception of a storage request for the first data with a first... Agent: Juan Carlos A. Marquez C/o Stites & Harbison Pllc

20090248955 - Redundancy for code in rom: A memory device capable of replacing code in read-only memory (ROM) by using a ROM redundancy register is disclosed. The memory device includes a controller that accesses code in ROM by use of a ROM address. The memory device further includes a ROM redundancy register capable of storing one or... Agent: Cool Patent, P.c. C/o Cpa Global

20090248956 - Apparatus for storing management information in a computer system: An apparatus for providing management storage via a USB port of a computer system is disclosed. The apparatus includes a flash memory, a first and second switches, a first and second inverters, a designated port, and a controller. Coupled to the flash memory, the first and second switches are controlled... Agent: Dillon & Yudell LLP

20090248966 - Flash drive with user upgradeable capacity via removable flash: An exemplary data storage device includes a fixed storage medium, an expansion socket configured to selectively receive at least one removable memory card, and a controller configured to interface the fixed storage medium and the at least one removable memory card with a host device. An exemplary method includes verifying... Agent: Rader, Fishman & Grauer Pllc

20090248959 - Flash memory and operating system kernel: A memory system is provided. The system includes an operating system kernel that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the kernel to regulate read and write access to the... Agent: Turocy & Watson, LLP

20090248958 - Flash memory usability enhancements in main memory application: A memory system is provided. The system includes an operating system kernel that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the kernel to regulate read and write access to the... Agent: Turocy & Watson, LLP

20090248965 - Hybrid flash memory device and method of controlling the same: A hybrid flash memory device and a control method of the hybrid flash memory device are provided. The hybrid flash memory device includes a micro controller connected to a host bus for receiving data to be written in the hybrid flash memory device from a host via the host bus;... Agent: Kirton And Mcconkie

20090248963 - Memory controller and memory system including the same: A memory system includes a memory system includes a nonvolatile memory including a memory space which is formatted from outside by an additional-write type file system, and a memory controller controlling the nonvolatile memory, the memory controller transmitting a write protect error when the memory controller is instructed to write... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.

20090248961 - Memory management method and controller for non-volatile memory storage device: A memory management method and a controller for a non-volatile memory storage device are provided. The memor management method and the controller are adapted for establishing a logical-to-physical mapping table of each block in a memory buffer of the controller by merely reading the data stored in a system management... Agent: J C Patents, Inc.

20090248957 - Memory resource management for a flash aware kernel: A memory system is provided. The system includes an operating system kernel that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the kernel to regulate read and write access to the... Agent: Turocy & Watson, LLP

20090248964 - Memory system and method for controlling a nonvolatile semiconductor memory: A memory system includes a nonvolatile semiconductor memory having blocks, the block being data erasing unit; and a controller configured to execute; an update processing for; writing superseding data in a block, the superseding data being treated as valid data; and invalidating superseded data having the same logical address as... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.

20090248962 - Memory system and wear leveling method thereof: A memory system includes a variable resistance memory configured to input and output data by a first unit and a translation layer for managing the degree of wear of the variable resistance memory by a second unit, different from the first unit.... Agent: Staas & Halsey LLP

20090248960 - Methods and systems for creating and using virtual flash cards: Creating and using virtual flash cards is disclosed. A disclosed method includes receiving an input of sets of flash data into a portable handheld device, associating related sets of the flash data based on manual inputs that define the relationship between the related sets of flash data, presenting one of... Agent: Murabito, Hao & Barnes, LLP

20090248967 - Portable alarm configuration/update tool: A stand-alone portable alarm update tool includes a memory interface for receiving a computer readable memory; a serial port for interconnection to a security alarm panel, by way of a complementary port; a processor; and processor readable memory in communication with the processor, storing software adapting the processor to upload... Agent: Tyco International Ltd

20090248968 - Reduction of latency in store and forward architectures utilizing multiple internal bus protocols: Disclosed is a store and forward device that reduces latency. The store and forward device allows front end devices having various transfer protocols to be connected in a single path through a RAM, while reducing latency. Front end devices that transfer data on a piecemeal basis are required to transfer... Agent: Cochran Freund & Young Llc Lsi Corporation

20090248970 - Dual edge command: A technique to increase transfer rate of command and address signals via a given number of command and address pins in each of one or more integrated circuit memory devices during a clock cycle of a clock signal. In one example embodiment, the command and address signals are sent on... Agent: Schwegman, Lundberg & Woessner/micron

20090248969 - Registered dimm memory system: A Registered DIMM (RDIMM) system with reduced electrical loading on the data bus for increases memory capacity and operation frequency. In one embodiment, the data bus is buffered on the DIMM. In another embodiment, the data bus is selectively coupled to a group of memory chips via switches.... Agent: Ivy Y. Mei

20090248971 - System and dynamic random access memory device having a receiver: A dynamic random access memory device (DRAM) receiver circuit includes an input to receive a data signal, and also includes decision circuitry to make a decision about the received data signal based on a present sampled data signal and a coefficient value corresponding to at least one of a previously... Agent: Morgan Lewis & Bockius LLP/rambus Inc.

20090248972 - Dynamic memory supporting simultaneous refresh and data-access transactions: Described are dynamic memory systems that perform overlapping refresh and data-access (read or write) transactions that minimize the impact of the refresh transaction on memory performance. The memory systems support independent and simultaneous activate and precharge operations directed to different banks. Two sets of address registers enable the system to... Agent: Arthur J. Behiel

20090248973 - System and method for providing address decode and virtual function (vf) migration support in a peripheral component interconnect express (pcie) multi-root input/output virtualization (iov) environment: The present invention is a method for providing address decode and Virtual Function (VF) migration support in a Peripheral Component Interconnect Express (PCIE) multi-root Input/Output Virtualization (IOV) environment. The method may include receiving a Transaction Layer Packet (TLP) from the PCIE multi-root IOV environment. The method may further include comparing... Agent: Lsi Corporation

20090248974 - Optimizing operational requests of logical volumes: A method, system, apparatus and computer program product for determining an optimal file operational time in a data storage system for use with a tape media storing data in a serpentine pattern on tape media is provided. The operational time is optimized based on a “sequence on tape” algorithm, a... Agent: Hamilton & Terrile, LLP Ibm Tucson

20090248975 - Systems and methods for managing stalled storage devices: Embodiments relate to systems and methods for managing stalled storage devices of a storage system. In one embodiment, a method for managing access to storage devices includes determining that a first storage device, which stores a first resource, is stalled and transitioning the first storage device to a stalled state.... Agent: Knobbe Martens Olson & Bear LLP

20090248976 - Multi-core memory thermal throttling algorithms for improving power/performance tradeoffs: Embodiments of the invention are generally directed to systems, methods, and apparatuses for improving power/performance tradeoffs associated with multi-core memory thermal throttling algorithms. In some embodiments, the priority of shared resource allocation is changed on one or more points in a system, while the system is in dynamic random access... Agent: Philip A. Pedigo Intel Corporation

20090248977 - Virtual tape apparatus, virtual tape library system, and method for controlling power supply: A virtual tape apparatus, which can switch a power supply state to a tape apparatus to thereby suppress power consumption, has an access instruction unit and a power supply control unit. The access instruction unit determines whether or not it is necessary to supply power to a tape apparatus in... Agent: Staas & Halsey LLP

20090248979 - Storage apparatus and control method for same: The storage apparatus includes an external logical unit as a target of a plurality of host apparatuses, and an internal logical unit assigned to the external logical unit. The internal logical unit includes a common logical unit having common files commonly used by the plurality of host apparatuses, and an... Agent: Juan Carlos A. Marquez C/o Stites & Harbison Pllc

20090248980 - Storage system and capacity allocation method therefor: A storage system connected to a terminal, the computer system includes: a plurality of drive devices that respectively drive a plurality of physical disks each having a physical storage area; a RAID configuration unit that configures a plurality of RAID groups by grouping two or more of the plurality of... Agent: Townsend And Townsend And Crew, LLP

20090248978 - Usb data striping: A striping system and method for distributing a payload of data across a plurality of parallel USB cables from a source to a destination is described. The striping devices reside in the architecture of a source and destination connected by more than one standardized USB bus cable. The striping devices... Agent: Kirton & Mcconkie Attorneys At Law

20090248981 - Semiconductor storage device: Provided is a semiconductor storage device having a first interface section meeting a USB standard for connection to host equipment, a NAND memory section that is a first semiconductor memory section, a second interface section to which small memory cards can be connected, each small memory card having a second... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.

20090248982 - Cache control apparatus, information processing apparatus, and cache control method: A cache control apparatus determines whether to adopt or not data acquired by a speculative fetch by monitoring a status of the speculative fetch which is a memory fetch request output before it becomes clear whether data requested by a CPU is stored in a cache of the CPU and... Agent: Staas & Halsey LLP

20090248984 - Method and device for performing copy-on-write in a processor: There are disclosed a method and device for performing Copy-on-Write in a processor. The processor comprises: processor cores, L1 caches each of which is logically divided into a first L1 cache and a second L1 cache, and L2 caches. The first L1 cache is used for saving new data value,... Agent: Ibm Corporation (swp)

20090248983 - Technique to share information among different cache coherency domains: A technique to enable information sharing among agents within different cache coherency domains. In one embodiment, a graphics device may use one or more caches used by one or more processing cores to store or read information, which may be accessed by one or more processing cores in a manner... Agent: Intel Corporation C/o Cpa Global

20090248985 - Data transfer optimized software cache for regular memory references: Mechanisms are provided for optimizing regular memory references in computer code. These mechanisms may parse the computer code to identify memory references in the computer code. These mechanisms may further classify the memory references in the computer code as either regular memory references or irregular memory references. Moreover, the mechanisms... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.c.

20090248986 - Apparatus for and method of implementing multiple content based data caches: A novel and useful mechanism enabling the partitioning of a normally shared L1 data cache into several different independent caches, wherein each cache is dedicated to a specific data type. To further optimize performance each individual L1 data cache is placed in relative close physical proximity to its associated register... Agent: Ibm Corporation, T.j. Watson Research Center

20090248987 - Memory system and data storing method thereof: A memory system includes a memory device having a cache area and a main area, and a memory controller configured to control the memory device, wherein the memory controller is configured to dump file data into the cache area in response to a flush cache command.... Agent: F. Chau & Associates, Llc

20090248988 - Mechanism for maintaining consistency of data written by io devices: A multi-core microprocessor includes, in part, a cache coherence manager that maintains coherence among the multitude of microprocessor cores, and an I/O coherence unit that maintains coherent traffic between the I/O devices and the multitude of processing cores of the microprocessor. The I/O coherence unit stalls non-coherent I/O write requests... Agent: Townsend And Townsend And Crew LLP/mips

20090248989 - Multiprocessor computer system with reduced directory requirement: The invention has application in implementation of large Symmetric Multiprocessor Systems with a large number of nodes which include processing elements and associated cache memories. The illustrated embodiment of the invention provides for interconnection of a large number of multiprocessor nodes while reducing over the prior art the size of... Agent: Bull Information Systems Inc.

20090248990 - Partition-free multi-socket memory system architecture: A technique to increase memory bandwidth for throughput applications. In one embodiment, memory bandwidth can be increased, particularly for throughput applications, without increasing interconnect trace or pin count by pipelining pages between one or more memory storage areas on half cycles of a memory access clock.... Agent: Intel Corporation C/o Cpa Global

20090248991 - Termination of prefetch requests in shared memory controller: A real request from a CPU to the same memory bank as a prior prefetch request is transmitted to the per-memory bank logic along with a kill signal to terminate the prefetch request. This avoids waiting for a prefetch request to complete before sending the real request to the same... Agent: Texas Instruments Incorporated

20090248992 - Upgrade of low priority prefetch requests to high priority real requests in shared memory controller: A prefetch controller implements an upgrade when a real read access request hits the same memory bank and memory address as a previous prefetch request. In response per-memory bank logic promotes the priority of the prefetch request to that of a read request. If the prefetch request is still waiting... Agent: Texas Instruments Incorporated

20090248993 - Multiport memory and information processing system: In an information processing system, a plurality of information processing devices CHIP0 and CHIP1 are connected to multiport memory MPMEM0 that has a plurality of ports, and memory areas in multiport memory MPMEM0 can be altered to memory areas occupied by particular ports and memory areas shared by a plurality... Agent: Sughrue Mion, Pllc

20090248994 - Memory rank burst scheduling: A method, device, and system are disclosed. In one embodiment the method includes grouping multiple memory requests into multiple of memory rank queues. Each rank queue contains the memory requests that target addresses within the corresponding memory rank. The method also schedules a minimum burst number of memory requests within... Agent: Intel Corporation C/o Cpa Global

20090248995 - Allocation control apparatus and method thereof: An allocation control apparatus may access an address table storing addresses of slice areas allocated in a storage area for an entire storage system having a plurality of storage devices and addresses that do not correspond to allocated slice areas. The allocation control apparatus includes a reception unit receiving a... Agent: Greer, Burns & Crain

20090248996 - Apparatus and methods for widget-related memory management: Apparatus and methods for changing operational modes of a widget and changing content feed to a widget based on operational mode changes and/or memory availability on the wireless device are provided. Apparatus and methods for managing the runtime memory usage of mobile widgets on a wireless device by changing widget... Agent: Qualcomm Incorporated

20090248997 - De-interleaving using minimal memory: A de-interleaver for receiving data blocks including data units in an interleaved order, each data unit having a de-interleaved location within the data block, placing the data units in a memory buffer, and outputting the data units in a de-interleaved order from the memory buffer, the de-interleaver including an output... Agent: Martin D. Moynihan D/b/a Prtsi, Inc.

20090248998 - Storage system, control unit, image forming apparatus, image forming method, and computer readable medium: A storage system includes: N pieces of storages that stores electronic information, N being an integral number that is two or more; and a controller that obtains electronic information to be written, wherein the controller, in a case where the electronic information to be written is a first kind of... Agent: Sughrue-265550

20090248999 - Memory control apparatus, memory control method and information processing system: A memory control apparatus, a memory control method and an information processing system are disclosed. Fetch response data retrieved from a main storage unit is received, while bypassing a storage unit, by a first port in which the received fetch response data can be set. The fetch response data retrieved... Agent: Fujitsu Patent Center C/o Cpa Global

20090249000 - Method and system for error correction of a storage media: A data file on a storage media is processed during playback or execution to identify unreadable data. Replacement data corresponding to the unreadable data is obtained over a communications network, and the replacement data is used to playback or execute the data file as if the data file does not... Agent: Lerner, David, Littenberg, Krumholz & Mentlik

20090249002 - Information collection apparatus, method, and program: An information collection apparatus which collects, from a plurality of devices each having a plurality of states including a power-supply state indicating ON or OFF of a power-supply, state information indicating a state of each device, the apparatus (a) stores, in a first memory, the power-supply state of each device,... Agent: Charles N.j. Ruggiero, Esq. Ohlandt, Greeley, Ruggiero & Perle, L.l.p.

20090249001 - Storage systems using write off-loading: Improved storage systems which use write off-loading are described. When a request to store some data in a particular storage location is received, if the particular storage location is unavailable, the data is stored in an alternative location. In an embodiment, the particular storage location may be unavailable because it... Agent: Lee & Hayes, Pllc

20090249010 - Apparatus and method for controlling copying: Pre-update data is copied from a first storage device onto a second storage device in response to an update instruction to update data on the backup target volume on the first storage device. A copy status of each data on the backup target volume is managed with position information of... Agent: Staas & Halsey LLP

20090249004 - Data caching for distributed execution computing: Embodiments for caching and accessing Directed Acyclic Graph (DAG) data to and from a computing device of a DAG distributed execution engine during the processing of an iterative algorithm. In accordance with one embodiment, a method includes processing a first subgraph of the plurality of subgraphs from the distributed storage... Agent: Lee & Hayes, Pllc

20090249011 - Delivery data backup apparatus, delivery data backup method and delivery data backup program: A delivery data backup apparatus, a delivery data backup method, and delivery data backup program are provided. The apparatus includes a delivery data receiving part receiving, from a data delivery server, delivery data transmitted from the data delivery server to a terminal device in response to a download request for... Agent: Staas & Halsey LLP

20090249008 - Disk array device: In control of the disk array device (backup system), when a blackout occurs, the disk array device is first operated in a first method to backed up a main memory by using a power supply from a battery. During the first method, a blackout continuous time and the like are... Agent: Juan Carlos A. Marquez C/o Stites & Harbison Pllc

20090249007 - Method and system for accessing data using an asymmetric cache device: A system configured to receive a first request for a first datum, query the cache metadata to determine whether the first datum is present in the main memory or the asymmetric cache device (ACD), retrieve the first datum from the main memory when the first datum is present in the... Agent: Osha Liang L.l.p./sun

20090249003 - Method and system for multiplexing concatenated storage disk arrays to form a rules-based array of disks: A method, system and computer-readable medium are disclosed for efficiently multiplexing concatenated storage devices. An intelligent storage controller continuously monitors data access of a number of concatenated storage devices. In response to a request to write new data, the controller writes a primary data copy to the concatenated storage device... Agent: International Business Machines Corporation

20090249009 - Method for copying data from an external storage device to a computer, and computer capable of performing the method: In a method for copying data from an external storage device to a computer, the computer is provided with a basic input/output system (BIOS) program used for performing the method. The method includes the steps of: (a) after the computer is powered on, initializing the external storage device in response... Agent: Sheppard, Mullin, Richter & Hampton LLP

20090249005 - System and method for providing a backup/restore interface for third party hsm clients: A method for performing a backup of a stub object located on a file system managed by a hierarchical storage manager configured to migrate data objects from the file system to a migration storage pool is provided. The stub object includes information for recalling a migrated data object. The method... Agent: Cantor Colburn LLP - Ibm Tuscon Division

20090249006 - System and method for setting an activation state for a device used in a backup operation: Various embodiments of a system and method for performing a backup operation are disclosed. Backup operation information may be stored, where the backup operation information specifies a backup operation to be performed using at least a first device. Subsequent to storing the backup operation information, state information for the first... Agent: Meyertons, Hood, Kivlin, Kowert, Goetzel/symantec

20090249012 - System managing a plurality of virtual volumes and a virtual volume management method for the system: This invention provides a control technique of a data processing system, in which functions of a highly-functional high-performance storage system are achieved in an inexpensive storage system so as to effectively use the existing system and reduce the cost of its entire system. This system has a RAID system, an... Agent: Mattingly & Malur, P.c.

20090249013 - Systems and methods for managing stalled storage devices: Embodiments relate to systems and methods for managing stalled storage devices of a storage system. In one embodiment, a method for managing access to storage devices includes determining that a first storage device, which stores a first resource, is stalled and transitioning the first storage device to a stalled state.... Agent: Knobbe Martens Olson & Bear LLP

20090249014 - Secure management of memory regions in a memory: Systems and/or methods that facilitate controlling access to memory regions in a memory component(s) are presented. A memory component can comprise an access management component that can facilitate controlling access to memory regions that can be respectively associated with authentication credentials. The access control component can facilitate access of a... Agent: Turocy & Watson, LLP

20090249015 - Operating system based dram / flash management scheme: A memory system is provided. The system includes an operating system kernel that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the kernel to regulate read and write access to the... Agent: Turocy & Watson, LLP

20090249016 - Apparatus and method to establish a logical configuration for a data storage library: A method to configure a storage library, comprising the steps of establishing a logical configuration for said storage library comprising a plurality of physical objects, by configuring a plurality of logical objects using a plurality of logical configuration commands, and adding that plurality of logical objects to the logical configuration.... Agent: Dale F. Regelman Quarles & Brady, LLP

20090249018 - Storage management method, storage management program, storage management apparatus, and storage management system: A storage management method for allocating a dynamic allocation pool so as to avoid throughput reduction. An operation management server determines the dynamic allocation pool managing allocation of a real volume in a storage device to a virtual volume. The operation management server acquires an I/O characteristic of an application... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090249017 - Systems and methods for memory management for rasterization: Methods for managing a single memory pool comprising frame buffer memory and display list memory are presented. The single memory pool can comprise sub-pools including: a super-block pool comprising a plurality of super-block objects; a node pool comprising a plurality of node objects; and a block-pool comprising a plurality of... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090249019 - Method of allocating physical memory in specified address range under linux system platform: A method of allocating a physical memory in a specified address range under a Linux system platform is applied in a testing process of a physical memory under a Linux operating system. In this method, according to a specified address range and a size of a memory to be allocated,... Agent: Workman Nydegger 1000 Eagle Gate Tower

20090249020 - Techniques for optimizing configuration partitioning: Techniques for optimizing configuration partitioning are disclosed. In one particular exemplary embodiment, the techniques may be realized as a system for configuration partitioning comprising a module for providing one or more policy managers, a module for providing one or more applications, the one or more applications assigned to one or... Agent: Hunton & Williams LLP / Symantec Corporation Intellectual Property Dept.

20090249021 - Method and systems for invoking an advice operation associated with a joinpoint: Methods and systems are described for invoking an advice operation associated with a joinpoint. In one embodiment, the method includes identifying, based on a pointcut specification included in an aspect specification, a joinpoint in a machine code program component. The joinpoint includes a machine code instruction. The method further includes... Agent: Scenera Research, Llc

20090249022 - Method for achieving sequential i/o performance from a random workload: Some embodiments of the present invention provide methods, computer media encoding instructions, and systems for receiving write requests directed to non-sequential logical block addresses and writing the write requests to sequential disk block addresses in a storage system. Some embodiments further include overprovisioning a storage system to include an increment... Agent: Dorsey & Whitney LLP Us Bank Center

20090249023 - Applying various hash methods used in conjunction with a query with a group by clause: A novel method is described for applying various hash methods used in conjunction with a query with a Group By clause. A plurality of drawers are identified, wherein each of the drawers is made up of a collection of cells from a single partition of a Group By column and... Agent: Ip Authority, Llc Ramraj Soundararajan

20090249024 - Address generation for quadratic permutation polynomial interleaving: For address generation, a block size and a skip value are obtained, and at least one address, at least one increment value, and a step value are initialized. For a count index not in excess of a block size, iteratively performed are: selection of an output address for output from... Agent: Xilinx, Inc Attn: Legal Department