Electrical computers and digital processing systems: memory inventions 09/09

20090240867 - Data processing system and storage area allocation method thereof: When creating a storage pool with external volumes, it is not possible to put together the volumes that have the same level of reliability if consideration is only given to the physical attributes of such volumes. Further, the reliability demanded between a host computer and a storage apparatus does not... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20090240868 - Management method, management apparatus, and controller for memory data access: A management method, a management apparatus, and a controller for memory data access are provided. The management apparatus is disposed between a host and a device for managing the data transmitted between the host and the device, wherein the management apparatus includes a control unit and a storage unit. When... Agent: J C Patents, Inc.

20090240872 - Memory device with multiple-accuracy read commands: A method for data storage includes defining at least first and second read commands for reading storage values from analog memory cells. The first read command reads the storage values at a first accuracy, and the second read command reads the storage values at a second accuracy, which is finer... Agent: D. Kligler I.p. Services Ltd

20090240871 - Memory system: A system includes: a first input buffer that functions as an input buffer for a third storing area; and a second input buffer that functions as an input buffer for the third storing area and that separately stores data with a high update frequency for the third storing area. In... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090240873 - Multi-level striping and truncation channel-equalization for flash-memory system: Truncation reduces the available striped data capacity of all flash channels to the capacity of the smallest flash channel. A solid-state disk (SSD) has a smart storage switch salvages flash storage removed from the striped data capacity by truncation. Extra storage beyond the striped data capacity is accessed as scattered... Agent: Stuart T Auvinen

20090240869 - Sharing data fabric for coherent-distributed caching of multi-node shared-distributed flash memory: A Sharing Data Fabric (SDF) causes flash memory attached to multiple compute nodes to appear to be a single large memory space that is global yet shared by many applications running on the many compute nodes. Flash objects stored in flash memory of a home node are copied to an... Agent: Stuart T Auvinen

20090240870 - Storage apparatus with a plurality of nonvolatile memory devices: According to one embodiment, a counter counts bits having a predetermined logical value contained in accessed data to be written or read in an access process of accessing any of the physical blocks provided in a selected one of the nonvolatile memory devices. A timer measures an access busy period... Agent: Knobbe Martens Olson & Bear LLP

20090240874 - Framework for user-level packet processing: A method of processing network packets can include allocating a first portion of a physical memory device to kernel-space control and allocating a second portion of the physical memory device to direct user-space process control. Network packets can be received from a computer network, and the received network packets can... Agent: Brake Hughes Bellermann LLP C/o Cpa Global

20090240875 - Content addressable memory with hidden table update, design structure and method: Disclosed are embodiments of memory circuit having two discrete memory devices with two discrete memory arrays that store essentially identical data banks. The first device is a conventional memory adapted to perform all maintenance operations that require read functions (i.e., all update and refresh operations). The second device is a... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20090240876 - Information processing apparatus, information processing method and storage system: Provided is an information processing apparatus including a local memory for storing a control program, a flash memory for storing a boot program, a processor for controlling the overall controller, a chipset for relaying the transfer of data among the respective components, and a logical control circuit arranged between the... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20090240877 - Virtual tape device and method for controlling the same: A virtual tape device in between a host and a library device is provided. The virtual tape device includes a physical tape volume and that stores data sent from the host on a logical tape volume includes, a receiver that receives a mount/unmount command and a job identifier relating to... Agent: Staas & Halsey LLP

20090240878 - Disk apparatus and advance data reading method: Upon receipt of a read command or a write command from an external device, a disk apparatus stores an obtained address as a primary address and a secondary address in an address storing unit, increments a counter value of the secondary address, and selects the secondary address of which the... Agent: Greer, Burns & Crain

20090240879 - Disk array system: A technique to distribute processing to meet a request from other system without partializing the processing to specific processor and can execute processing efficiently while adopting configuration to control one port unit by multiple processors at channel adapter of disk array system. CHA of a controller has a port unit... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20090240880 - High availability and low capacity thin provisioning: A data storage system and method for simultaneously providing thin provisioning and high availability. The system includes external storage volume and two storage subsystems coupled together and to external storage volume. Each of storage subsystems includes disk drives and a cache area, each of the storage subsystems includes at least... Agent: Sughrue Mion, PLLC

20090240882 - Method of extension of storage capacity and storage system using the method: Provided are a storage system and a method of controlling a storage system in which respective real storage areas of a plurality of disk drives contained in the storage system contain management units, and a control device of the storage system assigns a real storage area of a plurality of... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20090240883 - Storage apparatus and configuration setting method: This storage apparatus has a plurality of physical devices for storing data sent from a host system, and includes a physical device group setting unit for setting a physical device group from the plurality of physical devices based on a policy file which lists matters to be operated and set... Agent: Mattingly & Malur, P.C.

20090240881 - System and method for information handling system operation with different types of permanent storage devices: A storage controller, such as a RAID controller arbitrates storage tasks between a hard disk drive and a solid state drive based on predetermined factors, such as the type of information associated with a read or a write or the power available for running the storage devices. For example, a... Agent: Hamilton & Terrile, LLP

20090240885 - Memory card complying with a plurality of standards: A memory card includes a control device, a nonvolatile memory, and a program-storage memory, wherein the program-storage memory is arranged to store a plurality of control programs corresponding to respective standards for controlling data access between the nonvolatile memory and an external device.... Agent: Dickstein Shapiro LLP

20090240884 - Playback apparatus for multiple memory cards of the same type: A playback apparatus for multiple memory cards of the same type. The apparatus comprises of a plurality of memory card slots of the same type, a memory card selecting unit, a microprocessor unit and a multimedia processor. The microprocessor unit electronically connects to the memory card selecting unit, receiving a... Agent: Hdls Patent & Trademark Services

20090240886 - Plugin infrastructure for hierarchical temporal memory (htm) system: A system for implementing a hierarchical temporal memory (HTM) network using a plugin infrastructure. The plugin infrastructure registers the plugins to be used in instantiating the HTM network. The plugin may include one or more functions for creating one or more components of the HTM network in a runtime engine.... Agent: Fenwick & West LLP

20090240887 - Information processing unit, program, and instruction sequence generation method: An information processing unit includes at least one cache memory provided between an instruction execution section and a storage section and a control section controlling content of address information based on a result of comparison processing between an address requested by a hardware prefetch request issuing section for memory access... Agent: Staas & Halsey LLP

20090240888 - System and method for obscuring hand-held device data traffic information: Increasing security for a hand-held data processing device with communication functionality where such a device includes an access-ordered memory cache relating to communications carried out by the device. The hand-held data processing device has a locked state that is entered by the device receiving or initiating a trigger. On occurrence... Agent: Dimock Stratton LLP/research In Motion Limited

20090240889 - Method, system, and computer program product for cross-invalidation handling in a multi-level private cache: A method, system, and computer program product for cross-invalidation handling in a multi-level private cache are provided. The system includes a processor. The processor includes a fetch address register logic in communication with a level 1 data cache, a level 1 instruction cache, a level 2 cache, and a higher... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20090240890 - Program thread syncronization: A barrier for synchronizing program threads for a plurality of processors includes a filter configured to be coupled to a plurality of processors executing a plurality of threads to be synchronized. The filter is configured to monitor and selectively block fill requests for instruction cache lines. A method for synchronizing... Agent: Hewlett Packard Company

20090240891 - Method, system and computer program product for data buffers partitioned from a cache array: Systems, methods and computer program products for data buffers partitioned from a cache array. An exemplary embodiment includes a method in a processor and for providing data buffers partitioned from a cache array, the method including clearing cache directories associated with the processor to an initial state, obtaining a selected... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20090240893 - Information processing device, memory control method, and memory control device: The present invention provides an information processing device, a memory control method, and a memory control device. In the information processing device that includes nodes each having a main memory and a processor including a cache memory, the system controller of at least one of the nodes is designed to... Agent: Staas & Halsey LLP

20090240894 - Method and aparatus for the synchronization of distributed caches: A method and apparatus for the synchronization of distributed caches. More particularly, the present invention to cache memory systems and more particularly to a hierarchical caching protocol suitable for use with distributed caches, including use within a caching input/output (I/O) hub.... Agent: Kenyon & Kenyon LLP

20090240892 - Selective interconnect transaction control for cache coherency maintenance: A data processing system (10) includes a first master (14) and a second master (16 or 22). The first master includes a cache (28) and snoop queue circuitry (44, 52, 54) having a snoop request queue (44) which stores snoop requests. The snoop queue circuitry receives snoop requests for storage... Agent: Freescale Semiconductor, Inc. Law Department

20090240896 - Microprocessor coupled to multi-port memory: A microprocessor being coupled to a dual-port memory is disclosed. The microprocessor has two or more external memory controllers, being coupled to a system bus. Each of the external memory controllers can be individually coupled to an external memory through its respective port. With the present invention, a plurality of... Agent: Birch Stewart Kolasch & Birch

20090240897 - Multi-port memory and system using the same: A multi-port memory, comprising: a memory array made of a plurality of memory cells arranged at intersection points between a plurality of bit lines and a plurality of word lines, the memory array being divided into n (an integer of 2 or greater) memory banks; m (an integer of 2... Agent: Mcginn Intellectual Property Law Group, PLLC

20090240895 - Systems and methods for coalescing memory accesses of parallel threads: One embodiment of the present invention sets forth a technique for efficiently and flexibly performing coalesced memory accesses for a thread group. For each read application request that services a thread group, the core interface generates one pending request table (PRT) entry and one or more memory access requests. The... Agent: Patterson & Sheridan, L.L.P.

20090240899 - Storage device and method of controlling same: A storage device having a volume for storing data sent from a host computer and transferring the data stored in the volume to a sub storage device via a network, comprises: a retrieval unit for retrieving a snapshot retaining change data generated in the volume during a time period between... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20090240898 - Storage system and method of taking over logical unit in storage system: A storage apparatus includes a drive unit in which a logical unit is formed, and a controller unit for accessing the logical unit by controlling the drive unit according to an access request sent from a host apparatus. The storage apparatus issues a logical unit takeover request to the other... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090240901 - Information processing apparatus, storage control device and control method: A computer, which includes multiple memory modules each of which is provided with an SPD for storing setting information about the memory, a setting information acquisition section of an SPD controller of a memory controller, obtains setting information from the SPD of each memory module, and the setting information is... Agent: Fujitsu Patent Center C/o Cpa Global

20090240900 - Memory apparatus and memory control method: A memory includes a plurality of blocks that each include a plurality of memory cell arrays connected to divided bit lines, a first decoder that generates a block select signal for selecting any of the blocks based on an inputted address signal, read/write portions disposed for the respective blocks, each... Agent: Staas & Halsey LLP

20090240902 - Computer system and command execution frequency control method: A computer system of the present invention can adjust the execution frequencies of a command issued from a host and a command issued from a storage. An external manager disposed in the host configures a priority for a host command issued from a command issuing module inside the host. An... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20090240903 - Methods and apparatus for translating a system address: A method for translating a system address includes providing a first system address to a firmware and retrieving a first translation data corresponding to a memory configuration from storage. The first system address is translated into a first physical location utilizing the first translation data, and the first physical location... Agent: Andrea E. Tran Pramudji Wendt & Tran, LLP

20090240906 - Information processing apparatus, information processing method, and recording medium that records history information control program: A method and an apparatus include storing history information into a first storage section that accumulates history information concerning a process performed, transmitting a received acquisition request of the history information accumulated into the first storage section, transmitting the accumulated history information to the history information accumulation section having transmitted... Agent: Staas & Halsey LLP

20090240904 - Loose synchronization of virtual disks: Computer implemented methods, computer program products and computer systems synchronize copies of a virtual disk. A record of blocks that are modified during an access session of a copy of the virtual disk is maintained. For each partition of the virtual disk, a file system level indication of currently relevant... Agent: Vmware, Inc.

20090240905 - Real-time backup method for single storage medium: The present invention provides a real-time backup method for single storage medium which partitions a single storage medium into multiple logic units, and then the logic unit is designated as a backup logic unit or a normal storage logic unit, and the backup logic unit is partitioned into two or... Agent: Rosenberg, Klein & Lee

20090240907 - Remote storage access control system: An authorization method includes recognizing a request to access a data storage unit from a user, providing user identification and identifying information of the data storage unit, receiving a response from the authorization module, and passing the request to the data storage unit if the user is authorized to access... Agent: Rader, Fishman & Grauer PLLC

20090240908 - Filtering processor requests based on identifiers: Processing within a computing environment is facilitated by filtering requests of the computing environment. A processing unit that receives a request determines whether it is to perform the request. This determination is made by, for instance, comparing an identifier of the request with an identifier of the processing unit making... Agent: Heslin Rothenberg Farley & Mesiti P.C.

20090240909 - System and method for auditing memory: According to one embodiment of the invention, a method of auditing memory in a system comprises receiving a request for memory from an application and populating a memory tag with a stack depth component and a traceback stack component. The traceback stack component contains a pointer to a traceback stack.... Agent: Baker Botts LLP

20090240911 - Information processing apparatus and informaiton processing method: An information processing apparatus and an information processing method capable of assigning, to an application, a volume having a performance required by the application while simplifying administration are proposed. A performance and a capacity of each first storage area respectively provided by each storage device as well as a performance... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20090240910 - Storage system, volume allocation method and management apparatus: This storage system includes a virtual storage selection unit for selecting a virtual storage unit to be allocated to a virtual server unit according to a virtual storage search policy table for searching the virtual storage unit based on a parameter input by a user when a command is issued... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20090240912 - System and method for selectively storing and updating primary storage: A method and system is disclosed for selectively storing and updating data in primary storage. The primary storage may initially be evenly partitioned into a predetermined number of partitions. As a user selects a program, the partitions dedicated to programs not selected are reduced in size. As subsequent selections are... Agent: Apple Inc. C/o Fletcher Yoder, PC

20090240913 - Universal-hash-function-family calculation unit and shared-key generation system: An input data enlarging unit (100) derives a first enlargement unit output and a second enlargement unit output that are uniquely specified by input data (103) to output the same. The first enlargement unit output and the second enlargement unit output are elements of output data set B which forms... Agent: Scully Scott Murphy & Presser, PC

20090235010 - Data processing circuit, cache system, and data transfer apparatus: To include an address generating unit that generates a series of access destination addresses at a time of performing a burst access to the external memory, starting from an initial address to be accessed, so that number of inverted bits along with the address change becomes smallest, and a data... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090235011 - System and method for recovery of information stored on a corrupt storage device: A magnetic tape cartridge, such as a Linear Tape Open cartridge, stores parameters in a non-volatile memory, such as a Media Auxiliary Memory page of a Cartridge Memory, for use in reading and writing to a magnetic tape. A backup copy of the parameters is made in the non-volatile memory... Agent: Hamilton & Terrile, LLP

20090235017 - Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices: A memory storage system of an embodiment includes a nonvolatile memory unit and memory control circuitry coupled to the memory unit. Storage locations of the memory unit are organized into one or more sub-blocks configured to store sectors of information from a host. The sectors of information can be identified... Agent: Leffert Jay & Polglaze, P.A.

20090235013 - Mass storage device having both xip function and storage function: A mass storage device for mobile phone having both XIP function and storage function is disclosed. The mass storage device having both XIP function and storage function comprises a NAND flash memory divided into an XIP (execute-in-place) area for storing a program code and a storage area for storing a... Agent: Thomas M. Galgano

20090235015 - Memory system: A memory system includes a non-volatile memory constituted by blocks each of which is an erase unit constituted by pages each of which is a write/read unit constituted by memory cells; a random access memory temporarily storing data which is written in or read from the non-volatile memory; and a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090235016 - Memory system: A memory system includes a first storing area included in a volatile semiconductor memory, a second and a third storing area included in a nonvolatile semiconductor memory, a controller that allocates the storage area of the nonvolatile semiconductor memory to the second storing area and the third storing area in... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090235014 - Storage device and computing system: A computing system and a memory device are provided. The memory device includes a first memory having a first storage capacity, a second memory having a second storage capacity greater than the first storage capacity, and a controller to provide an external host with an address space corresponding to a... Agent: Mcneely Bodendorf LLP

20090235012 - Using lpddr1 bus as transport layer to communicate to flash: One embodiment of the present invention relates to a method for communicating NOR-type flash specific memory commands from a DRAM memory controller to a NOR-type flash memory array without disrupting DRAM operation. In this embodiment flash specific commands are channeled from the DRAM controller to the flash device by using... Agent: Eschweiler & Associates, LLC National City Bank Building

20090235018 - Increased magnetic damping for toggle mram: Magnetic random access memory (MRAM) devices and techniques for use thereof are provided. In one aspect, a magnetic memory cell is provided. The magnetic memory cell comprises at least one fixed magnetic layer; at least one first free magnetic layer separated from the fixed magnetic layer by at least one... Agent: Michael J. Chang, LLC

20090235019 - Securing safety-critical variables: A system comprises a general-purpose memory, a lockable memory, a memory management unit, and a processor. The general-purpose memory includes data for a first set of addresses. The lockable memory includes data for a second set of addresses. The memory management unit selectively writes data to one of the general-purpose... Agent: Harness Dickey & Pierce, P.L.C

20090235020 - Various methods and apparatus for address tiling: Various methods and apparatus are described for a memory scheduler. The memory scheduler couples to a target memory core that includes a bank of memories. The memory scheduler contains two or more configurable address tiling functions to transform an incoming address of data requested in a request to the target... Agent: Rutan & Tucker, LLP.

20090235021 - Efficiently synchronizing with separated disk caches: In a method of synchronizing with a separated disk cache, the separated cache is configured to transfer cache data to a staging area of a storage device. An atomic commit operation is utilized to instruct the storage device to atomically commit the cache data to a mapping scheme of the... Agent: Microsoft Corporation

20090235022 - Apparatus and method to select a deduplication protocol for a data storage library: A method to select a deduplication protocol for a data storage library comprising a plurality of data storage devices configured as a RAID array, by establishing a normal deduplication protocol, a RAID failure deduplication protocol, and a multiple storage device failure deduplication protocol. The method receives host data comprising a... Agent: Dale F. Regelman Quarles & Brady, LLP

20090235023 - Stripe caching and data read ahead: A method of improving a serial IO operation, where the serial IO operation includes at least one of a read operation of a data block and a write operation of a data block, and the serial IO operation is directed to a logical disk of a computerized data storage system.... Agent: Lng/lsi Joint Customer C/o Luedeka, Neely & Graham, P.C.

20090235024 - Volume providing system calling two processes executing the same program code and exchanging information between the two processes: A host computer HA1 or the like is provided with a target program 3 that receives the provision of logical volumes 212, a volume interface program 12A that provides an interface for the logical volumes 212 to the target program 3, and a volume filter program 12B that selects one... Agent: Townsend And Townsend And Crew, LLP

20090235025 - Memory card capable of reducing power consumption: A control section controls a nonvolatile memory. A plurality of data terminals, and a command terminal are connected to a host, and transfer and receive data and a command to and from the host. A buffer memory temporarily stores the data. The control section outputs a filled state of the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090235026 - Data transfer control device and data transfer control method: A disclosed data transfer control device includes a main memory unit; a cache memory unit; a command generation unit configured to generate a command to read out data from the main memory unit in accordance with a first address input to the command generation unit; and a storage unit configured... Agent: Cooper & Dunham, LLP

20090235027 - Cache memory system, data processing apparatus, and storage apparatus: A cache memory system includes a plurality of first storage hierarchical units provided individually to a plurality of processors. A second storage hierarchical unit is provided commonly to the plurality of processors. A control unit controls data transfer between the plurality of first storage hierarchical units and the second storage... Agent: Staas & Halsey LLP

20090235029 - Cache accessing using a micro tag: A data processing apparatus is disclosed that comprises: at least one data processor for processing data; a set associative cache for storing a plurality of values to be processed by said data processor, each value being identified by an address of a memory location within a memory storing said value,... Agent: Nixon & Vanderhye P.C.

20090235028 - Cache memory control method and cache memory control device: An object of the present invention is to reduce power consumption accompanying a cache hit/miss determination. To achieve this object, when accessing a cache memory provided with a means for setting whether a cache refill to each way in the cache memory is allowed for each CPU or each thread,... Agent: Dickinson Wright PLLC James E. Ledbetter, Esq.

20090235030 - Cache system including a plurality of processing units: A cache system includes processing units operative to access a main memory device, caches coupled in one-to-one correspondence to the processing units, and a controller coupled to the caches to control data transfer between the caches and data transfer between the main memory and the caches, wherein the controller includes... Agent: Staas & Halsey LLP

20090235032 - Method for achieving power savings by disabling a valid array: A method is described for use when a cache is accessed. Before all valid array entries are validated, a valid array entry is read when a data array entry is accessed. If the valid array entry is a first array value, access to the cache is treated as being invalid... Agent: Barnes & Thornburg LLP

20090235031 - Sharing resources within a robotic media library amongst a plurality of connected servers: The present invention provides an apparatus, method, and computer program product for sharing resources within a robotic media library having multiple media types and multiple device types amongst a plurality of connected servers.... Agent: James R. Nock IBM Corporation, Dept. 917

20090235033 - Computer architecture and method of operation for multi-computer distributed processing with replicated memory: The present invention discloses a modified computer architecture (50, 71, 72) which enables an applications program (50) to be run simultaneously on a plurality of computers (M1, . . . Mn). Shared memory at each computer is updated with amendments and/or overwrites so that all memory read requests are satisfied... Agent: Perkins Coie LLP

20090235034 - Computer architecture and method of operation for multi-computer distributed processing with synchronization: The present invention discloses a modified computer architecture (50, 71, 72) which enables an applications program (50) to be run simultaneously on a plurality of computers (M1, . . . Mn). Shared memory at each computer is updated with amendments and/or overwrites so that all memory read requests are satisfied... Agent: Perkins Coie LLP

20090235035 - Computer program instruction architecture, system and process using partial ordering for adaptive response to memory latencies: The present invention broadly contemplates braids and fibers, high-level programming constructs which facilitate the creation of programs that are partially ordered, to address the continuing trend of ever-increasing processor speeds and attendant increases in memory latencies. These partial orders can be used to respond adaptively to memory latencies. It is... Agent: Ference & Associates LLC

20090235037 - Method and device for customizing a portable electronic entity: A device (200) for customizing a portable electronic entity (100), that includes: elements for storing a plurality of groups of customization data; elements (280) for communication with a non-rewritable memory (130) of the portable electronic entity, for receiving a first identifier (415) stored in the non-rewritable memory; elements for selecting... Agent: Young & Thompson

20090235036 - Phase-change random access memory and method of setting boot block therein: A semiconductor memory device includes a memory cell array and the memory cell array includes: a plurality of memory blocks and at least one setting unit. The at least one setting unit stores a location and a size of a boot data storage region within the plurality of memory blocks... Agent: F. Chau & Associates, LLC

20090235038 - Hybrid memory system with backup power source and multiple backup an restore methodology: A memory subsystem includes a volatile memory and a nonvolatile memory. A controller includes logic to interface the volatile memory to an external system, so that the volatile memory is addressable for reading and writing by the external system. The controller includes logic to back up data from the volatile... Agent: Fsp LLC

20090235039 - Digital data reproducing apparatus: A digital data reproducing apparatus comprising: a reproducing unit configured to reproduce input digital data; an encoding unit configured to store encoded data obtained by encoding the digital data into a memory; a transferring unit configured to transfer the encoded data stored after a transfer address specified in the memory... Agent: SocalIPLaw Group LLP

20090235042 - Method for the allocation of data on physical media by a file system which optimizes power consumption: The present invention provides a method for the allocation of data on physical media by a file system which optimizes power consumption. The present invention improves power efficiency of computing devices using file systems by allocating data in a way that allows devices to power down when they are not... Agent: Barlow, Josephs & Holmes, Ltd.

20090235040 - Programmble memory appratus, systems, and methods: Some embodiments include apparatus, systems, and methods having storage units coupled in parallel between a first line and a second line and a comparator circuit coupled to the second line. The first line may be configured to provide different voltages. The comparator circuit may be configured to compare a first... Agent: Treyz Law Group

20090235041 - Storage of sequentially sensitive data: A contiguous digital media storage system and method is disclosed. In one embodiment, the contiguous digital media storage system comprises a storage server, mass storage device, allocator subsystem, and metadata subsystem. Other embodiments may include additional storage servers or mass storage devices as well as one or more client devices.... Agent: Weide & Miller, Ltd.

20090235043 - Automatic table partitioning roll-in: A system, method and program product for automatically partitioning tables in a database system. A partitioning system is provided that includes: a system for analyzing a plurality of partition settings that predefines partitioning operations that need to occur in the future; and an automatic partition roll-in system that automatically causes... Agent: Hoffman Warnick LLC

20090235044 - Media processing system having resource partitioning: A system comprises memory, process code, and resource partitioning code, where the code is executable by a processor. The process code may spawn multiple processes that request for access to the memory. The resource partitioning code generates resource partition objects and assigns processes to the resource partition objects. The processes... Agent: Harman - Brinks Hofer Chicago Brinks Hofer Gilson & Lione

20090235046 - Computer system and operation takeover method: This computer system has a first storage apparatus including a first volume, a second storage apparatus for providing the first virtual volume to a host computer, a third storage apparatus for switching the access to the first virtual volume of the host computer and providing a second virtual volume to... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090235045 - Extending the addressing space of record carriers: Current BD specification prescribes the following format for the ADIP: 24 bits, 3 of which to indicate the layer number, 19 for the RUB number, and 2 to be set to 00, 01 and 10 consecutively in the 3 successive ADIP words corresponding to one RUB that is the smallest... Agent: Philips Intellectual Property & Standards

20090228629 - Migration of applications from physical machines to virtual machines: Methods and apparatus, including computer program products, are provided for migrating applications from a physical machine to virtualization technology, such as virtual machines. In one aspect, there is provided a computer-implemented method. The method may include receiving, from an agent, information representative of at least one of an application or... Agent: Mintz, Levin, Cohn, Ferris, Glovsky & Popeo, P.C.

20090228631 - Method and system of a shared bus architecture: A method, system and apparatus of shared bus architecture are disclosed. In one embodiment, a method controlling set of multiplexers using an arbiter circuit per transaction, selecting one of a memory clock and a host clock based on an arbitration status, driving a final output on an interface to provide... Agent: Lsi Corporation

20090228630 - Serial buffer to support rapid i/o logic layer out of order response with data retransmission: Within a serial buffer, request packets are written to available memory blocks of a memory buffer, which are identified by a free buffer pointer list. When a request packet is written to a memory block, the memory block is removed from the free buffer pointer list, and added to a... Agent: Bever, Hoffman & Harms, LLP

20090228632 - Storage system for staging data in random access area: There is provided a storage system accessed by a host computer, comprising: an interface coupled to the host computer; a processor coupled the interface; a memory coupled to the processor; and a storage device for storing the data. The storage device comprises a first storage device in which the stored... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20090228633 - Data processor: A data processor (1) has a central processing unit (3) and a memory controller (6) capable of controlling a memory (8) to be connected to an outside. The memory has a buffer capable of temporarily holding data within an address range corresponding to a predetermined bit number on a low... Agent: Miles & Stockbridge PC

20090228639 - Data storage device and data management method thereof: Disclosed is a data storage device including an external switch, a controller and a nonvolatile memory. The external switch selectively generates mode information in response to operation of the switch. The controller controls a recording operation of normal data and secured data in response to the mode information. The nonvolatile... Agent: Volentine & Whitt PLLC

20090228637 - High-speed solid state storage system having a hierarchy of different control units that process data in a corresponding memory area and method of controlling the same: a first control unit and at least one second control unit. The first control unit distributes and transmits external command signals that are provided from a host interface. The second control unit is controlled by the first control unit and performs an address mapping operation, an error checking/correcting operation, an... Agent: Ladas & Parry LLP

20090228640 - Information processing apparatus and non-volatile semiconductor memory drive: According to one embodiment, an information processing apparatus of the invention includes an information processing apparatus main body, and a non-volatile semiconductor memory drive which is accommodated in the information processing apparatus main body. The information processing apparatus main body includes a clock module which counts time information, and a... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090228641 - Information processing apparatus and non-volatile semiconductor memory drive: According to one embodiment, an information processing apparatus includes a main body and a memory drive which is accommodated in the main body. The main body includes a reload module which recovers a storage state at a predetermined time point of the memory drive into the memory drive, and a... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090228644 - Latched address multi-chunk write to eeprom: An EEPROM system includes flash EEPROM cells organized into subarrays. Pairs of subarrays share row address decoders by sharing word lines, and individual subarrays have dedicated column address decoders and data registers. Each row decoder has an associated row address latch, and each column decoder has an associated column address... Agent: Davis Wright Tremaine LLP - Sandisk Corporation

20090228635 - Memory compression implementation using non-volatile memory in a multi-node server system with directly attached processor memory: A method, an apparatus and a program product may enable scalable bandwidth and memory for a system having processor with directly attached memory. Multiple memory expander microchips may include non-volatile memory to provide additional memory bandwidth and capacity while in communication with the processor. The uncompressed data region may be... Agent: Ibm-rochester C/o Toler Law Group

20090228634 - Memory controller for flash memory: Data is written in data areas (202) and information for correcting an error of the data and status information indicating that the data has been written are written in redundant areas (203) sequentially from the first page of a physical block (201). In the step of creating information to be... Agent: Mcdermott Will & Emery LLP

20090228642 - Memory system and data erasing method therefor: A memory system includes a management table group in which management information including storage positions of data stored in a first storing area and a second storing area is stored. The management table group is stored in the second storing area. A controller performs data transfer between a host apparatus... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090228636 - Method for allocating a memory: In the method for writing into a memory device having a plurality of blocks, the management information of each block and the payload data belonging to the block are stored together.... Agent: Kenyon & Kenyon LLP

20090228638 - Multi port semiconductor memory device with direct access function in shared structure of nonvolatile memory and multi processor system thereof: A multiport semiconductor memory device and a multiprocessor system employing the same directly accesses a shared nonvolatile memory. The multiport semiconductor memory device includes a plurality of port units coupled with respective corresponding processors. A shared memory area is accessed by both the processors through the port units. A data... Agent: F. Chau & Associates, LLC

20090228643 - Semiconductor storage device: A semiconductor storage apparatus is coupled with a system bus to receive a write request accompanied with first and second blocks of data, which are stored in nonvolatile semiconductor memories. A control device sends a first erase command to one of the nonvolatile memories to initiate a first internal erase... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090228645 - Assuring genuineness of data stored on a storage device: Techniques to assure genuineness of data stored on a storage device are provided. The storage device includes a storage controller that conducts I/O operations and management operations. A description of management operations and corresponding timestamps are recorded to an operation log stored in a memory. The memory additionally stores an... Agent: Mattingly & Malur, P.C.

20090228647 - Application cache population from peer application: Improved approaches to manage cache data for applications operating in a data center environment are disclosed. Data requests incoming over a network are able to be responded to by an application in a consistent and rapid manner through intelligent management of cache data. When like applications are being concurrently operated,... Agent: Technology & Innovation Law Group, PC

20090228646 - Maintaining write cache and parity update footprint coherency in multiple storage adaptor configuration: A method, computer program product and computer system for maintaining write cache and parity update footprint coherency in a multiple storage adaptor configuration for storage adaptors in a storage subsystem, which includes providing atomic updating of the storage adaptors and the attached disk drives, enabling runtime addition and runtime subtraction... Agent: Ibm Corporation

20090228652 - Disk array system: A disk array system comprises plural disk array devices, and each disk array device has two disk array controllers (first DAC and second DAC) for controlling a disk array. In each disk array device, the first DAC has a redundant configuration with a second DAC of any one of the... Agent: Nec Corporation Of America

20090228648 - High performance disk array rebuild: A method, information processing system, and computer program storage product for managing disk failures in a disk array. At least one disk in a first disk array is determined to have failed. The first disk array only accesses data by reading an entire stripe that is distributed across multiple disks... Agent: Fleit, Gibbons, Gutman, Bongini & Bianco P.l.

20090228651 - Mirroring mechanisms for storage area networks and network based virtualization: A technique is provided for implementing online mirroring of a volume in a storage area network. A first instance of the volume is instantiated at a first port of the fibre channel fabric for enabling I/O operations to be performed at the volume. One or more mirroring procedures may be... Agent: Weaver Austin Villeneuve & Sampson LLP

20090228650 - Raid system and apparatus for a handheld device: A system comprises a RAID engine disposed within a housing of a handheld computing or communications device and an interface engine connected to the RAID engine for providing an interface between the RAID engine and a memory of the handheld computing or communications device.... Agent: Lsi Corporation C/o Suiter Swantz PC Llo

20090228649 - Redundant array of inexpensive disks configuration using simple network management protocol: A method of configuring a storage device is disclosed. The method generally includes the steps of (A) receiving a single data unit over a communication network, the data unit (i) being transferred via the communication network using a standard communication protocol, (ii) defining both (a) a plurality of new configuration... Agent: Christopher P Maiorana, PC Lsi Corporation

20090228653 - Storage control system and control method for same: A storage control system judges whether the data pattern of data exchanged with a higher-level device (hereafter “data”) conforms to one or a plurality of write-excluded data patterns comprised in write-excluded data pattern information prepared in advance. If a negative judgment result is obtained, the storage control subsystem stores the... Agent: Mattingly & Malur, P.C.

20090228654 - Media cartridge resident auto-sensing/loading archive software: The present invention, in particular embodiments, provides methods, apparatuses and systems directed to a removable cartridge which has a data storage device, such as a hard drive, that contains a data archive application and a loader or installer. In one implementation, the data storage device contains platform-independent archive data, and... Agent: Baker Botts L.L.P.

20090228655 - Hierarchical storage apparatus, control device, and control method: A storage apparatus includes a first storage device that primarily stores data, a second storage device, having a property differing from the first storage device, that secondarily stores the data, and a control device that controls a data migration between the first storage device and the second storage device. The... Agent: Staas & Halsey LLP

20090228656 - Associativity implementation in a system with directly attached processor memory: A method, apparatus and program product enable associativity operations for system including a processor having directly attached memory. A memory expander microchip facilitates concurrent memory access while attached to a processor. Associativity may have particular application in the context of accessing a data cache, which may be present on the... Agent: Ibm-rochester C/o Toler Law Group

20090228657 - Apparatus, processor, cache memory and method of processing vector data: An apparatus includes a vector unit to process a vector data, a cache memory which includes a plurality of cache lines to store a plurality of divisional data being sent from a main memory, each of the divisional data of vector data having been divided according to a capacity of... Agent: Mcginn Intellectual Property Law Group, PLLC

20090228658 - Management method for cache memory, storage apparatus, and computer system: A management method for a cache memory of a storage apparatus including: at least one volume for storing data to be accessed from a computer via a network; and a cache memory, to which an area for holding the data to be stored in said at least one volume is... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090228659 - Processor and computing system: A processor and a computing system are provided. A processor includes a processor core, and a buffer memory to read word data from a memory, the read word data including first byte data read by the processor core from the memory, and to store the read word data, wherein the... Agent: Mcneely Bodendorf LLP

20090228660 - Dynamic optimization of device limits and thresholds in a write cache: A method, computer program product and system for dynamically optimizing the limit and the thresholds of a write cache for a storage adapter connected to storage devices, includes measuring continually an overall locality of data in the write cache for the storage devices, calculating the limit of the write cache... Agent: Ibm Corporation

20090228661 - Variable cache data retention system: A customizable cache discard policy is provided which reduces adverse consequences of conventional discard policies. In a data processing system, a cache controller invokes a cache data discard policy as the cache approaches its capacity. Using one possible policy, data having the shortest retrieval (fetch) time is discarded before data... Agent: Law Firm Of Dan Shifrin

20090228663 - Control circuit, control method, and control program for shared memory: A shared memory control method parallel processes ordered access requests (AccReq) for a shared memory received from processors or threads. The method includes dividing the shared memory into memory areas, receiving the ordered AccReq for each memory area, executing the AccReq when a described order number (OrdNum) described in the... Agent: Young & Thompson

20090228662 - Multi-channel memory storage device and control method thereof: The present invention discloses a multi-channel memory storage device and control method thereof. The method arranges physical locations for a file's data stored in the storage device. The storage device includes a plurality of memories. The major feature of the method is to decide whether the data is written to... Agent: Rabin & Berdo, PC

20090228665 - Kernel and application cooperative memory management: Embodiments of the present invention provide a mechanism for an operating system and applications to cooperate in memory management. Applications register with the operating system for cooperative memory management. The operating system monitors the memory and determines a memory “pressure” related to the amount of demand for the memory. As... Agent: Mh2 Technology Law Group (cust. No. W/red Hat)

20090228664 - Memory compression implementation in a system with directly attached processor memory: A method, apparatus and program product enable memory compression for a system including processor with directly attached memory. A memory expander microchip facilitates memory compression while attached to a processor. The memory expander microchip may provide additional bandwidth and memory capacity for the system to enable memory compression in a... Agent: Ibm-rochester C/o Toler Law Group

20090228666 - Information processing apparatus and storage drive: According to one embodiment, an information processing apparatus includes an information processing apparatus main body and a storage drive which is accommodated in the information processing apparatus body. The information processing apparatus main body includes a main control module which controls power activation of the storage drive based on a... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090228667 - Performing a least recently used (lru) algorithm for a co-processor: A method to perform a least recently used (LRU) algorithm for a co-processor is described, which co-processor in order to directly use instructions of a core processor and to directly access a main storage by virtual addresses of said core processor comprises a TLB for virtual to absolute address translations... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20090228668 - Memory compression implementation in a multi-node server system with directly attached processor memory: A method, apparatus and program product enable scalable bandwidth and memory for a system having processor with directly attached memory. Multiple memory expander microchips provide the additional bandwidth and memory while in communication with the processor. Lower latency data may be stored in a memory expander microchip node in the... Agent: Ibm-rochester C/o Toler Law Group

20090228669 - Storage device optimization using file characteristics: A storage system may have multiple storage devices on which files are stored. The system may determine various performance characteristics for each storage device and select a storage device on which a particular file having a set of characteristics may be stored. The storage system may consolidate disparate storage devices,... Agent: Microsoft Corporation

20090228670 - Backup data management system and backup data management method: Provided are a backup data management system and a backup data management method capable of facilitating the management of backup data that is multiplexed between different storage apparatuses. The backup data management system includes a storage apparatus having a volume to be used by a host computer, at least one... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090228672 - Remote copy system and check method: A first and a second storage apparatuses each include: a logical device in which a control command from a host system is written; one or more logical volumes provided by storage areas in plural hard disks for storing data; pair information regarding pairs formed from plural logical volumes, and the... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20090228671 - Storage apparatus and control method thereof: This storage apparatus further includes a control unit for creating a second volume as a backup volume of the first volume upon receiving a backup command of the first volume from the host apparatus, and sending a completion reply of the backup command to the host apparatus while the formatting... Agent: Mattingly & Malur, P.C.

20090228673 - Fine granularity hierarchiacal memory protection: Protection entries and techniques for providing fine granularity computer memory protection. A method of protecting a computer memory may include separating or parsing the computer memory, containing data or code, into blocks and creating protection entries for each block. The protection entries optionally include a reference field for identifying a... Agent: Lee & Hayes, PLLC

20090228674 - Disk array apparatus for controlling start timing of disk drive: To realize a disk array device which suppresses vibrations during HDD spinning-up, there is provided a disk array apparatus, comprising: a plurality of disk drives; and a controller for controlling the plurality of disk drives, the disk array apparatus controlling power of the plurality of disk drives for each disk... Agent: Brundidge & Stanger, P.C.

20090228675 - Kernel and application cooperative memory management: Embodiments of the present invention provide a mechanism for an operating system and applications to cooperate in memory management. Applications register with the operating system for cooperative memory management. The operating system monitors the memory and determines a memory “pressure” related to the amount of demand for the memory. As... Agent: Mh2 Technology Law Group (cust. No. W/red Hat)

20090228676 - Storage system and management method thereof: Proposed are a storage system and its management method having at least two storage apparatuses capable of partitioning an internal resource into logical partitions and managing the logical partitions, and which replicates data written into a primary volume of a primary storage apparatus as the replication source storage apparatus to... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090228677 - Digital data processing method and system: A method and system for processing generic formatted data, including first data describing a sequence of generic operations without any loops, in view of providing specific formatted data, for a determined platform including Q processor(s) and at least one memory, the platform configured to process, according, directly or indirectly, to... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090228678 - Mapping definition creation system and mapping definition creation program: A mapping definition system for creating a mapping definition between a structured data definition of a conversion source and a structured data definition of a conversion target comprises: mapping information extraction means for extracting mapping information from an existing mapping definition and storing the same in a mapping information storage... Agent: Mattingly & Malur, P.C.

20090228679 - Mapping management methods and systems: Mapping management methods and systems are provided. First, a sub-read command comprising mapping directory number, block offset and page offset is obtained. Then, a specific block mapping table is located from a plurality of block mapping tables according to the mapping directory number, and a first specific entry is located... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090228680 - Combined hash for variable data chunks: A method comprises obtaining a plurality of variable size chunks of data, calculating a first hash for each variable size chunk of data, determining a length representation for each variable size chunk of data, determining a second hash of a subset of each variable size chunk of data, and forming... Agent: Schwegman, Lundberg & Woessner, P.A.

20090222619 - Electronic flash memory external storage method and device: An electronic flash memory external storage method and device for data processing system includes firmware which directly controls the access of electronic storage media and implements standard interface functions, adopts particular reading and writing formats of the external storage media, receives power via USB, externally stores data by flash memory... Agent: Squire, Sanders & Dempsey L.L.P.

20090222613 - Information processing apparatus and nonvolatile semiconductor memory drive: According to one embodiment, an information processing apparatus includes an information processing apparatus main body, and a nonvolatile semiconductor memory drive which is accommodated in the information processing apparatus main body. The nonvolatile semiconductor memory drive includes a nonvolatile semiconductor memory, an address management table which is indicative of a... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090222614 - Information processing apparatus and nonvolatile semiconductor memory drive: According to one embodiment, an information processing apparatus includes an information processing apparatus main body, and a nonvolatile semiconductor memory drive which is accommodated in the information processing apparatus main body. The nonvolatile semiconductor memory drive includes a nonvolatile semiconductor memory, and a control module configured to control, in accordance... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090222615 - Information processing apparatus and nonvolatile semiconductor memory drive: According to one embodiment, a nonvolatile semiconductor memory includes a first memory area which is formed of a fixed area to which a predetermined physical address range is allocated, and which stores management information including an address management table indicative of a correspondency between logical block address and physical addresses... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090222616 - Memory system: A controller includes an identification information management table that manages identification information indicating, for each of addresses in second-management unit, whether one or more data in first management unit belonging to the addresses is stored in the second or the third storing area. When the controller executes a process of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090222617 - Memory system: A memory system includes a volatile first storing unit, a nonvolatile second storing unit in which data is managed in a predetermined unit, and a controller that writes data requested by a host apparatus in the second storing unit via the first storing unit and reads out data requested by... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090222618 - Memory system and block merge method: In one embodiment, the invention provides a memory system including a flash memory device including a plurality of memory blocks implementing a plurality of data blocks, a plurality of log blocks, and a plurality of free blocks. The memory system further includes a flash translation layer maintaining the number of... Agent: Volentine & Whitt PLLC

20090222612 - Programmable food service systems: A data key, for use with a programmable food service device, comprises: an insertion portion, for insertion into a key aperture in the programmable food service device; a data memory for storing data relating to the operation of the programmable food service device; and a data connection portion for connecting... Agent: Ohlandt, Greeley, Ruggiero & Perle, LLP

20090222620 - Memory device, information processing apparatus, and electric power controlling method: A memory device includes a memory unit that is nonvolatile and is made up of a plurality of memory areas; first retaining units each of which is provided in correspondence with a different one of the memory areas and each of which retains first setting information that defines whether a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090222621 - Managing the allocation of task control blocks: Systems and methods for allocating task control blocks in an information storage and retrieval system are disclosed. Task control blocks for new writes and reads are allocated by the cache code after a determination of the number of task control blocks already allocated for other tasks.... Agent: Quarles & Brady LLP

20090222623 - Storage system and management method of its storage medium: High availability is provided in a storage system that offers expandability more inexpensively. Provided is a storage system including multiple expanders to be connected to multiple storage mediums, multiple cascades connected respectively to a prescribed number of expanders among the multiple expanders, and multiple control units for respectively controlling the... Agent: Brundidge & Stanger, P.C.

20090222622 - Video media data storage system and related methods: A video media data storage system may include first and second pluralities of data storage devices each arranged in a redundant array of independent drives (RAID) configuration for permitting writing and reading of video media data. The system may further include at least one memory controller coupled to the first... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist

20090222624 - Method and apparatus for economical cache population: A technique for efficiently populating a cache in a data processing system with resources is disclosed. In particular, a node in accordance with the illustrative embodiment of the present invention defers populating its cache with a resource until at least two requests for the resource have been received. This is... Agent: Demont & Breyer, LLC

20090222625 - Cache miss detection in a data processing apparatus: A data processing apparatus and method are provided for detecting cache misses. The data processing apparatus has processing logic for executing a plurality of program threads, and a cache for storing data values for access by the processing logic. When access to a data value is required while executing a... Agent: Nixon & Vanderhye, PC

20090222626 - Systems and methods for cache line replacements: A system for determining a cache line to replace is described. In one embodiment, the system includes a cache comprising a plurality of cache lines. The system further includes an identifier configured to identify a cache line for replacement. The system also includes a control logic configured to determine a... Agent: Qualcomm Incorporated

20090222628 - Memory system: A controller determines whether data stored in a first storing area should be flushed to a second storing area or a third storing area. When flushing of data in a track unit from at least one of the first storing area and the second storing area unit to the third... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090222627 - Method and apparatus for high speed cache flushing in a non-volatile memory: An invention is provided for performing flush cache in a non-volatile memory. The invention includes maintaining a plurality of free memory blocks within a non-volatile memory. When a flush cache command is issued, a flush cache map is examined to obtain a memory address of a memory block in the... Agent: Patent Venture Group

20090222629 - Memory system: A memory system includes a controller that reads out, data written in a nonvolatile second storing area, from which data is read out and in which data is written in a page unit, to a first storing area as a cache memory included in a semiconductor memory and transfers the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090222630 - Memory share by a plurality of processors: The present invention is directed to a method and a device for memory share by a plurality of processors. The portable terminal according to an embodiment of the present invention comprises a main memory; a sub-control unit coupled to the main memory through bus #1, the sub-control unit processing and... Agent: Birch Stewart Kolasch & Birch

20090222631 - Storage system and data migration method: Proposed are a storage system and a data migration method capable of effectively performing data migration between storage apparatuses. This storage system includes a host apparatus equipped with a function for copying data stored in a first volume of a first storage apparatus in file units to a corresponding second... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20090222633 - Information processing system and information processing method capable of performing detailed state notification even in a difficult situation: In an information processing system having a main central processing unit for processing object information being a processing object, a sub-central processing unit adapted to operate independently of the main central processing unit is further provided. The main central processing unit produces execution information indicating executing contents and a corresponding... Agent: Nec Corporation Of America

20090222632 - Storage system controlling method, switch device and storage system: A method for controlling a storage system having first and second switches and a storage device connected to the switches via a network in response to a request from a host, the storage device having first and second areas, each of the first and second switch accessing to the first... Agent: Fujitsu Patent Center C/o Cpa Global

20090222634 - Probabilistic object relocation: Object relocation often involves a multi-word copy of the object from a source memory to a destination memory, followed by updating the references (e.g., pointers) to the object. However, during the relocation, other threads may write to portions of the object that have already been relocated, and the updates may... Agent: Microsoft Corporation

20090222636 - Memory system and memory initializing method: A memory system includes a controller that writes internal information concerning an operation state of the memory system in a special LBA area allocated to a predetermined logical address range in a second storing memory and writes the internal information in a first storing memory, and reads out, when the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090222635 - System and method to use chipset resources to clear sensitive data from computer system memory: A system, method, and program product is provided that initializes a computer system using an initialization process that identifies secrets that were stored in memory and not scrubbed during a prior use of the computer system. During the initialization process, one or more secret indicators are retrieved that identify whether... Agent: Lenovo - Jvl C/o Vanleeuwen & Vanleeuwen

20090222637 - On-die termination control circuit of semiconductor memory device: On-die termination control circuit of semiconductor memory device includes a counter configured to count an external clock to output a first code, and to count an internal clock to output a second code, a transfer controller configured to determine whether to transfer the first code and the second code in... Agent: Mannava & Kang, P.C.

20090222639 - Extended utilization area for a memory device: Methods, systems and devices for configuring access to a memory device are disclosed. The configuration of the memory device may be carried out by creating a plurality of access profiles that are adapted to optimize access to the memory device in accordance with the type of access. Accordingly, when an... Agent: Foley & Lardner LLP

20090222638 - Memory registration caching: A method for memory registration caching comprising enumerating a first process for a first process, in response to a memory registration cache being activated; finding an import table for the first module, wherein one or more pointers, in the import table, refer to memory management routines in a first library;... Agent: CenturyIPGroup, Inc. [intel]

20090222640 - Memory migration in a logically partitioned computer system: A method and apparatus migrates partition memory in a logically partitioned computer system by utilizing input/output (I/O) space located outside the logical memory blocks (LMBs) to be migrated. The transmit/receive (X/R) queues that are used by network storage adapters and any fixed memory items such as transmit/receive buffers are placed... Agent: Martin & Associates, LLC

20090222641 - Address translation circuit: Disclosed herein is an address translation circuit including an area address holding section configured to hold at least part of a translation target address as an area address; a translation flag holding section configured to hold a translation flag specifying whether or not the translation target address is to be... Agent: Frommer Lawrence & Haug

20090222642 - Mechanism for visualizing memory fragmentation: A method, system and computer program product for visualizing memory fragmentation in a data processing system includes determining a mobility status of plural memory pages and generating a map display depicting the plural memory pages and the mobility status.... Agent: Walter W. Duft

20090222643 - Block management method for flash memory and controller and storage sysetm using the same: A block management method for managing a mapping relationship between a plurality of logical blocks and a plurality of physical blocks of a flash memory is provided. The block management method includes: grouping the logical blocks into a plurality of logical zones; recording the mapping relationship between each logical block... Agent: J C Patents, Inc.