Electrical computers and digital processing systems: memory inventions 06/09

20090164696 - Physical block addressing of electronic memory devices: Systems and/or methods that facilitate accessing data to/from a memory are presented. An electronic memory component can operate with reduced data access times by eliminating/reducing the use of logical block addressing and employing physical block addressing. Data access is thereby directly associated with the physical location of the stored bits... Agent: Turocy & Watson, LLP

20090164697 - Information usage control system, information usage control device and mehtod, and computer readable medium: A system includes a first device and one or more second devices that each provides a user with usage information for using target information, based on control information, wherein the first device has a memory that stores the control information which contains device information and condition information, so as to... Agent: Gauthier & Connors, LLP

20090164698 - Nonvolatile storage device with ncq supported and writing method for a nonvolatile storage device: A nonvolatile storage device buffers multiple write commands and selects one or more therefrom according to a choosing policy to execute in priority, so as to increase the probability of continuously executing write commands corresponding to an identical smallest erasable unit, thereby reducing the frequency of backup, erasing and copyback... Agent: Rosenberg, Klein & Lee

20090164699 - Security storage of electronic keys withiin volatile memories: It is described a method for providing an electronic key within an integrated circuit (100) including both a volatile memory (102) and a non-volatile memory (104). The described comprises starting up the integrated circuit (100), reading the logical state of predetermined data storage cells (102a) assigned to the volatile memory... Agent: Nxp, B.v. Nxp Intellectual Property Department

20090164700 - efficient memory hierarchy in solid state drive design: Systems and methods for improving the performance and reliability of flash memory solid state drive devices are described herein. A flash memory array component stores data. A memory hierarchy component transfers data between the host and the flash memory array component. The memory hierarchy component includes a level one (“L1”)... Agent: Turocy & Watson, LLP

20090164706 - Emulation of a nand memory system: A system and a method for emulating a NAND memory system are disclosed. In the method, a command associated with a NAND memory is received. After receipt of the command, a vertically configured non-volatile memory array is accessed based on the command. In the system, a vertically configured non-volatile memory... Agent: Unity Semiconductor Corporation

20090164712 - Flash memory: A flash memory includes a memory sector, a command interface, a first signal buffer, a control signal generation circuit, a data input buffer, an error correction circuit, an address buffer, an address signal generation circuit, a plurality of data memory circuits, and write circuit. The command interface receives a write... Agent: Banner & Witcoff, Ltd. Attorneys For Client No. 000449, 001701

20090164703 - Flexible flash interface: Systems and methods that can facilitate providing a flexible flash interface component that can accommodate communicating with almost any flash memory component (e.g., Open NAND Flash Interface (ONFI) compliant and ONFI noncompliant flash memory). A micro-operations component can contain one or more micro-operation that can be used to execute commands... Agent: Turocy & Watson, LLP

20090164702 - Frequency distributed flash memory allocation based on free page tables: Systems and/or methods that provide for frequency distributed flash memory allocation are disclosed. The systems and methods determine the rate at which a system address is being written and the current erase cycle state of each data block in the non-volatile memory device and assigns a physical address to the... Agent: Turocy & Watson, LLP

20090164704 - High performance flash channel interface: Systems and/or methods that facilitate high performance flash channel interface techniques are presented. Integrated error correction code (ECC) engine and buffer sets facilitate bypassing error correction of data being written to or read from memory, such as flash memory, in addition to single ECC mode or multiple ECC mode. The... Agent: Turocy & Watson, LLP

20090164708 - Memory chip with extended input/output interface: A memory chip (1) with extended input/output interface is provided, for connecting to a host processor (11), wherein, a decoder (3), a counter (4) and a latch (5) is connected to each other in turn, then connected to an internal address bus interface (9) of a memory unit (2); a... Agent: Knobbe Martens Olson & Bear LLP

20090164707 - Method and system for accessing non-volatile memory: Accessing a non-volatile memory array is described, including receiving a first data and a memory address associated with the first data, writing the first data to the non-volatile memory array at the memory address of the first data without erasing a second data stored in the non-volatile memory array at... Agent: Unity Semiconductor Corporation

20090164701 - Portable image indexing device: A portable image-indexing device that includes a port adapter for connecting to a personal computer and a port adapter for receiving a camera card. The device includes memory for storing a plurality of image and video files and for storing image indexing application programs. A processor performs image indexing on... Agent: Frank Pincelli Patent Legal Staff

20090164709 - Secure storage devices and methods of managing secure storage devices: Methods of managing a secure area in a secure storage device include conducting an authentication process between a host and the secure storage device while modifying a size of the secure area, backing up secure data to the host from the secure area after completing the authentication process, updating management... Agent: Myers Bigel Sibley & Sajovec

20090164711 - Semiconductor memory controller, semiconductor memory, and method of controlling semiconductor memory controller: A semiconductor memory controller, which outputs data to be stored in a memory unit to the memory unit via a bus of N-bit width (N is an even number), executes a duplexing process on the data to generate duplicated data, simultaneously outputs the respective duplicated data to two different sections... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090164710 - Semiconductor memory system and access method thereof: A semiconductor memory system and access method thereof. The semiconductor memory system includes a nonvolatile memory and a memory controller. The nonvolatile memory stores monitoring data in one or more of plural memory cells. The memory controller controls the nonvolatile memory. The memory controller detects the monitoring data and adjusts... Agent: Stanzione & Kim, LLP

20090164705 - System and method for implementing extensions to intelligently manage resources of a mass storage system: Systems and methods for implementing extensions to intelligently manage resources of a mass storage system are disclosed. Generally, a host sends an extension of an enabled set of extensions to a mass storage system that includes at least one of command sequence information, command information or file attribute information. The... Agent: Brinks Hofer Gilson & Lione/sandisk

20090164713 - Bit block transfer circuit and method thereof and color filling method: A bit block transfer (Bitblt) circuit includes a read register, a write register, a bit shifting circuit and an overflowing register. The read register stores decomposition data including original data. The bit shifting circuit shifts the decomposition data in the read register to the write register and shifts bits of... Agent: Rabin & Berdo, PC

20090164714 - Method and apparatus for analyzing a mass data storage device, such as for troubleshooting a cartridge tape drive: Method and apparatus for analyzing a mass data storage device, such as for troubleshooting a cartridge tape drive device. In one embodiment, the method comprises: physically associating non-volatile memory with a removable media storage device, storing information in the non-volatile memory regarding characteristics of the removable media storage device, and... Agent: Quantum C/o Wagner Blecher LLP

20090164716 - Adaptation of contentious storage virtualization configurations: Systems and methods for managing storage virtualization in a storage infrastructure are provided. The method comprises examining storage virtualization configurations across a data storage infrastructure having one or more data storage resources, such that configuration data associated with the storage virtualization configurations applied to the one or more data storage... Agent: CenturyIPGroup, Inc. [ibm Us]

20090164717 - Automated correction of contentious storage virtualization configurations: Systems and methods for managing storage virtualization in a storage infrastructure are provided. The method comprises examining storage virtualization configurations across a data storage infrastructure having one or more data storage resources, such that configuration data associated with the storage virtualization configurations applied to the one or more data storage... Agent: CenturyIPGroup, Inc. [ibm Us]

20090164718 - Disk array device control method: A method for controlling a disk array device connected to an management server for managing the disk array device, the disk array device having priority information indicating priority of transmission on the basis of type of log data, the method includes: storing log data of the disk array device, transmitting... Agent: Staas & Halsey LLP

20090164715 - Protecting against stale page overlays: A method, data processing system and program product for protecting against stale page overlays which includes executing a process in memory of the data processing system. A storage controller pages data from the memory to a disk in pages when the memory is constrained by other processes being executed by... Agent: International Business Machines Corporation Richard Lau

20090164719 - Storage performance improvement using data replication on a disk: In some embodiments, disk accesses made during normal operation of a disk drive are monitored. One or more data blocks on the disk drive are identified as candidates for replication on the disk drive in response to the monitoring. Each of the identified data blocks are replicated in at least... Agent: Intel Corporation C/o Cpa Global

20090164721 - Hierarchical storage control apparatus, hierarchical storage control system, hierarchical storage control method, and program for controlling storage apparatus having hierarchical structure: An extractor extracts a plurality of storage areas storing identical data strings therein from the storage areas of a lower storage layer. A layer storage controller associates the extracted storage areas with a single storage area of an upper storage layer.... Agent: Young & Thompson

20090164720 - Storage apparatus and control method therefor: A storage apparatus comprises at least one housing A in which a storage device and a controller are provided, at least one housing B in which a storage device and a peripheral device are provided, and a transmission path for connecting the storage device and the controller of the housing... Agent: Townsend And Townsend And Crew, LLP

20090164723 - Memory card: The memory card includes a memory controller covered by a main body, a first non-volatile memory, a memory interface configured to transfer a signal between the memory controller and the first non-volatile memory, and a cover coupled to the main body and removeably covering the first memory and the memory... Agent: Harness, Dickey & Pierce, P.L.C

20090164722 - Memory card and memory storage device using the same: A memory card and a memory storage device using the memory card may be provided. The memory card may include a host connector, a memory controller connected to the host connector and enabled or disabled in response to a capacity expansion signal, a non-volatile memory connected to the memory controller,... Agent: Harness, Dickey & Pierce, P.L.C

20090164724 - System and control method for hot swapping of memory modules configured in a ring bus: A memory system according to the present invention copies data stored in memory modules to a hard disk device at each predetermined period, in replacing an arbitrary memory module, switches a bus from a unidirectional bus to a bi-directional bus, and at the time when an access to a memory... Agent: Sughrue Mion, PLLC

20090164727 - Handling of hard errors in a cache of a data processing apparatus: A data processing apparatus and method are provided for handling hard errors occurring in a cache of the data processing apparatus. The cache storage comprising data storage having a plurality of cache lines for storing data values, and address storage having a plurality of entries, with each entry identifying for... Agent: Nixon & Vanderhye, PC

20090164725 - Method and apparatus for fast processing memory array: The illustrative embodiments described herein provide a computer implemented method, apparatus, and computer program product for increasing efficiency associated with data access. In one illustrative embodiment a memory chip is presented comprising of a plurality of memory units for storing data; a plurality of processing units for processing the data;... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20090164726 - Programmable address processor for graphics applications: e

20090164728 - Semiconductor memory device and system using semiconductor memory device: A semiconductor memory device includes a data storage region which includes a plurality of unit data regions storing data, an information storage region which includes a plurality of unit information regions each storing information related to the data stored in associated one of the unit data regions, and an address... Agent: Mcdermott Will & Emery LLP

20090164729 - Sync-id for multiple concurrent sync dependencies in an out-of-order store queue: A method, system and process for retiring data entries held within a store queue (STQ). The STQ of a processor cache is modified to receive and process multiple synchronized groups (sync-groups). Sync groups comprise thread of execution synchronized (thread-sync) entries, all thread of execution synchronized (all-thread-sync) entries, and regular store... Agent: Dillon & Yudell LLP

20090164730 - Method,apparatus,and system for shared cache usage to different partitions in a socket with sub-socket partitioning: A cache that supports sub-socket partitioning is discussed. Specifically, the cache supports different quality of service levels and victim cache line selection for a cache miss operation. The different quality of service levels allow for programmable ceiling usage and floor usage thresholds that allow for different techniques for victim cache... Agent: Trop, Pruner & Hu, P.C.

20090164732 - Cache memory system and cache memory control method: A cache memory system, which is individually connected to each of a plurality of arithmetic units that access a shared memory to carry out parallel processing, includes: a data array that has a plurality of blocks that are composed of a plurality of words; a storage unit that, with respect... Agent: Sughrue Mion, PLLC

20090164731 - System and method for optimizing neighboring cache usage in a multiprocessor environment: A method for managing data operates in a data processing system with a system memory and a plurality of processing units (PUs), each PU having a cache comprising a plurality of cache lines, each cache line having one of a plurality of coherency states, and each PU coupled to at... Agent: Ibm Corporation (pec) C/o Patrick E. Caldwell, Esq.

20090164733 - Apparatus and method for controlling the exclusivity mode of a level-two cache: A method of controlling the exclusivity mode of a level-two cache includes generating level-two cache exclusivity control information at a processor in response to an exclusivity mode indicator, and utilizing the level-two cache exclusivity control information to configure the exclusivity mode of the level-two cache.... Agent: Mips C/o Cooley Godward Kronish LLP

20090164734 - Multiple concurrent sync dependencies in an out-of-order store queue: A method, system and processing device for retiring data entries held within a store queue (STQ). The STQ of a processor cache is modified to receive and process several types of data entries including: non-synchronized (non-sync), thread of execution synchronized (thread-sync), and all thread of execution synchronized (all-thread-sync). The task... Agent: Dillon & Yudell LLP

20090164735 - System and method for cache coherency in a multiprocessor system: A method for maintaining cache coherency operates in a data processing system with a system memory and a plurality of processing units (PUs), each PU having a cache, and each PU coupled to at least another one of the plurality of PUs. A first PU receives a first data block... Agent: Ibm Corporation (pec) C/o Patrick E. Caldwell, Esq.

20090164736 - System and method for cache line replacement selection in a multiprocessor environment: A method for managing a cache operates in a data processing system with a system memory and a plurality of processing units (PUs). A first PU determines that one of a plurality of cache lines in a first cache of the first PU must be replaced with a first data... Agent: Ibm Corporation (pec) C/o Patrick E. Caldwell, Esq.

20090164737 - System and method for processing potentially self-inconsistent memory transactions: A processor provides memory request and a coherency state value for a coherency granule associated with a memory request. The processor further provides either a first indicator or a second indicator depending on whether the coherency state value represents a cumulative coherency state for a plurality of caches of the... Agent: Larson Newman Abel & Polansky, LLP

20090164738 - Process based cache-write through for protected storage in embedded devices: A system including a write protected storage device, which utilizes a write cache to hold data intended to be written to the device, determines when data should be allowed to write through to the device instead of being cached. A unique identifier is determined for the requesting process and that... Agent: Merchant & Gould (microsoft)

20090164739 - Method,system and apparatus for handling events for partitions in a socket with sub-socket partitioning: In one aspect, the issues of events that may impact one or more partitions of sub-socket partitioning in one or more sockets can be handled. Specifically, events for partitions can be handled in a socket with sub-socket partitioning, wherein the events may include reset, interrupts, errors and reliability, availability, and... Agent: Trop, Pruner & Hu, P.C.

20090164740 - Device and method for extracting memory data: A device and method for extracting data stored in a volatile memory are provided. In particular, a memory-data extracting device and method for ensuring integrity of data extracted from a volatile memory installed in a computer are provided. A memory-data extracting module extracts data stored in a memory. A module... Agent: Ladas & Parry LLP

20090164741 - Information processing apparatus and information processing method: An information processing apparatus and an information processing method are capable of correctly selecting data to be deleted, without a user having to perform a troublesome operation. In a backup operation, a determination is made for each image file as to whether a predetermined condition is satisfied. If the condition... Agent: Canon U.s.a. Inc. Intellectual Property Division

20090164743 - Information processing apparatus and data recovering method: A information processing apparatus includes, upon instructing for writing back stored contents of a main memory unit to the stored contents of the main memory unit at the time of previous modification in a sequence number that is used for identifying whether write back to the main memory unit is... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090164742 - System and method of selective data mirroring in a data storage device: Systems and methods of selective data mirroring are disclosed. In a particular embodiment, a device is disclosed that includes a data storage medium and a controller operably coupled to the data storage medium. The controller configured to selectively enable a data mirroring function to copy data in a first data... Agent: Seagate Technology LLC C/o Westman Champlin & Kelly, P.A.

20090164744 - Memory access protection: A memory system is provided. The memory system includes a memory array and a memory controller in communication with the memory array. The memory controller is configured to receive a first password and to compare the first password with a second password. The second password is stored in the memory... Agent: Unity Semiconductor Corporation

20090164745 - System and method for controlling an amount of unprogrammed capacity in memory blocks of a mass storage system: Systems and methods for allocating blocks at a reprogrammable non-volatile mass storage system are disclosed. Generally, a controller identifies a group of data to be written to a block at the mass storage system, and allocates one of a new block or a partial block to the identified group of... Agent: Brinks Hofer Gilson & Lione/sandisk

20090164746 - Methods and devices for expandable storage: Embodiments described herein disclose methods and devices for expanding the storage capacity in a storage device, including the steps of creating at least one partition in a storage memory of the storage device; designating a reserved-storage area and an enabled-storage area in at least one partition; storing a partition size... Agent: Mark M. Friedman

20090164748 - Efficient address generation for pruned interleavers and de-interleavers: Techniques for efficiently generating addresses for pruned interleavers and pruned de-interleavers are described. In an aspect, a linear address may be mapped to an interleaved address for a pruned interleaver by determining the total number of invalid mappings corresponding to the linear address. The linear address may be summed with... Agent: Qualcomm Incorporated

20090164747 - Method,system and apparatus for memory address mapping for sub-socket partitioning: Sub-socket partitioning is enabled using embodiments of the present invention. In one aspect, the memory mapping is performed to isolate memory access for each of the partitions by assigning a partition address and a generated physical address.... Agent: Trop, Pruner & Hu, P.C.

20090164749 - Coupled symbiotic operating systems: A single application can be executed across multiple execution environments in an efficient manner if at least a relevant portion of the virtual memory assigned to the application was equally accessible by each of the multiple execution environments. A request by a process in one execution environment can, thereby, be... Agent: Woodcock Washburn LLP (microsoft Corporation)

20090164750 - Data commit on multicycle pass complete without error: A system and methodology that can prevent errors during data commit on multicycle pass complete associated with a memory is provided. The system employs a transaction buffer component in the memory that receives and temporarily stores information associated with a transaction. A controller component programs subsets of data to respective... Agent: Turocy & Watson, LLP

20090157940 - Techniques for storing data in multiple different data storage media: A data storage system comprises a first data storage medium and a second data storage medium. The first and the second data storage media are different types of data storage media. The data storage system assigns a first range of logical block addresses to physical addresses in the first data... Agent: Steven J. Cahill/ Hitachi Gst

20090157941 - Managing virtual addresses of blade servers in a data center: Methods, apparatus, and products for managing virtual addresses of blade servers in a data center are disclosed that include storing by a blade server management module (‘BSMM’), in non-volatile memory of a blade server, a parameter block, the parameter block including one or more virtual addresses for communications adapters of... Agent: Ibm (rps-blf) C/o Biggers & Ohanian, LLP

20090157942 - Techniques for data storage device virtualization: A data storage device comprises virtual storage devices that are each assigned to a subset of data sectors in a non-volatile memory of the data storage device. The data storage device receives configuration metadata for configuring each of the virtual storage devices from a host operating system. The configuration metadata... Agent: Steven J. Cahill/ Hitachi Gst

20090157945 - Enhanced processor virtualization mechanism via saving and restoring soft processor/system states: A method and system are disclosed for saving soft state information, which is non-critical for executing a process in a processor, upon a receipt of a process interrupt by the processor. The soft state is transmitted to a memory associated with the processor via a memory interface. Preferably, the soft... Agent: Dillon & Yudell LLP

20090157943 - Tracking load store ordering hazards: A method and system for processing data. In one embodiment, the method includes receiving a plurality of stores into a store queue, where each store is a result from a processor, and where the plurality of stores are destined for at least one memory address. The method also includes marking... Agent: Duke W. Yee Yee & Associates, P.C.

20090157944 - Tracking store ordering hazards in an out-of-order store queur: A method and system for processing data. In one embodiment, the method includes receiving a first store and receiving a second store subsequent to the first store. The method also includes generating a pointer that points to the last store that needs to retire before the second store retires, where... Agent: Duke W. Yee Yee & Associates, P.C.

20090157949 - Address translation between a memory controller and an external memory device: In one or more embodiments, address translation is performed over a dedicated serial bus between a non-volatile memory controller and a memory device that is external from the non-volatile memory device. The memory controller accesses memory address translation data in the external memory device to determine a physical address that... Agent: Attn: Kenneth W. Bolvin Leffert Jay & Polglaze, P.A.

20090157953 - Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein: A semiconductor device having an electrically erasable and programmable nonvolatile memory, for example, a rewritable nonvolatile memory including memory cells arranged in rows and columns and disposed to facilitate both flash erasure as well as selective erasure of individual units of plural memory cells. The semiconductor device which functions as... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090157951 - Information recording device and information recording method: An information recording device includes a table showing a physical address in first and second areas and a number of rewriting at the physical address in a correspondence manner, the first area being a writing destination in a recording medium configured to be consumed by rewriting, the second area being... Agent: Knobbe Martens Olson & Bear LLP

20090157948 - Intelligent memory data management: Systems and/or methods that facilitate data management on a memory device are presented. A data management component can log and tag data creating data tags. The data tags can comprise static metadata, dynamic metadata or a combination thereof. The data management component can perform file management to allocate placement of... Agent: Amin, Turocy & Calvin, LLP

20090157947 - Memory apparatus and method of evenly using the blocks of a flash memory: A memory apparatus and a method of evenly using the blocks of a flash memory are provided. The memory apparatus comprises a flash memory and a controller. The flash memory comprises a data region with a plurality of data blocks and a spare region with a plurality of spare blocks.... Agent: Grossman, Tucker, Perreault & Pfleger, PLLC

20090157946 - Memory having improved read capability: In the present invention, a memory, and in particular, a NOR emulating memory comprises a memory controller having a non-volatile memory for storing program code to initiate the operation of the memory controller. The controller has a first bus for receiving address signals from a host device and a second... Agent: Dla Piper LLP (us )

20090157950 - Nand flash module replacement for dram module: An electronic memory module according to the invention provides non-volatile memory that can be used in place of a DRAM module without battery backup. An embodiment of the invention includes an embedded microprocessor with microcode that translates the FB-DIMM address and control signals from the system into appropriate address and... Agent: Marlin Knight

20090157952 - Semiconductor memory system and wear-leveling method thereof: Disclosed is a semiconductor memory system and wear-leveling method thereof. The semiconductor memory system is comprised of a nonvolatile memory including a plurality of logic blocks each of which is divided into a plurality of entries, a file system detecting a type of data to be stored and allocating the... Agent: Mills & Onello LLP

20090157954 - Cache memory unit with early write-back capability and method of early write back for cache memory unit: A cache memory unit includes: a cache memory; an early write-back condition checking unit for checking whether an early write-back condition has been satisfied; and an early write-back execution unit for monitoring a memory bus connecting the cache memory unit and an external memory unit, and in response to the... Agent: Volentine & Whitt PLLC

20090157955 - Preallocated disk queuing: A method, system and computer program product for managing preallocated disk space are presented. The method includes placing a plurality of requests for preallocated disk space on a disk space request queue, wherein each preallocated disk space is preallocated for a fixed amount of disk space and a fixed length... Agent: Dillon & Yudell LLP

20090157956 - System and method for managing disk space in a thin-provisioned storage subsystem: A system and method for managing disk space in a thin-provisioned storage subsystem. If a number of free segments in a free segment pool at a storage subsystem is detected as below a desired minimum, one or more of the following is performed: selecting and adding logical devices (LDEVs) from... Agent: Mattingly & Malur, P.C.

20090157957 - Apparatus with disc drive that uses cache management policy to reduce power consumption: Data blocks are loaded in multi-block fetch units from a disc. Cache management policy is selects data blocks for non-retention in cache memory so as to reduce the number of fetch units that must be fetched. Use is made of the large multi-block fetch unit size to profit from the... Agent: Philips Intellectual Property & Standards

20090157958 - Clustered storage network: A data storage network is provided. The network includes a client connected to the data storage network; a plurality nodes on the data storage network, wherein each data node has two or more RAID controllers, wherein a first RAID controller of a first node is configured to receive a data... Agent: Sheppard, Mullin, Richter & Hampton LLP

20090157959 - Storage medium control device, storage medium managing system, storage medium control method, and storage medium control program: To provide a storage medium control device capable of preventing decrease in the reliability of data saving with a non-redundant structure. Provided is a storage medium control device capable of communicating with a higher-order device, for managing/controlling an information storage device main body configured with physical storage media to be... Agent: Nec Corporation Of America

20090157960 - Information processing apparatus and start-up method of the apparatus: An information processing apparatus on which a non-volatile storage device is mountable is provided. The information processing apparatus comprises: a volatile storage unit; a mount unit that mounts the device; an acquisition unit configured to acquire information of the device; an estimation unit that estimates a resume time from hibernation... Agent: Fitzpatrick Cella Harper & Scinto

20090157962 - Cache injection using clustering: A method and system for cache injection using clustering are provided. The method includes receiving an input/output (I/O) transaction at an input/output device that includes a system chipset or input/output (I/O) hub. The I/O transaction includes an address. The method also includes looking up the address in a cache block... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20090157963 - Contiguously packed data: Data for data elements (e.g., pixels) can be stored in an addressable storage unit that can store a number of bits that is not a whole number multiple of the number of bits of data per data element. Similarly, a number of the data elements can be transferred per unit... Agent: Murabito Hao & Barnes LLP

20090157964 - Efficient data storage in multi-plane memory devices: A method for data storage includes initially storing a sequence of data pages in a memory that includes multiple memory arrays, such that successive data pages in the sequence are stored in alternation in a first number of the memory arrays. The initially-stored data pages are rearranged in the memory... Agent: D. Kligler I.p. Services Ltd

20090157961 - Two-sided, dynamic cache injection control: A method, system, and computer program product for two-sided, dynamic cache injection control are provided. An I/O adapter generates an I/O transaction in response to receiving a request for the transaction. The transaction includes an ID field and a requested address. The adapter looks up the address in a cache... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20090157965 - Method and apparatus for active software disown of cache line's exlusive rights: Software indicates to hardware of a processing system that its storage modification to a particular cache line is done, and will not be doing any modification for the time being. With this indication, the processor actively releases its exclusive ownership by updating its line ownership from exclusive to read-only (or... Agent: International Business Machines Corporation Richard Lau

20090157966 - Cache injection using speculation: A method, system, and computer program product for cache injection using speculation are provided. The method includes creating a cache line indirection table at an input/output (I/O) hub, which includes fields and entries for addresses, processor ID, and cache type and includes cache level line limit fields. The method also... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20090157967 - Pre-fetch data and pre-fetch data relative: A prefetch data machine instruction having an M field performs a function on a cache line of data specifying an address of an operand. The operation comprises either prefetching a cache line of data from memory to a cache or reducing the access ownership of store and fetch or fetch... Agent: International Business Machines Corporation Richard Lau

20090157968 - Cache memory with extended set-associativity of partner sets: A cache memory including a plurality of sets of cache lines, and providing an implementation for increasing the associativity of selected sets of cache lines including the combination of providing a group of parameters for determining the worthiness of a cache line stored in a basic set of cache lines,... Agent: Ibm Corporation

20090157969 - Buffer cache management to prevent deadlocks: A method, computer program product, and data processing system for managing a input/output buffer cache for prevention of deadlocks are disclosed. In a preferred embodiment, automatic buffer cache resizing is performed whenever the number of free buffers in the buffer cache diminishes to below a pre-defined threshold. This resizing adds... Agent: Ibm Corp. (mrn) C/o Law Office Of Michael R. Nichols

20090157970 - Method and system for intelligent and dynamic cache replacement management based on efficient use of cache for individual processor core: Determining and applying a cache replacement policy for a computer application running in a computer processing system is accomplished by receiving a processor core data request, adding bits on each cache line of a plurality of cache lines to identify a core ID of an at least one processor core... Agent: Cantor Colburn LLP - IBM Research Triangle Park

20090157972 - Hash optimization system and method: A computer implemented method, apparatus and program product automatically optimizes hash function operation by recognizing when a first hash function results in an unacceptable number of cache misses, and by dynamically trying another hash function to determine which hash function results in the most cache hits. In this manner, hardware... Agent: Ibm-rochester C/o Toler Law Group

20090157971 - Integration of secure data transfer applications for generic io devices: Techniques are presented for sending an application instruction from a hosting digital appliance to a portable medium, where the instruction is structured as one or more units whose size is a first size, or number of bytes. After flushing the contents of a cache, the instruction is written to the... Agent: Davis Wright Tremaine LLP - Sandisk Corporation

20090157973 - Storage controller for handling data stream and method thereof: A storage controller for handling data stream having data integrity field (DIF) and method thereof. The storage controller comprises a host-side I/O controller for receiving a data stream from a host entity, a host-side I/O controller for connecting to a physical storage device, and, a central processing circuitry having at... Agent: North America Intellectual Property Corporation

20090157974 - System and method for clearing data from a cache: A system and method for clearing data from a cache is disclosed. The method may include the steps of receiving data at a cache of a self-caching storage device, determining a cost-effectiveness of flushing a logical block from the cache and, if the current available capacity of the cache is... Agent: Brinks Hofer Gilson & Lione/sandisk

20090157975 - Memory-centric page table walker: The page table walker is moved from its conventional location in the memory management unit associated with the data processor to a location in main memory i.e. the main memory controller. As a result, an implementation is provided wherein the processing of requests for data could selectively avoid or bypass... Agent: Ibm Corporation

20090157981 - Coherent instruction cache utilizing cache-op execution resources: A multiprocessor system maintains cache coherence among processors in a coherent domain. Within the coherent domain, a first processor can receive a command to perform a cache maintenance operation. The first processor can determine whether the cache maintenance operation is a coherent operation. For coherent operations, the first processor sends... Agent: Townsend And Townsend And Crew LLP/mips

20090157977 - Data transfer to memory over an input/output (i/o) interconnect: A method, system, and computer program product for data transfer to memory over an input/output (I/O) interconnect are provided. The method includes reading a mailbox stored on an I/O adapter in response to a request to initiate an I/O transaction. The mailbox stores a directive that defines a condition under... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20090157980 - Memory controller with write data cache and read data cache: A memory controller 14 includes a write data cache 18, a read data cache 20 and coherency circuitry 22. The coherency circuitry 22 manages coherency of data between the write data cache 18, the read data cache 20 and data stored within a main memory 16 when servicing read requests... Agent: Nixon & Vanderhye, PC

20090157976 - Network on chip that maintains cache coherency with invalidate commands: A network on chip (‘NOC’) that maintains cache coherency with invalidate commands, the NOC comprising integrated processor (‘IP’) blocks, routers, memory communications controllers, and network interface controller, each IP block adapted to a router through a memory communications controller and a network interface controller, the NOC also including a port... Agent: Ibm (roc-blf)

20090157978 - Target computer processor unit (cpu) determination during cache injection using input/output (i/o) adapter resources: A method, system, and computer program product for target computer processor unit (CPU) determination during cache injection using input/output (I/O) adapter resources are provided. The method includes storing locations of cache lines for pinned or affinity scheduled processes in a table on an input/output (I/O) adapter. The method also includes... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20090157979 - Target computer processor unit (cpu) determination during cache injection using input/output (i/o) hub/chipset resources: A method, system, and computer program product for target computer processor unit (CPU) determination during cache injection using I/O hub/chipset resources are provided. The method includes creating a cache injection indirection table on the input/output (I/O) hub or chipset. The cache injection indirection table includes fields for address or address... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20090157982 - Multiple miss cache: Presented herein are system(s) and method(s) for a multiple miss cache. In one embodiment, there is presented a cache system for storing data. The cache comprises a plurality of data words, a plurality of first bits, and a plurality of second bits. The plurality of data words store data. The... Agent: Mcandrews Held & Malloy, Ltd

20090157985 - Accessing memory arrays: A memory controller for controlling access to a memory, said memory comprising at least one memory array, said at least one memory array comprising a plurality of rows and a plurality of columns, access to an element within said memory array being performed by opening a row comprising said element... Agent: Nixon & Vanderhye, PC

20090157984 - Avoiding use of an inter-unit network in a storage system having multiple storage control units: A storage system provides virtual ports, and is able to transfer the virtual ports among physical ports located on multiple storage control units making up the storage system. The storage system is able to manage logical volumes and/or virtual volumes and virtual ports as a group when considering whether to... Agent: Mattingly & Malur, P.C.

20090157988 - Data processing apparatus and data processing method: Disclosed is a data processing apparatus that includes a plurality of ports inputting and outputting a clip including a plurality of types of essence, a memory storing the clip when recording or playing back of the clip from a recording medium, and a generator storing types of essence in separate... Agent: Wolf Greenfield & Sacks, P.C.

20090157986 - Memory controller: A memory controller includes an digitally programmable delay unit having a selectable delay time receiving a read-enable signal and outputting a delayed read-enable signal. The delay time is selected in response to an externally applied delay-control signal. A sampling unit in the memory controller outputs data received from a separate... Agent: F. Chau & Associates, LLC

20090157983 - Method and apparatus for using a variable page length in a memory: A controller, a memory device including a memory array, and a method for accessing the memory device. The method includes, during a first access, activating a first page of the memory array corresponding to a first row address and accessing data from the first page with a first column address.... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Qimonda

20090157987 - System and method for creating self-authenticating documents including unique content identifiers: One embodiment of a method for creating a self-authenticating document includes receiving a request to retrieve a data element identified by a content identifier, identifying a storage location associated with the content identifier, retrieving a data element stored at the storage location, calculating a second content identifier of the retrieved... Agent: White & Case LLP Patent Department

20090157989 - Distributing metadata across multiple different disruption regions within an asymmetric memory system: Metadata that corresponds to application data is distributed across different disruption regions of an asymmetric memory component such that metadata is written in the same disruption region as the application data to which it corresponds. A first block of application data is written to a first disruption region and a... Agent: Fish & Richardson P.C.

20090157990 - Backing-up apparatus, backing-up method, and backing-up program: A backing-up apparatus, upon receiving an instruction to execute backing up, allocates a storage area to store a snapshot to be produced to each time point indicated by the instruction. When the original data is updated after the time point indicated by the instruction, it is checked that the original... Agent: Staas & Halsey LLP

20090157991 - Reliable storage of data in a distributed storage system: The present invention relates to the reliable storage of data within a distributed storage system. A method and system for storing a data unit within a distributed storage system is disclosed, wherein the distributed storage system comprises a plurality of storage elements of unspecified system reliability, a public network interconnecting... Agent: Patti , Hewitt & Arezina LLC

20090157992 - Docbase management system and implementing method thereof: The present invention discloses a docbase management system, including a first module, adapted to parse a received invocation from an application and generate an execution plan which comprises operations on physical storage; a second module, adapted to execute the execution plan to schedule a third module to execute the operations... Agent: Goodwin Procter LLP Attn: Patent Administrator

20090157993 - Mechanism for enabling full data bus utilization without increasing data granularity: A memory is disclosed comprising a first memory portion, a second memory portion, and an interface, wherein the memory portions are electrically isolated from each other and the interface is capable of receiving a row command and a column command in the time it takes to cycle the memory once.... Agent: Shemwell Mahamedi LLP

20090157994 - Memory module with reduced access granularity: A memory module having reduced access granularity. The memory module includes a substrate having signal lines thereon that form a control path and first and second data paths, and further includes first and second memory devices coupled in common to the control path and coupled respectively to the first and... Agent: Shemwell Mahamedi LLP

20090157995 - Dynamic memory management in an rdma context: A method for dynamically managing memory to support one or more processes executing in a remote direct memory access (RDMA) environment is provided. The method includes inserting a descriptor in a shared descriptor table, the descriptor corresponding to a block of memory allocated to a heap by an operating system.... Agent: Patterson & Sheridan, LLP/ibm Svl

20090157996 - Method, system and program product for allocating a global shared memory: A method of operating a data processing system includes each of multiple tasks within a parallel job executing on multiple nodes of the data processing system issuing a system call to request allocation of backing storage in physical memory for global shared memory accessible to all of the multiple tasks... Agent: Dillon & Yudell LLP

20090157998 - Policy based storage appliance virtualization: An embodiment of the invention provides an apparatus and method for a policy-based storage appliance virtualization that identifies the storage space based on a desired storage management operation type. One example of a storage management operation type is the allocation of storage space from a storage appliance(s) to a host(s).... Agent: Perkins Coie LLP

20090157997 - Using in-leaf multiple triangle packing for kd-trees size reduction: Embodiments of a binary layout and packing scheme are disclosed for storing kd-tree information. Information about triangles belonging to the tree leaf may be stored inside the leaf structure itself. Multiple triangles in a corresponding leaf may be stored in the leaf of the kd-tree structure.... Agent: Carrie A. Boone, P.C.

20090157999 - Control mechanism for multi-functional chips: A control mechanism for multi-functional chips is provided. By receiving operation signals from the predefined pins of the different operation functions, the present invention accesses the corresponding storage area in the memory module according to the operation signals without using different memory modules and memory controllers corresponding to different operation... Agent: Lin & Associates Intellectual Property, Inc.

20090158001 - Accessing control and status register (csr): A system may comprise one or more source agents, target agents, and a plurality of directory agents, which may determine the target agent to which one or more transactions generated by the source agents is to be sent. A controller may identify one of a plurality of directory agents to... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20090158000 - Computer system, memory management method and program thereof: A computer system, having a non-volatile storage unit (152), a main storage unit (151), and a data processor (102) including a memory management unit (102A) for managing a program stored in the non-volatile storage unit and the main storage unit to transfer a program stored in the non-volatile storage unit... Agent: Sughrue Mion, PLLC

20090158002 - Network storage device and data read-write control method: An embodiment of the present invention discloses a network storage device including a physical storage medium. The network storage device further includes: a storage controller, configured to map the physical storage medium to sub-logical units and map the sub-logical units to logical units, so as to implement data storing, reading,... Agent: Leydig, Voit & Mayer, Ltd (for Huawei Technologies Co., Ltd)

20090158003 - Structure for a memory-centric page table walker: A design structure embodied in a machine readable storage medium for at least one of designing, manufacturing, and testing a design is provided. The design structure includes a page table walker. The page table walker is moved from its conventional location in the memory management unit associated with the data... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20090158004 - Tlb virtualization method of machine virtualization device, and machine virtualization program: A TLB virtualization method of a machine virtualization device which, in the case where a TLB is shadowed in a virtualization environment, avoids TLB entry conflicts and is capable of improving the performance of a virtualization environment; wherein a hypervisor is executed on a real machine, an OS is operated... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090158005 - Clock encoded pre-fetch to access memory data in clustering network environment: Systems and/or methods that facilitate reading data from a memory component associated with a network are presented. A pre-fetch generation component generates a pre-fetch request based in part on a received read command. To facilitate a reduction in latency associated with transmitting the read command via an interconnect network component... Agent: Amin, Turocy & Calvin, LLP

20090158006 - Facilitating management of layer 2 hardware address table based on packet priority information: A network switching device comprises hardware address table storage space, a priority comparison mechanism, and an address table management mechanism. The hardware address table storage space having a number of entries therein. Each one of the entries within the hardware address table storage space includes respective information designating a priority... Agent: Alcatel Lucent Intellectual Property & Standards

20090150592 - Storage device with multiple management identity and management method thereof: A storage device with multiple management identities and a management method thereof are disclosed. The storage device includes a first storage space corresponding to a first management identity and a second storage space corresponding to a second management identity. By a control unit, the storage device is coupled with the... Agent: Sinorica, LLC

20090150593 - Dynamtic storage hierarachy management: The invention relates to an architecture for optimization that can leverage the several advantages of flash memory or hard disk technology, while simultaneously compensating for associated disadvantages. In a system with a flash module and a hard disk, respective memory can be dynamically allocated as a function of demand, preference,... Agent: Amin, Turocy & Calvin, LLP

20090150598 - Apparatus and method of mirroring firmware and data of embedded system: Disclosed is an apparatus and method of mirroring firmware and data of an embedded system. The embedded system mirrors a boot loader image, a kernel image, a RAM disk image and data that are stored on a main flash memory to be operated onto a secondary flash memory. Therefore, when... Agent: Ampacc Law Group

20090150595 - Balanced programming rate for memory cells: A balanced program rate on NVM cells is achieved by (i) scrambling data bits and user bits; and (ii) shifting ED bits (of data and user bits) according to an incremental shift number, which may be the PBE-counter (which provides an incremental number). ED bits for the LSS may also... Agent: Empk & Shiloh, LLP C/o Landon Ip, Inc.

20090150597 - Data writing method for flash memory and controller using the same: A data writing method for a flash memory is provided. The data writing method includes: dividing a new data into at lease one sub-data by the length of a writing unit; selecting one of a plurality of spare blocks from the flash memory as a substitute block for substituting a... Agent: J C Patents, Inc.

20090150596 - Device identifiers for nonvolatile memory modules: A memory card has a data scrambler that performs a data scrambling operation on data stored in the memory card according to a device ID associated with the memory card. The device ID is either set at the factory and permanently stored in the card, or configurable by a user... Agent: Vierra Magen/sandisk Corporation

20090150600 - Memory system: A memory system includes a nonvolatile memory having a plurality of data blocks each of which is a unit of data erase and has a plurality of pages, each of the pages being a unit of data write, and a controller which checks whether or not the nonvolatile memory has... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090150599 - Method and system for storage of data in non-volatile media: A system and method for managing the storage of data in non-volatile memory is described. In an aspect, the data may be described by metadata and a transaction log file that are checkpointed from a volatile memory into the non-volatile memory. Actions that take place between the last checkpointing of... Agent: Brinks Hofer Gilson & Lione

20090150594 - Method to minimize flash writes across a reset: A method and apparatus described herein are for minimizing flash writes across reset. When a commonly accessed variable is to be updated, an erase conscious value is written to minimize erase operations. As an example, the location for the commonly accessed variable holds consecutive values to represent a usable value... Agent: Intel Corporation C/o Cpa Global

20090150601 - Partial block data programming and reading operations in a non-volatile memory: Data in less than all of the pages of a non-volatile memory block are updated by programming the new data in unused pages of either the same or another block. In order to prevent having to copy unchanged pages of data into the new block, or to program flags into... Agent: Davis Wright Tremaine LLP - Sandisk Corporation

20090150602 - Memory power control: In a memory device to store information, the device includes a memory core to store information, a memory controller to control storage and retrieval of the information, and a regulator coupled to the memory controller and the memory core, wherein the regulator is operable to adjust an internal voltage to... Agent: Haynes And Boone, LLPIPSection

20090150603 - Low power ternary content-addressable memory (tcams) for very large forwarding tables: Ternary content-addressable memories (TCAMs) may be used to obtain a simple and very fast implementation of a router's forwarding engine. The applicability of TCAMs is, however, limited by their size and high power requirement. The present invention provides an improved method and associated algorithms to reduce the power needed to... Agent: Fleit Gibbons Gutman Bongini & Bianco P.l.

20090150604 - Semiconductor device: The range-specified IP addresses are effectively stored to reduce the number of necessary entries thereby the memory capacity of TCAM is improved. The representative means of the present invention is that: the storage information (entry) and the input information (comparison information or search key) are the common block code such... Agent: Miles & Stockbridge PC

20090150605 - Apparatus, system, and method for converting a storage request into an append data storage command: An apparatus, system, and method are disclosed for converting a storage request to an append data storage command. A storage request receiver module receives a storage request from a requesting device. The storage request is to store a data segment onto a data storage device. The storage request includes source... Agent: Kunzler & Mckenzie

20090150606 - Information processing system having volume guard function: In a system comprising a first storage system providing plural first logical volumes including real logical volume and a virtual logical volume with a host, a second storage system having a second logical volume, and a management computer, when the first storage system receives an access request to the virtual... Agent: Brundidge & Stanger, P.C.

20090150607 - Disk controller configured to perform out of order execution of write operations: A controller for a disk drive includes first memory storing first write operations and second write operations received in a first order. A processor arranges the first write operations and the second write operations in a second order based on respective track sectors associated with the first and the second... Agent: Harness, Dickey & Pierce P.L.C

20090150608 - Storage system and operation method of storage system: The present invention is able to improve the processing performance of a storage system by respectively virtualizing the external volumes and enabling the shared use of such external volumes by a plurality of available virtualization storage devices. By virtualizing and incorporating the external volume of an external storage device, a... Agent: Mattingly & Malur, P.C.

20090150609 - Disk array apparatus and method for controlling the same: An apparatus includes a controller and a plurality of disk drives. The controller has a communication control unit for accepting a data input/output request, a disk controller unit for controlling a disk drive, and a cache memory for temporarily storing data transferred between the communication control unit and the disk... Agent: Brundidge & Stanger, P.C.

20090150612 - Apparatus and system for displaying an image in conjunction with a removable memory cartridge: An apparatus and system are disclosed for displaying an image in conjunction with a removable memory cartridge. In one embodiment, the apparatus includes a housing that encloses a memory device for storing content data and a protrusion extending from the housing, the protrusion configured to display an image. The apparatus... Agent: Kunzler & Mckenzie

20090150611 - Management of external memory functioning as virtual cache: A method and apparatus for managing the caching of data on an auxiliary memory of a computer. Pages of data may be cached on an auxiliary memory, such as a flash memory, at a virtual level using an identifier that does not involve a physical address of the pages on... Agent: Wolf Greenfield (microsoft Corporation) C/o Wolf, Greenfield & Sacks, P.C.

20090150610 - Two-in-one memory card: Two independent terminal areas and a memory unit are contained in a single casing and provided for users to use a memory card separately. A terminal area is disposed separately on two corresponding sides of the memory card, and a control circuit and two memories are installed in the memory... Agent: Hdls Patent & Trademark Services

20090150613 - Memory management: A memory manager that compacts a memory heap and reclaims space allocated to dead entities is disclosed. The memory manager may include threads of a first phase, threads of a second phase, and threads of a third phase. The threads of the first phase may assign a target address to... Agent: Barnes & Thornburg, LLP

20090150615 - Method and structure for producing high performance linear algebra routines using streaming: A method (and structure) for executing a linear algebra subroutine on a computer having a cache, includes streaming data for matrices involved in processing the linear algebra subroutine such that data is processed using data for a first matrix stored in the cache as a matrix format and data from... Agent: Mcginn Intellectual Property Law Group, PLLC

20090150614 - Non-volatile cache in disk drive emulation: A method and apparatus for deferring media writes for emulation drives are provided. By deferring media writes using non-volatile storage, the performance penalty associated with RMW operations may be minimized. Deferring writes may allow the RMW operations to be done while the disk drive is idle. Further, deferring writes may... Agent: Patterson & Sheridan, L.L.P.

20090150616 - System and method of using threads and thread-local storage: A system is provided that includes processing logic and a memory management module. The memory management module is configured to allocate a portion of memory space for a thread stack unit and to partition the thread stack unit to include a stack and a thread-local storage region. The stack is... Agent: Ibm Corp Svl (jgt) C/o Toler Law Group

20090150617 - Cache mechanism and method for avoiding cast out on bad victim select and recycling victim select operation: A method, apparatus, and computer for identifying selection of a bad victim during victim selection at a cache and recovering from such bad victim selection without causing the system to crash or suspend forward progress of the victim selection process. Among the bad victim selection addressed are recovery from selection... Agent: Dillon & Yudell LLP

20090150618 - Structure for handling data access: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design is provided. The design structure generally includes a computer system that includes a CPU, a storage device, circuitry for providing a speculative access threshold corresponding to a selected percentage of the total number... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20090150619 - Coherent caching of local memory data: A multi processor system 1 comprises a plurality of processors 21 to 25, a system bus 30 and a main system memory 40. Each processor 21 to 25 is connected to a respective cache memory 41 to 45, with each cache memory 41 to 45 in turn being connected to... Agent: Philips Intellectual Property & Standards

20090150620 - Controlling cleaning of data values within a hardware accelerator: A data processing apparatus 2 includes a programmable general purpose processor 10 coupled to a hardware accelerator 12. A memory system 14, 6, 8 is shared by the processor 10 and the hardware accelerator 12. Memory system monitoring circuitry 16 is responsive to one or more predetermined operations performed by... Agent: Nixon & Vanderhye, PC

20090150621 - Bank sharing and refresh in a shared multi-port memory device: A method and system for sharing banks of memory in a multi-port memory device between components is provided. The multi-port memory device includes multiple ports to which components of a system are attached, and multiple banks of memory within the multi-port memory device that are shared by each of the... Agent: Silicon Image/bstz Blakely Sokoloff Taylor & Zafman LLP

20090150623 - Semiconductor device and test mode control circuit: The present invention provides a semiconductor device which sufficiently ensures the security and prevents the decline of the yield even when the failure or the like causes a bit change in the data of the test mode control flag stored in the nonvolatile memory. The semiconductor device of the present... Agent: Greenblum & Bernstein, P.L.C

20090150622 - System and method for handling data requests: A system and method for handling speculative read requests for a memory controller in a computer system are provided. In one example, a method includes the steps of providing a speculative read threshold corresponding to a selected percentage of the total number of reads that can be speculatively issued, and... Agent: Robert A. Voigt, Jr. Winstead Sechrest & Minick PC

20090150624 - System, apparatus, and method for modifying the order of memory accesseses: Systems and methods for controlling memory access operation are disclosed. The system may include one or more requestors performing requests to memory devices. Within a memory controller, a request queue receives requests from a requestor, a bank decoder determines a destination bank, and the request is placed in an appropriate... Agent: Trask Britt, P.C./ Micron Technology

20090150625 - Multistage virtual memory paging system: Hierarchically paging data in a computer system wherein, when evicting a page of data from the computer system main storage, evicting the page to a first paging store (preferably NVRAM). When evicting a page of data from the first paging store, evicting the page to a second paging store (such... Agent: International Business Machines Corporation Richard Lau

20090150628 - Backup apparatus, backup method, and file reading apparatus: Proposed are a backup apparatus and a backup method capable of improving the backup performance, as well as a file reading apparatus capable of improving the file reading performance. As a result of determining a read sequence upon reading the respective files from a disk device based on a physical... Agent: Stanley P. Fisher Reed Smith LLP

20090150630 - Computer system and control method for the computer system: A computer system including a first storage system connected to a first host computer, a second storage system connected to a second host computer and a third storage system connected to the first and second storage systems. The second storage system sets transfer setting before an occurrence of a failure,... Agent: Brundidge & Stanger, P.C.

20090150626 - Determining whether to use a full volume or repository for a logical copy backup space: Provided are a method, system, and article of manufacture for determining whether to use a full volume or repository for a logical copy backup space. A determination is made of a source volume to backup using a logical copy operation. The logical copy operation is completed upon indicating the source... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20090150627 - Determining whether to use a repository to store data updated during a resynchronization: Provided are a method, system, and article of manufacture for determining whether to use a repository to store data updated during a resynchronization. Writes to a primary storage are transferred to a secondary storage. A logical copy of the secondary storage as of a point-in-time is established. Writes to the... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20090150629 - Storage management device, storage system control device, storage medium storing storage management program, and storage system: A storage management device includes a management unit for managing a storage device assigned thereto and a temporary storage unit assigned thereto. The management unit comprises a backup unit for, when data is written into the storage device, storing the data in the previously assigned temporary storage unit before the... Agent: Greer, Burns & Crain

20090150631 - Self-protecting storage device: Described are a self-protecting storage device and method that can be used to monitor attempts to access protected information. Access is allowed for authorized host systems and devices while unauthorized access is prevented. Authorization use includes inserting a watermark into access commands, such as I/O requests, sent to the storage... Agent: Guerin & Rodriguez, LLP

20090150632 - directory and methods of use: A method of arranging data in a directory, the directory being adapted to interface with disk storage, the method includes arranging data of a directory in a format that is configured to enable the directory data to be mapped by an operating system. The data of the directory is stored... Agent: Baker Botts L.L.P.

20090150633 - Apparatus for managing memory in real-time embedded system and method of allocating, deallocating and managing memory in real-time embedded system: An apparatus for managing memory in a real-time embedded system and a method of allocating, deallocating and managing memory in a real-time embedded system. The apparatus includes a defragmentation unit performing a defragmentation task according to a predetermined priority to collect together memory fragments, and a memory manager allocating or... Agent: Staas & Halsey LLP

20090150634 - Method and system for performing memory copy function on a cell processor: Methods copying data from one location to another in a main memory of a cell processor are disclosed. A portion of the data is transferred a first main memory location to the local store of one or more SPU and then transferred from the local store to a second main... Agent: Joshua D. Isenberg Jdi Patent

20090150635 - Command control for synchronous memory device: Systems, methods, and circuits for command control for synchronous memory device are disclosed. In one embodiment, a memory device comprises a first synchronous memory controlled by a second group of commands which includes a first command receiving section for receiving a first group of commands, and a second command receiving... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20090150636 - Memory subsystem with positional read data latency: A memory subsystem with positional read data latency that includes one or more memory modules, a memory controller and one or more memory busses is provided. The memory controller includes instructions for providing positional read data latency. The memory modules and the memory controller are interconnected via the memory busses.... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20090150638 - Apparatus for supporting creation of access path from host to logical volume: A path creation support apparatus acquires beforehand, from a storage system or a host, either a portion of the parameters required for path creation or parameter decision information which is information for deciding this portion of the parameters. The path creation support apparatus decides the portion of the parameters based... Agent: Stanley P. Fisher Reed Smith LLP

20090150637 - Method and system for dynamically allocating read and write sequence randomizer: A data formatting system and method to improve data efficiency and integrity in a hard disk are disclosed. One embodiment provides a disk drive system having a plurality of lookup tables which store a plurality of randomizer seeds which may be dynamically encoded into the preamble field of a customer... Agent: Hitachi C/o Wagner Blecher LLP

20090150639 - Management apparatus and management method: Proposed are a management apparatus and a management method capable of supporting and executing storage operation and management capable of improving the utilization ratio of storage resources. With this management apparatus for managing a storage apparatus equipped with a function for providing a virtual logical volume to a host system,... Agent: Brundidge & Stanger, P.C.

20090150640 - Balancing computer memory among a plurality of logical partitions on a computing system: Methods, apparatus, and products are disclosed for balancing computer memory among a plurality of logical partitions on a computing system, the computing system having installed upon it a hypervisor, the hypervisor having allocated computer memory and computer storage to each of the logical partitions, that include: receiving, in a memory... Agent: Ibm (roc-blf)

20090150641 - Apparatus, system, and method for efficient mapping of virtual and physical addresses: An apparatus, system, and method are disclosed for efficiently mapping virtual and physical addresses. A forward mapping module uses a forward map to identify physical addresses of data of a data segment from a virtual address. The data segment is identified in a storage request. The virtual addresses include discrete... Agent: Kunzler & Mckenzie

20090150642 - Indexing page attributes: Embodiments of the invention provide methods and apparatus for increasing the number of page attributes specified by a page table while minimizing an increase in size of the page table. According to embodiments of the invention, attribute index bits may be included within a page table and may be used... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20090150643 - Sas reference phys for virtualization and traffic isolation: Enabling virtualization in a SAS expander is disclosed. For each SAS address to be virtualized through one or more physical or virtual Phy, a reference Phy associated with each SAS address is created within the expander. Next, a route table is generated that includes an entry for each of the... Agent: Emulex Design & Manufacturing Corporation C/o Morrison & Foerster LLP

20090150644 - Apparatus and method for reducing memory access conflict: Provided are an apparatus and a method of reducing memory access conflict. An apparatus for reducing memory access conflict when a plurality of data processing elements perform simultaneous access to a memory including a plurality of pages, each of which includes a plurality of subpages, the apparatus comprising: an access... Agent: Ampacc Law Group

20090150645 - Data processing apparatus and address space protection method: a data processing apparatus includes: an instruction execution section; an instruction protection information storage section that stores instruction protection information for specifying at least one partial address space in an instruction address space for storing instructions executed by the instruction execution section; a data protection information storage section that stores... Agent: Mcginn Intellectual Property Law Group, PLLC

20090150646 - Memory array search engine: Systems and/or methods that facilitate a search of a memory component(s) to locate a desired logical block address (LBA) associated with a memory location in a memory component are presented. Searches to locate a desired LBA(s) in a memory component(s) associated with a processor component are offloaded and controlled by... Agent: Amin, Turocy & Calvin, LLP

20090144481 - Enhanced microprocessor or microcontroller: A microcontroller device has a central processing unit (CPU); a data memory coupled with the CPU divided into a plurality of memory banks, a plurality of special function registers and general purpose registers which may be memory-mapped, wherein at least the following special function registers are memory-mapped to all memory... Agent: Baker Botts, LLP

20090144482 - Configuration identification exposure in virtual machines: In one embodiment, a computer system comprises a host machine comprising a plurality of compute resources, at least one secure memory location coupled to the host machine, wherein the secure memory location stores host machine configuration data, and a virtual machine host module coupled to the host machine. The virtual... Agent: Hewlett Packard Company

20090144483 - Disk access system switching device: A disk access system switching device is interposed between a first driver accessing an OS boot disk by use of a first disk access system, a second driver accessing by use of a second disk access system capable of accessing the disk faster than by the first disk access system,... Agent: Fujitsu Patent Center C/o Cpa Global

20090144484 - Memory system and memory chip: A memory system includes a memory which asserts a high-power-consumption operation output when an amount of the power consumption is high in internal operations in respective operations, and a controller which has an interface function between a host and the memory and receives the high-power-consumption operation output. The controller switches... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090144485 - Process for automatic dynamic reloading of data flow processors (dfps) and units with two- or three-dimensional programmable cell architectures (fpgas, dpgas, and the like): In a data-processing method, first result data may be obtained using a plurality of configurable coarse-granular elements, the first result data may be written into a memory that includes spatially separate first and second memory areas and that is connected via a bus to the plurality of configurable coarse-granular elements,... Agent: Michelle M. Carniaux, Esq. Kenyon & Kenyon

20090144486 - Direct interconnection between processor and memory component: Conventional processor and memory configurations place holes into silicon or use expensive multi-layer-laminates/substrates to connect the processor with memory. Using a direct contact between the memory and processor allows for signaling between the two units. By judicious arrangement of the contact areas as well as employing other structures such as... Agent: Amin, Turocy & Calvin, LLP

20090144489 - Electronic device and program for operating the same: A navigation device realizes such processing as map display and route guidance based on map data stored in a memory card. The data in the memory card tends to be volatilized with an increase in the frequency of reading of data. Therefore, the data that are highly frequently read out... Agent: Posz Law Group, PLC

20090144488 - Memory card and method for handling data updating of a flash memory: The invention provides a method for handling data updating of a flash memory. In one embodiment, the flash memory comprises a mother block comprising a plurality of updated pages to be updated. First, a spare block, recording no data, is popped as a file allocation table (FAT) block corresponding to... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090144487 - Storage emulator and method thereof: A storage emulator and method thereof are disclosed. The storage emulator allows a host system to access a storage unit connected to a storage system as if the storage unit is directly coupled to the host system. The storage emulator includes a virtual storage emulating module, a storage-managing unit, and... Agent: Austin Rapp & Hardman

20090144490 - Method, apparatus and computer program product for providing improved memory usage: An apparatus for providing improved memory usage may include a processor. The processor may be configured to receive media content data, direct storage of up to a predetermined amount of a most recently received portion of the media content data into a first memory reservoir, and, in response to storing... Agent: Alston & Bird LLP

20090144491 - Method and system for implementing prioritized refresh of dram based cache: A method for implementing prioritized refresh of a multiple way, set associative DRAM based cache includes identifying, for each of a plurality of sets of the cache, the existence of a most recently used way that has not been accessed during a current assessment period; and for each set, refreshing... Agent: Cantor Colburn LLP-ibm Burlington

20090144492 - Structure for implementing dynamic refresh protocols for dram based cache: A hardware description language (HDL) design structure embodied on a machine-readable data storage medium includes elements that when processed in a computer aided design system generates a machine executable representation of a device for implementing dynamic refresh protocols for DRAM based cache. The HDL design structure further includes a DRAM... Agent: Cantor Colburn LLP-ibm Burlington

20090144493 - Circular buffer maping: Techniques for mirroring circular buffer mapping are discussed. Mirroring mapping for buffered message data, such as streaming data which may permit rapid data access for message data is circularly buffered. A first map and a second map may be linearly arranged in virtual memory space such that a reading of... Agent: Lee & Hayes, PLLC

20090144494 - Storage-access apparatus for storing products and storage system thereof: A storage-access apparatus includes a first support device including a first base; at least one first storage-access device and at least one first storage device, disposed on the first base and arranged in a first circle; a second support device including a second base; at least one second storage-access device... Agent: Bacon & Thomas, PLLC

20090144495 - Using external memory devices to improve system performance: The invention is directed towards a system and method that utilizes external memory devices to cache sectors from a rotating storage device (e.g., a hard drive) to improve system performance. When an external memory device (EMD) is plugged into the computing device or onto a network in which the computing... Agent: Marshall, Gerstein & Borun LLP (microsoft)

20090144498 - Data storage system for storing data in different types of data storage media: A data storage system for storing data includes a data storage medium and a data interface that communicates with the data storage medium. The data interface is configured to place data into a logical data capsule having a defined size, where the data placed into the logical data capsule can... Agent: Morrison & Foerster LLP

20090144496 - Fast accessible compressed thin provisioning volume: A computerized data storage system includes at least one storage device including a nonvolatile writable medium; a cache memory operatively coupled to the storage port and including a data storing area and a data management controller and a storage port. The storage port is operable to connect to a host... Agent: Sughrue Mion, PLLC

20090144497 - Redundant storage of data on an array of storage devices: A disk array control apparatus controls writing of data onto an array of N storage devices such as disk drives, where N is an integer of 3 or greater. Each storage device writes data with a granularity of a sector having a predetermined sector size. The apparatus writes data with... Agent: Harness, Dickey & Pierce, P.L.C

20090144499 - Preemptive write-inhibition for thin provisioning storage subsystem: Write requests from host computers are processed in relation to a thin provisioning storage subsystem. A write request is received from a host computer. The write request identifies a first virtual disk that has been previously assigned to the host computer. It is determined whether the first virtual disk has... Agent: Law Offices Of Michael Dryja (san Jose)

20090144500 - Store performance in strongly ordered microprocessor architecture: Apparatus and methods relating to store operations are disclosed. In one embodiment, a first storage unit is to store data. A second storage unit is to store the data only after it has become detectable by a bus agent. Moreover, the second storage unit may store an index field for... Agent: Caven & Aghevli LLC C/o Cpa Global

20090144501 - Data storage system with complex memory and method of operating the same: A data storage system and a data storing method for the data storage system are provided. The data storage system includes a host unit, a storage unit, and a first input/output bus functioning as an interface between the host unit and the storage unit. The storage unit includes a non-volatile... Agent: Staas & Halsey LLP

20090144502 - Meta-architecture defined programmable instruction fetch functions supporting assembled variable length instruction processors: In an implementation, a processing system includes an instruction fetch (IF) memory storing IF instructions; an arithmetic/logic (AL) instruction memory (IMemory) storing AL instructions; and a programmable instruction fetch mechanism to generate IMemory instruction addresses, from IF instructions fetched from the IF memory, to select AL instructions to be fetched... Agent: Sadler, Breen, Morasch & Colby, Ps

20090144505 - Memory device: The present invention relates to a memory device, in particular, to a memory device comprising a cache memory with a predetermined amount of cache sets, each cache set comprising a predetermined amount of cache lines. Each cache line is operable to indicate a cache data injection into the particular cache... Agent: Ibm Corporation (swp)

20090144503 - Method and system for integrating sram and dram architecture in set associative cache: A method of integrating a hybrid architecture in a set associative cache having a first type of memory structure for one or more ways in each congruence class, and a second type of memory structure for the remaining ways of the congruence class, includes determining whether a memory access request... Agent: Cantor Colburn LLP-ibm Burlington

20090144504 - Structure for implementing refreshless single transistor cell edram for high performance memory applications: A design structure embodied in a machine readable medium used in a design process includes a cache structure having a cache tag array associated with a eDRAM data cache comprising a plurality of cache lines, the cache tag array having an address tag, a valid bit and an access bit... Agent: Cantor Colburn LLP-ibm Burlington

20090144506 - Method and system for implementing dynamic refresh protocols for dram based cache: A method for implementing dynamic refresh protocols for DRAM based cache includes partitioning a DRAM cache into a refreshable portion and a non-refreshable portion, and assigning incoming individual cache lines to one of the refreshable portion and the non-refreshable portion of the cache based on a usage history of the... Agent: Cantor Colburn LLP-ibm Burlington

20090144507 - Apparatus and method for implementing refreshless single transistor cell edram for high performance memory applications: An apparatus for implementing a refreshless, embedded dynamic random access memory (eDRAM) cache device includes a cache structure having a cache tag array associated with a DRAM data cache with a plurality of cache lines, the cache tag array having an address tag, a valid bit and an access bit... Agent: Cantor Colburn LLP-ibm Burlington

20090144508 - Pci express address translation services invalidation synchronization with tce invalidation: A PCI Express (PCIe) computer system utilizes address translation services to translate virtual addresses from I/O device adaptors to physical addresses of system memory. A combined memory controller and host bridge uses a translation agent to convert the I/O addresses via translation control entries (TCEs) in a TCE table (also... Agent: Ibm Corporation (jvm)

20090144509 - Memeory sharing between two processors: A wireless device includes a memory having a data port configured to facilitate access to the memory and at least two processing units which are configured to share the memory. The device also includes an arbiter (separate from at least one of the processing units) configured to facilitate sharing of... Agent: Foley & Lardner LLP

20090144510 - Vm inter-process communications: A method for enabling inter-process communication between a first application and a second application, the first application running within a first context and the second application running within a second context of a virtualization system is described. The method includes receiving a request to attach a shared region of memory... Agent: Vmware, Inc.

20090144511 - Enhanced microprocessor or microcontroller: An n-bit microprocessor device has an n-bit central processing unit (CPU); a plurality of special function registers and general purpose registers which are memory-mapped to a plurality of banks, with at least two 16-bit indirect memory address registers which are accessible by the CPU across all banks; a bank access... Agent: Baker Botts, LLP

20090144512 - Memory access control device, control method, and program: A data conversion unit divides data to be written to, for example, a non-volatile memory having a limited number of times of rewriting including erasure of a memory device into divided write data having a predetermined bit width and subjects each of the divided write data to conversion to conversion... Agent: Greer, Burns & Crain

20090144513 - Database update method: According to some embodiments a system and a method are provided to storing a plurality of data, the data comprising a plurality of original data elements and corresponding modified data elements. The plurality of original data elements may be automatically compared against editable field data in one or more editable... Agent: Pitney Bowes Inc. 35 Waterview Drive

20090144514 - Method of automated operating system deployment for a network of multiple data processors: A method of deploying a new operating system on a plurality of data processors. Hardware and driver information is determined from the data processors. A general disk image for all of the data processors is prepared in a preinstallation environment. Hardware and software components for a specific target data processor... Agent: Douglas H. Pauley Pauley Petersen & Erickson

20090144515 - Method and system thereof for restoring virtual desktops: A method and system thereof for restoring a virtual desktop. The method comprising generating a try-snapshot upon selection of a restore point of the virtual desktop, wherein the try-snapshot is an empty file; linking the try-snapshot subsequently to a snapshot of the restore point without modifying snapshots created after the... Agent: Red Hat/bstz Blakely Sokoloff Taylor & Zafman LLP

20090144516 - Systems and methods for managing data storage media: Systems and methods are provided for passive data migration. A method is presented for distributing data that includes acts of identifying a date by which a computer readable medium is to be decommissioned and restricting distribution of data to the computer readable medium to reach a state of data content... Agent: Lowrie, Lando & Anastasi, LLP

20090144517 - Data processing apparatus and data processing system: Decrease in throughput performance called a “jamming” in a memory device is prevented. There is provided a timing generation part which gives, based on a request signal outputted for each unit of the data processing from a data processing part, an output timing for a burst transfer request to a... Agent: Miles & Stockbridge PC

20090144518 - System and method for storage management: A system and method for monitoring the storage estate of an organization using an interactive website that is configured to produce and display a novel set of key performance indicators (KPIs) related to the storage estate, including KPIs related to data collected from at least one of storage area network... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20090144519 - Multithreaded processor with lock indicator: Systems and methods including a multithreaded processor with a lock indicator are disclosed. In an embodiment, a system includes means for indicating a lock status of a shared resource in a multithreaded processor. The system includes means for automatically locking the shared resource before processing exception handling instructions associated with... Agent: Qualcomm Incorporated

20090144520 - Method and apparatus for selecting a data item: A method of selecting a data item from a memory within a first device, the method comprising the steps of evaluating within the first device a function of an input argument so as to form an output value, using the output value to select a data item from the memory... Agent: Hewlett Packard Company