|Electrical computers and digital processing systems: memory patents - Monitor Patents|
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Electrical computers and digital processing systems: memory March listing by industry category 03/09Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 03/26/2009 > patent applications in patent subcategories. listing by industry category
20090083473 - Function-providing system: From among identical modules stored on a module storage 112 and a module storage 212, an authenticated printing management module 130 selects the module with higher level information. For example, an ID authentication module 132 is stored in both the module storage 112 of an MFP 10 and the module... Agent: Sughrue Mion, PLLC
20090083475 - Apparatus and method for updating firmware stored in a memory: The invention provides a method for updating firmware stored in a memory. In one embodiment, the memory is divided into a plurality of blocks, and the firmware to be updated with a new image version. First, a first data block is obtained from the new image version, and a second... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP
20090083474 - File allocation table management: In one embodiment, a storage controller comprises a first port that provides an interface to a host computer, a second port that provides an interface a storage device, a processor, and a flash memory module communicatively connected to the processor and comprising logic instructions which, when executed by the processor,... Agent: Hewlett Packard Company
20090083478 - Integrated memory management and memory management method: An integrated memory management device according to an example of the invention comprises an acquiring unit acquiring a read destination logical address from a processor, an address conversion unit converting the read destination logical address into a read destination physical address of a non-volatile main memory, an access unit reading,... Agent: SprinkleIPLaw Group
20090083477 - Method and apparatus for formatting portable storage device: A method and apparatus for formatting a portable storage device, which are capable of performing formatting optimized for a non-volatile memory of the portable storage device. The method includes: detecting whether file system information is initialized when formatting of the non-volatile memory is started; if the initialization of the non-volatile... Agent: Stein, Mcewen & Bui, LLP
20090083476 - Solid state disk storage system with parallel accesssing architecture and solid state disck controller: A solid state disk (SSD) storage system with a parallel accessing architecture, including a SSD controller and a plurality of transmission interfaces of a predetermined bit number and bandwidth, and a solid state disk controller thereof are provided. The SD controller forms channels for transmitting control signals and data with... Agent: J C Patents, Inc.
20090083479 - Multiport semiconductor memory device and associated refresh method: A semiconductor memory device used in a multiprocessor system is configured to perform a partial refresh operation based on the state of an access port instead of performing a refresh operation per memory bank via a bank address. The multiprocessor system includes a plurality of processors and the memory device... Agent: Volentine & Whitt PLLC
20090083480 - Storage system: The present invention comprises a memory, a plurality of access portions for accessing the memory, a memory adapter for controlling access to the memory from the plurality of access portions, and a response-type path (R path) and a throughput-type path (T path) which communicatively connect the respective access portions, and... Agent: Stanley P. Fisher Reed Smith LLP
20090083482 - Increasing the speed at which flash memory is written and read: Flash memory often cannot be written at speeds approaching those of rotating magnetic storage speeds. This embodiment permits normal NAND flash to be written much faster and to be read at speeds exceeding typical speeds and through put for normal hard disk storage and enables these speeds while removing incremental... Agent: Law Office Of Scott C Harris Inc
20090083481 - Method for mapping write operation of raid device: A method for mapping a write operation of an RAID device, includes flowing steps, initiating a mirroring device built in each member disk of the RAID device; activating a kernel thread, for monitoring the operation state of the RAID device, and recording current usage information; and if an incorrect write... Agent: Workman Nydegger 1000 Eagle Gate Tower
20090083485 - Nonvolatile memory with self recovery: A nonvolatile memory array includes two or more devices, each device containing data that is scrambled using a different scrambling scheme. When the same data is provided and stored in both devices, different data patterns occur in each device, so that if one of the patterns causes data pattern induced... Agent: Weaver Austin Villeneuve Sampson LLP
20090083483 - Power conservation in a raid array: Power conservation in a redundant array of inexpensive drives (‘RAID array’) that preserve RAID functionality, the RAID array including RAID subarrays of a same RAID specification, including powering off a drive in at least one of the RAID subarrays; responsive to a write request directed to a particular subarray containing... Agent: Ibm (rps-blf) C/o Biggers & Ohanian, LLP
20090083484 - System and method for zoning of devices in a storage area network: A system and method for performing zoning of devices, such as Serial Attached SCSI (SAS) devices, for example, in a storage area network (SAN) in which all host systems of the SAN are automatically mapped to all of the storage systems is provided. Mechanisms for automatically mapping backend storage enclosures... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.
20090083487 - Maintaining data stored in a memory module when transferring the memory module from a first controller to a second controller: To transfer a memory module between controllers, an external power source is connected to a memory module mounted to a first controller. The memory module is removed from the first controller with the external power source connected to the memory module to maintain data stored in volatile memory of the... Agent: Hewlett Packard Company
20090083486 - Testing device of card reading interface and testing method thereof: A testing device and method of card reading interface are applied to a card reading interface including a plurality of memory cards, and are used to integrate memory card interfaces in a memory card slot. The testing device includes memory cards, a switching unit, a connecting part, and a connecting... Agent: Workman Nydegger 1000 Eagle Gate Tower
20090083488 - Enabling speculative state information in a cache coherency protocol: In one embodiment, the present invention includes a method for receiving a bus message in a first cache corresponding to a speculative access to a portion of a second cache by a second thread, and dynamically determining in the first cache if an inter-thread dependency exists between the second thread... Agent: Trop, Pruner & Hu, P.C.
20090083489 - L2 cache controller with slice directory and unified cache structure: A cache memory logically partitions a cache array having a single access/command port into at least two slices, and uses a first directory to access the first array slice while using a second directory to access the second array slice, but accesses from the cache directories are managed using a... Agent: Ibm Corporation (jvm)
20090083490 - System to improve data store throughput for a shared-cache of a multiprocessor structure and associated methods: A system to improve data store throughput for a shared-cache of a multiprocessor structure that may include a controller to find and compare a last data store address for a last data store with a next data store address for a next data store. The system may also include a... Agent: International Business Machines Corporation
20090083491 - Storage system and associated methods: A storage system may include storage, a main pipeline to carry data for the storage, and a store pipeline to carry data for the storage. The storage system may also include a controller to prioritize data storage requests for the storage based upon available interleaves and which pipeline is associated... Agent: International Business Machines Corporation
20090083492 - Cost-conscious pre-emptive cache line displacement and relocation mechanisms: A hardware based method for determining when to migrate cache lines to the cache bank closest to the requesting processor to avoid remote access penalty for future requests. In a preferred embodiment, decay counters are enhanced and used in determining the cost of retaining a line as opposed to replacing... Agent: Ference & Associates LLC
20090083494 - Probabilistic technique for consistency checking cache entries: A facility for determining whether to consistency-check a cache entry is described. The facility randomly or pseudorandomly selects a value in a range. If the selected value satisfies a predetermined consistency-checking threshold within the range, the facility consistency-checks the entry, and may decide to propagate this knowledge to other cache... Agent: Knobbe, Martens, Olson & Bear, LLP
20090083493 - Support for multiple coherence domains: A number of coherence domains are maintained among the multitude of processing cores disposed in a microprocessor. A cache coherency manager defines the coherency relationships such that coherence traffic flows only among the processing cores that are defined as having a coherency relationship. The data defining the coherency relationships between... Agent: Townsend And Townsend And Crew, LLP
20090083495 - Memory circuit with ecc based writeback: Provided herein are circuits incorporating a dynamic technique to minimize power overhead with writeback. In some embodiments, error-correction-code (ECC) is used to dynamically detect bit failures and use that information to identify memory sub-sections to be enabled for writeback.... Agent: Intel Corporation C/o Intellevate, LLC
20090083496 - Method for improved performance with new buffers on numa systems: A method and apparatus are provided for managing buffer allocations in a multiple processor computer system. A cache invalidate command is issued in response to a buffer allocation from a remote processor, wherein the cache lines present in the buffer allocation must be invalidated by the remote processor before data... Agent: Lieberman & Brandsdorfer, LLC
20090083497 - Multi-media processor cache with cahe line locking and unlocking: The disclosure relates to techniques for locking and unlocking cache lines in a cache included within a multi-media processor that performs read-modify-write functions using batch read and write requests for data stored in either an external memory or an embedded memory. The techniques may comprise receiving a read request in... Agent: Qualcomm Incorporated
20090083500 - Memory controller and method for coupling a network and a memory: A memory controller (SMC) is provided the for coupling a memory (MEM) to a network (N). The network (N) comprises at least one network interface (PCIEI) having network interface buffers (TPB, FCB) for implementing a flow control across the network (N). The memory controller (SMC) comprises a buffer managing unit... Agent: Nxp, B.v. Nxp Intellectual Property Department
20090083499 - Ordered storage structure providing enhanced access to stored items: An ordered storage structure implemented based on a content addressable memory (CAM). In an embodiment, a set of identifiers are formed with an order matching a desired access order for items. Each item is stored with a corresponding identifier in an entry of the CAM, with the identifiers being stored... Agent: Nvidia C/o Murabito, Hao & Barnes LLP
20090083498 - Programmable processor and method with wide operations: A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are... Agent: Mcdermott Will & Emery LLP
20090083501 - Cancellation of individual logical volumes in premigration chains: Provided are techniques for cancellation of premigration of a member in a chain. A set of premigration messages are received, wherein a separate premigration message is received for each logical volume in a chain of logical volumes. While processing the premigration messages in order of receipt of each of the... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37
20090083502 - Storage system and data management method: Provided are a storage system and data management method capable of improving the usage efficiency of a storage extent. With this storage system, a first storage apparatus dynamically allocates a storage extent to the first volume and sends data written by the host system in the first volume to the... Agent: Stanley P. Fisher Read Smith LLP
20090083504 - Data integrity validation in storage systems: A data storage method comprises storing first data in at least a first data chunk, wherein the first data chunk is a logical representation of one or more sectors on at least a first disk drive in a storage system; storing first metadata, associated with the first data, in at... Agent: CenturyIPGroup, Inc. [ibm Us]
20090083503 - System of creating logical volume and method thereof: A system of creating logical volume and method thereof is used to solve the problems such as creation steps are complicated, a space of storage medium is wasted and the number of snapshots to be created is limited. An available logical volume space and a timestamp storage area are allocated... Agent: Morris Manning Martin LLP
20090083506 - Method and system for memory thermal load sharing using memory on die termination: Memory component temperature information is used to implement a method for ODT (on die termination) thermal load management. A respective temperature of a plurality of memory components are accessed, and based on this temperature, an ODT cycle is directed to a first of the memory components to avoid imposing a... Agent: Murabito Hao & Barnes LLP
20090083505 - System and method for achieving protected region within computer system: A system and method for achieving one or more protected regions within a computer system having multiple partitions are disclosed. In at least some embodiments, the system includes an intermediary device for use within the computer system having the multiple partitions. The intermediary device includes a fabric device, and a... Agent: Hewlett Packard Company
20090083507 - Shift-add mechanism: A method to perform a shift-add operation on two values loaded in two memories of a processor where the first memory has a low bit (LB) and a high bit (HB). If the LB is zero, then this is case (1), if the HB is also zero, shifting the first... Agent: Henneman & Associates, PLC
20090083509 - Memory management using garbage collection of scoped memory: Mechanisms for memory management in a scoped memory system are provided. The scoped memory system includes a scoped memory area for the allocation of objects therein for access by one or more software threads in execution. The scoped memory area has an associated thread count for indicating that the scoped... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.
20090083508 - System as well as method for managing memory space: In order to provide a system (100) for managing memory space (22), the system comprising—at least one central processing unit (10) for executing at least one first task (50) and at least one second task (60),—at least one memory unit (20), in particular at least one cache,—being connected with the... Agent: Philips Intellectual Property & Standards
20090083510 - Method, system, and article of manufacture for returning physical volumes: Provided are a method, system and article of manufacture for return processing in storage pools. A plurality of physical volumes are allocated to a first storage pool. A determination is made whether the first storage pool has more than a threshold number of empty physical volumes. If the first storage... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37
20090083512 - Method and system for finding scrolled regions within a tile cache: In a method embodiment, a method includes periodically polling data sent to an output. The output is operable to render the data into a human-perceptible form. The method further includes determining if at least one partition of a first plurality of discrete partitions of the perdiodically polled data is substantially... Agent: Baker Botts L.L.P.
20090083511 - Storage subsystem and storage control method: Failures may occur during the execution of an operation by a user, for example, when a directory quota cannot be expanded, or when a directory lacking in storage resources, which are to be assigned from a file system, emerges even if the directory quota can be expanded. A storage subsystem... Agent: Stanley P. Fisher Reed Smith LLP
20090083513 - Simplified run-time program translation for emulating complex processor pipelines: Simplification of run-time program translation for emulating complex processor pipelines is disclosed. Problem of dynamic pipeline states are moved into a cache lookup process leaving a code translation process to deal only with static pipeline states. With dynamic pipeline states removed from the translation process, translation becomes more simple and... Agent: Carr & Ferrell LLP
20090083514 - Apparatus and method for block interleaving in mobile communication system: A method and apparatus for block interleaving that eliminates the step of intermediary buffering. The method includes: (a) calculating a memory address at which first output data, of which number is equal to the number of rows of a first encoder is stored, (b) storing the first output data at... Agent: Cha & Reiter, LLC03/19/2009 > patent applications in patent subcategories. listing by industry category
20090077300 - Systems and methods for managing tape drive operation: Systems and methods for managing operation of multiple tape drives in a way so that incoming data is spread or distributed across the multiple tape drives and which may be implemented in one example to continuously accept for recording without interruption from one or more data sources, for example, so... Agent: O'keefe, Egan, Peterman & Enders LLP
20090077305 - Flexible sequencer design architecture for solid state memory controller: A method and apparatus for controlling access to solid state memory devices which may allow maximum parallelism on accessing solid state memory devices with minimal interventions from firmware. To reduce the waste of host time, multiple flash memory devices may be connected to each channel. A job/descriptor architecture may be... Agent: Kenyon & Kenyon LLP
20090077304 - Memory system having nonvolatile and buffer memories, and reading method thereof: Disclosed is a method for reading data in a memory system including a buffer memory and a nonvolatile memory, the method being comprised of: determining whether an input address in a read request is allocated to the buffer memory; determining whether a size of requested data is larger than a... Agent: Marger Johnson & Mccollom, P.C.
20090077306 - Optimizing memory operations in an electronic storage device: To optimize memory operations, a mapping table may be used that includes: logical fields representing a plurality of LBA sets, including first and second logical fields for representing respectively first and second LBA sets, the first and second LBA sets each representing a consecutive LBA set; PBA fields representing PBAs,... Agent: Uriarte Law
20090077301 - Programmable sequence generator for a flash memory controller: A programmable sequence generator for controlling a flash memory device. The programmable sequence generator includes a plurality of programmable sequence registers including control phase sequence (CPS) registers and data phase sequence (DPS) registers programmed with phase sequence values corresponding to an operation command sequence of the flash memory device; and... Agent: Evergreen Valley Law Group
20090077302 - Storage apparatus and control method thereof: This storage apparatus has a disk-shaped storage device for storing data sent from a host system, and includes a nonvolatile memory device for storing the data, a controller for controlling the reading or writing of the data sent from the host system from or into the disk-shaped storage device, and... Agent: Stanley P. Fisher Reed Smith LLP
20090077303 - System for transferring information and method thereof: A system for transferring information and method thereof, the system includes a management processor, a storage processor and a peripheral. Moreover, the management processor connects to the storage processor by I2C bus and GPIO bus, wherein the I2C bus is used for transmitting information from the management processor to the... Agent: Rosenberg, Klein & Lee
20090077307 - Dram selective self refresh: In some embodiments, an electronic apparatus comprises a communication interface, an input/output interface, a processor, and logic to collect, in the electronic apparatus, a first identifier associated with a first communication device and second identifier associated with a second communication device, logic to establish a communication connection between the electronic... Agent: Caven & Aghevli C/o Intellevate, LLC
20090077308 - Reconfigurable content-addressable memory: A system for determining memory addresses including a first content-addressable memory (CAM) configured to generate a first matchvector based on a first key; a first inverse-mask-reverse (IMR) module operatively connected to the first CAM, where the first IMR module is configured to generate a first auxiliary matchvector based on the... Agent: Osha Liang L.L.P.
20090077310 - Apparatus, system, and method for optimizing fast access data storage on segmented tape media: An apparatus and system are disclosed for optimizing fast access data storage on segmented tape media. The apparatus, in one embodiment, is configured to selectively write data to a tape storage medium. The selection module may select data for storage as one of fast access and slower access. Fast access... Agent: Kunzler & Mckenzie
20090077309 - Data transfer: A virtual tape library including a module which is operable to issue input and output commands to a tape drive connected to the virtual tape library, wherein an input command is a command to write data to a tape connected to the tape drive and an output command is a... Agent: Hewlett Packard Company
20090077311 - Storage control method and system for performing backup and/or restoration: A second storage system (SS2) comprises a plurality of tapes, a first storage device capable of performing random access at a rate higher than the tapes, and a virtual storage device emulating the first storage device. A first storage system (SS1) comprises a second storage device and a third storage... Agent: Stanley P. Fisher Reed Smith LLP
20090077313 - Method and apparatus to maintain data integrity in disk cache memory during and after periods of cache inaccessibility: A volatile or nonvolatile cache memory can cache mass storage device read data and write data. The cache memory may become inaccessible, and I/O operations may go directly to the mass storage device, bypassing the cache memory. A log of write operations may be maintained to update the cache memory... Agent: Lemoine Patent Services, PLLC C/o Portfolioip
20090077312 - Storage apparatus and data management method in the storage apparatus: A storage apparatus sets up part of non-volatile cache memory as a cache-resident area, and in an emergency such as an unexpected power shutdown, backs up dirty data of data cached in volatile memory to an area other than the cache-resident area in the non-volatile cache memory, together with the... Agent: Stanley P. Fisher Reed Smith LLP
20090077314 - Method for optimized data record verification: A method for optimized data record verification when processing data-chained channel control words that span a single count field is provided. The method includes reading a first portion of a count field into a sequence buffer memory buffer and a store count field buffer. The first portion of the count... Agent: Griffiths & Seaton PLLC
20090077315 - Storage system and data rearrangement method: The first storage apparatus includes a transmission unit for sending to a host computer, if data rearrangement in a volume is executed, a data transmission switching request for switching the transmission destination of write data, and a rearrangement unit for rearranging data in the volume. The host computer includes a... Agent: Stanley P. Fisher Reed Smith LLP
20090077316 - Loading data from a memory card: A memory card detection method comprising detecting insertion of a memory card into a device's card slot; creating a memory card construct in a non-volatile memory storage; copying data from the memory card to the memory card construct; and informing the device that a new memory card has been inserted... Agent: CenturyIPGroup, Inc. [intel]
20090077317 - Hierarchical systems and methods for performing storage operations in a computer network: A system for performing storage operations using hierarchically configured storage operation cells. The system includes a first storage manager component and a first storage operation cell. The first storage operation cell has a second storage manager component directed to performing storage operations in the first storage operation cell. Moreover, the... Agent: Knobbe Martens Olson & Bear LLP
20090077318 - Cache memory: A cache memory of the present invention includes a second cache memory that is operated in parallel with a first cache memory, a judgment unit which, when a cache miss occurs in both of the first cache memory and the second cache memory, makes a true or false judgment relating... Agent: Greenblum & Bernstein, P.L.C
20090077319 - Arithmetic processing device and electronic appliance using arithmetic processing device: A CPU incorporating a cache memory is provided, in which a high processing speed and low power consumption are realized at the same time. A CPU incorporating an associative cache memory including a plurality of sets is provided, which includes a means for observing a cache memory area which does... Agent: Cook Alex Ltd
20090077320 - Direct access of cache lock set data without backing memory: Apparatus and system for quickly accessing data residing in a cache of one processor, by another processor, while avoiding lengthy accesses to main memory are provided. A portion of the cache may be placed in a lock set mode by the processor in which it resides. While in the lock... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1
20090077321 - Microprocessor with improved data stream prefetching: A microprocessor coupled to a system memory by a bus includes an instruction decode unit that decodes an instruction that specifies a data stream in the system memory and a stream prefetch priority. The microprocessor also includes a load/store unit that generates load/store requests to transfer data between the system... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.
20090077322 - System and method for getllar hit cache line data forward via data-only transfer protocol through beb bus: A system and method for using a data-only transfer protocol to store atomic cache line data in a local storage area is presented. A processing engine includes an atomic cache and a local storage. When the processing engine encounters a request to transfer cache line data from the atomic cache... Agent: Ibm Corporation- Austin (jvl) C/o Van Leeuwen & Van Leeuwen
20090077323 - Bus controller initiated write-through mechanism with hardware automatically generated clean command: A write-through cache scheme is created. A store data command is sent to a cache line of a cache array from a processing unit. It is then determined whether the address of the store data is valid, wherein the original data from the store's address has been previously loaded into... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.
20090077324 - Methods and systems for exchanging data: A method for exchanging data between a producer and a consumer is provided. The method includes writing the data with the producer without blocking the consumer and without waiting for access to the consumer. The method also includes reading the data with the consumer without blocking the producer and without... Agent: General Electric Company Ge Global Patent Operation
20090077325 - Method and arrangements for memory access: In one embodiment a memory system is disclosed having a first requester group, a first access control module coupled to the first requester group to receive access requests from the first requester group, a second requestor group and a second access control module coupled to the second requestor group to... Agent: Alan Carlson
20090077326 - Multiprocessor system: A memory mapping unit requests allocation of a remote memory to memory mapping units of other processor nodes via a second communication unit, and requests creation of a mapping connection to a memory-mapping managing unit of a first processor node via the second communication unit. The memory-mapping managing unit creates... Agent: Harness, Dickey & Pierce, P.L.C
20090077327 - Method and apparatus for enabling a nas system to utilize thin provisioning: A NAS (network attached storage) controller managing file system data is configured for use in a storage system having thin provisioning capability. Physical storage capacity is used efficiently by making it possible for the NAS controller to identify to a disk array system having thin provisioning capability which segments of... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.
20090077328 - Methods and apparatuses for heat management in storage systems: An information system includes a storage system having a controller in communication with a plurality of storage devices. In some embodiments, the storage devices are divided into at least a first group and a second group, with a first temperature sensor sensing a temperature condition for the first group, and... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.
20090077329 - Non-broadcast signature-based transactional memory: A coherence controller in hardware of an apparatus in an example detects conflicts on coherence requests through direct, non-broadcast employment of signatures that: summarize read-sets and write-sets of memory transactions; and provide false positives but no false negatives for the conflicts on the coherence requests. The signatures comprise fixed-size representations... Agent: Wood, Phillips, Katz, Clark & Mortimer
20090077330 - Modified branch metric calculator to reduce interleaver memory and improve performance in a fixed-point turbo decoder: A turbo decoder that calculates alpha, beta and gamma (branch metric) values does not normalize the branch metric but instead applies the normalization factor to the newly calculated extrinsic values before writing them to interleaving memory, resulting in use of less memory than in prior turbo decoders. A compensating factor... Agent: Smith Frohwein Tempel Greenlee Blaha LLC
20090077331 - Data migration and copying in a storage system with dynamically expansible volumes: When migrating data stored in a storage region assigned to a volume to another storage region, the connection status of the host computer and volume is confirmed. When the host computer and volume are connected, the maximum capacity of the volume requested by the host computer is reserved so that... Agent: Stanley P. Fisher Reed Smith LLP
20090077332 - Content management system: A content management system constructed by a plurality of storage apparatuses that can communicate with one another. A 1st storage apparatus, which is one of the storage apparatuses, stores therein, in correspondence, a content and copy destination information and sends the content and the copy destination information therefrom to a... Agent: Wenderoth, Lind & Ponack L.L.P.
20090077333 - Double degraded array protection in an integrated network attached storage device: In one embodiment, the invention provides a method for accessing a physical storage-device array comprising a plurality of storage devices. The method includes (1) obtaining at least one parameter from a profile selected from two or more profiles concurrently defining two or more virtual arrays, each profile defining (i) a... Agent: Mendelsohn & Associates, P.C.
20090077334 - Storage apparatus for preventing falsification of data: When a file server is to create data that does not permit falsification in an external storage, it is not possible to guarantee that the rewriting of this data can be prevented from a computer connected to the external storage without going through a file server. Provided is a storage... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.
20090077336 - Storage system and storage system data migration method: This storage system modifies the migration plan in accordance with the state of the migration destination when a plurality of volumes are migrated all at once. Migration-source volumes are migrated collectively to volumes inside the migration-destination storage apparatus. The user can make settings related to migration-source volumes and migration-destination volumes... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.
20090077335 - System and methods for avoiding base address collisions: Processes are monitored as components are loaded into memory. Relocation of a component to an alternate base address instead of its preferred base address, causes an alternate component to be created corresponding to the relocated component. The alternate component is a copy of the relocated component, but the preferred base... Agent: John S. Pratt, Esq Kilpatrick Stockton, LLP
20090077337 - Data reading method for semiconductor memory device and semiconductor memory device: The present invention provides a data reading method suitable for use in a semiconductor memory device equipped with a plurality of semiconductor memory chips, which is capable of suppressing an increase in layout area as compared with a required storage capacity, and a semiconductor memory device. Two memory chips are... Agent: Volentine & Whitt PLLC
20090077338 - Apparatus and method for managing storage systems: An apparatus for controlling a configuration change in a storage system having a plurality of storage appliances with an I/O handler local to each storage appliance for transmitting and receiving I/O requests. A local volume mapper local to each storage appliance maps storage local to the storage appliance; a remote... Agent: Lieberman & Brandsdorfer, LLC
20090077339 - Object based conflict detection in a software transactional memory: Object-based conflict detection is described in the context of software transactional memory. In one example, a pointer is received for a block of instructions, the block of instructions having allocated objects. The lower bits of the pointer are masked if the pointer is in a small object space to obtain... Agent: Blakely Sokoloff Taylor & Zafman LLP
20090077341 - Method and system for automated memory reallocating and optimization between logical partitions: A method and system for reallocating memory in a logically partitioned environment. The invention comprises a Performance Enhancement Program (PEP) and a Reallocation Program (RP). The PEP allows an administrator to designate several parameters and identify donor and recipient candidates. The RP compiles the performance data for the memory and... Agent: Ibm Corp (ya) C/o Yee & Associates PC
20090077340 - Storage area network (san) forecasting in a heterogeneous environment: The present invention provides an approach for SAN forecasting in a heterogeneous environment. Specifically, under the present invention capacity data on the heterogeneous environment is gathered. Capacity management techniques will then be used to analyze the SAN utilization, identify growth trends and patterns. Proactively, plans are made to account for... Agent: Hoffman Warnick LLC
20090077342 - Method to achieve partial structure alignment: A computer-implemented method including receiving a set of data having a mapping. The set of data has groups of subsets of data. The mapping describes in what order the groups of subsets of data are to be stored in a memory. The mapping also describes the offsets of the groups... Agent: Ibm Corp (ya) C/o Yee & Associates PC
20090077343 - Storage apparatus having virtual-to-actual device addressing scheme: A storage apparatus includes a storage unit and a controller, wherein control of inputting/outputting data from/to a device provided in said storage unit is executed in accordance with a request received by said storage apparatus. An actual device of the storage apparatus corresponds to a virtual device which is external... Agent: Antonelli, Terry, Stout & Kraus, LLP
20090077344 - Method for bus testing and addressing in mass memory components: A method and apparatus for addressing a plurality of mass memory components coupled to a host device. The memory components can be arranged in a chain or in a ring configuration. In a ring, each memory component receives a bit pattern from the preceding stage and sends a bit pattern... Agent: Ware Fressola Van Der Sluys & Adolphson, LLP03/12/2009 > patent applications in patent subcategories. listing by industry category
20090070516 - Integrated memory control apparatus: An integrated memory control apparatus including a first interface decoder, a second interface decoder and an interface controller is provided. Wherein, the first interface decoder is coupled to a control chip through a first serial peripheral interface (SPI), the second interface decoder is coupled to a micro-processor unit through a... Agent: Jianq Chyun Intellectual Property Office
20090070517 - Memory apparatus, memory control method, and program: Disclosed herein is a memory apparatus comprising: a nonvolatile memory configured to allow data to be written thereto and read therefrom in units of a cluster and to permit data to be deleted therefrom in units of a block made up of a plurality of sectors; a control circuit configured... Agent: Sonnenschein Nath & Rosenthal LLP
20090070518 - Adaptive block list management: In a nonvolatile memory array, selected blocks are maintained as open blocks that are available to store additional data without being erased first. Nonsequential open blocks are selected from two lists, one list based on recency of the last write operation, and the other list based on frequency of writes... Agent: Weaver Austin Villeneuve Sampson LLP
20090070523 - Flash memory device storing data with multi-bit and single-bit forms and programming method thereof: A flash memory device may include a memory cell array including a plurality of memory blocks and a partition information block, the partition information block storing partition information that indicates a boundary between multi-bit memory blocks and single-bit memory blocks among the memory blocks. The memory device may include a... Agent: Lee & Morse, P.C.
20090070522 - Method and apparatus for cascade memory: A system and method of operating a cascade of a plurality of memory devices connected in series is disclosed. In one aspect, there is a memory controller operatively connected to the memory cell and a cascade circuit configured to enable a subsequent memory device in a cascade of memory devices.... Agent: Knobbe Martens Olson & Bear LLP
20090070520 - Semiconductor storage device and method of controlling semiconductor storage device: In a semiconductor storage device, a memory controller divides each of blocks in each of chips into a first page set composed of pages and a second page set composed of pages, divides a logical address space into groups, and divides each group into lines. Block units are created each... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.
20090070519 - System and method for secure document processing using removable data storage: The subject application is directed to a system and method for secure document processing. A removable storage, such as a flash drive, magnetic storage, IC card, is installed in document processing device. A selected document processing operation, such as copying, scanning, and the like, is then performed. Data files resultant... Agent: Tucker Ellis & West LLP
20090070521 - Write abort and erase abort handling: A portion of a nonvolatile memory array that is likely to contain, partially programmed data may be identified from a high sensitivity read, by applying stricter than usual ECC requirements, or using pointers to programmed sectors. The last programmed data may be treated as likely to be partially programmed data.... Agent: Weaver Austin Villeneuve Sampson LLP
20090070524 - Non-snoop read/write operations in a system supporting snooping: Techniques that may utilize generic tracker structures to provide data coherency in a multi-node system that supports non-snoop read and write operations. The trackers may be organized as a two-dimensional queue structure that may be utilized to resolve conflicting read and/or write operations. Multiple queues having differing associated priorities may... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP
20090070525 - Semiconductor memory device: A CAM (Content Addressable Memory) cell includes first and second data storage portions storing data, horizontal port write gates for storing data applied through a match line pair in the data storage portions in a data write through a horizontal port, and search/read gates for driving the match lines of... Agent: Buchanan, Ingersoll & Rooney PC
20090070526 - Using explicit disk block cacheability attributes to enhance i/o caching efficiency: A data caching method comprising identifying whether data stored in a first data block on a storage medium is cacheable; setting a first cacheability attribute associated with the first data block in a data structure to identify whether the data in the first data block is cacheable; monitoring I/O requests... Agent: CenturyIPGroup, Inc. [intel]
20090070527 - Using inter-arrival times of data requests to cache data in a computing environment: A data caching method comprising monitoring read and write requests submitted for accessing target data in a first data block on a storage medium; identifying a sequence of access requests for target data as a first stream; and determining whether the first stream is suitable for direct disk access based... Agent: CenturyIPGroup, Inc. [intel]
20090070528 - Apparatus, system, and method for incremental resynchronization in a data storage system: An apparatus, system, and method are disclosed for performing an incremental resynchronization between two unrelated volumes when a third volume fails. The apparatus, system, and method include initiating registration of changed tracks; keeping track of bytes in flight activities between a local volume and an intermediate volume; recording the changed... Agent: International Business Machines Corporation
20090070529 - Data protection after possible write abort or erase abort: A portion of a nonvolatile memory array that is likely to contain, partially programmed data may be identified from a high sensitivity read, by applying stricter than usual ECC requirements, or using pointers to programmed sectors. The last programmed data may be treated as likely to be partially programmed data.... Agent: Weaver Austin Villeneuve Sampson LLP
20090070530 - Storage system and replication creation method thereof: In a storage system having a plurality of control units each connected with a plurality of disk units, it is provided that a replication is created in the volume of the disk units connected to different control units. The replication creation unit of a given control unit creates a replication... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.
20090070532 - System and method for efficiently testing cache congruence classes during processor design verification and validation: A system and method for using a single test case to test each sector within multiple congruence classes is presented. A test case generator builds a test case for accessing each sector within a congruence class. Since a congruence class spans multiple congruence pages, the test case generator builds the... Agent: Ibm Corporation- Austin (jvl) C/o Van Leeuwen & Van Leeuwen
20090070531 - System and method of using an n-way cache: A system and method of using an n-way cache are disclosed. In an embodiment, a method includes determining a first way of a first instruction stored in a cache and storing the first way in a list of ways. The method also includes determining a second way of a second... Agent: Qualcomm Incorporated
20090070533 - Content network global replacement policy: This invention is related to content delivery systems and methods. In one aspect of the invention, a content provider controls a replacement process operating at an edge server. The edge server services content providers and has a data store for storing content associated with respective ones of the content providers.... Agent: Ropes & Gray LLP
20090070534 - Memory access monitoring apparatus and related method: A memory access controlling apparatus, for monitoring an access of a memory to generate a target watch signal, includes: at least one monitoring circuit, a setting unit and an output circuit. The monitoring circuit corresponds to an address of the memory and holds an access setting value. The monitoring circuit... Agent: North America Intellectual Property Corporation
20090070539 - Automated file recovery based on subsystem error detection results: The present invention provides a method and system for performing file recovery in a computer system coupled to a storage subsystem, wherein a data scrubbing process analyzes said storage subsystem for potential or existing storage errors. The method includes: receiving a report from said data scrubbing process describing said errors,... Agent: Ibm Corporation RochesterIPLaw Dept. 917
20090070535 - Handling temporary files in a file system with snapshots: A temporary file is identified. The temporary file includes a data block containing a first file image. A determination is made whether the temporary block has been included in a previous snapshot. Responsive to receiving a modification of the temporary block that has been included in the previous snapshot, a... Agent: Ibm Corp (ya) C/o Yee & Associates PC
20090070536 - Managing snapshots using messages: A method and apparatus for managing snapshots of a file system using messages. A snapshot is a restorable version of a file system created at a predetermined point in time. A message is a persistent data structure supported by a file server. A message may include one or more snapshots,... Agent: Perkins Coie LLP
20090070537 - Method and apparatus for formatting storage medium: A method for formatting a storage medium. The method includes saving management information associated with data that is to be protected from the formatting, the management information indicating where the data to be protected is stored, formatting a management information area of the storage medium where the management information is... Agent: Birch Stewart Kolasch & Birch
20090070538 - Storage system and method for acquisition and utilization of snapshots: A computer system including: disk array system to cause a snapshot corresponding to the selected backup time accessible with the specific address to which the computer can access; wherein if the snapshot corresponding to the selected backup time is associated with the specific address to which the computer cannot access,... Agent: Antonelli, Terry, Stout & Kraus, LLP
20090070540 - Receiving apparatus, receiving method, transmitting apparatus, transmitting method, and medium: A receiving apparatus has a first memory area accessible by a first provider providing first contents and a second memory area accessible by a second provider providing second contents. A receiving unit receives a first access right file and a second access right file. An output unit outputs the first... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20090070541 - Automated information life-cycle management with thin provisioning: A system for managing data includes providing at least one logical device having a table of information that maps sections of the logical device to sections of at least two storage areas. Characteristics of data associated with at least one section of the logical device may be evaluated. The at... Agent: Muirhead And Saturnelli, LLC
20090070543 - Data compression/decompression apparatus and method: A data compression/decompression apparatus and method is provided for improving memory utilization. A data compression/decompression apparatus of the present invention includes a compressor for calculating costs of domain blocks to a range block through forward searching in a search range, for selecting the domain block having the lowest cost to... Agent: JeffersonIPLaw, LLP
20090070542 - Method to divide a file or merge files using file allocation table (fat): A method to divide a file or merge files using a file allocation table (FAT) in which the method to divide a file includes storing data of a first cluster, among data intended to be separated from the file, into a second cluster, and generating a first cluster chain and... Agent: Stanzione & Kim, LLP
20090070544 - Microcontrollers with instruction sets: A microcontroller includes a plurality of primary registers, a secondary register and a central processing unit (CPU). The primary registers store a plurality of primary data respectively. Each primary data has a first width. The secondary register includes the plurality of primary registers and stores a secondary data having a... Agent: Patent Prosecution O2mirco , Inc.
20090070545 - Processing system implementing variable page size memory organization using a multiple page per entry translation lookaside buffer: A processing system includes memory management software responsive to changes in a page table to consolidate a run of contiguous page table entries into a page table entry having a larger memory page size. The memory management software determines whether the run of contiguous page table entries may be cached... Agent: Brinks Hofer Gilson & Lione
20090070546 - System and method for generating fast instruction and data interrupts for processor design verification and validation: A system and method for intentionally invaliding translation entry valid bits in order to provoke storage interrupts when executing a test case is presented. Prior to executing the test case, an interrupt handler pseudo-randomly invalidates a number of translation entries included in a translation lookaside buffer (TLB) by changing particular... Agent: Ibm Corporation- Austin (jvl) C/o Van Leeuwen & Van Leeuwen
20090070547 - Method and apparatus for performing address mapping in virtual file system of storage unit having a plurality of non-volatile data storage media: Provided are a method and apparatus capable of reducing a metadata processing time associated with address mapping performed to input/output burst data at a high speed in a virtual file system of a storage unit having a plurality of non-volatile data storage media. The method includes: determining a block group... Agent: Sughrue Mion, PLLC03/05/2009 > patent applications in patent subcategories. listing by industry category
20090063748 - Method and apparatus for providing continuous access to shared tape drives from multiple virtual tape servers within a data storage system: A method for providing continuous access to shared tape drives from two virtual tape server (VTS) nodes is disclosed. A group of tape drives are connected to two VTS nodes via a set of switches. Both VTS nodes can concurrently process requests to mount physical tape cartridges to separate tape... Agent: Dillon & Yudell, LLP
20090063751 - Method for migrating contents of a memory on a virtual machine: A method for migrating contents of a memory on a virtual machine. The method includes computer instructions for establishing communication from a source virtual machine to a target virtual machine, the source virtual machine including a memory. The contents of the memory on the source virtual machine are transmitted to... Agent: Cantor Colburn LLP-ibm Poughkeepsie
20090063753 - Method for utilizing data access patterns to determine a data migration order: A method for utilizing data access patterns to determine a data migration order. The method includes computer instructions for establishing communication from a source virtual machine to a target virtual machine, the source virtual machine including a memory. The access information for pages in the memory is collected and utilized... Agent: Cantor Colburn LLP-ibm Poughkeepsie
20090063750 - Migrating contents of a memory on a virtual machine: A system and computer program product for migrating contents of a memory on a virtual machine. The system includes a source virtual machine executing on a host system, the source virtual machine including a memory. The system also includes a hypervisor executing on the host system. The hypervisor is in... Agent: Cantor Colburn LLP-ibm Poughkeepsie
20090063749 - Tracking data updates during memory migration: Methods, systems, and computer program products for tracking updates during memory migration. The method includes computer instructions for establishing communication from a source virtual machine to a target virtual machine, the source virtual machine including a memory. Contents of the memory on the source virtual machine are transmitted to the... Agent: Cantor Colburn LLP-ibm Poughkeepsie
20090063752 - Utilizing data access patterns to determine a data migration order: Systems and computer program products for utilizing data access patterns to determine a data migration order. A system includes a source virtual machine executing on a host system, the source virtual machine including a memory. The system also includes a hypervisor executing on the host system, the hypervisor in communication... Agent: Cantor Colburn LLP-ibm Poughkeepsie
20090063754 - Combined parallel/serial status register read: Methods and devices are disclosed, such as those involving a solid state memory device that includes a status register configured to be read with a combined parallel and serial read scheme. One such solid state memory includes a status register configured to store a plurality of bits indicative of status... Agent: Knobbe Martens Olson & Bear LLP
20090063755 - Paper-shaped non-volatile storage device: A paper-shaped non-volatile storage device includes a top paper layer, a bottom paper layer and a flexible printed circuit board packaged between the top paper layer and the bottom paper layer. The flexible printed circuit board comprises a data-transmitting interface, a non-volatile memory controller and at least one non-volatile memory... Agent: Kirton And Mcconkie
20090063757 - Memory emulation in an electronic organizer: An electronic organizer using a memory array that is directly addressed and non-volatile is disclosed. The memory array can be used to replace and emulate multiple memory types such as DRAM, SRAM, non-volatile RAM, FLASH memory, and a non-volatile memory card, for example. The memory array may be randomly accessed.... Agent: Unity Semiconductor Corporation
20090063758 - Program and read method and program apparatus of nand flash memory: A program method, a read method, and a program apparatus of a NAND flash memory are disclosed. The program method and apparatus of the NAND flash memory provided by the present invention can reduce the programming time of each page and increase the programming speed of the entire NAND flash... Agent: Jianq Chyun Intellectual Property Office
20090063756 - Using flash storage device to prevent unauthorized use of software: A flash storage device and a method for using the flash storage device to prevent unauthorized use of a software application are provided. An identifier may be encoded within specific sectors of the flash storage device. One bits of the identifier may be encoded as unusable ones of the specific... Agent: Microsoft Corporation
20090063759 - System and method for providing constrained transmission and storage in a random access memory: A system and method for providing constrained transmission and storage in a random access memory. A system includes a memory device for providing constrained transmission and storage. The memory device includes an interface to a data bus, the data bus having a previous state. The memory device also includes an... Agent: Cantor Colburn LLP-ibm Poughkeepsie
20090063760 - Systems, devices, and/or methods to access synchronous ram in an asynchronous manner: Certain exemplary embodiments can provide a method, which can comprise, via a state machine implemented as an application specific integrated circuit, responsive to an automatically detected asynchronous RAM interface signal, automatically transmitting a corresponding synchronous RAM interface signal. The state machine can be communicatively coupled to a programmable logic controller.... Agent: Siemens Corporation Intellectual Property Department
20090063761 - buffered memory module supporting two independent memory channels: A memory system is provided that enhances the memory bandwidth available through a memory module. The memory system includes a memory controller and a memory module coupled to the memory controller. In the memory system, the memory controller is coupled to the memory module via at least two independent memory... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.
20090063762 - Content-addressable memories and state machines for performing three-byte matches and for providing error protection: A method and system for detecting matching strings in a string of characters utilizing content addressable memory is disclosed.... Agent: Lee & Hayes, PLLC
20090063763 - Controlling writing to magnetic tape: A method for controlling writing for a tape recorder that is connected to a host and sequentially records, as a transaction, a plurality of records that are transferred from the host and stored in a buffer is provided, including receiving a synchronous command for a first transaction from the host;... Agent: Ibm Microelectronics Intellectual Property Law
20090063764 - Designed roughness and surface treatments for capillary buffer of fluid dynamic bearings: A contoured region is disposed within a capillary buffer of a Fluid Dynamic Bearing. In one embodiment, the contoured region comprises at least one defined edge for arresting the displacement of a lubricant within the capillary buffer.... Agent: Hitachi C/o Wagner Blecher LLP
20090063765 - Parallel access virtual tape library and drives: A system and method described herein allows a virtual tape library (VTL) to perform multiple simultaneous or parallel read/write or access sessions with disk drives or other storage media, particularly when subject to a sequential SCSI-compliant layer or traditional limitations of VTLs. In one embodiment, a virtualizing or transaction layer... Agent: Perkins Coie LLP Patent-sea
20090063766 - Storage controller and firmware updating method: A storage controller and method are provided. The storage controller includes control sections including storage sections into which data transmitted from a host unit is cached, one of the control sections being a main control section which controls firmware update in the control sections. The main control section includes an... Agent: Staas & Halsey LLP
20090063768 - Allocation of heterogeneous storage devices to spares and storage arrays: A plurality of storage devices of a plurality of types is provided. A plurality of criteria is associated for each of the plurality of storage devices, based on characteristics of the plurality of storage devices, wherein the plurality of criteria can be used to determine whether a selected storage device... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37
20090063767 - Method for automatically configuring additional component to a storage subsystem: A method for automatically configuring a newly added component to a storage subsystem is disclosed. In response to a new component being connected to a storage subsystem, a determination is made whether or not the new component is a host computer or a disk drive. If the new component is... Agent: Dillon & Yudell, LLP
20090063769 - Raid apparatus, controller of raid apparatus and write-back control method of the raid apparatus: A RAID apparatus includes a plurality of recording devices, a first adaptor connected to a first interface which is connected to a high-level apparatus, a controller for controlling processing of data transmitted by the high-level apparatus, and a second adaptor that connects to a second interface connected to a plurality... Agent: Staas & Halsey LLP
20090063770 - Storage control apparatus, storage control program, and storage control method: A storage control apparatus controls a logical volume using a plurality of recording media. The storage control apparatus includes: a management database that manages information of the recording media, type of the logical volume using the recording media, and state of the logical volume, and a control section that sets,... Agent: Staas & Halsey LLP
20090063771 - Structure for reducing coherence enforcement by selective directory update on replacement of unmodified cache blocks in a directory-based coherent multiprocessor: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design to reduce the number of memory directory updates during block replacement in a system having a directory-based cache is provided. The design structure may be implemented to utilize a read/write bit to determine... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1
20090063772 - Methods and apparatus for controlling hierarchical cache memory: Methods and apparatus for controlling hierarchical cache memories permit controlling a first level cache memory including a plurality of cache lines and controlling a next lower level cache memory including a plurality of cache lines. An additional memory may be associated with the next lower level cache memory and include... Agent: Lerner, David, Littenberg, Krumholz & Mentlik
20090063773 - Technique to enable store forwarding during long latency instruction execution: A technique to allow independent loads to be satisfied during high-latency instruction processing. Embodiments of the invention relate to a technique in which a storage structure is used to hold store operations in program order while independent load instructions are satisfied during a time in which a high-latency instruction is... Agent: Caven & Aghevli C/o Intellevate, LLC
20090063774 - High performance pseudo dynamic 36 bit compare: A cache memory high performance pseudo dynamic address compare path divides the address into two or more address segments. Each segment is separately compared in a comparator comprised of static logic elements. The output of each of these static comparators is then combined in a dynamic logic circuit to generate... Agent: International Business Machines Corporation
20090063775 - Instrument, a system and a container for provisioning a device for personal care treatment, and a device for personal care treatment with such a container: The present invention provides a system and a method for a cache partitioning technique for application tasks based on the scheduling information in multiprocessors. Cache partitioning is performed dynamically based on the information of the pattern of task scheduling provided by the task scheduler (405). Execution behavior of the application... Agent: Philips Intellectual Property & Standards
20090063776 - Second chance replacement mechanism for a highly associative cache memory of a processor: A cache memory system includes a cache memory and a block replacement controller. The cache memory may include a plurality of sets, each set including a plurality of block storage locations. The block replacement controller may maintain a separate count value corresponding to each set of the cache memory. The... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)
20090063777 - Cache system: A cache system includes a tag memory having a tag indicating whether data is obtained by prefetch access, a prefetch reliability storage unit having prefetch reliability of each processor, and a tag comparator configured to compare the tag with an access address, instruct the prefetch reliability storage unit to decrease... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.
20090063778 - Storage system and storage system control method: A storage system of the present invention improves the response performance of sequential access to data, the data arrangement of which is expected to be sequential. Data to be transmitted via streaming delivery is stored in a storage section. A host sends data read out from the storage section to... Agent: Townsend And Townsend And Crew, LLP
20090063779 - Cache memory and a method for servicing access requests: A cache memory that includes: (i) an arbitrator, connected to multiple access generator, the arbitrator is adapted to receive different types of access requests from the multiple access generators and to select a single access request per arbitration cycle; (ii) a sequence of pipeline stages, the sequence comprises an input... Agent: Freescale Semiconductor, Inc. Law Department
20090063781 - cache access mechanism: Techniques for improving cache accesses in an object-relational mapping space are described herein. In one embodiment, in response to a first cache request received at a first cache API associated with a transaction for updating a data entry of the relational database, the updated data of the data entry is... Agent: Red Hat/bstz Blakely Sokoloff Taylor & Zafman LLP
20090063780 - Data processing system and method for monitoring the cache coherence of processing units: The present invention relates to a data processing system with a plurality of processing units (PU), a shared memory (M) for storing data from said processing units (PU) and an interconnect means (IM) for coupling the memory (M) and the plurality of processing units (PU). At least one of the... Agent: Nxp, B.v. Nxp Intellectual Property Department
20090063782 - Method for reducing coherence enforcement by selective directory update on replacement of unmodified cache blocks in a directory-based coherent multiprocessor: Embodiments of the present invention generally provide techniques and apparatus to reduce the number of memory directory updates during block replacement in a system having a directory-based cache. The system may be implemented to utilize a read/write bit to determine the accessibility of a cache line and limit memory directory... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1
20090063783 - Method and appartaus to trigger synchronization and validation actions upon memory access: A system and method to trigger synchronization and validation actions at memory access, in one aspect, identifies a storage class associated with a region of shared memory being accessed by a thread, determines whether the thread holds the storage class and acquires the storage class if the thread does not... Agent: Scully, Scott, Murphy & Presser, P.C.
20090063785 - Buffered memory module supporting double the memory device data width in the same physical space as a conventional memory module: A memory system is provided that enhances the memory bandwidth available through a memory module. The memory system includes a memory hub device integrated into a memory module, a first memory device data interface integrated that communicates with a first set of memory devices and a second memory device data... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.
20090063786 - Daisy-chain memory configuration and usage: Daisy-chain memory configuration and usage is disclosed. According to one configuration, a memory system includes a controller and corresponding string of multiple successive memory devices coupled in a daisy-chain manner. The controller communicates commands over the serial control link to configure a first memory device to write a block of... Agent: Barry W. Chapin, Esq. Chapin Intellectual Property Law, LLC
20090063784 - System for enhancing the memory bandwidth available through a memory module: A memory system is provided that enhances the memory bandwidth available through a memory module. The memory system includes a memory hub device integrated in a memory module. The memory system includes a first memory device data interface integrated in the memory hub device that communicates with a first set... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.
20090063787 - Buffered memory module with multiple memory device data interface ports supporting double the memory capacity: A memory system is provided that enhances the memory bandwidth available through a memory module. The memory system includes a memory controller and at least one memory module coupled to the memory controller. In the memory systems, each memory module comprises at least one memory hub device integrated in the... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.
20090063788 - Techniques for storing system images in slices on data storage devices: A data storage device has a data storage medium. A data storage capacity of the data storage device is divided into slices. Each slice has a set of sectors. Data storage device firmware is configured to store copies of a system image in the slices on the data storage device.... Agent: Steven J. Cahill/ Hitachi Gst
20090063791 - Computer system, control method thereof and data processing apparatus: A computer system and a method of controlling a computer system, the computer system including: a first memory corresponding to a first channel and a second memory corresponding to a second channel; a data processor to process the data of the first and second channels in a time division manner;... Agent: Stein, Mcewen & Bui, LLP
20090063789 - Enhanced performance memory systems and methods: Digital memory devices and systems, including memory systems and methods for operating such memory systems are disclosed. In the embodiments, a memory system may include a processor and a memory controller communicatively coupled to the processor. A memory bus communicates with at least two memory units through the memory bus.... Agent: Schwegman, Lundberg & Woessner/micron
20090063790 - Method and apparatus for managing configuration memory of reconfigurable hardware: Provided is a method of managing a configuration memory of reconfigurable hardware which can reconfigure hardware according to hardware configuration information. The method includes: determining at least one slot capable of currently storing the hardware configuration information on the basis of the states of a plurality of slots of the... Agent: Staas & Halsey LLP
20090063792 - Memory control circuit, semiconductor integrated circuit, and verification method of nonvolatile memory: A memory control circuit includes a conversion circuit performing a conversion processing for parallel readout bit data formed from individual bits read out from memory cells of a nonvolatile memory, by setting the individual bit that is once again read out from the memory cell, which is previously determined to... Agent: Mcginn Intellectual Property Law Group, PLLC
20090063793 - Storage system, data management apparatus and management allocation method thereof: Provided are a storage system, a data management apparatus, and a data management method capable of facilitating the add-on procedures of data management apparatuses for managing data groups such as directory groups. In a storage system comprising a plurality of data management apparatuses for managing storage destination management information of... Agent: Townsend And Townsend And Crew, LLP
20090063797 - Backup data erasure method: A computer system comprises a storage subsystem, a host computer and a management computer, and stores catalogue information containing correspondence between a first volume for data reading or writing and a second volume for storing a copy of the data stored in the first volume. The management computer requests the... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.
20090063796 - Buddy replication: A method and apparatus for replicating instances of cache nodes in a cluster is described. In one embodiment, the number of available cache nodes in the cluster is determined. Available cache nodes from the cluster are selected based on a parameter. An instance of a cache node is replicated to... Agent: Red Hat/bstz Blakely Sokoloff Taylor & Zafman LLP
20090063798 - Data processing system having a plurality of storage systems: It is an object of the present invention to conduct data transfer or data copying between a plurality of storage systems, without affecting the host computer of the storage systems. Two or more auxiliary storage systems 100B, 100C are connected to a primary storage system 100A connected to a host... Agent: Stanley P. Fisher Reed Smith LLP
20090063795 - De-duplication in a virtualized storage environment: A data de-duplication application de-duplicates redundant data in the pooled storage capacity of a virtualized storage environment. The virtualized storage environment includes a plurality of storage devices and a virtualization or abstraction layer that aggregates all or a portion of the storage capacity of each storage device into a single... Agent: Workman Nydegger/emc
20090063794 - Method and system for enhanced data storage management: A method and system for implementing enhanced data storage management are provided. The method includes compiling a list of all online disks for a data storage environment. For each disk in the list, the method includes querying a backup control database to obtain statistical information for the disk which includes... Agent: Cantor Colburn LLP-ibm Poughkeepsie
20090063800 - Arrangements having security protection: Access control unit sends to the access judging unit an access judging check request signal asking whether the requested address falls within one of the access-permitted areas registered in the access judging unit, the access judging unit checks whether the requested address falls within one of the access-permitted areas registered... Agent: Antonelli, Terry, Stout & Kraus, LLP
20090063799 - Memory protection for embedded controllers: System and method for protecting data in a system including a main processor, an embedded controller, and a memory. In response to a power-on-reset (POR), access to the memory is enabled, e.g., access by the embedded controller. First data is read from the memory (e.g., by the embedded controller) in... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
20090063801 - Write protection of subroutine return addresses: Exemplary methods, systems, and products are described that operate generally by moving subroutine return address protection to the processor itself, in effect proving atomic locks for subroutine return addresses stored in a stack, subject to application control. More particularly, exemplary methods, systems, and products are described that write protect subroutine... Agent: International Corp (blf)
20090063802 - Data security system: A data security system      includes providing a unique identification from a first system  to a second system  ; copying the unique identification in the second system   by the first system ; and unlocking a memory  in the first system ... Agent: Law Offices Of Mikio Ishimaru
20090063803 - Circuit for initializing a pipe latch unit in a semiconductor memory device: A semiconductor memory device includes a pipe latch unit having a plurality of pipe latches for latching data. An input controller controls input timing of data transmitted from data line to the pipe latch unit. An output controller controls output timing of data latched in the pipe latch unit. An... Agent: Mcdermott Will & Emery LLP
20090063805 - Data acquisition messaging using special purpose registers: A method provides a data acquisition message of a data processing system to an external port thereof. Configuration information is written to a configuration register. It is determined if the configuration information identifies a data acquisition operation. If the data acquisition operation has been identified, data corresponding to the configuration... Agent: Freescale Semiconductor, Inc. Law Department
20090063804 - Dynamic a-msdu enabling: A dynamic A-MSDU enabling method is disclosed. The method enables the recipient of an aggregate MAC service data unit (A-MSDU) under a block ACK agreement to reject the A-MSDU. The method thus distinguishes between A-MSDU outside of the block ACK agreement, which is mandatory, from A-MSDU under the block ACK... Agent: Carrie A. Boone, P.C.
20090063807 - Data redistribution in shared nothing architecture: A system and method for data redistribution. In one embodiment, the method includes dividing data into batches at a sending partition; populating a first data structure with the first pages and the first control information in a first data structure; storing the first data structure in a cache at the... Agent: Ibm St-svl Sawyer Law Group LLP
20090063806 - Method for distributing hypervisor memory requirements across logical partitions: A method of reallocating memory to a hypervisor in a virtualized computing system, includes: assigning priorities to a plurality of logical partitions configured within the virtualized computing system; determining a memory requirement for the hypervisor, the hypervisor configured to manage the plurality of logical partitions; determining minimum levels of memory... Agent: Cantor Colburn LLP - IBM Rochester Division
20090063808 - Microprocessor and method of processing data: A data storing part outputs n-bit data according to a reading address generated by an address generator. A peak value candidate selecting part selects a maximum value of a plurality of elements forming the n-bit data as a peak value candidate when data of one data unit is expressed as... Agent: Mcginn Intellectual Property Law Group, PLLC
20090063809 - System and method for parallel scanning: A system and method for parallel scanning among multiple scanning entities. According to various embodiments of the present invention, buffers are allocated from a pool of memory pages, with one packet being located on each page. Each of the pages is mapped such that unprivileged scanners, privileged scanners, and hardware-based... Agent: Banner & Witcoff, Ltd.
20090063810 - Computing device with automated page based ram shadowing, and method of operation: Where a computing device is provided with executable programs in relatively slow non-volatile memory, such as ROM, the device performance can be improved by shadowing, a process by which those programs are copied into relatively fast volatile memory, such as RAM. Shadowing is often inefficient because code is copied that... Agent: Saul Ewing LLP (philadelphia)Previous industry: Electrical computers and digital data processing systems: input/output
Next industry: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors)
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