Electrical computers and digital processing systems: memory inventions 01/09

20090031071 - Method for acquiring relevent information to an object using an information access tag: A method for retrieving relevant information about an object is disclosed. An information access tag is associated with the object. Relevant information or data about the object are store on a server. The information access tag comprises a link pointing to the address of the server. When a user uses... Agent: Sinorica, Llc

20090031072 - Hybrid nonvolatile ram: A memory subsystem includes a volatile memory, a nonvolatile memory, and a controller including logic to interface the volatile memory to an external system. The volatile memory is addressable for reading and writing by the external system. The memory subsystem includes a power controller with logic to detect when power... Agent: Fsp Llc

20090031076 - Method for managing flash memory: A method for managing a flash memory, a method for leveling the wear of blocks in a flash memory, and a method for managing a file system for a flash memory are provided. The method for managing a flash memory includes: if changing of data of a data block recorded... Agent: Sughrue Mion, Pllc

20090031073 - Multi-interface and multi-bus structured solid-state storage subsystem: A solid-state storage subsystem, such as a non-volatile memory card or drive, includes multiple interfaces and a memory area storing information used by a data arbiter to prioritize data commands received through the interfaces. As one example, the information may store a priority ranking of multiple host systems that are... Agent: Knobbe Martens Olson & Bear LLP

20090031074 - Multi-level cell flash memory and method of programming the same: Provided is a flash memory having a multi-level cell (MLC) and a method of programming the same. The method includes identifying a set of first patterns from input data, determining whether there is a set of second patterns stored within the flash memory that is of a number substantially similar... Agent: F. Chau & Associates, Llc

20090031075 - Non-volatile memory device and a method of programming the same: Provided are a non-volatile memory device and a method of programming the same. The method includes: performing a program operation; performing a program verify read operation; and performing a pass/fail determine operation simultaneously with one of a verify recovery operation and a bit line setup operation, after the performing of... Agent: Harness, Dickey & Pierce, P.L.C

20090031077 - Integrated circuit including multiple memory devices: An integrated circuit includes a data bus and a first memory device coupled to the data bus. The first memory device is configured to provide a first signal in response to completing a power-up sequence of the first memory device. The integrated circuit includes a second memory device coupled to... Agent: Dicke, Billig & Czaja

20090031078 - Rank sparing system and method: A system, and a corresponding method, are used to implement rank sparing. The system includes a memory controller and one or more DIMM channels coupled to the memory controller, where each DIMM channel includes one or more DIMMS, and where each of the one or more DIMMs includes at least... Agent: Hewlett Packard Company

20090031079 - Logging latency reduction: A disk is divided into K angular regions. A log write request is replicated K times and K number of identical log writes are issued to the disk to be written to each of the angular regions of the log. Upon completion of the first write, the application requesting the... Agent: Sun Microsystems, Inc C/o Marsh Fischmann & Breyfogle LLP

20090031080 - Flash memory device and program method thereof: A flash memory device includes a memory cell array, a peri circuit unit, an I/O controller, and a controller. The memory cell array includes a plurality of memory cells respectively connected to a plurality of bit line pairs and a plurality word lines. The peri circuit unit is configured to... Agent: Townsend And Townsend And Crew, LLP

20090031081 - System and module for merging electronic and printed data: A system for merging electronic and printed information is provided. The system includes a computing device having a visual display. Additionally, the system includes a handheld electronic memory device containing at least one information file with information corresponding to printed information that is presented on a separate physical medium. The... Agent: Akerman Senterfitt

20090031082 - Accessing a cache in a data processing apparatus: A data processing apparatus is provided having processing logic for performing a sequence of operations, and a cache having a plurality of segments for storing data values for access by the processing logic. The processing logic is arranged, when access to a data value is required, to issue an access... Agent: Nixon & Vanderhye, Pc

20090031083 - Storage control unit with memory cash protection via recorded log: A “Logging” method and apparatus is provided to protect control unit cached data not yet written to backing storage disk drives. This recording mechanism will copy “WRITE DATA” to a log at a target logically or physically external (to the storage controllers) location equally common to all members of the... Agent: Jordan And Hamburg LLP

20090031084 - Cache line replacement techniques allowing choice of lfu or mfu cache line replacement: Methods and apparatus allowing a choice of Least Frequently Used (LFU) or Most Frequently Used (MFU) cache line replacement are disclosed. The methods and apparatus determine new state information for at least two given cache lines of a number of cache lines in a cache, the new state information based... Agent: Ryan, Mason & Lewis, LLP

20090031085 - Directory for multi-node coherent bus: A method for maintaining cache coherency for a multi-node system using a specialized bridge which allows for fewer forward progress dependencies. A look-up of a local node directory is performed if a request received at a multi-node bridge of the local node is a system request. If a directory entry... Agent: Ibm Corp (ya) C/o Yee & Associates Pc

20090031086 - Directory for multi-node coherent bus: A method for maintaining cache coherency for a multi-node system using a specialized bridge which allows for fewer forward progress dependencies. A local node makes a determination whether a request is a local or system request. If the request is a local request, a look-up of a directory in the... Agent: Ibm Corp (ya) C/o Yee & Associates Pc

20090031087 - Mask usable for snoop requests: A system comprises a plurality of cache agents, a computing entity coupled to the cache agents, and a programmable mask accessible to the computing entity. The programmable mask is indicative of, for at least one memory address, those cache agents that can receive a snoop request associated with a memory... Agent: Hewlett Packard Company

20090031088 - Method and apparatus for handling excess data during memory access: A computer system includes a system memory and a processor having one or more processor cores and a memory controller. The memory controller may control data transfer to the system memory. The processor further includes a cache memory such as an L3 cache, for example, that includes a data storage... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)

20090031089 - Transpose memory and method thereof: A transpose memory circuit is provided which comprises a number of dual port memory blocks each having a plurality of storage cells each configured for storing one or more data word. The dual port memory blocks form a storage array for storing at least one input matrix and outputting the... Agent: Alston & Bird LLP

20090031090 - Apparatus and method for fast one-to-many microcode patch: A microcode patch apparatus including a patch array, a mux, and a RAM. The patch array receives a microcode ROM address and determines that the microcode ROM address matches one of a plurality of entries within the patch array. The patch array outputs a corresponding branch instruction and asserts a... Agent: Huffman Law Group, P.c.

20090031091 - Continuous timing calibrated memory interface: A system that adjusts the timing of write operations at a memory controller is described. This system operates by observing timing drift for read data at the memory controller, and then adjusting the timing of write operations at the memory controller based on the observed timing drift for the read... Agent: Pvf -- Rambus, Inc. C/o Park, Vaughan & Fleming, LLP

20090031092 - Data reception system: A data reception system includes a data acquisition unit acquiring data from a predetermined transmission path, an access control unit storing the data acquired by the data acquisition unit in a predetermined storage area, and a plurality of storage areas. The plurality of storage areas includes a first storage area... Agent: Rader Fishman & Grauer Pllc

20090031093 - Memory system and method for two step memory write operations: A method of operating a memory component that includes a memory core includes receiving, from external control lines, a write command that specifies a write operation. The write command is stored for a first time period after receiving the write command. After the first time period, the write operation is... Agent: Morgan Lewis & Bockius LLP/rambus Inc.

20090031094 - Method and device for interleaving data: A data interleaving device is provided that includes an input, an output, and a data interleaver coupled to the input and the output. The input receives data originating from a plurality of processing blocks. The output transfers interleaved data to the plurality of processing blocks. The data interleaver includes a... Agent: Docket Clerk

20090031095 - Purge operations for solid-state storage devices: A storage system that comprises multiple solid-state storage devices includes a command set that enables a host system to initiate one or more types of purge operations. The supported purge operations may include an erase operation in which the storage devices are erased, a sanitization operation in which a pattern... Agent: Knobbe Martens Olson & Bear LLP

20090031097 - Creating backups in storage systems: Embodiments include methods, apparatus, and systems for creating backups in storage systems. One embodiment includes a method that uses a background process to asynchronously copy data from a production virtual disk (vdisk) to a two-tier mirrorclone on a backup disk in a storage system.... Agent: Hewlett Packard Company

20090031099 - Power interrupt recovery in a hybrid memory subsystem: A memory subsystem includes volatile memory and nonvolatile memory, and logic to interrupt a power down save operation of the memory subsystem upon detection of a restoration of system power, and to enable use of the memory subsystem by the system if sufficient nonvolatile memory capacity of the memory subsystem... Agent: Fsp Llc

20090031096 - Storage system and method for recovering from a system failure: An apparatus and method for rapidly resuming the processing of client requests after a system failure event are disclosed. Accordingly, a surviving storage system, upon detecting a system failure event at a partner storage system, executes a takeover routine and conditions its system memory to reflect the state of the... Agent: Sonnenschein Nath & Rosenthal LLP

20090031098 - Variable partitioning in a hybrid memory subsystem: A memory subsystem may include logic to make available to the device into which it is installed at least one portion of the volatile memory that will be backed up to the nonvolatile memory in the event of device power failure. The logic may make available to the device at... Agent: Fsp Llc

20090031100 - Memory reallocation in a computing environment: Systems and methods for reallocating memory in a computing environment are provided. The method comprises deallocating first memory space allocated to a first software application in a first execution context, in response to determining that a first page size associated with the first memory space allocation is inappropriate for said... Agent: Century Ip Group, Inc. [ibm Us]

20090031101 - Data processing system: Before arbitration is performed in an arbitration section, an access from a master is kept in a waiting state until update of a conversion table buffer is performed, and an address conversion section is provided in a subsequent stage of the arbitration section. Without waiting for the completion of buffer... Agent: Mcdermott Will & Emery LLP

20090031102 - Mapping an n-bit application ported from an m-bit application to an n-bit architecture: Embodiments of the present invention provide a system that maps an N-bit application to virtual memory. The N-bit application may be obtained by porting an M-bit application to an N-bit architecture where N is greater than M. During operation, the system receives a request to map an N-bit application to... Agent: Pvf -- Apple Inc. C/o Park, Vaughan & Fleming LLP

20090024785 - Method and program for file information write processing: The file information write processing method according to the present invention is a file information write processing method wherein a computer executes a process for outputting instruction corresponding to a file information write instruction from an application to a device driver, wherein: searching clusters which are empty areas within an... Agent: Staas & Halsey LLP

20090024784 - Method for writing data into storage on chip and system thereof: Disclosed are a method for writing data into a first storage on a chip and a system thereof. The method includes storing an initial firmware into a second storage on the chip, programming the first storage according to a specific data by utilizing the initial firmware, and blocking further programming... Agent: North America Intellectual Property Corporation

20090024787 - Data writing method and apparatus: Provided are a data writing method and apparatus. In the data writing method, data that is to be written to a first storage medium and the address of the first storage medium are received, data is read from the address of the first storage medium, the received data is compared... Agent: Staas & Halsey LLP

20090024786 - External storage device: An external storage device includes a hard-drive, a flash memory, and a memory arrangement unit. The memory arrangement determines if the tag of the data accessed by a computer stored in the tag list of the memory arrangement unit and controls the hard-drive and the flash memory according to the... Agent: North America Intellectual Property Corporation

20090024788 - Portable electronic device and data control method: A portable electronic device is provided with a storage section which stores various pieces of information and a transmitter/receiver section which transmits and receives data to and from external equipment. It is determined whether or not data paired with write data contained in a write command is stored by the... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20090024789 - Memory circuit system and method: A memory circuit system and method are provided in the context of various embodiments. In one embodiment, an interface circuit remains in communication with a plurality of memory circuits and a system. The interface circuit is operable to interface the memory circuits and the system for performing various functionality (e.g.... Agent: Zilka-kotab, Pc- Mrm1

20090024790 - Memory circuit system and method: A memory circuit system and method are provided in the context of various embodiments. In one embodiment, an interface circuit remains in communication with a plurality of memory circuits and a system. The interface circuit is operable to interface the memory circuits and the system for performing various functionality (e.g.... Agent: Zilka-kotab, Pc- Mrm1

20090024791 - Solid state disk controller and data processing method thereof: A solid state disk controller includes a volatile memory having a memory area storing sector bit map values, and a memory controller. In a read operation, the memory controller selectively reads at least one sector among a plurality of sectors forming a page of an external non-volatile memory based on... Agent: F. Chau & Associates, Llc

20090024792 - Disk array including plural exchangeable magnetic disk unit: To provide a storage apparatus in which a plurality of drives in a unit are separately treated and the unit can be easily exchanged for another unit even when RAID groups are freely composed. The storage apparatus includes a plurality of drive cases in each of which a plurality of... Agent: Mattingly, Stanger, Malur & Brundidge, P.c.

20090024793 - Method and apparatus for managing data in a hybrid drive system: The illustrative embodiments described herein provide an apparatus and method for managing data in a hybrid drive system. In one embodiment, a process determines whether the detachable memory contains clean data in response to identifying that a cache portion of a detachable memory is unavailable. The clean data does not... Agent: Ibm Corp (ya) C/o Yee & Associates Pc

20090024794 - Enhanced access to data available in a cache: Enhanced access data available in a cache. In one embodiment, a cache maintaining copies of source data is formed as a volatile memory. On receiving a request directed to the cache for a copy of a data element, the requested copy maintained in the cache is sent as a response... Agent: Law Firm Of Naren Thappeta

20090024795 - Method and apparatus for caching data: A relay unit inputs data and an index. A cache management unit determines whether or not a space area to cache data exists. In the case where there is a space area, the cache management unit caches data. An identifier generating unit generates an identifier corresponding to contents of the... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090024796 - High performance multilevel cache hierarchy: A digital system is provided with a hierarchical memory system having at least a first and second level cache and a higher level memory. If a requested data item misses in both the first cache level and in the second cache level, a line of data containing the requested data... Agent: Texas Instruments Incorporated

20090024797 - Cache residence prediction: The cache residence prediction mechanism can be implemented at the cache side, the memory side, or both. A cache-side prediction mechanism can predict that data requested by a cache miss can be found in another cache if the cache miss address matches an address tag of a cache line in... Agent: F. Chau & Associates, Llc

20090024798 - Storing data: The invention provides a method of storing data in a computing device, the method including the steps of creating a memory file system in non-pageable kernel memory of the computing device, writing data to the memory file system and transferring the written data to a pageable memory space allocated to... Agent: Hewlett Packard Company

20090024799 - Technique for preserving cached information during a low power mode: A technique to retain cached information during a low power mode, according to at least one embodiment. In one embodiment, information stored in a processor's local cache is saved to a shared cache before the processor is placed into a low power mode, such that other processors may access information... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20090024800 - Method and system for using upper cache history information to improve lower cache data replacement: A system for managing data in a plurality of storage locations. In response to a least recently used algorithm wanting to move data from a cache to a storage location, an aging table is searched for an associated entry for the data. In response to finding the associated entry for... Agent: Ibm Corp (ya) C/o Yee & Associates Pc

20090024801 - Method and system to detect a cached web page: A method and system to determine whether a web page has been cached is provided. An example system comprises a cookie generator, a cookie distributor, and a cookie evaluator. The cookie distributor may be configured to provide the code to a client system, in response to a request for web... Agent: Schwegman, Lundberg & Woessner/ebay

20090024802 - Non-volatile memory sharing system for multiple processors and related method thereof: A non-volatile memory sharing system is provided. The non-volatile memory sharing system includes a plurality of processors comprising at least a first processor and a second processor, a non-volatile memory, and a processor bridge coupled between the first processor and the second processor. The non-volatile memory is coupled to the... Agent: North America Intellectual Property Corporation

20090024803 - Multipath accessible semiconductor memory device having shared register and method of operating thereof: A semiconductor memory device for use in a multiprocessor system may be provided. A chip size may be controlled, and a design of circuit may be relatively simplified. The semiconductor memory device for use in a multiprocessor system may include at least two shared memory areas commonly accessible by processors... Agent: Harness, Dickey & Pierce, P.L.C

20090024804 - Memory controllers for processor having multiple programmable units: A parallel hardware-based multithreaded processor is described. The processor includes a general purpose processor that coordinates system functions and a plurality of microengines that support multiple hardware threads. The processor also includes a memory control system that has a first memory controller that sorts memory references based on whether the... Agent: Fish & Richardson, Pc

20090024805 - System, method and computer-readable medium for enabling access to additional memory capacity: A method, system and computer-readable media for exchanging information via an electronics communications are provided. A computer includes a memory and an access logic are bi-directionally communicatively coupled with a controller. The memory includes an open memory area and a partitioned memory area, wherein the open area available is for... Agent: Patrick Reilly

20090024806 - Storage device, storage controller, system, method of storing data, method of reading data and file system: A storage device comprises a storage location, an interface coupled to the storage location, and a data conversion circuit coupled to the storage location and to the interface. The interface is configured for an exchange of data between the storage device and external circuitry coupled to the interface. The data... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Qimonda

20090024807 - Memory controller and method for optimized read/modify/write performance: A memory controller optimizes execution of a read/modify/write command by breaking the RMW command into separate and unique read and write commands that do not need to be executed together, but just need to be executed in the proper sequence. The most preferred embodiments use a separate RMW queue in... Agent: Martin & Associates, Llc

20090024808 - Memory controller and method for optimized read/modify/write performance: A memory controller optimizes execution of a read/modify/write command by breaking the RMW command into separate and unique read and write commands that do not need to be executed together, but just need to be executed in the proper sequence. The most preferred embodiments use a separate RMW queue in... Agent: Martin & Associates, Llc

20090024809 - Managing purgeable memory objects: A system and method of managing purgeable memory objects includes a LIFO and/or FIFO queue for volatile memory objects, which can be emptied at a rate that matches the speed of a page queue.... Agent: Fish & Richardson P.c.

20090024810 - Memory area management method: In a storage device, a method is provided for preventing the risk of data loss and a significant decrease of writing speed due to area shrinkage when erased erase blocks have become fewer. A process of allocating a new page includes determining whether the length of a deallocated pages list... Agent: Stanley P. Fisher Reed Smith LLP

20090024811 - Method for storing a data block containing data for controlling a technical process, and control and automation device: The invention proposes a method and a control apparatus for storing a first data block containing data for controlling a technical process in a first memory area of an automation apparatus. In this case, a second data block containing data for controlling the technical process is stored in a second... Agent: Siemens Corporation Intellectual Property Department

20090024812 - Copying writes from primary storages to secondary storages across different networks: Provided are a method, system, and article of manufacture for copying writes from primary storages to secondary storages across different networks. A failure notification is communicated, using a first network protocol, from a primary device in a first group of at least one primary device and at least one corresponding... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20090024814 - Providing an administrative path for accessing a writeable master storage volume in a mirrored storage environment: A technique provides an administrative path for accessing a writeable master storage volume in a mirrored storage environment. Illustratively, a writeable master storage volume stores a master set of data addressable by a corresponding pathname, and zero or more read-only (e.g., load-balancing) mirrored storage volumes are configured to store a... Agent: Cesari And Mckenna, LLP

20090024813 - Recoverability of a dataset associated with a multi-tier storage system: Embodiments of the present invention pertain to improving recoverability of a dataset associated with a multi-tier storage system. According to one embodiment, updates to a dataset are stored in first storage. The dataset and a point-in-time copy of the dataset reside on second storage, and the first storage provides higher... Agent: Hewlett Packard Company

20090024815 - Remote copy system: A remote copy system includes a plurality of first storage systems and a plurality of second storage systems. Each first storage system assigns a sequential number to write data received from the host and sends the write data with the sequential number to the second storage system. One of the... Agent: Mattingly, Stanger, Malur & Brundidge, P.c.

20090024816 - Non-linear stochastic processing storage device: A storage device includes an interface for receiving and outputting messages for processing data units, wherein each data unit includes message input field parameters, message output field parameters, and content field parameters, a non-volatile memory for storing data units, a volatile memory, and a processor coupled to the interface, the... Agent: Pietragallo Gordon Alfano Bosick & Raspanti, LLP

20090024819 - Adaptive memory system for enhancing the performance of an external computing device: An adaptive memory system is provided for improving the performance of an external computing device. The adaptive memory system includes a single controller, a first memory type (e.g., Static Random Access Memory or SRAM), a second memory type (e.g., Dynamic Random Access Memory or DRAM), a third memory type (e.g.,... Agent: Christensen, O'connor, Johnson, Kindness, Pllc

20090024817 - Device, system, and method of publishing information to multiple subscribers: Device, system, and method of publishing information to multiple subscribers. For example, a data publisher capable of communication with one or more subscribers includes: a memory allocator to allocate a memory area of a local memory unit of the data publisher for storing data to be accessible for Remote Direct... Agent: Empk & Shiloh, LLP C/o Landon Ip, Inc.

20090024820 - Memory allocation for crash dump: A method and module for performing a crash dump in a data processing apparatus in which memory for running the crash dump routine is allocated at the time of the crash. The method comprises running a first routine to identify memory locations of data for use by a second routine;... Agent: Hewlett Packard Company

20090024818 - Memory management method, information processing apparatus, and memory management program: In a computer including a processor for executing a program and a storage that includes a first storage area and a second storage area for storing objects generated by the executed program, the processor stores objects generated by executing the program in the first storage area. If an object stored... Agent: Mattingly, Stanger, Malur & Brundidge, P.c.

20090024821 - Device for storing data and method for dividing space for data storing: A device for data storing with logically separated areas has a partition divided into logically separated blocks (2, 3, 4) created from logically separated smallest areas (1). The greatest logically separated areas of that disk are blocks of memory called teraclusters, which are divided into smaller areas, 256 GB in... Agent: Matthias Scholl

20090024822 - Circuit for transfoming address: A circuit for transforming memory address is disclosed. A first memory address is transformed into a second memory address with more bits than the first memory address for providing a memory. The memory space is an even multiple of the maximum of the first memory address. Therefore a large memory... Agent: Wpat, Pc

20090024823 - Overlayed separate dma mapping of adapters: DMA mapping for adapters configured to communicate with respect to a computer processor memory structure via DMA and configured to have DMA mapping space for control information and data. The adapters are separated into groups. The control information DMA mapping of the adapters is separated into at least three types:... Agent: John H. Holcombe Ibm Corporation, Ip Law Dept.

20090024824 - Processing system having a supported page size information register: A processing system includes initialization software that is executable by a processor to identify one or more memory page sizes supported by the processing system. The supported memory page sizes that are identified by the initialization software are stored in one or more memory page size identification registers. Individual bits... Agent: Brinks Hofer Gilson & Lione

20090024825 - Real time paged computing device and method of operation: A component of a computing device, such as the kernel of an operating system, is arranged to identify real time processes running on the device and transparently lock the memory owned by such processes to avoid them being paged out. The kernel is also able to inspect all inter-process communications... Agent: Saul Ewing LLP (philadelphia)

20090024826 - Galois-based incremental hash module: Various systems and methods for implementing a Galois-based incremental hash module are disclosed. For example, a method involves computing a first hash of a first string of an input stream. The first hash is computed by performing one or more Galois mathematical operations upon portions of the first string. A... Agent: Campbell Stephenson LLP

20090024827 - Method and system for dynamically determining hash function values for file transfer integrity validation: A method and system for dynamically determining hash values for file transfer integrity validation. In response to a request for a transfer of a data file between a first computing system and a second computing system, the first computing system loads a first portion of the data file to a... Agent: Schmeiser, Olsen & Watts

20090024828 - Method and system of digital signal processing: A system comprises a system interface to receive one or more instruction sets from a microcontroller and to receive digital data to be processed. The system further comprises a controller that is reconfigurable according to the one or more instruction sets received by the system interface. The system further comprises... Agent: Stolowitz Ford Cowger, LLP/cypress

20090019208 - Techniques for implementing virtual storage devices: Some embodiments include a storage device with a storage medium having a memory capacity. The storage device also includes virtual storage device firmware that is configured to directly respond to commands from a guest operating system in a virtual machine for accesses to a subset of the memory capacity of... Agent: Steven J. Cahill/ Hitachi Gst

20090019209 - Reservation required transactions: A computer readable medium is provided embodying instructions executable by a processor to performing a method for performing a transaction including a transaction head and a transaction tail, the method includes executing die transaction head, including executing at least one memory reserve instruction to reserve a transactional memory location that... Agent: Frank Chau, Esq. F. Chau & Associates, LLC

20090019210 - Nonvolatile memory apparatus: The service life of memory cards is to be substantially elongated against the occurrence of faulty blocks. A control logic searches blocks in a nonvolatile memory cell array for any acquired fault on the basis of a fault-inviting code in a management information section. If any faulty block is detected,... Agent: Miles & Stockbridge PC

20090019216 - Disk drive device and method for saving a table for managing data in non-volatile semiconductor memory in disk drive device: Embodiments of the present invention help to suppress adverse effects on the host computer operation caused by saving a segment table. According to one embodiment, a hard disk drive (HDD) creates a segment table to associate addresses of user data in a flash memory with LBAs in a magnetic disk.... Agent: Townsend And Townsend And Crew LLP

20090019211 - Establishing a redundant array of inexpensive drives: Establishing, with a USB RAID controller connected to a USB hub and with USB mass storage devices connected to the USB hub and the USB RAID controller through USB connectors, the USB hub controlled by a USB host controller, a RAID array including enumerating, by the USB host controller, the... Agent: Ibm (rps-blf) C/o Biggers & Ohanian, LLP

20090019212 - Flash disk of phone book: t

20090019213 - Method and control unit for operating a non-volatile memory, in particular for use in motor vehicles: A method for operating a nonvolatile memory, wherein the nonvolatile memory is configured to read out an erased data pattern when reading out a memory area that has not been written in, and performing the operations or tasks of setting a memory area for storing operating variable data that are... Agent: Kenyon & Kenyon LLP

20090019215 - Method and device for performing cache reading: Method and device for reading data from a semiconductor device, where tR is a read operation time, tT is a buffer transfer time, and tH is a host transfer time, where at least two of tR, tT, and tH may be overlapped to reduce a total transfer time.... Agent: Harness, Dickey & Pierce, P.L.C

20090019217 - Non-volatile memory and method with memory planes alignment: A non-volatile memory is constituted from a set of memory planes, each having its own set of read/write circuits so that the memory planes can operate in parallel. The memory is further organized into erasable blocks, each for storing a logical group of logical units of data. In updating a... Agent: Davis Wright Tremaine LLP - Sandisk Corporation

20090019218 - Non-volatile memory and method with non-sequential update block management: In a nonvolatile memory with block management system that supports update blocks with non-sequential logical units, an index of the logical units in a non-sequential update block is buffered in RAM and stored periodically into the nonvolatile memory. In one embodiment, the index is stored in a block dedicated for... Agent: Davis Wright Tremaine LLP - Sandisk Corporation

20090019214 - Register having security function and computer system including the same: A register having a security function is provided. The register includes: a write security unit and a storage unit. The write security unit outputs a first control signal to control whether a write operation is permissible, in response to a write signal, an address signal, and a write permission signal.... Agent: F. Chau & Associates, LLC

20090019219 - Compressing address communications between processors: In one embodiment, the present invention includes a method for determining if data of a memory request by a first agent is in a memory region represented by a region indicator of a region table of the first agent, and transmitting a compressed address for the memory request to other... Agent: Trop Pruner & Hu, PC

20090019220 - Method of filtering high data rate traffic: A method of filtering high data rate traffic (2) based on its content, the method comprising identifying candidate fixed size partial strings (3) within the traffic; comparing characters within the candidate partial string with a content addressable memory (1) containing wanted partial string values and identifying matching traffic; wherein the... Agent: Crowell & Moring LLP Intellectual Property Group

20090019221 - Efficient chunked java object heaps: A mechanism is disclosed for offset-based addressing in the chunks of a chunked heap. The mechanism provides for storing a side data structure within a portion of a chunk, where the side data structure begins at a predetermined offset within the range of virtual memory addresses allocated to the chunk.... Agent: Hickman Palermo Truong & Becker, LLP And Sun Microsystems, Inc.

20090019222 - Method and system for placement of logical data stores to minimize request response time: Logical data stores are placed on storages to minimize store request time. The stores are sorted. A store counter and a storage counter are each set to one. (A), (B), and (C) are repeated until the storage counter exceeds the number of storages within the array. (A) is setting a... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20090019224 - Data storage and transfer device and method: A data storage and transfer device includes the combination of a flash memory chip for storing data, a memory card connector, a male connector and a female connector configured to mate with the male connector. Data can be transferred to or from a memory card inserted in the memory card... Agent: The Webb Law Firm, P.C.

20090019223 - Method and systems for providing remote strage via a removable memory device: A method and systems are described for providing remote storage via a removable memory device. The method includes intercepting a file write operation associated with storing a first file to the device and a file read operation associated with retrieving a second file from the device. In response to intercepting... Agent: Scenera Research, LLC

20090019225 - Information processing apparatus and information processing system: With respect to memory access instructions contained in an internal representation program, an information processing apparatus generates a load cache instruction, a cache hit judgment instruction, and a cache miss instruction that is executed in correspondence with a result of a judgment process performed according to the cache hit judgment... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090019226 - Methods and systems for providing a level of access to a computing device: A method for responding to read requests for a data block of a storage device, the storage device providing access to a hardened appliance and providing unrestricted access to a computing device, includes the step of executing a computing device in a requested one of a plurality of execution modes.... Agent: Choate, Hall & Stewart / Citrix Systems, Inc.

20090019227 - Method and apparatus for refetching data: Methods and apparatus for refetching data to store in a cache are disclosed. According to one aspect of the present invention, a method includes identifying a speculative set that identifies at least a first element that is associated with a cache. The first element has at least a first representation... Agent: Technology & Innovation Law Group, PC

20090019228 - Data cache invalidate with data dependent expiration using a step value: According to embodiments of the invention, a step value and a step-interval cache coherency protocol may be used to update and invalidate data stored within cache memory. A step value may be an integer value and may be stored within a cache directory entry associated with data in the memory... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20090019229 - Data prefetch throttle: A system and method taught herein control data prefetching for a data cache by tracking prefetch hits and overall hits for the data cache. Data prefetching for the data cache is disabled based on the tracking of prefetch hits and data prefetching is enabled for the data cache based on... Agent: Qualcomm Incorporated

20090019234 - Cache memory device and data processing method of the device: A cache memory device is provided. The cache memory device includes a memory including a first cache memory region and a second cache memory region, and a control block. The control block determines a type of data to be received. The control block also performs at least one of transmitting... Agent: F. Chau & Associates, LLC

20090019230 - Dynamic initial cache line coherency state assignment in multi-processor systems: A method, system, and computer program product for providing lines of data from shared resources to caching agents are provided. The method, system, and computer program product provide for receiving a request from a caching agent for a line of data stored in a shared resource, assigning one of a... Agent: Ibm Rp-rps Sawyer Law Group LLP

20090019231 - Method and apparatus for implementing virtual transactional memory using cache line marking: Embodiments of the present invention implement virtual transactional memory using cache line marking. The system starts by executing a starvation-avoiding transaction for a thread. While executing the starvation-avoiding transaction, the system places starvation-avoiding load-marks on cache lines which are loaded from and places starvation-avoiding store-marks on cache lines which are... Agent: Pvf -- Sun Microsystems Inc. C/o Park, Vaughan & Fleming LLP

20090019232 - Specification of coherence domain during address translation: A processing system includes a plurality of coherency domains and a plurality of coherency agents. Each coherency agent is associated with at least one of the plurality of coherency domains. At a select coherency agent of the plurality of coherency agents, an address translation for a coherency message is performed... Agent: Larson Newman Abel Polansky & White, LLP

20090019233 - Structure for dynamic initial cache line coherency state assignment in multi-processor systems: A design structure embodied in a machine readable storage medium for designing, manufacturing, and testing a system for providing lines of data from shared resources to caching agents are provided. The system provides for receiving a request from a caching agent for a line of data stored in a shared... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20090019235 - Apparatus and method for caching data in a computer memory: A memory apparatus that exclusive ORs, for validity data having an array of logical values indicative of whether the sectors are valid, each bit of the validity data with the next bit, masks a bit string having an array of the exclusive ORs except the first bit of bits whose... Agent: Ibm Microelectronics Intellectual Property Law

20090019236 - Data write/read auxiliary device and method for writing/reading data: A data write/read auxiliary device and method for writing/reading data are provided. A data storage unit and a program storage unit are installed in the data write/read auxiliary device, wherein the program storage unit is for storing automatic execution program and protection program. When the data write/read auxiliary device is... Agent: Clark & Brody

20090019237 - Multipath accessible semiconductor memory device having continuous address map and method of providing the same: A semiconductor memory device for use in a multiprocessor system includes at least two shared memory areas and a row decoder. The at least two shared memory areas are accessible in common by multiple processors of the multiprocessor system through different ports, and assigned based on predetermined memory capacity to... Agent: Volentine & Whitt PLLC

20090019239 - Memory controller granular read queue dynamic optimization of command selection: A memory controller receives read requests from a processor into a read queue. The memory controller dynamically modifies an order of servicing the requests based on how many pending requests are in the read queue. When the read queue is relatively empty, requests are serviced oldest first to minimize latency.... Agent: Robert R. Williams IBM Corporation

20090019238 - Memory controller read queue dynamic optimization of command selection: A memory controller receives read requests from a processor into a read queue. The memory controller dynamically modifies an order of servicing the requests based on how many pending requests are in the read queue. When the read queue is relatively empty, requests are serviced oldest first to minimize latency.... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20090019240 - Information processing device, information processing method, and computer program: An information processing apparatus and method for enabling efficient content download and transfer processing operations are provided. In downloading content, a content identifier thereof is acquired, a particular piece of content subject to transfer to an external device is identified on the basis of the acquired content identifier, the identified... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090019241 - Storage media storing storage control program, storage controller, and storage control method:

20090019242 - Semiconductor memory and memory system: A plurality of cell arrays are assigned different addresses. An access information unit holds access enable information indicating the number of the cell arrays to be simultaneously activated. An array control unit activates at least one of the cell arrays corresponding to the access enable information, in response to an... Agent: Arent Fox LLP

20090019243 - Dram power management in a memory controller: A memory controller uses a power- and performance-aware scheduler which reorders memory commands based on power priorities. Selected memory ranks of the memory device are then powered down based on rank localities of the reordered commands. The highest power priority may be given to memory commands having the same rank... Agent: Ibm Corporation (jvm)

20090019244 - Information record/read apparatus: A plurality of sectors 1a, which constitute a flash memory 1, are each divided into a plurality of blocks 1b. Each of the plurality of blocks 1b has a data recording area 1c, and a block state management area 1d for recording data indicating whether data is unrecorded, is recording,... Agent: Birch Stewart Kolasch & Birch

20090019245 - Methods for implementation of data formats on a removable disk drive storage system: An archiving system including one or more removable disk drives embedded in removable disk cartridges, referred to simply as removable disk drives. The removable disk drives allow for expandability and replacement such that the archiving system need not be duplicated to add new or more storage capacity. In embodiments, the... Agent: Townsend And Townsend And Crew, LLP

20090019246 - Power efficient storage with data de-duplication: Power consumption in a storage system is reduced by selectively controlling power supplied to the storage devices, while also incorporating a de-duplication function to reduce the amount of required storage capacity. First storage devices are initially in a powered on condition and second storage devices are in a powered off... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20090019247 - Bufferless transactional memory with runahead execution: A method for executing an atomic transaction includes receiving the atomic transaction at a processor for execution, determining a transactional memory location needed in memory for the atomic transaction, reserving the transactional memory location while all computation and store operations of the atomic transaction are deferred, and performing the computation... Agent: Frank Chau, Esq. F. Chau & Associates, LLC

20090019248 - Portable device and method for controlling shared memory in portable device: A portable terminal and a method of controlling a shared memory, the portable terminal are disclosed. The portable terminal includes a memory unit, being equipped with at least 2 ports and having a storage block partitioned into partitioned blocks in a quantity of n, and a plurality of processors, reading... Agent: Birch Stewart Kolasch & Birch

20090019249 - Chunk-specific executable code for chunked java object heaps: A mechanism is disclosed for storing one or more chunk-specific sets of executable instructions at one or more predetermined offsets within chunks of a chunked heap. The mechanism provides for storing a chunk-specific set of executable instructions within a portion of a chunk, where the set of executable instructions begins... Agent: Hickman Palermo Truong & Becker, LLP And Sun Microsystems, Inc.

20090019250 - Wirelessly configurable memory device addressing: A memory device includes a plurality of memory modules and a memory management module. A memory module of the plurality of memory modules includes a plurality of memory cells and a memory millimeter wave (MMW) transceiver. The memory management module determines a main memory configuration for at least some of... Agent: Garlick Harrison & Markison

20090019251 - Dynamic storage pools with thin provisioning: A method for data storage, including configuring in a data storage system a volume storage pool as data storage resources available for allocation of volumes in the data storage system. The method also includes defining a threshold value for the volume storage pool. When the allocation of the volumes causes... Agent: Darby & Darby P.C.

20090019252 - System and method for cache-locking mechanism using translation table attributes for replacement class id determination: A system, method, and program product are provided that identifies a cache set using Translation LookAside Buffer (TLB) attributes. When a virtual address is requested, the method, system, and program product identifies a cache set using buffer attributes. When a virtual address is received, an attempt is made to load... Agent: Ibm Corporation- Austin (jvl) C/o Van Leeuwen & Van Leeuwen

20090019254 - Processing system implementing multiple page size memory organization with multiple translation lookaside buffers having differing characteristics: A processing system includes memory management software responsive to a translation lookaside buffer miss. The memory management software updates translation lookaside buffer information based on one or more missed virtual addresses. Entries of a first translation lookaside buffer are updated by the memory management software with information corresponding to the... Agent: Brinks Hofer Gilson & Lione

20090019253 - Processing system implementing variable page size memory organization: A processing system includes memory management software responsive to changes in a page table. The memory management software consolidates contiguous page table entries into one or more page table entries that have larger memory page sizes. The memory management software updates the entries of a translation lookaside buffer that correspond... Agent: Brinks Hofer Gilson & Lione

20090019255 - System and method for cache-locking mechanism using segment table attributes for replacement class id determination: A system, method, and program product are provided that identifies a cache set using Segment LookAside Buffer attributes. When an effective address is requested, an attempt is made to load the received effective address from an L2 cache. When this attempt results in a cache miss, the system identifies a... Agent: Ibm Corporation- Austin (jvl) C/o Van Leeuwen & Van Leeuwen

20090019256 - Memory transaction handling in a data processing apparatus: A data processing apparatus is provided comprising a memory, memory management unit and identification circuitry for identifying a predetermined type of data access transaction within a plurality of received data access transactions. The memory management unit is responsive to the predetermined type of data access transaction to both permit completion... Agent: Nixon & Vanderhye P.C.

20090013125 - Memory card: A memory device is provided which is connected to operate with power and clocks supplied from a host apparatus. The memory device includes external terminals, a flash memory chip to store data, an IC chip to process data; and a controller chip connected with the external terminals, the flash memory... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090013126 - Method and devices for compressing delta log using flash transactions: Each received piece of configuration data is added at a next currently free location in a volatile buffer. The contents of the volatile buffer are compressed after adding each received piece of configuration data. The compression result is stored in a non-volatile flash memory. If the compression result was shorter... Agent: Young & Thompson

20090013124 - Rom code patch method: The present invention relates to a method of replacing a sequence of one or more commands from a routine in a ROM of a device using a RAM. The method allows replacing part of a routine, for example a single command, while continuing to use the rest of the commands... Agent: Connolly Bove Lodge & Hutz LLP

20090013123 - Storage bridge and storage device and method applying the storage bridge: A storage bridge includes a flash memory register unit for temporarily storing data and for storing data of a storage unit when a host unit stores data to the storage unit, and a transmission interface control unit coupled to the flash memory register unit for controlling operations of the flash... Agent: North America Intellectual Property Corporation

20090013122 - Transaction method for managing the storing of persistent data in a transaction stack: A transaction method manages the storing of persistent data to be stored in at least one memory region of a non-volatile memory device before the execution of update operations that involve portions of the persistent data. Values of the persistent data are stored in a transaction stack that includes a... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.

20090013127 - Systems and methods for determining refresh rate of memory based on rf activities: Systems and methods for determining a refresh rate of volatile memory are provided. In this regard, a representative system, among others, includes a radio frequency (RF) device; a computing device that communicates with the RF device, the computing device including a refresh manager that monitors activities of the RF device;... Agent: Hewlett-packard Company

20090013128 - Runtime machine supported method level caching: A computer system includes a disk space comprising at least one type of memory and an operating system for controlling allocations and access to the disk space. A runtime machine runs applications through at least one of the operating system or directly on at least one processor of the computer... Agent: Ibm Corp (ap) C/o Amy Pattillo

20090013129 - Commonality factoring for removable media: Systems and methods for commonality factoring for storing data on removable storage media are described. The systems and methods allow for highly compressed data, e.g., data compressed using archiving or backup methods including de-duplication, to be stored in an efficient manner on portable memory devices such as removable storage cartridges.... Agent: Townsend And Townsend And Crew, LLP

20090013130 - Multiprocessor system and operating method of multiprocessor system: According to one aspect of embodiments, a multiprocessor system includes a plurality of processors, cache memories corresponding respectively to the processors, and a cache access controller. The cache access controller accesses at least one of the cache memories except one of the cache memories corresponding to one of the processors... Agent: Arent Fox LLP

20090013132 - Cache memory: A cache memory comprises a first set of storage locations for holding syllables and addressable by a first group of addresses; a second set of storage locations for holding syllables and addressable by a second group of addresses; addressing circuitry operable to provide in each addressing cycle a pair of... Agent: Docket Clerk

20090013131 - Low power semi-trace instruction cache: A semi-trace cache combines elements and features of an instruction cache and a trace cache. An ICache portion of the semi-trace cache is filled with instructions fetched from the next level of the memory hierarchy while a TCache portion is filled with traces gleaned either from the actual stream of... Agent: Marvell/finnegan Henderson LLP C/o Finnegan, Henderson, Farabow, Garnett Et. Al.

20090013133 - Cache line marking with shared timestamps: Embodiments of the present invention provide a system that marks cache lines using shared timestamps. During operation, the system starts a transaction for a thread, wherein starting the transaction involves recording the value of an active timestamp and incrementing a transaction or overflow counter (TO_counter) corresponding to the recorded value.... Agent: Pvf -- Sun Microsystems Inc. C/o Park, Vaughan & Fleming LLP

20090013134 - Memory apparatus and protecting method thereof: A memory apparatus and method for protecting the memory apparatus are provided. The memory apparatus includes a memory unit, a memory control unit, a switch and a control circuit. The memory control unit is used for reading from or writing to the memory unit and has a build-in protection unit.... Agent: Jianq Chyun Intellectual Property Office

20090013135 - Unordered load/store queue: A method and processor for providing full load/store queue functionality to an unordered load/store queue for a processor with out-of-order execution. Load and store instructions are inserted in a load/store queue in execution order. Each entry in the load/store queue includes an identification corresponding to a program order. Conflict detection... Agent: Winstead PC

20090013136 - De-interleaving and interleaving for data processing: Among others, techniques and apparatus are described for de-interleaving. A data processing apparatus includes a buffer to store interleaved data; an interleaving index producing unit to produce an interleaving index of the interleaved data; and an output control unit to output the data stored in the buffer using the interleaving... Agent: Fish & Richardson, PC

20090013137 - Storage system and power consumption reduction method, and information processing apparatus: In a storage system including: plural information processing apparatuses each of which copies data sent from a host computer to create archive data in accordance with redundancy sent from the host computer; and a storage apparatus having physical disks that store the archive data, the storage apparatus includes a management... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20090013139 - Apparatus and method to prevent data loss in nonvolatile memory: An apparatus for preventing data loss of a nonvolatile memory device and a method thereof are presented The apparatus includes a nonvolatile memory including a memory cell which writes bit information to a first page and a second page included in a first block using plural states which are implemented... Agent: Sughrue Mion, PLLC

20090013138 - Backup archive management: Apparatus, systems, and methods may operate to taking a snapshot of an origin volume in conjunction with a backup process in response to receiving a snapshot request by a snapshot service. A persistent time stamp associated with the creation time of the snapshot may be recorded on the origin volume.... Agent: Schwegman, Lundberg & Woessner/novell

20090013140 - Hardware acceleration of commonality factoring with removable media: Systems and methods for commonality factoring for storing data on removable storage media are described. The systems and methods allow for highly compressed data, e.g., data compressed using archiving or backup methods including de-duplication, to be stored in an efficient manner on portable memory devices such as removable storage cartridges.... Agent: Townsend And Townsend And Crew, LLP

20090013141 - Information leakage detection for storage systems: A storage system compares content of new data received from a host computer with content of existing data already stored in the storage system. If the content of the new data matches the content of the existing data, the storage system determines whether the computer that sent the new data... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20090013142 - Digital broadcasting contents move function: To provide a move function that can restore copy-once contents even if the contents are failed to be moved midway, an information storage device 10 comprises data moving unit 14 for making program data 12 stored on a first storage medium 11 unreproducible and for moving the program data 12... Agent: Staas & Halsey LLP

20090013143 - System and method for read synchronization of memory modules: A memory module includes several memory devices coupled to a memory hub. The memory hub includes several link interfaces coupled to respective processors, several memory controller coupled to respective memory devices, a cross-bar switch coupling any of the link interfaces to any of the memory controllers, a write buffer and... Agent: Karen Henckel, Esq. Dorsey & Whitney LLP

20090013144 - Integrated circuit, and integrated circuit system: A main LSI includes a plurality of master circuits that transmit access requests to an SDRAM, an input interface that receives an access request from a master circuit in a sub LSI, an arbitration circuit that receives the access requests from the internal master circuits and from the input interface,... Agent: Wenderoth, Lind & Ponack L.L.P.

20090013146 - Method to create a uniformly distributed multi-level cell (mlc) bitstream from a non-uniform mlc bitstream: A method, system, and computer software product for operating a collection of memory cells. Each memory cell in the collection of memory cells is configured to store a binary multi-bit value delimited by characteristic parameter bands. In one embodiment, a transforming unit transforms an original collection of data to a... Agent: Law Office Of Ido Tuchman (yor)

20090013145 - System and method for finding kernel memory leaks: The invention provides a system and method for tracking memory information associated with dynamically loaded kernel modules with the help of a tracking system. The tracking system defines its own kernel memory allocation functions. Whenever, a dynamic kernel module is loaded/unloaded into/from the kernel space, these newly defined functions are... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20090013147 - Computer system for performing error monitoring of partitions: A computer system for performing error monitoring of partitions. A partition status buffer (PSB) denotes a status (GOOD, BAD, NOCARE) of each partition of at least two partitions. The BAD status denotes that the partition has encountered at least one error that is currently unrepaired. A global supervisor mapping (GSM)... Agent: Schmeiser, Olsen & Watts

20090013148 - Block addressing for parallel memory arrays: Apparatus and methods provide associative mapping of the blocks of two or more memory arrays such that data, such as pages of data, from the good blocks of the two or more memory arrays can be read in an alternating manner for speed or can be read in parallel for... Agent: Knobbe Martens Olson & Bear LLP

20090013149 - Method and apparatus for caching of page translations for virtual machines: A method for caching of page translations for virtual machines includes managing a number of virtual machines using a guest page table of a guest operating system, which provides a first translation from a guest-virtual memory address to a first guest-physical memory address or an invalid entry, and a host... Agent: F. Chau & Associates, LLC

20090006712 - Data ordering in a multi-node system: Methods and apparatuses for data ordering in a multi-node system that supports non-snoop memory transactions.... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20090006713 - Dynamic virtualized volume: Providing a virtualized volume to a client and virtualized files on the virtualized volume by emulating a disk, emulating a file system, and storing an file corresponding to the each virtualized file on at least one of a plurality of volume layers.... Agent: Intel Corporation C/o Intellevate, LLC

20090006714 - Method for optimizing virtualization technology and memory protections using processor-extensions for page table and page directory striping: In a virtualized processor based system causing a transition to a virtual machine monitor executing on the processor based system in response to a modification of a page table of a guest executing in a virtual machine of the processor based system, and the virtual machine monitor responding to the... Agent: Intel Corporation C/o Intellevate, LLC

20090006715 - Memory chip for high capacity memory subsystem supporting multiple speed bus: A memory module contains an interface for receiving memory access commands from an external source, in which a first portion of the interface receives memory access data at a first bus frequency and a second portion of the interface receives memory access data at a second different bus frequency. Preferably,... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20090006716 - Processing wrong side i/o commands: A dual ported active-active array controller apparatus is provided having a first policy processor partnered with a first ISP having a first plurality of dedicated purpose FCs, a second policy processor partnered with a second ISP having a second plurality of dedicated purpose FCs, a communication bus interconnecting the ISPs,... Agent: Mccarthy Law Group

20090006717 - Emulation of read-once memories in virtualized systems: The subject matter herein relates to computer systems and, more particularly, to emulation of read-once memories in virtualized systems. Various embodiments described herein provide systems, methods, and software that leverage the value of read-once memory for purposes such as keeping data or instructions secret and protected from unauthorized viewers, applications,... Agent: Schwegman, Lundberg & Woessner, P.A.

20090006727 - system programming process for at least one non-volatile means of storage of a wireless communication device, corresponding programming equipment and packet to be downloaded: It is proposed an in-system programming process, by programming equipment of at least one non-volatile storage memory of a communication device. The process includes the following steps: transmission, by the programming equipment to the communication device, of at least one extension file; transmission, by at least one of the extension... Agent: Westman Champlin & Kelly, P.A.

20090006722 - Auto start configuration with portable mass storage device: A portable flash memory storage device such as a memory card can configure a host device upon insertion. The configuration may specify applications or other sequences of operations to be executed by the host upon insertion of the card. Files on the card may be associated with an appropriate application... Agent: Sandisk Corporation Jenkins, Wilson, Taylor & Hunt, P.A.

20090006725 - Memory device: A memory device includes a nonvolatile memory and a controller. The nonvolatile memory includes a storage area having a plurality of memory blocks each including a plurality of nonvolatile memory cells, and a buffer including a plurality of nonvolatile memory cells and configured to temporarily store data, and in which... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090006723 - Method for communicating with a non-volatile memory storage device: Method for a storage device is provided. The method includes interpreting a command from a host system, wherein a command parser module for a storage device interprets the command; and extracting information regarding an operation from the command, wherein the command parser module extracts the information and interfaces with the... Agent: Sandisk Corporation Jenkins, Wilson, Taylor & Hunt, P.A.

20090006724 - Method of storing and accessing header data from memory: Methods of storing and accessing data using a header portion of a file are disclosed. In an embodiment, a method of storing content in a non-volatile memory is disclosed. The method includes reading a content file including media content and including a trailer, storing information related to the trailer together... Agent: Toler Law Group

20090006721 - Methods of auto starting with portable mass storage device: A portable flash memory storage device such as a memory card can configure a host device upon insertion. The configuration may specify applications or other sequences of operations to be executed by the host upon insertion of the card. Files on the card may be associated with an appropriate application... Agent: Sandisk Corporation Jenkins, Wilson, Taylor & Hunt, P.A.

20090006726 - Multiple adapter for flash drive and access method for same: A multiple adapter is used for assembling a plurality of flash drives. The multiple adapter includes a multiple expansion port, a detector, a file manager, and a controller. The multiple expansion port coupled to the flash drives. The detector is coupled to the multiple expansion port for detecting store information... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang

20090006719 - Scheduling methods of phased garbage collection and house keeping operations in a flash memory system: An embodiment of a non-volatile memory storage system comprises a memory controller, and a flash memory module. The memory controller manages the storage operations of the flash memory module. The memory controller is configured to assign a priority level to one or more types of house keeping operations that may... Agent: Weaver Austin Villeneuve Sampson LLP

20090006720 - Scheduling phased garbage collection and house keeping operations in a flash memory system: An embodiment of a non-volatile memory storage system comprises a memory controller, and a flash memory module. The memory controller manages the storage operations of the flash memory module. The memory controller is configured to assign a priority level to one or more types of house keeping operations that may... Agent: Weaver Austin Villeneuve Sampson LLP

20090006718 - System and method for programmable bank selection for banked memory subsystems: A programmable memory system and method for enabling one or more processor devices access to shared memory in a computing environment, the shared memory including one or more memory storage structures having addressable locations for storing data. The system comprises: one or more first logic devices associated with a respective... Agent: Scully, Scott, Murphy & Presser, P.C.

20090006729 - Cache for a multi thread and multi core system and methods thereof: According to one embodiment, the present disclosure generally provides a method for improving the performance of a cache of a processor. The method may include storing a plurality of data in a data Random Access Memory (RAM). The method may further include holding information for all outstanding requests forwarded to... Agent: Grossman, Tucker, Perreault & Pfleger, PLLC C/o Intellevate, LLC

20090006728 - Virtual machine state snapshots: Saving state of Random Access Memory (RAM) in use by guest operating system software is accomplished using state saving software that starts a plurality of compression threads for compressing RAM data blocks used by the guest. Each compression thread determines a compression level for a RAM data block based on... Agent: Woodcock Washburn LLP (microsoft Corporation)

20090006730 - Data eye monitor method and apparatus: An apparatus and method for providing a data eye monitor. The data eye monitor apparatus utilizes an inverter/latch string circuit and a set of latches to save the data eye for providing an infinite persistent data eye. In operation, incoming read data signals are adjusted in the first stage individually... Agent: Scully, Scott, Murphy & Presser, P.C.

20090006731 - Semiconductor memory device: A semiconductor memory device is capable of controlling an address and data mask information through the use of a common part, thereby reducing chip size. The semiconductor memory device for receiving the addresses and data mask information via a common pin includes a buffer unit and a shift register unit.... Agent: Rabin & Berdo, PC

20090006732 - Storage system with synchronized processing elements: A storage system is provided with an ASIC having an interconnect selectively coupling a plurality of dedicated purpose function controllers in the ASIC to a policy processor, via a list manager in the ASIC communicating on a peripheral device bus to which the policy processor is connected, and an event... Agent: Mccarthy Law Group

20090006734 - Apparatus, system, and method for selecting a cluster: An apparatus, system, and method are disclosed for selecting a source cluster in a distributed storage configuration. A measurement module measures system factors for a plurality of clusters over a plurality of instances. The clusters are in communication over a network and each cluster comprises at least one tape volume... Agent: Kunzler & Mckenzie

20090006733 - Drive resources in storage library behind virtual library: Embodiments include methods, apparatus, and systems for managing resources in a physical storage library behind a virtual storage library. In one embodiment, priorities are assigned to copy applications and rules determine which when applications are assigned to resources in the physical storage library.... Agent: Hewlett Packard Company

20090006735 - Storage unit and disk control method: A storage unit is provided which is connected to a host computer through a network, having one or more disks in which read and write operations are performed during rotation and a control unit for controlling the rotation of the disks. In the storage unit, when receiving a message which... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20090006736 - Systems and methods for managing data storage: This invention is directed to a system by which data received by an electronic device from a server may be selectively stored in cache. The electronic device may define an anchor that is related to the current position of a playhead reading data stored in cache. The electronic device may... Agent: Ropes & Gray LLP

20090006745 - Accessing snapshot data image of a data mirroring volume: Methods and apparatus relating to accessing snapshot data image of a data mirroring volume are described. In one embodiment, a host computer is allowed to access a first data volume and a second data volume. The second data volume may comprise data corresponding to a snapshot image of the first... Agent: Caven & Aghevli C/o Intellevate, LLC

20090006744 - Automated intermittent data mirroring volumes: Methods and apparatus relating to automated intermittent data mirroring volumes are described. In one embodiment, data mirroring may be suspended in response to occurrence of a scheduled or predefined event. Other embodiments are also disclosed.... Agent: Caven & Aghevli C/o Intellevate, LLC

20090006740 - Data structure for highly efficient data queries: Apparatus and method for highly efficient data queries. In accordance with various embodiments, a data structure is provided in a memory space with a first portion characterized as a virtual data space storing non-sequential entries and a second portion characterized as a first data array of sequential entries. At least... Agent: Mccarthy Law Group

20090006738 - Host adaptive seek technique environment: A data storage system and associated method implement a HASTE with a policy engine that continuously collects qualitative information about a network load to the data storage system in order to dynamically characterize the load, and continuously correlates a command profile to a data storage device of the data storage... Agent: Mccarthy Law Group

20090006737 - Implementing a redundant array of inexpensive drives: Methods, apparatus, and products are disclosed for implementing a redundant array of inexpensive drives (‘RAID’) with an external RAID controller and hard disk drives from separate computers, including configuring by the external RAID controller a RAID array, the RAID array comprising hard disk drives from the separate computers, the external... Agent: Ibm (rps-blf) C/o Biggers & Ohanian, LLP

20090006742 - Method and apparatus improving performance of a digital memory array device: A method for improving performance of a digital memory array device including a plurality of memory cells; each respective memory cell storing a first digital value and a second digital value being an inverse of the first digital value; storing of the first and second digital values being controlled by... Agent: Law Office Of Donald D. Mondul C/o Intellevate

20090006746 - Online restriping technique for distributed network based virtualization: A technique is provided for implementing online restriping of a volume in a storage area network. A first instance of the volume is instantiated at a first port of the fibre channel fabric for enabling I/O operations to be performed at the volume. While restriping operations are being performed at... Agent: Beyer Weaver LLP

20090006741 - Preferred zone scheduling: A data storage system and associated method are provided wherein a policy engine continuously collects qualitative information about a network load to the data storage system in order to dynamically characterize the load and continuously correlates the load characterization to the content of a command queue of transfer requests for... Agent: Mccarthy Law Group

20090006739 - Request priority seek manager: As apparatus and associated method for a dual active-active array storage system with a first controller with top level control of a first memory space and a second controller with top level control of a second memory space different than the first memory space. A seek manager residing in only... Agent: Mccarthy Law Group

20090006743 - Writing data to multiple storage devices: In one embodiment, the present invention includes a method to write a first block group of multiple data blocks of a write request into a first disk in a first time period, and write a second block group of the multiple data blocks into the second disk in the first... Agent: Trop Pruner & Hu, PC

20090006749 - Drive tracking system for removable media: A system, and associated methods, comprises a storage drive adapted to accommodate a removable storage medium and a central processing unit (“CPU”) configured to execute code. The code causes the storage drive to record audit information onto the storage medium. The audit information may comprise an identifying value identifying the... Agent: Hewlett Packard Company

20090006747 - Information processing apparatus and control method for the same: An information processing apparatus capable of connecting to a plurality of terminal devices over a network includes a recording/reproducing unit configured to receive a removable memory medium, a detector configured to detect insertion and removal of the removable memory medium in and from the recording/reproducing unit, and a controller configured... Agent: Canon U.s.a. Inc. Intellectual Property Division

20090006748 - Method for operating a memory interface with sim functions: A method for operating a host device includes inserting a plug-in adapter, having a subscriber identity module (SIM) component disposed thereon, into a host receptacle of the host device. A memory card is inserted into a memory receptacle on the plug-in adapter. After inserting the plug-in adapter and the memory... Agent: Sandisk C/o Darby & Darby PC

20090006750 - Leveraging transactional memory hardware to accelerate virtualization and emulation: Various technologies and techniques are disclosed for using transactional memory hardware to accelerate virtualization or emulation. State isolation can be facilitated by providing isolated private state on transactional memory hardware and storing the stack of a host that is performing an emulation in the isolated private state. Memory accesses performed... Agent: Microsoft Corporation

20090006751 - Leveraging transactional memory hardware to accelerate virtualization and emulation: Various technologies and techniques are disclosed for using transactional memory hardware to accelerate virtualization or emulation. A central processing unit is provided with the transactional memory hardware. Code backpatching can be facilitated by providing transactional memory hardware that supports a facility to maintain private memory state and an atomic commit... Agent: Microsoft Corporation

20090006753 - Design structure for accessing a cache with an effective address: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for accessing a processor cache is provided. The design structure comprises a processor having a processor core, a level one cache, and circuitry. The circuitry is configured to execute an access instruction in... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20090006754 - Design structure for l2 cache/nest address translation: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for accessing a processor's cache memory is provided. The design structure comprises a processor having one or more level one caches, a lookaside buffer configured to include a corresponding entry for each cache... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20090006752 - High capacity memory subsystem architecture employing hierarchical tree configuration of memory modules: A high-capacity memory subsystem architecture utilizes multiple memory modules arranged in a hierarchical tree configuration, in which at least some communications from an external source traverse successive levels of the tree to reach memory modules at the lowest level. Preferably, the memory system employs buffered memory chips having dual-mode operation,... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20090006755 - Providing application-level information for use in cache management: In one embodiment, the present invention includes a method for associating a first identifier with data stored by a first agent in a cache line of a cache to indicate the identity of the first agent, and storing the first identifier with the data in the cache line and updating... Agent: Trop Pruner & Hu, PC

20090006756 - Cache memory having configurable associativity: A processor cache memory subsystem includes a cache memory having a configurable associativity. The cache memory may operate in a fully associative addressing mode and a direct addressing mode with reduced associativity. The cache memory includes a data storage array including a plurality of independently accessible sub-blocks for storing blocks... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)

20090006757 - Hierarchical cache tag architecture: An apparatus, system, and method are disclosed. In one embodiment, the apparatus includes a cache memory coupled to a processor. The apparatus additionally includes a tag storage structure that is coupled to the cache memory. The tag storage structure can store a tag associated with a location in the cache... Agent: Intel Corporation C/o Intellevate, LLC

20090006758 - System bus structure for large l2 cache array topology with different latency domains: A cache memory which loads two memory values into two cache lines by receiving separate portions of a first requested memory value from a first data bus over a first time span of successive clock cycles and receiving separate portions of a second requested memory value from a second data... Agent: Ibm Corporation (jvm)

20090006759 - System bus structure for large l2 cache array topology with different latency domains: A cache memory which loads two memory values into two cache lines by receiving separate portions of a first requested memory value from a first data bus over a first time span of successive clock cycles and receiving separate portions of a second requested memory value from a second data... Agent: Ibm Corporation (jvm)

20090006760 - Structure for dual-mode memory chip for high capacity memory subsystem: A design structure is provided for a dual-mode memory chip supporting a first operation mode in which received data access commands contain chip select data to identify the chip addressed by the command, and control logic in the memory chip determines whether the command is addressed to the chip, and... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20090006761 - Cache pollution avoidance: Embodiments of the present invention are directed to a scheme in which information as to the future behavior of particular software is used in order to optimize cache management and reduce cache pollution. Accordingly, a certain type of data can be defined as “short life data” by using knowledge of... Agent: Emulex Design & Manufacturing Corporation C/o Morrison & Foerster LLP

20090006762 - Method and apparatus of prefetching streams of varying prefetch depth: Method and apparatus of prefetching streams of varying prefetch depth dynamically changes the depth of prefetching so that the number of multiple streams as well as the hit rate of a single stream are optimized. The method and apparatus in one aspect monitor a plurality of load requests from a... Agent: Scully, Scott, Murphy & Presser, P.C.

20090006763 - Arrangement and method for update of configuration cache data: An arrangement and method for update of configuration cache data in a disk storage subsystem in which a cache memory (110) is updated using two-phase (220, 250) commit technique. This provides the advantage that known changes to the subsystem do not require an invalidate/rebuild style operation on the cache. This... Agent: Harrington & Smith, PC

20090006766 - Data processing system and method for predictively selecting a scope of broadcast of an operation utilizing a history-based prediction: According to a method of data processing, a predictor is maintained that indicates a historical scope of broadcast for one or more previous operations transmitted on an interconnect of a data processing system. A scope of broadcast of a subsequent operation is predictively selected by reference to the predictor.... Agent: Dillon & Yudell LLP

20090006764 - Insertion of coherence requests for debugging a multiprocessor: A method and system are disclosed to insert coherence events in a multiprocessor computer system, and to present those coherence events to the processors of the multiprocessor computer system for analysis and debugging purposes. The coherence events are inserted in the computer system by adding one or more special insert... Agent: Scully, Scott, Murphy & Presser, P.C.

20090006765 - Method and system for reducing cache conflicts: Disclosed is a system and method for storing a plurality of data packets in a plurality of memory buffers in a cache memory for reducing cache conflicts. The method includes determining size of each of a plurality of data packets; storing a first data packet of the plurality of data... Agent: Grossman, Tucker, Perreault & Pfleger, PLLC C/o Intellevate, LLC

20090006768 - Method and apparatus for accessing a split cache directory: A method and apparatus for accessing a cache. The method includes receiving a request to access the cache. The request includes an address of requested data to be accessed. The method also includes using a first portion of the address to perform an access to a first directory for the... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20090006767 - Using ephemeral stores for fine-grained conflict detection in a hardware accelerated stm: A method and apparatus for fine-grained filtering in a hardware accelerated software transactional memory system is herein described. A data object, which may have any arbitrary size, is associated with a filter word. The filter word is in a first default state when no access, such as a read, from... Agent: Intel Corporation C/o Intellevate, LLC

20090006770 - Novel snoop filter for filtering snoop requests: A method and apparatus for supporting cache coherency in a multiprocessor computing environment having multiple processing units, each processing unit having one or more local cache memories associated and operatively connected therewith. The method comprises providing a snoop filter device associated with each processing unit, each snoop filter device having... Agent: Scully, Scott, Murphy & Presser, P.C.

20090006769 - Programmable partitioning for high-performance coherence domains in a multiprocessor system: A multiprocessor computing system and a method of logically partitioning a multiprocessor computing system are disclosed. The multiprocessor computing system comprises a multitude of processing units, and a multitude of snoop units. Each of the processing units includes a local cache, and the snoop units are provided for supporting cache... Agent: Scully, Scott, Murphy & Presser, P.C.

20090006771 - Digital data management using shared memory pool: Memory management techniques involve establishing a memory pool having an amount of sharable memory, and dynamically allocating the sharable memory to concurrently manage multiple sets of sequenced units of digital data. In an exemplary scenario, the sets of sequenced units of digital data are sets of time-ordered media samples forming... Agent: Microsoft Corporation

20090006772 - Memory chip for high capacity memory subsystem supporting replication of command data: A memory module contains a first interface for receiving data access commands and a second interface for re-transmitting data access commands to other memory modules, the second interface propagating multiple copies of received data access commands to multiple other memory modules. The memory module is preferably used in a high-capacity... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20090006781 - structure for memory chip for high capacity memory subsystem supporting multiple speed bus: A design structure is provided for a memory module containing an interface for receiving memory access commands from an external source, in which a first portion of the interface receives memory access data at a first bus frequency and a second portion of the interface receives memory access data at... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20090006784 - Address exclusive control system and address exclusive control method: An address lock register managing address exclusive control is made to retain not only an address but also a request type, an access destination, and a cache block. Upon receiving a new request, firstly, the address lock register is referred to judge whether an exclusive condition is satisfied, that is,... Agent: Staas & Halsey LLP

20090006782 - Apparatus and method for accessing a memory device:

20090006777 - Apparatus for reducing cache latency while preserving cache bandwidth in a cache subsystem of a processor: A processor cache memory subsystem includes a cache controller coupled to a tag logic unit. The cache controller may monitor read request resources associated with the cache subsystem and receive read requests for data stored in a data storage array of the cache subsystem. The tag logic unit may determine... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)

20090006775 - Dual-mode memory chip for high capacity memory subsystem: A dual-mode memory chip supports a first operation mode in which received data access commands contain chip select data to identify the chip addressed by the command, and control logic in the memory chip determines whether the command is addressed to the chip, and a second operation mode in which... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20090006774 - High capacity memory subsystem architecture employing multiple-speed bus: A high-capacity memory subsystem architecture utilizes multiple memory modules coupled to one or more access modules by a communications medium, in which at least some data is transferred between an access module and memory modules at a first bus frequency, and at least some data is transferred between the access... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20090006783 - Information processing system, reader/writer, information processing apparatus, access control management method and program: There is provided an information processing system having a reader/writer and an information processing apparatus. The reader/writer include a processing section for executing service processing, a processing completion determining section for determining completion of the processing, a control information generating section for generating control information, depending on the determination result... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090006779 - Memory control system and memory data fetching method: The invention discloses a memory control system and a method to read data from memory. The memory control system comprises a control unit, a storage device, and a microprocessor. The memory control system and the method to read data from memory according to the invention utilize an unbalanced microprocessor clock... Agent: Joe Mckinney Muncy

20090006776 - Memory link training: An apparatus and method are disclosed. In one embodiment, the apparatus trains a memory link using a signal alignment unit. The signal alignment unit aligns a read data strobe signal that is transmitted on the link with the center of a read data eye transmitted on the link. Next, the... Agent: Intel Corporation C/o Intellevate, LLC

20090006778 - Methods and apparatus for h-arq process memory management: Methods and apparatus are presented for H-ARQ process dynamic memory management. A method for dynamically managing memory for storing data associated with H-ARQ processes is presented, which includes receiving a packet associated with a H-ARQ process, determining if a free memory location is available in a H-ARQ buffer, assigning the... Agent: Qualcomm Incorporated

20090006773 - Signal processing apparatus: A signal processing apparatus able to raise a processing capability in processing accompanying access to a storing means is provided. Stream control units (SCU) 203_0 to 203_3 access data at an external memory system or local memories 204_0 to 204_3 according to a thread under control from a host processor.... Agent: Sonnenschein Nath & Rosenthal LLP

20090006780 - Storage system and path management method: A storage system and a path management method, which can facilitate node replacement are proposed. In the storage system, the host sets plural paths between the host and the volume and holds path information composed of management information on each of the paths; and the management apparatus includes an integrated... Agent: Stanley P. Fisher Reed Smith LLP

20090006785 - Apparatus, method and system for comparing sample data with comparison data: An apparatus, method and system for comparing sample data with comparison date is disclosed. One embodiment provides a plurality of storage locations, an interface coupled to a plurality of storage locations for an exchange of data between the plurality of storage locations and external circuitry coupled to the interface, and... Agent: Dicke, Billig & Czaja

20090006788 - Associating a flexible data hierarchy with an availability condition in a granting matrix: Systems and methods are presented that may involve specifying an availability condition associated with a data hierarchy in a database. It may also involve storing the availability condition in a matrix and using the matrix to determine access to data in the data hierarchy. In embodiments, the data hierarchy may... Agent: Strategic Patents P.C..

20090006789 - Computer program product and a system for a priority scheme for transmitting blocks of data: Provided are techniques for transmitting blocks of data. It is determined whether any high priority out of sync (HPOOS) indicator is set to indicate that a number of modified segments associated with a block of data are less than or equal to a modified segments threshold. In response to determining... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20090006787 - Storage device with write barrier sensitive write commands and write barrier insensitive commands: The invention is a storage device which implements a write barrier command and provides means for a host to designate other write commands as being sensitive or insensitive to the existence of write barrier commands. The device can optimize the execution of commands by changing the order of execution of... Agent: Marlin Knight

20090006786 - System for communicating with a non-volatile memory storage device: A storage device is provided. The storage device includes a command parser module for interpreting a command from a host system in a platform independent format; and for extracting information regarding an operation from the command, wherein the command parser module interfaces with the host system.... Agent: Sandisk Corporation Jenkins, Wilson, Taylor & Hunt, P.A.

20090006790 - High capacity memory subsystem architecture storing interleaved data for reduced bus speed: A high-capacity memory subsystem architecture utilizes multiple memory modules arranged in one or more clusters, each attached to a respective hub which in turn is attached to a memory controller. Within a cluster, data is interleaved so that each data access command accesses all modules of the cluster. The hub... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20090006794 - Asynchronous remote copy system and control method for the same: Provided is a control method for an asynchronous remote copy system, the method including: fixing data in a secondary volume; determining a certain area in the secondary volume that contains data required to be copied to a primary volume from the secondary volume in which the data is fixed; copying... Agent: Stanley P. Fisher Reed Smith LLP

20090006791 - Data movement and initialization aggregation: A system and method for copying and initializing a block of memory. To copy several data entities from a source region of memory to a destination region of memory, an instruction may copy each data entity one at a time. If an aggregate condition is determined to be satisfied, multiple... Agent: Rory D. Rankin Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20090006793 - Method and apparatus to enable runtime memory migration with operating system assistance: In a method for switching to a spare memory module during runtime, a processing system determines that utilization of an active memory module in the processing system should be discontinued. The processing system may then activate a mirror copy mode that causes a memory controller in the processing system to... Agent: Intel Corporation C/o Intellevate, LLC

20090006792 - System and method to identify changed data blocks: Differences between data objects stored on a mass storage device can be identified quickly and efficiently by comparing block numbers stored in data structures that describe the data objects. Bit-by-bit or byte-by-byte comparisons of the objects' actual data need only be performed if the block numbers are different. Objects that... Agent: Network Appliance/bstz Blakely Sokoloff Taylor & Zafman LLP

20090006796 - Media content processing system and non-volatile memory that utilizes a header portion of a file: A computer readable media storing operational instructions is disclosed. The instructions includes at least one instruction to store data of an encrypted computer readable file that includes a header portion and associated content data into a storage area of a non-volatile memory. The storage area includes a secure memory area... Agent: Toler Law Group

20090006795 - Security protection for cumputer long-term memory devices: A security protection device provides protection for computer long-term storage devices, such as hard drives. The security protection device is placed between a host computer and the storage device. The security protection device intercepts communications between the host and the storage device and examines any commands from the host to... Agent: Steven Bress

20090006797 - Fencing using a hierarchical relationship: A method and apparatus for processing a write request at a storage device is provided. A write request that identifies a sender of the write request is received at a storage device. The write request is examined to determine the identity of the sender. A determination is made as to... Agent: Hickman Palermo Truong & Becker/oracle

20090006798 - Structure for memory chip for high capacity memory subsystem supporting replication of command data: A design structure is provided for a memory module containing a first interface for receiving data access commands and a second interface for re-transmitting data access commands to other memory modules, the second interface propagating multiple copies of received data access commands to multiple other memory modules. The memory module... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20090006800 - Configurable memory system and method for providing atomic counting operations in a memory device: A memory system and method for providing atomic memory-based counter operations to operating systems and applications that make most efficient use of counter-backing memory and virtual and physical address space, while simplifying operating system memory management, and enabling the counter-backing memory to be used for purposes other than counter-backing storage... Agent: Scully, Scott, Murphy & Presser, P.C.

20090006799 - Handling multi-rank pools and varying degrees of control in volume allocation on storage controllers: Techniques are disclosed for optimizing volume allocation on storage controllers that may have varying degrees of control over directing storage on ranks of pools attached storage components. A performance-based volume allocation algorithm can optimize allocation for such various controllers in a smooth, uniform manner allowing changes from one degree of... Agent: Canady & Lortz LLP- Ibm

20090006801 - System, method and program to manage memory of a virtual machine: Management of virtual memory allocated by a virtual machine control program to a plurality of virtual machines. Each of the virtual machines has an allocation of virtual private memory divided into working memory, cache memory and swap memory. The virtual machine control program determines that it needs additional virtual memory... Agent: Ibm Corporation

20090006802 - Virtual storage space with cyclical wrapping grid function: Apparatus and method for arranging a virtual storage space with a cyclical wrapping grid function. The virtual storage space is formed from a physical memory and comprises a plurality of larger grains of selected storage capacity, each divided into a power of two number of smaller grains. Each of the... Agent: Mccarthy Law Group

20090006803 - L2 cache/nest address translation: A method and apparatus for accessing cache memory in a processor. The method includes accessing requested data in one or more level one caches of the processor using requested effective addresses of the requested data. If the one or more level one caches of the processor do not contain requested... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20090006804 - Bi-level map structure for sparse allocation of virtual storage: Apparatus and method for accessing a virtual storage space. The space is arranged across a plurality of storage elements, and a skip list is used to map as individual nodes each of a plurality of non-overlapping ranges of virtual block addresses of the virtual storage space from a selected storage... Agent: Mccarthy Law Group

20090006805 - Method and apparatus for supporting address translation in a virtual machine environment: In one embodiment, a method includes receiving control transitioned from a virtual machine (VM) due to a privileged event pertaining to a translation-lookaside buffer (TLB), and determining which entries in a guest translation data structure were modified by the VM. The determination is made based on metadata extracted from a... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20090006806 - Local memory and main memory management in a data processing system: A data processing system (2) is provided including a local memory (4) and a main memory (6). The local memory (4) is accessed by a data engine (8) using local-memory physical addresses. The main memory (6) is accessed by a microprocessor (10) using main-memory addresses. A translation store (16) serves... Agent: Nixon & Vanderhye, PC

20090006807 - Method for memory address arrangement: A method for memory address arrangement is provided. Data of different Y coordinates is moved to operation units divided by different X coordinates, or data of different X coordinates is moved to operation units divided by different Y coordinates, so as to realize the function of simultaneously longitudinally and laterally... Agent: J C Patents, Inc.