Electrical computers and digital processing systems: memory inventions 10/08

20080263256 - Logic device with write protected memory management unit registers: A logic device. The logic device includes a control module, a memory management unit, a memory module, and at least one first register. The memory management unit controls flow of software code between the control module and the memory module; the control module programs at least one of the first... Agent: Leveque Intellectual Property Law, P.C.

20080263257 - Checkpointed tag prefetcher: A dual-mode prefetch mechanism for implementing checkpoint tag prefetching includes: a data array for storing data fetched from cache memory; a set of cache tags for identifying the data stored in the data array; a set of checkpoint tags for storing data identification; a cache controller including prefetch logic, the... Agent: Michael Buchenhorner, P.A.

20080263258 - Method and system for migrating virtual machines between hypervisors: A method for migrating virtual machines between hypervisors is disclosed. Initially, metadata describing a virtual machine are automatically scanned and parsed. The structure of the metadata of a source virtual machine are automatically analyzed. Elements of this structure are mapped to corresponding entries of a target virtual machine. A target... Agent: Dillon & Yudell LLP

20080263262 - Command interface for memory devices: The self-contained command is executed in the memory device by extracting the parameters, applying the analog settings to the at least one of the memory cells responsively to the extracted parameters, and performing the specified memory access operation in accordance with the instruction on the at least one of the... Agent: Darby & Darby P.C.

20080263260 - Display interface buffer: A display interface buffer includes a general purpose memory to store data capable of being displayed on a panel, a plurality of display drivers to receive data from the general purpose memory, each of the display drivers to drive a different portion of the panel with the data, and processor... Agent: Stolowitz Ford Cowger, LLP/cypress

20080263259 - Hints model for optimization of storage devices connected to host and write optimization schema for storage devices: Architecture for data communications optimization based on generating and communicating “intents” or “hints” to a storage device and faster/slower solid state memory optimization. Data destined for storage on the storage device (capable of hints processing) can be bracketed to take advantage of improved performance associated with the hints processing. Data... Agent: Microsoft Corporation

20080263263 - Implementation-efficient multiple-counter value hardware performance counter: An implementation-efficient, multiple-counter value hardware performance counter is disclosed. A hardware counter of one embodiment includes a memory array and a hardware incrementer. The array stores counter values that are indexable by an index constructed based at least on the number of events to which the counter values correspond. The... Agent: Law Offices Of Michael Dryja

20080263261 - Storage apparatus and management unit setting method: A storage apparatus that provides a dynamically extensible virtual volume for a host apparatus that accesses the virtual volume is characterized by including: a management unit setting part for setting a management unit, with which an area for storing data sent from the host apparatus is divided on a predetermined-area... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080263265 - Adaptive dynamic reading of flash memories: Each of a plurality of flash memory cells is programmed to a respective one of L≧2 threshold voltage states within a threshold voltage window. Values of parameters of threshold voltage functions are adjusted in accordance with comparisons of the threshold voltages of some or all of the cells to two... Agent: Mark M. Friedman

20080263266 - Adaptive dynamic reading of flash memories: Each of a plurality of flash memory cells is programmed to a respective one of L≧2 threshold voltage states within a threshold voltage window. A histogram is constructed by determining how many of some or all of the cells have threshold voltages in each of two or more of m≧2... Agent: Mark M. Friedman

20080263264 - Data access control system and method of memory device: A data access control system of a memory includes a micro-processor, having a micro-controller, a command decoder, and a memory interface. The data access control system can be used to control display driving of a display system. The command decoder is used to decode the content of a data access... Agent: Jianq Chyun Intellectual Property Office

20080263268 - Digital signal processor: A digital signal processor is adapted to a working RAM, which is capable of storing a plurality of data in a rewritable manner and whose storage area is divided into a plurality of sub-areas that are designated by addresses in read/write operations, wherein an operation circuit performs calculations on the... Agent: Pillsbury Winthrop Shaw Pittman LLP

20080263267 - System on chip with reconfigurable sram: A system on chip comprises N components, where N is an integer greater than one, and a storage module. The storage module comprises a first memory, a control module, and a connection module. The first memory includes M blocks of static random access memory, where M is an integer greater... Agent: Harness, Dickey & Pierce P.L.C

20080263269 - Key selection device and process for content-addressable memory: A method and a computer readable medium having executable instructions are provided. The method and instructions when executed generates a first look-up key from a group of look-up key units stored in a data storage, generation of the first look up key being completed prior to the completion of a... Agent: Mcguirewoods, LLP

20080263270 - Method and apparatus for overlaying flat and/or tree based data sets onto content addressable memory (cam) device: A content addressable memory device (100) and method can have CAM blocks (102-0 to 102-29) organized in block sections (104-0 to 104-6). In an overlay mode of operation, an overlay engine (106) can access an algorithmic search (SPEAR) CAM (102-28 and 102-29) to generate overlay data set search keys (keyFIB<0>... Agent: Walker & Sako, LLP

20080263272 - Data storage management method: A method for selectively controlling reutilization of space in a virtual tape system (VTS) having a buffer and a multiple volume tape cartridge includes transferring data volume files to the VTS. The buffer transfers the data making up these files as virtual tape volumes (VTVs) to different locations of the... Agent: Brooks Kushman P.C. / Sun / Stk

20080263271 - System for selectively performing a secure data erase to ensure timely erasure: A system is provided to ensure a timely secure data erase by determining an erasure deadline for each physical volume of a plurality of physical volumes and calculating a remaining time for each physical volume. The remaining time is calculated for each physical volume by comparing a current date to... Agent: International Business Machines Corporation

20080263273 - Storage subsystem that connects fibre channel and supports online backup: A disk array connected to a storage area network via a fibre channel has one or more ports each controlled by a processor. Even the disk array with one port and one processor executes online processing and backup processing at the same time while considering an online processing load. A... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080263275 - Data storage controller: A system, method and computer program product for controlling a storage device. The system comprises a monitoring component for monitoring and storing information upon which storage device use can be predicted; a predictor component for predicting storage device use responsive to receipt of the information; and a control component for... Agent: Zilka-kotab, PC- Ibm

20080263276 - Method and apparatus for evaluating and improving disk access time in a raid system: Techniques for improving access time in data storage systems are disclosed. These techniques can be used to prevent undesirable access delays that are often experienced in conventional storage systems. “Slow-access” can be defined as an access operation that does not successfully complete within a predetermined amount of time. The “slow-access”... Agent: Beyer Law Group LLP/apple Inc.

20080263274 - System for determining allocation of tape drive resources for a secure data erase process: A system is provided to ensure a timely secure data erase by determining whether allocating an additional tape drive would improve secure data erase performance by evaluating a quantity of physical volumes to be secure data erased, a maximum queued threshold, an average time to an erasure deadline and a... Agent: International Business Machines Corporation

20080263277 - Storage device: A storage device is provided with a file I/O interface control device and a plurality of disk pools. The file I/O interface control device sets one of a plurality of storage hierarchies defining storage classes, respectively, for each of LUs within the disk pools, thereby forming a file system in... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080263278 - Cache reconfiguration based on run-time performance data or software hint: A method for reconfiguring a cache memory is provided. The method in one aspect may include analyzing one or more characteristics of an execution entity accessing a cache memory and reconfiguring the cache based on the one or more characteristics analyzed. Examples of analyzed characteristic may include but are not... Agent: Scully, Scott, Murphy & Presser, P.C.

20080263279 - Design structure for extending local caches in a multiprocessor system: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for caching data in a multiprocessor system is provided. The design structure includes a multiprocessor system, which includes a first processor including a first cache associated therewith, a second processor including a second... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20080263280 - Low complexity speculative multithreading system based on unmodified microprocessor core: A system, method and computer program product for supporting thread level speculative execution in a computing environment having multiple processing units adapted for concurrent execution of threads in speculative and non-speculative modes. Each processing unit includes a cache memory hierarchy of caches operatively connected therewith. The apparatus includes an additional... Agent: Scully, Scott, Murphy & Presser, P.C.

20080263281 - Cache memory system using temporal locality information and a data storage method: A cache memory system using temporal locality information and a data storage method are provided. The cache memory system including: a main cache which stores data accessed by a central processing unit; an extended cache which stores the data if the data is evicted from the main cache; and a... Agent: Sughrue Mion, PLLC

20080263282 - System for caching data: To ensure efficient access to a memory whose writing process is slow. There is provided a storage device for caching data read from a main memory and data to be written in the main memory, comprises a cache memory having a plurality of cache segments, one or more cache segments... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20080263283 - System and method for tracking changes in l1 data cache directory: Method, system and computer program product for tracking changes in an L1 data cache directory. A method for tracking changes in an L1 data cache directory determines if data to be written to the L1 data cache is to be written to an address to be changed from an old... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20080263284 - Methods and arrangements to manage on-chip memory to reduce memory latency: Methods, systems, and media for reducing memory latency seen by processors by providing a measure of control over on-chip memory (OCM) management to software applications, implicitly and/or explicitly, via an operating system are contemplated. Many embodiments allow part of the OCM to be managed by software applications via an application... Agent: Ibm Corporation (jss) C/o Schubert Osterrieder & Nickelson PLLC

20080263285 - Processor extensions for accelerating spectral band replication: Enhancements to hardware architectures (e.g., a RISC processor or a DSP processor) to accelerate spectral band replication (SBR) processing are described. In some embodiments, instruction extensions configure a reconfigurable processor to accelerat SBR and other audio processing. In addition to the instruction extensions, execution units (e.g., multiplication and accumulation units... Agent: Carr & Ferrell LLP

20080263287 - Multi-port memory device and communication system having the same: A communication system includes a first processor, a second processor, and a multi-port memory device. The multi-port memory device generates a first internal clock signal having a first frequency and a second internal clock signal having a second frequency based on an external clock signal. The multi-port memory device communicates... Agent: Marger Johnson & Mccollom, P.C.

20080263286 - Operation control of shared memory: A method of controlling a shared memory and a user terminal controlling the operation of the shared memory are disclosed. The portable terminal according to an embodiment of the present invention has a memory unit with a storage area partitioned to blocks in a quantity of n and a plurality... Agent: Ditthavong Mori & Steiner, P.C.

20080263288 - System and method for probing hypervisor tasks in an asynchronous environment: A system, method, and computer-usable medium for probing hypervisor tasks in an asynchronous environment. According to an embodiment of the invention, the partition firmware sends a request for data to the hypervisor. When the hypervisor receives the request for data, the hypervisor returns a taskID that identifies the task allocated... Agent: Dillon & Yudell LLP

20080263290 - Memory control apparatus and memory control method: According to one embodiment, a memory control apparatus controls a memory having a plurality of banks. This memory control apparatus has an access control section controlling such that a second access request issued from a second access unit is accepted after a first access request issued from a first access... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20080263291 - Method of doing pack ascii z series instructions: Emulation methods are provided for two PACK instructions, one for Unicode data and the other for ASCII coded data in which processing is carried out in a block-by-block fashion as opposed to a byte-by-byte fashion as a way to provide superior performance in the face of the usual challenges facing... Agent: Heslin Rothenberg Farley & Mesiti P.C.

20080263289 - Storage controller and storage control method: Provided are a storage controller and a storage control method capable of improving the transaction performance. This storage controller includes a disk controller for receiving a read command and a write command from a host computer, and an external disk controller and an internal disk device for sending and receiving... Agent: Stanley P. Fisher Reed Smith LLP

20080263292 - System and method for managng memory compression transparent to an operating system: In a computer system having an operating system and a compressed main memory defining a physical memory and a real memory characterized as an amount of main memory as seen by a processor, and including a compressed memory hardware controller device for controlling processor access to the compressed main memory,... Agent: Scully, Scott, Murphy & Presser, P.C.

20080263294 - Method for determining allocation of tape drive resources for a secure data erase process: A method and computer program product are provided to ensure a timely secure data erase by determining whether allocating an additional tape drive would improve secure data erase performance by evaluating a quantity of physical volumes to be secure data erased, a maximum queued threshold, an average time to an... Agent: International Business Machines Corporation

20080263293 - Method for selectively performing a secure data erase to ensure timely erasure: A method and computer program product are provided to ensure a timely secure data erase by determining an erasure deadline for each physical volume of a plurality of physical volumes and calculating a remaining time for each physical volume. The remaining time is calculated for each physical volume by comparing... Agent: International Business Machines Corporation

20080263295 - Methods, apparatus, and program products for improved finalization: Apparatus, methods, and computer program products are disclosed that improve management of a dynamic memory area. One aspect is a method that reclaims memory referenced by a finalizable-object that has been instantiated from a class definition that incorporates at least one parent class and one or more class-extensions into a... Agent: Pvf -- Sun Microsystems Inc. C/o Park, Vaughan & Fleming LLP

20080263298 - Semiconductor device controlling debug operation of processing unit in response to permission or prohibition from other processing unit: A semiconductor device includes a volatile memory for storing a first instruction group, a first processing unit for executing the first instruction group, a nonvolatile memory for storing a second instruction group, a second processing unit for executing a second instruction group, a control signal output unit for outputting a... Agent: Mcginn Intellectual Property Law Group, PLLC

20080263296 - System, method and computer program product for storing an information block: A method for storing an information block that includes determining to store a current version of an information block stored in a memory unit. The checking if a current version of the information is already stored in a storage unit. The current version of the information block is sent from... Agent: Ibm Corporation Intellectual Property Law Dept.

20080263297 - System, method, and software for enforcing information retention using uniform retention rules: Methods, systems, and software for enforcing archival of data objects into archive objects and managed destruction of the archive objects are disclosed. In some cases, the computer techniques include enforcing a retention rule, such as a retention date and archive properties, and a destruction indication, such as an expiration date,... Agent: Fish & Richardson, P.C.

20080263299 - Storage system and control method thereof: A storage system and a control method thereof that can avoid performance degradation of a write command from a host are provided. In the storage system, when a request for conversion from snapshot to actual data copy is received, first, a copy difference table is scanned from its leading bit... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080263300 - Storage media: A storage media for storing data and comprising an integral controller configured to control access to the data depending on the location of the storage media. The storage media may further comprise means to determine its location, e.g. such as a GPS receiver or a cellular network positioning solution. Alternatively,... Agent: Nxp, B.v. Nxp Intellectual Property Department

20080263301 - Key-controlled object-based memory protection: A method, system, and program key-controlled object-based memory protection are provided. A processing unit includes an authority check for controlling access by the processing unit to pages of memory according to whether a hardware protection key set currently loaded in an authority mask register allows access to the pages. In... Agent: Ibm Corp (ap) C/o Amy Pattillo

20080263302 - Non-volatile memory circuit, system, and method: A non volatile memory device includes a first buffer register configured to receive and store the data to be stored into the memory device provided via a memory bus. A command window is activatable for interposing itself for access to a memory matrix between the first buffer element and the... Agent: Graybeal, Jackson, Haley LLP

20080263303 - Linear combiner weight memory: A linear combiner weight memory. Various embodiments of the weight memory provide a weight bank and control logic. The weight bank is operable to couple with a data stream and may include four registers. The first register is operable to store a first in-phase weight value. The second register is... Agent: Hovey Williams LLP

20080263306 - Information processing apparatus having virtualization function, method of virtualization, and computer-readable recording medium: An information processing apparatus having a virtualization function for creating a virtual disk based on a logical volume selected from a plurality of storage areas comprises a host device for performing information processing on a storage device, and a virtualization switch for connecting the host device to the storage device... Agent: Staas & Halsey LLP

20080263304 - Latency aligned volume provisioning methods for interconnected multiple storage controller configuration: A system is composed of multiple storage control modules, which are connected to each other via interconnects. The aforesaid interconnects connecting the storage control modules may cause certain extra latency. Each storage control module may have data preservation module, which can preserve data stored by host computers. The system incorporates... Agent: Sughrue Mion, PLLC

20080263305 - Remove-on-delete technologies for solid state drive optimization: Technologies for identifying data stored on a solid state drive (“SSD”) device that correspond to data associated with a delete event, and marking the deleted data stored on the SSD as invalid such that the SSD can avoid unnecessary operations on the invalid data. Included are interfaces operable to communicate... Agent: Microsoft Corporation

20080263307 - Information processing apparatus and method, and program: Disclosed herein is an information processing apparatus, including: setting means for setting, a maximum transfer size; calculation means for subtracting a second data amount from a first data amount to calculate a third data amount; boundary determination means for determining whether this transfer will involve a page boundary being extended... Agent: Frommer Lawrence & Haug LLP

20080263308 - Storage allocation management in switches utilizing flow control: A computer program product and system for managing allocation of storage in a switch utilizing flow control are provided. The switch includes a plurality of ports and an internal storage divided into a plurality of storage units. The computer program product and system provide for monitoring an average number of... Agent: Ibm Rp-rps Sawyer Law Group LLP

20080263309 - Creating a physical trace from a virtual trace: In an embodiment, virtual trace records are read and physical trace records are created and displayed. The virtual trace records are associated with virtual processors allocated to logical partitions in a logically-partitioned computer system. Each of the virtual trace records has a wait timestamp, specifying a time at which a... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20080263310 - Parallel installation of logical partitions: An apparatus and method provide parallel installation of logical partitions on a computer system. The function of a hardware maintenance console is built into a logical partition configuration mechanism that resides in the system firmware. A virtual local area network (VLAN) is used by the logical partition configuration mechanism to... Agent: Martin & Associates, LLC

20080263311 - Parallel installation of logical partitions: An apparatus and method provide parallel installation of logical partitions on a computer system. The function of a hardware maintenance console is built into a logical partition configuration mechanism that resides in the system firmware. A virtual local area network (VLAN) is used by the logical partition configuration mechanism to... Agent: Martin & Associates, LLC

20080263312 - Parallel installation of logical partitions: An apparatus and method provide parallel installation of logical partitions on a computer system. The function of a hardware maintenance console is built into a logical partition configuration mechanism that resides in the system firmware. A virtual local area network (VLAN) is used by the logical partition configuration mechanism to... Agent: Martin & Associates, LLC

20080263313 - Pretranslating input/output buffers in environments with multiple page sizes: Pretranslating input/output buffers in environments with multiple page sizes that include determining a pretranslation page size for an input/output buffer under an operating system that supports more than one memory page size, identifying pretranslation page frame numbers for the buffer in dependence upon the pretranslation page size, pretranslating the pretranslation... Agent: International Corp (blf)

20080263314 - Address translation apparatus which is capable of easily performing address translation and processor system: An address translation apparatus includes first to third retention units, a comparison unit, and a translation unit. The first retention unit retains a multi-bit first address. The second retention unit retains a multi-bit second address different from the first address. The third retention unit retains first information indicating which bit... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080263315 - Computer memory addressing mode employing memory segmenting and masking: A computer addressing mode and memory access method rely on a memory segment identifier and a memory segment mask for indicating memory locations. In this addressing mode, a processor receives an instruction comprising the memory segment identifier and memory segment mask. The processor employs a two-level address decoding scheme to... Agent: Qualcomm Incorporated

20080263316 - Splash tables: an efficient hash scheme for processors: Also provided for are retrieving data items in a computer. A plurality of hash functions of data values in a probe key are computed. A corresponding memory location is determined for each of the plurality of hash functions. Data items in each memory location are examined to determine a match... Agent: Duke W. Yee

20080263256 - Logic device with write protected memory management unit registers: A logic device. The logic device includes a control module, a memory management unit, a memory module, and at least one first register. The memory management unit controls flow of software code between the control module and the memory module; the control module programs at least one of the first... Agent: Leveque Intellectual Property Law, P.C.

20080263257 - Checkpointed tag prefetcher: A dual-mode prefetch mechanism for implementing checkpoint tag prefetching includes: a data array for storing data fetched from cache memory; a set of cache tags for identifying the data stored in the data array; a set of checkpoint tags for storing data identification; a cache controller including prefetch logic, the... Agent: Michael Buchenhorner, P.A.

20080263258 - Method and system for migrating virtual machines between hypervisors: A method for migrating virtual machines between hypervisors is disclosed. Initially, metadata describing a virtual machine are automatically scanned and parsed. The structure of the metadata of a source virtual machine are automatically analyzed. Elements of this structure are mapped to corresponding entries of a target virtual machine. A target... Agent: Dillon & Yudell LLP

20080263262 - Command interface for memory devices: The self-contained command is executed in the memory device by extracting the parameters, applying the analog settings to the at least one of the memory cells responsively to the extracted parameters, and performing the specified memory access operation in accordance with the instruction on the at least one of the... Agent: Darby & Darby P.C.

20080263260 - Display interface buffer: A display interface buffer includes a general purpose memory to store data capable of being displayed on a panel, a plurality of display drivers to receive data from the general purpose memory, each of the display drivers to drive a different portion of the panel with the data, and processor... Agent: Stolowitz Ford Cowger, LLP/cypress

20080263259 - Hints model for optimization of storage devices connected to host and write optimization schema for storage devices: Architecture for data communications optimization based on generating and communicating “intents” or “hints” to a storage device and faster/slower solid state memory optimization. Data destined for storage on the storage device (capable of hints processing) can be bracketed to take advantage of improved performance associated with the hints processing. Data... Agent: Microsoft Corporation

20080263263 - Implementation-efficient multiple-counter value hardware performance counter: An implementation-efficient, multiple-counter value hardware performance counter is disclosed. A hardware counter of one embodiment includes a memory array and a hardware incrementer. The array stores counter values that are indexable by an index constructed based at least on the number of events to which the counter values correspond. The... Agent: Law Offices Of Michael Dryja

20080263261 - Storage apparatus and management unit setting method: A storage apparatus that provides a dynamically extensible virtual volume for a host apparatus that accesses the virtual volume is characterized by including: a management unit setting part for setting a management unit, with which an area for storing data sent from the host apparatus is divided on a predetermined-area... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080263265 - Adaptive dynamic reading of flash memories: Each of a plurality of flash memory cells is programmed to a respective one of L≧2 threshold voltage states within a threshold voltage window. Values of parameters of threshold voltage functions are adjusted in accordance with comparisons of the threshold voltages of some or all of the cells to two... Agent: Mark M. Friedman

20080263266 - Adaptive dynamic reading of flash memories: Each of a plurality of flash memory cells is programmed to a respective one of L≧2 threshold voltage states within a threshold voltage window. A histogram is constructed by determining how many of some or all of the cells have threshold voltages in each of two or more of m≧2... Agent: Mark M. Friedman

20080263264 - Data access control system and method of memory device: A data access control system of a memory includes a micro-processor, having a micro-controller, a command decoder, and a memory interface. The data access control system can be used to control display driving of a display system. The command decoder is used to decode the content of a data access... Agent: Jianq Chyun Intellectual Property Office

20080263268 - Digital signal processor: A digital signal processor is adapted to a working RAM, which is capable of storing a plurality of data in a rewritable manner and whose storage area is divided into a plurality of sub-areas that are designated by addresses in read/write operations, wherein an operation circuit performs calculations on the... Agent: Pillsbury Winthrop Shaw Pittman LLP

20080263267 - System on chip with reconfigurable sram: A system on chip comprises N components, where N is an integer greater than one, and a storage module. The storage module comprises a first memory, a control module, and a connection module. The first memory includes M blocks of static random access memory, where M is an integer greater... Agent: Harness, Dickey & Pierce P.L.C

20080263269 - Key selection device and process for content-addressable memory: A method and a computer readable medium having executable instructions are provided. The method and instructions when executed generates a first look-up key from a group of look-up key units stored in a data storage, generation of the first look up key being completed prior to the completion of a... Agent: Mcguirewoods, LLP

20080263270 - Method and apparatus for overlaying flat and/or tree based data sets onto content addressable memory (cam) device: A content addressable memory device (100) and method can have CAM blocks (102-0 to 102-29) organized in block sections (104-0 to 104-6). In an overlay mode of operation, an overlay engine (106) can access an algorithmic search (SPEAR) CAM (102-28 and 102-29) to generate overlay data set search keys (keyFIB<0>... Agent: Walker & Sako, LLP

20080263272 - Data storage management method: A method for selectively controlling reutilization of space in a virtual tape system (VTS) having a buffer and a multiple volume tape cartridge includes transferring data volume files to the VTS. The buffer transfers the data making up these files as virtual tape volumes (VTVs) to different locations of the... Agent: Brooks Kushman P.C. / Sun / Stk

20080263271 - System for selectively performing a secure data erase to ensure timely erasure: A system is provided to ensure a timely secure data erase by determining an erasure deadline for each physical volume of a plurality of physical volumes and calculating a remaining time for each physical volume. The remaining time is calculated for each physical volume by comparing a current date to... Agent: International Business Machines Corporation

20080263273 - Storage subsystem that connects fibre channel and supports online backup: A disk array connected to a storage area network via a fibre channel has one or more ports each controlled by a processor. Even the disk array with one port and one processor executes online processing and backup processing at the same time while considering an online processing load. A... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080263275 - Data storage controller: A system, method and computer program product for controlling a storage device. The system comprises a monitoring component for monitoring and storing information upon which storage device use can be predicted; a predictor component for predicting storage device use responsive to receipt of the information; and a control component for... Agent: Zilka-kotab, PC- Ibm

20080263276 - Method and apparatus for evaluating and improving disk access time in a raid system: Techniques for improving access time in data storage systems are disclosed. These techniques can be used to prevent undesirable access delays that are often experienced in conventional storage systems. “Slow-access” can be defined as an access operation that does not successfully complete within a predetermined amount of time. The “slow-access”... Agent: Beyer Law Group LLP/apple Inc.

20080263274 - System for determining allocation of tape drive resources for a secure data erase process: A system is provided to ensure a timely secure data erase by determining whether allocating an additional tape drive would improve secure data erase performance by evaluating a quantity of physical volumes to be secure data erased, a maximum queued threshold, an average time to an erasure deadline and a... Agent: International Business Machines Corporation

20080263277 - Storage device: A storage device is provided with a file I/O interface control device and a plurality of disk pools. The file I/O interface control device sets one of a plurality of storage hierarchies defining storage classes, respectively, for each of LUs within the disk pools, thereby forming a file system in... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080263278 - Cache reconfiguration based on run-time performance data or software hint: A method for reconfiguring a cache memory is provided. The method in one aspect may include analyzing one or more characteristics of an execution entity accessing a cache memory and reconfiguring the cache based on the one or more characteristics analyzed. Examples of analyzed characteristic may include but are not... Agent: Scully, Scott, Murphy & Presser, P.C.

20080263279 - Design structure for extending local caches in a multiprocessor system: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for caching data in a multiprocessor system is provided. The design structure includes a multiprocessor system, which includes a first processor including a first cache associated therewith, a second processor including a second... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20080263280 - Low complexity speculative multithreading system based on unmodified microprocessor core: A system, method and computer program product for supporting thread level speculative execution in a computing environment having multiple processing units adapted for concurrent execution of threads in speculative and non-speculative modes. Each processing unit includes a cache memory hierarchy of caches operatively connected therewith. The apparatus includes an additional... Agent: Scully, Scott, Murphy & Presser, P.C.

20080263281 - Cache memory system using temporal locality information and a data storage method: A cache memory system using temporal locality information and a data storage method are provided. The cache memory system including: a main cache which stores data accessed by a central processing unit; an extended cache which stores the data if the data is evicted from the main cache; and a... Agent: Sughrue Mion, PLLC

20080263282 - System for caching data: To ensure efficient access to a memory whose writing process is slow. There is provided a storage device for caching data read from a main memory and data to be written in the main memory, comprises a cache memory having a plurality of cache segments, one or more cache segments... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20080263283 - System and method for tracking changes in l1 data cache directory: Method, system and computer program product for tracking changes in an L1 data cache directory. A method for tracking changes in an L1 data cache directory determines if data to be written to the L1 data cache is to be written to an address to be changed from an old... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20080263284 - Methods and arrangements to manage on-chip memory to reduce memory latency: Methods, systems, and media for reducing memory latency seen by processors by providing a measure of control over on-chip memory (OCM) management to software applications, implicitly and/or explicitly, via an operating system are contemplated. Many embodiments allow part of the OCM to be managed by software applications via an application... Agent: Ibm Corporation (jss) C/o Schubert Osterrieder & Nickelson PLLC

20080263285 - Processor extensions for accelerating spectral band replication: Enhancements to hardware architectures (e.g., a RISC processor or a DSP processor) to accelerate spectral band replication (SBR) processing are described. In some embodiments, instruction extensions configure a reconfigurable processor to accelerat SBR and other audio processing. In addition to the instruction extensions, execution units (e.g., multiplication and accumulation units... Agent: Carr & Ferrell LLP

20080263287 - Multi-port memory device and communication system having the same: A communication system includes a first processor, a second processor, and a multi-port memory device. The multi-port memory device generates a first internal clock signal having a first frequency and a second internal clock signal having a second frequency based on an external clock signal. The multi-port memory device communicates... Agent: Marger Johnson & Mccollom, P.C.

20080263286 - Operation control of shared memory: A method of controlling a shared memory and a user terminal controlling the operation of the shared memory are disclosed. The portable terminal according to an embodiment of the present invention has a memory unit with a storage area partitioned to blocks in a quantity of n and a plurality... Agent: Ditthavong Mori & Steiner, P.C.

20080263288 - System and method for probing hypervisor tasks in an asynchronous environment: A system, method, and computer-usable medium for probing hypervisor tasks in an asynchronous environment. According to an embodiment of the invention, the partition firmware sends a request for data to the hypervisor. When the hypervisor receives the request for data, the hypervisor returns a taskID that identifies the task allocated... Agent: Dillon & Yudell LLP

20080263290 - Memory control apparatus and memory control method: According to one embodiment, a memory control apparatus controls a memory having a plurality of banks. This memory control apparatus has an access control section controlling such that a second access request issued from a second access unit is accepted after a first access request issued from a first access... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20080263291 - Method of doing pack ascii z series instructions: Emulation methods are provided for two PACK instructions, one for Unicode data and the other for ASCII coded data in which processing is carried out in a block-by-block fashion as opposed to a byte-by-byte fashion as a way to provide superior performance in the face of the usual challenges facing... Agent: Heslin Rothenberg Farley & Mesiti P.C.

20080263289 - Storage controller and storage control method: Provided are a storage controller and a storage control method capable of improving the transaction performance. This storage controller includes a disk controller for receiving a read command and a write command from a host computer, and an external disk controller and an internal disk device for sending and receiving... Agent: Stanley P. Fisher Reed Smith LLP

20080263292 - System and method for managng memory compression transparent to an operating system: In a computer system having an operating system and a compressed main memory defining a physical memory and a real memory characterized as an amount of main memory as seen by a processor, and including a compressed memory hardware controller device for controlling processor access to the compressed main memory,... Agent: Scully, Scott, Murphy & Presser, P.C.

20080263294 - Method for determining allocation of tape drive resources for a secure data erase process: A method and computer program product are provided to ensure a timely secure data erase by determining whether allocating an additional tape drive would improve secure data erase performance by evaluating a quantity of physical volumes to be secure data erased, a maximum queued threshold, an average time to an... Agent: International Business Machines Corporation

20080263293 - Method for selectively performing a secure data erase to ensure timely erasure: A method and computer program product are provided to ensure a timely secure data erase by determining an erasure deadline for each physical volume of a plurality of physical volumes and calculating a remaining time for each physical volume. The remaining time is calculated for each physical volume by comparing... Agent: International Business Machines Corporation

20080263295 - Methods, apparatus, and program products for improved finalization: Apparatus, methods, and computer program products are disclosed that improve management of a dynamic memory area. One aspect is a method that reclaims memory referenced by a finalizable-object that has been instantiated from a class definition that incorporates at least one parent class and one or more class-extensions into a... Agent: Pvf -- Sun Microsystems Inc. C/o Park, Vaughan & Fleming LLP

20080263298 - Semiconductor device controlling debug operation of processing unit in response to permission or prohibition from other processing unit: A semiconductor device includes a volatile memory for storing a first instruction group, a first processing unit for executing the first instruction group, a nonvolatile memory for storing a second instruction group, a second processing unit for executing a second instruction group, a control signal output unit for outputting a... Agent: Mcginn Intellectual Property Law Group, PLLC

20080263296 - System, method and computer program product for storing an information block: A method for storing an information block that includes determining to store a current version of an information block stored in a memory unit. The checking if a current version of the information is already stored in a storage unit. The current version of the information block is sent from... Agent: Ibm Corporation Intellectual Property Law Dept.

20080263297 - System, method, and software for enforcing information retention using uniform retention rules: Methods, systems, and software for enforcing archival of data objects into archive objects and managed destruction of the archive objects are disclosed. In some cases, the computer techniques include enforcing a retention rule, such as a retention date and archive properties, and a destruction indication, such as an expiration date,... Agent: Fish & Richardson, P.C.

20080263299 - Storage system and control method thereof: A storage system and a control method thereof that can avoid performance degradation of a write command from a host are provided. In the storage system, when a request for conversion from snapshot to actual data copy is received, first, a copy difference table is scanned from its leading bit... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080263300 - Storage media: A storage media for storing data and comprising an integral controller configured to control access to the data depending on the location of the storage media. The storage media may further comprise means to determine its location, e.g. such as a GPS receiver or a cellular network positioning solution. Alternatively,... Agent: Nxp, B.v. Nxp Intellectual Property Department

20080263301 - Key-controlled object-based memory protection: A method, system, and program key-controlled object-based memory protection are provided. A processing unit includes an authority check for controlling access by the processing unit to pages of memory according to whether a hardware protection key set currently loaded in an authority mask register allows access to the pages. In... Agent: Ibm Corp (ap) C/o Amy Pattillo

20080263302 - Non-volatile memory circuit, system, and method: A non volatile memory device includes a first buffer register configured to receive and store the data to be stored into the memory device provided via a memory bus. A command window is activatable for interposing itself for access to a memory matrix between the first buffer element and the... Agent: Graybeal, Jackson, Haley LLP

20080263303 - Linear combiner weight memory: A linear combiner weight memory. Various embodiments of the weight memory provide a weight bank and control logic. The weight bank is operable to couple with a data stream and may include four registers. The first register is operable to store a first in-phase weight value. The second register is... Agent: Hovey Williams LLP

20080263306 - Information processing apparatus having virtualization function, method of virtualization, and computer-readable recording medium: An information processing apparatus having a virtualization function for creating a virtual disk based on a logical volume selected from a plurality of storage areas comprises a host device for performing information processing on a storage device, and a virtualization switch for connecting the host device to the storage device... Agent: Staas & Halsey LLP

20080263304 - Latency aligned volume provisioning methods for interconnected multiple storage controller configuration: A system is composed of multiple storage control modules, which are connected to each other via interconnects. The aforesaid interconnects connecting the storage control modules may cause certain extra latency. Each storage control module may have data preservation module, which can preserve data stored by host computers. The system incorporates... Agent: Sughrue Mion, PLLC

20080263305 - Remove-on-delete technologies for solid state drive optimization: Technologies for identifying data stored on a solid state drive (“SSD”) device that correspond to data associated with a delete event, and marking the deleted data stored on the SSD as invalid such that the SSD can avoid unnecessary operations on the invalid data. Included are interfaces operable to communicate... Agent: Microsoft Corporation

20080263307 - Information processing apparatus and method, and program: Disclosed herein is an information processing apparatus, including: setting means for setting, a maximum transfer size; calculation means for subtracting a second data amount from a first data amount to calculate a third data amount; boundary determination means for determining whether this transfer will involve a page boundary being extended... Agent: Frommer Lawrence & Haug LLP

20080263308 - Storage allocation management in switches utilizing flow control: A computer program product and system for managing allocation of storage in a switch utilizing flow control are provided. The switch includes a plurality of ports and an internal storage divided into a plurality of storage units. The computer program product and system provide for monitoring an average number of... Agent: Ibm Rp-rps Sawyer Law Group LLP

20080263309 - Creating a physical trace from a virtual trace: In an embodiment, virtual trace records are read and physical trace records are created and displayed. The virtual trace records are associated with virtual processors allocated to logical partitions in a logically-partitioned computer system. Each of the virtual trace records has a wait timestamp, specifying a time at which a... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20080263310 - Parallel installation of logical partitions: An apparatus and method provide parallel installation of logical partitions on a computer system. The function of a hardware maintenance console is built into a logical partition configuration mechanism that resides in the system firmware. A virtual local area network (VLAN) is used by the logical partition configuration mechanism to... Agent: Martin & Associates, LLC

20080263311 - Parallel installation of logical partitions: An apparatus and method provide parallel installation of logical partitions on a computer system. The function of a hardware maintenance console is built into a logical partition configuration mechanism that resides in the system firmware. A virtual local area network (VLAN) is used by the logical partition configuration mechanism to... Agent: Martin & Associates, LLC

20080263312 - Parallel installation of logical partitions: An apparatus and method provide parallel installation of logical partitions on a computer system. The function of a hardware maintenance console is built into a logical partition configuration mechanism that resides in the system firmware. A virtual local area network (VLAN) is used by the logical partition configuration mechanism to... Agent: Martin & Associates, LLC

20080263313 - Pretranslating input/output buffers in environments with multiple page sizes: Pretranslating input/output buffers in environments with multiple page sizes that include determining a pretranslation page size for an input/output buffer under an operating system that supports more than one memory page size, identifying pretranslation page frame numbers for the buffer in dependence upon the pretranslation page size, pretranslating the pretranslation... Agent: International Corp (blf)

20080263314 - Address translation apparatus which is capable of easily performing address translation and processor system: An address translation apparatus includes first to third retention units, a comparison unit, and a translation unit. The first retention unit retains a multi-bit first address. The second retention unit retains a multi-bit second address different from the first address. The third retention unit retains first information indicating which bit... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080263315 - Computer memory addressing mode employing memory segmenting and masking: A computer addressing mode and memory access method rely on a memory segment identifier and a memory segment mask for indicating memory locations. In this addressing mode, a processor receives an instruction comprising the memory segment identifier and memory segment mask. The processor employs a two-level address decoding scheme to... Agent: Qualcomm Incorporated

20080263316 - Splash tables: an efficient hash scheme for processors: Also provided for are retrieving data items in a computer. A plurality of hash functions of data values in a probe key are computed. A corresponding memory location is determined for each of the plurality of hash functions. Data items in each memory location are examined to determine a match... Agent: Duke W. Yee

20080256286 - Verification of non volatile storage storing preserved unneeded data: Non volatile storage may be employed to temporarily store data which is destaged to data storage drives. The non volatile storage is configured to preserve the data through a power outage. Some data may be preserved, but is not needed, such as the result of a failover to another non... Agent: John H. Holcombe IBM Corporation,IPLaw Dept.

20080256289 - Memory apparatus to write and read data, and method thereof: An apparatus and method of reading and writing data from and on a storage medium include receiving at least one of file information and file data from a host, generating a logical block address corresponding to the one of the file information and the file data, and writing the one... Agent: Stanzione & Kim, LLP

20080256287 - Methods and systems of managing memory addresses in a large capacity multi-level cell (mlc) based flash memory device: Methods and systems of managing memory addresses in a large capacity multi-level cell based flash memory device are described. According to one aspect, a flash memory device comprises a processing unit to manage logical-to-physical address correlation using an indexing scheme. The flash memory is partitioned into N sets. Each set... Agent: Roger H. Chu

20080256288 - Microcomputer, electronic instrument, and flash memory protection method: A microcomputer includes a flash memory and a flash controller that controls access to the flash memory, the flash memory including a protection information storage section that stores protection information, the protection information indicating whether or not access to a given area of the flash memory is available; the flash... Agent: Harness, Dickey & Pierce, P.L.C

20080256290 - Method and system of randomizing memory locations: A memory system that disperses memory addresses of stings of data throughout a memory is provided. The memory system includes a memory, a central processing unit (CPU) and an address randomizer. The memory is configured to store stings of data. The CPU is configured to direct the storing and retrieving... Agent: Honeywell International Inc.

20080256292 - Apparatus, system, and method for a shared, front-end, distributed raid: An apparatus, system, and method are disclosed for a shared, front-end, distributed redundant array of independent drives (“RAID”). A multiple storage request receiver module receives at least two storage requests from at least two clients to store file or object data in one or more storage devices of a storage... Agent: Kunzler & Mckenzie

20080256291 - Disk array synchronization using power distribution: Disk drives are synchronized by a timing signal generated in a master disk drive. The timing signal is transmitted over a power distribution network common to the disk drives. A slave drive receives the timing signal and synchronizes at least one disk based on the timing signal.... Agent: Brooks Kushman P.C.

20080256293 - Carrier for manufacturing a memory device, method using the same, memory device using the same and manufacturing method of a memory device using the same: A carrier including a bottom plate, an intermediate cover, and a top cover for manufacturing a memory device is introduced herein. A printed circuit board is disposed on the bottom plate, and memory elements are arranged and disposed on the PCB. The intermediate cover is used to press peripheral regions... Agent: J C Patents, Inc.

20080256294 - Systems and methods for multi-level exclusive caching using hints: Systems and methods for multi-level exclusive caching using hints. Exemplary embodiments include a method for multi-level exclusive caching, the method including identifying a cache management protocol within a multi-level cache hierarchy having a plurality of caches, defining a hint protocol within the multi-level cache hierarchy, identifying deciding caches and non-deciding... Agent: Cantor Colburn, LLP - IBM Arc Division

20080256296 - Information processing apparatus and method for caching data: A processor is provided with a register and operates to: determine whether a first tag address match with a second tag address, the first tag address being derived from a target main memory address that is to be accessed for obtaining target data subjected to a computation, the second tag... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080256295 - Method of increasing boot-up speed: There is provided a method of increasing boot-up speed in a computer system (10). The system (10) includes computing devices (20) for processing data and a data store (60) coupled thereto for providing data to and receiving data from the devices (20). The store (60) is operable to write and/or... Agent: Philips Intellectual Property & Standards

20080256297 - Multi-port high-level cache unit an a method for retrieving information from a multi-port high-level cache unit: A device that includes multiple processors that are connected to multiple level-one cache units. The device also includes a multi-port high-level cache unit that includes a first modular interconnect, a second modular interconnect, multiple high-level cache paths; whereas the multiple high-level cache paths comprise multiple concurrently accessible interleaved high-level cache... Agent: Freescale Semiconductor, Inc. Law Department

20080256298 - Intelligent caching of user data for real time communications: Apparatus and methods for storing user data for use in real-time communications (e.g., IM or VoIP) are provided. The apparatus comprises at least a first cache device (e.g., a cache server) and a second cache device for storing user data, wherein the user data stored with the first cache device... Agent: Yahoo C/o Mofo Palo Alto

20080256299 - System and method for achieving different levels of data consistency: A system and method for maintaining consistency in a system where multiple copies of an object may exist is provided for maintaining consistent copies. Consistency is maintained using a plurality of consistency policies in which at least one consistency policy results in different performance than a second consistency policy. A... Agent: Keusey, Tutunjian & Bitetto, P.C.

20080256301 - Protection of the execution of a program: A method for controlling the execution of at least one program in an electronic circuit and a processor for executing a program, in which at least one volatile memory area of the circuit is, prior to the execution of the program to be controlled, filled with first instructions resulting in... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20080256300 - System and method for dynamically reconfiguring a vertex cache: A system to process a plurality of vertices to model an object. An embodiment of the system includes a processor, a front end unit coupled to the processor, and cache configuration logic coupled to the front end unit and the processor. The processor is configured to process the plurality of... Agent: Stevens Law Group

20080256302 - Programmable data prefetching: A method, computer program product, and system are provided for prefetching data into a cache memory. As a program is executed an object identifier is obtained of a first object of the program. A lookup operation is performed on a data structure to determine if the object identifier is present... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20080256303 - Cache memory: An apparatus for processing data comprises a cache memory having a plurality of cache rows each operable to store a cache line of data values, a memory management unit responsive to a page table entry to control access to a corresponding group of memory addresses forming a memory page, and... Agent: Nixon & Vanderhye, PC

20080256304 - Storage system and control method thereof: The plurality of host systems or the plurality of applications include an insertion unit for sending the identifier. The storage controller includes an analysis unit for identifying a host system or an application based on the identifier contained in the access information and analyzing an access pattern of access information... Agent: Stanley P. Fisher Reed Smith LLP

20080256305 - Multipath accessible semiconductor memory device: A multipath accessible semiconductor memory device provides an interfacing function between multiple processors which indirectly controls a flash memory. The multipath accessible semiconductor memory device comprises a shared memory area, an internal register and a control unit. The shared memory area is accessed by first and second processors through different... Agent: Volentine & Whitt PLLC

20080256306 - Non-inclusive cache systems and methods: Non-inclusive cache systems and methods are provided. In one embodiment a non-inclusive cache system is provided comprising a non-inclusive cache and a cache agent that receives a request for access to the non-inclusive cache and denies the request for access to the non-inclusive cache if the non-inclusive cache system exceeds... Agent: Hewlett Packard Company

20080256307 - Storage subsystem, storage system, and method of controlling power supply to the storage subsystem: Provided is storage subsystem including: a storage unit containing multiple disk groups; and a control device for controlling the storage unit. The storage unit includes at least one redundant disk group composed of at least a first disk group and a second disk group for redundancy. The control device is... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080256308 - Storage system, method for managing the same, and storage controller: A storage system includes one or more host computers; and a storage controller that provides each of the one or more host computers with a plurality of logical volumes, each including a storage area for reading/writing data from/to, and also being either allocated or not allocated to one or more... Agent: Stanley P. Fisher Reed Smith LLP

20080256309 - Maintain owning application information of data for a data storage system: A data storage system writes data supplied from a host to data storage in accordance with write I/O of an owning application. A workload manager directs the processing of the supplied data in accordance with the write I/O of the owning application, provides service workload identification describing the write I/O,... Agent: John H. Holcombe IBM Corporation,IPLaw Dept.

20080256310 - Maintain owning application information of data for a data storage system: A data storage system writes data supplied from a host to data storage in accordance with write I/O of an owning application. A workload manager directs the processing of the supplied data in accordance with the write I/O of the owning application, provides service workload identification describing the write I/O,... Agent: John H. Holcombe IBM Corporation,IPLaw Dept.

20080256312 - Apparatus and method to detect and repair a broken dataset: A method is disclosed to detect and repair a broken dataset. The method creates and maintains a backup log and an update log for a dataset. If the method finds a dataset structural error, then the method deletes the corrupted dataset, obtains the most current backup copy of the dataset,... Agent: Dale F. Regelman Quarles & Brady, LLP

20080256315 - Backup system, backup device, backup request device, backup method, backup request method, backup program and backup request program: In a backup system, a backup request device includes: a storage section that stores a piece of content data; and a transmission section that regards the piece of content data as a piece of backup target data and transmits, along with a piece of device identification information, a piece of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080256314 - Controlled anticipation in creating a shadow copy: Controlling data retention of a collection of data in a data store. An instruction is received to store a shadow collection of data to the data store. The data store has a previous version of the shadow collection of data. An available amount of data storage space on the data... Agent: Christopher M. Goff (27839) Armstrong Teasdale LLP

20080256316 - Mirroring system memory in non-volatile random access memory (nvram) for fast power on/off cycling: A computer comprising a processor, a volatile main store, a non-volatile random access memory (NVRAM) mirror store, and optionally a cache for the non-volatile mirror store. While programs of the computer are operational, the contents of the volatile main store are mirrored in the non-volatile mirror store such that when... Agent: International Business Machines Corporation

20080256311 - Snapshot preserved data cloning: A method and device for cloning snapshots is provided. A new snapshot can be created by cloning an existing snapshot. The clone snapshot may use the preserved data of the existing snapshot, thereby obviating the need to copy the preserved data. Additionally, the clone snapshot may be created with a... Agent: Sheridan Ross PC

20080256313 - System, method and computer program product for remote mirroring: A method for remote mirroring, the method includes: (a) establishing a remote mirroring relationship between a primary site and a secondary site; (b) copying data from the primary site to the secondary site; and (c) writing status information by a primary site controller to a first memory space at the... Agent: Ibm Corporation Intellectual Property Law Dept.

20080256317 - Storage system and computer system: A storage system that is capable of communicating with one or more host devices that issue a host input/output request, including two or more physical devices, one or more logical devices provided in the two or more physical devices, said logical devices each representing a logical volume provided in the... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080256318 - Copy engine and a method for data movement: A copy engine (104) is provided as an interface between firmware (108) and memory space (106) for carrying out copy operations. The copy engine has a first register (202, 203) to point to a first address and a second register (204, 205) to point to a second address. One of... Agent: Harrington & Smith, PC

20080256319 - Memory controller: A memory controller includes a page configure module that communicates with a memory array comprising B memory blocks each including P pages. The page configure module selectively configures memory cells in the P pages of each of the B memory blocks to store from 1 to T bits per cell.... Agent: Harness, Dickey & Pierce P.L.C

20080256324 - Implementing a fast file synchronization in a data processing system: A system and method for implementing a fast file synchronization in a data processing system. A memory management unit divides a file stored in system memory into a collection of data block groups. In response to a master (e.g., processing unit, peripheral, etc.) modifying a first data block group among... Agent: Dillon & Yudell LLP

20080256320 - Method for storing messages in a message memory and message memory: In a method for storing messages in a communications module, the messages to be stored contain first data having a first data volume and second data having a second data volume, and it is possible for the second data volume to be different per message. A message memory contains a... Agent: Kenyon & Kenyon LLP

20080256323 - Reconfiguring a storage area network: The invention relates to a method and apparatus for reconfiguring a portion of a storage area network by establishing one or more auxiliary data paths, configuring the storage area network to re-route communications from the portion of the storage area network to be reconfigured to the one or more auxiliary... Agent: Hewlett Packard Company

20080256322 - Secure storage apparatus and method for controlling the same: The present invention discloses a storage apparatus in communication with one or more external systems, including at least one storage region, at least one logical partition formed by using a first part of the storage region for storing data, and a logic controller, provided with an authentication module for setting... Agent: Bacon & Thomas, PLLC

20080256321 - System and method for tracking the memory state of a migrating logical partition: An apparatus, program product and method for tracking the state of a migrating logical partition. Embodiments may use the state to determine the readiness and/or appropriateness of a page of the logical partition for transferring. The state may include a value or other data used to track changes affecting the... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20080256325 - Memory device and device for reading out: A device includes an input for an N-bit data word. A circuit is adapted to map the N-bit data word to a physical M-bit memory data word by means of a mapping rule. The mapping rule includes a quantity of values of possible physical M-bit memory data words the mean... Agent: Slater & Matsil, L.L.P.

20080256326 - Subsegmenting for efficient storage, resemblance determination, and transmission: Transmitting or storing subsegments is disclosed. A data stream or a data block is received and broken into a plurality of segments. For at least one segment, the segment is broken into a plurality of subsegments. A previously stored or transmitted segment similar to the at least one segment is... Agent: Van Pelt, Yi & James LLP

20080256328 - Customizable memory indexing functions: Methods and apparatus related to memory indexing. Receiving indications of an indexing function for use with a memory. Performing indexing functions with a processor before addressing a memory location. Referencing a customizable lookup table to determine a memory location. Translating a computer program to control a computer system to use... Agent: Lowrie, Lando & Anastasi, LLP

20080256327 - System and method for maintaining page tables used during a logical partition migration: An apparatus, program product and method maintains data integrity for a logical partition by enabling nonintrusive switching of page tables used during a migration of the logical partition from a source computer system to a target computer system. A first page table may be configured to store a plurality of... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20080250188 - Memory controller, nonvolatile storage, nonvolatile storage system, and memory control method: A physical area management table (105) and a pointer table (106) are stored in a nonvolatile auxiliary storage memory (107). When a logical-physical conversion table (108) is updated (restored) in a main storage memory (140), the restored area is determined in a re-arrangement way by the pointer table to avoid... Agent: Greenblum & Bernstein, P.L.C

20080250189 - Circuit and method for improving operation life of memory: The present invention relates to a circuit and a method for improving operation life of original various internal or external nonvolatile memories by means of long-life nonvolatile memory chips. In the case that the hardware structure, interface type, packaged type and operation condition of existing various nonvolatile memories are not... Agent: J C Patents, Inc.

20080250191 - Flexible, low cost apparatus and method to introduce and check algorithm modifications in a non-volatile memory: A flash memory includes input/output buffers, a memory array having memory cells coupled to the input/output buffers, and row and column decoders, and a voltage-generator circuit coupled to the row and column decoders. A microcontroller is coupled to the command user interface. Switch-instruction circuitry selectively provides instructions to the microcontroller... Agent: Schwegman, Lundberg & Woessner / Atmel

20080250192 - Integrating flash memory system: The present invention discloses an integrating data processing system. The system includes a master device with a host interface for processing data, at least one NAND flash memory unit having a unit interface, and a flash memory controller. For controlling access to the NAND flash memory unit, the flash memory... Agent: Bacon & Thomas, PLLC

20080250193 - Method to transmit important emergency personal and medical information via portable storage media: This invention presents a way to carry concise, important personal and medical information in a very portable format using information storage media, in a convenient carrying form for universal use by emergency medical or police personnel to assist the person carrying the device.... Agent: Daniel Lee Smith

20080250195 - Multi-operation write aggregator using a page buffer and a scratch flash block in each of multiple channels of a large array of flash memory to reduce block wear: A flash system has multiple channels of flash memory chips that can be accessed in parallel. Host data is assigned to one of the channels by a multi-channel controller processor and accumulated in a multi-channel page buffer. When a page boundary in the page buffer is reached, the page buffer... Agent: Stuart T Auvinen

20080250190 - Portable memory device operating system and method of using same: A portable operating system for use by a user on a portable memory device, the system being accessible by the user on a primary host computer having a host graphical user interface. The system includes a portable graphical user interface accessible by the user when the portable memory device is... Agent: The Soni Law Firm

20080250194 - Two-dimensional writing data method for flash memory and corresponding storage device: In a two-dimensional writing data method for a flash memory and a corresponding storage device the storage device includes a plurality of flash modules and a control module. The flash modules are electrically connected to the control module. The control module includes a plurality of buffers and a process unit.... Agent: Hdsl

20080250196 - Data sequence sample and hold method, apparatus and semiconductor integrated circuit: The present invention comprises a primary storage medium; an area definition data storage means for storing area definition data that defines a first storage area which corresponds to the interval before the arrival time and a second storage area which corresponds to the interval after the arrival time in the... Agent: Edwards Angell Palmer & Dodge LLP

20080250197 - Physical tape interchange format: A virtual tape server for executing a method involving a partitioning of a virtual tape volume into a plurality of virtual tape blocks. The virtual tape volume includes a virtual tape volume header having recovery information, each virtual tape block includes a virtual tape block header identifying the virtual tape... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080250199 - Atomic cache transactions in a distributed storage system: An atomic write descriptor associated with stripe buffer list metadata.... Agent: Mccarthy Law Group

20080250201 - Information processing system and control method thereof: A control technique for resident information or release of resident information in a cache memory is provided, by which residence is set into a cache memory without regard of a logical volume where a dataset is present, and an unused resident area in the cache memory is automatically deleted. In... Agent: Stanley P. Fisher Reed Smith LLP

20080250198 - Storage consolidation platform: One embodiment of the invention provides a disk-to-tape storage system including a front-end portion and a hack-end portion. The front-end portion ha, a first interface for receiving storage commands and data over a network from an application performing a backup or archive operation. The received storage commands conform to a... Agent: Park, Vaughan & Fleming LLP

20080250200 - System and program for demoting tracks from cache: Provided are a method, system, and program for destaging a track from cache to a storage device. The destaged track is retained in the cache. Verification is made of whether the storage device successfully completed writing data. Indication is made of destaged tracks eligible for removal from the cache that... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080250202 - Flash controller cache architecture: A buffer cache interposed between a non-volatile memory and a host may be partitioned into segments that may operate with different policies. Cache policies include write-through, write and read-look-ahead. Write-through and write back policies may improve speed. Read-look-ahead cache allows more efficient use of the bus between the buffer cache... Agent: Weaver Austin Villeneuve Sampson LLP

20080250204 - Systems and methods of hierarchical storage management, such as global management of storage operations: A system and method for setting global actions in a data storage system is described. In some examples, the system determines a policy based on information from the system, and implements that policy to the system. In some examples, the system adds or modifies global filters based on information from... Agent: Perkins Coie LLP Patent-sea

20080250203 - Wait-free parallel data cache: A system and method for managing a data cache in a central processing unit (CPU) of a database system. A method executed by a system includes the processing steps of adding an ID of a page p into a page holder queue of the data cache, executing a memory barrier... Agent: Mintz, Levin, Cohn, Ferris, Glovsky & Popeo, P.C. Attn: Patent Intake Customer No. 64280

20080250207 - Design structure for cache maintenance: A single unified level one instruction cache in which some lines may contain traces and other lines in the same congruence class may contain blocks of instructions consistent with conventional cache lines. Control is exercised over which lines are contained within the cache. This invention avoids inefficiencies in the cache... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20080250205 - Structure for supporting simultaneous storage of trace and standard cache lines: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for a single unified level one instruction cache in which some lines may contain traces and other lines in the same congruence class may contain blocks of instructions consistent with conventional cache lines... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20080250206 - Structure for using branch prediction heuristics for determination of trace formation readiness: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for a single unified level one instruction(s) cache in which some lines may contain traces and other lines in the same congruence class may contain blocks of instruction(s) consistent with conventional cache lines... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20080250208 - System and method for improving the page crossing performance of a data prefetcher: A system and method for improving the page crossing performance of a data prefetcher is presented. A prefetch engine tracks times at which a data stream terminates due to a page boundary. When a certain percentage of data streams terminate at page boundaries, the prefetch engine sets an aggressive profile... Agent: Ibm Corporation- Austin (jvl) C/o Van Leeuwen & Van Leeuwen

20080250209 - Tagged sequential read operations: In some embodiments, a storage device, comprises a processor, a memory module communicatively connected to the processor, and logic instructions in the memory module which, when executed by the processor, configure the processor to receive a read input/output operation, and configure a prefetch disk data into cache memory in response... Agent: Hewlett Packard Company

20080250210 - Copying data from a first cluster to a second cluster to reassign storage areas from the first cluster to the second cluster: Provided are a method, system, and article of manufacture for copying data from a first cluster to a second cluster to reassign storage areas from the first cluster to the second cluster. An operation is initiated to reassign storage areas from a first cluster to a second cluster, wherein the... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080250211 - Cache control method, cache device, and microcomputer: when a non-subsequent read occurs which is a read from a non-subsequent address not consecutive to the previous read address, a first cache memory sequentially caches respective data of the non-subsequent address and n addresses following the non-subsequent address, where n is an integer of one or greater, while the... Agent: Foley And Lardner LLP Suite 500

20080250212 - Method and apparatus for accessing memory using programmable memory accessing interleaving ratio information: A method and apparatus stores data representing a non 1:1 memory access interleaving ratio for accessing a plurality of memories. The method and apparatus interleaves memory accesses to at least either a first memory that is accessible via a first (and associated memory) bus having first characteristics or a second... Agent: Advanced Micro Devices, Inc. C/o Vedder Price P.C.

20080250213 - Computer architecture and method of operation for multi-computer distributed processing having redundant array of independent systems with replicated memory and code striping: Computers and other computing machines and information appliances having a modified computer architecture and program structure which enables the operation of an application program concurrently or simultaneously on a plurality of computers interconnected via a communications link or network using a special distributed runtime (DRT), and that provides for a... Agent: Perkins Coie LLP

20080250214 - Method and system for insuring data integrity in anticipation of a disaster: A preparation of a storage system of a pending disaster at an onsite location of the storage system involves the storage system receiving a disaster preparation initiation from an offsite client. In response to receiving the disaster preparation initiation from the offsite client, the storage system to executes disaster preparation... Agent: Hamilton & Terrile, LLP IBM Tucson

20080250215 - Method for replicating snapshot volumes between storage systems: An apparatus, system, and method for replicating a snapshot volume in a first storage system to a second storage system includes mapping information corresponding to data in the first storage system that is transferred from the first storage system to the second storage system so that a file system in... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080250217 - Memory domain based security control with data processing systems: Access to memory address space is controlled by memory access control circuitry using access control data. The ability to change the access control data is controlled by domain control circuitry. Whether or not an instruction stored within a particular domain, being a set of memory addresses, is able to modify... Agent: Nixon & Vanderhye, PC

20080250216 - Protected function calling: Memory address space is divided into domains and instruction access control circuitry is used to detect when the memory address from which an instruction to be executed is fetched has crossed a domain boundary and changed and in such cases to conduct a check to ensure that the instruction within... Agent: Nixon & Vanderhye, PC

20080250218 - Permanent pool memory management method and system: A method, system, and computer program manager for a computing system memory in the operation of a computing process. At least one memory segment provides memory resources for the computing process, which includes a plurality of memory objects, each of the memory objects includes an equal number of bytes and... Agent: HulseyIPIntellectual Property Lawyers, P.C.

20080250220 - Memory system: In a memory system according to an aspect of the invention, a nonvolatile semiconductor memory includes storage areas each composed of a group of storage elements, stores one or more than one bit of data into each of the storage elements and selects either a first write mode in which... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080250219 - Storage system in which resources are dynamically allocated to logical partition, and logical division method for storage system: An object of the invention is to dynamically change the allocation of resources in a storage system. The resources including host IF units 101, drive IF units 102, disk drives 103, data transfer engines 105, cache memories 107, and control processors 109 are partitioning targets. A processor 301 in each... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080250221 - Contention detection with data consolidation: A multiple computer system is disclosed in which n computers (M1, M2 . . . Mn) each run a different portion of a single application program written to execute only on a single computer. The local memory of each computer is maintained substantially the same by updating all computers with... Agent: Perkins Coie LLP

20080250222 - Apparatus and method for providing virtualized hardware resources within a virtual execution environment: Embodiments described are generally directed to a system and method for providing virtualized hardware resources within a virtual execution environment. In one embodiment, it is determined whether an operating system (OS) is a guest OS running within a virtual execution environment of a host platform. If an OS is determined... Agent: Network Appliance/bstz Blakely Sokoloff Taylor & Zafman LLP

20080250223 - Flash memory allocation for improved performance and endurance: A flash storage device having improved write performance is provided. The device includes a storage block having a plurality of physical pages and a controller for mapping the plurality of physical pages to a plurality of logical addresses and for writing data to the plurality of physical pages. When updating... Agent: Mcdermott Will & Emery LLP

20080244151 - Method and apparatus for emulating rewritable memory with non-rewritable memory in an mcu: An integrated circuit having an embedded multiple time programmable memory includes a processing core for executing stored instructions with a data memory and a non volatile memory. The non-volatile memory block provides for storage of program instructions and includes a plurality of blocks of non-volatile memory, each of which can... Agent: Howison & Arnott, L.l.p

20080244153 - Cache systems, computer systems and operating methods thereof: Cache systems, computer systems and methods thereof are disclosed. A buffer buffers first data from a main memory prior to writing to the cache memory. In response to a cache hit, a word from the cache memory is read. In response to a cache miss, the first data is written... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080244152 - Method and apparatus for configuring buffers for streaming data transfer: A specification of a configurable processor is generated by generating (1) specifications of first and second stream memory interfaces to be operable to access data in accordance with first and second stream descriptors, and (2) a specification of an interim data storage device (buffer) to be accessed by the first... Agent: Leveque Intellectual Property Law, P.C.

20080244154 - Method for controlling access to data of a tape data storage medium: A method, system, and machine-readable medium for controlling access to data of a tape data storage medium are disclosed. In accordance with one embodiment, a method is provided which comprises conveying data access control metadata from a tape cartridge comprising a tape data storage medium to a host, receiving decrypted... Agent: Dillon & Yudell, LLP

20080244155 - Methods and apparatus to protect dynamic memory regions allocated to programming agents: Methods and apparatus to protect dynamic memory regions allocated to programming agents are disclosed. An example method to protect a dynamic memory region disclosed herein comprises mapping protected memory regions to a protected page table for address translation associated with a protected agent, updating the protected page table with address... Agent: Hanely Flight & Zimmerman, LLC

20080244156 - Application processors and memory architecture for wireless applications: In one embodiment, the invention provides a method for accessing memory. The method comprises sending memory transactions to a memory sub-system for a first processor to an intermediate second processor interposed on a communication path between the first processor and the memory sub-system; and controlling when the memory transactions are... Agent: Hahn And Moodley, LLP

20080244159 - Data transfer control apparatus and data transfer control method: A data transfer control apparatus includes a memory, a write control part controlling data writing to the memory, a read control part controlling data reading from the memory, a read-start calculation part calculating an output timing of a notification which indicates a read-start operation to the read control part based... Agent: Staas & Halsey LLP

20080244158 - Drawing apparatus: A drawing apparatus which can create an exposure pattern rapidly. The drawing apparatus has a raster conversion processing module for converting vector images as wiring patterns into bitmap image data, an image cache module for temporarily storing a predetermined-size cached image supplied from the raster conversion processing module, a first... Agent: Crowell & Moring LLP Intellectual Property Group

20080244161 - Memory management apparatus and method for same: A memory management apparatus uses a link list memory to manage a use area and a vacant area of a data memory. The use of the use area of the data memory by each of plural ports is restricted, and the use area of the data memory is configured to... Agent: Posz Law Group, PLC

20080244157 - Semiconductor memory device: A semiconductor memory device includes: a memory core region; a data transfer unit configured to transfer external data to the memory core region; a data code storage unit configured to store test data; and a data selection unit configured to select one of the test data from the data code... Agent: Mcdermott Will & Emery LLP

20080244160 - Storage method for a gaming machine: In a first aspect the invention provides a storage method for a gaming machine, including allocating program code to one of at least two program categories including a first category of program code that is expected to be modified more frequently than a second category of program code and storing... Agent: Mcandrews Held & Malloy, Ltd

20080244165 - Integrated memory management device and memory device: An example of a device comprises a first MMU converting a logical address into a physical address for a cache, a controller accessing the cache based on the physical address for the cache, a first storage storing history data showing an access state to a main memory outside a processor,... Agent: SprinkleIPLaw Group

20080244162 - Method for reading non-volatile storage using pre-conditioning waveforms and modified reliability metrics: Data stored in non-volatile storage is read using sense operations and associated pre-conditioning waveforms. The pre-conditioning waveform provides a short term history for a non-volatile element which is analogous to the conditions experienced during programming when a programming pulse is applied prior to a verify operation. The pre-conditioning waveform can... Agent: Vierra Magen/sandisk Corporation

20080244163 - Portable data access device: A portable data access device is applicable to a data processing system. The portable data access device includes at least a first data access sector preset to be a read-only data access sector, for storing at least data and/or application programs executable by the data processing system; at least a... Agent: Pearne & Gordon LLP

20080244164 - Storage device equipped with nand flash memory and method for storing information thereof: A storage device equipped with NAND flash memory and method for storing information thereof includes a SLC processing structure to provide fast information access and improve processing performance and a MLC processing structure to increase data density of each storage unit and reduce the cost and size of each unit... Agent: Joe Mckinney Muncy

20080244166 - System and method for configuration and management of flash memory: A system and a method for configuration and management of flash memory is provided, including a flash memory, a virtual memory region, and a memory logical block region. The flash memory includes a plurality of physical erase units. Each physical erase unit is configured to include at least a consecutive... Agent: Rosenberg, Klein & Lee

20080244167 - Electronic device and method for installing software: A peripheral for a computer and a method of using the peripheral is for installing software onto the computer using Direct Memory Access. The peripheral comprises a computer accessible medium and a program product. The program product has codes to read and write to the Random Access Memory of the... Agent: Louis Ventre, Jr

20080244168 - Method and apparatus for a primary operating system and an appliance operating system: One embodiment includes a personal computer device comprising at least one machine to execute a primary user operating system, a first physical memory to be used by the primary user operating system, at least one appliance operating system that is independent from the primary user operating system, a second physical... Agent: Schwegman, Lundberg & Woessner, P.A.

20080244169 - Apparatus for efficient streaming data access on reconfigurable hardware and method for automatic generation thereof: A content addressable memory (CAM) is disclosed that includes a memory having a first port configured to write a 1-bit data to the memory and a second port configured to read and write N-bit data. To update the CAM, an N-bit zero data word is written to the second port... Agent: Leveque Intellectual Property Law, P.C.

20080244170 - Intelligent allocation of programmable comparison operations for reducing the number of associative memory entries required: Intelligent allocation of programmable comparison operations may reduce the number of associative memory entries required for programming an associative memory (e.g., ternary content-addressable memory) with multiple matching definitions (e.g., access control list entries, routing information, etc.), which may be particularly useful in identifying packet processing operations to be performed on... Agent: The Law Office Of Kirk D. Williams

20080244171 - Apparatus, system, and method for utilizing tape media segmentation: An apparatus and system are presented for utilizing tape storage media segmentation to improve data access performance. A segmented tape storage medium within a tape cartridge having a first and second segment is utilized. A selection module allows a user to select a user-defined capacity of the tape storage medium... Agent: Brian C. Kunzler

20080244172 - Method and apparatus for de-duplication after mirror operation: An amount of storage capacity used during mirroring operations is reduced by applying de-duplication operations to the mirror volumes. Data stored to a first volume is mirrored to a second volume. The second volume is a virtual volume having a plurality of logical addresses, such that segments of physical storage... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080244173 - Storage device using nonvolatile cache memory and control method thereof: According to one embodiment, the present invention provides a storage device that sophisticatedly utilizes the characteristics of a nonvolatile cache memory and a hard disk, and compensates defects of the hard disk drive side to improve the reliability of the device. The storage device includes a host interface, a command... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20080244176 - Information processing device and disk array construction method: According to one embodiment, an information processing device, includes a connecting port configured to be connected by a second storage device, having a plurality of areas to duplicate data to be stored by a internal storage device having a first capacity and to be disposed in a body, and of... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20080244175 - Memory system and computer system: When a memory card is inserted into a computer, a memory controller sends command information stored in a memory array to the computer. Then, the computer stores the command information received from the memory card into a RAM. The computer generates a command as needed on the basis of the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080244177 - Modular systems and methods for managing data storage operations: The invention is a modular backup and retrieval system. The software modules making up the backup and retrieval system run independently, and can run either on the same computing devices or on different computing devices. The modular software system coordinates and performs backups of various computing devices communicating to the... Agent: Knobbe Martens Olson & Bear LLP

20080244178 - Rebalancing of striped disk data: Provided are a method, system, and article of manufacture, where a plurality of extents are stored in a first set of storage units coupled to a controller. A determination is made that a second set of storage units has been coupled to the controller. The plurality of extents are distributed... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080244174 - Replication in storage systems: Embodiments include methods, apparatus, and systems for replication in storage systems. One embodiment includes a method that uses a target port on a storage array to function as an initiator port on a host in a storage area network (SAN). The target port discovers storage arrays in the SAN and... Agent: Hewlett Packard Company

20080244179 - Memory device with a built-in memory array and a connector for a removable memory device: A memory device is provided comprising a built-in memory array, a first connector configured to connect to a removable memory device comprising a lower-endurance memory array than the built-in memory array, a second connector configured to connect to a host device, and circuitry operative to control read/write operations to the... Agent: Brinks Hofer Gilson & Lione/sandisk

20080244180 - Navigation apparatus and method: A navigation apparatus and method increase the upper limit for the number of times map data may be written into a portable storage medium. A CPU reads an initial radius and an additional radius increment from a ROM and repeatedly adds the additional radius increment to the initial radius to... Agent: Bacon & Thomas, PLLC

20080244181 - Dynamic run-time cache size management: Methods and apparatus relating to dynamic management of cache sizes during run-time are described. In one embodiment, the size of an active portion of a cache may be adjusted (e.g., increased or decreased) based on a cache busyness metric. Other embodiments are also disclosed.... Agent: Caven & Aghevli C/o Intellevate, LLC

20080244182 - Memory content inverting to minimize ntbi effects: In general, in one aspect, the disclosure describes an apparatus that includes a memory device having a plurality of memory cells. An inverter is used to invert data and tag information destined for the memory device. A register is used to capture the inverted data and tag information. A write... Agent: RyderIPLaw C/o Intellevate, LLC

20080244183 - Storage system: An object of the present invention is to provide a storage system which is shared by a plurality of application programs, wherein optimum performance tuning for a cache memory can be performed for each of the individual application programs. The storage system of the present invention comprises a storage device... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080244184 - In-memory caching of shared customizable multi-tenant data: In a multi-tenant data sharing environment with shared, customizable data attributes are assigned to requested data and stored in a cache store along with the requested data. For non-customized data designated as system data, one copy is stored in the cache store for use by multiple tenants allowing optimization of... Agent: Merchant & Gould (microsoft)

20080244185 - Reduction of cache flush time using a dirty line limiter: The invention relates to a method for reducing cache flush time of a cache in a computer system. The method includes populating at least one of a plurality of directory entries of a dirty line directory based on modification of the cache to form at least one populated directory entry,... Agent: Osha Liang L.L.P./sun

20080244186 - Write filter cache method and apparatus for protecting the microprocessor core from soft errors: A write filter cache system for protecting a microprocessor core from soft errors and method thereof are provided. In one aspect, data coming from a processor core to be written in primary cache memory, for instance, L1 cache memory system, is buffered in a write filter cache placed between the... Agent: Scully, Scott, Murphy & Presser, P.C.

20080244187 - Pipelining d states for mru steerage during mru-lru member allocation: A method and apparatus for preventing selection of Deleted (D) members as an LRU victim during LRU victim selection. During each cache access targeting the particular congruence class, the deleted cache line is identified from information in the cache directory. A location of a deleted cache line is pipelined through... Agent: Dillon & Yudell LLP

20080244188 - Information recording apparatus and control method thereof: According to one embodiment, an information recording apparatus has a control unit configured to control mutual transfer of information between each of a disc-shaped recording medium, a cache memory, and a non-volatile memory and the outside, control mutual transfer of information between the disc-shaped recording medium, the cache memory, and... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20080244189 - Method, apparatus, system and program product supporting directory-assisted speculative snoop probe with concurrent memory access: A multiprocessor data processing system includes a memory controller controlling access to a memory subsystem, multiple processor buses coupled to the memory controller, and at least one of multiple processors coupled to each processor bus. In response to receiving a first read request of a first processor via a first... Agent: Ibm Corporation

20080244190 - Method, apparatus, system and program product supporting efficient eviction of an entry from a central coherence directory: In response to a memory access request missing in a central coherence directory of a data processing system, the central coherence directory issues a back-invalidate request and provides an indication of one or more processors possibly caching a copy of a victim memory block associated with a victim memory address.... Agent: Ibm Corporation

20080244191 - Processor system management mode caching: In some embodiments, an apparatus comprises one or more processors supporting a system management mode, system management memory, and software controllable caching of memory, one or more memory modules, a memory controller, and a communication bus to couple the one or more memory modules to the memory controller. Other embodiments... Agent: Caven & Aghevli C/o Intellevate, LLC

20080244192 - Multiprocessor system: A multiprocessor system includes cache memories each of which is provided in correspondence with one of processor cores and includes a tag storage unit configured to store validity information representing whether a cache line as a unit to store data is valid, update information representing whether data in the cache... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080244193 - Adaptive range snoop filtering methods and apparatuses: m

20080244194 - Method and aparathus for filtering snoop requests using stream registers: A method and apparatus for supporting cache coherency in a multiprocessor computing environment having multiple processing units, each processing unit having a local cache memory associated therewith. A snoop filter device is associated with each processing unit and includes at least one snoop filter primitive implementing filtering method based on... Agent: Scully, Scott, Murphy & Presser, P.C.

20080244196 - Method and apparatus for a unified storage system: A unified storage system for executing a variety of types of storage control software using a single standardized hardware platform includes multiple storage control modules connected to storage devices for storing data related to input/output (I/O) operations. A first type of storage control software is initially installed and executed on... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080244195 - Methods and apparatuses to support memory transactions using partial physical addresses: Methods and apparatuses to support memory transactions using partial physical addresses are disclosed. Method embodiments generally comprise home agents monitoring multiple responses to multiple memory requests, wherein at least one of the responses has a partial address for a memory line, resolving conflicts for the memory requ'fvests, and suspending conflict... Agent: Schubert, Osterrieder & Nickelson, PLLC C/o Intellevate, LLC

20080244197 - External memory controller node: A memory controller to provide memory access services in an adaptive computing engine is provided. The controller comprises: a network interface configured to receive a memory request from a programmable network; and a memory interface configured to access a memory to fulfill the memory request from the programmable network, wherein... Agent: Nixon Peabody LLP

20080244198 - Microprocessor designing program, microporocessor designing apparatus, and microprocessor: A microprocessor which can be operated with small power consumption, a microprocessor designing program which can design it in a short period of time, and a microprocessor designing apparatus. The microprocessor designing program comprises an execution program storing step of storing each of the execution programs in said specified address... Agent: Studebaker & Brackett PC

20080244199 - Computer system preventing storage of duplicate files: A plurality of contents intrinsic values that are values intrinsic to respective contents of a plurality of files stored in one or more first storage devices are calculated. Whether two or more identical contents intrinsic values are contained among the plurality of contents intrinsic values is determined. When two or... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080244200 - System for communicating command parameters between a processor and a memory flow controller: A system and method for communicating command parameters between a processor and a memory flow controller are provided. The system and method make use of a channel interface as the primary mechanism for communicating between the processor and a memory flow controller. The channel interface provides channels for communicating with... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20080244201 - Method for digital storage of data on a data memory with limited available storage space: The most important data in a first memory of a data processing system are stored in a limited second data memory given upon a transfer thereof. The demarcation between important (and still storable) data on the one hand and less important (and therefore no longer storable) data is made dependent... Agent: Schiff Hardin, LLP Patent Department

20080244203 - Apparatus combining lower-endurance/performance and higher-endurance/performance information storage to support data processing: An information storage arrangement that combines higher-endurance (or performance) storage with lower-endurance (or performance) storage is managed in a manner that makes judicious use of the lower-endurance (or performance) storage. It is therefore possible to exploit the economic advantage associated with lower-endurance (or performance) storage, while also avoiding storage capacity... Agent: Brinks Hofer Gilson & Lione/sandisk

20080244202 - Method combining lower-endurance/performance and higher-endurance/performance information storage to support data processing: An information storage arrangement that combines higher-endurance (or performance) storage with lower-endurance (or performance) storage is managed in a manner that makes judicious use of the lower-endurance (or performance) storage. It is therefore possible to exploit the economic advantage associated with lower-endurance (or performance) storage, while also avoiding storage capacity... Agent: Brinks Hofer Gilson & Lione/sandisk

20080244204 - Replication and restoration of single-instance storage pools: A system and method for managing single instance storage. A computer system includes at least two backup servers, each backup server included in a single-instance storage pool. A first backup server conveys a first de-duplicated list identifying data segments from the first storage pool to a second backup server. The... Agent: Rory D. Rankin Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20080244205 - Storage system and storage control method: The correspondence between a plurality of virtual storage positions in a virtual volume for logically holding a snapshot image of a main volume in which data elements transmitted from a higher-level device are written and a plurality of address information elements indicating a plurality of actual storage positions of a... Agent: Stanley P. Fisher Reed Smith LLP

20080244206 - Method of controlling memory access: Provided is a method of controlling memory access. In a system including a first layer element executed in a privileged mode having a first priority of permission to access the entire region of a memory and second and third layer elements executed in an unprivileged mode having a second priority... Agent: Sughrue Mion, PLLC

20080244208 - Memory card hidden command protocol: A memory card compatible token includes non-memory components accessed using commands hidden in the data stream of a memory card access command. A mobile computing device such as a mobile phone accesses the non-memory components by writing to a specific address, including a known data value in the data stream,... Agent: Lemoine Patent Services C/o Intellevate

20080244207 - System as well as a method for granting a privilege to a chip holder: A system for granting a privilege to a chip holder. The system comprises at least one chip provided with at least one secret key to be activated by a chip holder and at least one associated public key. The system further comprises at least one chip reader, which is connected... Agent: Wood, Phillips, Katz, Clark & Mortimer

20080244209 - Methods and devices for determining quality of services of storage systems: Methods and systems for allowing access to computer storage systems. Multiple requests from multiple applications can be received and processed efficiently to allow traffic from multiple customers to access the storage system concurrently.... Agent: Fulbright & Jaworski L.L.P.

20080244210 - Eliminating fragmentation with buddy-tree allocation: This disclosure describes solutions for reducing the amount of fragmentation on a computer memory device, such as a hard disk, random access memory device, and/or the like. In an aspect, this disclosure describes systems, methods and software for allocating storage space for variable-sized data chunks in a fashion that reduces... Agent: Townsend And Townsend And Crew LLP

20080244211 - Memory device and controller: A memory device comprises a nonvolatile memory including memory areas that are defined in accordance with a security levels, and a controller configured to write to a first area that is part of the memory areas in an M-value mode and to a second area that is part of the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080244212 - System and method to enable hierarchical data spilling: In some embodiments, the invention involves managing access to firmware non-volatile storage which is currently an extremely limited resource. A system and method provide a seamless means by which to enable spilling of such access to an alternate non-volatile storage target. One embodiment uses a virtualization platform to proxy NV... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20080244217 - Safety module for a franking machine: The invention relates to a safety module for the electronic data processing, with a safety core comprising a core processor, and connected therewith, a core memory and a core interface, the core processor being adapted to import via the core interface, to verify and with successful verification to store and... Agent: Schiff Hardin, LLP Patent Department

20080244216 - User access to a partitionable server: A partitionable server that enables user access thereto is provided. The partitionable server includes a plurality of partitions, each running an independent instance of an operating system (OS) and a first management module located in the partitionable server and interfacing with the plurality of partitions, the first management module is... Agent: Hewlett Packard Company

20080244213 - Workload management in virtualized data processing environment: A system, method and computer-readable medium for balancing access among multiple logical partitions to the physical system resources of a computer system employing system virtualization. Each of the logical partitions is classified, initially during a startup period, in accordance with a level of allocated dispatch window utilization. Performance metrics of... Agent: Dillon & Yudell LLP

20080244214 - Workload management in virtualized data processing environment: A system, method and computer-readable medium for balancing access among multiple logical partitions to the physical system resources of a computer system employing system virtualization. Each of the logical partitions is classified, initially during a startup period, in accordance with a level of allocated dispatch window utilization. Performance metrics of... Agent: Dillon & Yudell LLP

20080244215 - Workload management in virtualized data processing environment: A system, method and computer-readable medium for balancing access among multiple logical partitions to the physical system resources of a computer system employing system virtualization. Each of the logical partitions is classified, initially during a startup period, in accordance with a level of allocated dispatch window utilization. Performance metrics of... Agent: Dillon & Yudell LLP

20080244218 - System and program product for caching web content: The invention provides a system and program product for caching dynamic portal pages without changing the existing caching proxy infrastructure or the transportation protocol used by providing an advanced caching component. An advanced caching component provides the functionality that additional dynamic page specific cache information is provided as part of... Agent: Hoffman Warnick LLC

20080244219 - Method and apparatus for controlling a single-user application in a multi-user operating system: A control system enables a plurality of users to execute a single-user application simultaneously in a multi-user OS which causes address conflicts under simultaneous execution and save results for each user avoiding the address conflicts. The control system comprises a control unit 10 which changes write addresses of applications 51-53... Agent: Jackson Chen Nec Corporation Of America