Electrical computers and digital processing systems: memory inventions 09/08

20080235433 - Hybrid density memory storage device and control method thereof: The present invention discloses a control method for a hybrid density memory storage device. The method arranges physical locations for a file system stored in the storage device. The storage device includes a high density storage space, a low density storage space and a hot list capable of recording a... Agent: Rosenberg, Klein & Lee

20080235432 - Memory system having hybrid density memory and methods for wear-leveling management and file distribution management thereof: The present invention discloses a memory system having a hybrid density memory. The memory system includes a plurality of storage spaces whereby the storage spaces have respective levels of endurance and each storage space has a plurality of blocks and pre-determined weighting factors corresponding to the levels of endurance of... Agent: Rosenberg, Klein & Lee

20080235434 - Information processing method, and information processing system: A user-information managing unit controls reading of information stored in a user-information DB and a rule DB and writing of information to these databases. A customization processing unit receives a request for customizing rule information stored in the rule DB and, according to the request, customizes the rule information stored... Agent: Harness, Dickey & Pierce, P.L.C

20080235442 - Flash memory device capable of improving read performance: A flash memory device, related system ad method are disclosed. The memory device includes a memory cell array a page buffer receiving read data, wherein the page buffer includes a main register transferring read data to a cache register during an read operation, and a control logic block controlling operation... Agent: Volentine & Whitt PLLC

20080235443 - Intelligent solid-state non-volatile memory device (nvmd) system with multi-level caching of multiple channels: A flash memory system stores blocks of data in Non-Volatile Memory Devices (NVMD) that are addressed by a logical block address (LBA). The LBA is remapped for wear-leveling and bad-block relocation by the NVMD. The NVMD are interleaved in channels that are accessed by a NVMD controller. The NVMD controller... Agent: Stuart T Auvinen

20080235440 - Memory device: A memory device includes a housing, a memory within the housing, and a first electrical interface accessible on a top surface of the housing and a second electrical interface accessible on a bottom surface of the housing. As such, at least one of the first electrical interface and the second... Agent: Eric D. Levinson Imation Corp.

20080235439 - Methods for conversion of update blocks based on association with host file management data structures: A method for operating a memory system is provided. In this method, a sequential update block is provided and a write command is received to write data. The write command comprises a logical address associated with the data. If the logical address is associated with a host file management data... Agent: Weaver Austin Villeneuve Sampson LLP

20080235437 - Methods for forcing an update block to remain sequential: A method for operating a memory system is provided. In this method, a sequential update block and preexisting data associated with the sequential update block are provided. Here, an option to convert the sequential update block to a chaotic update block also is provided. A write command is received to... Agent: Weaver Austin Villeneuve Sampson LLP

20080235441 - Reducing power dissipation for solid state disks: A data processing device including a computer, the computer including a solid state disk (SSD), including a primary memory for single level cell storage, and a secondary memory for multi-level cell storage, a limited internal battery for supplying power to the computer, a socket for connecting the computer to an... Agent: Soquel Group, LLC

20080235436 - Storage access control: A system and device are disclosed. In one embodiment, the system includes a processor, system memory, chipset, flash memory, and flash memory controller. The flash memory controller includes a base address register for a flash memory hidden protected area (HPA) to store a flash memory HPA base address, a size... Agent: Intel Corporation C/o Intellevate, LLC

20080235438 - System and method for effectively implementing a multiple-channel memory architecture: A system and method for implementing a multiple-channel memory architecture includes a plurality of memory channels that are configured in a parallel manner to store electronic data. In certain embodiments, the memory channels are implemented to include non-volatile flash memory devices. A transfer controller communicates with the memory channels to... Agent: Gregory J. Koerner Redwood Patent Law

20080235435 - Use of a shutdown object to improve initialization performance: According to some embodiments, use of a shutdown object during system initialization is disclosed. The shutdown object may be read from a non-volatile memory device and loaded into a random access memory. A plurality of headers may then be scanned from the non-volatile memory device. The shutdown object may be... Agent: Trop, Pruner & Hu, P.C.

20080235444 - System and method for providing synchronous dynamic random access memory (sdram) mode register shadowing in a memory system: A system and method for providing SDRAM mode register shadowing in a memory system. A system includes a memory interface device adapted for use in a memory system. The memory interface device includes an interface to one or more ranks of memory devices, and each memory device includes one or... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20080235445 - It automation appliance imaging system and method: A system, method, and computer program product for harvesting an image from a local disk of a managed endpoint to an image library is provided. In an embodiment of the method for harvesting an image, a managed endpoint is provided with a boot image that causes the endpoint to instantiate... Agent: Fenwick & West LLP

20080235446 - Method of monitoring status information of remote storage and storage subsystem: Each storage subsystem comprises: a unit which receives a status information acquisition command from the host computer; a unit which analyses the received command to judge whether the storage subsystem in question is a target of the command; a unit which sends the command to a downstream storage subsystem connected... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080235449 - Rebalancing of striped disk data: Provided are a method, system, and article of manufacture, where a plurality of extents are stored in a first set of storage units coupled to a controller. A determination is made that a second set of storage units has been coupled to the controller. The plurality of extents are distributed... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080235448 - Storage apparatus and storage area arrangement method: This storage apparatus for providing a dynamically expandable virtual volume to a host system to access the virtual volume comprises an allocation unit for configuring a group with a plurality of disks for providing a storage area to be allocated to the virtual volume, and allocating the storage area respectively... Agent: Stanley P. Fisher Reed Smith LLP

20080235447 - Storage device: The present disclosure relates to a method for detecting a RAID device. The RAID device includes a disk set for storing a special data and the disk set is composed of a plurality of member disks. The method comprises the following steps. The first step is to read data stored... Agent: Rabin & Berdo, PC

20080235451 - Non-volatile memory device and associated programming method: A non-volatile memory device having a memory array is configured to prevent power voltage noise generation during programming, thereby improving reliability. An associated programming method of the non-volatile memory device includes storing data input from an external source to a cache register. The stored data is moved to a main... Agent: Volentine & Whitt PLLC

20080235450 - Updating entries cached by a network processor: Machine-readable media, methods, and apparatus are described to update network processor cache entries in corresponding local memories and update cached entries based upon information stored in corresponding buffers for the microengines. A control plane of the network processor identifies each microengine having updated entry stored in corresponding local memory, and... Agent: Blakely Sokoloff Taylor & Zafman LLP

20080235452 - Design structure for shared cache eviction: A design structure embodied in a machine readable storage medium for of designing, manufacturing, and/or testing for shared cache eviction in a multi-core processing environment having a cache shared by a plurality of processor cores is provided. The design structure includes means for receiving from a processor core a request... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20080235453 - System, method and computer program product for executing a cache replacement algorithm: A system, method and computer program product for executing a cache replacement algorithm. A system includes a computer processor having an instruction processor, a cache and one or more useful indicators. The instruction processor processes instructions in a running program. The cache includes two or more cache levels including a... Agent: Cantor Colburn LLP-ibm Yorktown

20080235455 - Cache architecture for a processing unit providing reduced power consumption in cache operation: A cache memory processing system is disclosed that is coupled to a main memory and a processing unit. The cache memory processing system includes an input, a low order bit data path, a high order bit data path and an output. The input is for receiving input data that includes... Agent: Gauthier & Connors, LLP

20080235454 - Method and apparatus for repairing a processor core during run time in a multi-processor data processing system: A data processing system includes multiple processors each having multiple processor cores. A core checkstop from a particular processor core indicates that a memory array associated with the particular core exhibits an error. In response to the core checkstop, the system migrates the workload of the particular processor core to... Agent: Mark P. Kahler

20080235457 - Dynamic quality of service (qos) for a shared cache: In one embodiment, the present invention includes a method for associating a first priority indicator with data stored in a first entry of a shared cache memory by a core to indicate a priority level of a first thread, and associating a second priority indicator with data stored in a... Agent: Trop Pruner & Hu, PC

20080235456 - Shared cache eviction: Methods and systems for shared cache eviction in a multi-core processing environment having a cache shared by a plurality of processor cores are provided. Embodiments include receiving from a processor core a request to load a cache line in the shared cache; determining whether the shared cache is full; determining... Agent: Ibm (rps-blf) C/o Biggers & Ohanian, LLP

20080235458 - Method for tracking of non-resident pages: Embodiments of the present invention provide methods and systems for efficiently tracking evicted or non-resident pages. For each non-resident page, a first hash value is generated from the page's metadata, such as the page's mapping and offset parameters. This first hash value is then used as an index to point... Agent: Mh2 Technology Law Group (cust. No. W/red Hat)

20080235459 - Processor, method, and data processing system employing a variable store gather window: A processor includes at least one instruction execution unit that executes store instructions to obtain store operations and a store queue coupled to the instruction execution unit. The store queue includes a queue entry in which the store queue gathers multiple store operations during a store gathering window to obtain... Agent: Dillon & Yudell LLP

20080235460 - Apparatus and method for information processing enabling fast access to program: A main memory stores cache blocks obtained by dividing a program. At a position in a cache block where a branch to another cache block is provided, there is embedded an instruction for activating a branch resolution routine for performing processing, such as loading of a cache block of the... Agent: Kaplan Gilman Gibson & Dernier L.L.P.

20080235461 - Technique and apparatus for combining partial write transactions: A bridge includes a memory to establish a transaction table and write combining windows. Each write combining window is associated with a cache line and is subdivided into subwindows; and each of the subwindows is associated with a partial cache line. The bridge includes a controller to determine whether an... Agent: Trop Pruner & Hu, PC

20080235462 - Device having a low latency single port memory unit and a method for writing multiple data segments to a single port memory unit: A method and a device. The device includes a single port memory unit that includes multiple memory regions, whereas each memory region is adapted to receive multiple data segments in parallel; whereas the single port memory unit receives a memory clock signal; characterized by including access logic adapted to receive... Agent: Freescale Semiconductor, Inc. Law Department

20080235468 - Hybrid density memory storage device: The present invention discloses a hybrid density memory storage device configured to store data responsive to a host and a file system thereof. The hybrid density memory storage device includes a non-volatile memory, a hot data buffer and a control unit. The non-volatile memory includes a high density storage space... Agent: Rosenberg, Klein & Lee

20080235467 - Memory management device and method, program, and memory management system: A memory management device which is capable of allocating a memory unit accessible at a higher speed to data which is stored in a storage device having memory units different in access speed, without being limited in an storage area. The storage device comprises a BLC flash memory accessible at... Agent: Rossi, Kimms & Mcdowell LLP.

20080235463 - Methods for conversion of update blocks based on comparison with a threshold size: A method for operating a memory system is provided. In this method, a write command is received to write data following a previous write command. The write command and the previous write command have a discontinuity in logical addresses and the discontinuity in logical addresses defines a gap between a... Agent: Weaver Austin Villeneuve Sampson LLP

20080235466 - Methods for storing memory operations in a queue: A method for operating a non-volatile memory storage system is provided. In this method, a queue that is configured to store memory operations associated with two or more types of memory operations. Here, memory operations are associated with the maintenance of the non-volatile memory storage system. A memory operation is... Agent: Weaver Austin Villeneuve Sampson LLP

20080235464 - System for conversion of update blocks based on comparison with a threshold size: A non-volatile memory storage system is provided. The non-volatile memory storage system comprises a non-volatile memory cell array and a processor in communication with the non-volatile memory cell array. The processor is configured to receive a write command to write data following a previous write command. Here, the write command... Agent: Weaver Austin Villeneuve Sampson LLP

20080235465 - Systems for conversion of update blocks based on association with host file management data structures: A non-volatile memory storage system is provided. The non-volatile memory storage system comprises a non-volatile memory cell array and a processor in communication with the non-volatile memory cell array. Here, the processor is configured to receive a write command to write data, where the write command comprises a logical address... Agent: Weaver Austin Villeneuve Sampson LLP

20080235469 - Peak data retention of signal data in an implantable medical device: Methods and apparatus for storing data records associated with an extreme value are disclosed. Signal data is stored in a first buffer of a set of buffers. If a local extreme value for the first buffer exceeds a global extreme value, signal data is stored in a second buffer of... Agent: Banner & Witcoff, Ltd.

20080235470 - Accessing information from a removable storage unit: A system comprising a processor and a removable solid-state storage unit adapted to be accessed by the processor and comprising information. Upon detecting the presence of the storage unit, the processor copies the information to a system storage coupled to the processor. The processor accesses the information from the system... Agent: Hewlett Packard Company

20080235471 - Smart batteryless backup device and method therefor: A proposed smart batteryless backup device is designed for the reception of data transmitted by controlled equipment, backing up said data in the case of the controlled equipment power failure or in accordance with several program requirements, and also for the subsequent restoration. Proposed device improves trust level of the... Agent: Feldman Michael

20080235472 - Snapshot format conversion method and apparatus: A system according to this invention converts a full-copy snapshot into a differential snapshot. The system is composed of a storage subsystem and a server subsystem. The storage subsystem comprises a disk drive and a disk controller. The server subsystem comprises an interface, a processor, and a memory. The disk... Agent: Stanley P. Fisher Reed Smith LLP

20080235476 - Media vaulting in an automated data storage library: Disclosed are a system, a method, and article of manufacture to provide for managing data storage media to provide secure storage of the data storage media in an automated data storage library. A logical library partition vault is created in the automated data storage library that is not accessible by... Agent: International Business Machines Corporation

20080235475 - Method and apparatus for intervaled dma transfer access: A method for intervaled memory transfer access provides periodic authorization signals to a memory access controller. The method cycles between: 1) inhibiting the memory access controller from writing data to a memory until the memory access controller receives a periodic authorization signal to cause the memory access controller to remove... Agent: Schwabe, Williamson & Wyatt, P.C.

20080235474 - Method and system for processing access to disk block: Provided are a method and a system for processing an access to a disk block. The system receives a disk block access request from an OS domain, determines whether the OS domain is permitted to access a disk block with reference to a predetermined block table and processes disk block... Agent: Sughrue Mion, PLLC

20080235473 - Protection unit for a programmable data-processing system: A data-processing system having at least one operating memory holding operating data is provided with a protection unit having an execution environment protected from unauthorized access. At least one monitoring logic in the execution environment is connected to the operating memory for monitoring unauthorized modifications, access, or similar protection violations... Agent: K.f. Ross P.C.

20080235477 - Coherent data mover: A method and system for dynamically relocating regions of memory in computing systems. During the execution of software application(s) on a computing system, a relocation of data in a region of memory may be performed. A coherent data mover is coupled to system memory, memory controller(s), and processor(s) of a... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)

20080235478 - Moving hardware context structures in memory while maintaining system operation: An adapter includes registers, a local context table, and logic that allows copying hardware context structures from a first location in memory to a second location in memory while the computer system continues to run. The local context table in the adapter is loaded with a desired block of context... Agent: Martin & Associates, LLC

20080235479 - Initializing file data blocks: A method and system is provided for initializing files such as, for example and without limitation, pre-allocated files or raw device mapping (RDM) files, by delaying initializing file blocks. In accordance with one or more embodiments of the present invention, file blocks are associated with corresponding indicators to track un-initialized... Agent: Vmware, Inc.

20080235480 - Systems for storing memory operations in a queue: A non-volatile memory storage system is provided. The non-volatile memory storage system is configured to store a queue. Here, the queue is configured to store memory operations associated with two or more types of memory operations. The memory operations are associated with maintenance of the non-volatile memory storage system. The... Agent: Weaver Austin Villeneuve Sampson LLP

20080235481 - Managing memory in a system that includes a shared memory area and a private memory area: A method and apparatus for auto-tuning memory is provided. Memory on a computer system comprises at least one shared memory area and at least one private memory area. Addresses in the shared memory area are accessible to multiple processes. Addresses in the private memory area are dedicated to individual processes.... Agent: Hickman Palermo Truong & Becker/oracle

20080235482 - Live migration of a logical partition: A partition migration mechanism migrates a logical partition executing an operating system and resumes the logical partition before all resources in the logical partition have been migrated. When a partition is being migrated, a call checkpoint mechanism creates checkpoints of the state of the operating system when the partition manager... Agent: Martin & Associates, LLC

20080235483 - Storage device and method for protecting its partition: The present invention provides a storage device and a method for protecting its protected partition in which the storage device comprises a master boot record unit and a protected partition, the protected partition comprises an application data area and a system data area for storing application data and system data... Agent: Dickstein Shapiro LLP

20080235484 - Method and system for host memory alignment: Certain aspects of a method and system for host memory alignment may include splitting a received read and/or write I/O request at a first of a plurality of memory cache line boundaries to generate a first portion of the received I/O request. A second portion of the received read and/or... Agent: Mcandrews Held & Malloy, Ltd

20080235485 - Ecc implementation in non-ecc components: A method and apparatus for implementation of error correction code (ECC) checking in non-ECC-compliant components. The method includes receiving a logical address, wherein the logical address maps to first and second physical addresses of a memory. The first and second physical addresses of the memory correspond to memory locations that... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)

20080235486 - Non-volatile memory devices, systems including same and associated methods: A memory device, system and method of editing a file in a non-volatile memory device is described. The memory device includes a controller and a memory array configured to copy an existing first file into a second file during editing and to maintain the first file while applying edits to... Agent: Trask Britt, P.C./ Micron Technology

20080235487 - Applying quality of service (qos) to a translation lookaside buffer (tlb): In one embodiment, the present invention includes a translation lookaside buffer (TLB) having storage locations each including a priority indicator field to store a priority level associated with an agent that requested storage of the data in the TLB, and an identifier field to store an identifier of the agent,... Agent: Trop Pruner & Hu, PC

20080235488 - Splash tables: an efficient hash scheme for processors: Also provided for are retrieving data items in a computer. A plurality of hash functions of data values in a probe key are computed. A corresponding memory location is determined for each of the plurality of hash functions. Data items in each memory location are examined to determine a match... Agent: Duke W. Yee

20080235489 - Systems for forcing an update block to remain sequential: A non-volatile memory system comprises a non-volatile memory cell array and a processor in communication with the non-volatile memory cell array. The processor is configured to provide a sequential update block, preexisting data associated with the sequential update block, and an option to convert the sequential update block to a... Agent: Weaver Austin Villeneuve Sampson LLP

20080228989 - Method and device for securing the reading of a memory: A method reads a datum saved in a memory by selecting an address of the memory in which the datum to be read is saved, reading the datum in the memory at the selected address, saving the datum read in a storage space, and when the memory is not being... Agent: Seed Intellectual Property Law Group PLLC

20080228988 - Method for transmitting configuration data via a configuration data bus in a memory arrangement, configuration data bus structure, memory arrangement, and computer system: A method transmits configuration data in a memory arrangement. The method includes controlling, with a control unit of the memory arrangement, data transmissions via a configuration data bus in the memory arrangement, the controlling including controlling transmitting configuration data of the memory arrangement for storing in at least two register... Agent: Dicke, Billig & Czaja

20080228991 - Ring buffer management: A method is provided for managing access to a ring buffer, for at least one data transfer channel for a determined amount of data, with this ring buffer comprising a series of buffer sub-areas spaced apart by a memory address offset and ordered from a first buffer sub-area to a... Agent: Fleit Gibbons Gutman Bongini & Bianco P.l.

20080228990 - Storage apparatus having unused physical area autonomous management function: A physical extent assurance unit manages correspondence of a logical disk accessed from a host computer with physical extents. A data pattern generation response unit generates a predetermined data pattern, and returns this data pattern in response to a data request from the host computer. A pattern matching unit checks... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080228992 - System, method and apparatus for accelerating fast block devices: A system, method and apparatus directed to fast data storage on a block storage device. New data is written to an empty write block. If the new data is compressible, a compressed version of the new is written into the meta data. A location of the new data is tracked.... Agent: Winston & Strawn LLP Patent Department

20080228993 - Wireless data communications using fifo for synchronization memory: A microprocessor system architecture is disclosed which allows for the selective execution of programmed ROM microcode or, alternatively, RAM microcode if there has been a correction or update made to the ROM microcode originally programmed into the system. Patched or updated RAM microcode is utilized or executed only to the... Agent: Brake Hughes Bellermann LLP C/o Intellevate

20080228994 - Solid memory module structure with extensible capacity: A solid memory module structure with extensible capacity includes at least a non-volatile memory module, each of which has at least a memory chip, a first connector, and a control unit. And A Solid memory module includes at least a second connector, which electrically connects the first connector of the... Agent: Pro-techtor International Services

20080228999 - Dual use for data valid signal in non-volatile memory: In some types of non-volatile memory devices, the same signal from a memory device may be used for two purposes: During a read operation, the signal may be used by a memory controller to latch the data that is being received from the memory device. During a block erase operation... Agent: Intel Corporation C/o Intellevate, LLC

20080229000 - Flash memory device and memory system: A memory system comprises a flash memory, a processing unit, and a flash controller including address and control registers, the address and control registers being configured to receive information from the processing unit, wherein the flash controller is configured to control a copy-back program operation of the flash memory in... Agent: Volentine & Whitt PLLC

20080228998 - Memory storage via an internal compression algorithm: The subject specification discloses flash memory device with the capability of performing both internal compression as well as internal de-compression. Each of these actions takes place through appropriate algorithms. In normal operation, the compression occurs prior to a writing of data in a flash memory device. The compressed data travels... Agent: Amin, Turocy & Calvin, LLP

20080229005 - Multi partitioned storage device emulating dissimilar storage media: A digital media. In one embodiment, the digital media devices includes a storage unit/partition that emulates a Compact Disc-Read Only Memory (CD-ROM), and optionally, a second storage unit/partition that acts as a Read/Write storage device.... Agent: Greenberg Traurig, LLP (onspec/tpl)

20080228995 - Portable data storage device using a memory address mapping table: A portable data storage device includes a USB controller, a master control unit and a NAND flash memory device. The master control unit receives data to be written to logical addresses, and instructions to read data from logical addresses. It uses a memory address mapping table to associate the logical... Agent: Ostrolenk Faber Gerb & Soffen

20080228996 - Portable data storage device using multiple memory devices: A portable data storage device includes a USB interface (3), a USB controller (2), a master control unit (7), and two or more NAND flash memory devices (9, 19). The master control unit (7) can send data to the NAND flash memory devices (9, 19) simultaneously through parallel respective 8-bit... Agent: Conley Rose, P.C. David A. Rose

20080229004 - Processor system using synchronous dynamic memory: A processor system including: a processor and controller core connected via an internal bus; and a plurality of synchronous memory chips connected to the processor via an external bus; the controller core including a mode register selected by an address signal from the processor core and written with an information... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080229002 - Semiconductor memory and information processing system: A semiconductor memory (2) comprises a controller (21) and a memory array (22). The memory array (22) is controlled for each of block areas (221, 221 . . . ). The information processing apparatus (1) can not generate a data erase command for each block area (221). A data erase... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080229001 - Solid memory module with extensible capacity: A solid memory module with extensible capacity includes at least a non-volatile memory module, each of which has at least a memory chip and a first connector, and at least a second connector, which electrically connects the first connector of the volatile memory module, at least a control unit and... Agent: Pro-techtor International Services

20080229003 - Storage system and method of preventing deterioration of write performance in storage system: Provided is a storage system capable of inhibiting the deterioration of its write performance. This storage system includes a flash memory, a cache memory, and a controller for controlling the reading, writing and deletion of data of the flash memory and the reading and writing of data of the cache... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080228997 - Zoned initialization of a solid state drive: Zoned initialization of a solid state drive is provided. A solid state memory device includes a controller for controlling storage and retrieval of data to and from the device. A set of solid state memory components electrically coupled to the controller. The set is electrically divided into a first zone... Agent: Haynes And Boone, LLP

20080229006 - High bandwidth low-latency semaphore mapped protocol (smp) for multi-core systems on chips: A system and method for dynamically managing movement of semaphore data within the system. The system includes, but is no limited to, a plurality of functional units communicating over the network, a memory device communication with the plurality of functional units over the network, and at least one semaphore storage... Agent: Downs Rachlin Martin PLLC

20080229007 - Enhancements to an xdr memory controller to allow for conversion to ddr2: A memory control apparatus includes a data stream format converter and a physical layer converter. The data stream format converter is configured to convert an incoming data stream that has a data stream format corresponding to a first memory type into a format-converted data stream that has a data stream... Agent: Ibm Corporation

20080229008 - Sharing physical memory locations in memory devices: A memory structure includes a plurality of address banks where each address bank is operative to store a memory address. In certain embodiments, at least two of the address banks share physical memory locations for at least one redundant most significant bit. Additionally, at least two of the address banks... Agent: Knobbe Martens Olson & Bear LLP

20080229011 - Cache memory unit and processing apparatus having cache memory unit, information processing apparatus and control method: A cache memory unit connecting to a main memory system having a cache memory area in which, if memory data that the main memory system has is registered therewith, the registered memory data is accessed by a memory access instruction that accesses the main memory system and a local memory... Agent: Staas & Halsey LLP

20080229010 - Storage system and method for controlling cache residency setting in the storage system: In a storage system adopting an external storage connection configuration, a first storage apparatus is capable of integrally managing the cache residency settings made in second storage apparatuses, which serve as external storage apparatuses. The first storage apparatus stores the cache residency information for the second storage apparatuses, i.e., external... Agent: Sughrue Mion, PLLC

20080229009 - Systems and methods for pushing data: A system for pushing data, the system includes a source node that stores a coherent copy of a block of data. The system also includes a push engine configured to determine a next consumer of the block of data. The determination being made in the absence oft he push engine... Agent: Hewlett Packard Company

20080229013 - Cache synchronization in a raid subsystem using serial attached scsi and/or serial ata: A RAID system includes a pair of RAID controllers adapted to operate in active-active mode, each controller including a cache memory and at least one SAS/SATA I/O chip connected to a plurality of hard disk drives. Each SAS/SATA I/O chip includes more SAS/SATA ports than required to carry data to... Agent: Patton Boggs LLP

20080229012 - Raid array auto-initialization (raai): A system and method are provided for efficiently initializing a redundant array of independent disks (RAID). The method monitors host write operations and uses that information to select the optimal method to perform a parity reconstruction operation. The bins to which data access write operations have not occurred can be... Agent: Law Office Of Gerald Maliszewski

20080229016 - Boot in a media player with external memory: A media player is presented that scans the media files stored on an external memory card in order to update the internal database of the player. Media manager software on a personal computer sets a dirty bit in the internal memory of the media player whenever the media files on... Agent: Beck And Tysver P.l.l.c.

20080229014 - Disk interface card: A disk interface card includes a disk interface, a cache memory, a bus interface and a microprocessor. The disk interface card is electrically connected to a host disk interface of a host through a cable. The disk interface card can be cooperated with a conventional disk array card, which is... Agent: Lin & Associates Intellectual Property, Inc.

20080229015 - Portable memory apparatus having a content protection function and method of manufacturing the same: A portable memory apparatus having a content protection function is provided. The portable memory apparatus includes a memory and a memory control unit. The memory includes a read-only memory area which stores content and is set to so that only read operations are allowed, a writable memory area which is... Agent: Sughrue Mion, PLLC

20080229019 - Method and system for efficient fragment caching: Methods for serving data include maintaining an incomplete version of an object at a server and at least one fragment at the server. In response to a request for the object from a client, the incomplete version of the object, an identifier for a fragment comprising a portion of the... Agent: Keusey, Tutunjian & Bitetto, P.C.

20080229018 - Save data discrimination method, save data discrimination apparatus, and a computer-readable medium storing save a data discrimination program: A save data discrimination method saves calculation results including an element which is periodically saved when a computer executes a program repeating the same arithmetic process. The method includes analyzing a loop structure of the program from a source code of the program to detect a main loop of the... Agent: Greer, Burns & Crain

20080229017 - Systems and methods of providing security and reliability to proxy caches: The present solution provides a variety of techniques for accelerating and optimizing network traffic, such as HTTP based network traffic. The solution described herein provides techniques in the areas of proxy caching, protocol acceleration, domain name resolution acceleration as well as compression improvements. In some cases, the present solution provides... Agent: Choate, Hall & Stewart LLP

20080229020 - Systems and methods of providing a multi-tier cache: The present solution provides a variety of techniques for accelerating and optimizing network traffic, such as HTTP based network traffic. The solution described herein provides techniques in the areas of proxy caching, protocol acceleration, domain name resolution acceleration as well as compression improvements. In some cases, the present solution provides... Agent: Choate, Hall & Stewart LLP

20080229022 - Efficient system bootstrap loading: An efficient system for bootstrap loading scans cache lines into a cache store queue during a scan phase, and then transmits the cache lines from the cache store queue to a cache memory array during a functional phase. Scan circuitry stores a given cache line in a set of latches... Agent: Ibm Corporation (jvm)

20080229021 - Systems and methods of revalidating cached objects in parallel with request for object: The present solution provides a variety of techniques for accelerating and optimizing network traffic, such as HTTP based network traffic. The solution described herein provides techniques in the areas of proxy caching, protocol acceleration, domain name resolution acceleration as well as compression improvements. In some cases, the present solution provides... Agent: Choate, Hall & Stewart LLP

20080229024 - Systems and methods of dynamically checking freshness of cached objects based on link status: The present solution provides a variety of techniques for accelerating and optimizing network traffic, such as HTTP based network traffic. The solution described herein provides techniques in the areas of proxy caching, protocol acceleration, domain name resolution acceleration as well as compression improvements. In some cases, the present solution provides... Agent: Choate, Hall & Stewart LLP

20080229023 - Systems and methods of using http head command for prefetching: The present solution provides a variety of techniques for accelerating and optimizing network traffic, such as HTTP based network traffic. The solution described herein provides techniques in the areas of proxy caching, protocol acceleration, domain name resolution acceleration as well as compression improvements. In some cases, the present solution provides... Agent: Choate, Hall & Stewart LLP

20080229025 - Systems and methods of using the refresh button to determine freshness policy: The present solution provides a variety of techniques for accelerating and optimizing network traffic, such as HTTP based network traffic. The solution described herein provides techniques in the areas of proxy caching, protocol acceleration, domain name resolution acceleration as well as compression improvements. In some cases, the present solution provides... Agent: Choate, Hall & Stewart LLP

20080229026 - System and method for concurrently checking availability of data in extending memories: This invention discloses an extended memory comprising a first tag RAM for storing one or more tags corresponding to data stored in a first storage module, and a second tag RAM for storing one or more tags corresponding to data stored in a second storage module, wherein the first and... Agent: L. Howard Chen Kirkpatrick & Lockhart Preston Gates Ellis, LLP

20080229027 - Prefetch control device, storage device system, and prefetch control method: A prefetch control device controls prefetching of read-out data into cache memory which improves efficiency of data reading from a storage device by caching data passed between the storage device and a computing device, determines whether data read out from the storage device to the computing device is sequentially accessed... Agent: Staas & Halsey LLP

20080229028 - Uniform external and internal interfaces for delinquent memory operations to facilitate cache optimization: A computer implemented method, software infrastructure and computer usable program code for improving application performance. A delinquent memory operation instruction is identified. A delinquent memory operation instruction is an instruction associated with cache misses that exceeds a threshold number of cache misses. A directive is inserted in a code region... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20080229030 - Efficient use of memory ports in microcomputer systems: A microcomputer system includes first and second IP blocks, a multi-port memory, a shared memory field allocated to the second IP block, and a second memory field. A first memory controller is configured to control access to the first and shared memory fields. A second memory controller is configured to... Agent: F. Chau & Associates, LLC

20080229029 - Semiconductor memory system having plurality of ranks incorporated therein: A semiconductor memory system which can integrate a plurality of ranks without occupying an increased area. The semiconductor memory system includes a memory device that has a plurality of ranks each having banks integrated therein, and a shared circuit section that is integrated in the memory device and is shared... Agent: Baker & Mckenzie LLP Patent Department

20080229031 - Method of automated resource management in a partition migration capable environment: A method, system and program are disclosed for automatically adjusting the allocation of a plurality of information processing system (IPS) resources among a plurality of logical partitions (LPARs). An LPAR is created on a first central processor complex (CPC) and a first LPAR identifier is generated. A configuration change manager... Agent: Hamilton & Terrile, LLP IBM Austin

20080229032 - Cell processor atomic operation: A method is disclosed for atomic operation in a processor system comprising a main memory and a power processor element (PPE) including a power processor unit (PPU) and an external cache. A processor system and processor readable medium for implementing the method are also disclosed.... Agent: Joshua D. Isenberg Jdi Patent

20080229034 - Data management for image processing: An image processing system includes a memory for storing data associated with pixels of images, with the pixels having spatial coordinates in an image coordinate system having first and second axes; a processing device including a processor which processes the associated data; and an interface device which accesses in memory... Agent: Fleit Gibbons Gutman Bongini & Bianco P.l.

20080229033 - Method for processing data in a memory arrangement, memory arrangement and computer system: A method processes data in a memory arrangement. The method includes receiving and transmitting the data from the memory arrangement in the form of data packets according to a predefined protocol. The method includes distributing each received data packet to at least two separate data packet processing units. Each data... Agent: Dicke, Billig & Czaja

20080229035 - Systems and methods for implementing a stride value for accessing memory: Systems and methods for implementing a stride valise for memory are provided. One embodiment includes a system comprising a plurality of memory modules configured to store interleaved data in a plurality of memory storage units according to a predetermined interleave. The plurality of memory storage units can be defined by... Agent: Hewlett Packard Company

20080229036 - Information processing apparatus and computer-readable storage medium: A computer-readable storage medium stores a program for causing a processor to perform a process including: acquiring a first address that specifies a start address of a first area on the main memory where a target data to be cached is stored and range information that specifies a size of... Agent: Nixon & Vanderhye, PC

20080229038 - Copy system and copy method: Proposed are a copy system and a copy method capable of performing initial copy in a short amount of time and with high reliability. On a primary side, the area in the first volume to which data was written from the host is managed, a second bitmap is created reflecting... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080229039 - Dual writing device and its control method: A first storage system misrepresents an identifier of the storage system and an identifier of a volume and provides the host computer with a first volume. A second storage system misrepresents an identifier of the storage system and an identifier of a second volume as being identical to those misrepresented... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080229040 - Network storage system, management method therefor, and control program product therefor: A storage system, a storage management method, and a control program product are provided. The storage system is improved in comfortability, convenience, and economy by reducing the amount of copies in a storage device in a network storage system, by heightening storage efficiency and increasing an access speed. In a... Agent: Dickstein Shapiro LLP

20080229037 - Systems and methods for creating copies of data, such as archive copies: A system and method of creating archive copies of data sets is described. In some examples, the system creates an archive copy from an original data set. In some examples, the system creates an archive copy when creating a recovery copy for a data set. In some examples, the system... Agent: Perkins Coie LLP Patent-sea

20080229041 - Electrical transmission system in secret environment between virtual disks and electrical transmission method thereof: The present invention relates to a secure transmission system and secure transmission method that securely transmit data stored in a computer to different computers via a Local Area Network or the Internet. The secure transmission system includes a virtual disk, configured to allow only an authorized application program module to... Agent: Ipla P.A.

20080229042 - Method for locking non volatile memory words in an electronic device fitted with rf communication means: The electronic device, in particular a transponder, includes a non volatile memory (EEPROM) having a plurality of words 1 to N whose read and/or write access can be locked. The protection register (22) is formed of two protection words A and B these two protection words are alternately active and... Agent: Griffin & Szipl, PC

20080229043 - Information processing apparatus and computer usable medium therefor: An information processing apparatus capable of executing at least one information processing operation is provided. The information processing apparatus includes a process control system to execute one of the at least one information processing operation to a piece of data stored in a first data storage, which is indicated by... Agent: Mcdermott Will & Emery LLP

20080229044 - Pipelined buffer interconnect fabric: A method and system to transfer data from one or more data sources to one or more data sinks using a pipelined buffer interconnect fabric is described. The method comprises receiving a request for a data transfer from the data source to the data sink, assigning a first buffer and... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20080229047 - Disk space allocation: A method and system for allocating blocks of disk in persistent storage to requesting threads. A primary data structure is provided for organizing and categorizing blocks of disk space. In addition, a secondary data structure is provided for maintaining a list of all active file system processes and blocks of... Agent: Lieberman & Brandsdorfer, LLC

20080229045 - Storage system provisioning architecture: In some embodiments, a storage controller comprises a first input/output port that provides an interface to a host computer, a second input/output port that provides an interface a storage device, a processor that receives input/output requests generated by the host computer and, in response to the input/output requests, generates and... Agent: Lsi Corporation

20080229046 - Unified support for solid state storage: In a method for providing unified support for solid state storage, a solid state storage class driver is provided to enable uniform operating system access to a plurality of dissimilar solid state storage devices. A common functionality of the plurality of dissimilar solid state storage devices is abstracted via a... Agent: Microsoft Corporation

20080229048 - Method and apparatus for chunk allocation in a thin provisioning storage system: Physical storage space in a storage system is not allocated to a segment of a targeted volume until the segment of the volume is first targeted for storing write data. When write data is received, the storage system determines whether the targeted volume is designated for storing a first data... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080229049 - Processor card for blade server and process.: System including a processor card containing at least two processors, and a memory card containing at least two memory units. At least one memory unit is associated with each processor. A controller dynamically allocates memory in the at least two memory units to the at least two processors.... Agent: Greenblum & Bernstein, P.L.C

20080229051 - Broadcasting instructions/data to a plurality of processors in a multiprocessor device via aliasing: A mechanism for broadcasting instructions/data to a plurality of processors in a multiprocessor device via aliasing is provided. In order to broadcast data to a plurality of processors, a control processor writes to the registers that store the identifiers of the processors and sets two or more of these registers... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20080229050 - Dynamic page on demand buffer size for power savings: A portable electronic device includes a processing device, a memory operatively coupled to said processing device, said memory comprising a plurality of blocks, wherein at least one block of the plurality of blocks may be powered independent of other blocks of the plurality of blocks, and a logic circuit operative... Agent: Warren A. Sklar (soer) Renner, Otto, Boisselle & Sklar, LLP

20080229052 - Data processing apparatus and method for implementing a replacement scheme for entries of a storage unit: A data processing apparatus and method are provided for implementing a replacement scheme for entries of a storage unit. The data processing apparatus has processing circuitry for executing multiple program threads including at least one high priority program thread and at least one lower priority program thread. A storage unit... Agent: Nixon & Vanderhye, PC

20080229053 - Expanding memory support for a processor using virtualization: In one embodiment, the present invention includes a system including a processor to access a maximum memory space of a first size using a memory address having a first length, a chipset coupled to the processor to interface the processor to a memory including a physical memory space, where the... Agent: Trop Pruner & Hu, PC

20080229054 - Method for performing jump and translation state change at the same time: A method for performing a jump and translation state change procedure at the same time is disclosed. The method includes: carrying out a series of instruction processing in a first function in a first translation state; and executing a jump instruction which jumps to a target address in a second... Agent: North America Intellectual Property Corporation

20080229055 - Hardware-based secure code authentication: The present invention provides for authentication of code, such as boot code. A memory addressing engine is employable to select a portion of a memory, as a function of a step value, as a first input hash value. The step value allows for the non-commutative cumulative hashing of a plurality... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20080229056 - Method and apparatus for dual-hashing tables: Methods and apparatus for dual hash tables are disclosed. An example method includes logically dividing a hash table data structure into a first hash table and a second hash table, where the first hash table and the second hash table are substantially logically equivalent. The example method further includes receiving... Agent: Brake Hughes Bellermann LLP C/o Intellevate

20080229057 - Adaptive profiling by progressive refinement: A system/method for profiling a sequence of values from a range to determine a frequency of occurrence of a subrange includes, for a current block, determining whether cells of the current block include a count cell or a pointer cell. If the cell includes a pointer cell, follow an address... Agent: Keusey, Tutunjian & Bitetto, P.C.

20080222343 - Multiple address sequence cache pre-fetching: A method is provided for pre-fetching data into a cache memory. A first cache-line address of each of a number of data requests from at least one processor is stored. A second cache-line address of a next data request from the processor is compared to the first cache-line addresses. If... Agent: Hewlett Packard Company

20080222344 - Facilitating integration of a virtual tape library system with a physical tape library system: Facilitating integration of a virtual tape library system with a physical tape library system. A virtual library tape (VTL) system acts as an intermediary between a physical library tape (PTL) system and a backup host, such that the backup host is always aware of, and can manage the media present... Agent: Shivarama Narasimha Murthy U

20080222345 - Method for accessing memory data: A memory access method for accessing data from a non-volatile memory in a south bridge is provided. Memory access is performed under a system management mode (SMM). Under the protection of the SMM mode, the desired memory address is not altered by an interrupt handler, therefore memory data is accessed... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080222346 - Selectively utilizing a plurality of disparate solid state storage locations: A method for selectively utilizing a plurality of disparate solid state storage locations is disclosed. The technology initially receives class types for a plurality of disparate solid state storage locations. The characteristics of the received data are determined. The received data is then allocated to one of the plurality of... Agent: Microsoft Corporation

20080222348 - File system for managing files according to application: The present invention discloses systems for managing files according to application. A digital storage system including: a storage memory having program code configured: to identify an application identity of an application issuing a storage command to access a file; and to adjust a storage mode of the file according to... Agent: Mark M. Friedman

20080222350 - Flash memory device for storing data and method thereof: A flash memory device which comprises a controller and one or plurality of flash memories for storing data and method thereof are disclosed. The controller comprises a control interface to accept data access which is from a main board and is managed by a control element of flash memory and... Agent: Troxell Law Office Pllc

20080222349 - Ieee 1394 interface-based flash drive using multilevel cell flash memory devices: A flash drive and method of transferring data from a system to a flash drive. The flash drive includes a casing, a plurality of flash memory devices within the casing, each of the flash memory devices having multilevel cells, an IEEE 1394 interface controller within the casing, coupled to the... Agent: Hartman & Hartman, P.c.

20080222347 - Method and apparatus for protecting flash memory: A method is provided for protecting flash memory residing on a computing device. The method includes: receiving a data file having a digital signature at a main processor; forwarding the data file from the main processor to a secondary processor for signature validation; validating the digital signature associated with the... Agent: Harness, Dickey & Pierce, P.L.C

20080222351 - High-speed optical connection between central processing unit and remotely located random access memory: A data transmission assembly includes a first connection terminal coupled to a processing unit and a second connection terminal coupled to a random access memory (RAM) resource. The data transmission assembly also includes a first electrical/optical (EO) signal converter and a second EO signal converter. The first EO signal converter... Agent: Townsend And Townsend And Crew, LLP

20080222352 - Method, system and program product for equitable sharing of a cam table in a network switch in an on-demand environment: A method, system and program product for equitable sharing of a CAM (Content Addressable Memory) table among multiple users of a switch. The method includes reserving buffers in the table to be shared, the remaining buffers being allocated to each user. The method further includes establishing whether or not an... Agent: Silvy Anna Murphy

20080222353 - Method of converting a hybrid hard disk drive to a normal hdd: A method of converting a hybrid hard disk drive (HDD) to a normal HDD when a system is powered on depending on whether the total number of defective blocks in a non-volatile cache (NVC) exceeds a predetermined threshold. The method of converting a hard disk drive (HDD) from a hybrid... Agent: Volentine & Whitt Pllc

20080222356 - Connecting device of storage device and computer system including the same connecting device: In an environment in which plural external storage devices having different function control interfaces are intermixed, when a function of a storage device is controlled from a computer, a common interface for controlling the function of the storage device is provided. A device that provides the common interface manages an... Agent: Mattingly, Stanger, Malur & Brundidge, P.c.

20080222355 - Method for managing volume groups considering storage tiers: A tiered storage system according to the present invention provides for the management of migration groups. When a migration group is defined, a reference tier position is determined and the relative tier position of each constituent logical device is determined. Movement of a migration group involves migrating data in its... Agent: Townsend And Townsend And Crew, LLP

20080222354 - Method of creating a multiple of virtual sata ports in a disk array controller: This invention discloses a method of creating a multiple of virtual SATA ports in a disk array controller, and the method builds a port multiplier in a SATA disk array controller by a software method, and the port multiplier defines several slices capable of identifying the address of a computer... Agent: Bacon & Thomas, Pllc

20080222357 - Low power computer with main and auxiliary processors: A processing device comprises a processor, low power nonvolatile memory that communicates with the processor, high power nonvolatile memory that communicates with the processor. The processing device manages data using a cache hierarchy comprising a high power (HP) nonvolatile memory level for data in the high power nonvolatile memory and... Agent: Harness, Dickey & Pierce P.L.C

20080222358 - Method and system for providing an improved store-in cache: A system and method of providing a cache system having a store-in policy and affording the advantages of store-in cache operation, while simultaneously providing protection against soft-errors in locally modified data, which would normally preclude the use of a store-in cache when reliability is paramount. The improved store-in cache mechanism... Agent: Mcginn Intellectual Property Law Group, Pllc

20080222359 - Storage system and data management method: The present invention comprises a CHA 110 which transmits/receives data to/from an external device, a DKA 140 which transmits/receives data to/from an HDD unit 200, a primary cache unit 120 which has a primary cache memory 124, a secondary cache unit 130 which is installed between the primary cache unit... Agent: Sughrue Mion, Pllc

20080222360 - Multi-port integrated cache: A multi-port instruction/data integrated cache which is provided between a parallel processor and a main memory and stores therein a part of instructions and data stored in the main memory has a plurality of banks, and a plurality of ports including an instruction port unit consisting of at least one... Agent: Christensen, O'connor, Johnson, Kindness, Pllc

20080222361 - Pipelined tag and information array access with speculative retrieval of tag that corresponds to information access: A cache design is described in which corresponding accesses to tag and information arrays are phased in time, and in which tags are retrieved (typically speculatively) from a tag array without benefit of an effective address calculation subsequently used for a corresponding retrieval from an information array. In some exploitations,... Agent: Zagorin O'brien Graham LLP (115)

20080222362 - Method and apparatus for execution of a process: Techniques are provided for enabling execution of a process employing a cache Method steps can include obtaining a first probability of accessing a given artifact in a state Si, obtaining a second probability of using a predicate from a current state Sc in the state Si, determining a benefit of... Agent: Ryan, Mason & Lewis, LLP

20080222363 - Systems and methods of maintaining freshness of a cached object based on demand and expiration time: A device that implements a method for performing integrated caching in a data communication network. The device is configured to receive a packet from a client over the data communication network, wherein the packet includes a request for an object. At the operating system/kernel level of the device, one or... Agent: Choate, Hall & Stewart LLP

20080222364 - Snoop filtering system in a multiprocessor system: A system and method for supporting cache coherency in a computing environment having multiple processing units, each unit having an associated cache memory system operatively coupled therewith. The system includes a plurality of interconnected snoop filter units, each snoop filter unit corresponding to and in communication with a respective processing... Agent: Scully, Scott, Murphy & Presser, P.c.

20080222365 - Managed memory system: A managed memory system is provided. More specifically, in one embodiment, there is provided a system including a memory device and a switch coupled to the memory device. The switch has at least a first switch position and a second switch position. The system also includes a memory controller coupled... Agent: Fish & Richardson P.c.

20080222366 - Memory sharing system: A memory-use-information memory area stores therein a program ID, a request-source memory address, a request memory size which configure information for uniquely identifying a program file loaded into a storage area for virtual machine-A or storage area for virtual machine-B in association with a physical memory address. A memory reservation... Agent: Jackson Chen Nec Corporation Of America

20080222367 - Branching memory-bus module with multiple downlink ports to standard fully-buffered memory modules: A branching memory-bus module has one uplink port and two or more downlink ports. Frames sent downstream by a host processor are received on the uplink port and repeated to the multiple downlink ports to two or more branches of memory modules. Frames sent upstream to the processor by a... Agent: Stuart T Auvinen

20080222368 - Updating memory contents of a processing device: A method of updating memory content stored in a memory of a processing device, the memory comprising a plurality of addressable memory blocks, the memory content being protected by a current integrity protection data item stored in the processing device, the method comprising determining a first subset of memory blocks... Agent: Ericsson Inc.

20080222369 - Access control partitioned blocks in shared memory: A method for controlling multiple access to partitioned areas of a shared memory and a digital processing apparatus having the shared memory are disclosed. According to embodiments of the present invention, the storage area of a shared memory is partitioned to a plurality of storage areas, and each processor accesses... Agent: Husch Blackwell Sanders LLP

20080222370 - Method and apparatus for data stream management: A method and apparatus of managing data stream, the method comprising archiving received data in a circular buffer; utilizing a breakpoint in realizing the archived received data continuity, wherein the breakpoint is set to the last data portion of the archived received data; when the archiving of the received data... Agent: Texas Instruments Incorporated

20080222371 - Method for managing memory access and task distribution on a multi-processor storage device: In a system for reading and writing data, the system including a controller, multiple microprocessor units accessible to the controller, and multiple memory device configurations, each having one dedicated bus connection to individual ones or multiples of the microprocessor units, a method for managing access to one or more of... Agent: Central Coast Patent Agency, Inc

20080222372 - Turbo decoder: A turbo decoder has at least two Bahl, Cocke, Jelinek, and Raviv (BCJR) processors in parallel, each in serial communication with respective interleavers. The BCJR processors and interleavers are in communication with a memory module that is internally split into non-overlapping memory banks. The turbo decoder includes respective sorter circuits... Agent: Brinks Hofer Gilson & Lione/marvell

20080222373 - Retaining disk identification in operating system environment after a hardware-driven snapshot restore from a snapshot-lun created using software-driven snapshot architecture: A program, method and system are disclosed for managing a snapshot backup restore through a hardware snapshot interface, i.e. a hardware-driven snapshot restore, based upon a software-driven snapshot backup, e.g. created with software such as volume shadow copy service (VSS). When conventional hardware-driven snapshot restores are performed using a snapshot... Agent: Canady & Lortz LLP- Ibm

20080222377 - Achieving data consistency with point-in-time copy operations in a parallel i/o environment: A method for processing a point-in-time copy of data associated with a logical storage volume where the data to be copied is stored in a striped or parallelized fashion across more than one physical source volume. The method includes receiving a point-in-time copy command concerning a logical volume and distributing... Agent: Law Office Of Dan Shifrin, Pc - Ibm

20080222374 - Computer system, management computer, storage system and volume management method: To provide a computer system in which the primary site administrator for managing all the sites can make the configuration of the authority to be granted beforehand for the administrator of each site to fill in for a part of its own authority, even during the absence such as at... Agent: Stanley P. Fisher Reed Smith LLP

20080222375 - Method and system for the transparent migration of virtual machines storage: Method for transferring storage data of a virtual machine to be migrated from a first host device to a second host device via a communication network, including: running the virtual machine on the first host device; storing, on a local storage device of the first host device, a disk image... Agent: Darby & Darby P.c.

20080222376 - Virtual incremental storage apparatus method and system: An apparatus for managing incremental storage includes a storage pool management module that allocates storage volumes to a virtual volume. Also included is an incremental log corresponding to the virtual volume, which maps virtual addresses to storage addresses. The apparatus may also include a replication module that sends replicated data... Agent: Brian C. Kunzler

20080222378 - Memory module and memory module system: A memory module and a memory module system are provided. The memory module system includes a plurality of memory modules each module comprising a plurality of memory blocks and a plurality of corresponding routers each storing a channel identification (ID) and a module ID corresponding to one or more memory... Agent: F. Chau & Associates, Llc

20080222379 - System and method for memory hub-based expansion bus: A system memory includes a memory hub controller, a memory module accessible by the memory hub controller, and an expansion module having a processor circuit coupled to the memory module and also having access to the memory module. The memory hub controller is coupled to the memory hub through a... Agent: Andy M. Han, Esq. Dorsey & Whitney LLP

20080222381 - Storage optimization method: In a system and method for examining the configuration of a storage area network using a browser application, linking to the storage area network using a browser application, obtaining data from a device on the storage area network, parsing the data into records, eliminating redundancies in the records, storing the... Agent: Sonnenschein Nath & Rosenthal LLP

20080222380 - System and method for dynamic memory allocation: A method for managing the allocation of memory to one or more applications. The method includes allocating a variety of fixed size memory blocks to a requesting application, each of the fixed size memory blocks being free of header information to maximize memory usage. Free, or unused blocks of data... Agent: Borden Ladner Gervais LLP Anne Kinsman

20080222382 - Performance monitoring device and method thereof: A performance monitoring device and method are disclosed. The device monitors performance events of a processor. A counter is adjusted in response to the occurrence of a particular performance event. The counter can be associated with a particular instruction address range, or a data address range, so that the counter... Agent: Larson Newman Abel Polansky & White, LLP

20080222384 - Apparatus and method for executing rapid memory management unit emulation and full-system simulator: A method for performing rapid memory management unit emulation of a computer program in a computer system, wherein address injection space of predefined size is allocated in the computer system and a virtual page number and a corresponding physical page number are stored in said address injection space, said method... Agent: Law Office Of Ido Tuchman (yor)

20080222383 - Efficient on-chip accelerator interfaces to reduce software overhead: In one embodiment, a processor comprises execution circuitry and a translation lookaside buffer (TLB) coupled to the execution circuitry. The execution circuitry is configured to execute a store instruction having a data operand; and the execution circuitry is configured to generate a virtual address as part of executing the store... Agent: Mhkkg/sun

20080222385 - Parameter setting method and apparatus for network controller: A method for setting at least one of parameters of a peripheral device coupled to a host includes: executing a program code stored in a first storage unit of a host to obtain setting data corresponding to the at least one of the parameters; storing the setting data into a... Agent: North America Intellectual Property Corporation

20080222386 - Compression of ipv6 addresses in a netflow directory: Modified flow keys holding compressed IPv6 addresses are stored in a flow table to improve memory utilization. The compressed IPv6 addresses are utilized to access a compression table holding the full IPv6 address, and full IPv6 address are substituted into the modified flow key to form an unmodified flow key.... Agent: Law Office Of Charles E. Krueger

20080222387 - Correction of incorrect cache accesses: The application describes a data processor operable to process data, and comprising: a cache in which a storage location of a data item within said cache is identified by an address, said cache comprising a plurality of storage locations and said data processor comprising a cache directory operable to store... Agent: Nixon & Vanderhye, Pc

20080215793 - Method and apparatus for management between virtualized machines and virtualized storage systems: To manage physical paths between a server system and a storage system and information about routing between virtual machines and virtual storage systems in an integrated fashion. A computer system of the present invention includes: a computer and a storage system that stores data, in which the computer includes first... Agent: Townsend And Townsend And Crew, LLP

20080215797 - Method for storing data in a memory in a distributed automation system and method for coupling and automation component to a distributed automation system: Dynamic access is provided to automation resources, where, in a distributed automation system having a plurality of automation components, a first automation component searching for an automation resource sends a request to the automation system and, for this request, receives a response regarding availability of suitable automation resources from all... Agent: Staas & Halsey LLP

20080215794 - Storage terminal and information processing system: A storage terminal includes an information storage unit, an association storage unit, a receiving unit, and a processing unit. The information storage unit includes a plurality of storage areas having individually different identifiers assigned thereto. The association storage unit stores the identifiers individually in association with different communication addresses on... Agent: Oliff & Berridge, PLC

20080215795 - Storage terminal, information processing apparatus, and information processing system: A storage terminal includes a storage unit, a communication unit, and a controlling unit. The storage unit stores first information and second information. The first information is information that is displayed according to a procedure defined in an Internet browser program. The second information is information that is output according... Agent: Oliff & Berridge, PLC

20080215796 - Virtual appliance management: Various approaches for virtual appliance management are described. In one approach a virtual appliance repository stores one or more virtual appliances and is coupled to the host computer via a network. A storage device stores a transceiver program capable when executed on said host computer of requesting and receiving the... Agent: Crawford Maunu PLLC

20080215799 - Control chip of adapter interconnecting pc and flash memory medium and method of enabling the control chip to program the flash memory medium to be accessible by the pc: In one embodiment an apparatus interconnecting a PC and a flash memory device is provided and includes a control chip including a RAM, a ROM, and a processor. The control chip is adapted to program the flash memory device as a main firmware stored with compatible configuration codes, an auxiliary... Agent: Sam Chen

20080215802 - High integration of intelligent non-volatile memory device: High integration of a non-volatile memory device (NVMD) is disclosed. According to one aspect of the present invention, a non-volatile memory device comprises an intelligent non-volatile memory (NVM) controller and an intelligent non-volatile memory module. The NVM controller includes a central processing unit (CPU) configured to handle data transfer operations... Agent: Roger H. Chu

20080215800 - Hybrid ssd using a combination of slc and mlc flash memory arrays: Hybrid solid state drives (SSD) using a combination of single-level cell (SLC) and multi-level cell (MLC) flash memory arrays are described. According to one aspect of the present invention, a hybrid SSD is built using a combination SLC and MLC flash memory arrays. The SSD also includes a micro-controller to... Agent: Roger H. Chu

20080215801 - Portable data storage using slc and mlc flash memory: A portable data storage device is disclosed that includes an interface (3) for enabling the portable data storage device to be used for data transfer with a host computer (5), and an interface controller (2) for controlling the interface (3). There is also a master controller (7) for controlling the... Agent: Birch Stewart Kolasch & Birch

20080215798 - Randomizing for suppressing errors in a flash memory: Original data to be stored in a nonvolatile memory are first randomized while preserving the size of the original data, In response for a request for the original data, the randomized data are retrieved, derandomized and exported without authenticating the requesting entity. ECC encoding is applied either before or after... Agent: Mark M. Friedman

20080215803 - Semiconductor storage device and method of controlling the same: A semiconductor storage device includes a first nonvolatile memory to store user data of a file, a second nonvolatile memory to store management data of the file, the second nonvolatile memory being different in type from the first nonvolatile memory, and a controller to control read/write of data with respect... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080215804 - Structure for register renaming in a microprocessor: A design structure embodied in a machine readable storage medium for at least one of designing, manufacturing, and testing a design for register renaming allows processor hardware to use a larger set of registers than the architected registers visible to the compiler. This larger set of registers is called the... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20080215805 - Digital data buffer: A data buffer with a mechanism to optimize the setup/hold timing at the second flip-flop (or data register) so as to reduce the propagation delay time. The data buffer has a data path with a data input for receiving a digital data input signal, a clock input for receiving a... Agent: Texas Instruments Incorporated

20080215806 - Access control management: In one embodiment, a cartridge library comprises a library controller comprising a first processor module and a memory medium communicatively connected to the processor module, and a cartridge drive controller comprising a second processor module and a memory medium communicatively connected to the processor module. The cartridge drive controller comprises... Agent: Hewlett Packard Company

20080215808 - Raid controller using capacitor energy source to flush volatile cache data to non-volatile memory during main power outage: A write-caching RAID controller includes a CPU that manages transfers of posted-write data from host computers to a volatile memory and transfers of the posted-write data from the volatile memory to a redundant array of storage devices when a main power source is supplying power to the RAID controller. A... Agent: Huffman Law Group, P.C.

20080215807 - Video data system: A video data system is presented including buffering video data for a display device, preserving the video data in a non-volatile video random access memory during shutdown of the display device, and restoring the video data to the display device on power-up of the display device.... Agent: Law Offices Of Mikio Ishimaru

20080215809 - Disk drive diagnosis apparatus: According to an aspect of an embodiment, a disk drive diagnosis apparatus is included in a RAID system in which a RAID control unit and a drive enclosure that encloses a disk drive are interconnected via a fabric switch. The apparatus comprises a virtual login processing unit configured to virtually... Agent: Staas & Halsey LLP

20080215811 - Multiple sourcing storage devices for ultra reliable mirrored storage subsystems: One aspect of the invention is a method for configuring an array of storage devices to reduce the probability of data loss due to clustered storage device failures in the array. An example of this method includes identifying all storage devices in a primary set of storage devices and a... Agent: Timothy N. Ellis, Patent Attorney

20080215810 - Raid control apparatus and control method therefor: A RAID control apparatus and control method. The RAID control apparatus includes disk devices and disk control devices including a cache memory that stores cache data of a logical unit, and control unit, upon the logical units present in different disk devices being concatenated to each other, switching in-charge disk... Agent: Staas & Halsey LLP

20080215813 - Storage system and storage management system: A storage system whereby all managers of the storage system can easily collect the history data of the manager of each partition. The storage system is designed such that the memory resources within the system are managed by a system manager while partitions of the memory resources are managed by... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080215812 - Storage system having dynamic volume allocation function: Access to a plurality of logical devices is enabled regardless of the number of ports provided in a storage system and the number of logical devices that can be allocated to a single port, thereby improving the usability of the logical devices. A storage system comprises a plurality of logical... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080215814 - Image forming apparatus: An image forming apparatus in which the consumption article can be attached to and detached from a main body has a controller, which reads first new/old information that is stored in a repetitively rewritable area of a memory provided on the consumption article and represents whether or not the consumption... Agent: Morrison & Foerster LLP

20080215816 - Apparatus and method for filtering unused sub-blocks in cache memories: A memory system and method includes a cache having a filtered portion and an unfiltered portion. The unfiltered portion is divided into block sized components, and the filtered portion is divided into sub-block sized components. Blocks evicted from the unfiltered portion have selected sub-blocks thereof cached in the filtered portion... Agent: Keusey, Tutunjian & Bitetto, P.C.

20080215815 - System and method of improving task switching and page translation performance utilizing a multilevel translation lookaside buffer: A system and method of improved task switching in a data processing system. First, a first-level cache memory casts out an invalidated page table entry and an associated first page directory base address to a second-level cache memory. Then, the second-level cache memory determines if a task switch has occurred.... Agent: Dillon & Yudell LLP

20080215817 - Memory management system and image processing apparatus: A memory management system includes a plurality of processors, a shared memory that can be accessed from the plurality of processors, cache memories provided between each processor of the plurality of processors and the shared memory and invalidation or write back of a specified region can be commanded from a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080215818 - Structure for silent invalid state transition handling in an smp environment: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design can be provided. The design structure includes a symmetric multiprocessing (SMP) system. The system includes a plurality of nodes. Each of the nodes includes a node controller and a plurality of processors cross-coupled... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20080215820 - Method and apparatus for filtering memory write snoop activity in a distributed shared memory computer: A method and apparatus for filtering memory probe activity for writes in a distributed shared memory computer. In one embodiment, the method may include assigning an uncached directory state to a cache data block in response to evicting the cache data block. In another embodiment, the method may include assigning... Agent: B. Noel Kivlin Meyertons, Hood, Kivlin, Kowert & Goetzel, P.c

20080215819 - Method, apparatus, and computer program product for a cache coherency protocol state that predicts locations of shared memory blocks: Memory read requests to read data in a cache line that is not currently in the shared invalid state are broadcast first to remote nodes. Memory read requests to read data in a cache line that is currently in the shared invalid state are broadcast first to a local node,... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20080215821 - Data processing system and method for efficient communication utilizing an in coherency state: A cache coherent data processing system includes at least first and second coherency domains each including at least one processing unit. The first coherency domain includes a first cache memory, and the second coherency domain includes a coherent second cache memory. The first cache memory within the first coherency domain... Agent: Dillon & Yudell LLP

20080215824 - Cache memory, processing unit, data processing system and method for filtering snooped operations: A cache coherent data processing system includes at least a first cache memory supporting a first processing unit and a second cache memory supporting a second processing unit. The first cache memory includes a cache array and a cache directory of contents of the cache array. In response to the... Agent: Dillon & Yudell LLP

20080215823 - Data consistency control system and data consistency control method: In a data consistency control system, a plurality of cache agents and at least one home agent are connected to one another by a plurality of networks. The home agent includes a unit issuing a snoop request when receiving an access request. Each of the cache agents includes a unit... Agent: Nec Corporation Of America

20080215822 - Pci express enhancements and extensions: A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are... Agent: Intel Corporation C/o Intellevate, LLC

20080215825 - Memory share by a plurality of processors: A method and an apparatus for having a memory shared by a plurality of processors are disclosed. The digital processing apparatus in accordance with an embodiment of the present invention comprises a memory, a main processor connected to one side of the memory through a first memory bus, and application... Agent: Husch Blackwell Sanders LLP

20080215826 - Deterministic memory management in a computing environment: Systems and methods for memory management in a computing environment are provided. The method comprises uniquely identifying a first object associated with a first task for an application executed in a computing environment, wherein a first area of memory is allocated to the first object; determining a first execution scope... Agent: CenturyIPGroup, Inc. [ibm Us]

20080215827 - Selecting storage clusters to use to access storage: Provided are a method, system and program for selecting storage clusters to use to access storage. Input/Output (I/O) requests are transferred to a first storage cluster over a network to access storage. The storage may be additionally accessed via a second storage cluster over the network and both the first... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080215828 - System for reading and writing data: A system for writing and reading data includes a controller accessible to at least one or more computing systems, a plurality of microprocessor units accessible to the controller, and a plurality of memory device configurations each having one dedicated bus connection to individual ones or multiples of the microprocessor units.... Agent: Central Coast Patent Agency, Inc

20080215829 - Optical disc recorder and buffer management method thereof: A buffer management method is provided. A host issues a read command requesting access for a read data block and a write command requesting recording of a write data block. A write buffer is dedicated to store the write data block. A read buffer is dedicated to store the read... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080215830 - Employing a data structure of readily accessible units of memory to facilitate memory access: A data structure of readily accessible units of memory is provided. The data structure includes designations of one or more units of memory that while represented in the data structure do not need expensive address translation, other tests or special handling in order to access the units of memory. By... Agent: Heslin Rothenberg Farley & Mesiti P.C.

20080215831 - Interleaver with linear feedback shift register: An interleaver has an input multiplexer that receives a data sequence at an interleaver input and that separates the data sequence into multiple data sub-blocks. The interleaver has a linear feedback shift register that generates an input address sequence. The interleaver has adder circuits that generate output address sequences associated... Agent: Seagate Technology LLC C/o Westman Champlin & Kelly, P.A.

20080215832 - Data bus bandwidth scheduling in an fbdimm memory system operating in variable latency mode: A method and system for scheduling the servicing of data requests, using the variable latency mode, in an FBDIMM memory sub-system. A scheduling algorithm pre-computes return time data for data connected to all DRAM buffer chips and stores the return time data in a table. The return time data is... Agent: Dillon & Yudell LLP

20080215833 - Information storage device and stored data processing method: An information storage device includes one or more semiconductor memories storing management data accompanying content data and being configured to erase data in units of one block, and a controller setting up, in the one or more semiconductor memories, a working area to temporarily store the management data and a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080215834 - Fast block device and methodology: A device, method and system is directed to fast data storage on a block storage device. New data is written to an empty write block. A location of the new data is tracked. Meta data associated with the new data is written. A lookup table may be updated based in... Agent: Winston & Strawn LLP Patent Department

20080215836 - Method of managing time-based differential snapshot: Provided is a method of managing differential snapshots in a storage system, the storage system having a disk drive and a disk controller, the differential snapshot management method including the steps of: providing a storage area of the disk drive as a plurality of logical volumes including an operational volume... Agent: Stanley P. Fisher Reed Smith LLP

20080215838 - Providing storage control in a network of storage controllers: An apparatus for providing storage control in a network of storage controllers is disclosed. The apparatus includes an owner storage controller; an I/O performing component, an ownership assignment component, a lock manager and a messaging component. The ownership assignment component assigns ownership of metadata for data to an owner storage... Agent: Dillon & Yudell, LLP

20080215839 - Providing storage control in a network of storage controllers: An apparatus for providing storage control in a network of storage controllers is disclosed. The apparatus includes an owner storage controller; an I/O performing component, an ownership assignment component, a lock manager and a messaging component. The ownership assignment component assigns ownership of metadata for data to an owner storage... Agent: Dillon & Yudell, LLP

20080215835 - Storage system and data processing system: A storage system comprises a data set storage region for storing a data set containing data and update information for managing this data, and a control section. The data set storage region is divided into a plurality of storage regions including a first storage region and a second storage region.... Agent: Townsend And Townsend And Crew, LLP

20080215837 - Storage system with multiple copy targeting and disk failure protection: An apparatus is disclosed in which a storage controller cooperable with a host and a plurality of controlled storage is provided to localize an impact of a failure to a target disk in an affected segment. The storage controller includes a host write component to write a data object to... Agent: Lieberman & Brandsdorfer, LLC

20080215840 - Electronic file system, operating device, approval device, and computer program: An electronic file system includes an operating device for receiving an input for performance of an operation on an electronic file and an approval device used for approving of the operation on the electronic file. The electronic file includes an operation file on which an operation is to be performed... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080215841 - Memory lock system: A memory lock system (900) is provided that includes: providing a controller (212); providing a connector (204) connected to the controller (212) for providing data to the controller (212); providing a memory (216) connected to the controller (212) for receiving and storing information from the controller (212); and manipulating an... Agent: Law Offices Of Mikio Ishimaru

20080215842 - Distance-preserving anonymization of data: An embodiment includes a system with a processing unit and a communication unit. The processing unit is configured: to compute a first reference point of a data point that represents a private data item and has a first distance value to the data point, wherein the first distance value is... Agent: Schwegman, Lundberg & Woessner/sap

20080215844 - Automatic maintenance of configuration information in a replaceable electronic module: The present invention provides methods and systems to automatically manage hardware and software capabilities of replaceable electronic modules as the modules are replaced or reassigned to different tasks. Each such module stores configuration information in a persistent memory. This configuration information enables the module to use only selected hardware and... Agent: Hewlett Packard Company

20080215845 - Methods, systems, and media for managing dynamic storage: Methods, systems, and media for managing dynamic memory are disclosed. Embodiments may disclose identifying nodes with having memory for dynamic storage, and reserving a portion of the memory from the identified nodes for a heap pool. After generating a heap pool, embodiments may allocate dynamic storage from the heap pool... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20080215843 - Storage area management method for a storage system: The load of managing a storage system is lessened. In a storage system where multiple logical volumes are included in a logical volume group and a copy of the logical volume group is made in a pool area different from the one to which the logical volume group belongs, a... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080215846 - Method and apparatus for managing central processing unit resources of a logically partitioned computing environment without shared memory access: A method and apparatus for managing CPU resources of a logically partitioned computing environment without shared memory access. A logical partition needing additional resources sends a message requesting such resources to a central domain manager, which sends messages to other partitions in the same group requesting that they assess their... Agent: International Business Machines Corporation

20080215847 - Secure yet flexible system architecture for secure devices with flash mass storage memory: A device with mass storage capability that uses a readily available non secure memory for the mass storage but has firmware (and hardware) that provides security against unauthorized copying of data. This is true even though the firmware itself is stored in the non secure mass storage memory, and therefore... Agent: Brinks Hofer Gilson & Lione/sandisk

20080215848 - Method and system for caching address translations from multiple address spaces in virtual machines: A method of virtualizing memory through shadow page tables that cache translations from multiple guest address spaces in a virtual machine includes a software version of a hardware tagged translation look-aside buffer. Edits to guest page tables are detected by intercepting the creation of guest-writable mappings to guest page tables... Agent: Woodcock Washburn LLP

20080215849 - Hash table operations with improved cache utilization: Method and apparatus for building large memory-resident hash tables on general purpose processors. The hash table is broken into bands that are small enough to fit within the processor cache. A log is associated with each band and updates to the hash table are written to the appropriate memory-resident log... Agent: Goodwin Procter LLP Patent Administrator