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USPTO Class 711 | Browse by Industry: Previous - Next | All 08/2008 | Recent | 09: Oct | Sept | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 08: Dec | Nov | Oct | Sp | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 07: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 06: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Electrical computers and digital processing systems: memory inventions 08/08Recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.Listing format for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 08/28/2008 > patent applications in patent subcategories. 20080209104 - Data migration method: A first storage system includes a first storage area for storing data written by a computer. A second storage system includes a second storage area to which the data stored in the first storage area migrates. A third storage system includes a virtual storage area corresponding to the second storage... Agent: Townsend And Townsend And Crew, LLP 20080209102 - Device, method, and computer product for monitoring cache-way downgrade: A usage-rate measuring unit measures a CPU usage rate. A hit-count measuring unit measures a cache hit count indicating number of hits of a cache. A monitoring unit monitors the CPU usage rate and the cache hit count, and when a downgrade of the cache occurs, determines whether the CPU... Agent: Staas & Halsey LLP 20080209100 - Hard disk testing method under extensible firmware interface: A hard disk testing method under an extensible firmware interface (EFI) is provided, which includes the following steps. A system file is backed up from the EFI of the hard disk into a storage area of a memory. The backup area of the system file is mapped as a real... Agent: Birch Stewart Kolasch & Birch 20080209101 - Storage device control apparatus and control method for the storage device control apparatus: A storage device control apparatus includes a mounting part and an internal connection part. The mounting part can removably mount channel control unit, each with a host interface controller formed therein for receiving data I/O requests, disk control units, each with a disk interface controller formed therein for performing I/O... Agent: Mattingly, Stanger, Malur & Brundidge, P.c. 20080209103 - Storage device control apparatus, storage device, and data storage control method: A storage device stores data therein corresponding to commands from a host computer and includes a buffer memory temporarily storing the data received from the host computer. A data storage control method for the storage device according to the present invention, sequentially writes the data already temporarily stored in the... Agent: Greer, Burns & Crain 20080209105 - Memory controller, control method for accessing semiconductor memory and system: A memory controller sequentially holds access requests including access addresses. A semiconductor memory includes a plurality of banks each having a plurality of pages. The memory controller decides page hit/page miss of the bank corresponding to each of the held access addresses. Further, the memory controller outputs an all-banks precharge... Agent: Arent Fox LLP 20080209110 - Apparatus and method of page program operation for memory devices with mirror back-up of data: An apparatus and method of page program operation is provided. When performing a page program operation with a selected memory device, a memory controller loads the data into the page buffer of one selected memory device and also into the page buffer of another selected memory device in order to... Agent: Mosaid Technologies Incorporated 20080209107 - Apparatus, method, and system of nand defect management: Various embodiments comprise apparatus, methods, and systems that include an apparatus comprising a memory device configurable as a plurality of erase block groups including a base erase block group, wherein each of the plurality of erase block groups comprises a plurality of erase blocks each identified by a matching unique... Agent: Schwegman, Lundberg & Woessner, P.a. 20080209112 - High endurance non-volatile memory devices: High endurance non-volatile memory devices (NVMD) are described. A high endurance NVMD includes an I/O interface, a NVM controller, a CPU along with a volatile memory subsystem and at least one non-volatile memory (NVM) module. The volatile memory cache subsystem is configured as a data cache subsystem. The at least... Agent: Roger H. Chu 20080209109 - Interruptible cache flushing in flash memory systems: Cache flushing is effected for a flash memory by copying, to a block of the memory, first and second portions of cached data, and servicing a host access in-between copying the first portion and the second portion. Either both portions are selected before the copying, or erasing the block is... Agent: Mark M. Friedman 20080209106 - Memory access: A memory access system including a memory in which data is organized in pages, each page holding a sequence of data elements; means for receiving a requested address including a requested page address and a requested data element address; logic for accessing a current page from the memory using a... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.c. 20080209113 - Method for increasing storage capacity of a memory device: A method for increasing memory storage capacity in a memory device having at least two storage cells wherein at least one measurable physical property is associated with each of the storage cells a nominal value of which may be used to assign a data value to the respective storage cell.... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw 20080209116 - Multi-processor flash memory storage device and management system: A data storage device has a host controller interface, a plurality of microprocessor units each having a portion of random access memory (RAM) dedicated thereto, a plurality of Flash device configurations each having dedicated bus connections to individual ones or multiples of the microprocessor units, and a dataflow controller accessible... Agent: Central Coast Patent Agency, Inc 20080209111 - Over-sampling read operation for a flash memory device: A flash memory device and a reading method are provided where memory cells are divided into at least two groups. Memory cells are selected according to a threshold voltage distribution. Data stored in the selected memory cells are detected and the data is latched corresponding to one of the at... Agent: Volentine & Whitt Pllc 20080209114 - Reliability high endurance non-volatile memory device with zone-based non-volatile memory file system: Improved reliability high endurance non-volatile memory device with zone-based non-volatile memory file system is described. According to one aspect of the present invention, a zone-based non-volatile memory file system comprises a two-level address mapping scheme: a first level address mapping scheme maps linear or logic address received from a host... Agent: Roger H. Chu 20080209115 - Semiconductor memory card access apparatus, a computer-readable recording medium, an initialization method, and a semiconductor memory card: A predetermined number of erasable blocks positioned at a start of a volume area in a semiconductor memory card are provided so as to include volume management information. A user area following the volume management information includes a plurality of clusters. A data length NOM of an area from a... Agent: Wenderoth, Lind & Ponack L.l.p. 20080209108 - System and method of page buffer operation for memory devices: Systems and methods are provided for using page buffers of memory devices connected to a memory controller through a common bus. A page buffer of a memory device is used as a temporary cache for data which is written to the memory cells of the memory device. This can allow... Agent: Smart & Biggar P.o. Box 2999, Station D 20080209117 - Nonvolatile ram: A nonvolatile RAM allows a read/write operation to be performed in a random manner with respect to a memory area, which is divided into a plurality of memory arrays each including a plurality of memory cells. Upon detection of an initialization signal, initialization is performed on at least one memory... Agent: Mcginn Intellectual Property Law Group, Pllc 20080209118 - Magnetic random access memory and manufacturing method thereof: A magnetic random access memory includes a semiconductor substrate in which a step portion having a side surface and a top face is formed, a gate electrode formed on the side surface of the step portion through a gate insulating film, a drain diffusion layer formed in the top face... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c. 20080209119 - Methods and systems for generating error correction codes: Methods and systems for generating ECC encode a data block to generate corresponding error correction codes. A first buffer sequentially stores a first section and a second section of the data block, wherein each of the first and second sections is composed of X data rows and Y data columns... Agent: North America Intellectual Property Corporation 20080209120 - Accelerating cache performance by active cache validation: Described is a technology by which a web proxy server evaluates its cached objects, and when an object is invalid, performs a freshness check on that object, independent of any client requests. As a result, the cache contains objects that have a greater likelihood of being fresh when requested by... Agent: Microsoft Corporation 20080209121 - Serial content addressable memory: A technique is presented for implementing a content addressable memory (CAM) function using traditional memory, where the input data is serially loaded into a serial CAM. Various additions, which allow for predicting the result of a serial CAM access coincident with the completion of serially inputting the data are also... Agent: Connolly Bove Lodge & Hutz LLP 20080209122 - Method of automatically adjusting size of copy-on-write disk space of snapshot device: A method of automatically adjusting a size of a copy-on-write (COW) disk space of a snapshot device is provided. A first disk space of a snapshot device is initialized, and a COW operation is performed on a chunk of the first disk space. Next, it is determined whether a chunk... Agent: Birch Stewart Kolasch & Birch 20080209123 - Storage control system and method: A first storage control system comprises a CHN connected to a LAN CN. The CHN comprises a NAS processor and I/O processor. The I/O processor judges whether all or a portion of block level data is to be stored in either a first storage control system or a second storage... Agent: Mattingly, Stanger, Malur & Brundidge, P.c. 20080209124 - System, method and apparatus to aggregate heterogeneous raid sets: A method according to one embodiment may include partitioning a plurality of core processors into a main partition comprising at least one processor core capable of executing an operating system and an embedded partition comprising at least one different processor core. The main partition and embedded partition may communicate with... Agent: Grossman, Tucker, Perreault & Pfleger, Pllc C/o Intellevate, Llc 20080209125 - Method for soft configuring a memory device: A method for soft configuring communication a memory device to act as a Key Card that can switch on or off some particular functions of either an application program or the memory device itself. The method comprising the steps of: connecting the memory device to an external device; running a... Agent: Troxell Law Office Pllc 20080209126 - Method for achieving very high bandwidth between the levels of a cache hierarchy in 3-dimensional structures, and a 3-dimensional structure resulting therefrom: A method of electronic computing, and more specifically, a method of design of cache hierarchies in 3-dimensional chips, and a cache hierarchy resulting therefrom, including a physical arrangement of bits in cache hierarchies implemented in 3 dimensions such that the planar wiring required in the busses connecting the levels of... Agent: Mcginn Intellectual Property Law Group, Pllc 20080209127 - System and method for efficient implementation of software-managed cache: A system and method for an efficient implementation of a software-managed cache is presented. When an application thread executes on a simple processor, the application thread uses a conditional data select instruction for eliminating a conditional branch instruction when accessing a software-managed cache. An application thread issues a conditional data... Agent: Ibm Corporation- Austin (jvl) C/o Van Leeuwen & Van Leeuwen 20080209128 - Method and apparatus for detecting a cache wrap condition: A method and apparatus for detecting a cache wrap condition in a computing environment having a processor and a cache. A cache wrap condition is detected when the entire contents of a cache have been replaced, relative to a particular starting state. A set-associative cache is considered to have wrapped... Agent: Scully, Scott, Murphy & Presser, P.c. 20080209129 - Cache with high access store bandwidth: A cache memory system and method for supporting multiple simultaneous store operations using a plurality of tag memories is provided. The cache data system further provides a plurality of multiple simultaneous cache store functions along with a single cache load function that is simultaneous with the store functions. Embodiments create... Agent: Nxp, B.v. Nxp Intellectual Property Department 20080209131 - Structures, systems and arrangements for cache management: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design is provided. The design structure generally includes a processing system. The process system generally includes a processor, cache coupled to the processor to provide at least one line of binary storage to the... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1 20080209130 - Translation data prefetch in an iommu: In an embodiment, a system memory stores a set of input/output (I/O) translation tables. One or more I/O devices initiate direct memory access (DMA) requests including virtual addresses. An I/O memory management unit (IOMMU) is coupled to the I/O devices and the system memory, wherein the IOMMU is configured to... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd) 20080209132 - Disk snapshot acquisition method: A disk snapshot acquisition method, which is applied in a server comprising a memory allocated with a kernel space and a hard disk, comprises the steps of allocating all chunks having data stored as a disk volume in said hard disk; allocating a first portion and a second portion in... Agent: Bacon & Thomas, Pllc 20080209134 - Apparatus for operating cache-inhibited memory mapped commands to access registers: In a multiprocessor environment, by executing cache-inhibited reads or writes to registers, a scan communication is used to rapidly access registers inside and outside a chip originating the command. Cumbersome locking of the memory location may be thus avoided. Setting of busy latches at the outset virtually eliminates the chance... Agent: Ibm Corp (ya) C/o Yee & Associates Pc 20080209135 - Data processing system, method and interconnect fabric supporting destination data tagging: A data processing system includes a plurality of communication links and a plurality of processing units including a local master processing unit. The local master processing unit includes interconnect logic that couples the processing unit to one or more of the plurality of communication links and an originating master coupled... Agent: Dillon & Yudell LLP 20080209133 - Managing cache coherency in a data processing apparatus: A data processing apparatus and method are provided for managing cache coherency. The data processing apparatus comprises a plurality of processing units, each having a cache associated therewith, and each cache having indication circuitry containing segment filtering data. The indication circuitry is responsive to an address portion of an address... Agent: Nixon & Vanderhye, Pc 20080209136 - System and method of storage system assisted i/o fencing for shared storage configuration: Systems and methods for improved I/O fencing for shared storage in a clustered or grid computing environment. I/O fencing is performed with aid from the storage system and an I/O fencing management client process. The client process detects changes in the operational status of any of the clustered computing nodes.... Agent: Lsi Corporation 20080209137 - Method of specifying access sequence of a storage device: The present invention is to provide a method of specifying access sequence of a storage device, wherein queues with different priority are created in the storage device for recording access requests from at least one server at the front-end of the storage device to manage the access operation, and are... Agent: Bacon & Thomas, Pllc 20080209138 - File blocking mitigation: Embodiments are described for blocking the opening of a file. Some embodiments include receiving a request to open a file. In response, a portion of the file's data is examined to determine a true file format for the file. A determination is then made as to whether the true file... Agent: Merchant & Gould Pc 20080209140 - Method for managing memories of digital computing devices: The invention relates to a method for managing memories. When carrying out a process, at least one stack (6, 7, 8, 9) is created for memory objects (10.1, 10.2, . . . 10.k). A request for a memory object (10.k) from a stack (6, 7, 8, 9) is carried out... Agent: Christensen, O'connor, Johnson, Kindness, Pllc 20080209139 - Rapid input/output doorbell coalescing to minimize cpu utilization and reduce system interrupt latency: Status/error reporting is implemented using a doorbell system. A plurality of flag registers are included on a system device, such as a serial buffer. Each flag register has a corresponding address, and stores a plurality of flags. A flag scan controller accesses the flag registers in a predetermined priority order,... Agent: Bever, Hoffman & Harms, LLP 20080209141 - Memory system and device with serialized data transfer: A memory system with serialized data transfer. The memory system includes within a memory controller and a plurality of memory devices. The memory controller receives a plurality of write data values from a host and outputs the write data values as respective serial streams of bits. Each of the memory... Agent: Deniro/rambus 20080209142 - Data recovery systems and methods: Nearline disaster recovery (“nearline DR”) storage systems and methods that permit the use of previously restored stored data from a near time period by virtual applications operating off a backup storage location during the period of disaster recovery at a primary site. This is generally referred to as a “nearline... Agent: Lewis, Rice & Fingersh, Lc Attn: Box Ip Dept. 20080209146 - Backup control method for acquiring plurality of backups in one or more secondary storage systems: A controller sets a specified time which is a time that specifies a time in the future relative to the current time for all of one or more secondary storage systems. The respective secondary storage systems have a logical volume for backup (BVOL), and set a backup preparation end state... Agent: Stanley P. Fisher Reed Smith LLP 20080209143 - Digital multi-function peripheral and control method for the same: A digital multi-function peripheral includes a multi-function peripheral unit having a plurality of functions, and a memory module detachably connected to the multi-function peripheral unit. The memory module stores a control program for backup and restore to be executed by the multi-function peripheral unit in a state where the memory... Agent: Amin, Turocy & Calvin, LLP 20080209148 - High performance storage access environment: The present invention provides improved techniques for managing storage resources, such as disk drives, I/O ports, and the like in a network based storage system according to a user position within the network. Embodiments according to the present invention can provide a relatively high performance storage access environment for the... Agent: Sughrue Mion, Pllc 20080209144 - Storage system, a method of file data back up and a method of copying of file data: A storage system manages the total capacity of a shared storage medium to store block-basis data and file-basis data. When block data and its address are input through a fiber channel port, an input/output unit converts its data format to a data format that is internally applied by the storage... Agent: Mattingly, Stanger, Malur & Brundidge, P.c. 20080209147 - Systems and methods for sharing media in a computer network: A computerized method for sharing removable storage media in a network, the method comprising associating, in an index entry, a first piece of removable storage media in a first storage device with at least a first storage policy copy and a second storage policy copy; copying, to the first piece... Agent: Knobbe Martens Olson & Bear LLP 20080209145 - Techniques for asynchronous data replication: Techniques for asynchronous data replication are presented. A bitmap records changes to selective blocks of data on a source between replication periods. During a replication, the bitmap is copied and used to acquire changed blocks from the source to write to a replica. Should a unprocessed block have a pending... Agent: Schwegman, Lundberg & Woessner/novell 20080209150 - Non-volatile memory device and method of driving the same: A method of driving a non-volatile memory device includes supplying power to the memory device, in which setting information related to setting an operating environment is copied and stored in multiple of regions of a memory cell array. An initial read operation of the memory cell array is performed and... Agent: Volentine & Whitt Pllc 20080209149 - Processor architecture for exact pointer identification: The present invention relates to an object-based processor architecture which allows exact pointer identification by strictly separating pointers and data from one another in the memory and in the processor registers. The access to the memory is performed exclusively via pointers which refer to objects. An object contains separate areas... Agent: Venable LLP 20080209151 - Storage device and control method of the storage device: A storage device includes a storage medium, a nonvolatile memory, a head, a driving unit, and a processor. The driving unit drives the storage medium. The processor controls the storage device according to a process. The process includes receiving the data transmitted from the host, storing the data received into... Agent: Greer, Burns & Crain 20080209152 - Control of metastability in the pipelined data processing apparatus: A method and integrated circuit for accessing data in a pipelined data processing apparatus in which the operating conditions of the pipelined data processing apparatus are such that metastable signals may occur on at least the boundaries of the pipelined stages is disclosed. The method comprises the steps of: receiving... Agent: Nixon & Vanderhye, Pc 20080209155 - Method for configuring a memory space divided into memory banks: A method for configuring a memory space, the method including reading a piece of configuration information in the memory space, determining a division of at least one part of the memory space into memory banks according to the configuration information read; and allocating to each of the memory banks an... Agent: Seed Intellectual Property Law Group Pllc 20080209156 - Methods and apparatus for managing a shared memory in a multi-processor system: Methods and apparatus provide for associating memory allocation table (MAT) entries with nodes in a binary tree such that the nodes and the entries are grouped into hierarchical levels, each entry including status information; associating the nodes and the entries with segments of a shared memory of a multi-processor system... Agent: Kaplan Gilman Gibson & Dernier L.l.p. 20080209153 - Page oriented memory management: A method and apparatus for managing memory allocation using memory pages. One or more arenas are designated within a memory page. Each of the arenas are divided into one or more memory blocks of the same size. Metadata is generated for the memory blocks at a location other than between... Agent: Blakely Sokoloff Taylor & Zafman LLP 20080209154 - Page oriented memory management: A method and apparatus for managing memory allocation using memory pages. An arena is designated within one or more memory pages. The arena is divided into one or more memory blocks of the same size. Metadata is generated for the memory blocks at a location other than between the memory... Agent: Blakely Sokoloff Taylor & Zafman LLP 20080209157 - Memory partitioning method: A memory partitioning method is applied in a memory module having a plurality of physical blocks. The partitioning method includes the following steps. First, a partitioning command is received. Next, at least one first memory driving module and a second memory driving module are called according to the partitioning command.... Agent: Birch Stewart Kolasch & Birch 20080209158 - System and method for configuration management of storage system: A discrepancy between a management range of a user on a management computer and a management range of the user in a storage, is detected with respect to a volume held in the storage. Storage management information of the management computer stores a correspondence between an identifier of a volume... Agent: Townsend And Townsend And Crew, LLP 20080209159 - Memory access method using three dimensional address mapping: A memory access method includes: obtaining a, b, and c from a program code for accessing a memory with a triple loop in a program, a being a number of values which an inner-most loop variable of the triple loop may have, b being a number of values which a... Agent: Sughrue Mion, Pllc 20080209160 - Device, system and method of verification of address translation mechanisms: Device, system and method of verification of address translation mechanisms. For example, an apparatus for testing an address translation mechanism of a design-under-test, the apparatus including: a test generator to receive a specification of at least one address translation table, and to generate one or more constraint-satisfaction-problem projectors over a... Agent: Ibm Corporation, T.j. Watson Research Center 20080209161 - Storage device and method of mapping a nonvolatile memory based on a map history: A non-volatile memory may include a plurality of map blocks for storing a plurality of map units, the map units representing mapping information between physical addresses and logical addresses. A storage device may include such a non-volatile memory. A method of mapping such a non-volatile memory may include writing historical... Agent: Lee & Morse, P.c. 08/21/2008 > patent applications in patent subcategories.20080201517 - Method for the conversion of logical into real block addresses in flash memories: The invention relates to a method for managing memory blocks in a non-volatile memory system comprising individually erasable memory blocks which can be addressed with the aid of real memory block numbers (RBN) and can be addressed by converting the address from a logical block number (LBN) into one of... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw 20080201520 - Flash firmware management: A computing host executes a web browser to access a utility application for managing one or more storage devices connected to the computing host. Management of each storage device may include making queries about the storage spaces and contents of the storage device, updating firmware of the storage device, updating... Agent: Stec, Inc. C/o Legal Department 20080201518 - Log-based ftl and operating method thereof: A log-based FTL and an operating method thereof for improving performances of reading and writing operations to increase the lifetime of a flash memory. In the method, when a reading operation for an LBN and an LPN is requested, a PBN and a PPN corresponding to the LBN and the... Agent: Townsend And Townsend And Crew, LLP 20080201519 - Memory card: A memory card is structured to support a variety of applications by dividing a storage region into a plurality of sub storage regions, each sub storage region being assigned a particular data format associated with each of a plurality of application programs stored in a controller of the memory card.... Agent: Marger Johnson & Mccollom, P.C. 20080201521 - Memory controller for controlling memory and method of controlling memory: A memory controller for controlling a memory that operates in synchronization with a clock signal, wherein the memory sequentially outputs data of addresses starting from a target address in synchronization with the clock signal after receiving a read command and the target address, the memory controller includes a supply control... Agent: Edwards Angell Palmer & Dodge LLP 20080201522 - Buffer management method and optical disc drive: A buffer management method is provided, particularly adaptable in an optical disc drive to access an optical disc. One or more data blocks are recorded to the optical disc in response to received write commands. Data blocks corresponding to the write commands are first buffered in a buffer of the... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP 20080201523 - Preservation of cache data following failover: In a data storage subsystem with disk storage and a pair of clusters, one set of DASD fast write data is in cache of one cluster and in non-volatile data storage of the other. In response to a failover of one of the pair of clusters to a local cluster,... Agent: John H. Holcombe IBM Corporation,IPLaw Dept. 20080201526 - Array-type processor having delay adjusting circuit: Disclosed is an array-type processor including a data path unit in which a plurality of processor elements are arranged in an array; a state-transition management unit that stores information for controlling changeover of data paths; and a delay adjusting circuit that adjusts delay of the input clock signal based upon... Agent: Foley And Lardner LLP Suite 500 20080201527 - Data processing system and storage subsystem provided in data processing system: A first storage subsystem 100A includes a first storage device 6A1 and one or more second storage devices 6A2, 6A3. A second storage subsystem 100B includes a third storage device 6B1 and a fourth storage device 6B2. A third storage subsystem 100C comprises a fifth storage device 6C1 and a... Agent: Townsend And Townsend And Crew, LLP 20080201525 - Raid capacity expansion handling method and system with concurrent data access capability: A RAID capacity expansion handling method and system with concurrent data access capability is proposed, which is designed for use with a RAID (Redundant Array of Independent Disks) unit for providing a capacity-expanding function that allows the RAID unit to add just a single disk to an original disk cluster... Agent: Edwards Angell Palmer & Dodge LLP 20080201524 - System and method for increasing video server storage bandwidth: A system and method for storing data in a data storage system. A data storage system is provided having a plurality of hard disk drive units each of which includes a plurality of hard disk storage devices. A first logical volume and a second logical volume may be formed for... Agent: Duane Morris LLPIPDepartment (harris Corp.) 20080201529 - Context switch data prefetching in multithreaded computer: An apparatus, program product and method initiate, in connection with a context switch operation, a prefetch of data likely to be used by a thread prior to resuming execution of that thread. As a result, once it is known that a context switch will be performed to a particular thread,... Agent: Wood, Herron & Evans, L.L.P. (ibm) 20080201528 - Memory access systems for configuring ways as cache or directly addressable memory: A memory system is provided. A processor provides a data access address. A memory device includes a predetermined number of ways. The processor selectively configures a selected number less than or equal to the predetermined number of the ways as cache memory belonging to a cacheable region, and configures remaining... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP 20080201530 - System and storage medium for memory management: Systems and a storage medium for memory management are provided. A system includes a tag controlled buffer in communication with a memory device, including multiple pages divided into individually addressable lines. The tag controlled buffer includes a prefetch buffer with at least one of the individually addressable lines from the... Agent: Cantor Colburn LLP-ibm Yorktown 20080201531 - Structure for administering an access conflict in a computer memory cache: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design is provided. The design structure includes an apparatus for administering an access conflict in a cache. The apparatus includes the cache, a cache controller, and a superscalar computer processor. The cache controller is... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1 20080201532 - System and method for intelligent software-controlled cache injection: A system and method to provide injection of important data directly into a processor's cache location when that processor has previously indicated interest in the data. The memory subsystem at a target processor will determine if the memory address of data to be written to a memory location associated with... Agent: International Business Machines Corporation 20080201533 - Reducing number of rejected snoop requests by extending time to respond to snoop request: A cache, system and method for reducing the number of rejected snoop requests. An incoming snoop request is entered in the first available latch in a pipeline of latches in a stall/reorder unit if the stall/reorder unit is not full. The entered snoop request is dispatched to a selector upon... Agent: Ibm Corp (wsm) C/o Winstead Sechrest & Minick P.C. 20080201534 - Reducing number of rejected snoop requests by extending time to respond to snoop request: A cache, system and method for reducing the number of rejected snoop requests. A “stall/reorder unit” in a cache receives a snoop request from an interconnect. The snoop request is entered in the first available latch of the stall/reorder unit unless the stall/reorder unit is full in which case the... Agent: Ibm Corp (wsm) C/o Winstead Sechrest & Minick P.C. 20080201535 - Method and apparatus for provisioning storage volumes: A method for determining volume size in a storage system, comprising the steps of receiving a request for a volume assignment from a client host; obtaining client host specification; obtaining storage system specification; based on the client host specification and storage system specification selecting a proper volume size; and assigning... Agent: Sughrue Mion, PLLC 20080201539 - Data storage device and method of operating the same: A data storage device and a method of operating the same include firmware recognizing that the data storage device has a smaller than normal capacity or includes a routine in the firmware when the number of bad blocks exceeds the maximum. Therefore, even if the number of bad blocks exceeds... Agent: Stanzione & Kim, LLP 20080201538 - Memory control method and memory system: Error-tolerant code conversion is carried out on original data including a large amount of binary data which is apt to be unintentionally rewritten, to produce converted data including a smaller amount of binary data which is apt to be unintentionally rewritten, and the converted data is written into a memory.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C. 20080201537 - Memory controller and method for coupling a network and a memory: A memory controller (SMC) is provided for coupling a memory (MEM) to a network (N; IM). The memory controller (SMC) comprises a first interface (PI) for connecting the memory controller (SMC) to the network (N; IM). The first interface (PI) is arranged for receiving and transmitting data streams (ST1-ST4). A... Agent: Nxp, B.v. Nxp Intellectual Property Department 20080201536 - Near instantaneous backup and restore of disc partitions: An apparatus comprises a data storage medium including first and second partitions, wherein individual physical blocks in the first partition are paired with individual physical blocks in the second partition, a status flag for each of the pairs of physical blocks, and a controller for performing read and write operations... Agent: Pietragallo Gordon Alfano Bosick & Raspanti, LLP 20080201540 - Preservation of integrity of data across a storage hierarchy: A method and apparatus for preservation of integrity of data across a storage hierarchy. An embodiment of a method includes verifying integrity of a memory page that is stored in primary computer memory. The memory page is swapped out of the primary computer memory to a secondary memory, wherein swapping... Agent: Intel/blakely 20080201541 - On-chip security method and apparatus: A boot method an apparatus are described which reduce the likelihood of a security breach in a mobile device, preferably in a situation where a reset has been initiated. A predetermined security value, or password, is stored, for example in BootROM. A value of a security location within FLASH memory... Agent: Dimock Stratton LLP 20080201542 - Data migrating method taking end time into consideration: There is provided a data migrating method including the steps of: calculating, in a case where data stored in a volume is migrated to another volume, a required period of time for migrating the data based on a size of data to be migrated and volume configuration information on the... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20080201543 - Memory device in mobile phone: A memory device for a mobile phone is provided. The memory device includes a flash memory for storing program data and user data; an interface circuit for copying program data stored in the flash memory according to whether data stored in the flash memory is valid; a first Random Access... Agent: The Farrell Law Firm, P.C. 20080201544 - Storage system: A processor of a storage controller receives an erasure process request relating to data stored in a storage unit, from a host computer, via a data I/O interface, detects a logical storage extent which is different to the logical storage extent allocated to the storage unit and which can be... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20080201546 - Memory system, computer system and memory: The correspondence between logical addresses and physical addresses is determined so that the logical addresses in ascending order may be assigned to the physical addresses in ascending order with the physical addresses of defective blocks in a memory skipped. Then, the physical addresses of the defective blocks in ascending order... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C. 20080201545 - Method, system and program product for associating threads within non-related processes based on memory paging behaviors: A method of tying related process threads within non-related applications together in terms of memory paging behavior. In a data processing system, a first process thread is related to one or more “partner” threads within separate high latency storage locations. The kernel analyzes the memory “page-in” patterns of multiple threads... Agent: Dillon & Yudell LLP 20080201547 - Structure for storage allocation management in switches utilizing flow control: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for managing allocation of storage in a switch utilizing flow control is provided. The design structure includes a switch having a plurality of ports and an internal storage divided into a plurality of... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1 20080201548 - System having one or more memory devices: A system having serially connected memory devices in a ring topology organization to realize high speed performance. The memory devices have dynamically configurable data widths such that the system can operate with up to a maximum common number of active data pads to maximize performance, or to operate with a... Agent: Eaton Peabody Patent Group, LLC 20080201550 - Autonomically suspending and resuming logical partitions when i/o reconfiguration is required: A partition manager includes an I/O reconfiguration mechanism and a logical partition suspend/resume mechanism that work together to perform autonomic I/O reconfiguration in a logically partitioned computer system. When I/O reconfiguration is required, the affected logical partitions are suspended, the I/O is reconfigured, and the affected logical partitions are resumed.... Agent: Martin & Associates, LLC 20080201549 - System and method for improving data caching: According to one embodiment of the present invention, a method for storing data includes partitioning the data into a plurality of sections and storing the sections on one or more server nodes of a plurality of server nodes. The method further includes caching one or more sections of the plurality... Agent: Baker Botts LLP 20080201551 - Virtual disk router system and virtual disk access system and method therefor: A virtual disk (VD) router system, a VD access system, and a method therefor, applied to a dual-controller system including a first controller and a second controller, are provided. First, a mapping virtual block device (VBD) corresponding to a VD of the second controller and/or the first controller is established... Agent: Rabin & Berdo, PC 20080201552 - Computer-readable medium storing program for controlling archiving of electronic doucument, document management system, document management method, and computer data signal: There is provided a computer-readable medium storing a program causing a computer to execute a process for controlling archiving of an electronic document, the program causing the computer to function as: a requirement memory that stores a document archive requirement for each rule; and an archive processor that judges, on... Agent: Gauthier & Connors, LLP 20080201553 - Non-volatile memory system: This non-volatile memory system includes: a non-volatile memory; and a memory controller controlling read and write of the non-volatile memory. Access control of the non-volatile memory system is performed in accordance with a logical address, using an address translation table within the memory controller that is updated in association with... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C. 08/14/2008 > patent applications in patent subcategories.20080195794 - Memory management for an intelligent electronic device: A device and method are provided for managing flash memory of an intelligent electronic device (IED) to maximize the IED life. The IED includes at least one sensor for sensing at least one electrical parameter distributed to a load. At least one analog-to-digital converter is coupled to the at least... Agent: Casella & Hespos 20080195795 - Pipelined burst memory access: A memory device for multichannel continuous or fixed burst mode operation includes multiple burst address counter circuits and associated control logic to minimize latency which would otherwise occur in multichannel operation.... Agent: Leffert Jay & Polglaze, P.a. Attn: Thomas W. Leffert 20080195796 - System and method to enable teamed network environments during network based initialization sequences: A system and method to enable teamed network environments during network based initialization sequences is disclosed. In one form of the disclosure, an information handling system can include a plurality of communication modules. One of the communication modules can be used to store a first teaming application. The information handling... Agent: Larson Newman Abel Polansky & White, LLP 20080195800 - Flash memory device and flash memory system including a buffer memory: A flash memory device includes a flash memory, a buffer memory and a control unit. The buffer memory temporarily stores data that is to be stored in the flash memory or data that is read from the flash memory. The control unit includes a buffer controller. The buffer controller performs... Agent: Myers Bigel Sibley & Sajovec 20080195797 - Interface for extending functionality of memory cards: An enhanced flash memory card, including a flash memory card, including a wireless modem for downloading remote directory listings, and media files and steams over the Internet, and a memory partitioned into physical data storage clusters, and a driver for the flash memory card (i) for managing a file allocation... Agent: Soquel Group, Llc 20080195801 - Method for operating buffer cache of storage device including flash memory: Provided is a method for operating a buffer cache which is performed by a storage device including a flash memory. The method includes converting a logical block address requested from a host into a logical page number. A region in which a page corresponding to the logical page number is... Agent: F. Chau & Associates, Llc 20080195804 - Methods of writing partial page data in a non-volatile memory device: A method of writing partial page data in a non-volatile memory device includes, reading data from a second block when the size of a last page of data to be written in a page of a first block is smaller than a size of the page of the first block,... Agent: Myers Bigel Sibley & Sajovec 20080195798 - Non-volatile memory based computer systems and methods thereof: Non-volatile memory based computer systems and methods are described. According to one aspect of the invention, at least one non-volatile memory module is coupled to a computer system as main storage. The non-volatile memory module is controlled by a northbridge controller configured to control the non-volatile memory as main memory.... Agent: Roger H. Chu 20080195803 - Nonvolatile semiconductor memory device for supporting high speed search in cache memory: A method for reducing a memory map table search time when employing a semiconductor memory device as a temporary memory of large capacity storage device, and a semiconductor memory device therefore, are provided. A MAP RAM is prepared for storing map table data related to the nonvolatile memory area in... Agent: F. Chau & Associates, Llc 20080195802 - System and method for searching mapping table of flash memory: A system and method for searching a mapping table of a flash memory is provided. The system includes at least one random access memory for storing the mapping table retrieved from the flash memory and at least one search engine for searching for data from the mapping table stored in... Agent: F. Chau & Associates, Llc 20080195799 - Systems, methods and computer program products for operating a data processing system in which a file delete command is sent to an external storage device for invalidating data thereon: A data processing system that includes a host system and an external data storage device with an erase before write memory device thereon can be operated by sending a file delete command from the host to the data storage device for one or more files stored thereon. The file delete... Agent: Myers Bigel Sibley & Sajovec 20080195805 - Micro controller unit system including flash memory and method of accessing the flash memory by the micro controller unit: A micro controller unit (MCU) system and a flash memory accessing method performed by the MCU system are provided. In the flash memory accessing method, when a first address, which is currently accessed, is inconsecutive to a second address, which is accessed next to the first address, an MCU that... Agent: F. Chau & Associates, Llc 20080195806 - System and method for controlling memory operations: A system and method for controlling memory operations is disclosed. In a particular embodiment, the system includes a memory controller that can request control of a contact that is shared between a first memory device and a second memory device. In a particular embodiment, the memory controller includes a state... Agent: Toler Law Group 20080195808 - Data migration systems and methods for independent storage device expansion and adaptation: A method of data migration for independent storage device expansion and adaptation is disclosed. The method migrates user data of a first storage unit being pre-expanded or pre-adapted to relevant regions of a second storage unit being post-expanded or post-adapted in multiple batches and includes the following steps. A number... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP 20080195812 - Data storage system with shared cache address space: An apparatus for a node of a peer-to-peer network having a plurality of nodes comprises one or more I/O adapters; a cache component; one or more inter-node routing components; a memory mapping component for presenting to the I/O adapters a single address space mapped across a plurality of memory elements... Agent: Dillon & Yudell, LLP 20080195807 - Destage management of redundant data copies: A method of destage management of redundant data copies in a cache storage subsystem includes providing a plurality of target storage devices, each of the plurality of target storage devices capable of storing a complete copy of a data image. The data image and the plurality of target storage devices... Agent: Ingrassia Fisher & Lorenz, P.c. (ibm) 20080195811 - Multi-path data retrieval from redundant array: An optimum pathway to data stored on a data storage system having N storage devices and more than N pathways is determined in response to a read request for the data. A sorter separates the read request into an appropriate segment size for sending to the storage devices of the... Agent: Joseph P. Curtin, L.l.c. 20080195810 - Nonvolatile memory system: A nonvolatile (NV) memory system includes a memory control module that encodes data to provide encoded logical data structures. The system also includes NV memory that includes X arrays that include physical data structures that differ in size from the encoded logical data structures. The memory control module writes/reads from... Agent: Harness, Dickey & Pierce P.L.C 20080195809 - Raid system and the operating method for the same: The invention discloses Redundant Array of Inexpensive Disks (RAID) systems, utilizing a RAID descriptor having compatibility for different RAID levels. When the RAID system is set to realize RAID 5, the RAID descriptor comprises a first RAID sub-descriptor. When the RAID system is set to realize RAID 6, in addition... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP 20080195813 - System and method for fault tolerant controller for network raid: A fault-tolerant and efficient way of deducing a set of inconsistent stripes for a network RAID protocol, wherein clients forward input/output (I/O) to a particular controller device called the coordinator, which executes RAID logic and which sends out device IOs to the relevant storage devices. If the coordinator fails then... Agent: Rogitz & Associates 20080195816 - Memory card authentication system, memory card host device, memory card, storage area switching method, and storage area switching program: A system for authenticating a memory card including: a memory card host device including a plural area authentication module which judges whether the memory card has plural storage areas, and an area switching module which switches a storage area subject to access a different storage area from among plural storage... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c. 20080195815 - Memory card using nand flash memory and its operating method: A memory card is connected to a host using a NAND flash memory interface mode. In addition, the memory card further includes the NAND flash memory as well as a controller. The NAND flash memory uses an interface mode different from that supported by the host. The controller converts the... Agent: Marger Johnson & Mccollom, P.c. 20080195814 - Multi-functional storage device: A multi-functional storage device is composed of a container, a side of which is provided with a transmission wire which is used to connect with a computer, and an interior of which is installed with a hard disk and a circuit board. On the other hand, the other side of... Agent: Troxell Law Office Pllc 20080195817 - Sd flash memory card manufacturing using rigid-flex pcb: A memory card (e.g., SD or MMC) device including a PCBA in which components are mounted on a “rigid-flex” PCB including at least one rigid PCB section and at least one flexible PCB section, and a housing that includes both a pre-molded upper housing portion and a molded casing. The... Agent: Bever Hoffman & Harms, LLP 2099 Gateway Place 20080195818 - Processing unit and method of memory management in processing systems with limited resources: The present invention is related with the management of memory in environments of limited resources, such as those found for example in a smart card. In a more particular manner, the invention relates to a method of managing the data storage resources of volatile memory, the object of which is... Agent: Brinks Hofer Gilson & Lione/sandisk 20080195819 - System and program product for validating remotely cached dynamic content web pages: Under the present invention, when a request for a web page is received from a client on a server, the web page is built and analyzed for cacheability. If the web page is cacheable, an entity tag is generated. The entity tag generally identifies the various sources of dynamic content... Agent: Hoffman Warnick Llc 20080195820 - Prefetch miss indicator for cache coherence directory misses on external caches: A system, method and article of manufacture for reducing latencies associated with cache coherence directory misses on external caches in a shared distributed memory data processing system. A cache coherence directory is evaluated for possible prefetching of a directory entry into a directory cache. A prefetch miss indicator is set... Agent: Walter W. Duft 20080195821 - Method and system of fast clearing of memory using a built-in self-test circuit: Systems, devices and methods for clearing memory using a built-in self-test circuit are disclosed. In one embodiment, a device for clearing memory using a built-in self-test circuit comprises a clear memory module added to a memory built-in self-test (MBIST) controller generating a signal for clearing one or more memory modules... Agent: Murabito, Hao & Barnes, LLP 20080195822 - Pilot placement for non-volatile memory: A memory control module includes a format module that communicates with a memory array that includes B memory blocks each including P physical pages and Q logical pages. The format module selects X predetermined locations to write pilot data and read-back pilot signals in each of the B memory blocks.... Agent: Harness, Dickey & Pierce P.L.C 20080195823 - Method and apparatus for convolutional interleaving/de-interleaving technique: The invention relates to the processor for performing convolution interleaving/de-interleaving on data symbols on plural original data symbols and convolution de-interleaving on the convolution interleaved data symbols. The processor for performing convolution interleaving on data symbol comprises a memory, an original address generator, and a storage address generator which generates... Agent: Hoffman Warnick Llc 20080195824 - Context sensitive caching on removable storage: A method and apparatus is described for receiving and storing data from a first host device and performing actions or events on a second host device based on the stored data. Also, a priority factor value may be determined for the stored data such that actions or events performed on... Agent: Intellectual Property Department Amylin Pharmaceuticals, Inc. 20080195826 - Hierarchical storage management system, hierarchical control device, interhierarchical file migration method, and recording medium: A hierarchical storage management system and method that manages and virtualizes at least two kinds of storages with different access speeds as a primary storage and a secondary storage. The system includes a control unit configured to copy a file stored in the primary storage into the primary storage based... Agent: Staas & Halsey LLP 20080195825 - Metrics modules and methods for monitoring, analyzing and optimizing bus and memory operations in a complex integrated circuit: A processing system includes a processing circuit having one or more buses, a memory interface unit to control access by the processing circuit to a memory, and a metrics module. The metrics module includes one or more metrics registers and a metrics controller to monitor one or more operations selected... Agent: Wolf Greenfield & Sacks, P.c. 20080195828 - Methods of writing data in a non-volatile memory device to place data in an in-place arrangement: Provided is a data writing method of copying data having logical pages prior to logical pages of data to write from a data block used in non-volatile memory device. The data writing method includes copying data having logical pages prior to a logical page of data to write from a... Agent: Myers Bigel Sibley & Sajovec 20080195827 - Storage control device for storage virtualization system: The same backup timing information is stored respectively in two or more storage control devices, of a plurality of storage control devices constituting a storage virtualization system which presents a virtual name space, which have objects which correspond to object names belonging to a particular range which is all or... Agent: Stanley P. Fisher Reed Smith LLP 20080195829 - Self-protecting memory device: Described are a self-protecting memory device and a method for protecting information stored in a memory device. The self-protecting memory device includes a storage module, an access control module and a pattern memory module. The access control module communicates with the storage module and is configured to receive memory references... Agent: Guerin & Rodriguez, LLP 20080195830 - Memory cards and systems using host identification information for data security and methods of operating: A memory card can include a memory that is configured to store data and a memory controller that is configured to store host identification information and a password. The memory controller can be configured to control read/write access to the memory, where the memory controller can allow a host read... Agent: Myers Bigel Sibley & Sajovec 20080195831 - Data transfer apparatus and data transfer method: A Direct Memory Access (DMA) controller issues a read request to read data stored in a cache memory and sends a cache controller the read request via a bridge chip. When a response time monitored by a response time monitor exceeds a predetermined time, a status information notification unit obtains... Agent: Staas & Halsey LLP 20080195832 - Storage controller and storage system: A storage controller of the present invention writes data to a storage device, in which the storage unit is fixed, at a size that is larger than this storage unit, and curbs response performance degradation. A host sends write-data in a prescribed number of logical blocks in accordance with a... Agent: Stanley P. Fisher Reed Smith LLP 20080195834 - System and method for dynamic sizing of cache sequential list: A self-tuning, low overhead, simple to implement, locally adaptive, novel cache management policy that dynamically and adaptively partitions the cache space amongst sequential and random streams so as to reduce read misses.... Agent: Rogitz & Associates 20080195833 - Systems, methods and computer program products for operating a data processing system in which a file system's unit of memory allocation is coordinated with a storage system's read/write operation unit: A data processing system is operated by obtaining a read/write operation unit size used in performing data operations in a data storage device, setting a file system unit of memory allocation size to a multiple of the read/write operation unit size, and setting a unit of memory allocation starting address... Agent: Myers Bigel Sibley & Sajovec 20080195835 - Configurable embedded processor: A configurable processor architecture uses a common simulation database for multiple processor configurations to reduce the cost of producing customized processor configurations. An unchanging core portion is used in each processor configuration. To support different memory modules, identification signals are provided from the memory modules or an identification module to... Agent: Dickstein Shapiro LLP 20080195836 - Method or apparatus for storing data in a computer system: A method and apparatus are disclosed for storing data in a computer system 101 which data from a first portion of a system memory 117 is stored in a secondary memory 105; the first portion of the system memory 117 is allocated for subsequent use by an operating system (OS);... Agent: Hewlett Packard Company 20080195837 - Data access method, channel adapter, and data access control device: In an LSI implemented by a DMA chip, a BCC check block performs BCC check of cache data each time the cache data is read. In response to a check result indicating whether or not the check is completed, a CM read block turns on a BCC check bit and... Agent: Staas & Halsey LLP 20080195838 - Cyclic buffer management: Systems and methods for cyclic buffer management are described. In one aspect, the systems and methods enable cyclic buffer wrap-around write operations independent of temporary buffer allocations and corresponding multiple data copies. To this end, the systems and methods map the cyclic buffer's physical addresses two-times (“doubly map”) to a... Agent: Lee & Hayes Pllc 08/07/2008 > patent applications in patent subcategories.20080189466 - Storage system and control method thereof: Proposed are a storage system and its control method capable of dealing with the unique problems that arise when using a nonvolatile memory as the memory device while effectively preventing performance deterioration. This storage system is provided with a plurality of memory modules having one or more nonvolatile memory chips,... Agent: Stanley P. Fisher Reed Smith LLP 20080189467 - Memory device, memory controller and memory system: The memory device has: a plurality of banks, each of which has a memory cell array having a plurality of page areas that are selected by row addresses respectively, and each of which is selected by a bank address; a row controller that controls activation of the page areas within... Agent: Arent Fox LLP 20080189468 - High availability virtual machine cluster: One embodiment of the present invention is a system including: (a) plural virtualization systems configured in a cluster; (b) storage accessible to each virtualization system of the cluster, wherein for each virtual machine operative in a virtualization system of the cluster, the storage maintains a representation of virtual machine state... Agent: Vmware, Inc. 20080189471 - Adhoc communications: Embodiments relate to an adhoc communications network, an adhoc communications network memory administration unit, an adhoc communications device, a method for operating an adhoc communications network and a method for operating an adhoc communications device.... Agent: Dickstein Shapiro LLP 20080189470 - Method of switching distributed storage modes in gns: Provided is a computer system including: one first server; a plurality of second servers; and a plurality of storage subsystems, in which the computer system applies to each file stored in the storage subsystems one of a first file storage mode and a second file storage mode in a distributive... Agent: Stanley P. Fisher Reed Smith LLP 20080189469 - Preservation of hard drive data via dynamic band boundary definition: Systems and methods for managing adjacent track interference in a hard drive. An adjacent track interference potential is ascertained in a region of the hard drive, and data corruption is averted via scrubbing data in the region with ascertained adjacent track interference potential, wherein limits of this region are defined.... Agent: Ference & Associates LLC 20080189472 - Semiconductor storage device and method of controlling the same: A semiconductor storage device includes a first nonvolatile memory to store user data of a file, a second nonvolatile memory to store management data of the file, the second nonvolatile memory being different in type from the first nonvolatile memory, and a controller to control read/write of data with respect... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C. 20080189474 - Memory card and memory system having the same: A memory card includes: a first memory chip responding to all commands input externally; and a second memory chip responding to commands, among the commands input externally, relevant to reading, programming, and erasing operations with data. Card identification information stored in the first memory chip includes capacity information corresponding to... Agent: F. Chau & Associates, LLC 20080189475 - Memory module having high data processing rate: A memory module having a high data processing rate and high capacity is provided. The memory module may include a memory chip, a controller controlling an operation of the memory chip, an optical detector converting an external input signal into an internal input signal to transmit the converted signal to... Agent: Marger Johnson & Mccollom, P.C. 20080189473 - Mlc selected multi-program for system management: Methods, apparatus, and systems may operate to utilize at least one of a single level cell structured or a multi-level cell structured non-volatile memory device organized as a plurality of data blocks, including at least one full page block having one or more full pages comprising a plurality of contiguous... Agent: Schwegman, Lundberg & Woessner, P.A. 20080189478 - Nonvolatile semiconductor memory device with advanced multi-page program operation: A nonvolatile semiconductor memory device for an efficient program of multilevel data includes a memory cell array having a plurality of banks and a cache block corresponding to each of the plurality of banks. The cache block has a predetermined data storage capacity. A page buffer is included which corresponds... Agent: Volentine & Whitt PLLC 20080189476 - Nonvolatile semiconductor storage device and method of managing the same: A nonvolatile semiconductor storage device and method of managing the same are provided. The nonvolatile semiconductor storage device includes a nonvolatile memory configured to be electrically rewritable; and a controller configured to control an access area of the nonvolatile memory on the basis of information associated with management of the... Agent: Bell, Boyd & Lloyd, LLP 20080189477 - Storage system and storage management method: An object of the present invention is to provide a storage system and storage management method, which prevent a problem in the operation of stored data from being caused by unknown states of volume information and life information, when flash memories are placed in off-line mode and again placed in... Agent: Sughrue Mion, PLLC 20080189479 - Device, system and method for controlling memory operations: A device, system and method for controlling memory operations are disclosed. In an embodiment, data is received at one of multiple slave devices in an integrated circuit. The data is received from at least one bus in a multiple layer bus and is provided to a memory controller. The data... Agent: Toler Law Group 20080189480 - Memory configured on a common substrate: A memory includes a first macro chip, a spine chip, and a common substrate. The common substrate is configured to pass signals between the first macro chip and the spine chip. The first macro chip, the spine chip, and the common substrate provide a memory.... Agent: Dicke, Billig & Czaja 20080189481 - Methods and systems for storing data based on a reliability requirement: Methods and apparatus for storing data in different regions of the memory device based on, for example, a reliability requirement of the data. A memory controller may determine a category for data, for example, high reliability data and low reliability data, prior to storing the data in memory. The data... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Qimonda 20080189482 - Storage system with multiple copy targeting: A storage controller, cooperable with host computer apparatus, and a plurality of controlled storage apparatus, comprises a host write component operable to write a data object to a source data image at one of the plurality of controlled storage apparatus; a first copy component responsive to a first metadata state... Agent: Lieberman & Brandsdorfer, LLC 20080189483 - Power saving in memory arrays: An array of storage elements each comprising a data input and output and a feedback loop, substantially all of said feedback loops being formed with an asymmetry such that on power up when no input data signal is received a value is preferentially stored in said feedback loops such that... Agent: Nixon & Vanderhye, PC 20080189484 - Storage control unit and data management method: An I/O processor determines whether or not the amount of dirty data on a cache memory exceeds a threshold value and, if the determination is that this threshold value has been exceeded, writes a portion of the dirty data of the cache memory to a storage device. If a power... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20080189485 - Cooperative memory management: A cooperative memory card system includes a memory card device, and a host in signal communication with the memory card device, where the host assumes at least one memory management function for the memory card device; and a corresponding method of cooperative memory management between a host and a memory... Agent: F. Chau & Associates, LLC 20080189486 - Usb flash memory devices with an improved cap: USB flash memory devices with an improved cap are described. According to an exemplary embodiment of the invention, a USB flash memory device comprises a flash memory drive, an improved cap, a cap plug and a wire loop. The flash memory drive comprises a core unit and an outer shell... Agent: Roger H. Chu 20080189487 - Control of cache transactions: A cache memory circuit is provided for use in a data processing apparatus. The cache has a memory array and circuitry for receiving both a transaction input signal and a priority input signal. The priority input signal provides priority information with regard to one or more of the cache transactions... Agent: Nixon & Vanderhye, PC 20080189488 - Method and apparatus for managing a stack: A computer implemented method, apparatus, and computer usable program code for monitoring and managing a stack. Usage of stack space is monitored for a plurality of threads. Usage of stack space is compared to a policy to form a comparison. An action is selectively initiated based on the comparison to... Agent: Ibm Corp (ya) C/o Yee & Associates PC 20080189489 - Regularly occurring write back scheme for cache soft error reduction: In one embodiment, a processor regularly writes one or more cache entries back to memory to reduce the likelihood of cache soft errors. The regularly occurring write backs operate independently of Least Recently Used (LRU) status of the entries so that all entries are flushed.... Agent: Stolowitz Ford Cowger LLP 20080189490 - Memory mapping: A system and method for memory mapping are provided, the system including a logical unit to physical unit map table, data unit groups in signal communication with the map table, and log unit groups, each associated with a corresponding one of the data unit groups, where updated data for any... Agent: F. Chau & Associates, LLC 20080189491 - Fusion memory device and method: A fusion memory device and method that are capable of encoding data to be written and decoding the data to be read is provided. The fusion memory device includes a main memory for storing multimedia data, an auxiliary memory for buffering the multimedia data in a writing and a reading... Agent: The Farrell Law Firm, P.C. 20080189492 - System, method and storage medium for controlling asynchronous updates to a register: A system for controlling asynchronous updates to a register, the system including a generally accessible register that is asynchronously updateable by hardware and software. The system also includes protection logic that is in communication with the register. The protection logic includes circuitry to prevent a hardware update to the register... Agent: Cantor Colburn LLP-ibm Poughkeepsie 20080189493 - Memory controlling method, program and device: s 20080189494 - System and method for optimizing data in value-based storage system: A method (and system) of storing data in a value-based storage system, includes optimizing a value of data stored in the value-based storage system.... Agent: Mcginn Intellectual Property Law Group, PLLC 20080189495 - Method for reestablishing hotness of pages: A computer implemented method, an apparatus, and a computer usable program product are provided for reestablishing the hotness, or the retention priority, of a page. When a page is paged out of memory, the page's then-current retention priority is saved. When the page is paged in again later, the retention... Agent: Ibm Corp (ya) C/o Yee & Associates PC 20080189496 - Patient and user oriented data archiving: A method and apparatus for archiving medical data in one of two or more storage modules, comprising a short time storage module with fast access and a long time storage module with slow access. The method comprises the steps of defining at least one set of rules for executing the... Agent: 24ip Law Group Usa, PLLC 20080189498 - Method for auditing data integrity in a high availability database: A method for maintaining the integrity of a backup database table on a secondary node against a continuously replicated and dynamically changing original database table on a primary node includes generating an original checksum of a segment of the original database table between a beginning record and an ending record.... Agent: Stetina Brunda Garred & Brucker 20080189499 - Storage system: Provided is a storage system enabling the addition of a storage apparatus without going offline. When a first storage apparatus receives from a host system a command for writing first data in any one of the primary volumes in a primary volume group, it writes the first data in the... Agent: Antonelli, Terry, Stout & Kraus, LLP 20080189497 - System for persisting digital multimedia files onto a digital device: A system and method for automatically persisting digital multimedia data from an external memory unit (flash disk or equivalent medium), or simply a multimedia chip, to a digital multimedia device upon connection. Digital multimedia data is stored onto the multimedia chip, the digital multimedia device has its own an internal... Agent: Matthew Hunter 20080189500 - Secure processor arrangement having shared memory: Processor arrangement having a first processor, a second processor, and at least one memory configured to be shared by the first processor and the second processor. The second processor has a memory interface configured to provide access to the at least one memory, and a processor communication interface configured to... Agent: Dickstein Shapiro LLP 20080189501 - Methods and apparatus for issuing commands on a bus: In a first aspect, a first method of issuing a command on a bus of a system is provided. The first method includes the steps of (1) receiving a first functional memory command in the system; (2) receiving a command to force the system to execute functional memory commands in... Agent: Ibm Corporation Intellectual Property Law Dept. 917 20080189502 - Partitionable accounting of memory utlization: Managing physical memory for one or more processes with both a minimum and a maximum amount of physical memory. Memory sets are created, each specifying a number of credits. The total number of credits specified by all memory sets are equal to the total number of pages in physical memory.... Agent: Sun Microsystems, Inc. C/o Darby & Darby P.C. 20080189503 - System and method of squeezing memory slabs empty: A system and method of squeezing slabs of memory empty are provided. A slab is a block of allocated memory space that is dedicated to holding one type of data. When it is determined that a slab of memory is to be squeezed empty, no object may be allocated from... Agent: Ibm Corporation (ve) C/o Volel Emile 20080189504 - Storage device flow control: A method for controlling data flow to a pair of storage devices includes receiving at least one new entry to store in a first storage device or a second storage device in the pair of storage devices and determining a number of entries made to the first and second storage... Agent: Hewlett Packard Company 20080189505 - Digital electronic device capable of memory formatting, a method of memory formatting, digital electronic device having a function of storing and method for storing thereof: A digital electronic device capable of memory formatting, a method for memory formatting, and a digital electronic device having a storing function and a storing method thereof are provided. The memory stores data, and the control unit formats the memory such that the memory includes a plurality of storage regions... Agent: Sughrue Mion, PLLC 20080189506 - Address translation method and apparatus: Address translation performance within a processor is improved by identifying an address that causes a boundary crossing between different pages in memory and linking address translation information associated with both memory pages. According to one embodiment of a processor, the processor comprises circuitry configured to recognize an access to a... Agent: Qualcomm Incorporated 20080189508 - Optical harness assembly and method: An optical harness assembly and method are provided. The optical harness assembly includes at least one optical harness cable having a termination end; at least one electrical connector having connector pins; and at least one active connector conversion unit coupled between the termination end of the optical harness cable and... Agent: Maldjian & Fallon LLC 20080189507 - Program execution device and electronic apparatus: A program execution device includes: a lookup table storage section that stores a lookup table stipulating a plurality of relations between a plurality of input data and a plurality of output data that are results of operation conducted on the plurality of input data; a program storage section that stores... Agent: Harness, Dickey & Pierce, P.L.C 20080189509 - Data processing system and computer program product to allow pci host bridge (phb) to handle pre-fetch read transactions on the pci bus which access system memory through translation control entry (tce) table: A method, system, and computer instructions for providing valid translation entries in the TCE table for all supported DMA addresses to prevent the occurrence of system errors due to prefetching. The mechanism of the present invention reserves a page in system memory. This reserved page is made unavailable to the... Agent: Ibm Corp (ya) C/o Yee & Associates PC 20080189510 - Dynamic resource allocation: A network interface device for providing an interface between a network and a data processing device, the network interface device having: a plurality of resources of different types for supporting the interface, and a bus interface for interfacing with the data processing device by means of a bus over which... Agent: Weide & Miller, Ltd. 20080189511 - Table value conversion device and method for converting and writing table value: A table value conversion device for use with a memory in which a default table value is stored, a central processing unit for reading a default table value from the memory and outputting an output value, and a functional macro functioning as hardware for processing data and storing a lookup... Agent: Arent Fox LLP Previous industry: Electrical computers and digital data processing systems: input/outputNext industry: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) ###### RSS FEED for 20091112: Integrate FreshPatents.com into your RSS reader/aggregator or website to track weekly updates. For more info, read this article. ###### Thank you for viewing Electrical computers and digital processing systems: memory patents on the FreshPatents.com website. These are patent applications which have been filed in the United States. There are a variety ways to browse Electrical computers and digital processing systems: memory patent applications on our website including browsing by date, agent, inventor, and industry. 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