Electrical computers and digital processing systems: memory patents - Monitor Patents
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Electrical computers and digital processing systems: memory July cataloged by category listing 07/08

Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.
  
07/31/2008 > patent applications in patent subcategories. cataloged by category listing

20080183943 - Method and system for data transfers across different address spaces: A processing device includes a first storage location configured to store a first value associated with a first address space, a second storage location configured to store a second value associated with a second address space, and a third storage location configured to store a third value associated with a... Agent: Larson Newman Abel Polansky & White, LLP

20080183944 - Efficient context switching in a virtualized environment: Various operations are disclosed for improving the operational efficiency of register handling in a virtualized environment. Some infrequently accessed software managed registers are managed lazily when switching contexts between virtual processors. The states of those registers are not saved on exit from a guest or restored on entry to the... Agent: Woodcock Washburn LLP (microsoft Corporation)

20080183945 - Firmware relocation: A method comprises logic determining a second area of volatile memory into which system firmware is to be relocated. Further, a control method copies the system firmware from a first area of volatile memory to the second area. The logic cannot access the first area.... Agent: Hewlett Packard Company

20080183946 - System and method for accessing an offline storage unit through an online storage unit: By the same method as that of making data access to a data storage area in an online state, it is performed to access a data storage area other than the data storage area. A plurality of logical volumes carried by a disk array apparatus includes an online volume that... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080183954 - Apparatus for and method of controlling embedded nand flash memory: An apparatus and method for controlling an embedded NAND flash memory. The apparatus includes a code memory storing code information for controlling an access to a NAND flash memory. A register stores code information corresponding to a command to be executed by the NAND flash memory. A central processing unit... Agent: F. Chau & Associates, LLC

20080183953 - Apparatus, system, and method for storage space recovery in solid-state storage: An apparatus, system, and method are disclosed for storage space recovery in solid-state storage. A sequential storage module sequentially writes data packets in a storage division. The storage division includes a portion of a solid-state storage. The data packets are derived from an object. The data packets are sequentially stored... Agent: Kunzler & Mckenzie

20080183952 - Data recording system: A data recording system comprises a first memory, a counting unit for counting the number of data writes to the first memory, and an alarm unit for outputting an alarm if the number of data writes to the first memory reaches a first threshold value. The counting unit writes data... Agent: Katten Muchin Rosenman LLP

20080183951 - Flash memory device and program method thereof: A method for programming a flash memory device with a plurality of memory cells. A selected memory cell is programmed under a condition where a bulk area is biased with a high voltage. A program pass/fail of the memory cell is verified with the high voltage applied to the bulk... Agent: F. Chau & Associates, LLC

20080183948 - Flash memory system with higher data transmission rate and method thereof: A flash memory system is disclosed. The flash memory system includes a host and a flash memory card. The data transmission between the host and the flash memory card can be achieved with a clock signal for synchronization. The data is transmitted between the host and the flash memory card... Agent: North America Intellectual Property Corporation

20080183949 - Flash storage partial page caching: Methods and apparatus may operate to receive allocation requests from a processor configured to manage memory comprising a non-volatile memory device configurable as a plurality of blocks comprising a plurality of sectors, assign partial page blocks from the plurality of blocks for memory storage, fill some of the sectors by... Agent: Schwegman, Lundberg & Woessner, P.A.

20080183955 - Flash translation layer apparatus: A flash translation layer apparatus is disclosed. The flash translation layer apparatus coupled to a flash memory and a reading and writing controller, respectively. The flash translation layer apparatus includes an instruction register, a logical address register, a data register, a first auxiliary controller, a microprocessor, an address converting unit,... Agent: Kirton And Mcconkie

20080183950 - Memory device architectures and operation: Non-volatile memory devices logically organized to have erase blocks of at least two different sizes provide for concurrent erasure of multiple physical blocks of memory cells, while providing for individual selection of those physical blocks for read and program operations. In this manner, data expected to require frequent updating can... Agent: Leffert Jay & Polglaze, P.A. Attn: Thomas W. Leffert

20080183947 - Method for enhancing life cycle of memory: A hierarchical mechanism for preventing concentrated wear on single physical block or a specific set of physical blocks in the physical memory is proposed. The logical blocks mapping to the physical blocks in the physical memory are classified into two different levels for implicitly representing the modification times of the... Agent: North America Intellectual Property Corporation

20080183957 - 276-pin buffered memory module with enhanced fault tolerance: A dual inline memory module (DIMM) includes a card having a length of about 151.2 to about 151.5 millimeters, a plurality of individual local memory devices attached to the card, and a buffer device attached to the card, the buffer device configured for converting a packetized memory interface. The card... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20080183956 - Asynchronous data transmission: A method and apparatus for accessing a memory device. The method includes providing control signals for an access command to the memory device via an asynchronous interface and transmitting data for the access command to the memory device. The method also includes encoding, into the transmitted data, a clock signal.... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Qimonda

20080183958 - Hierarchical immutable content-addressable memory processor: Improved memory management is provided according to a Hierarchical Immutable Content Addressable Memory Processor (HICAMP) architecture. In HICAMP, physical memory is organized as two or more physical memory blocks, each physical memory block having a fixed storage capacity. An indication of which of the physical memory blocks is active at... Agent: Lumen Patent Firm, Inc.

20080183959 - Memory system having global buffered control for memory modules: A memory system has a plurality of memory modules and a global memory buffer. Each of the plurality of memory modules has at least two integrated circuit memory chips. The global memory buffer has a plurality of ports, each port coupled to a respective one of the plurality of memory... Agent: Freescale Semiconductor, Inc. Law Department

20080183960 - Maintenance of valid volume table of contents: A method maintains a valid volume table of contents (VTOC) written to in a fast replication relationship. A fast replication query is issued to a track in which the volume table of contents (VTOC) resides. If the query determines that a background copy is in progress, a volume having the... Agent: Ingrassia Fisher & Lorenz, P.C. (ibm)

20080183962 - Data storage system with shared cache address space: An apparatus for a node of a peer-to-peer network having a plurality of nodes comprises one or more I/O adapters; a cache component; one or more inter-node routing components; a memory mapping component for presenting to the I/O adapters a single address space mapped across a plurality of memory elements... Agent: Dillon & Yudell, LLP

20080183961 - Distributed raid and location independent caching system: An information backup system comprises a first computing system including a first local disk that includes a first disk driver. The first computing system also includes first local RAM, a first network interface that is connected to a computer network and includes a first network driver. A first device driver/bridge... Agent: Connolly Bove Lodge & Hutz LLP

20080183965 - Controller for controlling a plurality of logical resources of a storage system: A controller for controlling a logical resource of a storage system comprises a virtual resource preparation section for preparing a virtual resource which is a virtual logical resource, and a real resource assignment section that assigns a real resource which is a logical resource of a real entity to the... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080183964 - Storage system and data management method: A storage system comprises a first correlating section for correlating a plurality of RAID groups composed of a plurality of physical disks, and the pool region, a second correlating section for correlating the pool region and the storage regions of the virtual volumes, a first allocation section for allocating first... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080183963 - System, method, and service for providing a generic raid engine and optimizer: A generic RAID engine system accepts an access request, accepts a metadata input comprising a layout description and, optionally, a plurality of resource optimization objectives, accepts a dynamic input comprising a dynamic state of an I/O stack comprising the generic RAID engine and a fault configuration of a plurality of... Agent: Shimokaji & Associates, P.C.

20080183966 - Electronic system for informing term-of-validity and/or endurance data and method thereof: An electronic system for informing the term of validity and endurance includes a host and a semiconductor memory card. The semiconductor memory card informs a user of the term of validity and/or the endurance thereof, so that the user can move data stored in the semiconductor memory card to another... Agent: F. Chau & Associates, LLC

20080183967 - Apparatus and methods to reduce castouts in a multi-level cache hierarchy: Techniques and methods are used to reduce allocations to a higher level cache of cache lines displaced from a lower level cache. When it is determined that displaced lines have already been allocated in a higher level, the allocations of the displaced cache lines are prevented in the next level... Agent: Qualcomm Incorporated

20080183968 - Computer system having cache system directly connected to nonvolatile storage device and method thereof: A computer system includes a nonvolatile memory for storing instructions, a microprocessor, for controlling operation of the computer system, and a cache system coupled to the microprocessor and directly connected to the nonvolatile memory. The cache system is for providing a requested instruction to the microprocessor. If the requested instruction... Agent: North America Intellectual Property Corporation

20080183969 - System and method for dynamic sizing of cache sequential list: A self-tuning, low overhead, simple to implements locally adaptive, novel cache management policy that dynamically and adaptively partitions the cache space amongst sequential and random streams so as to reduce read misses.... Agent: Rogitz & Associates

20080183971 - Memory coherence protocol enhancement using cache line access frequencies: A memory coherence protocol is provided for using cache line access frequencies to dynamically switch from an invalidation protocol to an update protocol. A frequency access count (FAC) is associated with each line of data in a memory area, such as each cache line in a private cache corresponding to... Agent: Ibm Corporation- Austin (jvl) C/o Van Leeuwen & Van Leeuwen

20080183970 - Method and system for maintaining consistency of a cache memory accessible by multiple independent processes: A method and a system maintain consistency of a cache memory, accessible by multiple independent processes. The processes can share common data, and perform simultaneous data searching operations optionally followed by providing the data to the processes, and data removal/insertion. The searching, removal and insertion operations are comprehensively executed once... Agent: Young & Thompson

20080183972 - Snoop filtering using a snoop request cache: A snoop request cache maintains records of previously issued snoop requests. Upon writing shared data, a snooping entity performs a lookup in the cache. If the lookup hits (and, in some embodiments, includes an identification of a target processor) the snooping entity suppresses the snoop request. If the lookup misses... Agent: Qualcomm Incorporated

20080183973 - Snapshots in distributed storage systems: Embodiments include methods, apparatus, and systems for snapshots in distributed storage systems. One method of software execution includes using a version tree to determine what data blocks are shared between various storage nodes in the version tree in order to create a clone or a snapshot of a storage volume... Agent: Hewlett Packard Company

20080183974 - Dual ported memory with selective read & write protection: A device comprising a first port, a second port, and a non-volatile memory. The first port is coupled to and accessible by a first module, and the second port is coupled to and accessible by a second module. The non-volatile memory of the device comprises a first memory portion and... Agent: Larson Newman Abel Polansky & White, LLP

20080183975 - Rebuilding data on a dispersed storage network: A rebuilder application operates on a dispersed data storage grid and rebuilds stored data segments that have been compromised in some manner. The rebuilder application actively scans for compromised data segments, and is also notified during partially failed writes to the dispersed data storage network, and during reads from the... Agent: Eugene M. Cummings, P.C.

20080183983 - Decoding circuit: This invention makes it possible to use an inexpensive memory as the line memory of a decoding circuit. To do this, a command comparator separates compressed data into a first command that requires memory access and a second command requires no memory access. A decoder requests memory read of decompressed... Agent: Fitzpatrick Cella Harper & Scinto

20080183981 - Electronic endoscope: An electronic endoscope has a programmable logic device (PLD), a memory, and a program setting controller. The PLD creates a signal-processing circuit, based on a program data set associated with a signal process. The memory stores at least two program data sets such as configuration data sets, each having the... Agent: Greenblum & Bernstein, P.L.C

20080183982 - Memory controller: An address comparator stores an address of data read out by a host system. Also, a buffer reads out the data from a memory and stores the data. If an address of data which is expected to be newly read out by the host system is included in addresses which... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080183980 - Method and system for locking data of program memory embedded in microcontroller: A method for locking data of a program memory embedded in a microcontroller is provided. The method keeps the data stored in the program memory from being dumped. The program memory consists of a one-time-programmable read only memory and is configured into a plurality of storage sectors. The method, according... Agent: Mcginn Intellectual Property Law Group, PLLC

20080183976 - Method for indirect access to controller data using name stored in string tag: A controller can process an instruction directed to the controller itself to access data in the memory of the controller dynamically at runtime, where the data can be indirectly accessed by referencing a tag name, associated with the data and a memory space in memory, which can be included in... Agent: Rockwell Automation, Inc./(at)

20080183979 - Read-write spinlock with no mutual exclusion among readers: An embodiment of the invention provides an apparatus and method for controlling access by a read-write spinlock with no mutual exclusion among readers. The apparatus and method perform the steps of using values in a data structure in the read-write spinlock to control read access to a shared object and... Agent: Hewlett Packard Company

20080183978 - Semiconductor devices and scrambled data transmission methods thereof: Provided are a semiconductor device and a data transmitting method thereof. The method includes transmitting data into a memory through at least one data line, scrambling the data corresponding to at least one mask data, and determining, using the at least one mask data, data integrity of the data transmitted... Agent: Myers Bigel Sibley & Sajovec

20080183977 - Systems and methods for providing a dynamic memory bank page policy: Systems and methods for providing a dynamic memory buffer bank policy. Embodiments include a hub device for selecting a bank page policy. The hub device includes an input command stream interface and a bank page policy module. The input command stream interface detects commands from a memory controller that are... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20080183984 - Memory system with read-modify-write: An integrated circuit includes an array of memory cells, addressing circuitry, and timing and control logic. The array of memory cells is configured to store data bits. The addressing circuitry is configured to address multiple locations of memory cells in response to a clock signal. The timing and control logic... Agent: Kathy Manke Avago Technologies Limited

20080183985 - Rank select operation between an xio interface and a double data rate interface: In an aspect, a first method of interfacing a processor and memory is provided. The first method includes the steps of (1) generating a first command and associated address of a first type that does not indicate a rank of memory targeted by the first command; (2) determining whether the... Agent: Matthew C. Zehrer, Agent IBM Corporation

20080183986 - Entry replacement within a data store: A data processing system 2 includes a data store 14 having storage locations storing entries which can be used for a variety of purposes, such as operand value prediction, branch prediction, etc. An entry profile store 16 stores profile data in respect of more candidate entries than there are storage... Agent: Nixon & Vanderhye, PC

20080183987 - Storage system, storage control method, and storage control program: According to an aspect of an embodiment, a storage system for storing data from a host device, comprising: a plurality of storage units for storing data, in a manner to enable recovery of data stored in one of said storage units by the use of data stored in the rest... Agent: Staas & Halsey LLP

20080183989 - Apparatus, system, and method for uninterrupted storage configuration: An apparatus, system, and method are disclosed for uninterrupted storage configuration. The apparatus for uninterrupted storage configuration is provided with a plurality of modules configured to functionally execute the steps of generating a temporary location for storage configuration information, saving the storage configuration information to the temporary location, and copying... Agent: Brian C. Kunzler Kunzler And Associates

20080183988 - Application integrated storage system volume copy and remote volume mirror: Systems, devices and methods are described for copying used data block within a source volume to a target volume. A copy manager is provided on a host system for coordinating external copy requests originating from external sources. An application adapter layer is provided that provides lists of the blocks that... Agent: Lsi Corporation

20080183990 - Disk snapshot method: The invention provides a disk snapshot method applied to a server, wherein a snapshot operating module is installed in a kernel space within a memory of the server. When performing disk snapshot, the server receives a create instruction sent by the snapshot operating module, groups all disk chunks containing data... Agent: Bacon & Thomas, PLLC

20080183993 - Method for remote backup and storage system: In a storage system, a technique for promptly reading the backup data stored in the child storage device in the remote site side in case of disaster for the master site is provided. In this system, a parent storage device having a primary volume (V1) and a secondary volume (V2)... Agent: Stanley P. Fisher Reed Smith LLP

20080183995 - Snapshot system: A storage system including a snapshot volume arranged to provide each of a plurality of snapshot generations to the host as a virtual volume and to store data having an identical content in one storage area, and in that a management unit is arranged to: determine, when the host sends... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080183994 - Storage system: A storage system 300a that has a volume, manages the volume as a plurality of logical volumes, and can operate as a plurality of logical storage systems having at least one logical volume. The storage system comprises an IO transmission-reception unit 1320a that communicates with a management computer 100, a... Agent: Sughrue Mion, PLLC

20080183991 - System and method for protecting against failure through geo-redundancy in a sip server: The SIP server deployment can be comprised of an engine tier that provides high throughput processing and a state tier that maintains SIP state data in a set of partitions and replicas. Two sites of SIP server deployments can be configured, each being remotely located with respect to the other.... Agent: Fliesler Meyer LLP

20080183992 - Tape backup method: A secure data parser is provided that may be integrated into any suitable system for securely storing and communicating data. The secure data parser parses data and then splits the data into multiple portions that are stored or communicated distinctly. Encryption of the original data, the portions of data, or... Agent: Ropes & Gray LLP

20080183998 - Apparatus for security of accessing data and method of the same: The present invention provides an apparatus for security of accessing data, comprising a storage device including an address transform detector, a first lock bit register and a data comparator, the address transform detector providing a predetermined correction signal, data outputted from the storage device could be correctly identified when a... Agent: Wpat, PC

20080183999 - Method of updating data: A method of updating a data entry stored on a data storage unit, the data entry including data elements that are unique to the data storage unit and the data entry, the method comprising the steps of generating at the data storage unit an update request including the data entry... Agent: Hewlett Packard Company

20080183996 - Protecting operating-system resources: This document describes tools capable of enabling a protection agent to determine, from memory inaccessible from an operating-system privilege mode, whether one or more resources of an operating system have been modified. In some instances, these tools may enable the protection agent to reside within a virtual machine monitor. In... Agent: Lee & Hayes PLLC

20080183997 - Storage library with removable media: Embodiments include methods, apparatus, and systems for managing a storage library with removable media. One method includes providing to an administrative console identification of host computers attempting to access a tape drive in a tape library; determining, from input at the administrative console, access rights for each of the host... Agent: Hewlett Packard Company

20080184000 - Storage module and capacity pool free capacity adjustment method: The free region of a capacity pool is managed in a capacity pool structure management table stored in a memory, and if a capacity of a storage region that is to be assigned newly to a virtual volume by a processor is equal to or greater than a capacity of... Agent: Sughrue Mion, PLLC

20080184002 - Memory system, memory device and command protocol: A memory system, memory, and memory system command protocol are disclosed. Within the memory system, a memory controller communicates a command to the memory, the command being selected from a set of commands including a write command and a plurality of non-write commands. A Hamming distance value calculated between a... Agent: Volentine & Whitt PLLC

20080184001 - Method and an apparatus to store data patterns: A method and an apparatus to store data patterns are presented. In one embodiment, the method includes searching a pattern repository to find prior copies of a pattern and to reference one of the prior copies, or insert a new copy, based on the access time of the prior copy... Agent: Cesari And Mckenna, LLP

20080184003 - Data transmission control apparatus and data transmission control method: A data transfer control apparatus applicable to an image forming apparatus according to an embodiment of the invention includes a first storing unit configured to store data, a second storing unit configured to store data, a temporary storing unit configured to temporarily store data transferred from the first storing unit... Agent: Amin, Turocy & Calvin, LLP

20080184004 - Methods and apparatus for using a configuration array similar to an associated data array: Methods, apparatus, and systems for memories that include a data array and a configuration array adapted to store configuration information for configuring the data array, are disclosed. The data array and the configuration array include a plurality of wordlines and a plurality of bitlines. The plurality of wordlines in the... Agent: Dugan & Dugan, PC

20080184005 - Methods and apparatus for using a configuration array similar to an associated data array: Methods, apparatus, and systems for memories that include a data array and a configuration array adapted to store configuration information for configuring the data array, are disclosed. The data array and the configuration array include a plurality of wordlines and a plurality of bitlines. The plurality of wordlines in the... Agent: Dugan & Dugan, PC

20080184006 - Method and system for preloading page using control flow: A method and system for page preloading using a control flow are provided. The method includes extracting preload page information from one or more pages in a first program code, and generating a second program code including the first program code and the extracted preload page information. The second program... Agent: F. Chau & Associates, LLC

  
07/24/2008 > patent applications in patent subcategories. cataloged by category listing

20080177928 - Semiconductor memory device which includes memory cell having charge accumulation layer and control gate: A semiconductor memory device includes a memory cell array, a power source circuit, a sense amplifier, a control circuit, and a processor. The memory cell array includes a nonvolatile memory cell. The power source circuit includes a first register and generates a voltage. The sense amplifier includes a second register,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.

20080177927 - Storage apparatus and method for accessing a storage apparatus: A storage apparatus and an accessing method for the storage apparatus are provided. The storage apparatus comprises a plurality of data blocks, a plurality of spare blocks, and a calculation apparatus. The calculation apparatus is configured to (1) confirm whether a written block has to be updated, (2) select one... Agent: Grossman, Tucker, Perreault & Pfleger, Pllc

20080177929 - System, method and storage medium for a memory subsystem command interface: A system for implementing a memory subsystem command interface, the system including a cascaded interconnect system including one or more memory modules, a memory controller and a memory bus. The memory controller generates a data frame that includes a plurality of commands. The memory controller and the memory module are... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20080177931 - Byte mask command for memories: A system is presented that facilitates masking data in write data bound for a memory device. The system contains a memory controller and a memory array communicatively coupled to the memory controller. The memory controller sends a write command and write data to the memory array and the memory array... Agent: Amin, Turocy & Calvin, LLP

20080177933 - Defective memory block remapping method and system, and memory device and processor-based system using same: A non-volatile memory device includes a block remapping system that offsets an input block address by the addresses of non-functional blocks to provide an output block address that is used to address the memory device. The system generates the output block addresses by, in effect, adding to the input block... Agent: Dorsey & Whitney LLP Intellectual Property Department

20080177930 - Fully associative banking for memory: A system is provided that facilitates read access in a memory device. The system comprises a plurality of row addresses buffers that store high order addresses associated with one or more software threads. The system further comprises a plurality of row data buffers. The row data buffers are each associated... Agent: Amin, Turocy & Calvin, LLP

20080177938 - Hybrid hard disk drive, computer system including the same, and flash memory dma circuit for hybrid hdd: Provided are a hybrid hard disk drive (HDD), a computer system including the hybrid HDD, and a flash memory DMA circuit for the hybrid HDD. The hybrid HDD includes a flash memory. The flash memory includes: a main memory region; and a spare memory region storing additional information necessary for... Agent: Mills & Onello LLP

20080177934 - Memory systems having a multilevel cell flash memory and programming methods thereof: A method of programming a multilevel cell flash memory includes dividing a memory cell array of the flash memory into a user block and a cache block, programming first LSB data into a page of the user block, programming first MSB data into the page of the user block after... Agent: Myers Bigel Sibley & Sajovec

20080177935 - Method and system for facilitating fast wake-up of a flash memory system: Methods for maintaining data structures in accordance with the events of a nonvolatile memory system. At least part of one or more management tables and a future information data structure are stored in a nonvolatile memory. The future information data structure contains records of events expected to occur subsequent to... Agent: Mark M. Friedman

20080177936 - Method and system for facilitating fast wake-up of a flash memory system: Systems and computer readable codes for maintaining data structures in accordance with the events of a nonvolatile memory system. At least part of one or more management tables and a future information data structure are stored in a nonvolatile memory. The future information data structure contains records of events expected... Agent: Mark M. Friedman

20080177932 - Pin strap setting override system and method: A pin strap setting override system comprises logic configured to determine whether a pin strap setting for at least one feature of an integrated circuit (IC) is set to enable, the logic further configured to automatically override the enable pin strap setting if a flag stored in a memory indicates... Agent: Hewlett Packard Company

20080177937 - Storage apparatus, computer system, and method for managing storage apparatus: A storage apparatus includes flash memory, second memory for storing an address translation table, and a control section. The flash memory is formed of multiple pages, each having a spare area, and data is stored on a page-by-page basis. The control section has functions of: saving the table to the... Agent: Rader Fishman & Grauer Pllc

20080177939 - Transaction-safe fat file system improvements: Concepts for enhancing operation of transaction-safe file allocation table systems are described. The concepts include writing a file to non-volatile memory media and rendering an update of file size to the TFAT storage medium; and receiving a request to locate data in a non-volatile memory having a TFAT file management... Agent: Lee & Hayes Pllc

20080177942 - 276-pin buffered memory module with enhanced fault tolerance: A dual inline memory module (DIMM) includes a card having a length of about 151.2 to about 151.5 millimeters, a plurality of individual local memory devices attached to the card, and a buffer device attached to the card, the buffer device configured for converting a packetized memory interface. The card... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20080177940 - Memory buffer for an fb-dimm: A memory buffer for an FB-DIMM having a first input/output interface for communicating with a memory controller at a first payload data rate and a second input/output interface for communicating with memory packages at a second payload data rate, wherein a relation of the first payload data rate to the... Agent: Slater & Matsil, L.l.p.

20080177941 - Method of managing memory in multiprocessor system on chip: Provided is a method of managing memory in a multiprocessor system on chip (MPSoC). According to an aspect of the present invention, locality of memory can be reflected and restricted memory resources can be efficiently used by determining a storage location of a variable or a function which corresponds to... Agent: Staas & Halsey LLP

20080177943 - Method and system for using dynamic random access memory as cache memory: A cache memory system and method includes a DRAM having a plurality of banks, and it also includes 2 SRAMs each having a capacity that is equal to the capacity of each bank of the DRAM. In operation, data read from a bank of the DRAM are stored in one... Agent: Edward W. Bulchis, Esq. Dorsey & Whitney LLP

20080177944 - Butterfly match-line structure and search method implemented thereby: The present invention discloses a butterfly match-line structure and a search method implemented thereby, wherein the parallelism of the match lines is increased to shorten the search time, and a butterfly-type connection is used to reduce the power consumption and achieve the best energy efficiency. Via the butterfly-type connection, information... Agent: Sinorica, Llc

20080177945 - Method of and apparatus for recording data on write-once disc, method of and apparatus for reproducing data from write-once disc, and write-once disc therefor: A write-once disc includes: a plurality of update areas in which a predetermined kind of updated information is recorded; at least one main access information area in which main access information is recorded, the main access information indicating a final update area in which finally updated information is recorded among... Agent: Stein, Mcewen & Bui, LLP

20080177946 - Method, system and media for improved operation of a device in a foreign domain: A computer-readable medium having stored thereon executable instructions for performing a method comprising detecting presence of a SATA device in the process of spinning up, and creating a target which comprises default information relating to the SATA device.... Agent: Andrea E. Tran Pramudji Wendt & Tran, LLP

20080177947 - Storage system and storage migration method: This system is provided with a host apparatus inputting and outputting requests for data, a migration source storage apparatus having logical unit(s) correlated to storage regions of physical devices for storing the data, a migration destination storage apparatus having logical unit(s), an editing unit for editing configuration control information relating... Agent: Sughrue Mion, Pllc

20080177949 - Memory system having low power consumption: A memory system selectively sets signaling modes based on stack position information. The memory system includes a memory module having at least one semiconductor memory device and a memory controller configured to set a signaling mode based on stack position information of each of the semiconductor memory devices. A signaling... Agent: Mills & Onello LLP

20080177948 - Method and apparatus for managing placement of data in a tiered storage system: When a client access a file in a tiered storage system, the storage controller determines which tier is appropriate to store the file based on which client is accessing it and what operation is being performed. In one exemplary implementation, the tiered storage system receives a data access request corresponding... Agent: Sughrue Mion, Pllc

20080177950 - Information processing device and program: The present invention provides an information processing device for estimating usage of contents and properly limiting functions realized through use of the contents in accordance with the estimation. Usage of contents is estimated by determining in which of cache memory means and content storage means the contents are stored. When... Agent: Brinks Hofer Gilson & Lione

20080177951 - Design stucture for multi-level memory architecture with data prioritization: A design structure for controlling computer-readable memory includes a plurality of memory locations, a usage frequency of a data unit stored in a first memory location is determined. The data unit is moved to a second memory location, different from the first memory location that is selected based on a... Agent: Ibm Corporation

20080177952 - Method and apparatus for setting cache policies in a processor: According to the methods and apparatus taught herein, processor caching policies are determined using cache policy information associated with a target memory device accessed during a memory operation. According to one embodiment of a processor, the processor comprises at least one cache and a memory management unit. The at least... Agent: Qualcomm Incorporated

20080177953 - Cache member protection with partial make mru allocation: A method and apparatus for enabling protection of a particular member of a cache during LRU victim selection. LRU state array includes additional “protection” bits in addition to the state bits. The protection bits serve as a pointer to identify the location of the member of the congruence class that... Agent: Dillon & Yudell LLP

20080177955 - Achieving both locking fairness and locking performance with spin locks: A method for implementing a spin lock in a system including a plurality of processing nodes, each node including at least one processor and a cache memory, the method including steps of: acquiring exclusivity to the cache memory; checking the availability of the spin lock; setting the spin lock to... Agent: Michael Buchenhorner, P.a.

20080177954 - Method and apparatus for quickly accessing backing store metadata: A method, device, and system are provided for accessing metadata in a data storage system. More specifically, a requesting application requests a cache application to allocate a cache page to retrieve metadata from a storage device. After metadata is written to the cache page, the cache page is locked by... Agent: Sheridan Ross Pc

20080177956 - Page-based failure management for flash memory: A page-based failure management system for flash memory includes at least one flash memory device which includes at least one page and at least one operable page. The system also includes an indication of operability of the at least one page in the at least one flash device.... Agent: Steven L. Nichols Rader, Fishman & Graver Pllc

20080177957 - Deletion of rollback snapshot partition: A method, device, and system are provided for rollback of a master volume in a data storage system. More specifically, when a rollback is requested, snapshots that are involved in the rollback can be deleted during the rollback. This is accomplished by deleting the snapshot partition but not the actual... Agent: Sheridan Ross Pc

20080177958 - Selection of data mover for data transfer: Provided are a method, system, and article of manufacture wherein a set of communication paths between a plurality of data movers and a plurality of storage devices is maintained. A request to transfer data from a source storage device to a target storage device is received, wherein the source storage... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080177959 - System and method for executing transactions: A method for executing transactions including obtaining a memory location required by a first transaction, where the first transaction is identified using a first transaction identification and a first transaction version; determining a second transaction with ownership of a memory group including the memory location, where the second transaction is... Agent: Osha Liang L.l.p./sun

20080177963 - Bandwidth sizing in replicated storage systems: Embodiments include methods, apparatus, and systems for determining bandwidth in storage systems. One embodiment includes a method receiving a recovery point objective (RPO) for a disaster recovery (DR) system that uses asynchronous replication. The method then computes a queue depth for queued data waiting to be transmitted to a secondary... Agent: Hewlett Packard Company

20080177965 - Data backup device and data backup method: A backup data validity deciding flag 11 showing whether backup data is in a state of validity or invalidity is used to shelter data stored in a backup source storing medium 20 to a backup destination storing medium 21 and the flag 11 is changed to a validity. Further, when... Agent: Mcdermott Will & Emery LLP

20080177962 - Data storage resynchronization using application features: A data storage resynchronization system is provided. The system includes a primary site having a primary server, primary storage unit, primary replication agent, and a primary storage controller. Data is written to primary pages on the primary storage unit upon receiving a command to do so from the primary server.... Agent: Jeffrey P. Aiello Ibm Corporation, Intellectual Property Law Dept.

20080177960 - Export of logical volumes by pools: A virtual tape server for implementing a method for exporting one or more logical volumes contained in a source physical volume pool. The method involves an activation of an export clone pool to clone an identity of the source physical volume pool into the export clone pool based on the... Agent: Frank C. Nicholas Cardinal Law Group

20080177961 - Partial backup and restore with backup versioning: A backup operation is performed on a source data set. The data set is segmented into a plurality of blocks. An update bit indicator is implemented for each of the plurality of blocks. The update bit indicator is appended to a field of an existing data index or tied to... Agent: Ingrassia Fisher & Lorenz, P.c. (ibm)

20080177964 - Remote copy system: Provided is a remote copy system capable of guaranteeing the time ordering of data to be handled by a remote site even when the tasks at the remote site are operated across a plurality of storages or a plurality of volume groups. A consistency group consisting of a secondary journal... Agent: Stanley P. Fisher Reed Smith LLP

20080177966 - Method having data locations accessible by different devices having data locations accessible by different devices in accordance with different permissions: Memory corruption can be suppressed. When data stored in a random access area are read, the read data (physical block) are retrieved by a logic block number and newest data are read by referring to an incremental counter of data having that logic block number. When data are stored in... Agent: Bell, Boyd & Lloyd, LLP

20080177967 - Logical unit security for clustered storage area networks: A system is described in which a plurality of host computers are coupled to a storage system for storing and retrieving data in the storage system. The storage system includes individually addressable units of storage such as volumes or logical unit numbers. A security management system controls access to each... Agent: Townsend And Townsend And Crew, LLP

20080177968 - Random stimuli generation of memory maps and memory allocations: s

20080177969 - Remote inventory of devices: Mechanisms are provided to inventory groupings of components, e.g., the physical chassis of a networking device as well as the various cards, modules, and/or blades inserted within the chassis. The inventory may be performed remotely. Some implementations also provide mechanisms to determine remotely the physical location of the asset. Preferred... Agent: Beyer Weaver LLP

20080177971 - Systems and methods for detecting and mitigating storage risks: The present invention provides systems and methods for data storage. A hierarchical storage management architecture is presented to facilitate data management. The disclosed system provides methods for evaluating the state of stored data relative to enterprise needs by using weighted parameters that may be user defined. Also disclosed are systems... Agent: Perkins Coie LLP Patent-sea

20080177970 - Systems and methods for storage modeling and costing: The present invention provides systems and methods for data storage. A hierarchical storage management architecture is presented to facilitate data management. The disclosed system provides methods for evaluating the state of stored data relative to enterprise needs by using weighted parameters that may be user defined. Also disclosed are systems... Agent: Perkins Coie LLP Patent-sea

20080177973 - Determining on demand right size buffering within a socket server implementation: Method, apparatus and article of manufacture for acquiring a buffer after data from a remote sender (e.g., client) has been received by a local machine (e.g., server). Because the client data has already been received when the buffer is acquired, the buffer may be sized exactly to the size of... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20080177972 - Memory management method and system: Wireless headphones receive music and video from media devices via different wireless transmission methods such as using Bluetooth. However, wireless headphones suffer from limitations despite the convenience they offer to users. Some such wireless headphones allow one user to share the music experience by passing one side of the wireless... Agent: Conley Rose, P.c. David A. Rose

20080177976 - Autonomically adjusting one or more computer program configuration settings when resources in a logical partition change: A computer program communicates with a partition manager in the logical partition where the computer program is run. When resource allocation in the logical partition dynamically changes, the partition manager notifies the computer program of the configuration change. The computer program may autonomically adjust one or more configuration settings that... Agent: Martin & Associates, Llc

20080177977 - Autonomically adjusting one or more computer program configuration settings when resources in a logical partition change: A computer program communicates with a partition manager in the logical partition where the computer program is run. When resource allocation in the logical partition dynamically changes, the partition manager notifies the computer program of the configuration change. The computer program may automatically adjust one or more configuration settings that... Agent: Martin & Associates, Llc

20080177975 - Database management system for controlling setting of cache partition area in storage system: A database management system comprises a setting processor and an instruction sending unit. The setting processor determines the size related to each cache partition area associated with each database buffer on the basis of the size related to the each database buffer. The setting processor also produces a partition setting... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080177974 - System and method for reducing memory overhead of a page table in a dynamic logical partitioning environment: A system and method for reducing memory overhead of a page table in a dynamic logical partitioning (LPAR) environment are provided. Each LPAR, upon its creation, is allowed to declare any maximum main memory size for the LPAR as long as the aggregate maximum main memory size for all LPARs... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.c.

20080177978 - Integrating data from symmetric and asymmetric memory: Data stored within symmetric and asymmetric memory components of main memory is integrated by identifying a first data as having access characteristics suitable for storing in an asymmetric memory component. The first data is included among a collection of data to be written to the asymmetric memory component. An amount... Agent: Fish & Richardson P.c.

  
07/17/2008 > patent applications in patent subcategories. cataloged by category listing

20080172515 - Memory controller connectivity: A memory controller with an interface for providing a connection to a plurality of memory devices at least one of said plurality of memory devices supporting burst mode data transfers comprises data interface circuitry for connecting to a plurality of separate data buses for communicating data signals between said memory... Agent: Nixon & Vanderhye, PC

20080172516 - Multiprocessor system and method thereof: A multiprocessor system and method thereof are provided. The example multiprocessor system may include first and second processors, a dynamic random access memory having a memory cell array, the memory cell array including a first memory bank coupled to the first processor through a first port, second and fourth memory... Agent: Harness, Dickey & Pierce, P.L.C

20080172523 - Flash memory module, storage apparatus using flash memory module as storage medium, and address translation table verification method for flash memory module: A flash memory controller having memory that stores an address translation table for translating between a logical page address and a physical page address in the flash memory chip controls regular mode and low power consumption mode of operating at lower power consumption than in regular mode by halting operation,... Agent: Stanley P. Fisher Reed Smith LLP

20080172522 - Information processing apparatus and incremental write type file management software: An information processing apparatus has a common incremental write type file system allowing an incremental write type file access, including an incremental write type file write, to an incremental write type optical recording medium and a non-volatile semiconductor memory device.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080172517 - Mask-programmable memory with reserved space: The present invention discloses a mask-programmable memory with reserved space (RS-MPM). It is released in a sequence of versions. In the original version, its storage space comprises a reserved space, which does not store any meaningful information. In the later version, the reserved space stores new release. RS-MPM can be... Agent: Guobiao Zhang

20080172521 - Memory system determining storage mode according to host provided data information: Some embodiments of the present invention provide a memory system including a flash memory including a plurality of memory cells and a memory controller configured to receive data information from a host and to selectively store data in the flash memory in single-bit and multi-bit storage modes responsive to the... Agent: Myers Bigel Sibley & Sajovec

20080172519 - Methods for supporting readydrive and readyboost accelerators in a single flash-memory storage device: Methods for enhancing the performance of a host system including the steps of: providing an operating system, running on the host system, that supports a ReadyDrive and ReadyBoost accelerator; and providing a flash-memory storage device, which supports both the accelerators, having a single flash-memory module. Preferably, the method further includes... Agent: Mark M. Friedman

20080172520 - Nonvolatile memory devices including multiple user-selectable program modes and related methods of operation: A memory device includes a flash memory, a memory controller, and an MLC mode selector. The flash memory includes at least one memory cell configured to store multi-bit data therein. The MLC mode selector is configured to generate a mode selection signal indicating whether to store single-bit data or multi-bit... Agent: Myers Bigel Sibley & Sajovec

20080172518 - Systems for supporting readydrive and readyboost accelerators in a single flash-memory storage device: The present invention discloses a flash-memory storage device for implementing both ReadyBoost and ReadyDrive Windows PC accelerators, the device including: a single flash-memory module adapted to be configured as a ReadyBoost accelerator and as a ReadyDrive accelerator; and a controller for controlling the flash-memory module. Preferably, the device further includes:... Agent: Mark M. Friedman

20080172524 - Systems and methods for utilizing an extended translation look-aside buffer having a hybrid memory structure: Extended translation look-aside buffers (eTLB) for converting virtual addresses into physical addresses are presented, the eTLB including, a physical memory address storage having a number of physical addresses, a virtual memory address storage configured to store a number of virtual memory addresses corresponding with the physical addresses, the virtual memory... Agent: Stevens Law Group

20080172525 - Storage system and method of controlling a storage system: A storage system includes a plurality of disk drives, and a disk controller for controlling the plurality of disk drives. The plurality of disk drives are configured from a plurality of virtual devices, to which logical devices are allocated. The disk controller apparatus comprises a channel adapter connected to the... Agent: Stanley P. Fisher Reed Smith LLP

20080172527 - Exchange 2.5\" to 3.5\" redundant array of independent disks module: A redundant array of independent disks (RAID) module converted from a 2.5-inch specification to a 3.5-inch specification is characterized in that two 2.5-inch SATA hard disks are installed within a standard 3.5-inch SATA RAID module, so as to form a RAID having two hard disks or two stand-alone SATA hard... Agent: Troxell Law Office PLLC

20080172526 - Method and system for placement of logical data stores to minimize request response time: Logical data stores are placed on storages to minimize store request time. The stores are sorted. A store counter and a storage counter are each set to one. (A), (B), and (C) are repeated until the storage counter exceeds the number of storages within the array. (A) is setting a... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20080172528 - Storage system: A disk array includes a drive management unit, which is a program for identifying kinds of disk devices and managing different disk devices separately, and a drive management table for storing information to be utilized by the drive management unit. The disk array further includes a program for managing accumulated... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080172529 - Novel context instruction cache architecture for a digital signal processor: Improved thrashing aware and self configuring cache architectures that reduce cache thrashing without increasing cache size or degrading cache hit access time, for a DSP. In one example embodiment, that is accomplished by selectively caching only the instructions having a higher probability of recurrence to considerably reduce cache thrashing.... Agent: GlobalIPServices PLLC

20080172530 - Apparatus and method for managing stacks for efficient memory usage: An apparatus and method for managing stacks for efficient memory usage. The apparatus includes a fault cause analysis unit to recognize a page fault caused by a marking page; a control unit to set the marking page, to request compression of a first stack page depending on whether a page... Agent: Stein, Mcewen & Bui, LLP

20080172531 - Data-aware cache state machine: Management of a Cache is provided by differentiating data base on attributes associated with the data and reducing storage bottlenecks. The Cache differentiates and manages data using a state machine with a plurality of states. the Cache may use data patterns and statistics to retain frequently used data in the... Agent: Darby & Darby P.C.

20080172532 - Apparatus for performing and coordinating data storage functions: A storage processor is constructed on or within an interconnected circuit (IC) chip. The storage processor has a plurality of ports operable to send and/or receive messages to/from storage devices. An output indication circuit is associated with each output port. The indication circuit indicates that data is ready to be... Agent: J. Davis Gilmer

20080172533 - Detector to search for control data: Implementations related to detecting control data are presented herein. A detector searches for control data in a first set of pre-determined control data, wherein a respective subset of the first set is assigned to a respective logical port and the respective subset is excluded from the first set when searching... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Qimonda

20080172534 - Memory controller and method of controlling a memory: A memory controller includes a control circuit configured to provide a control signal, an output interface unit, and a command storage unit coupled to the control circuit and the output interface. The command storage unit is configured to store a plurality of commands, receive the control signal, and provide, in... Agent: Dicke, Billig & Czaja

20080172535 - Buffering module set in optical disc drive and related method of buffering data: A method for buffering data when reading an optical disc is disclosed in the present invention. The method includes providing a memory page with a plurality of memory spaces corresponding to a memory space matrix with M rows×N columns, reading data stored in the optical disc to generate a block... Agent: North America Intellectual Property Corporation

20080172537 - Remote storage disk control device and method for controlling the same: A storage device system includes an information processing device, a first storage device equipped with a first storage volume, and a second storage device equipped with a second storage volume. The information processing device and the first storage device are communicatively connected to one another. Also, the first storage device... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080172536 - Storage system management based on a backup and recovery solution embedded in the storage system: A method and/or a system of storage system management based on a backup and recovery solution embedded in the storage system is disclosed. A method of a storage system includes coordinating with a host system through a backup coordinator module embedded in the host system during at least one of... Agent: Lsi Corporation

20080172538 - Page-protection based memory access barrier traps: A method, apparatus and computer program product for providing page-protection based memory access barrier traps is presented. A value for a user-mode bit (u-bit) is computed for each extant virtual page in an address space, the u-bit indicative that an object on the virtual page is being moved by a... Agent: Barry W. Chapin, Esq. Chapin Intellectual Property Law, LLC

20080172539 - Systems and methods for memory migration: Systems, methods and media for performing auto-migration of data among a plurality of memory devices are disclosed. In one embodiment, memory access of application program data is monitored for each of one or more application programs. The data may be stored in one or more of a plurality of memory... Agent: Ibm Corporation (jss) C/o Schubert Osterrieder & Nickelson PLLC

20080172540 - Asynchronous data interface: An interface system is disclosed. In one embodiment, the system includes a buffer that receives data from a source in a first clock domain and stores the data to be read by a destination in a second clock domain, wherein the buffer functions in both the first clock domain and... Agent: Sawyer Law Group LLP

20080172541 - Data management apparatus and method: A data management apparatus and method. The data management apparatus includes an input unit to receive a request to update information included in a predetermined master BAT (block allocation table) block of a plurality of master BAT blocks; and an update unit to record updated information to the predetermined master... Agent: Stein, Mcewen & Bui, LLP

20080172542 - Hierarchy of a structure of a volume: A method, apparatus and system of a hierarchy of a structure of a volume is disclosed. In one embodiment, a system includes a physical volume, a structure to provide a mapping to a location of a data segment of the physical volume that may include a table having a hierarchy,... Agent: Lsi Logic Corporation

20080172543 - Device, method and computer program product for multi-level address translation: A method for retrieving information from a storage unit, the method includes: receiving, by an input output memory management unit second-level translation information representative of a partition of a storage unit address space; receiving, by a input output memory management unit, a direct memory access request that comprises a consumer... Agent: Ibm Corporation, T.j. Watson Research Center

20080172544 - Method and apparatus to search for errors in a translation look-aside buffer: A method and apparatus for discovering errors in a translation look-aside buffer (TLB). The TLB comprises a content addressable memory (CAM) and a random access memory (RAM). The TLB contains additional logic to check for error when the TLB is not in normal use to translate from a first set... Agent: Hewlett Packard Company

20080172545 - System and method for accessing and displaying interactive content and advertising: System and method for accessing and displaying personal information along with advertisement, software applications, or the like. The system and method include: retrieving from a memory device a unique identifier and a pointer; retrieving a redirect pointer from a pointer table responsive to the retrieved unique identifier and pointer; executing... Agent: Blakely Sokoloff Taylor & Zafman

  
07/10/2008 > patent applications in patent subcategories. cataloged by category listing

20080168209 - Data protection via software configuration of multiple disk drives: A data storage system and a method for managing a data storage system are provided. A storage controller is programmed with a disk configuration for each of one or more logical disk arrays and a protection level k. The available storage space from one or more disk drives in the... Agent: Law Office Of Dan Shifrin, PC - Ibm

20080168211 - Controlling preemptive work balancing in data storage: A storage network control apparatus is operable to present virtualized storage to a host system and includes a monitoring component, an analysis component, a detection component, and a migration component. The monitoring component is for monitoring input/output (I/O) activity for virtual storage logical units over time. The analysis component is... Agent: Law Offices Of Michael Dryja

20080168210 - Method, medium and apparatus managing memory: A method and apparatus for managing a memory are provided. It is possible to rapidly recover the area allocated or desired to be returned by easily recognizing a range of the area allocated or desired to be returned over the entire area of the memory by recognizing an original area... Agent: Staas & Halsey LLP

20080168214 - Memory system and method using scrambled address data: A memory system and a method of provided scrambled address data are disclosed. The method includes converting external address data into row and column addresses provided to a flash memory device, and designating certain scrambled address data values within the external address data and ignoring a current data access operation... Agent: Volentine & Whitt PLLC

20080168216 - Memory system, multi-bit flash memory device, and associated methods: A memory system includes a multi-bit flash memory device and a flash controller configured to control the multi-bit flash memory device. The flash controller is configured to output a series of commands, pointers, and addresses to the multi-bit flash memory device for read/program operations.... Agent: Lee & Morse, P.C.

20080168213 - Method for guarantying data storing space using dual journaling: [Problem] Since JFFS, which is used as an existing method of storing data in a flash memory, stores all data sequentially according to a generated order, pure data of a file system and metadata for managing the pure data must be sequentially stored. Thus, when a PC is turned on... Agent: Townsend And Townsend And Crew, LLP

20080168215 - Storing information in a memory: Systems and methods, including computer software products, can be implemented for updating or modifying stored data. Multiple variables are represented by one or more cell values in a memory. Each variable is associated with one or more of the cell values and at least one single cell value influences a... Agent: Fish & Richardson P.C.

20080168212 - Techniques for audio and image capture: Techniques are provided for capturing audio and image information. A capture device may be used to capture audio and/or image information. The device includes at least one of an audio and a image capturing component for capturing information, a flash memory, and a button for use in connection with controlling... Agent: Microsoft Corporation

20080168217 - Memory refresh system and method: A memory device includes a memory array containing a plurality of memory addresses. An input terminal receives a requested one of the memory addresses and a memory controller is configured to refresh a first refresh address in response to a comparison of the received memory address and the first refresh... Agent: Dicke, Billig & Czaja

20080168218 - Backup system with continuous data protection: The system includes a host, a backup server, a storage system having a journaling capability described above and a media library system. The storage system makes snapshots for restoring with journal at predetermined intervals in accordance with established process. Moreover, in correspondence to an instruction of the 1st type from... Agent: Sughrue Mion, PLLC

20080168219 - Using idle mode prediction to improve storage system performance: Techniques for optimizing hard disk drive performance. According to one embodiment, a storage system includes a storage unit that stores data and a controller. The controller receives an idle mode indication and performs at least one operation based on the idle mode indication. According to another embodiment, a host system... Agent: Steven J. Cahill/ Hitachi Gst

20080168221 - Computer storage system: According to one embodiment, a computer storage system includes one or more redundant storage servers coupled to one or more cache servers. A redundant storage server is coupled to each disk server. A disk server comprises at least one mass storage disk operable to store data. The data is segmented... Agent: Baker Botts LLP

20080168220 - Using different algorithms to destage different types of data from cache: Provided are a method, system, and article of manufacture for using different algorithms to destage different types of data from cache. A first destaging algorithm is used to destage a first type of data to a storage for a first duration. A second destaging algorithm is used to destage a... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080168226 - Correction method for reading data of disk array system: A correction method for reading data of a disk array system used for data security and backup of RAID 1 specifies one or more buffers for storing and reading data and an extra buffer. The buffers store data read by the disk array system from a computer system, and the... Agent: Bacon & Thomas, PLLC

20080168224 - Data protection via software configuration of multiple disk drives: A data storage system and a method for managing a data storage system are provided. A storage controller is programmed with a disk configuration for each of one or more logical disk arrays and a protection level k. The available storage space from one or more disk drives in the... Agent: Law Office Of Dan Shifrin, PC - Ibm

20080168227 - Disk array optimizing the drive operation time: In accordance with one embodiment of the invention, a storage system is configured as at least one logical unit including at least one disk device; a controller for executing a read processing or a write processing of data having been stored or to be stored in the logical unit which... Agent: Townsend And Townsend And Crew, LLP

20080168222 - Mirrored redundant array of independent disks (raid) random access performance enhancement: Provided are techniques for processing read and write request operations. Regions of a first storage device and a second storage device are designated as primary regions and secondary regions for read request operations and write request operations falling within the regions. At least one write request operation is processed. Upon... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080168225 - Providing enhanced tolerance of data loss in a disk array system: Systems, methods, and computer program products for enhancing tolerance of data loss in a disk array system have been provided. Systems include a redundant array of independent disks (RAID) storage system including an array of hard disk devices (HDDs) organized in a two dimensional structure of rows and columns of... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20080168223 - System, method, and module for reducing power states for storage devices and associated logical volumes: A system, method, and module for reducing power states for storage devices and associated logical volumes are disclosed. In one form, a method of altering an operating state of a storage device can include detecting a request to access a first logical volume over an interval. The method can also... Agent: Larson Newman Abel Polansky & White, LLP

20080168228 - Virtualization engine and method, system, and computer program product for managing the storage of data: A storage management method for use in a storage area network is provided. The storage area network comprises a plurality of host data processors coupled to a virtualization engine, which is coupled to a plurality of physical storage media. Each physical storage media is assigned a tier level. The method... Agent: Zilka-kotab, PC- Ibm

20080168229 - Method of caching data assets: There is provided a method of caching data assets in a system (10) comprising at least one server (20) and at least one user device (50). Each device (50) includes a cache arrangement (120, 130, 140) comprising a plurality of caches (120, 130, 140) for storing requested data assets therein.... Agent: Philips Intellectual Property & Standards

20080168230 - Color-based cache monitoring: Color-based caching allows each cache line to be distinguished by a specific color, and enables the manipulation of cache behavior based upon the colors of the cache lines. When multiple threads are able to share a cache, effective cache management is critical to overall performance. Color-based caching provides an effective... Agent: Ference & Associates LLC

20080168231 - Memory with shared write bit line(s): A memory includes at least one write bit line and a plurality of memory cells. The at least one write bit line is configured to carry a write bit signal. The plurality of memory cells are arranged in a column and are configured to be selectively coupled to the at... Agent: Dillon & Yudell LLP

20080168233 - Cache circuitry, data processing apparatus and method for handling write access requests: Cache circuitry, a data processing apparatus including such cache circuitry, and a method of handling write requests within cache circuitry, are provided. The cache circuitry has a plurality of slots, with each slot arranged to store attributes associated with a pending access request. A record of identifiers that are available... Agent: Nixon & Vanderhye, PC

20080168232 - Cache memory and control method thereof: A cache memory according to the present invention includes: a W flag setting unit (40) that modifies order data indicating an access order per cache entry that holds a data unit of a cache so as to reflect an actual access order; and a replace unit (39) that selects a... Agent: Greenblum & Bernstein, P.L.C

20080168234 - Managing write requests in cache directed to different storage groups: Provided are a method, system, and article of manufacture for managing write requests in cache directed to different storage groups. A determination is made of a high and low thresholds for a plurality of storage groups configured in a storage, wherein the high and low thresholds for one storage group... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080168235 - Memory management methods and systems: A method and an apparatus for determining a usage level of a memory device to notify a running application to perform memory reduction operations selected based on the memory usage level are described. An application calls APIs (Application Programming Interface) integrated with the application codes in the system to perform... Agent: Apple Computer, Inc./blakely

20080168236 - Performance of a cache by detecting cache lines that have been reused: A method and system for improving the performance of a cache. The cache may include an array of tag entries where each tag entry includes an additional bit (“reused bit”) used to indicate whether its associated cache line has been reused, i.e., has been requested or referenced by the processor.... Agent: Robert A. Voigt, Jr. Winstead Sechrest & Minick PC

20080168237 - Cache coherence monitoring and feedback: Color-based caching allows each cache line to be distinguished by a specific color, and enables the manipulation of cache behavior based upon the colors of the cache lines. When multiple threads are able to share a cache, effective cache management is critical to overall performance. Color-based caching provides an effective... Agent: Ference & Associates LLC

20080168238 - Coordination of multiprocessor operations with shared resources: In managing multiprocessor operations, a first processor repetitively reads a cache line wherein the cache line is cached from a line of a shared memory of resources shared by both the first processor and a second processor. Coherency is maintained between the shared memory line and the cache line in... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080168239 - Architecture support of memory access coloring: Memory Access Coloring provides architecture support that allows software to classify memory accesses into different congruence classes by specifying a color for each memory access operation. The color information is received and recorded by the underlying system with appropriate granularity. This allows hardware to monitor color-based cache monitoring information and... Agent: Ference & Associates LLC

20080168240 - Storage apparatus, and storage control method using the same: The present invention aims at providing a storage apparatus that does not increase the I/O load on a primary volume, even if there are several secondary volumes for which data consistency with the primary volume should be guaranteed. A storage apparatus writes write data for write access directed to a... Agent: Stanley P. Fisher Reed Smith LLP

20080168241 - Reducing memory access latency for hypervisor- or supervisor-initiated memory access requests: e

20080168243 - Recovery of a failed file transfer between a host and a data storage device: Embodiments of the present invention relate to an apparatus, method and computer readable medium for recovering from a failed or aborted outgoing data transfer operation from a host device to a peripheral storage device. In some embodiments, before the peripheral storage device is corrupted by the failed outgoing data transfer... Agent: Mark M. Friedman

20080168242 - Sliding window mechanism for data capture and failure analysis: A computerized method, program product, and an autonomic data processing system for archiving real-time log data immediately upon the occurrence of an event. An application is executing and a logging application is obtaining real-time log data. The real-time log data is temporarily retained in a memory and when the memory... Agent: Hamre, Schumann, Mueller & Larson, P.c

20080168245 - Data backup for mobile device: Improved techniques and apparatus for managing data between a host device (e.g., host computer) and a media device are disclosed. The data being managed can, for example, pertain to media data for media assets. The managing of the media data thus can involve transfer of media assets between the host... Agent: Technology & Innovation Law Group, PC

20080168244 - Method for updating an image file: The present invention relates to a method for updating an image file that is performed by a server, when a workable image file pre-stored in a storage unit of said server needs to be updated by a new image file, that duplicates said workable image file to said storage unit... Agent: Bacon & Thomas, PLLC

20080168246 - Mirrored storage system and methods for operating a mirrored storage system: A mirrored storage system for applications is provided, which enables and supports the variation and dynamic adaptation of the Recovery Point Objectives (RPO) based on policies. Furthermore, methods are provided for running such a mirrored storage system. Said mirrored storage system comprises a first storage system and at least one... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20080168247 - Method and apparatus for controlling access to a data storage device: An apparatus comprises a data storage device, and a security partition in the data storage device containing information defining a time period in which a user is authorized to access data stored in the data storage device. A method performed by the apparatus is also provided.... Agent: Pietragallo Gordon Alfano Bosick & Raspanti, LLP

20080168248 - Key-controlled object-based memory protection: A method, system, and program key-controlled object-based memory protection are provided. A processing unit includes an authority check for controlling access by the processing unit to pages of memory according to whether a hardware protection key set currently loaded in an authority mask register allows access to the pages. In... Agent: Ibm Corp (ap) C/o Amy Pattillo

20080168249 - Method and system for determining optimal data layout using blind justice: Disclosed are a method and system for finding an optimal data layout. The approach of the present invention is to try one of several data layouts in the memory, measure the impact of said one data layout on a performance of a program, and decide which of said several data... Agent: Scully, Scott, Murphy & Presser, P.C.

20080168251 - Network system and method for setting volume group in the network system: Storage network arrangements effecting a method including: acquiring information on the real volumes, and port information on the physical devices in which the real volumes reside; creating virtual volumes being linked to the real volumes, based on the information on the real volumes; forming one or more virtual volume groups... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080168250 - Unified memory apparatus for reconfigurable processor and method of using the unified memory apparatus: A unified memory apparatus for a reconfigurable processor and a method of using the unified memory apparatus are provided. The unified memory apparatus includes: a first memory to store data; and a second memory to store configuration information used to reconfigure a system for a processor to perform a predetermined... Agent: Staas & Halsey LLP

20080168252 - Memory controller, nonvolatile storage device, nonvolatile storage system, and memory control method: The memory controller 114 includes a read-write memory 113 for temporarily storing the address management table 112, a memory control unit 122 for writing, in a nonvolatile memory 115, an address management table temporarily stored in the read-write memory and address range specifying information for specifying the changeover destination address... Agent: Greenblum & Bernstein, P.L.C

20080168253 - Method, system, and computer program products for data movement within processor storage: A method for moving the data between the memory addresses in a computer system in which data referenced by memory addresses is stored in physical memory. The method comprises providing a translation mechanism for mapping respective pages of contiguous memory addresses to corresponding locations in the physical memory in accordance... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20080168254 - Selectively invalidating entries in an address translation cache: An apparatus and method selectively invalidate entries in an address translation cache instead of invalidating all, or nearly all, entries. One or more translation mode bits are provided in each entry in the address translation cache. These translation mode bits may be set according to the addressing mode used to... Agent: Martin & Associates, LLC

  
07/03/2008 > patent applications in patent subcategories. cataloged by category listing

20080162775 - System for code execution: System for executing software application is provided. The system includes a non-volatile memory device that includes a plurality of memory cells, wherein a read only segment of a plurality of memory cells stores: (a) code for a micro-operating system for running a virtual engine; (b) code for the virtual engine... Agent: Klein, O'neill & Singh, LLP

20080162777 - Graph abstraction pattern for generic graph evaluation: Systems and processes may access data in various graph structures that are stored in various memories. An interface for a business interface to access data stored in a memory may be provided. The interface may retrieve the data independent of the graph structure of the data and/or the repository on... Agent: Fish & Richardson, P.c.

20080162776 - Identifying race conditions involving asynchronous memory updates: A method of identifying race conditions in a computer program can include identifying a call to a selected function specifying a memory range. The selected function can cause data to be written to the memory range asynchronously. The method further can include spraying the memory range with a predetermined bit... Agent: Cuenot & Forsythe, L.l.c.

20080162780 - Information terminal apparatus: An electronic data storage system using an electronic tally system capable of managing electronic data in a safe manner without deteriorating a user friendly function thereof, and an information terminal apparatus to which the electronic data storage system has been applied are provided. An information terminal apparatus includes an electronic... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080162778 - Methods of communicating data using inversion and related systems: A method may be provided to communicate a plurality of groups of output data bits representing a respective plurality of groups of input data bits over a data bus with each group of output data bits and each group of input data bits have an equal data width. Each of... Agent: Myers Bigel Sibley & Sajovec

20080162779 - Transparent data temperature sensitive cluster duplication: A method of selecting candidates for data cluster duplication that can be used as an alternative or as an addition to existing duplication techniques. The method determines a read temperature of a data cluster. If the read temperature of the data cluster exceeds a threshold value, a write temperature of... Agent: James M. Stover Teradata Corporation

20080162781 - Method, apparatus, and system for flash memory: Embodiments of the present invention provide apparatus, methods and systems that include a substrate including a central region and a peripheral region; a plurality of layers above a surface of the substrate, a first plurality of pitch-multiplied spacers on a top surface of the plurality of layer, the first plurality... Agent: Schwegman, Lundberg & Woessner, P.a.

20080162797 - Apparatus and method for archiving digital content: An improved memory card includes an interface for receiving content from an appliance, a primary memory, a secondary memory, and primary controller. The primary controller is configured to selectively write the content only on the primary memory card, or only on the secondary memory card, or on both memories. The... Agent: Mark M. Friedman

20080162792 - Caching device for nand flash translation layer: A caching device is positioned between a memory read/write controller and a flash memory, which contains an instruction register, a logical address register, a data register, a pair of auxiliary controllers, a microprocessor, an address translation unit, a flash memory address register, a caching control unit, and a caching instruction... Agent: Madson & Austin

20080162794 - Disk array system composed of solid state memory subsystems: A disk array system using solid state memory as storage media includes a controller and a plurality of memory subsystems electrically connected with the controller. The memory subsystem adopts RAID structure. Each of the memory subsystems is composed of a control unit and a plurality of solid state memories such... Agent: Hdsl

20080162783 - Dynamically updateable and moveable memory zones: A command is received to perform an update operation on a first component of code contained in a plurality of memory blocks in a memory. It is determined whether or not the update operation requires additional space, beyond that which is already allocated to the first component, to complete the... Agent: Motorola Inc

20080162786 - Flash memory wear leveling system and method: The wear leveling system and method spreads write cycles across a flash chip, thereby reducing repeated usage of the same areas of the flash chip, and facilitating even usage of all of the memory on the flash chip. When a delete operation occurs in the system and method, the deleted... Agent: Andrus, Sceales, Starke & Sawall, LLP

20080162795 - Hard disk cache device and method: A cache device comprises a hard disk, cache control unit and at least one flash memory, whereby the cache control unit controlling and regulating the flash memory as the hard disk cache device. The present invention method is defined by setting up a management table to manage each corresponding logical... Agent: Kirton And Mcconkie

20080162793 - Management method for reducing utilization rate of random access memory (ram) used in flash memory: A management method for reducing the utilization rate of random access memory (RAM) while reading data from or writing data to the flash memory is disclosed. A physical memory set is constructed from a plurality of physical memory blocks in the flash memory. A logical set is constructed from a... Agent: Madson & Austin

20080162788 - Memory controller with automatic command processing unit and memory system including the same: Provided is a memory controller configured to control a flash memory device. The memory controller includes: a buffer memory configured to store data to be written in the flash memory device; a buffer memory interface configured to control read and write operations of the buffer memory; and an automatic command... Agent: Myers Bigel Sibley & Sajovec

20080162789 - Memory system with backup circuit and programming method: Provided are a memory system and a program method. The memory system includes a flash memory and a memory controller. The flash memory stores first bit data and then stores second bit data in a multi-level memory cell. The memory controller includes a buffer memory temporarily storing the first bit... Agent: Volentine & Whitt Pllc

20080162785 - Method for code execution: Method for executing a software application is provided. The method includes detecting a host operating system; executing a virtual operating system in a virtual environment, wherein the virtual operating system is stored in a non-volatile memory device; and executing a software application in the virtual environment, wherein the software application... Agent: Klein, O'neill & Singh, LLP

20080162796 - Method for performing static wear leveling on flash memory: A method for performing a static wear leveling on a flash memory is disclosed. Accordingly, a static wear leveling unit is disposed with a block reclamation unit of either a flash translation layer or a native file system in the flash memory, and utilizes less memory space to trace a... Agent: Kirton And Mcconkie

20080162790 - Nand flash memory having c/a pin and flash memory system including the same: A NAND flash memory in which a command/address pin is separated from a data input/output pin. The NAND flash memory includes a memory cell array used for storing data, a command/address pin through which a command and an address are received for transmitting data in the memory cell array, and... Agent: F. Chau & Associates, Llc

20080162791 - Solid state storage element and method: A method and system for storing and retrieving data using flash memory devices. One example system includes an apparatus within a flash memory configuration. The flash memory configuration includes a plurality of memory cells, where each memory cell has a charge storage capacity for use in implementing digital storage. The... Agent: Workman Nydegger

20080162787 - System for block relinking: In accordance with various embodiments of the present invention, a system for block relinking during garbage collection is described. The system may include a non-volatile memory storage system including a memory configured to store a storage system firmware, a non-volatile memory cell array configured to maintain a first metablock, the... Agent: Weaver Austin Villeneuve Sampson LLP

20080162784 - Systems and methods for access violation management of secured memory: Systems and methods that facilitate processing data and securing data written to or read from memory. A processor can include a host memory interface that monitors all bus traffic between a host processor and memory. The host memory interface can analyze commands generated by the host processor and determine the... Agent: Amin, Turocy & Calvin, LLP

20080162782 - Using transacted writes and caching mechanism to improve write performance in multi-level cell flash memory: A method of writing a file to a flash memory is disclosed in which the file includes a number of data fragments and at least one sequence table. The method comprises writing the data fragments to a non-volatile memory; writing the at least one sequence table including sequence table entries... Agent: Blakely Sokoloff Taylor & Zafman

20080162798 - Wear leveling techniques for flash eeprom systems: A mass storage system made of flash electrically erasable and programmable read only memory (“EEPROM”) cells organized into blocks, the blocks in turn being grouped into memory banks, is managed to even out the numbers of erase and rewrite cycles experienced by the memory banks in order to extend the... Agent: Davis Wright Tremaine LLP - Sandisk Corporation

20080162800 - Computer, control method for virtual device, and program thereof: A computer in which functions of its resources are divided to realize a plurality of virtual computers 12 and which includes a plurality of physical devices. A managing unit of the computer, when usage of a virtual device has changed, selects a physical device compatible with the virtual device from... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080162799 - Mechanism for write optimization to a memory device: According to one embodiment, a memory controller is disclosed. The memory controller includes a scheduler to schedule memory transactions to the DIMM and a write address queue to accumulate the write requests while the memory controller is operating in a first mode and to release the write requests to the... Agent: Intel/blakely

20080162802 - Accessing memory using multi-tiling: An embodiment of the present invention is a technique to control memory access. An address pre-swizzle circuit conditions address bits provided by a processor according to access control signals. A data steering circuit connects to N sub-channels of memory to dynamically steer data for a memory access type including tiled... Agent: Intel/blakely

20080162801 - Series termination for a low power memory interface: Series termination for a high speed interface, such as a DDR2 interface, is disclosed. In some embodiments series termination may be used instead of on-die termination to reduce power consumption on a platform.... Agent: Intel Corporation C/o Intellevate, Llc

20080162804 - Magnetic disk apparatus and control method: According to one embodiment, a magnetic disk apparatus comprises a storage-medium unit including a storage medium, a magnetic-disk medium unit including a magnetic disk medium, a storing unit configured to store data transmitted from a host system in the storage medium, a first comparator configured to compare an input password... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20080162803 - Magnetic disk apparatus and method of controlling the same: According to one embodiment, a magnetic disk apparatus comprises a volatile memory for storing write commands and data accompanying the commands supplied from a host system, and a flush control unit for classifying the write commands into a first group of commands and a second group of commands based on... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20080162805 - Method and apparatus for using non-addressable memories of a computer system: A method for using non-addressable memory of a computer system is disclosed. Any system memory above an addressable memory limit of a computer system (i.e., non-addressable memory) is initially converted to a disk cache by a hypervisor. In response to a read request, the hypervisor intercepts the read request, and... Agent: Dillion & Yudell LLP

20080162811 - Alignment-unit-based virtual formatting methods and devices employing the methods: In various embodiments, the present invention provides virtual disk formatting by intermediate devices including: (1) a storage shelf router and the storage shelf in which the storage-shelf is included, to external computing entities, such as disk-array controllers and host computers; (2) an I/O controller; and (3) a storage-bridge device. Additional... Agent: Olympic Patent Works Pllc

20080162812 - Distributed storage array: Systems and methods for asynchronous backup of virtual disks in a distributed storage array are disclosed. An exemplary method may comprise receiving an IO stream at the virtual disks in the distributed storage array, writing data to one or more storage cells of the virtual disks in the distributed storage... Agent: Hewlett Packard Company

20080162807 - Method and apparatus for redundant memory arrays: Methods and apparatus for reducing memory access latencies in mirrored memory partitions (sometimes known as a RAID memory) are disclosed. A memory access request is received for a memory address. The memory partition mirrors may reside on different dual in-line memory modules (DIMMs), or alternatively they may reside on a... Agent: Intel/blakely

20080162809 - Operating system-independent remote accessibility to disk storage: A method, computer readable medium, and system are described. In one embodiment, the method comprises receiving a request to access data stored on at least one disk drive on a computer system, wherein the request originates from a location external to the computer system, and servicing the request without utilizing... Agent: Intel Corporation C/o Intellevate, Llc

20080162808 - Raid stripe layout scheme: A RAID storage system includes an outer stripe size that is an integer multiple J of a product of an inner stripe size and a number of data disks in a RAID disk set, where J is greater than one (1).... Agent: Fsp Llc

20080162806 - Storage accelerator: The present disclosure provides a method for generating RAID syndromes. In one embodiment the method may include loading a first data byte of a first disk block and a first data byte of a second disk block from a storage device to an arithmetic logic unit. The method may further... Agent: Grossman, Tucker, Perreault & Pfleger, Pllc C/o Intellevate, Llc

20080162810 - Storage subsystem configuration management method and device: Provided is a storage subsystem configuration management method for use in a computer system, comprising: obtaining storage configuration information and hardware resource use information; determining, based on the obtained hardware resource use information, a configuration of a storage subsystem so that a load is not concentrated on a specific hardware... Agent: Mattingly, Stanger, Malur & Brundidge, P.c.

20080162814 - Devices and methods of operating memory devices including power down response signals: A method of operating a storage device can include transferring system data generated by a controller circuit, in the storage device, to a non-volatile memory unit, in the storage device, responsive to a power down signal received from a host outside the storage device and power down response signal transmitted... Agent: Myers Bigel Sibley & Sajovec

20080162813 - Multiple logic media drive: A system, apparatus, method, and computer product that allow multiple host systems to read and write, in parallel, to a single media and/or tape drive unit, without conflict.... Agent: Cantor Colburn LLP - Ibm Tuscon Division

20080162817 - Method and system for caching metadata of a storage system: A management server maintains a set of metadata describing a storage structure of a storage server. In response to a change of the storage structure, the management server automatically updates the set of metadata. The management server also manages information indicating what portion of the set of metadata is cached... Agent: Network Appliance/blakely

20080162815 - Method and system to preview new cacheable content: A method to preview new cacheable content may include adding a skip-cache element to a request to preview the new cacheable content before replacing any existing content in a cache or caching the new content. The method may also include bypassing cache processing for the request in response to the... Agent: Moore & Van Allen, Pllc For Ibm

20080162816 - Obscuring memory access patterns: For each memory location in a set of memory locations associated with a thread, setting an indication associated with the memory location to request a signal if data from the memory location is evicted from a cache; and in response to the signal, reloading the set of memory locations into... Agent: Intel Corporation C/o Intellevate, Llc

20080162818 - Cache-memory control apparatus, cache-memory control method and computer product: A cache-memory control apparatus controls a level-1 (L1) cache and a level-2 (L2) cache having a cache line divided into a plurality of sub-lines for storing data from the L1 cache. The cache-memory control apparatus includes a control-flag adding unit, an L1 cache control unit, and an L2 cache control... Agent: Staas & Halsey LLP

20080162819 - Design structure for self prefetching l2 cache mechanism for data lines: A design structure for prefetching instruction lines is provided. The design structure is embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design. The design structure comprises a processor having a level 2 cache, and a level 1 cache configured to receive instruction lines from the... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20080162820 - Custom caching: Methods and systems are presented for custom caching. Application threads define caches. The caches may be accessed through multiple index keys, which are mapped to multiple application thread-defined keys. Methods provide for the each index key and each application thread-defined key to be symmetrical. The index keys are used for... Agent: Schwegman, Lundberg, Woessner & Kluth, P.a.

20080162821 - Hard disk caching with automated discovery of cacheable files: In some embodiments a permanent cache list of files not to be removed from a cache is determined in response to a user selection of an application to be added to the cache. The determination is made by adding a file to the cache list if the file is a... Agent: Intel Corporation C/o Intellevate, Llc

20080162822 - Memory apparatus, cache control method, and cache control program: A memory apparatus including: a cache control section to control a cache memory for an auxiliary storage apparatus; a volatile memory; and a nonvolatile memory, wherein the cache memory for the auxiliary storage apparatus is configured to have a volatile cache memory provided in the volatile memory and a nonvolatile... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080162823 - System and method for handling multiple aliased shadow register numbers to enhance lock acquisition: Exemplary embodiments include a method for enhancing lock acquisition in a multiprocessor system, the method including: sending a lock-load instruction from a first processor to a cache; setting a reservation flag for the first processor, storing a reservation address, storing a shadow register number, and sending lock data to the... Agent: Cantor Colburn LLP - Ibm Austin

20080162824 - Orthogonal data memory: A multi-ported orthogonal data memory (16) for effecting a corner-turning function, where for example data input as a sequence of bit-parallel word-serial data transfers are converted to data output in a bit-serial, word-parallel fashion, is described. The memory (16) is arranged to transfer data words comprising a plurality of data... Agent: Dinsmore & Shohl LLP

20080162825 - Method for optimizing distributed memory access using a protected page: A method for optimizing distributed memory access using a protected page. The method includes generating library calls to perform array accesses. The method further includes generating a layout map or assisting the accesses. Each processor possesses a local copy of this map. The method proceeds by allocating arrays across the... Agent: Cantor Colburn LLP - Ibm Rsw

20080162826 - Storage system and data guarantee method: Proposed is a storage system and a data guarantee method capable of guaranteeing and verifying the reliability of data in a short period of time even with the heavy usage of inexpensive hard disk drives. This storage system having a storage apparatus that provides a storage extent for reading and... Agent: Mattingly, Stanger, Malur & Brundidge, P.c.

20080162827 - Symmetric inter-partition channel to stream data between partitions: In some embodiments, an inter-partition apparatus includes a set of registers to store direct memory access (DMA) controls and to store an access control list visible to two or more operating environments separated by a partition, the set of registers including posted receive buffers and transmit pending buffers. A DMA... Agent: Intel Corporation C/o Intellevate, Llc

20080162831 - Management/circuit arrangement and memory management system: The invention relates to a memory management/circuit arrangement provided with a memory device (MR), which can be controlled so that data (d) that has been input first is output first, and with a memory control device (C) which is associated with the memory device (MR), used to control the input... Agent: Maginot, Moore & Beck Chase Tower

20080162833 - Memory device employing dual clocking for generating systematic code and method thereof: A memory device may include a memory core block, a data patch unit, a Cyclic Redundancy Check (CRC) generating unit, and/or a serializer. The data patch unit may be configured to patch parallel data read from the memory core block in response to a first read pulse. The CRC generating... Agent: Harness, Dickey & Pierce, P.L.C

20080162828 - Methods and systems for applications to interact with hardware: A method of providing Java application layer access to hardware peripheral memory mapped registers is provided together with a processor adapted to implement such a method. A fixed memory address space for a hardware peripheral's memory mapped registers is identified, and a Java object is constructed having elements which occupy... Agent: William J. Kolegraff

20080162830 - Methods, systems, and computer program products for providing memory management with constant defragmentation time: Methods, systems, and computer program products for providing memory management with constant defragmentation time are disclosed. According to one aspect, the subject matter described herein includes a method for memory management. The method includes dividing memory to be allocated into a plurality of pages of equal size P, wherein P... Agent: Jenkins, Wilson, Taylor & Hunt, P. A.

20080162829 - Selective guarded memory access on a per-instruction basis: A method includes receiving, at a processing device, a memory access instruction comprising a guarded access specifier representative of a guarded access policy. The method further includes performing, at the processing device, a memory access represented by the memory access instruction in accordance with the guarded access policy. A processing... Agent: Larson Newman Abel Polansky & White, LLP

20080162832 - Storage controller and storage control method: A storage controller that can control memory addresses even when a memory module having a different device configuration than an already mounted memory module is added as an expansion module. More specifically, a storage controller for controlling a storage unit that can be constructed using a plurality of memory modules... Agent: Staas & Halsey LLP

20080162834 - Task queue management of virtual devices using a plurality of processors: A task queue manager manages the task queues corresponding to virtual devices. When a virtual device function is requested, the task queue manager determines whether an SPU is currently assigned to the virtual device task. If an SPU is already assigned, the request is queued in a task queue being... Agent: Joseph T. Van Leeuwen

20080162835 - Memory access without internal microprocessor intervention: A method and system for accessing a computer system memory without processor intervention is disclosed. In one embodiment, the method includes initiating a predetermined communication protocol between a first device and a second device, the first device including a first processor, a first memory and a first communication interface, the... Agent: Apple C/o Morrison And Foerster ,llp Los Angeles

20080162836 - Staggered interleaved memory access: Methods and systems are provided for receiving and assembling serial data into parallel arrangements referred to as data slices. A plurality of data slices define a data line. Data slices common to a data line are written across like addresses of memory logically partitioned as memory slots. Respective memory slots... Agent: Texas Instruments Incorporated

20080162838 - Apparatus and method for firmware upgrade: An apparatus and method for firmware upgrade in a portable terminal is provided. A memory access method for the firmware upgrade in the portable terminal includes the steps of receiving data and a write request signal of the data from an upper layer, compressing the data, and when the capacity... Agent: The Farrell Law Firm, P.c.

20080162837 - Nonvolatile memory system: A technique for preventing erroneous writing or erasing on a nonvolatile memory at a low cost without an external circuit when an arithmetic processing device operates erroneously. A nonvolatile memory system comprises a nonvolatile memory, a volatile memory storing programs including an operational instruction to alter a content of the... Agent: Morrison & Foerster LLP

20080162839 - Storage management system and method: In a storage management system and method which virtualizes a plurality of storage devices distributed over a network to be managed, a storage state manager, in a storage management server, manages a storage usage state in each storage device, a network state manager manages a traffic state of each network... Agent: Staas & Halsey LLP

20080162841 - Method and apparatus for implementing dynamic copy-on-write (cow) storage compression in cow storage through zero and deleted blocks: Methods, apparatus and computer program product implement enhanced dynamic copy-on-write storage compression. For a write operation, a freed block is detected by the COW storage for compressing freed blocks from the COW storage. Responsive to the detected freed block being a previously written block in the COW storage, the previously... Agent: Ibm Corporation Rochester Ip Law Dept 917

20080162842 - Method and apparatus for implementing dynamic copy-on-write (cow) storage compression through purge function: Methods, apparatus and computer program product implement enhanced dynamic copy-on-write storage compression. For a write operation, a purge function for a block being written is detected by the COW storage for compressing freed blocks from the COW storage. Responsive to the detected purge function and the block being a previously... Agent: Ibm Corporation Rochester Ip Law Dept 917

20080162840 - Methods and infrastructure for performing repetitive data protection and a corresponding restore of data: Then, only journals j0, . . . , jk are needed for a point in time restore of time rk+(m·N) and all changes that were written after t(m+1)·N located in journal j0. Thus, the present invention allows to reduce the amount of data that needs to be read from the... Agent: Ibm Corporation Intellectual Property Law

20080162844 - Four site triangular asynchronous replication: Storing recovery data for a data center includes providing synchronous data from the data center to a local destination, providing chunks of data from the local destination to a first remote destination, different from the first remote destination, and providing chunks of data from the data center to a second... Agent: Muirhead And Saturnelli, Llc

20080162843 - Method, computer program product, and system for providing a multi-tiered snapshot of virtual disks: An object in a tier of a multi-tier virtual storage system is saved while the storage system is active. The object to be saved in an upper-level tier in the multi-tier storage system is identified. Servers associated with lower-level tiers below the tier containing the object to be saved to... Agent: Cantor Colburn LLP - Ibm Rochester Division

20080162847 - Predictive algorithm for load balancing data transfers across components: A system, method and computer program product are provided to improve the efficiency of the transmission of consistency groups across multiple storage components by ensuring that volume transactions are evenly allocated among backup components. Each volume is initially assigned to a specified backup component. Once a color period begins, volume... Agent: Law Office Of Dan Shifrin, Pc - Ibm

20080162846 - Storage system comprising backup function: s

20080162845 - Toggling between concurrent and cascaded triangular asynchronous replication: Toggling between a first storage configuration and a second storage configuration includes disabling asynchronous data transfer to a third storage group from one of the first storage group and the second storage group and enabling asynchronous data transfer to the third storage group from an other one of the first... Agent: Muirhead And Saturnelli, Llc

20080162848 - Controlling access to a memory region: A method of and controller for controlling access to a memory region are described. The method comprises driving an unlock signal to an input line based on an unlock value in a lock state memory and restarting a computer system after writing an unlock value to a lock state memory.... Agent: Hewlett Packard Company

20080162849 - Providing protected access to critical memory regions: Hardware of a virtualized processor based system detecting a specified type of memory access to an identified region of memory and in response to the detecting generating an interrupt for a virtual machine monitor (VMM) of the virtualized processor based system.... Agent: Intel Corporation C/o Intellevate, Llc

20080162850 - Three-dimensional mask-programmable memory module: Three-dimensional mask-programmable memory (3D-mM) module comprises a 3D-mM chip and a usage-control (UC) block. 3D-mM is an ultra-low-cost and ultra-large-capacity memory suitable for pre-recorded multimedia library (PML). The UC block limits access to the PML. It enables a low average selling price (ASP) for the 3D-mM module and allows a... Agent: Guobiao Zhang

20080162851 - Non-volatile memory device and method of encrypting data in the same: A non-volatile memory device includes an input/output terminal mixing section configured to couple data input/output terminals of the memory device to data input/output terminals of a page buffer in accordance with a user selection. A user data authenticating section is configured to transmit a control signal to the input/output terminal... Agent: Townsend And Townsend And Crew, LLP

20080162854 - Electronic controller: The invention improves safety of an electronic controller using a nonvolatile memory MRAM able to easily perform reading and writing operations at high speed. Therefore, MRAM for writing a control program from an external tool has a correction code adding writing circuit, a decoding reading-out circuit, and error registers for... Agent: Sughrue Mion, Pllc

20080162855 - Memory command issue rate controller: Method and apparatus to reduce latency of command while maintaining the thermal level of a memory in a safe value is disclosed. A memory request with or without a command to a memory may be scheduled by a memory request scheduler. If the memory request has the command to the... Agent: Caven & Aghevli C/o Intellevate, Llc

20080162853 - Memory systems having a plurality of memories and memory access methods thereof: A memory system includes a plurality of memories and a controller configured to control the memories and to access each of the memories using timing information respectively associated with each of the memories.... Agent: Myers Bigel Sibley & Sajovec

20080162852 - Tier-based memory read/write micro-command scheduler: A method, apparatus, and system are described. In one embodiment, the method comprises a chipset receiving a plurality of memory requests, wherein each memory request comprises one or more micro-commands that each require one or more memory clock cycles to execute, and scheduling the execution of each of the micro-commands... Agent: Intel/blakely

20080162860 - Dynamic allocation of message buffers: A method for allocating memory that is associated with a CAN (controller area network) controller, comprises receiving a data frame comprising an identifier (ID) and data; dynamically allocating a message buffer (MB) within the memory for queuing the data frame; and generating a pointer that points to the MB, where... Agent: Law Office Of Charles W. Bethards, LLP

20080162858 - Hardware-based memory initialization with software support: A method includes initializing a counter value of a hardware counter in response to an initialization stimulus and iteratively adjusting the counter value of the hardware counter and storing an initialization value to a memory location of a memory array using a memory address that is based on the counter... Agent: Larson Newman Abel Polansky & White, LLP

20080162857 - Memory device with multiple configurations: A memory device and a method of providing the memory device. The method includes providing the memory device with a memory array arrangement of width N and providing a first configuration of the memory device and a second configuration of the memory device. Providing the first configuration of the memory... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Qimonda

20080162861 - Memory hub architecture having programmable lane widths: A processor-based system includes a processor coupled to a system controller through a processor bus. The system controller is used to couple at least one input device, at least one output device, and at least one data storage device to the processor. Also coupled to the processor bus is a... Agent: Karen Lenaburg, Esq.

20080162856 - Method for dynamic memory allocation on reconfigurable logic: A method, apparatus, and electronic device for improving memory performance are disclosed. The method may include automatically checking reconfigurable logic for available memory and executing a first memory allocation to the available memory.... Agent: Prass & Irving LLP

20080162859 - Systems and methods for reclaiming resident buffers on demand: systems methods and computer products for reclaiming resident buffers on demand. Exemplary embodiments include systems and methods for reclaiming resident buffers, including allocating a buffer, determining that the buffer alllocation pushes the buffer pool below a reclaim threshold, marking an oldest in-use buffer to be reclaimed, determining that all messages... Agent: Cantor Colburn LLP - Ibm Rochester Division

20080162863 - Bucket based memory allocation: Managing memory includes subdividing the memory into a first set of blocks corresponding to a first size and a second set of blocks corresponding to a second size that is greater than said first size, in response to a request for an amount of memory that is less than or... Agent: Muirhead And Saturnelli, Llc

20080162862 - Signal processing apparatus and signal processing method: A signal processing apparatus includes a processing selection section (102), a processing execution section (103), a buffer (107) and a buffer size setting section (108A). The processing selection section (102) selects, from a plurality of signal processings, processing to be performed to input data. The processing execution section (103) executes... Agent: Mcdermott Will & Emery LLP

20080162866 - Apparatus and method for fast and secure memory context switching: An apparatus comprising a memory controller including therein a configuration register, a communication channel coupled to the memory controller, and first and second memory partitions coupled to the communication channel, wherein configuration parameters in the configuration register are set so that the memory controller recognizes one partition at a time.... Agent: Blakely Sokoloff Taylor & Zafman

20080162864 - Guest to host address translation for devices to access memory in a partitioned system: Embodiments of apparatuses, methods, and systems for guest to host address translations for devices to access memory in a partitioned system are disclosed. In one embodiment, an apparatus includes an interface, partitioning logic, first address translation logic, and second address translation logic. The interface is to receive a request from... Agent: Intel/blakely

20080162867 - Memory module system using a partitioned serial presence detect memory: A memory module system may include a serial presence detect (SPD) memory and a memory controller. The SPD memory may store first SPD data and second SPD data of a memory module. The SPD memory may be partitioned into at least two regions that may operate as multiple SPD ROMs.... Agent: Harness, Dickey & Pierce, P.L.C

20080162865 - Partitioning memory mapped device configuration space: Embodiments of apparatuses, methods, and systems for partitioning memory mapped device configuration space are disclosed. In one embodiment, an apparatus includes a configuration space address storage location, an access map storage location, and addressing logic. The configuration space address storage location is to store a pointer to a memory region... Agent: Intel/blakely

20080162868 - Means to share translation lookaside buffer (tlb) entries between different contexts: A method and apparatus for sharing translation buffer entries between multiple processing resources is herein described. A sharing field in a translation entry is to represent that the translation entry is to be associated with/shared between a plurality of processing resources, if the translation entry is determined to be the... Agent: Intel Corporation C/o Intellevate, Llc

20080162869 - Address hashing to help distribute accesses across portions of destructive read cache memory: For one disclosed embodiment, an apparatus may comprise cache memory circuitry including multiple portions of destructive read memory cells and access control circuitry to access portions of destructive read memory cells. The apparatus may also comprise address hash logic to receive an address and to generate a hashed address based... Agent: Intel/blakely

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