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Electrical computers and digital processing systems: memory December patents, inventions by USPTO category 12/07Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 12/27/2007 > patent applications in patent subcategories. patents, inventions by USPTO category
20070300010 - Apparatus for fast accesses to flash memory: An apparatus for fast access to flash memory is provided, including a flash memory and an access controller. A system data reserved region is configured in the flash memory to provide temporary storage for data and instruction used in the flash memory access. The access controller includes a flash memory... Agent: Madson & Austin
20070300009 - Flash driver support techniques: Various flash management techniques may be described. An apparatus may comprise a processor, a flash memory coupled to the processor, and a flash management module. The flash management module may be executed by the processor to receive a write transaction request to write data to a flash memory, and write... Agent: Microsoft Corporation
20070300008 - Flash management techniques: Various flash management techniques may be described. An apparatus may comprise a processor, a flash memory coupled to the processor, and a flash management module. The flash management module may be executed by the processor to receive a write request to write data to the flash memory, write a first... Agent: Microsoft Corporation
20070300007 - Using multiple non-volatile memory devices to store data in a computer system: Provided are a method, system, and machine readable medium for using multiple non-volatile memory devices to store data in a computer system. Access to a first and second memory devices are managed. The first memory device has faster read access and slower write access relative to the second memory device... Agent: Konrad Raynes & Victor, LLP. Attn: Int77
20070300011 - Memory card, semiconductor device, and method of controlling semiconductor memory: A semiconductor device includes a controller which operates if a request is made that data be written in a certain area in a first block in a semiconductor memory having a predetermined erase block size in which data has already been written, to write the data requested to be written,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.
20070300012 - Method for substantially uninterrupted cache readout: A memory device capable of sequentially outputting multiple pages of cached data while mitigating any interruption typically caused by fetching and transferring operations. The memory device outputs cached data from a first page while data from a second page is fetched into sense amplifier circuitry. When the outputting of the... Agent: Dickstein Shapiro LLP
20070300013 - Storage system having transaction monitoring capability: A system and method for managing transactions of application programs at a storage system enables data protection on a per-transaction basis. The storage system receives an instruction indicating a beginning of a transaction, and determines at least one primary volume for receiving data for the transaction. The storage system also... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.
20070300014 - Debug port for on-die dram: A memory subsystem includes a plurality of storage elements and a controller coupled to a switch. In a first mode, the controller controls information transfer to and from the plurality of storage elements. Also coupled to the switch is a debug port controller. The debug port controller can be activated... Agent: Dickstein Shapiro LLP
20070300015 - Serial memory comprising means for protecting an extended memory array during a write operation: The present invention relates to a memory on a silicon microchip, having a serial input/output, an integrated memory array addressable under N bits, and at least one register that is read accessible, after applying a command for reading the register to the memory. The memory stores a most significant address... Agent: Seed Intellectual Property Law Group PLLC
20070300016 - Shared cache performance: A method and apparatus for improving shared cache performance. In one embodiment, the present invention includes a cache having multiple ways. A locality tester measures a first locality of a first process and second locality of a second process. A first set of multiple ways stores the data used by... Agent: Blakely Sokoloff Taylor & Zafman
20070300017 - Organizing content: A portable data storage device (1) comprising means (2, 4) for searching for data stored on an other device that match with a user set profile (3) of the data storage device (1) and means (5) for storing data matching with said profile (3) in the data storage device (1).... Agent: Philips Intellectual Property & Standards
20070300018 - Memory system including a two-on-one link memory subsystem interconnection: A memory system including a first memory subsystem having a buffer device with a first port and a second port, one or more memory devices coupled to the buffer device via the second port, and a first two-on-one link for coupling to a memory controller for providing communication between the... Agent: Cantor Colburn LLP-ibm Poughkeepsie
20070300019 - Memory access apparatus, memory access method and memory manufacturing method: A memory access apparatus for carrying out access to memories for which types of access control signals required for accessing are different from each other, has an access control signal type information obtaining part configured to obtain information of a type of the access control signal for the memory to... Agent: Bingham Mccutchen LLP
20070300021 - Method of maintaining a data log related to a programmable logic controller (plc): Certain exemplary embodiments can provide a method for utilizing a memory cartridge connected to a Programmable Logic Controller (PLC). The memory cartridge can comprise a plurality of memory segments. The method can comprise a plurality of activities comprising: providing a default identifying stamp for records in a data log file,... Agent: Siemens Corporation Intellectual Property Department
20070300020 - Method regarding a data log related to a programmable logic controller (plc): Certain exemplary embodiments can provide a method for utilizing a memory cartridge connected to a Programmable Logic Controller (PLC). The memory cartridge can comprise a plurality of memory segments. The method can comprise a plurality of activities comprising: providing a default identifying stamp for records in a data log file,... Agent: Siemens Corporation Intellectual Property Department
20070300022 - Method regarding a memory device for a programmable logic controller (plc): Certain exemplary embodiments can provide a method for utilizing a memory cartridge connected to a Programmable Logic Controller (PLC). The memory cartridge can comprise a plurality of memory segments. The method can comprise a plurality of activities comprising: providing a default identifying stamp for records in a data log file,... Agent: Siemens Corporation Intellectual Property Department
20070300023 - Method and system for terminating write commands in a hub-based memory system: A memory hub receives downstream memory commands and processes each received downstream memory command to determine whether the memory command includes a write command directed to the memory hub. The memory hub operates in a first mode when the write command is directed to the hub to develop memory access... Agent: Kimton N. Eng, Esq. Dorsey & Whitney LLP
20070300024 - Data recording device and data recording method: In a data recording device which records a plurality of data items of different kinds, one or plurality of nodes set the plurality of data items to data frames with frame IDs uniquely assigned for respective kinds of the data items, and transmit the data frames to a multiplex communication... Agent: Oliff & Berridge, PLC
20070300025 - Maintaining a change map of a block level storage device: Maintaining a change map of a block storage device includes intercepting a change message from an application. The change message is intercepted by a change tracking engine. The change message requests a change to a logical block of the block storage device. The change is recorded in a first copy... Agent: Baker Botts L.L.P.
20070300026 - Synchronous backup device and method used for storage device: A synchronous backup device and a method used for a storage device, mainly used to write/update synchronously a main storage device and a backup storage device utilizing data from the host, and perform data backup while writing the data. In writing the data, the data position concept is used to... Agent: Birch Stewart Kolasch & Birch
20070300027 - System and method for the self-mirroring storage drives: A system and method is disclosed for establishing a mirror configuration in a storage network. The storage network includes two storage drives that are coupled to one another according to a Serial Attached SCSI storage network interface. The storage drives determine whether the storage drives are coupled to one another.... Agent: Roger Fulghum Baker Botts L.L.P.
20070300028 - Electronic data storage medium with fingerprint verification capability: An electronic data storage medium is adapted to be accessed by a data terminal, and includes a processing unit connected to a memory device that stores a data file and security reference data possessed by a person authorized to access the data file, and an input-output interface circuit activable so... Agent: Bever Hoffman & Harms, LLP Tri-valley Office
20070300029 - Electronic data storage medium with fingerprint verification capability: An electronic data storage medium is adapted to be accessed by a data terminal, and includes a processing unit connected to a memory device that stores a data file and security reference data possessed by a person authorized to access the data file, and an input-output interface circuit activable so... Agent: Bever Hoffman & Harms, LLP Tri-valley Office
20070300030 - Electronic data storage medium with fingerprint verification capability: An electronic data storage medium is adapted to be accessed by a data terminal, and includes a processing unit connected to a memory device that stores a data file and security reference data possessed by a person authorized to access the data file, and an input-output interface circuit activable so... Agent: Bever Hoffman & Harms, LLP Tri-valley Office
20070300031 - Memory data shredder: A system for shredding data in NAND memory can comprise a database and a device controller. The database may be configured to store the data. The device controller may be configured to receive a shred command, overwrite the data within at least a portion of the NAND memory pursuant to... Agent: Carr & Ferrell LLP
20070300032 - Early directory access of a double data rate elastic interface: A system and method to organize and use data sent over a double data rate interface so that the system operation does not experience a time penalty. The first cycle of data is used independently of the second cycle so that latency is not jeopardized. There are many applications. In... Agent: International Business Machines Corporation
20070300033 - System and method for reconfiguring continuous data protection system upon volume size change: Method and system for changing size of volumes in a CDP environment. The administrator can reduce the amount of work necessary to change the size of the primary volume protected by a CDP system. The system operates in conjunction with all three implementations of the CDP, including the After-Journal(JNL), After-Journal... Agent: Sughrue Mion, PLLC
20070300034 - Virtual storage control apparatus: A virtual storage control apparatus of the present invention writes data of a write request in an empty block of a virtual disk for data integrity to which any malicious access or false operation is not made, and records the time and the way of rewriting the data into the... Agent: Staas & Halsey LLP
20070300035 - Systems and methods of allocating a zone bit recorded disk drive: The invention classifies volumes (e.g., file systems or LUNs) of a data storage system according to application requirements and allocates space for the volumes on storage devices (e.g., hard disk drives) accordingly. A person such as an IT administrator configures the volumes specifying size, type (e.g., file system or SAN... Agent: Robert Moll
20070300036 - Configuration size determination in logically partitioned environment: Method, apparatus and article of manufacture for determining memory requirements for a partition manager based on a given configuration. In one embodiment, a quantity of memory required for each of a plurality of components is determined, where each component is a collection of function-related code portions. Then, a total quantity... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1
20070300037 - Persistent flash memory mapping table: Flash memory is accessed via mapping tables comprising a master mapping table and at least one secondary mapping table. The master mapping table contains indexes to the secondary mapping tables. The secondary mapping tables contain indexes to locations in the flash memory. The mapping tables are maintained in the flash... Agent: Woodcock Washburn LLP (microsoft Corporation)
20070300038 - Memory controller for non-homogeneous memory system: A memory controller includes at least one interface adapted to be coupled to one or more first memory devices of a first memory type having a first set of attributes, and to one or more second memory devices of a second memory type having a second set of attributes. The... Agent: Morgan Lewis & Bockius LLP/rambus Inc.
20070300039 - Device, system and method of reduced-power memory address generation: Devices, systems and methods of reduced-power memory address generation. For example, an apparatus includes: a carry save adder including at least a first set of adders and a second set of adders, wherein the adders of the first set are able to receive a first number of input bits and... Agent: Pearl Cohen Zedek Latzer, LLP12/20/2007 > patent applications in patent subcategories. patents, inventions by USPTO category
20070294461 - Method and system for increasing recording format reliability for limited media space in a tape drive system: A method for increasing recording format reliability in a tape drive system is disclosed. In one embodiment, the method includes identifying a default media information region (MIR) on a media, wherein the default MIR includes MIR information divided into segments, reading the MIR information, rotating the MIR information into a... Agent: Sun Microsystems, Inc. C/o Dorsey & Whitney, LLP
20070294462 - Memory device including self-id information: Disclosed is a memory device including self-ID information. The memory device has a storage unit for storing information related to the memory device, such as a manufacturing factory, a manufacturing date, a wafer number, coordinates on a wafer and the like. Each bank of the memory device stores self-ID information... Agent: Ladas & Parry LLP
20070294464 - Digital component power savings in a host device and method: A control arrangement, for example, in a digital component that forms part of a system, draws an input current for its operation and is configured for monitoring an interface for any one of a group of commands and, upon detecting an issued one of the group of commands, operates the... Agent: Pritzkau Patent Group, LLC
20070294465 - It administrator initiated remote hardware independent imaging technology: The present invention relates to a method for removing the driver map component from being stored on the service partition and placing it on a server for retrieval at a later time. Only the actual device drivers that are required for that system will be provided. A central repository will... Agent: Ference & Associates LLC
20070294463 - Systems and methods for providing a personal computer with non-volatile system memory: In some embodiments, a system comprises a system memory module and an access card. The system memory module connects to a memory bus on a motherboard for a personal computer, while the access card connects to an expansion bus. The access card couples to the system memory module to provide... Agent: Conley Rose, P.C. David A. Rose
20070294466 - System, method and storage medium for a memory subsystem command interface: A system for implementing a memory subsystem command interface, the system including a cascaded interconnect system including one or more memory modules, a memory controller and a memory bus. The memory controller generates a data frame that includes a plurality of commands. The memory controller and the memory module are... Agent: Cantor Colburn LLP-ibm Poughkeepsie
20070294467 - Multi-channel flash memory data access method: A multi-channel flash memory data access method is disclosed herein. Firstly, a predetermined number of communication channels are established between a plurality of flash memories and a flash memory controller. Since each of the respective communication channels may be used to transmit a single byte of data. As such, in... Agent: Wpat, PC Intellectual Property Attorneys
20070294468 - Architecture for reading and writing to flash memory: Apparatus for enabling access to Flash random access memory devices at substantially the same bandwidth and speed for both reading and writing. A plurality of processors can be dynamically and/or statically configured into separate portions to handle reading and writing actions. One portion can be arranged to separately handle interfacing... Agent: Baker Botts L.L.P.
20070294469 - Integrated circuit chip, data reading method, and data writing method: An integrated circuit chip includes a memory storing a duplexed data set and capable of data rewriting. The memory is a nonvolatile memory capable of performing data rewriting in units of bytes without necessity of data deletion in units of pages.... Agent: Rader Fishman & Grauer PLLC
20070294470 - Memory interface with independent arbitration of precharge, activate, and read/write: A memory interface coupling a plurality of clients to a memory having memory banks provides independent arbitration of activate decisions and read/write decisions. In one implementation, precharge decisions are also independently arbitrated.... Agent: Cooley Godward Kronish LLP Attn: Patent Group
20070294471 - Dram access command queuing method: Access arbiters are used to prioritize read and write access requests to individual memory banks in DRAM memory devices, particularly fast cycle DRAMs. This serves to optimize the memory bandwidth available for the read and the write operations by avoiding consecutive accesses to the same memory bank and by minimizing... Agent: Driggs, Hogg & Fry Co. L.p.a.
20070294472 - Integrated circuit with associated memory function: A search payload data shift part has n latch parts LT1 to LTn (n≧2), each of which can store 1-byte latch data, and obtains search payload data having an n-byte length, while shifting payload data inputted from an input terminal, in synchronization with a clock provided from the exterior. Data... Agent: Mcdermott Will & Emery LLP
20070294473 - Navigation method for playback sequence of an optical disc: The invention relates to a method for a playback sequence on an optical disc (100) for controlling access to information (107). The optical disc comprises a navigation structure (104) and content (103). The navigation structure (104) comprises conditional commands, which comprise preconditions. Depending on the precondition, a player always acts... Agent: Philips Intellectual Property & Standards
20070294474 - Efficiently synchronizing with separated disk caches: In a method of synchronizing with a separated disk cache, the separated cache is configured to transfer cache data to a staging area of a storage device. An atomic commit operation is utilized to instruct the storage device to atomically commit the cache data to a mapping scheme of the... Agent: Microsoft Corporation
20070294475 - Raid apparatus, cache management method, and computer program product: A cache managing unit creates a list of elements corresponding to each data block arranged based on a priority of writing data blocks to a magnetic disk apparatus, and when a group of elements corresponding to data blocks to be written to the same magnetic disk apparatus exists, provides a... Agent: Staas & Halsey LLP
20070294476 - Method for representing foreign raid configurations: A system and method for previewing a disk drive's disk data format (DDF) metadata before performing an “import” or “clear” method to make it available on a receiving system comprising a redundant array of independent disks (RAID) array. A preview method is implemented such that the DDF metadata of one... Agent: Hamilton & Terrile, LLP
20070294477 - Raid management apparatus, raid management method, and computer product: In a RAID management apparatus, a disk determination unit accesses each of RAID devices, determines a copy source disk, and sets a pointer of the determined copy source disk into a disk management table stored in a storage unit. When an input-output (I/O) processing unit accesses a disk, if an... Agent: Patrick G. Burns - Reg. No. 29,367 Greer, Burns & Crain, Ltd.
20070294478 - System and method for fault tolerant controller for network raid: A fault-tolerant and efficient way of deducing a set of inconsistent stripes for a network RAID protocol, wherein clients forward input/output (I/O) to a particular controller device called the coordinator, which executes RAID logic and which sends out device IOs to the relevant storage devices. If the coordinator fails then... Agent: Rogitz & Associates
20070294479 - Method for achieving very high bandwidth between the levels of a cache hierarchy in 3-dimensional structures, and a 3-dimensional structure resulting therefrom: A method of electronic computing, and more specifically, a method of design of cache hierarchies in 3-dimensional chips, and a cache hierarchy resulting therefrom, including a physical arrangement of bits in cache hierarchies implemented in 3 dimensions such that the planar wiring required in the busses connecting the levels of... Agent: Mcginn Intellectual Property Law Group, PLLC
20070294480 - Cache with time-based purging and computation of purged items: Methods and apparatus, including computer program products, for purging an item from a cache based on the expiration of a period of time and having an associated process to generate an item purged from the cache. A program stores a first item in a cache with an indication of a... Agent: Mintz, Levin, Cohn, Ferris, Glovsky & Popeo, P.C.
20070294481 - Snoop filter directory mechanism in coherency shared memory system: Methods and apparatus that may be utilized to maintain coherency of data accessed by both a processor and a remote device are provided. Various mechanisms, such as a remote cache directory, castout buffer, and/or outstanding transaction buffer may be utilized by the remote device to track the state of processor... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1
20070294482 - Prefetch unit: In one embodiment, a processor comprises a prefetch unit coupled to a data cache. The prefetch unit is configured to concurrently maintain a plurality of separate, active prefetch streams. Each prefetch stream is either software initiated via execution by the processor of a dedicated prefetch instruction or hardware initiated via... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
20070294483 - Page descriptors for prefetching and memory management: A computer system and a method for enhancing the cache prefetch behavior. A computer system including a processor, a main memory, a prefetch controller, a cache memory, a prefetch buffer, and a main memory, wherein each page in the main memory has associated with it a tag, which is used... Agent: F. Chau & Associates, LLC
20070294485 - Semi-blocking deterministic directory coherence: In one embodiment, a node for a multi-node computer system comprises a coherence directory and a coherence controller. The coherence directory comprises a plurality of entries, wherein each entry corresponds to a respective coherence unit and stores a state identifying which nodes in the computer system are storing a copy... Agent: Mhkkg/sun
20070294484 - Silent invalid state transition handling in an smp environment: Embodiments of the invention address deficiencies of the art in respect to cache coherency management and provide a novel and non-obvious method, system and apparatus for silent invalid state transition handling in an SMP environment. In one embodiment of the invention, a cache coherency method can be provided. The cache... Agent: Carey, Rodriguez, Greenberg & Paul, LLP Steven M. Greenberg
20070294486 - Reducing number of rejected snoop requests by extending time to respond to snoop request: A cache, system and method for reducing the number of rejected snoop requests. A “stall/reorder unit” in a cache receives a snoop request from an interconnect. Information, such as the address, of the snoop request is stored in a queue of the stall/reorder unit. The stall/reorder unit forwards the snoop... Agent: Ibm Corp (wsm) C/o Winstead Sechrest & Minick P.C.
20070294487 - Unified memory system: The unified memory system includes: a memory accessed from a plurality of masters; a speculative access control section for issuing, in response to a first access request to the memory from a CPU as one of the plurality of masters, a speculative second access request to the memory; and a... Agent: Mcdermott Will & Emery LLP
20070294488 - Balanced bitcell design for a multi-port register file: In a multi-port register file of a storage unit within a processor, an improved bitcell design for storing a data bit is disclosed. The bitcell comprises a first set of read bitlines having a first load and a second set of read bitlines having a second load, in which the... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP
20070294489 - Atomically updating 64 bit fields in the 32 bit aix kernel: A method, system, and computer instructions for atomically updating 64-bit fields in the 32-bit AIX kernel, wherein the underlying hardware's 64-bit capable instructions are used to construct an atomic primitive. If a data request applies to the 32-bit kernel on 64-bit hardware execution environment, a load and reserve instruction sets... Agent: Ibm Corp (ya) C/o Yee & Associates PC
20070294490 - System and method of updating a memory to maintain even wear: A memory leveling system updates physical memory blocks, or blocks, to maintain generally even wear. The system maintains an update count for each block, incrementing a wear level count when the update count reaches a wear level threshold. The system compares a wear level of blocks to determine whether to... Agent: Shimokaji & Associates, P.C.
20070294491 - Methods and systems for storage architectures: Methods and systems for storage architectures are provided. Storage resource provider modules interface with storage resources to perform storage operations. A storage management data store maintains storage data associated with a storage environment of the storage resources. The storage resource provider modules retrieve and update the storage management data in... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
20070294492 - Method and apparatus for reducing flash cycles with a generational filesystem: Briefly, a method, apparatus and system for storing data in a memory array according to an update characteristic of the data is disclosed. By storing data according to, for example, a frequency of update, writes to memory may be more efficient.... Agent: Intel Corporation C/o Intellevate, LLC
20070294493 - Automatically managing the state of replicated data of a computing environment, and methods therefor: The state of data of a communications environment is automatically managed. The automatic management is provided via a facility that automatically obtains the current state of the data and uses that information to place the data in an appropriate state for a selected event to be processed. The data is,... Agent: Heslin Rothenberg Farley & Mesiti P.C.
20070294494 - Page processing circuits, devices, methods and systems for secure demand paging and other operations: A page processing circuit (1040) includes a memory (1034) for pages, a processor (1030) coupled to the memory, and a page wiping advisor circuit (1040) coupled to the processor and operable to prioritize pages based both on page type (TYPE in 2740) and usage statistics (STAT in 2740). Processes of... Agent: Texas Instruments Incorporated
20070294495 - Storage control apparatus, storage control program, and storage control method: A storage control apparatus that creates a generation backup of a storage, comprising: a first copy section that creates a snapshot of at least one of all data stored in the storage at an indicated time point and difference data stored in the storage in an indicated time period; a... Agent: Staas & Halsey LLP
20070294496 - Methods, apparatus, and systems for secure demand paging and other paging operations for processor devices: A secure demand paging system (1020) includes a processor (1030) operable for executing instructions, an internal memory (1034) for a first page in a first virtual machine context, an external memory (1024) for a second page in a second virtual machine context, and a security circuit (1038) coupled to the... Agent: Texas Instruments Incorporated
20070294497 - Method and system for accessing protected memory: Methods and systems for accessing protected memory are disclosed. Aspects of one method may include enabling access to protected memory on a chip when a user access key for the chip matches a customer specific access key that is pre-programmed and stored in a one-time programmable memory within the chip.... Agent: Mcandrews Held & Malloy, Ltd
20070294500 - Methods and system to provide references associated with data streams: Each set of pointers inserted into a received data stream eventually includes pointer values that point to other locations (e.g., other segments) within the data stream. Initially, pointer values can be set to null values because an address or respective index to other segments or other sets of pointers in... Agent: Barry W. Chapin, Esq. Chapin Intellectual Property Law, LLC
20070294499 - Reference-updating using per-chunk referenced-address ranges in a compacting garbage collector: Reference updating in a sliding compaction garbage collector may involve maintaining, for each logical region of the heap to be compacted, values that represent the range of addresses referenced by individual regions of the heap. For example, a highest-referenced address (HRA) represents the maximum address referenced by any object references... Agent: Mhkkg/sun
20070294498 - Storage allocation management in switches utilizing a flow control: A method, computer program product, and system for managing allocation of storage in a switch utilizing flow control are provided. The switch includes a plurality of ports and an internal storage divided into a plurality of storage units. The method, computer program product, and system provide for monitoring an average... Agent: Sawyer Law Group LLP
20070294501 - Cooperative memory management: A computer system includes a memory and a processor coupled with the memory, configured to assign to each of a plurality of processes a corresponding amount of committed memory from a memory pool, the memory pool including committed memory and uncommitted memory; and dynamically allocate an additional amount of memory... Agent: Van Pelt, Yi & James LLP
20070294502 - Lookup table array compression and indexing: A method of constructing, from a first array of entries, a second array of entries having a reduced number of entries compared with the first array is disclosed. According to one embodiment, the method comprises partitioning the first array into one or more groups of entries and then categorizing each... Agent: Freescale Semiconductor, Inc. Law Department
20070294503 - Combining the address-mapping and page-referencing steps in a memory controller: A method and apparatus for parallelizing address-mapping and page referencing in a memory controller. The page referencing may apply an input address to two separate content addressable memory components along with masks from a configuration register identifying rank-bank bits, page status bits and non-column bits. The content addressable memories each... Agent: Blakely Sokoloff Taylor & Zafman
20070294504 - Virtual address cache and method for sharing data using a unique task identifier: A virtual address cache and a method for sharing data. The virtual address cache includes: a memory, adapted to store virtual addresses, task identifiers and data associated with the virtual addresses and the task identifiers; and a comparator, connected to the memory, adapted to determine that data associated with a... Agent: Freescale Semiconductor, Inc. Law Department
20070294505 - Enhanced shadow page table algorithms: Enhanced shadow page table algorithms are presented for enhancing typical page table algorithms. In a virtual machine environment, where an operating system may be running within a partition, the operating system maintains it's own guest page tables. These page tables are not the real page tables that map to the... Agent: Woodcock Washburn LLP (microsoft Corporation)
20070294506 - Splash tables: an efficient hash scheme for processors: Also provided for are retrieving data items in a computer. A plurality of hash functions of data values in a probe key are computed. A corresponding memory location is determined for each of the plurality of hash functions. Data items in each memory location are examined to determine a match... Agent: Duke W. Yee12/13/2007 > patent applications in patent subcategories. patents, inventions by USPTO category
20070288695 - Apparatus and method for sharing a cached security profile in a database environment: An apparatus, system, and method are provided for sharing a cached security profile in a database environment. The apparatus, system, and method include a cache module for caching a security profile accessible to primary tasks and secondary tasks. An identification module is provided that distinguishes between primary tasks authorized to... Agent: Kunzler & Mckenzie
20070288696 - Distributed content verification and indexing: A method of verifying content, for example webpage content, including receiving, at an indexing system (100), a first copy (240) of a document (220) from a hosting server (210), then processing the first copy (240) to obtain first indicating data including one or more properties of the first copy (240).... Agent: Brinks Hofer Gilson & Lione
20070288697 - Apparatus and method of prefetching data: A device and method is illustrated to prefetch information based on a location of an instruction that resulted in a cache miss during its execution. The prefetch information to be accessed is determined based on previous and current cache miss information. For example, information based on previous cache misses is... Agent: Larson Newman Abel Polansky & White, LLP
20070288698 - Memory controller and method for scrubbing memory without using explicit atomic operations: A memory controller includes scrub circuitry that performs scrub cycles in a way that does not delay processor reads to memory during the scrub cycle. Atomicity of the scrub operation is assured by protocols set up in the memory controller, not by using an explicit atomic read-correct-write operation. The result... Agent: Martin & Associates, LLC
20070288699 - System and method of protecting data in write-back cache between storage systems: A system of protecting data in write-back cache between storage systems and the method thereof are employed to protect data in the write-back cache between a first storage system and a second storage system. The system adds, updates, or deletes the data in the second storage system backed up from... Agent: Birch Stewart Kolasch & Birch
20070288700 - Storage virtualization system and method: A shared storage area of a plurality of storage virtualization apparatuses connected to a host apparatus and a storage subsystem stores device configuration information expressing a logical device configuration in the storage virtualization apparatuses. The logical device configuration is a relationship between an external storage device in the storage subsystem,... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.
20070288701 - System and method for using a plurality of heterogeneous processors in a common computer system: A system for using a plurality of heterogeneous processors in a common computer system is presented. Each processor type in the heterogeneous group handles a particular instruction set. The processors share a common memory using a common bus. In one embodiment, one of the processor types accesses the memory using... Agent: Ibm Corporation- Austin (jvl) C/o Van Leeuwen & Van Leeuwen
20070288702 - Apparatus and methods for programming multilevel-cell nand memory devices: Methods and apparatus are provided. A first data value is read from a first memory cell and is stored. An attempt is made to add a second data value to the first memory cell. If the attempt to add the second data value to the first memory cell is unsuccessful,... Agent: Leffert Jay & Polglaze, P.A. Attn: Tod A. Myrum
20070288710 - Mirroring data between primary and secondary sites: Provided are a method, system, and article of manufacture for mirroring data between a first site and a second site. Updates to segments of storage at the first site are copied to corresponding segments of storage at the second site. Codes are generated from the segments at the second site... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37
20070288711 - Snapshot copy management method used for logic volume manager: A logic volume snapshot copy management method used for a logic volume manager. When there is a data write-in request, the plurality of snapshot copies established in the logic volume corresponding to the various time points are utilized to search in the logic volume for the data address of the... Agent: Birch Stewart Kolasch & Birch
20070288712 - Storage apparatus and storage apparatus control method: Proposed is a storage apparatus and its control method capable of performing dynamic load balancing or performance acceleration as a whole by balancing the load to a logical volume. With this storage apparatus, the load status of the volume is measured based on the data volume and command throughput transferred... Agent: Stanley P. Fisher Reed Smith LLP
20070288713 - Data recording/reproducing device and method: A data recording/reproducing device (100) (a) receives a pass-code corresponding to a user, (b) protect content data to be reproduced only by the user, and records the protected content data into a storage medium, using the pass-code which is obtained to record the content data, and (c) reproduces the content... Agent: Wenderoth, Lind & Ponack L.L.P.
20070288714 - Access control apparatus: An access management apparatus manages access to stored files from information processing apparatuses. The access management apparatus includes a network communication section, an access privilege policy setting section and an access control section. The network communication section has a plurality of protocols for accepting access to the files from the... Agent: Sughrue-265550
20070288715 - Media player: Content is provided on a medium or is transmitted, for example streamed, with in built protection against unauthorised playback or copying. Video content data is provided in content blocks, each of which relates to a video frame and has a corresponding header. Some content clocks have a digital fingerprint interposed... Agent: Christopher & Weisberg, P.A.
20070288716 - Memory system with a retiming circuit and a method of exchanging data and timing signals between a memory controller and a memory device: The present invention refers to a memory system with a controller and a memory device with a communication channel with a data path and a timing path coupling the controller with the memory device. The communication channel has different propagation times for the data path and the timing path exchanging... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Infineon / Qimonda
20070288719 - Approach for de-fragmenting physical memory by grouping kernel pages together based on large pages: An approach for de-fragmenting physical memory generally involves grouping kernel pages together based on large pages. The de-fragmentation procedure is triggered, such as by a kernel page-freelist being empty. The first user page from a user page-freelist is selected, marked as a kernel page (e.g., by setting a P_KERNEL bit),... Agent: Hickman Palermo Truong & Becker, LLP And Sun Microsystems, Inc.
20070288718 - Relocating page tables: According to one embodiment of the invention, a technique is provided for relocating the contents of kernel pages in a manner similar to techniques used for relocating the contents of user pages. Before the contents of a source page are moved to a target page, for each entry of a... Agent: Hickman Palermo Truong & Becker, LLP And Sun Microsystems, Inc.
20070288717 - System and method for expandable non-volatile storage devices: A method and system is introduced to allow expanding the storage capacity of a storage device using other storage device units in a dynamic manner. The expanded device may emulate a single large capacity media device. Files existing on device prior to device expansion may remain valid following device expansion.... Agent: Noam Camiel
20070288720 - Physical address mapping framework: According to one embodiment of the invention, a technique is provided for relocating the contents of kernel pages in a manner similar to techniques used for relocating the contents of user pages. Before the contents of a source page are moved to a target page, for each entry of a... Agent: Hickman Palermo Truong & Becker, LLP And Sun Microsystems, Inc.
20070288721 - Miss-under-miss processing and cache flushing: Described herein are systems and methods that reduce the latency which may occur when a level one (L1) cache issues a request to a level two (L2) cache, and that ensure that a translation requests sent to an L2 cache are flushed during a context switch. Such a system may... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.12/06/2007 > patent applications in patent subcategories. patents, inventions by USPTO category
20070283077 - Memory and memory communication system: A memory system includes a selection element for selecting a selectable access rate from a plurality of access rates and a memory element for providing or for accepting data at the selectable access rate.... Agent: Slater & Matsil LLP
20070283081 - Cache control in a non-volatile memory device: A flash memory device includes a storage area having a main memory portion and a cache memory portion storing at least one bit per cell less than the main memory portion; and a controller that manages data transfer between the cache memory portion and the main memory portion according to... Agent: Mark M. Friedman
20070283079 - Flash memory storage system: A flash memory storage system has a plurality of flash memory devices comprising a plurality of flash memories, and a controller having an I/O processing control unit for accessing a flash memory device specified by a designated access destination in an I/O request received from an external device from among... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.
20070283083 - Memory controller, flash memory system with memory controller, and control method of flash memory: Chronological identification information is composed of a plurality of cyclic numbers with priorities. For generating new chronological identification information, the chronological relation is compared in order from cyclic numbers with the highest priority to extract the newest chronological identification information in the chronological relation; when the newest chronological identification information... Agent: Oliff & Berridge, PLC
20070283078 - System and method of updating data in a contactless flash memory device: A flash memory device is powered via an RF field generated by a host unit. A contactless communication channel is established between the flash memory device and the host unit. A first version of a data file, including a first plurality of data chunks, is downloaded from the flash memory... Agent: Hewlett Packard Company
20070283080 - Method for managing storage area in a portable radio communication equipment: The present invention relates to a method for managing storage area in a flash memory of a portable radio communication equipment, whereby the flash memory comprises a raw storage section for storing software code and a file system storage section for storing file information, comprising the steps of receiving size... Agent: Warren A. Sklar (soer) Renner, Otto, Boisselle & Sklar, LLP
20070283082 - Optimized flash memory access method and device: A method for accessing a non volatile memory device including at least one group or sector of memory cells divided into regions programmable with two different data storage densities and accessible with at least two reading modes, for example a two-level mode and a multilevel mode. The memory regions are... Agent: Graybeal, Jackson, Haley LLP
20070283084 - Memory and redundancy repair method thereof: A memory and the redundancy repair method thereof are provided. The memory includes a first memory unit and a second memory unit. The first memory unit includes a static random access memory (SRAM) unit and a redundancy unit, and the second memory unit is coupled to the first memory unit.... Agent: J C Patents, Inc.
20070283085 - External hard disk carrier with a capacity status display functionality: An external hard disk carrier with a capacity status display function is described. The external hard disk carrier comprises a hard disk, a microprocessor to calculate the capacity status of the hard disk and an e-paper display apparatus or cholesteric liquid crystal display apparatus to display the capacity status of... Agent: Rosenberg, Klein & Lee
20070283086 - Write caching random data and sequential data simultaneously: A method and apparatus associated with transferring data from a remote device to a recipient device having a first memory space and a second memory space. The method includes issuing a transfer command from the remote device to request transferring a set of data to the second memory space; temporarily... Agent: Fellers, Snider, Blankenship, Bailey & Tippens, P.C.
20070283088 - Method and apparatus for transformation of storage virtualization schemes: The present invention is a method and apparatus for simplifying the representation of storage virtualization schemes using a set of rules and standardizing such representations in a form having ready practical applicability. The invention provides rules to be implemented in hardware or software logic for transforming between representations from various... Agent: Beck And Tysver P.l.l.c.
20070283087 - Method and structure for adapting a storage virtualization scheme using transformations: The present invention uses a normal form to represent a storage virtualization scheme, and applies a set of rules to transform between other representations, using the normal form as an intermediate. The logic can be implemented in hardware or software in the host, network, or physical storage subsystems, either alone... Agent: Beck And Tysver P.l.l.c.
20070283089 - Method for expanding capacity of replication volume: A management computer comprises: a cascade configuration storage section which stores volume cascade configuration information which is information related to the configuration of the volume cascade; an expansion target volume determination section which determines any logical volume of the plurality of logical volumes as a target of expansion; a cascade... Agent: Antonelli, Terry, Stout & Kraus, LLP
20070283091 - Method, computer and computer system for monitoring performance: Performance of a storage subsystem is monitored at a proper level in a computer system having host computers, the storage subsystems, and a management computer. Each storage subsystem has physical disks and a disk controller to control input/output of the data to/from the physical disks. The disk controller provides storage... Agent: Stanley P. Fisher Reed Smith LLP
20070283090 - Storage system and volume management method for the same: A cluster-structured storage system where the access performance from a host system to a volume in an alternative-type storage subsystem is not degraded during failover, and a method for managing volume in the storage system. In this storage system, storage areas forming a primary storage subsystem and storage areas forming... Agent: Antonelli, Terry, Stout & Kraus, LLP
20070283093 - Data storage system: A method for storing data, consisting of distributing a first plurality of groups of logical addresses among one or more storage devices in a storage system, receiving a second plurality of data-sets containing the data to be stored, and assigning each data-set among the plurality of data-sets a random number... Agent: Katten Muchin Rosenman LLP
20070283092 - System and method of selection and communication of a disk for storage of a coredump: This invention provides a system and method for selecting and communicating a single disk (a “coredump disk”) for use in a coredump procedure by a failed file server (or filer). A selection method on the failed filer determines the “best candidate” coredump disk according to a predetermined set of criteria.... Agent: Cesari And Mckenna, LLP
20070283095 - Method to access storage device through universal serial bus: A method to access storage device through universal serial bus (USB) is disclosed in the present invention. The storage device includes a flash controller and a flash memory. The method includes: (1)connecting the storage device to a USB interface of an electronic device such as a computer; (2)transferring a plurality... Agent: Hoffmann & Baron, LLP
20070283094 - Protecting confidential information on portable storage media: A portable storage system for connecting to a host, the portable storage system includes a storage device for storing information and a switch. The switch includes a get mode wherein the host sees only the free space in the storage device and not the part storing the information. Optionally, the... Agent: Michael J. Buchenhorner
20070283097 - Displaying memory statistics for a keydrive: Methods, systems, and products are provided that display memory statistics for a keydrive that do not require the keydrive to be plugged into another device. Displaying memory statistics according to embodiments of the present invention include receiving a command resulting in a change to the memory usage of the keydrive,... Agent: International Corp (blf)
20070283096 - Memory card authentication system, capacity switching-type memory card host device, capacity switching-type memory card, storage capacity setting method, and storage capacity setting program: A system for authenticating a memory card including: a capacity switching-type memory card host device including a capacity switch notification module which notifies a memory card targeted for exchanging information that the capacity switching-type memory card host device handles a capacity switching-type memory card, and a capacity switch authentication module... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.
20070283098 - Apparatus and method for performing useful computations while waiting for a line in a system with a software implemented cache: An apparatus and method for performing useful computations during a software cache reload operation is provided. With the illustrative embodiments, in order to perform software caching, a compiler takes original source code, and while compiling the source code, inserts explicit cache lookup instructions into appropriate portions of the source code... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.
20070283099 - Logging of level-two cache transactions into banks of the level-two cache stores the transactions for diagnostic and debug: A plurality of processor cores on a chip is operated in a normal fashion in a debug and diagnostic mode of operation of the processor. A crossbar switch on the chip couples and decouples the plurality of processors to a plurality of banks in a level-two (L2) cache that is... Agent: Gunnison Mckay & Hodgson, LLP
20070283100 - Cache memory device and caching method: A cache memory device includes a command receiving unit that receives a plurality of commands from each of a plurality of processors; a processing unit that performs a process based on each of the commands; and a storage unit that stores in a queue a first command, when the command... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP
20070283101 - Just-in-time prefetching: A method and an apparatus for performing just-in-time data prefetching within a data processing system comprising a processor, a cache or prefetch buffer, and at least one memory storage device. The apparatus comprises a prefetch engine having means for issuing a data prefetch request for prefetching a data cache line... Agent: Dillon & Yudell LLP
20070283102 - Mechanism that provides efficient multi-word load atomicity: Disclosed is an apparatus, method, and program product that provides atomic, multi-word load support without incurring additional memory utilization. A double-word is atomically loaded without the use of one or more additional fields and without a lock. An invalidity marker is used in connection with a cache miss time to... Agent: Ibm Corporation RochesterIPLaw Dept. 917
20070283103 - System and method for sharing memory by heterogeneous processors: A system for sharing memory by heterogeneous processors, each of which is adapted to process its own instruction set, is presented. A common bus is used to couple the common memory to the various processors. In one embodiment, a cache for more than one of the processors is stored in... Agent: Ibm Corporation- Austin (jvl) C/o Van Leeuwen & Van Leeuwen
20070283104 - Concurrent hardware selftest for central storage: Disclosed are a concurrent selftest engine and its applications to verify, initialize and scramble the system memory concurrently along with mainline operations. In prior art, memory reconfiguration and initialization can only be done by firmware with a full system shutdown and reboot. The disclosed hardware, working along with firmware, allows... Agent: International Business Machines Corporation
20070283106 - Method and system for generating prefetch information for multi-block indirect memory access chains: Prefetch information is generated for multi-block indirect memory access chains. A method may include selecting a chain of indirect memory accesses of a procedure, the chain comprising a head access that does not depend for its address on another prefetch candidate memory access within the procedure and an indirect access... Agent: Mhkkg/sun
20070283105 - Method and system for identifying multi-block indirect memory access chains: A method and system for identifying multi-block indirect memory access chains. A method may include identifying basic blocks between an entry point and an exit point of a procedure, where the procedure includes a control statement governing its execution. It may be determined whether a probability of execution of a... Agent: Mhkkg/sun
20070283107 - Storage system, and management apparatus and method: The present invention provides a storage system having a higher level system with a predetermined application installed, a storage apparatus providing a storage area the application uses, and a host server that transmits data between the higher level system and the storage apparatus, and a management apparatus and method for... Agent: Stanley P. Fisher Reed Smith LLP
20070283109 - Memory controller configurable to allow bandwidth/latency tradeoff: A memory controller includes a plurality of channel control circuits. Each of the plurality of channel control circuits is coupled to a respective one of a plurality of channels which are coupled to a memory system. The plurality of channel control circuits are coupled to receive an indication of whether... Agent: Garlick Harrison & Markison
20070283108 - Memory management system: A system and method for managing accesses to a memory are provided. A memory management unit (MMU) and a translation lookaside buffer (TLB) are used. The TLB stores addresses of pages which have been recently accessed. The MMU includes a virtual map of an MMU table which stores physical addresses... Agent: Flynn Thiel Boutell & Tanis, P.C.
20070283112 - Method and apparatus for increasing an amount of memory on demand when monitoring remote mirroring performance: A method and storage system for increasing an amount of memory in a queuing area on. The storage system includes first and second storage subsystems connected to each other via a path. A primary volume in the first storage subsystem and a remote secondary volume in the second storage subsystem... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.
20070283111 - Method and system for transporting data content on a storage area network: A system and method of transporting volumes of information from one host computer system to another using point-in-time copies of LUNs but wherein the hardware provider does not necessarily understand the volume configuration of the data. The system and method involves an intermediate layer, i.e., a point-in-time copy interface layer... Agent: Merchant & Gould (microsoft)
20070283110 - Vehicle data backup method: In a vehicular system (1) configured such that data can be transmitted and received via a data bus (4) between an engine electronic control unit (2) for controlling an engine and electronic units (3-1 to 3-n) including a data storing function, the most recent content of accumulated data stored in... Agent: Connolly Bove Lodge & Hutz LLP
20070283116 - Data protection system for controlling data entry point: In the data protection system for controlling a data entry point, a storage unit for storing data includes a data entry point area and a data area for storing the physical data, in which the data entry points inside the data entry point area are pointed to specific sectors inside... Agent: Wpat, PC Intellectual Property Attorneys
20070283115 - Memory protection in a computer system employing memory virtualization: The use of a token-based memory protection technique may provide memory protection in a computer system employing memory virtualization. A token-based memory protection technique may include assigning a unique identifier to an application, process, or thread, and associating the identifier with a block of memory allocated to that application, process,... Agent: Mhkkg/sun
20070283114 - Method and system for dividing a hard disk drive into multiple host access spaces: Data storage device, system, and method for restricting host access to only one portion of a data storage device includes a storage device having a user space including a plurality of sectors and a plurality of host access spaces each including a corresponding plurality of portions of the plurality of... Agent: Trask Britt
20070283113 - Safe buffer: A method and system for implementing a safe buffer is described herein. The method includes implementing a buffer class that ensures that accesses to memory are performed in a safe manner. The buffer class may be a handle to protected resources in memory. The buffer class may exploit methods to... Agent: Microsoft Corporation
20070283117 - Unmanaged memory accessor: Various technologies and techniques are disclosed for allowing accesses to unmanaged memory. An unmanaged memory application programming interface is provided for allowing accesses to unmanaged memory. The application programming interface has a constructor, dispose method, read method, and write method. The constructor allows an instance of an unmanaged memory object... Agent: Thomas Holm Lawson
20070283118 - System and method to conserve conventional memory required to implement serial ata advanced host controller interface: An information handling system includes a processor and a system memory coupled to the processor. The system has a plurality of persistent mass storage devices including first and second storage devices. A device controller includes a first port operably connected to the first storage device and a second port operably... Agent: Baker Botts, LLP
20070283120 - Host computer system, storage system, and bandwidth management method: Provided is a computer system including a plurality of data storage apparatus and manages a bandwidth of a data storage apparatus according to an attribute of a storage volume. A storage system includes an interface for processing access to the storage volume from a host computer, and a control unit... Agent: Antonelli, Terry, Stout & Kraus, LLP
20070283119 - System and method for providing automated storage provisioning: A storage provisioning system generates a storage management framework comprising a resource model representing a set of storage devices for use by an application. The resource model comprises a set of data containers and at least one volume container such that the resource model provides storage to the application independent... Agent: Shimokaji & Associates, P.C.
20070283121 - Method and apparatus for handling concurrent address translation cache misses and hits under those misses while maintaining command order: A method and apparatus handles concurrent address translation cache misses and hits under those misses while maintaining command order based upon virtual channel. Commands are stored in a command processing unit that maintains ordering of the commands. A command buffer index is assigned to each address being sent from the... Agent: Ibm Corporation RochesterIPLaw Dept 917
20070283122 - Management of access to data from memory: Arbitrary patterns of address locations of digital data can be efficiently read from a memory of a signal processor. For example, a first memory address generator receives a first memory command signal from a first communication register to retrieve a first set of data from memory according to a look... Agent: Intel/blakely
20070283125 - Dynamic selection of memory virtualization techniques: A computer system may be configured to dynamically select a memory virtualization and corresponding virtual-to-physical address translation technique during execution of an application and to dynamically employ the selected technique in place of a current technique without re-initializing the application. The computer system may be configured to determine that a... Agent: Mhkkg/sun
20070283123 - Function-based virtual-to-physical address translation: A computer system employing memory virtualization may employ a function-based technique for virtual-to-physical address translation. A function-based translation technique may involve replacing a generic trap handler and one or more translation table look-ups with a function to compute a corresponding physical address from a given virtual address. The computer system... Agent: Mhkkg/sun
20070283124 - Hybrid techniques for memory virtualization in a computer system: A computer system may employ a first memory virtualization and corresponding virtual-to-physical address translation technique for a first application executing on a processor and a second memory virtualization and corresponding virtual-to-physical address translation technique for a second application executing on the same processor transparent to the first application. Different virtualization... Agent: Mhkkg/sun
20070283126 - Data search apparatus and a method thereof: A data search apparatus and method are disclosed for searching for a target address of a target data in a memory. The data search apparatus includes a data sort module, an address assignment module, an address transformation module, and at least one comparative module. The data sort module sorts a... Agent: North America Intellectual Property Corporation
20070283127 - Method and apparatus for indirectly addressed vector load-add-store across multi-processors: A method and apparatus to correctly compute a vector-gather, vector-operate (e.g., vector add), and vector-scatter sequence, particularly when elements of the vector may be redundantly presented, as with indirectly addressed vector operations. For an add operation, one vector register is loaded with the “add-in” values, and another vector register is... Agent: Schwegman, Lundberg & Woessner, P.A.Previous industry: Electrical computers and digital data processing systems: input/output
Next industry: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors)
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