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USPTO Class 711 | Browse by Industry: Previous - Next | All 07/2007 | Recent | 09: Oct | Sept | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 08: Dec | Nov | Oct | Sp | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 07: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 06: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Electrical computers and digital processing systems: memory inventions 07/07Recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.Listing format for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 07/26/2007 > patent applications in patent subcategories. 20070174536 - Storage system and storage control apparatus: In this invention, when execution of an special function executable only by a second storage control apparatus connected to a first storage control apparatus is requested by a higher-level apparatus, the special function is caused to be executed by a second storage control apparatus, and appropriate load balancing is achieved.... Agent: Stanley P. Fisher Reed Smith LLP 20070174537 - Method and apparatus for determining precedence in a classification engine: A precedence determination system including a first type memory bank configured to receive a first search signal and to provide first search result indications, a second type memory bank configured to receive a second search signal and to provide second search result indications, a precedence number table coupled to the... Agent: Stevens Law Group 20070174542 - Data migration method for disk apparatus: Data migration can be executed between new and old disk apparatuses without changing the disk definition of a host computer. A switch having the function of online data migration is provided between the host computer and the old disk apparatus, data are copied to the new disk apparatus while the... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070174538 - Method and arrangement for state memory management: The present invention relates to management of a state memory in a communications unit. The state memory then stores states that are used in message-based communication with external units in a communications system. The data message communicated between the units are defined into multiple message classes. Furthermore the state memory... Agent: Ericsson Inc. 20070174540 - Method for collecting text from musical disc: A method is disclosed for reading text data from a musical disc repeatedly recording a group including blocks each including packs each given a block number and a sequence number and writing them to a ring buffer including a first memory and a second memory. The method includes steps of... Agent: Kamrath & Associates P.A. 20070174541 - Methods to perform disk writes in a distributed shared disk system needing consistency across failures: Techniques are provided for managing caches in a system with multiple caches that may contain different copies of the same data item. Specifically, techniques are provided for coordinating the write-to-disk operations performed on such data items to ensure that older versions of the data item are not written over newer... Agent: Hickman Palermo Truong & Becker/oracle 20070174539 - System and method for restricting the number of object copies in an object based storage system: System and method for restricting the number of times the objects may be copied in an object based storage system. A command is generated by a host device that sets a copy limit for an object at the storage system. An OSD command is generated at the storage system that... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070174543 - High-security mask rom and data scramble/descramble method thereof: Provided are a high-security mask read-only memory (ROM) in which code data stored in a mask ROM cell array is prevented from being physically hacked, and a mask ROM data scramble/descramble method thereof. In the high-security mask ROM and the mask ROM data scramble/descramble method, a data scramble seed is... Agent: Myers Bigel Sibley & Sajovec 20070174545 - Data management device and method for managing recording medium: A data management device manages a recording medium, on which a partition table having information regarding a partition is recorded and on which a plurality of drives are assigned using partition description, by referring to the partition table. The plurality of drives include a recording drive on which a basic... Agent: Lerner, David, Littenberg, Krumholz & Mentlik 20070174544 - Data processing system and data processing method: A data processing system including a disc unit having a plurality of logical devices, a central processing unit for issuing commands with the plurality of logical devices designated as a processing range, and a disc controller for executing the commands for all of the logical devices designated as the processing... Agent: Stanley P. Fisher Reed Smith LLP 20070174546 - Hybrid disk drive and method of controlling data therein: A hybrid disk drive is utilized to achieve speed optimization and minimization of power consumption by installing a flash memory device in the hybrid disk drive and efficiently controlling data flow between the flash memory device and the disk drive. The hybrid disk drive includes a, volatile memory unit, a... Agent: Volentine & Whitt PLLC 20070174549 - Method for utilizing a memory interface to control partitioning of a memory module: Apparatuses and methods for implementing partitioning in memory cards and modules where conventional memory cards or modules have only a single partition. A representative memory card/module in accordance with the invention includes a memory device(s), and a memory interface which includes a data bus, a command line and a clock... Agent: Hollingsworth & Funk, LLC 20070174547 - Recording medium access device and recording medium access method: A semiconductor memory card (101) has a plurality of areas (105, 106) based on different file systems. An adapter (102) includes: an area switching part (110) which a user can operates, a determination part (109) for determining the operation; and a card controller (108) for issuing a switching command for... Agent: Smith Patent Office 20070174548 - [memory card with identifier]: A memory card with identifier is provided. The memory card comprises a microcontroller and a flash memory. The microcontroller is connected to a flash memory transmission interface and a memory card transmission interface, wherein the memory card transmission interface is further connected to a host end. The flash memory is... Agent: Jianq Chyun Intellectual Property Office 7f.-1, No. 100 20070174550 - Data area managing method in information recording medium and information processor employing data area managing method: Area management information is cached in a cache memory by controlling the access size when an information processor accesses the area management information in an information recording medium. When the processing content of the information processor is to retrieve an free area from the area management information, a physical management... Agent: Randolph A Smith Smith Patent Office 20070174552 - On-demand cache memory for storage subsystems: A cache on-demand module employing a cache performance module for managing size adjustments to a cache size of a cache memory in view of supporting an optimal performance of a storage subsystem employing the cache memory by determining an optimal cache size of the cache memory for supporting the optimal... Agent: Cardinal Law Group 20070174551 - Variable caching policy system and method: A method for managing data storage is described. The method includes receiving data from an external host at a peripheral storage device, detecting a file system type of the external host, and adapting a caching policy for transmitting the data to a memory accessible by the storage device, wherein the... Agent: Fish & Richardson P.C. 20070174553 - Efficient memory hierarchy management: In a processor, there are situations where instructions and some parts of a program may reside in a data cache prior to execution of the program. Hardware and software techniques are provided for fetching an instruction in the data cache after having a miss in an instruction cache to improve... Agent: Qualcomm Incorporated 20070174554 - Disowning cache entries on aging out of the entry: Caching where portions of data are stored in slower main memory and are transferred to faster memory between one or more processors and the main memory. The cache is such that an individual cache system must communicate to other associated cache systems, or check with such cache systems, to determine... Agent: Lynn L. Augspurger IBM Corporation 20070174555 - Future execution prefetching technique and architecture: A prefetching technique referred to as future execution (FE) dynamically creates a prefetching thread for each active thread in a processor by simply sending a copy of all committed, register-writing instructions in a primary thread to an otherwise idle processor. On the way to the second processor, a value predictor... Agent: Jones, Tullar & Cooper, P.C. 20070174556 - Methods and apparatus for reducing command reissue latency: In a first aspect, a first method of reducing reissue latency of a command received in a command processing pipeline from one of a plurality of units coupled to a bus is provided. The first method includes the steps of (1) from a first unit coupled to the bus, receiving... Agent: Ibm Corporation Intellectual Property Law Dept. 917 20070174557 - Multiprocessor system and its operational method: The multiprocessor system includes multiple cells having identical functions, and each of the multiple cells has a processor, a cache memory, and a main memory. The multiple cells include the first cell as a request cell, the second cell as a home cell, and the third cell as an owner... Agent: Mcginn Intellectual Property Law Group, PLLC 20070174558 - Method, system and program product for communicating among processes in a symmetric multi-processing cluster environment: A facility is provided for communicating among processes in a symmetric multi-processing (SMP) cluster environment wherein at least some SMP nodes of the SMP cluster include multiple processes. The facility includes transferring intra-nodal at an SMP node messages of a collective communication among processes employing a shared memory of the... Agent: Heslin Rothenberg Farley & Mesiti P.C. 20070174559 - Control system and method: A control system and method includes a controller operations system and a controller having hierarchically organized controller data. The controller operations system is configured for requesting first level controller data from a controller and receiving first level controller data from the controller, and requesting second level controller data from the... Agent: Harness, Dickey, & Pierce, P.l.c 20070174560 - Architectures for self-contained, mobile memory programming: A computer system comprising: a plurality of memories each containing one or more locations; and a first threadlet for causing a first program to run in the computer system when at least one first memory location of the plurality of memory locations is local to the threadlet. Also provided is... Agent: Jagtiani + Guttag 20070174561 - Data management information obtaining method for obtaining data management information including information concerning part of data areas as information concerning a pseudo area: On an information recording medium, a recording area is divided in a plurality of data areas, and data is recorded on each of the data areas. In response to a request for obtaining data management information concerning a recording of the data recorded on each of the data areas, a... Agent: Dickstein Shapiro LLP 20070174562 - Memory hub and method for memory system performance monitoring: A memory module includes a memory hub coupled to several memory devices. The memory hub includes at least one performance counter that tracks one or more system metrics-for example, page hit rate, number or percentage of prefetch hits, cache hit rate or percentage, read rate, number of read requests, write... Agent: Edward W. Bulchis, Esq. Dorsey & Whitney LLP 20070174564 - Medium drive and method of generating a defect map for registering positions of defects on a medium: A hard disk drive (HDD) according to an embodiment of the present invention uses three primary defect map (PDM) formats: a single-sector entry format; a multi-sector entry format; and a two-dimensional sector entry format. Methods of registering defective sectors in each such format are illustrated. Defects can be appropriately registered... Agent: Townsend And Townsend And Crew LLP 20070174563 - System and method for selecting memory locations for overwrite: A method and information technology system are provided that enable a one-pass automated selection of memory locations of a table to be made available for storing new data may be applied to clear memory space of the table as the table approaches an overload condition. A fraction of the memory... Agent: Patrick Reilly 20070174565 - Method and apparatus to automatically commit files to worm status: A system is provided to commit data to persistent storage. The system comprises a configuration component to set an autocommit period, a scanner to detect that the autocommit period has expired for a file and a commit component to commit the file to write once read many (WORM) status In... Agent: Network Appliance/blakely 20070174569 - Method of managing data snapshot images in a storage system: This specification discloses a method of managing data snapshot images in a storage system. The method includes the steps of: establishing a section allocation system that includes at least a media extent; establishing a section allocation table and a block association set in the media extent, wherein the section allocation... Agent: Birch Stewart Kolasch & Birch 20070174566 - Method of replicating data in a computer system containing a virtualized data storage area: Provided is a computer system capable of reducing a load on a virtualization apparatus during backup processing, including: at least one first storage system; at least one second storage system; a virtualization apparatus; at least one host computer; a backup unit; and a data transmission unit having access to the... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070174568 - Reproducing apparatus, reproduction controlling method, and program: A reproducing apparatus is disclosed which includes: a grouping section configured to group a plurality of content data stored on a storage medium into a plurality of content groups; a group selection section configured to select one of the plurality of content groups in response to an input from a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP 20070174567 - Storage apparatus and control method thereof: This storage apparatus has a controller for controlling, upon receiving a read request regarding data of the snapshot image of a prescribed generation from the host system, the reading of the data of the operational volume or the differential data of the pool volume as data of a snapshot image... Agent: Antonelli, Terry, Stout & Kraus, LLP 20070174571 - Binding a protected application program to shell code: A system and method for binding a protected application to a shell module. The shell module is appended to the application. The shell module executes prior to the execution of the application, and first creates a resource. After the shell module finishes execution, the application tries to access the created... Agent: Venable LLP 20070174570 - Information recording medium and information processing apparatus: The present invention makes it possible to perform copy control so that the available number of copy times of the data indicating the same contents is invariable irrespective of the type of playback apparatus. An information recording apparatus in the present invention has at least two recording areas. The first... Agent: Wenderoth, Lind & Ponack L.L.P. 20070174572 - Method and apparatus for multistage volume locking: A storage subsystem includes a controller having a plurality of ports and a plurality of storage devices configured store information. A lock table includes attribute information and retention information for each of a plurality of storage volumes presented to a host device. The plurality of storage volumes includes a non-virtual... Agent: Townsend And Townsend And Crew, LLP 20070174573 - Nonvolatile memory system: To prevent stored information from being changed even at the occurrence of an abnormal condition in an upstream side of a system due to uncontrollable run of an OS. A nonvolatile storage means having data storage areas and management areas for them in units of predetermined physical addresses has an... Agent: Miles & Stockbridge PC 20070174574 - System and method for managing disk space in a thin-provisioned storage subsystem: A system and method for managing disk space in a thin-provisioned storage subsystem. If a number of free segments in a free segment pool at a storage subsystem is detected as below a desired minimum, one or more of the following is performed: selecting and adding logical devices (LDEVs) from... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070174575 - Detection circuit for mixed asynchronous and synchronous memory operation: A memory access mode detection circuit and method for detecting and initiating memory access modes for a memory device The memory access mode detection circuit receives the memory address signals, the control signals, and the clock signal and generates a first mode detection signal in response to receipt of the... Agent: Kimton N. Eng, Esq. Dorsey & Whitney LLP 20070174579 - Apparatus for collecting garbage block of nonvolatile memory according to power state and method of collecting the same: Provided are an apparatus for collecting garbage blocks of a nonvolatile memory according to a power state and a method of collecting the same, and more particularly, an apparatus for collecting garbage blocks of a nonvolatile memory according to a power state and a method of collecting the same, in... Agent: Sughrue Mion, PLLC 20070174578 - Method of controlling card-shaped memory device: Each of a plurality of memory areas includes a plurality of blocks. Each of the blocks includes a plurality of pages. Each of the memory areas also includes a data cache and a page buffer. A control unit controls a lower-limit value of the number of empty blocks in each... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C. 20070174576 - Continuous backup: Providing continuous backup of a storage device includes subdividing the storage device into subsections, providing a time indicator that is modified periodically, and, in response to a request to write new data to a particular subsection of the storage device at a particular time, maintaining data being overwritten by the... Agent: Muirhead And Saturnelli, LLC 20070174577 - Non-blocking growable arrays: A computer system stores a dynamically sized array as a base array that contains references to subarrays in which the (composite) array's data elements reside. Each of the base-array elements that thus refers to a respective subarray is associated with a respective subarray size. Each base-array index is thereby at... Agent: Patent Group Foley Hoag LLP 20070174581 - Non-volatile memory storing critical data in a gaming machine: A method and apparatus of dynamically storing critical data of a gaming machine by allocating and deallocating memory space in a gaming machine is disclosed. One or more embodiments describe downloading or removing a new game to a gaming machine such that all existing critical data in NV-RAM memory is... Agent: Beyer Weaver LLP 20070174580 - Scalable storage architecture: The Scalable Storage Architecture SSA system integrates everything necessary for network storage and provides highly scalable and redundant storage space. The SSA comprises integrated and instantaneous back-up for maintaining data integrity in such a way as to make external backup unnecessary. The SSA also provides archiving and Hierarchical Storage Management... Agent: Peacock Myers, P.C. 20070174582 - Mutable association of a set of logical block addresses to a band of physical storage blocks: Method and apparatus for mutably associating logical block addresses to physical blocks. A physical storage space is apportioned into one or more bands. A logical block address (LBA) from a logical space is assigned to one of the bands, and the LBA is mutably associated with a particular physical block... Agent: Fellers, Snider, Blankenship, Bailey & Tippens 20070174583 - Conversion management device and conversion management method for a storage virtualization system: A conversion control unit correlates real block addresses of every storage device with virtual block addresses in a virtual storage device assigns a storage virtualization device for each virtual block address, distributes storage conversion tables containing the assigned correlated virtual block address and the real block address to each of... Agent: Staas & Halsey LLP 20070174584 - Translation lookaside buffer manipulation: A processor having a multistage pipeline includes a TLB and a TLB controller. In response to a TLB miss signal, the TLB controller initiates a TLB reload, requesting address translation information from either a memory or a higher-level TLB, and placing that information into the TLB. The processor flushes the... Agent: Qualcomm Incorporated 20070174585 - Modulo arithmetic: A modulo arithmetic (61) for generating the addresses for accessing the memory cells of a memory in a DSP (digital signal processor) includes three inputs: an input address (30), an increment (31) and a modulo value (33). The next address (36) is generated based on these inputs as follows. An... Agent: Birch Stewart Kolasch & Birch 07/19/2007 > patent applications in patent subcategories.20070168598 - Storage system that is connected to external storage: A first storage system is connected to a second storage system, and an external device within the first storage system is provided to a host as a device of the second storage system. The second storage system includes a cache control section having cache adaptors, each controlling a disk and... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070168599 - Flash memory circuit for supporting an ide apparatus: The present invention provides a flash memory circuit for accessing an IDE apparatus. This flash memory circuit includes a flash memory controller, a latch circuit and an IDE apparatus. The flash memory controller outputs a latch signal to control the latch circuit to access a special address signal and output... Agent: Birch Stewart Kolasch & Birch 20070168600 - Content access memory (cam) as an application hardware accelerator for servers: There are provided a hardware accelerator and method for providing hardware acceleration for an application server and/or a layer 7 switch. The hardware accelerator includes a content access memory (CAM) configured to accelerate string comparison operations in the application server and/or layer 7 switch. The string comparison operations involve strings... Agent: Keusey, Tutunjian & Bitetto, P.C. 20070168601 - Disk driver cluster management of time shift buffer with file allocation table structure: A file allocation system for a hard disk drive includes a memory with driver logic and a processor configured with the driver logic to receive a request to allocate hard disk space of a defined size for a buffer file. In some embodiments, the processor is configured with the driver... Agent: Scientific-atlanta, Inc. Intellectual Property Dept. 20070168603 - Information recording apparatus and control method thereof: According to one embodiment, there are provided an input unit which receives an input of command, a disk-shaped recording medium, a nonvolatile memory which serves as a cache memory for the disk-shaped recording medium, an acquisition unit which acquires status information denoting a status of the nonvolatile memory, and a... Agent: Pillsbury Winthrop Shaw Pittman, LLP 20070168604 - Information recording apparatus and method for controlling the same: According to one embodiment, an information recording apparatus includes an input which receives a command, a disk-like recording medium, a non-volatile memory serving as a cache memory for the disk-like recording medium, and a control unit for flashing information recorded in the non-volatile memory to the disk-like recording medium in... Agent: Pillsbury Winthrop Shaw Pittman, LLP 20070168602 - Information storage device and its control method: According to one embodiment, the device comprises an input part, a disc-shape storage medium, a non-volatile memory which becomes a cache memory for the disc-shape storage medium, and a control part which performs to store the information recorded in the non-volatile memory in the disc-shape storage medium based on a... Agent: Pillsbury Winthrop Shaw Pittman, LLP 20070168605 - Information storage device and its control method: According to one embodiment, the device comprises an input part, a disc-shaped storage medium, a non-volatile memory which becomes a cache memory for the disc-shape storage medium, an acquisition part which acquires status information showing the status of the non-volatile memory, and a control part which outputs the status information... Agent: Pillsbury Winthrop Shaw Pittman, LLP 20070168606 - Storage device using nonvolatile cache memory and control method thereof: In a storage device, a high-speed read/write operation and low power consumption are realized and the service life of a storage medium which is a semiconductor memory can be made longer. The storage device includes a host interface, a command analyzing section which analyzes the contents of a command input... Agent: Pillsbury Winthrop Shaw Pittman, LLP 20070168607 - Storage device using nonvolatile cache memory and control method thereof: In a storage device, the data process can be performed without lowering the data processing efficiency even when the sector length of the host device side and the sector length of the hard disk side are different from each other. Partial data or whole data of a second data block... Agent: Pillsbury Winthrop Shaw Pittman, LLP 20070168608 - Storage device using nonvolatile cache memory and control method thereof: A data process can be performed without lowering the data processing efficiency even when the sector length of the host device side is different from the sector length of the hard disk side. Partial data or whole data of a second data block which is based on a long sector... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP 20070168612 - Storage control system: The enclosure 10 in which the storage control system 600 is constructed comprises a scale-out NAS head group 111 constituted by two or more NAS heads, and a scale-up NAS head 110H that is a higher performance NAS head than each of NAS head members 110L that are the NAS... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070168610 - Storage device controller: Provided is a storage controller capable of improving the access performance to the storage device by preventing an I/O access request to the storage device from being concentrated on certain I/O processors among a plurality of I/O processor, and causing the plurality of I/O processors to issue the I/O access... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070168611 - Storage system and method for a storage control apparatus using information on management of storage resources: A storage control apparatus comprises a data I/O control unit which has communication ports adapted to connect with any of information processing apparatuses, is communicatively connected to physical disk drives for storing data, and performs data read/write from/to the drives according to a data I/O request received from the processing... Agent: Antonelli, Terry, Stout & Kraus, LLP 20070168609 - System and method for the migration of storage formats: A system and method is disclosed for migrating configuration information for a storage array between storage controllers. At a shutdown, a first storage controller saves its configuration information to a storage location in or associated with the storage enclosure processor of the storage array. When a second controller is coupled... Agent: Roger Fulghum Baker Botts L.L.P. 20070168613 - Memory card system, memory card and method for executing an application program thereon: A memory card system and memory card. The memory card system may include a host and a memory card able to be received by the host. The memory card may transfer an application program index to the host in response to a command from the host. Time spent finding information... Agent: F. Chau & Associates, LLC 20070168614 - Secure-digital (sd) flash card with auto-adaptive protocol and capacity: An adaptable-capacity Secure Digital (SD) card operates as a standard-capacity SD card for a standard-capacity SD 2.0 or 1.x host, and operates as a high-capacity SD card when connected to a high-capacity SD 2.0 host. A 32-bit argument received in a SD bus transaction from the host may be a... Agent: Stuart T Auvinen 20070168615 - Data processing system with cache optimised for processing dataflow applications: Non-overlapping cache locations are reserved for each data stream. Therefore, stream information, which is unique to each stream, is used to index the cache memory. Here, this stream information is represented by the stream identification. In particular, a data processing system optimised for processing dataflow applications with tasks and data... Agent: Philips Intellectual Property & Standards 20070168616 - Embedded dram cache memory and method having reduced latency: A computer system includes a processor, a system memory, and an integrated circuit system controller coupled to the processor and the system memory. The system controller includes a system memory controller coupled to the system memory, a processor interface coupled to the processor and an embedded cache memory integrated with... Agent: Edward W. Bulchis, Esq. Dorsey & Whitney LLP 20070168617 - Patrol snooping for higher level cache eviction candidate identification: A computer system having patrol snoop sequencer that sequences through addresses of cache lines held in a higher level cache, making snoop reads using those addresses to a lower level cache. If a particular cache line held in the higher level cache is not held in the lower level cache,... Agent: Robert R. Williams IBM Corporation, 20070168618 - Data processing system, cache system and method for precisely forming an invalid coherency state indicating a broadcast scope: A cache coherent data processing system includes at least first and second coherency domains. In a first cache memory within the first coherency domain of the data processing system, a memory block is held in a storage location associated with an address tag and a coherency state field. A determination... Agent: Dillon & Yudell LLP 20070168619 - Separate data/coherency caches in a shared memory multiprocessor system: The system and method described herein is a dual system directory structure that performs the role of system cache, i.e., data, and system control, i.e., coherency. The system includes two system cache directories. These two cache directories are equal in size and collectively large enough to contain all of the... Agent: Lynn L. Augspurger IBM Corporation 20070168620 - System and method of multi-core cache coherency: Systems and methods for cache coherency in multi-processor systems. A cache coherency system is used in a multi-processor computer system having a physical memory system in communication with the processors via a communication medium. A processor-side cache memory subsystem is associated with each processor of the multi-processor computer system. The... Agent: Wilmer Cutler Pickering Hale And Dorr LLP 20070168621 - Memory reduction technique for statistics accumulation and processing: To provide a memory efficient method and system for statistical data accumulation and processing, data is divided into multiple data zones and divided into subgroups of memories. A separate memory bin is assigned for each of the subgroups, and this memory bin is shared between various two data zones in... Agent: Gardere Wynne Sewell LLP Intellectual Property Section 20070168622 - Processor architecture: A processing system comprises a multiport memory module having N ports, N data communication buses, and N hardware acceleration modules that communicate with a respective one of the N ports on a respective one of the N data communication buses. A first one of the N hardware acceleration modules performs... Agent: Harness, Dickey & Pierce P.L.C 20070168624 - Increased storage capacity for solid state disks using data compression: The storage capacity of a solid state disk (SSD) device is increased through data compression. The SSD is coupled to a host computer system and includes a non-volatile storage module (NVSM) and a volatile memory (VM). The SSD is associated with a predetermined compression ratio of n to 1, where... Agent: Robert C. Strawbrich 20070168623 - Method for storing and/or changing state-information of a memory as well as integrated circuit and data carrier: In a method for storing and/or changing state information in a memory (2) containing a plurality of memory cells (3), wherein the memory cells (3) assume an irreversible memory state as a result of a programming step, wherein the state information is represented by a number and/or position of memory... Agent: Philips Electronics North America Corporation Intellectual Property & Standards 20070168625 - Interleaving policies for flash memory: Articles and associated methods and systems relate to selecting read interleaving policies independently of selecting write interleaving policies. In various implementations, the selection may be static or dynamic during operation. In implementations that dynamically select read interleaving policies and write interleaving policies, the selection may be based on various operating... Agent: Fish & Richardson P.C. 20070168627 - Method and apparatus for reducing page replacement time in system using demand paging technique: A method and apparatus for reducing a page replacement time in a system using a demand paging technique are provided. The apparatus includes a memory management unit which transmits a signal indicating that a page fault occurs, a device driver which reads a page having the page fault from a... Agent: Sughrue Mion, PLLC 20070168626 - Transforming flush queue command to memory barrier command in disk drive: In a HDD, the flush queue (cache) command is transformed into a memory barrier command. The HDD thus has an operation mode in which flush commands do not cause the pending commands to be executed immediately, but instead simply introduces a constraint on the command reordering algorithms that prevents commands... Agent: Rogitz & Associates 20070168628 - Method for backing up personal data of a telecommunications network subscriber, server and associated device: In a method for backing up personal data of a wireless communications network subscriber, the data is saved in a mobile communications device and backed up in a server of the network. A first subset of data is prepared from a set to be saved by a SIM card and... Agent: Buchanan, Ingersoll & Rooney PC 20070168629 - Storage controller and data management method: This storage controller providing a volume for storing data transmitted from a host system includes a management unit for managing the data written in the volume with a first block area, or a second block area in the first block area which is smaller than the first block area; a... Agent: Stanley P. Fisher Reed Smith LLP 20070168630 - Storage system and data processing system: A storage system comprises a data set storage region or storing a data set containing data and update data for managing this data, and a control section. The data set storage region is divided into a plurality of storage regions including a first storage region and a second storage region.... Agent: Townsend And Townsend And Crew, LLP 20070168631 - Semiconductor memory device and methods thereof: A semiconductor memory device and methods thereof are provided. The example semiconductor memory device may include a memory cell configured to store data, a storage unit configured to store at least one data pattern, a data output circuit configured to output the stored data during a first type of read... Agent: Harness, Dickey & Pierce, P.L.C 20070168633 - Method and apparatus for defragmentation and for detection of relocated blocks: A method of operating a storage system includes moving a block of data stored in the storage system to a new location in the storage system, such as for purposes of defragmentation. After the block has been moved to the new location, the storage system receives a request requiring access... Agent: Network Appliance/blakely 20070168632 - Non-volatile memory: A method and system for accessing a non-volatile memory is disclosed. The method includes writing a first stream of data to a first block of a first region of a non-volatile memory and detecting a full condition of the first block of the first region. Further, the method includes identifying... Agent: Toler Schaffer, LLP 20070168634 - Storage system and storage control method: A pool, which has multiple pool regions which are storage regions capable of being dynamically allocated or released, is configured from a plurality of pool groups and a pool free region group which is common to the plurality of pool groups. Each of the pool groups is related to each... Agent: Townsend And Townsend And Crew, LLP 20070168635 - Apparatus and method for dynamically improving memory affinity of logical partitions: In a computer system that includes multiple nodes and multiple logical partitions, a dynamic partition manager computes current memory affinity and potential memory affinity at the request of a logical partition to help the logical partition determine whether a reallocation of resources between nodes may improve memory affinity for the... Agent: Martin & Associates, LLC 20070168636 - Chained hybrid iommu: In one embodiment, an input/output (I/O) node comprises an I/O memory management unit (IOMMU) configured to translate memory requests. The I/O node is configured to couple to an interconnect and to operate as a tunnel on the interconnect, and wherein the IOMMU is configured translate memory requests passing through the... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd) 20070168637 - Memory array programming circuit and a method for using the circuit: A multi-level cell (MLC) memory array may be programmed using a programming circuit having a binary input register to store data to be input into the MLC array and a register to store a programming vector, where each element in the programming vector corresponds to a charge storage region of... Agent: Empk & Shiloh, LLP 20070168638 - Method and system for automatically distributing real memory between virtual memory page sizes: A method, system and computer program product for allocating real memory to virtual memory page sizes when all real memory is in use is disclosed. In response to a page fault, a page frame for a virtual page is selected. In response to determining that said page does not represent... Agent: Dillon & Yudell LLP 20070168642 - Virtual on-chip memory: A “virtual on-chip memory” that provides advantages as compared to an on-chip memory that utilizes a cache. In accordance with the invention, when a CPU attempts to access a memory address that is not on-chip, the access is aborted and the abort is handled at a page level. A single... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c. 20070168641 - Virtualizing an iommu: In one embodiment, a system comprises one or more input/output (I/O) devices; an I/O memory management unit (IOMMU) coupled to receive memory requests sourced by the I/O devices and configured to provide address translation for the memory requests; and a virtual machine monitor (VMM) configured to manage one or more... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd) 20070168639 - Data processing system and method for selecting a scope of broadcast of an operation by reference to a translation table: A data processing system includes at least first and second coherency domains coupled by an interconnect fabric. A memory coupled to the interconnect fabric includes an address translation table having a translation table entry utilized to translate virtual memory addresses to real memory addresses. The translation table entry also includes... Agent: Dillon & Yudell LLP 20070168640 - Method for searching a data page for inserting a data record: A method of searching a data page in a table space of a database for inserting a data record to a first table, wherein the table space comprises space map pages and sets of data pages, wherein each space map page comprises information about the available storage space of one... Agent: Ibm Corporation RochesterIPLaw Dept. 917 20070168643 - Dma address translation in an iommu: In an embodiment, an input/output (I/O) memory management unit (IOMMU) comprises at least one memory configured to store translation data; and control logic coupled to the memory and configured to translate an I/O device-generated memory request using the translation data. The translation data corresponds to one or more device table... Agent: Lawrence J. Merkel Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C. 20070168644 - Using an iommu to create memory archetypes: In one embodiment, an input/output (I/O) memory management unit (IOMMU) comprises at least one memory and control logic coupled to the memory. The memory is configured to store translation data corresponding to one or more I/O translation tables stored in a memory system of a computer system that includes the... Agent: Lawrence J. Merkel Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C. 07/12/2007 > patent applications in patent subcategories.20070162682 - Memory controller: Reference number 21 indicates a CPU, reference number 22 indicates a memory controller, and reference number 23 indicates a parameter set register group that has access parameters shared and used by banks. In the parameter set register group 23, parameter sets S0 to Sn having elements P0 to Pn exist.... Agent: Mcdermott Will & Emery LLP 20070162680 - Virtual location aware content using presence information data formation with location object (pidf-lo): The format of the Presence Information Data Format—Location Object (PIDF-LO) as defined by the Internet Engineering Task Force (IETF) is extended or modified to accommodate, within the standard PIDF-LO format, an association of geospacial location to virtual content on the Internet. A filename of virtual content is associated with geospacial... Agent: Manelli Denison & Selter PLLC 20070162681 - User-configurable pre-recorded storage and system: The user-configurable pre-recorded storage (UC-PS) is a user-configurable pre-recorded memory with very large capacity. UC-PS is commonly based on disc, particularly hard-disc drive. It is particularly suitable for movie release. To protect copyright, pre-recorded contents stored on disc are preferably encrypted. The UC-PS will enable a content-distribution model fair to... Agent: Dr.guobiao Zhang 20070162683 - Method for speeding up page table address update on virtual machine: A method is provided which eliminates redundancy from the shadow PT operation performed by the VMM when the guest operating system running on a virtual machine updates a guest PT address. The VMM associates a plurality of shadow PTs with guest PTs and allocates their relation in memory. When it... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070162684 - Apparatus and method to configure, format, and test, a data storage subsystem product: An apparatus and method are disclosed to configure, format, and test, a data storage subsystem product. The method supplies a data storage subsystem product comprising one or more host computer ports, a processor, one or more data storage device ports, and one or more data storage devices interconnected to the... Agent: Dale F. Regelman 20070162685 - Memory data bus structure and method of transferring information with plural memory banks: A data bus structure for a dynamic random access memory (DRAM) according to the present invention includes a series of data buses, each shared by a plurality of memory banks, and a switching device to selectively couple the data buses to a global data bus to enable the memory device... Agent: Edell, Shapiro & Finnan, LLC 20070162686 - Recording device, recording-medium-management method, program of recording-medium-management method, and recording medium recording program of recording-medium-management method: A recording device which records data onto a recording medium includes a nonvolatile memory storing and holding data on a free capacity of the recording medium, and a control unit controlling the data recording. The control unit determines the free-capacity data stored in the nonvolatile memory based on the total... Agent: Lerner, David, Littenberg, Krumholz & Mentlik 20070162687 - Flash memory and method for utilizing the same: A flash memory and a method for utilizing the same are disclosed. The method for utilizing a flash memory includes the steps of: a) providing a flash memory of a single chip; b) formatting the flash memory and marking bad blocks of the flash memory as a bad-block area free... Agent: Bacon & Thomas, PLLC 20070162688 - Recording control apparatus, recording control method and recording apparatus integral with camera: The present invention efficiently executes a transfer process from a flash memory to an optical disc. A recording control apparatus includes a UDF file system section that configures a UDF file system on the flash file system of a flash memory and an application format section that converts video and... Agent: Lerner, David, Littenberg, Krumholz & Mentlik 20070162689 - Memory controller, memory module and memory system having the same, and method of controlling the memory system: A memory system includes a memory controller and a plurality of first memory components. The memory controller has a plurality of I/O channels, each of the I/O channels including a command/address bus and a data bus. The plurality of the first memory components are respectively coupled to the memory controller... Agent: Mills & Onello LLP 20070162690 - Incremental provisioning of software: Methods and apparatuses provide for incremental provisioning of software for a processing system. For instance, a processing system may include a machine accessible medium and a processor in communication with the machine accessible medium. In addition, instructions encoded in the machine accessible medium may cause the processing system to automatically... Agent: Blakely Sokoloff Taylor & Zafman 20070162691 - Apparatus and method to store information: A method to store data is disclosed. The method supplies a computing system comprising a computing device, a first DASD in communication with the computing device, a second DASD in communication with the computing device, and a plurality of non-DASD data storage devices in communication with the computing device. The... Agent: Dale F. Regelman 20070162693 - Hybrid hard disk drive control method and recording medium and apparatus suitable therefor: A method of controlling a hybrid HDD to permanently deactivate a non-volatile cache support mode by determining whether a limit in the use of a non-volatile cache is passed, and a recording medium and apparatus suitable for the control method. The control method of a hybrid hard disk drive having... Agent: Stanzione & Kim, LLP 20070162694 - Cache memory for a scalable information distribution system: An information distribution system includes an interconnect and multiple data processing nodes coupled to the interconnect. Each data processing node includes mass storage and a cache. Each data processing node also includes interface logic configured to receive signals from the interconnect and to apply the signals from the interconnect to... Agent: Fsp LLC 20070162692 - Power controlled disk array system using log storage area: Power consumption of a storage system is reduced by shutting down disk drives when they are not needed. A storage system having an interface connected to a host computer, a controller connected to the interface and having a processor and a memory, and disk drives storing data that is requested... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070162696 - Disk array and method for reading/writing data from/into disk unit: When a bus is used as a data communication channel, data within a disk unit cannot be reproduced or copied into a spare disk while a control unit is making read/write processing based on a request from a host computer, or vice versa. Thus, a loop is constructed by a... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070162695 - Method for configuring a storage drive: A system and method is disclosed for configuring a storage drive. A Serial ATA drive is configured to include a self-describing RAID header. The self-describing RAID header identifies the storage drive as comprising a single volume of a RAID Level 0 array. Within the header, the size of the storage... Agent: Roger Fulghum Baker Botts L.L.P. 20070162697 - Volume management method and apparatus: A volume management method is proposed for setting at least a logical volume over a plurality of physical storage devices by taking requested performance of other volumes into consideration. The volume management method comprises the steps of: receiving a volume creation request specifying a requested storage capacity and requested average... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070162699 - Apparatus for expanding storage capacity of memory card and operating method of memory card with the same: A card controller which may include a central processing unit; a booting memory for storing a plurality of command sets; a memory discriminator for extracting memory information from an added memory to transfer the extracted memory information to the central processing unit; and a memory controller configured to be set... Agent: Harness, Dickey & Pierce, P.L.C 20070162698 - Structure for connecting a usb communication interface in a flash memory card by the height difference of a rigid flexible board: The present invention relates to a flash memory card that is a structure using a rigid flexible board (RFB) to connect a flash memory card unit and a universal serial bus (USB) unit. A communication interface in compliance with the specification of the flash memory card is disposed at one... Agent: Bacon & Thomas, PLLC 20070162704 - System and method for searching data: The present invention provides a method for searching data. The method includes the steps of: receiving a search request for searching specified data; searching a permanent cache that stores data for the specified data; determining whether the specified data are stored in the permanent cache; searching Web sites for the... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp 20070162701 - Head of queue cache for communication interfaces: Methods and systems for caching data from a head end of a queue are described. The cached data can then be selectively forwarded from the data producer to the data consumer upon request.... Agent: Hewlett Packard Company 20070162703 - Method and structure for an improved data reformatting procedure: A method (and structure) of managing memory in which a low-level mechanism is executed to signal, in a sequence of instructions generated at a higher level, that at least a portion of a contiguous area of memory is permitted to be overwritten.... Agent: Mcginn Intellectual Property Law Group, PLLC 20070162700 - Optimizing write and wear performance for a memory: Determining and using the ideal size of memory to be transferred from high speed memory to a low speed memory may result in speedier saves to the low speed memory and a longer life for the low speed memory.... Agent: Marshall, Gerstein & Borun LLP (microsoft) 20070162705 - Sequencer cache and method for operating the same: A cache system includes a cache memory dedicated to service a number of sequencers with sequencer code. A number of cache managers are defined to direct placement of sequencer code portions into the cache memory. Also, each of the number of cache managers is defined to provide sequencer code from... Agent: Martine Penilla & Gencarella, LLP 20070162702 - System and method for acquiring data from a cache in a distributed network: The On-Demand Cache Acquisition Tool, or “OCAT,” is a computer implemented system and process for acquiring data from a cache in a distributed network of computers, comprising: receiving a query for the data; sending the query to a remote server in the distributed network; receiving a reply from the remote... Agent: Ibm Corp. (raleigh Software Group) C/o Rudolf O Siegesmund Gordon & Rees, LLP 20070162706 - Method and circuit to implement digital delay lines: A delay line circuit and method to delay digital data in a main memory is provided. The delay line circuit may comprise primary delay line cache, secondary delay line cache, and a cache controller to control communication of data between the secondary delay cache and the primary delay cache. The... Agent: Schwegman, Lundberg, Woessner & Kluth/creativelabs 20070162712 - Recording medium, apparatus for reproducing data and method thereof: In one embodiment, the recording medium includes a management area storing management information. The management information includes navigation information for reproducing data from the recording medium, and the navigation information including region information. The region information indicates at least one geographic region in which reproduction of the data is permitted.... Agent: Harness, Dickey & Pierce, P.L.C 20070162707 - Information recording medium data processing apparatus and data recording method: The data processing apparatus (200) holds information about free area which enables writing at specific or more speed in a recording area of an information recording medium (100) including the recording area composed of plural blocks, in a valid free area manager (240) A free area which enables writing at... Agent: Greenblum & Bernstein, P.L.C 20070162709 - Method and apparatus for accessing memory and computer product: A memory includes a set of sequentially stored data. Each of the data includes a variable-length data and length information indicative of a data length of the variable-length data. An MPU creates a read instruction for reading the set of data. A DMS chip, upon receiving the read instruction, reads... Agent: Staas & Halsey LLP 20070162708 - Method and apparatus for virtual load regions in storage system controllers: Methods and apparatuses for facilitating the management of multiple controller code versions for implementing operational aspects of storage system controllers are provided. In particular, multiple versions of storage controller code are loaded into the physical memory of a storage controller. The logical region in which a particular controller code version... Agent: Sheridan Ross PC 20070162710 - Parallel processing memory cell: A digital memory cell incorporated into an integrated circuit in a standard package containing: a two dimensional array of such memory cells each of which can hold one bit of data and each of which incorporates an arithmetic logic unit which can perform logical and arithmetic operations on data bits... Agent: Victor A Wiseman #508 20070162711 - Recording medium, apparatus for reproducing data and method thereof: In one embodiment, the recording medium includes a management area storing management information. The management information includes navigation information for reproducing data from the recording medium, and the navigation information including region information. The region information indicates at least one geographic region in which reproduction of the data is permitted.... Agent: Harness, Dickey & Pierce, P.L.C 20070162713 - Memory having status register read function: A memory includes a status register and a read/write data bus. The status register is configured to pass status register values to the read/write data bus in response to a status register read command.... Agent: Dicke, Billig & Czaja 20070162714 - Method and system for interleaving first and second halves of a data segment of unknown length: Method and system for dividing a data segment of unknown length into first and second halves, for example, for interleaving the first and second halves. Units of the data segment are written into first and second register files. With respect to the first register file, responsive to determining that the... Agent: Lsi Logic Corporation Legal Department - Ip 20070162715 - Memory control device: Improved efficiency of address/data communication over a memory bus. A memory-control device is located between a processor 30 and memory ranks 40a, 40b and controls access to the memory ranks 40a, 40b. A memory-management unit 10 receives and buffers access request from the processor 30 to memory ranks 40a, 40b,... Agent: Whitham, Curtis & Christofferson & Cook, P.C. 20070162717 - Method for managing pair states in a storage system: A storage system includes an application server that provides an application composed of a plurality of programs, a plurality of first volumes that store data that the programs use, and a plurality of second volumes set in pair states where replicas of the plurality of first volumes are stored. A... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070162716 - Storage controller and control method thereof: In a storage controller which stores data provided from a host system, creates a snapshot, which is a data image of a production volume at a given point in time, at regular or irregular intervals, and holds difference data of the snapshot in a pool volume, multiple pool volumes are... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070162718 - Storage system: A technique that can efficiently achieve migration of a configuration and data between storage units with varying constructions of configuration information and that can alleviate burdens of personal operation by an administrator, etc. With the configuration information of each storage unit controlled by the storage control server, based on each... Agent: Stanley P. Fisher Reed Smith LLP 20070162719 - Apparatus and method to switch a fifo between strobe sources: A first-in, first-out (FIFO) unit switches between strobe sources. The FIFO uses a multiplexer to switch between two or more strobes so that different data strobes may be used with the FIFO to strobe in the data. In one implementation, the FIFO uses four data latches to strobe in data... Agent: Garlick Harrison & Markison 20070162720 - Apparatus and method for autonomically adjusting one or more computer program configuration settings when resources in a logical partition change: A computer program communicates with a partition manager in the logical partition where the computer program is run. When resource allocation in the logical partition dynamically changes, the partition manager notifies the computer program of the configuration change. The computer program may autonomically adjust one or more configuration settings that... Agent: Martin & Associates, LLC 20070162721 - Virtualization controller and data transfer control method: System for controlling data transfer between a host system and storage devices. A virtualization controller implements the data transfer and includes first ports for connection with the storage devices, a second port for connection with the host system, a processor, and a memory configured to store volume mapping information which... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 07/05/2007 > patent applications in patent subcategories.20070156944 - Host memory interface for a parallel processor: A memory interface for a parallel processor which has an array of processing elements and can receive a memory address and supply the memory address to a memory connected to the processing elements. The processing elements transfer data to and from the memory at the memory address. The memory interface... Agent: Edward W. Bulchis, Esq. Dorsey & Whitney LLP 20070156945 - Signal processing circuit: The read out data is written in into the buffer 10 and when it is judged as it is not a desired user block by the user block judging means 7, the address pointer is controlled to keep the original position in the buffer 10 by the address pointer generating... Agent: Mcdermott Will & Emery LLP 20070156947 - Address translation scheme based on bank address bits for a multi-processor, single channel memory system: A method, device, and system are disclosed. In one embodiment, the method comprises mapping at least one bank in a memory to a first device for exclusive use, and mapping at least one other bank in the memory to a second device for exclusive use.... Agent: Intel Corporation C/o Intellevate, LLC 20070156946 - Memory controller with bank sorting and scheduling: In some embodiments a memory controller is disclosed that includes at least one command/address input buffer to receive commands and addresses. The addresses specify a memory bank and a location within the memory bank An arbiter, coupled to the at least one command/address input buffer, merges commands and addresses from... Agent: RyderIPLaw C/o Intellevate 20070156948 - Semiconductor memory device, controller, and read/write control method thereof: A controller 102 and four flash memories F0 to F3 are connected by twos to two memory buses, and each flash memory is divided into two regions of substantially the same size to form a first half and a last half regions. In a four-memory configuration, a consecutive logical address... Agent: Smith Patent Office 20070156950 - Dividing a flash memory operation into phases: A flash memory that could not have completed an operation within a time required by a host may be able to work with the host by dividing the operation into phases that may be completed within the allocated time. As a result, a type of memory that would otherwise be... Agent: Trop Pruner & Hu, PC 20070156949 - Method and apparatus for single chip system boot: A method and apparatus for providing execution resources in a flash device is described herein. In a first mode, a write buffer in the flash device is used as a general purpose memory, i.e. a processing element, such as a host microprocessor uses the write buffer as an execution/variable space.... Agent: Intel Corporation C/o Intellevate, LLC 20070156951 - Method and system usable in sensor networks for handling memory faults: A method and system usable in sensor networks for handling memory faults is disclosed. In order to protect the operating system of a sensor node, coarse-grained memory protection is provided by creating and enforcing an application fault domain in the data memory address space of the sensor node. The data... Agent: Nec Laboratories America, Inc. 20070156952 - Digital storage safe: In some embodiments a digital storage safe includes a storage device, a disaster resistant container enclosing the storage device, and a connector that may be coupled to a device external to the disaster resistant container to allow the external device to read contents from the storage device and to write... Agent: Intel Corporation C/o Intellevate, LLC 20070156953 - Information recording medium, method of configuring version information thereof, recording and reproducing method using the same, and recording and reproducing apparatus thereof: In one embodiment, the method includes generating version information including a first version information and a second version information. At least one of the first version information and the second version information is to determine a backward compatibility with respect to reading or writing of the recording medium. The version... Agent: Harness, Dickey & Pierce, P.L.C 20070156955 - Method and apparatus for queuing disk drive access requests: A method includes receiving a request to access a disk drive. The request has a size. The method further includes selecting a queue, based at least in part on the size of the request, from among a plurality of queues, and assigning the request to the selected queue.... Agent: Buckley, Maschoff & Talwalkar LLC 20070156954 - Method and apparatus to maintain data integrity in disk cache memory during and after periods of cache inaccessiblity: A volatile or nonvolatile cache memory can cache mass storage device read data and write data. The cache memory may become inaccessible, and I/O operations may go directly to the mass storage device, bypassing the cache memory. A log of write operations may be maintained to update the cache memory... Agent: Lemoine Patent Services, PLLC C/o Portfolioip 20070156957 - Methods, systems, and computer program products for dynamic mapping of logical units in a redundant array of inexpensive disks (raid) environment: Disclosed are methods, systems, and computer program products for dynamic mapping of logical unit (LUN) storage extents in a redundant array of inexpensive disks (RAID) environment. According to one method, a data storage extent pool representing at least a portion of a RAID array and including at least one data... Agent: Jenkins, Wilson, Taylor & Hunt, P. A. 20070156956 - Methods, systems, and computer program products for optimized copying of logical units (luns) in a redundant array of inexpensive disks (raid) environment using buffers that are larger than lun delta map chunks: Disclosed are methods, systems, and computer program products for optimized copying of logical units (LUNs) in a redundant array of inexpensive disks (RAID) environment using buffers that are larger than delta map chunks. According to one method, a delta map is provided including delta indicators for tracking locations of changes... Agent: Jenkins, Wilson, Taylor & Hunt, P. A. 20070156958 - Methods, systems, and computer program products for optimized copying of logical units (luns) in a redundant array of inexpensive disks (raid) environment using buffers that are smaller than lun delta map chunks: Disclosed are methods, systems, and computer program products for optimized copying of logical units (LUNs) in a redundant array of inexpensive disks (RAID) environment using buffers that are smaller than delta map chunks. According to one method, a delta map is provided including delta indicators for tracking locations of changes... Agent: Jenkins, Wilson, Taylor & Hunt, P. A. 20070156959 - Multi-slot storage controller capable of using various types of storage media: A storage controller includes a CPU for controlling each component in the storage controller; a ROM for storing programs executed by the CPU and data required for this execution; a RAM employed as a work area when the CPU executes the programs; a first ASIC (USB system) for controlling data... Agent: Baker Botts LLP C/o Intellectual Property Department 20070156962 - Media device with intelligent cache utilization: A portable media device and a method for operating a portable media device are disclosed. According to one aspect, a battery-powered portable media device can manage use of a mass storage device to efficiently utilize battery power. By providing a cache memory and loading the cache memory so as to... Agent: Beyer Weaver LLP/apple Inc. 20070156961 - Apparatus, system, and method for regulating the number of write requests in a fixed-size cache: An apparatus, system, and method are disclosed for regulating the number of write requests in a fixed-size cache that facilitates differentiated treatment of write requests based on an assigned pacing value. The apparatus includes an examination module to examine a pending write request issued by an application. A priority module... Agent: Kunzler & Mckenzie 20070156960 - Ordered combination of uncacheable writes: Methods and apparatus to reduce the number of uncacheable write requests are described. In one embodiment, a single uncacheable write request is sent instead of a plurality of uncacheable write requests to an address.... Agent: Caven & Aghevli LLC C/o Portfolioip 20070156963 - Method and system for proximity caching in a multiple-core system: Embodiments of the invention relate to a method and system for caching data in a multiple-core system with shared cache. According to the embodiments, data used by the cores may be classified as being of one of predetermined types. The classification may enable efficiencies to be realized by performing different... Agent: Kenyon & Kenyon LLP 20070156964 - Home node aware replacement policy for caches in a multiprocessor system: A home node aware replacement policy for a cache chooses to evict lines which belong to local memory over lines which belong to remote memory, reducing the average transaction cost of incorrect cache line replacements. With each entry, the cache stores a t-bit cost metric (t≧1) representing a relative distance... Agent: Kenyon & Kenyon LLP 20070156965 - Method and device for performing caching of dynamically generated objects in a data communication network: A method for maintaining a cache of dynamically generated objects. The method includes storing in the cache dynamically generated objects previously served from an originating server to a client. A communication between the client and server is intercepted by the cache. The cache parses the communication to identify an object... Agent: Choate, Hall & Stewart LLP 20070156966 - System and method for performing granular invalidation of cached dynamically generated objects in a data communication network: The present invention is directed towards a method and system for providing granular timed invalidation of dynamically generated objects stored in a cache. The techniques of the present invention incorporates the ability to configure the expiration time of objects stored by the cache to fine granular time intervals, such as... Agent: Choate, Hall & Stewart LLP 20070156967 - Identifying delinquent object chains in a managed run time environment: In one embodiment, an object oriented programming language can pre-fetch objects and fields within those objects to a cache memory. A hardware performance monitor can be used to identify loads that read from an address that is frequently absent from a memory. Instrumentation can be used to mark the objects... Agent: Trop Pruner & Hu, PC 20070156968 - Performing direct cache access transactions based on a memory access data structure: Embodiments of an apparatus, method, and system for encoding direct cache access transactions based on a memory access data structure are disclosed. In one embodiment, an apparatus includes memory access logic and transaction logic. The memory access logic is to determine whether to allow a memory access based on a... Agent: Intel Corporation C/o Intellevate, LLC 20070156970 - Directory-based data transfer protocol for multiprocessor system: A system for maintaining data coherency in a multiprocessor system includes a first processor having a cache and a directory, a second processor having a directory, and at least one additional processor having a directory and separate from the first and second processors. The first processor is configured to determine... Agent: Carey, Rodriguez, Greenberg & Paul, LLP Steven M. Greenberg 20070156971 - Monitor implementation in a multicore processor with inclusive llc: A method and apparatus to implement monitor primitives when a processor employs an inclusive shared last level cache. By the employing an inclusive last level cache, the processor is almost always able to complete a monitor transaction without requiring self snooping through the system interconnect.... Agent: Intel Corporation C/o Intellevate, LLC 20070156969 - Synchronizing an instruction cache and a data cache on demand: In one embodiment, the present invention includes a method for performing a direct memory access (DMA) operation in a virtualized environment to obtain a page from a memory and store the page in a data cache, and synchronizing the page in the data cache and an instruction cache if the... Agent: Trop Pruner & Hu, PC 20070156972 - Cache coherency control method, chipset, and multi-processor system: In a multi-processor system, counting snoop results bottlenecks the broadcast-based snoop protocol. The directory-based protocol delays the latency when remote node caches data. There is a need for shortening the memory access latency using a snoop and cache copy tag information. When the local node's cache copy tag information is... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070156974 - Managing internet small computer systems interface communications: A system for use in managing internet Small Computer Systems Interface (iSCSI) communications includes core logic and application programming interface (API) logic. The core logic has iSCSI protocol processing capability and is hardware independent for iSCSI communications. The system API logic is hardware dependent for iSCSI communications and communicates with... Agent: Richard M. Sharkansky 20070156973 - Memory architecture and access method: A memory architecture includes at any given point in time a contiguous memory window located at a fixed virtual address space comprising a first context to be shared by a plurality of worker processes in an application server instance and at least a second context to be attached to only... Agent: Sap/blakely 20070156975 - Serial in random out memory: A serial in random out memory circuit has a number of memory cells integrated with write control circuitry for writing a sequence of data inputs to sequential locations in the memory cells. Read control circuitry is integrated to receive address signals from an external device and provide a random access... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C. 20070156976 - Resource efficient content management and delivery without using a file system: A resource efficient content management and delivery system includes a pack manager (120) and one or more loadable packs (114). The pack manager (120) provides the control for the loading and unloading of packs from memory, such as flash memory (112) or any other nonvolatile memory. The pack manager (120)... Agent: Motorola, Inc Intellectual Property Section 20070156977 - Automatic location data determination in an electronic document: The automated data field processing of an input form includes the determination of a purpose identifier for the form. In the input form, input data is received associated with one or more data fields of the input form. Based on this input data, stored data is retrieved from a memory... Agent: Kenyon & Kenyon LLP 20070156978 - Steering system management code region accesses: Apparatuses and methods for steering SMM code region accesses are disclosed. In one embodiment, an apparatus includes a status indicator, a base storage location, and an abort storage location. The status indicator is to indicate whether the apparatus is operating in SMM. The base storage location is to store a... Agent: Intel Corporation C/o Intellevate, LLC 20070156979 - Memory device row and/or column access efficiency: Embodiments for retrieving data from memory devices using sub-partitioned addresses are disclosed.... Agent: Berkeley Law & Technology Group, LLP 20070156980 - Method and apparatus for memory write performance optimization in architectures with out-of-order read/request-for-ownership response: A block of data may be transferred to memory through a plurality of write operations, where each write operation is preceded by a protocol request and a protocol response. A plurality of protocol requests issued in a first order may elicit a corresponding plurality of protocol responses in a second... Agent: Blakely Sokoloff Taylor & Zafman 20070156981 - Method, apparatus and program product for managing memory in a virtual computing system: A method for managing memory in a virtual computing system is provided. The method comprises providing updated monitor data for a plurality of data domains in the virtual computing system and determining based upon the updated monitor data provided whether there is a memory constraint in a memory of the... Agent: Silvy Anna Murphy 20070156985 - Snapshot mechanism in a data processing system and method and apparatus thereof: A snapshot mechanism of a data processing system is provided herein. The snapshot mechanism includes providing a snapshot storage unit for storing the data created when snapshotting the target storage units and generating a plurality of snapshot images accordingly. Two different types of address tables in the snapshot image are... Agent: Jianq Chyun Intellectual Property Office 20070156982 - Continuous backup using a mirror device: Providing continuous backup of a storage device includes subdividing the storage device into subsections, providing a mirror device of the storage device that contains a copy of data that is on the storage device when the continuous backup is initiated, providing a time indicator that is modified periodically, and, in... Agent: Muirhead And Saturnelli, LLC 20070156983 - Maintaining consistency when mirroring data using different copy technologies: Provided are a method, system, and program for maintaining consistency when mirroring data using different copy technologies. Update groups having updates to primary storage locations are formed using a first copy technology. The updates in the update groups are copied to secondary storage locations. Update groups having updates to primary... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37 20070156984 - Snapshot format conversion method and apparatus: A system according to this invention converts a full-copy snapshot into a differential snapshot. The system is composed of a storage subsystem and a server subsystem. The storage subsystem comprises a disk drive and a disk controller. The server subsystem comprises an interface, a processor, and a memory. The disk... Agent: Stanley P. Fisher Reed Smith LLP 20070156986 - Method and apparatus for a guest to access a memory mapped device: Embodiments of apparatuses, methods, and systems for guests to access memory mapped devices are disclosed. In one embodiment, an apparatus includes evaluation logic and exit logic. The evaluation logic is to determine, in response to an attempt of a guest to access a device using a memory address mapped to... Agent: Intel Corporation C/o Intellevate, LLC 20070156988 - Storage apparatus for preventing falsification of data: When a file server is to create data that does not permit falsification in an external storage, it is not possible to guarantee that the rewriting of this data can be prevented from a computer connected to the external storage without going through a file server. Provided is a storage... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070156987 - System and method for partitioning multiple logical memory regions with access control by a central control agent: A method for securely handling processing of information may include controlling from within a chip, access to at least one portion of an on-chip memory by a plurality of on-chip clients that have pre-determined access to the at least one portion of the on-chip memory. The pre-determined access may be... Agent: Mcandrews Held & Malloy, Ltd 20070156989 - System and method for migrating objects in content management systems through exploitation of file properties, temporal locality, and spatial locality: A migration object selection system selects data objects for migration from a source storage device to a target storage device. At a scheduled migration date, the system computes a benefit of migration for a selected data object based on adjustable weighted migration properties. If the benefit exceeds a predetermined threshold,... Agent: Samuel A. Kassatly Law Office 20070156995 - Clock-gated random access memory: A method and apparatus for gating a clock signal to one or more embedded blocks of a random access memory (RAM), is described. In one embodiment, a clock gating block is coupled to a RAM EBB, the clock-gating block to provide a RAM clock when receiving read and write enable... Agent: Blakely Sokoloff Taylor & Zafman 20070156991 - Data invalid signal for non-deterministic latency in a memory system: An apparatus, system, and method for a data invalid signal for non-deterministic latency in memory are described. The apparatus may include a memory to determine that data to be buffered for a data burst cannot be guaranteed in time to satisfy a deterministic latency parameter. The memory may provide an... Agent: Kacvinsky LLC C/o Intellevate 20070156990 - Load mechanism: A method is disclosed. The method includes scheduling a load operation at least twice the size of a maximum access supported by a memory device, dividing the load operation into a plurality of separate load operation segments having a size equivalent to the maximum access supported by the memory device,... Agent: Blakely Sokoloff Taylor & Zafman 20070156996 - Memory system with improved additive latency and method of controlling the same: A memory system may include a memory device and a memory controller. The memory device may include a first bank and a second bank. The memory controller may include a read request scheduling queue that may store a read request, and may controls the read request scheduling queue so that... Agent: Harness, Dickey & Pierce, P.L.C 20070156992 - Method and system for optimizing latency of dynamic memory sizing: Some embodiments of the invention include a system and method for optimizing the latency of dynamic memory sizing. In some embodiments, the operating requirements can reflect amount of memory required to perform commensurate operations. Memory power management logic is used to coordinate memory requirements with operating requirements. The latency of... Agent: Intel Corporation C/o Intellevate, LLC 20070156993 - Synchronized memory channels with unidirectional links: A memory agent may include a first memory channel interface and a second memory channel, both with unidirectional links, and logic to synchronize a signal processed by the first memory channel interface with a signal processed by the second memory channel interface. An embodiment of a method may include synchronizing... Agent: Intel Corporation C/o Intellevate, LLC 20070156994 - Unbounded transactional memory systems: Methods and apparatus to provide unbounded transactional memory systems are described. In one embodiment, an operation corresponding to a software transactional memory (STM) access may be executed if a preceding hardware transactional memory (HTM) access operation fails.... Agent: Caven & Aghevli LLC C/o Portfolioip 20070157000 - Configuring levels of program/erase protection in flash devices: A method and apparatus for configuring a memory device, such as a flash memory device, is herein described. Features/functional modules of a memory device, are selectable by a manufacturer, customer, or user. Instead of a manufacturer having to complete numerous redesigns of a memory product to meet multiple customer's special... Agent: Intel Corporation C/o Intellevate, LLC 20070157001 - Data compression method for supporting virtual memory management in a demand paging system: A virtual memory management unit (306) includes a redundancy insertion module (307) which is used for inserting redundancy into an encoded data stream to be compressed, such that after being compressed each logical data block fits into a different one from a set of equal-sized physical data blocks of a... Agent: Warren A. Sklar (soer) Renner, Otto, Boisselle & Sklar, LLP 20070156999 - Identifier associated with memory locations for managing memory accesses: Embodiments of apparatuses, articles, methods, and systems for associating identifiers with memory locations for controlling memory accesses are generally described herein. Other embodiments may be described and claimed.... Agent: Schwabe, Williamson & Wyatt, P.C. 20070156997 - Memory allocation: There is provided a method of managing a data memory in order to improve the processing of memory allocation requests. Memory segments are associated with different levels according to their size. A different granule size to the power of two is defined for each level. The granule size defines the... Agent: Nixon & Vanderhye, PC 20070156998 - Methods for memory allocation in non-volatile memories with a directly mapped file storage system: In a memory system with a file storage system, a scheme for allocating memory locations for a write operation is to write the files substantially contiguously in a memory block one after another rather than to start a new file in a new block. In this way, they are more... Agent: Parsons Hsue & De Runtz, LLP - Sandisk Corporation 20070157002 - Methods and apparatus for configuring a storage system: One embodiment of the invention relates to a computer system comprising at least one host, at least one storage system and at least one communication medium that couples the at least one host to the at least one storage system. The at least one storage system includes a first group... Agent: Emc Corporation C/o Wolf, Greenfield & Sacks, P.C. 20070157003 - Page coloring to associate memory pages with programs: Apparatuses and methods for page coloring to associate memory pages with programs are disclosed. In one embodiment, an apparatus includes a paging unit and an interface to access a memory. The paging unit includes translation logic and comparison logic. The translation logic is to translate a first address to a... Agent: Intel Corporation C/o Intellevate, LLC Previous industry: Electrical computers and digital data processing systems: input/outputNext industry: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) ###### RSS FEED for 20091112: Integrate FreshPatents.com into your RSS reader/aggregator or website to track weekly updates. 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