Electrical computers and digital processing systems: memory inventions 03/07

20070073961 - Memory controller: A memory controller includes a plurality of buffers and a controller. The buffers are connected with a predetermined memory. The controller issues a first command before all the buffers store data. The first command is an instruction to activate a row address corresponding to a predetermined memory region in the... Agent: GlobalIPCounselors, LLP

20070073962 - Accessing device: To provide an accessing device which allows reliable protection of important data. A memory accessing device has a file system device which manages a logical memory space and a driver device which maintains a correlation information between the logical memory space and a physical memory space and which physically accesses... Agent: Pamela R. Crocker Patent Legal Staff

20070073963 - Class allocation for volatile files: The present invention relates to a storage device, a storing method and rewritable record carrier for storing data file, wherein a rewriting frequency of the date files is identified and the data files are classified based on their identified rewriting frequency. Each data file is then written using a rule... Agent: Philips Intellectual Property & Standards

20070073964 - Method and apparatus for handling multi-volume datasets in a tape storage system: A method and apparatus for handling multi-volume datasets in a tape storage system are disclosed. In response to a write request for a multi-volume dataset, the information of the multi-volume dataset are captured by intercepting and deciphering a set of volume mount commands. Otherwise, the information of the multi-volume dataset... Agent: Dillion & Yudell, LLP

20070073965 - Direct storage and retrieval of multimedia data using a data storage device: Herein described is a system and method of directly storing and retrieving data using a multimedia recording device. The method comprises storing multimedia data into a data storage device without using processor memory associated with said multimedia recording device. The method comprises retrieving the multimedia data from the data storage... Agent: Mcandrews Held & Malloy, Ltd

20070073970 - Disk array apparatus and disk array apparatus controlling method: Times at which requests for a data read or data write from/to a logical volume are received are stored in memory as access times of a RAID group making up the logical volume. When a predetermined time has elapsed after the access time, a number of the hard disk drives... Agent: Reed Smith LLP

20070073968 - Enclosure numbering in raid data storage systems: Enclosure numbering is performed in redundant array of independent disk (RAID) data storage systems. If first, second, and third boards in an enclosure indicate a first enclosure number, the enclosure is indicated as having the first enclosure number. If at least the first and second boards indicate the first enclosure... Agent: Emc Corporation Office Of The General Counsel

20070073967 - Multiplexing system: A multiplexing system couples a pair of input ports to a either a dual ported disk drive or a single ported disk drive. The system includes a multiplexer having the pair of first ports and a pair of second ports. The multiplexer is configurable to couple each one of the... Agent: Richard M. Sharkansky

20070073966 - Network processor-based storage controller, compute element and method of using same: A data storage controller providing network attached storage and storage area network functionality comprising a network processor (37) and providing for volume management (preferably one or more of mirroring, RAID5, and copy on write backup), caching of data stored, protocol acceleration of low level protocols (preferably one or more of... Agent: Peacock Myers, P.C.

20070073969 - Workload-adaptive storage system with static allocation: A method for adaptation of data organization by a data storage system controller is disclosed. Data organization in a data storage system is adapted according to varying workload profiles and system constraints. The data storage system also consists of a plurality of data storage units. On receipt of a request... Agent: Trellis Intellectual Property Law Group, PC

20070073971 - Memory caching in data processing: A data processor comprises a main memory; an instruction cache and a data cache; instruction fetch logic operable to search the instruction cache for a required instruction; and if the required instruction is not present in the instruction cache, to search the data cache; and if the required instruction is... Agent: Katten Muchin Rosenman LLP

20070073972 - Instant copy of data in a cache memory via an atomic command: A system and method are described to improve the efficiency of copy-on-write operations in a storage system. A partition mapping table is maintained in a cache memory, where the partition mapping table is used to translate logical partitions into physical partitions. A request is received to write one or more... Agent: Katten Muchin Rosenman LLP

20070073974 - Eviction algorithm for inclusive lower level cache based upon state of higher level cache: A cache eviction algorithm for an inclusive cache determines which among a plurality of cache lines may be evicted from the inclusive cache based at least in part upon the state of the cache lines in a higher level cache. In particular, a cache eviction algorithm may determine, from an... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20070073975 - Fractional caching method and adaptive contents transmitting method using the same: A fractional caching method and an adaptive contents transmitting method using the same are provided. The fractional caching method includes the steps of setting up a divided location for dividing a certain object into two parts, receiving an evict request for acquiring a space in the inside of the cache,... Agent: Ladas & Parry LLP

20070073973 - Method and apparatus for managing buffers in a data processing system: A buffer management for a data processing system is provided. According to one embodiment, a method for managing buffers in a telephony device is provided. The method comprising providing a plurality of buffers stored in a memory, providing a cache having a pointer pointing to the buffer, scanning the cache... Agent: Siemens Corporation Intellectual Property Department

20070073976 - Low latency message passing mechanism: In one embodiment, a method is provided. The method of this embodiment provides detecting by a network controller a flush occurring on a host bus of a DM (“direct messaging”) packet to a memory from a first cache line associated with a first processor; obtaining and storing the DM packet... Agent: Intel Corporation C/o Intellevate, LLC

20070073977 - Early global observation point for a uniprocessor system: In one embodiment, the present invention includes a method for performing an operation in a processor of a uniprocessor system, initiating a write transaction to send a result of the operation to a memory of the uniprocessor system, and issuing a global observation point for the write transaction to the... Agent: Trop Pruner & Hu, PC

20070073978 - Method and system for booting and automatically updating software, and recovering from update error, and computer readable recording medium storing method: Provided are a booting method of updating software components installed in a system and recovering from an error that occurs in an update, a method and system for automatically updating the software and recovering from the error, and a computer readable recording medium storing the method. The master boot record... Agent: Sughrue Mion, PLLC

20070073979 - Snoop processing for multi-processor computing system: A method is described that involves receiving, from a network, a snoop request at a network ordering point and storing the snoop request into a buffer. The snoop request is part of a transaction. The method also involves issuing the snoop request from the buffer and snooping a cache with... Agent: Blakely Sokoloff Taylor & Zafman

20070073980 - Multi-port memory device: In a multi-port memory device, a plurality of ports simultaneously access a plurality of banks through global data buses. A data conflict detector compares valid data signals input from the plurality of ports through the global data buses to the plurality of banks, and detects data conflict caused when the... Agent: Mcdermott Will & Emery LLP

20070073982 - Multi-port memory device: A multi-port memory device having a plurality of ports performing a serial input/output (I/O) communication with external devices, and a plurality of banks performing a parallel I/O communication with the ports through a plurality of global I/O lines. The multi-port memory device includes: a write clock generating unit for generating... Agent: Blakely Sokoloff Taylor & Zafman

20070073983 - Multi-port memory device: A multi-port memory device having a plurality of ports which are connected to different external devices and perform a serial data communication independently, and a plurality of banks each having a plurality of cell arrays, includes a write counter for increasing a counting number whenever write data are applied to... Agent: Blakely Sokoloff Taylor & Zafman

20070073981 - Multi-port memory device with serial input/output interface: A multi-port memory device includes a plurality of ports located at a center region of the multi-port memory device, each for performing a data communication with a corresponding external device; a plurality of banks arranged at upper and lower regions of the multi-port memory device in a row direction on... Agent: Blakely Sokoloff Taylor & Zafman

20070073984 - Apparatus and method for monitoring performance of a storage area network: A performance monitor reports SAN performance so that issues within the SAN are not masked from the client. Accesses to the SAN may be grouped into the categories of SAN logical or SAN physical. In one specific embodiment, the ranges of service times for accesses to the SAN are determined... Agent: Martin & Associates, LLC

20070073985 - System for and method of retrieval-based data redundancy: The present invention provides a system for and method of retrieval-based data redundancy. In an embodiment, a first write operation is performed on a data object at a first storage subsystem to form a first version of the data object, the data object being included among a plurality of data... Agent: Hewlett Packard Company

20070073987 - Instant copy of data in a cache memory via an atomic command: A system and method are described to improve the efficiency of copy-on-write operations in a storage system. A PDSS descriptor associated with partition PSS and a PDTT descriptor associated with partition PTT are maintained in a cache memory, with partition PSS associated with a source logical unit LUS and partition... Agent: Katten Muchin Rosenman LLP

20070073986 - Remote copy control in a storage system: In a storage system that executes multi-target remote copying, the identity of data across two secondary storage subsystems may be quickly and flexibly ensured. The storage system includes a first storage subsystem that has a first storage area and multiple second storage subsystems that each have a second storage area... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070073988 - Data processing system, data management method and storage system: When migrating data stored in a storage region assigned to a volume to another storage region, the connection status of the host computer and volume is confirmed. When the host computer and volume are connected, the maximum capacity of the volume requested by the host computer is reserved so that... Agent: Stanley P. Fisher Reed Smith LLP

20070073990 - Distribution of data in a distributed shared storage system: Segments or blocks of a file can be distributed among an number n of storage units by using a function of sequentially assigned segment identifiers for each segment, where the function is reduced modulo n, so long as the function is not congruent to segment identifier, modulo n, for any... Agent: Peter J. Gordon, Patent Counsel

20070073989 - Method and apparatus for efficient data storage and management: A method and apparatus for efficient data storage and management in order to reduce battery consumption in a mobile device are disclosed. Two data stores, an unorganized store and an organized store, are provided in the mobile device. The unorganized store stores a data in as-it-arrives basis. The organized store... Agent: Volpe And Koenig, P.C. Dept. Icc

20070073991 - Memory controller: Disclosed is a memory controller which is disposed between a CPU and a memory, receives from the CPU a control signal (TRANS) indicating whether a type of a bus cycle is a sequential cycle in which an address continuous with an address of an immediately preceding bus cycle is output... Agent: Mcginn Intellectual Property Law Group, PLLC

20070073992 - Memory allocation in a multi-node computer: Evaluating memory allocation in a multi-node computer including calculating, in dependence upon a normalized measure of page frame demand, a weighted coefficient of memory affinity, the weighted coefficient representing desirability of allocating memory from the node, and allocating memory may include allocating memory in dependence upon the weighted coefficient of... Agent: Ibm (roc-blf)

20070073993 - Memory allocation in a multi-node computer: Memory allocation in a multi-node computer, including evaluating memory affinity among nodes and allocating memory in dependence upon the evaluations. Evaluating memory affinity may include assigning to nodes weighted coefficients of memory affinity where each weighted coefficient represents a desirability of allocating memory of a node to a processor of... Agent: Ibm (roc-blf)

20070073994 - Virtual partitioning: A method for operating a storage system, consisting of performing an allocation of respective partitions of a physical storage resource of the storage system to respective hosts of the storage system. The method also includes changing the allocation while permitting the respective hosts of the storage system to access the... Agent: Katten Muchin Rosenman LLP

20070073995 - Secure booting from a memory device: Provided are a method, device, and system for booting from a memory device having an array of blocks of cells. An initial memory map has a mapping of memory addresses to accessible blocks of cells in the memory device that are accessible following a boot sequence. There are secure blocks... Agent: Konrad Raynes & Victor, LLP. Attn: Int77

20070073996 - Virtual memory fragment aware cache: The present invention is directed to a method, computer program product, and system for processing memory access requests. The method includes the following features. First, page table entries of a page table are organized into at least one fragment that maps logical memory to at least one of logical memory... Agent: Sterne, Kessler, Goldstein & Fox PLLC

20070067555 - Virtual interchangeable storage device: Disclosed is a method and apparatus for a storage system comprising at least one mobile random access storage device capable of storing first or second data. At least one docking station is associated with an address wherein the address is identifiable by at least one host computer. A first and... Agent: Wall Marjama & Bilinski

20070067556 - Apparatus and method for memory bit-swapping-within-address-range circuit: A memory controller and method that provide a read-refresh (also called “distributed-refresh”) mode of operation, in which every row of memory is read within the refresh-rate requirements of the memory parts, with data from different columns within the rows being read on subsequent read-refresh cycles until all rows for each... Agent: Lemaire Patent Law Firm, P.l.l.c.

20070067557 - Multiple layer optical disc, and device for writing such disc: The present invention relates in general to a multiple-layer optical storage disc, and to a method and device for writing information into such a disc.... Agent: Philips Intellectual Property & Standards

20070067561 - Computer using flash memory of hard disk drive as main and video memory: A computer includes a processing unit; a hard disk drive having a main memory region on and from which processing information used in correspondence to processing procedures of the processing unit is directly written and read; a control unit which communicates with the hard disk drive at high speed, for... Agent: Stein, Mcewen & Bui, LLP

20070067558 - Device and method for simulating a hard disk: A device and a method for simulating a hard disk are disclosed. The device has a core logic chip, a main memory module and a setting module. The setting module is used to set the main memory module to have a memory access area and a hard disk access area.... Agent: Rosenberg, Klein & Lee

20070067559 - Storage control apparatus, data management system and data management method: A storage control apparatus according to the present invention includes a plurality of connecting units connected to one or more host computers and one or more hard disk drives as storage media for storing data, one or more non-volatile storage media which are of a different type from the hard... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070067560 - System for controlling spinning of disk: A system for controlling spinning of a disk is provided to prevent deterioration of the access response speed and to suppress the power consumption. The system includes a controller controlling a file system, and a disk array system storing data of the file system. The disk array system includes a... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070067562 - Disk control device, disk control method: A disk control device stores write requests from a cache memory or reads commands from a host in a queue for a disk drive in chronological order. When the number of write requests stored in the queue for the disk drive is greater than a predetermined value, the storage location... Agent: Staas & Halsey LLP

20070067564 - Firmware enabled trap-based raid implementation: Disclosed is a system and method to provide a firmware enabled trap-based Redundant Array of Independent Disks (RAID) implementation for disk drives. A plurality of disk drives in a RAID system are coupled to a chipset. A trap is defined in the chipset for input/output (I/O) accesses to a disk... Agent: Blakely Sokoloff Taylor & Zafman

20070067565 - Storage system and control method thereof for uniformly managing the operation authority of a disk array system: In an exclusive lock management in common to both the In-Band and the Out-of-band, a lock control technique of a storage system capable of removing the factor that may cause the discrepancy in the configuration information in a disk array system is disclosed. In the storage system, a shared memory... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070067563 - Updating disk drive firmware behind raid controllers: A system, apparatus and method for updating disk drive firmware is described. In one embodiment of the invention, the disk drive firmware is contained within a RAID environment. A flash mode is provided in which physical drives within the RAID are exposed to an operating system. The flash mode may... Agent: Lsi Logic Corporation

20070067566 - External storage device for controlling computer and method thereof: The present invention is to provide an external storage device for controlling computer and method thereof. A message monitoring program is installed in the computer after the external storage device is connected to the computer. Thus, a user may operate an input member of the external storage device to cause... Agent: Bacon & Thomas, PLLC

20070067568 - Data processing methods and systems: Data processing methods and systems for accessing a target sample in a media data stream. The media data stream has a plurality of samples and corresponding sample information recorded in at least one entry, wherein the sample information for a predetermined number of the entries is calculated and the calculated... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070067570 - Data processing methods and systems: Data processing methods and systems for accessing a target sample in a media data stream. The media data stream has a plurality of samples and corresponding sample information recorded in at least one entry, wherein the sample information for a predetermined number of the entries is calculated and the calculated... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070067567 - Merging entries in processor caches: The present disclosure relates to caches that are capable of improving processor performance. In some embodiments, among others, incoming requests are compared to determine whether or not those requests match. In the event that the incoming requests match, the matching requests are merged. For other embodiments, an incoming request is... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070067569 - Method and system for communicating validation information to a web cache: A method and apparatus for communicating validation information from a web server to validate a web cache is provided. The method includes generation of a file storing information pertaining to the objects being served by the web server. The contents of the file are updated by means of modifications in... Agent: Trellis Intellectual Property Law Group, PC

20070067571 - Superior cache processor landing zone to support multiple processors: A data-processing system and method includes a group of memory components and a processor landing zone configured to include the memory components, wherein the memory components permit the processor landing zone to support both a single processor having a large instruction and data cache size and a plurality of processors... Agent: Pete Scott, Senior Corporate Counsel Lsi Logic Corporation

20070067572 - Buffering missed requests in processor caches: The present disclosure relates to caches that are capable of improving processor performance. In some embodiments, among others, a cache request is received, and logic within the cache determines whether the received cache request results in a hit on the cache. If the cache request results in a hit on... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070067573 - Thread-shared software code caches: A runtime system using thread-shared code caches is provided which avoids brute-force all-thread-suspension and monolithic global locks. In one embodiment, medium-grained runtime system synchronization reduces lock contention. The system includes trace building that combines efficient private construction with shared results, in-cache lock-free lookup table access in the presence of entry... Agent: Vierra Magen Marcus & Deniro LLP

20070067574 - Method and apparatus for managing cache partitioning: A method of managing cache partitions provides a first pointer for higher priority writes and a second pointer for lower priority writes, and uses the first pointer to delimit the lower priority writes. For example, locked writes have greater priority than unlocked writes, and a first pointer may be used... Agent: Qualcomm Incorporated

20070067575 - Method of managing cache memory based on data temperature: A technique for use in managing a data cache involves receiving one or more data objects to be written to a storage device. A temperature value is assigned to the one or more data objects before storing the data objects in the data cache. The temperature value assigned to the... Agent: James M. Stover Ncr Corporation

20070067576 - Balanced prefetching exploiting structured data: Balanced prefetching automatically balances the benefits of prefetching data that has not been accessed recently against the benefits of caching recently accessed data, and can be applied to most types of structured data without needing application-specific details or hints. Balanced prefetching is performed in applications in a computer system, such... Agent: Woodcock Washburn LLP (microsoft Corporation)

20070067577 - Microprocessor, apparatus and method for selective prefetch retire: An apparatus in a microprocessor for selectively retiring a prefetched cache line is disclosed. The microprocessor includes a prefetch buffer that stores a cache line prefetched from a system memory coupled to the microprocessor. The microprocessor includes a cache memory, comprising an array of storage elements for storing cache lines.... Agent: Huffman Law Group, P.C.

20070067578 - Controlling processor access to cache memory: A plurality of bits are added to virtual and physical memory addresses to specify the level at which data is stored in a multi-level cache hierarchy. When data is to be written to cache, each cache level determines whether it is permitted to store the data. Storing data at the... Agent: Hewlett Packard Company

20070067580 - Memory access interface for a micro-controller system with address/data multiplexing bus: A memory access interface for connecting a memory to a micro-controller having an address/data multiplexing bus and a microprocessor is proposed The memory access interface includes an address latch, a multiplexer, and a data buffer The address latch latches and outputs the lower-bit address signal on the address/data multiplexing bus... Agent: Birch Stewart Kolasch & Birch

20070067579 - Shared memory device: A shared memory device able to simplify interconnects up to memories, able to prevent a reduction of performance due to an increase of area and longer interconnects, and able to speed up memory access, wherein an input/output port of a processing module, memory interfaces, and memory banks are connected by... Agent: Rader Fishman & Grauer PLLC

20070067581 - Method for storing and running application program in flash-rom: A method for storing and executing an application program in a flash ROM, wherein the flash ROM is partitioned into two regions. One region is used for an operating System (OS) booting ROM and the other region is used for storing an application program. A board of a System boots... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20070067582 - Remote management system of dynamic state data of work machine: A remote management system is constituted by a work machine side dynamic state data management device, which obtains a power supply to operate the device directly from a battery of a work machine 2, causes a memory section of a communication unit to store the contact address data of a... Agent: Jacobson Holman PLLC

20070067587 - Computer system and method for performing low impact backup operations: A system and method for low impact backup. In one embodiment, a method may comprise monitoring utilization of a system resource and a data management process selectively performing I/O operations dependent upon the monitored utilization of the system resource. The data management process may include functionality to backup desired data... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20070067588 - Data copying method and apparatus in a thin provisioned system: Data migration includes copying between normal volumes and thin provisioned volumes. Data in a normal volume can be copied to a thin provisioned volume. Alternatively, data structures can be provided to facilitate converting a normal volume into a thin provisioned volume without actual copying of data. Copying from a thin... Agent: Townsend And Townsend And Crew, LLP

20070067583 - Managing snapshot history in a data storage system: A method for creating logical volume snapshots in a data storage system, including receiving a first write command to write first data to a partition of a logical volume, generating a first partition descriptor record (PDR), and storing the first data at a first physical location associated with the first... Agent: Katten Muchin Rosenman LLP

20070067585 - Snapshot maintenance apparatus and method: Provided is a snapshot maintenance apparatus and method capable of maintaining a snapshot in a highly reliability manner. In a snapshot maintenance apparatus and method for maintaining an image at the time of creating a snapshot of an operation volume for reading and writing data from and to a host... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070067584 - Storage system, redundancy control method, and program: In a storage system allowing redundant writing, a technology is provided capable of achieving control including efficient return to redundancy while reducing load on a host and trouble for a user. The host performs the redundant writing of data into data volumes in primary and secondary storage apparatuses. Each storage... Agent: Stanley P. Fisher Reed Smith LLP

20070067586 - System and method for controlling storage devices: Each time a write request is issued from an application 47, a PVOL is updated by writing the data contained in the issued write request to the PVOL 43P. In the snapshot mode, when the write frequency exceeds a frequency threshold value, the mode is switched from the snapshot mode... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070067592 - Memory fence with background lock release: In one embodiment, a processor is operable to issue a first memory request to access a particular memory location, and, prior to completion of the first memory request, to issue a command to release a memory lock on the particular memory location when access to the particular memory location is... Agent: Cesari And Mckenna, LLP

20070067590 - Providing protected access to critical memory regions: Registering a first program operable to access a first address of a first protected region of memory in a registry and in response to a second program making a request to access a second address of a second protected region of memory, deciding whether the second program is registered in... Agent: Blakely Sokoloff Taylor & Zafman

20070067589 - Smart zoning to enforce interoperability matrix in a storage area network: The present invention describes various mechanisms which may be used for improving SAN device interoperability enforcement techniques implemented in SAN or Fibre Channel networks. In one implementation, the technique of the present invention allows a SAN to automatically enforce interoperability requirements between devices connected to a SAN by utilizing SAN... Agent: Beyer Weaver LLP

20070067591 - Storage control system: A storage control system has a host computer having one or more initiators; a storage controller having one or more targets and storage areas, and also having a security property for defining access relationships between the targets and the storage areas; and a management module for storing access correspondence relationships... Agent: Stanley P. Fisher Reed Smith LLP

20070067593 - Logical volume transfer method and storage network system: The present invention transfers replication logical volumes between and among storage control units in a storage system comprising a plurality of storage control units. To transfer replication logical volumes from a storage control unit to a storage control unit, a virtualization device sets a path to the storage control unit.... Agent: Townsend And Townsend And Crew, LLP

20070067595 - File system having predictable real-time performance: A file system that permits predictable accesses to file data stored on devices that may have a variable access latency dependent on the physical location of the file on the physical storage device. A variety of features that guarantee timely, real-time response to I/O file system requests that specify deadlines... Agent: Milde & Hoffberg, LLP

20070067594 - Method and apparatus to perform clock crossing on data paths: A method and an apparatus to perform clock crossing on data paths have been disclosed. In one embodiment, the method includes sampling data received by a first memory device in a computing system on a first data path to determine a clock crossing phase, the data on the first data... Agent: Blakely Sokoloff Taylor & Zafman

20070067596 - Computer platform memory access control method and system with memory configuration automatic setting capability: A computer platform memory access control method and system is proposed, which is designed for use with a computer platform, such as a network server, for providing the server with a memory access control function with a memory configuration automatic setting capability, which is characterized by the arrangement of a... Agent: Edwards & Angell, LLP

20070067599 - Memory controller having programmable initialization sequence: In general, techniques are described for initializing a memory module in accordance with a programmable initialization sequence. A memory controller, for example, includes a programmable computer-readable medium that stores configuration data to control initialization of one or more memory modules. The memory controller includes an initialization control unit that outputs... Agent: Unisys Corporation Ms 4773

20070067597 - Method and apparatus for delivering content based on receivers characteristics: Media distribution systems may include methods and apparatus to perform memory management on a wireless devices configured to receive non-real time portions of media services. Such methods and apparatus may be based upon an allowable capacity of presentations storable in device memory, as well as on a required memory associated... Agent: Qualcomm Incorporated

20070067598 - Storage device and host apparatus: A storage device includes a semiconductor memory storing data. A controller instructs to write data to the semiconductor memory in accordance with a request the controller receives. A register holds performance class information showing one performance class required to allow the storage device to demonstrate best performance which the storage... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070067600 - System for balancing multiple memory buffer sizes and method therefor: A system for balancing multiple memory buffer sizes includes a memory partitioned into a plurality of subgroups, each subgroup containing similarly sized buffers. The system further includes a memory manager which manages requests for buffer space by storing and accessing buffer steal history records in a buffer steal history queue.... Agent: Fleit, Kain, Gibbons, Gutman, Bongini & Bianco P.l.

20070067601 - Semiconductor device: A semiconductor device includes: a semiconductor substrate having two types of active regions that are a PMOS region and an NMOS region separated from each other in plan view by a PN separation film; and a dual-gate electrode extending linearly across the PMOS region, the PN separation film and the... Agent: Mcdermott Will & Emery LLP

20070067604 - Hardware support for superpage coalescing: A method of assigning virtual memory to physical memory in a data processing system allocates a set of contiguous physical memory pages for a new page mapping, instructs the memory controller to move the virtual memory pages according to the new page mapping, and then allows access to the virtual... Agent: Jack V. Musgrove

20070067602 - Mitigating context switch cache miss penalty: Systems, methodologies, media, and other embodiments associated with mitigating the effects of context switch cache and TLB misses are described. One exemplary system embodiment includes a processor configured to run a multiprocessing, virtual memory operating system. The processor may be operably connected to a memory and may include a cache... Agent: Hewlett Packard Company

20070067603 - Nonvolatile memory device and the method of generation of the address translation table: The initialization operation time is substantially reduced to realize a high-speed nonvolatile semiconductor memory. A memory array of a nonvolatile semiconductor memory includes a data storage area in which data is stored, a program storage area in which programs are stored, and a table block in which an address translation... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070061497 - Player and playing method and program: A player includes a playing section configured to play contents data based on a list selected from multiple lists each having multiple pieces of contents data, and a play control section configured to: cause the playing section to play contents data based on a first list selected from the multiple... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070061504 - Apparatus and method for managing data of flash memory: In an apparatus and a method for managing data of a flash memory, when update of data stored in the flash memory is requested, a stored data set is compared with a new data set and only bits of the stored data set that are different from corresponding bits of... Agent: Robert E. Bushnell Suite 300

20070061503 - Data arrangement and data arranging method in storage device: The disclosure relates to a data arranging method of a flash memory for improving access performance. The method includes steps of storing a first data sector to a page of the flash memory; storing a first data correction set corresponding to the first data sector in the page of the... Agent: Kirton And Mcconkie

20070061501 - Device and method for configuring a flash memory controller: A storage device and method for flexibly configuring a flash memory controller. The device includes a flash memory array containing a plurality of memory cells, wherein at least two configuration bits are programmed to the plurality of memory cells. A controller having at least one configuration pin is further provided... Agent: Dr. Mark Friedman Ltd. C/o Bill Polkinghorn

20070061505 - Electronic flash memory external storage method and device: An electronic flash memory external storage method and device for data processing system, includes firmware which directly controls the access of electronic storage media and implements standard interface functions, adopts particular reading and writing formats of the external storage media, receives power via USB, externally stores date by flash memory... Agent: Qun Liu

20070061502 - Flash memory storage system and method: A flash memory storage system includes a memory array containing a plurality of memory cells and a controller for controlling the flash memory array. The controller dedicates a first group of memory cells to operate with a first number of bits per cell and a second, separate group of memory... Agent: Dr. Mark Friedman Ltd. C/o Bill Polkinghorn

20070061498 - Method and system for nand-flash identification without reading device id table: A method and system for identifying a NAND-Flash without reading a device ID. The method includes: executing an identification flow for setting a first page of a block as a target block, utilizing a combinations table to query a target block, evaluating a result by comparing a identifying information in... Agent: North America Intellectual Property Corporation

20070061506 - Method of optimizing performance of flash memory: A method of optimizing performance of a flash memory is provided. According to the method of the present invention, a page or a block can be selected as a unit for writing data to the flash memory. When the flash memory controller process the step of writing data into the... Agent: Bacon & Thomas, PLLC

20070061499 - Methods and apparatus for providing a virtual flash device: Embodiments of methods and apparatus for providing a virtual flash device are generally described herein. Other embodiments may be described and claimed.... Agent: Intel Corporation C/o Intellevate, LLC

20070061500 - Relocatable overlay window to access supernumerary data resources: Described herein are one or more implementations that eliminate the need to switch data-resource access-modes of a flash memory system between a primary main array memory and a secondary supernumerary data resource. The one or more described implementations provide access to the secondary supernumerary data resource through an overlay window... Agent: Lee & Hayes, PLLC C/o Portfolioip

20070061507 - Semiconductor storage apparatus: A semiconductor storage apparatus comprising: a ferroelectric memory; an SRAM 30; a counter 41; a CAM 10 that judges whether or not a block of data requested to be read out from the ferroelectric memory is stored in the SRAM 30; a storage control unit 51 that, if a result... Agent: Mcdermott Will & Emery LLP

20070061508 - Data storage cartridge with built-in tamper-resistant clock: A data cartridge contains a battery powered clock that can be read by a media drive. The clock's value is written to the tape as a timestamp, and the timestamp is associated with a data set. The drive is designed such that the clock's value cannot be altered by the... Agent: Morrison & Foerster LLP

20070061509 - Power management in a distributed file system: A method and system are provided for managing a spin state of individual physical disks in a distributed file system. Spin control messages are forwarded to a specified physical disk asynchronously with an I/O command and prior to receipt of the data request by the physical disk. This enables the... Agent: Lieberman & Brandsdorfer, LLC

20070061510 - Storage unit and disk control method: A storage unit is provided which is connected to a host computer through a network, having one or more disks in which read and write operations are performed during rotation and a control unit for controlling the rotation of the disks. In the storage unit, when receiving a message which... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070061511 - Distributed and packed metadata structure for disk cache: An apparatus and method to reduce the initialization time of a system is disclosed. In one embodiment, upon a cache line update, metadata associated with the cache line is stored in a distributed format in non-volatile memory with its associated cache line. Upon indication of an expected shut down, metadata... Agent: Blakely Sokoloff Taylor & Zafman

20070061513 - Disk array apparatus, data migration method, and storage medium: The present invention proposes a disk array apparatus that can dramatically enhance its operability. The disk array apparatus has a source volume that is the source for data migration, and migrates the data to a destination volume that is the destination for the data migration. The disk array apparatus includes:... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070061514 - Disk array with spare logic drive created from spare physical drives: In a disk array system having a plurality of spare drives, the storage areas of which are not wasted without being influenced by the physical boundaries thereof. There is defined one large spare parity group 104 which is composed of a plurality of spare drives 103, 103, . . .... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070061512 - Management apparatus, management method and storage management system: A management apparatus, a management method, and a storage management system that more specifically manage power consumption, making it easy to analyze problems relating to power consumption or properly relocate data are provided. A power consumption for each of a plurality of memory apparatus groups each consisting of a plurality... Agent: Stanley P. Fisher Reed Smith LLP

20070061515 - Method for managing volume groups considering storage tiers: A tiered storage system according to the present invention provides for the management of migration groups. When a migration group is defined, a reference tier position is determined and the relative tier position of each constituent logical device is determined. Movement of a migration group involves migrating data in its... Agent: Townsend And Townsend And Crew, LLP

20070061516 - Method of protecting data storage media when a computer is going to be turned off: A method of protecting data storage media when a computer is going to be turned off is described, said method comprising a step in which a warning is given to indicate the presence of one or more external data read/write devices connected to said computer, and/or a step in which... Agent: Stetina Brunda Garred & Brucker

20070061517 - Data-processing system and method for supporting varying sizes of cache memory: A data-processing system and method include a processor core associated with a cache controller. A plurality of cached memory components is associated with the processor core and the cache controller. A cached processor is provided, which supports a plurality of varying sizes of instruction and data cache, wherein the cached... Agent: Pete Scott, Senior Corporate Counsel Lsi Logic Corporation

20070061518 - Storage controller, data processing method and computer program product: When a first channel processor from among a plurality of channel processors receives an I/O request from a host system, a second channel processor, which is to execute a part of the processing to respond to the I/O request, is selected from among the channel processors based on the LM... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070061519 - Early return indication for read exclusive requests in shared memory architecture: An early return indication is used to notify a first communications interface, prior to a response being received from any of a plurality of sources coupled to a second communications interface, that the return data can be used by the first communications interface when it is received thereby from a... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20070061520 - Techniques for reducing castouts in a snoop filter: Method and apparatus for reducing castouts in a snoop filter. More specifically, there is provided a system comprising a plurality of buses, one or more processors coupled to each of the plurality of buses and a snoop filter. The snoop filter configured to eliminate unnecessary snoops of the plurality of... Agent: Hewlett Packard Company

20070061521 - Processor assignment in multi-processor systems: In one embodiment, a method of assigning a plurality of processes to a plurality of processors in a multi-processor computer system comprises attaching a plurality of processes to a memory segment shared between a plurality of processors; initiating a spin cycle in the plurality of processes; and assigning one or... Agent: Hewlett Packard Company

20070061525 - Hardware control for changing the operating mode of a memory: Circuit arrangement having a memory unit which can be operated either in a low-power operating mode or in a normal-power operating mode. A setting unit sets the operating mode of the memory unit, a detector unit detects an access operation to the memory unit, and a control unit controls the... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Infineon / Qimonda

20070061524 - Programming a digital processor with a single connection: A digital processor may be coupled to a processor programmer through a single conductor programming bus. The digital processor and the processor programmer, each may have a single programming connection (e.g., terminal, pin, etc.) coupled to the single conductor programming bus. The processor programmer may comprise an instruction encoder/decoder, a... Agent: Baker Botts, LLP

20070061522 - Storage device for storing different data formats: Storage devices (2) receiving first data pieces having first formats and supplying second data pieces having second formats different from the first formats, store a set of first data pieces and a subset of second data pieces in a storage medium (23). A processor (20) searches the storage medium (23)... Agent: Philips Intellectual Property & Standards

20070061523 - System, computer readable medium and method for multi-tiered data access: A system, computer readable medium, and method for multi-tiered data access. The method includes the steps of determining a first search parameter and a second search parameter in response to an operator initiated command, determining a physical location of a data unit corresponding to the first search parameter, identifying a... Agent: Brooks Kushman P.C.

20070061526 - System and method for storing storage operating system data in switch ports: A computer server system and a method for operating the system are described. An address and a status of each computer device of a plurality of computer devices accessible to a switch is written into a memory in the switch. The status of a first computer device which is off... Agent: Cesari And Mckenna, LLP

20070061527 - Memory management system and method for a mobile device: In accordance with the teachings described herein, systems and methods are provided for managing memory on a mobile device. A maximum amount of available data storage memory may be allocated for storing data for each of a plurality of software applications loaded on the mobile device. If additional memory is... Agent: David B. Cochran, Esq. Jones Day

20070061528 - Content management apparatus: An object of the present invention is to provide a content management apparatus which prevents illegal duplication of content, and simplifies user's backuping and restoring the content. The content management apparatus according to the present invention manages content stored in a portable medium, and includes: a content storage unit which... Agent: Wenderoth, Lind & Ponack L.L.P.

20070061532 - Data processing system: A data processing system has a plurality of storage systems. In this system, data replication is performed at high speed and efficiency while maintaining data integrity. In addition, when failure has occurred in a configuration element, the time necessary to resume the data replication is reduced. In accordance with an... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070061529 - Double-allocation data-replication system: A data-allocation data-replication system includes a controller adapted to respond to back-up requests from host systems by first allocating an accumulated data set containing multiple source data sets. An index data set is then allocated incorporating index keys and other information helpful to restore the source data sets, such as... Agent: Quarles & Brady Streich Lang LLP

20070061530 - Method for storage of digital data in a mainframe data center and associated device: Method for storage, in a mainframe data center, digital data obtained from a mainframe that includes a storage device, by (A) copying digital data on a direct access storage device, called a cache, thus creating a logical backup of the data, (B) copying, on a physical substrate different from the... Agent: Young & Thompson

20070061534 - Method of controlling storage device controlling apparatus, and storage device controlling apparatus: A storage device controlling apparatus includes: a plurality of channel controllers having a circuit board on which are formed a file access processing section receiving requests to input and output data in files as units from an information processing apparatus and an I/O processor outputting I/O requests corresponding to the... Agent: Townsend And Townsend And Crew, LLP

20070061531 - Method, system and article of manufacture for recovery from a failure in a cascading pprc system: A method of recovery from a data storage system failure in a data storage system having a host computer writing data to a first storage unit with a first storage controller synchronously mirroring the data to a second storage unit, and with a second storage controller asynchronously mirroring the data... Agent: Law Office Of Dan Shifrin, PC - Ibm

20070061533 - Systems and methods of data migration in snapshot operations: The present invention relates to a snapshot system for a data storage system including a host that communicates with a cache memory, source storage, target storage, and metadata, including a source storage for active data, a target storage to store migrated snapshot data, first metadata (e.g., bitmaps and log files... Agent: Robert Moll

20070061535 - Processing unit enclosed operating system: A processing unit for use in an electronic device includes standard instruction processing and communication interfaces and also includes functional capability in addition to or in place of those found in an operating system. A secure memory within the processing unit may contain a hardware identifier, policy data, and subsystem... Agent: Marshall, Gerstein & Borun LLP (microsoft)

20070061537 - Processor system using synchronous dynamic memory: A chip including: a microprocessor; a control unit coupled to the microprocessor; and interface nodes for coupling a synchronous dynamic memory; wherein the control unit generates command information and the interface nodes output the command information to the synchronous dynamic memory in synchronism with a clock signal, wherein the command... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070061536 - Reconstruction of signal timing in integrated circuits: Improved integrated circuits, memory devices, circuitry, and data methods are described that facilitate the adjustment and reconstruction of signal timing of devices by providing for an interface having inputs and/or outputs that are adjustably delayed. This allows embodiments of the present invention to sense the signal delay and utilize adjustable... Agent: Leffert Jay & Polglaze, P.A. Attn: Andrew C. Walseth

20070061538 - Programming method of non-volatile memory device having multi-plane structure: A method for performing a program operation of a non-volatile memory device includes loading first, second, third, and fourth data to first, second, third, and fourth page buffers, respectively, in sequence; programming the first data loaded onto the first page buffer into a first page while loading the second data... Agent: Townsend And Townsend And Crew, LLP

20070061540 - Data storage system using segmentable virtual volumes: A system and method for a block storage device that can present as multiple virtual block storage devices (volumes) over a SAN, multiple shared file systems over a NAS or both simultaneously.... Agent: Holme Roberts & Owen, LLP

20070061539 - Filesystem building method: To provide a technique whereby a plurality of types of storage media can be utilized in an efficient manner. A management apparatus includes a file manager that manages files within an integrated memory area that includes a first memory area composed of at least a part of the first type... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070061541 - Searching method and computer system for determining a function associated with a memory block: A searching method for determining a function associated with a memory block of a memory of a computer system and the computer system thereof are disclosed. A first function execution code executed by the computer system calls a second function execution code to require the computer system to allocate a... Agent: North America Intellectual Property Corporation

20070061543 - Method for a distributed column chunk data store: An improved system and method for a distributed column chunk data store is provided. A distributed column chunk data store may be provided by multiple storage servers operably coupled to a network. A storage server may include a database engine for partitioning a data table into the column chunks for... Agent: Law Office Of Robert O. Bolan

20070061544 - System and method for compression in a distributed column chunk data store: An improved system and method for compression in a distributed column chunk data store is provided. A distributed column chunk data store may be provided by multiple storage servers operably coupled to a network. A storage server provided may include a database engine for partitioning a data table into the... Agent: Law Office Of Robert O. Bolan

20070061542 - System for a distributed column chunk data store: An improved system and method for a distributed column chunk data store is provided. A distributed column chunk data store may be provided by multiple storage servers operably coupled to a network. A storage server may include a database engine for partitioning a data table into the column chunks for... Agent: Law Office Of Robert O. Bolan

20070061546 - Compressibility checking avoidance: Various embodiments of a computer-implemented method, system and article of manufacture maintain a logical page having a predetermined size. Data is added to an uncompressed area of the logical page. The uncompressed area of the logical page is associated with an uncompressed area of a physical page. The logical page... Agent: International Business Machines CorpIPLaw

20070061545 - Method for writing memory sectors in a memory deletable by blocks: The invention relates to a method for writing memory sectors in individually-deletable memory blocks (SB), comprising a number of memory sectors, whereby access to the physical sectors is achieved by means of an allocation table (ZT) for address conversion of a logical address (LA) into a physical block address (RBA)... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw

20070061548 - Demapping tlbs across physical cores of a chip: In one embodiment, a processor comprises a plurality of processor cores and an interconnect to which the plurality of processor cores are coupled. Each of the plurality of processor cores comprises at least one translation lookaside buffer (TLB). A first processor core is configured to broadcast a demap command on... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20070061547 - Hardware demapping of tlbs shared by multiple threads: In one embodiment, a processor comprising at least one translation lookaside buffer (TLB) and a control unit coupled to the TLB. The control unit is configured to track whether or not at least one update to the TLB is pending for at least one of a plurality of strands. Each... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20070061549 - Method and an apparatus to track address translation in i/o virtualization: A method and an apparatus to track address translation in I/O virtualization have been presented. In one embodiment, the method includes initiating a page walk if none of a plurality of entries in a translation lookaside buffer (TLB) in a direct memory access (DMA) remap engine matches a guest physical... Agent: Blakely Sokoloff Taylor & Zafman

20070055809 - Cache memory analyzing method: It is done to read information containing an address of a memory at which a cache miss is generated, from a cache memory. The numbers of cache misses generated at each cache miss generated address contained in the information are totalized. The cache miss generated addresses whose generated cache miss... Agent: Mcdermott Will & Emery LLP

20070055810 - Memory access control device and processing system having same: A memory access control device enabling freer access from a plurality of ports to a plurality of memories and a processing system having the same are provided. From among addresses generated at a read address generation unit and addresses input from an external bus, the address which is supplied to... Agent: Lerner, David, Littenberg, Krumholz & Mentlik

20070055811 - Method and system for local memory addressing in single instruction, multiple data computer system: A single instruction, multiple data (“SIMD”) computer system includes a central control unit coupled to 256 processing elements (“PEs”) and to 32 static random access memory (“SRAM”) devices. Each group of eight PEs can access respective groups of eight columns in a respective SRAM device. Each PE includes a local... Agent: Edward W. Bulchis, Esq. Dorsey & Whitney LLP

20070055813 - Accessing external memory from an integrated circuit: An integrated circuit and method of operating the integrated circuit to access external memory are provided. The integrated circuit comprises interconnect logic for coupling master logic units and slave logic units to enable transactions to be performed, each transaction comprising an address transfer from a master logic unit to a... Agent: Nixon & Vanderhye, Pc

20070055812 - Integrated circuit device mountable on both sides of a substrate and electronic apparatus: An integrated circuit device includes: first through fourth terminals arranged in order in which the first terminal and the fourth terminal are arranged in line symmetry with respect to a center axis of the first through fourth terminals, and the second terminal and the third terminal are arranged in line... Agent: Harness, Dickey & Pierce, P.L.C

20070055814 - Memory system and method having uni-directional data buses: A memory system and method includes a unidirectional downstream bus coupling write data from a memory controller to several memory devices, and a unidirectional upstream bus coupling read data from the memory devices to the memory controller. The memory devices each include a write buffer for storing the write data... Agent: Edward W. Bulchis, Esq. Dorsey & Whitney LLP

20070055815 - Storage system using electromagnetic array: A record carrier (40) of a removable type has an information plane of a layer of magnetic material on a substrate constituting an array of bit locations (11). A magnetic state of the material represents the value of each bit location. A storage device (35) has an interface surface (32)... Agent: Philips Intellectual Property & Standards

20070055816 - Power loss recovery in non-volatile memory: A method that may be used in a no bit-twiddling file system of a non-volatile memory. The method comprises writing to a non-volatile memory a data sector of a file system, and writing to the non-volatile memory of a control sector that comprises a first seed at a start of... Agent: Blakely Sokoloff Taylor & Zafman

20070055817 - Memory hub with internal cache and/or memory access prediction: A computer system includes a memory hub for coupling a processor to a plurality of synchronous dynamic random access memory (“SDRAM”) devices. The memory hub includes a processor interface coupled to the processor and a plurality of memory interfaces coupled to respective SDRAM devices. The processor interface is coupled to... Agent: Edward W. Bulchis, Esq. Dorsey & Whitney LLP

20070055818 - Method and system for using dynamic random access memory as cache memory: A cache memory system and method includes a DRAM having a plurality of banks, each of which may be refreshed under control of a refresh controller. In addition to the usual components of a DRAM, the cache memory system also includes 2 SRAMs each having a capacity that is equal... Agent: Edward W. Bulchis, Esq. Dorsey & Whitney LLP

20070055819 - Information recording medium and its control method: An information recording medium (100) is a recording medium to/from which data can be written/read from a data processing apparatus. The recording medium includes a host interface (110) for communicating with the data processing apparatus, a data storage section (130) having a plurality of recording regions (#1, . . .... Agent: Greenblum & Bernstein, P.L.C

20070055820 - Storage subsystem and performance tuning method: In a storage subsystem, performance tuning is performed with respect to all of the logical devices including external storage subsystems that are not directly connected to host computers. The physical storage units presented by the external storage subsystems are defined as logical devices of the storage subsystem, and I/O processing... Agent: Mattingly, Stanger, Malur & Brundidge, P.c.

20070055823 - Multi-interface, controller, memory card having the multi-interface controller, and interface setting method: A multi-interface controller having a first logic circuit and a second logic circuit. The first logic circuit supports a first interface. The second logic circuit supports a second interface. The first logic circuit is enabled based on a first command. The second logic circuit is enabled based on a second... Agent: F. Chau & Associates, Llc

20070055822 - Portable data storage device and packaging method: A portable data storage device (such as a USB flash drive) including a housing shaped to facilitate a reversible packaging of at least one such portable data storage device into an object having a shape of a ring, preferably having dimensions of a standard CD ROM, a non-volatile memory within... Agent: Dr. Mark Friedman Ltd. C/o Bill Polkinghorn

20070055821 - Recording apparatus: [Problem] As to a memory card drive for operating multiple memory cards in parallel and executing high speed reading and writing, the amount of current supplied to the memory card drive varies among apparatuses connected and supplying electric power to the memory card drive due to their different capabilities, and... Agent: Wenderoth, Lind & Ponack L.l.p.

20070055824 - Microprocessor with improved data stream prefetching: A microprocessor coupled to a system memory includes a load request signal that requests data be loaded from the system memory into the microprocessor in response to a load instruction. The load request signal includes a load virtual page address. The microprocessor also includes a prefetch request signal that requests... Agent: Huffman Law Group, P.c.

20070055827 - Hiding conflict, coherence completion and transaction id elements of a coherence protocol: An apparatus having one or more cache agents and a protocol agent is disclosed. The protocol agent is coupled to the one or more cache agents to receive events corresponding to cache operations from the one or more cache agents to maintain ordering with respect to the cache operation events.... Agent: Blakely Sokoloff Taylor & Zafman

20070055825 - Managing coherence via put/get windows: A method and apparatus for managing coherence between two processors of a two processor node of a multi-processor computer system. Generally the present invention relates to a software algorithm that simplifies and significantly speeds the management of cache coherence in a message passing parallel computer, and to hardware apparatus that... Agent: Scully Scott Murphy & Presser, Pc

20070055828 - Pre-coherence channel: A cache architecture to increase communication throughput and reduce stalls due to coherence protocol dependencies. More particularly, embodiments of the invention include multiple cache agents that each communication with the same protocol agent. In one embodiment, a pre-coherence channel couples the cache agents to the protocol agent to enable the... Agent: Blakely Sokoloff Taylor & Zafman

20070055826 - Reducing probe traffic in multiprocessor systems: A computer system having a plurality of processing nodes interconnected by a first point-to-point architecture is described. Each processing node has a cache memory associated therewith. A probe filtering unit is operable to receive probes corresponding to memory lines from the processing nodes and to transmit the probes only to... Agent: Beyer Weaver & Thomas, LLP

20070055829 - Internal software security analysis in non-volatile memory: A non-volatile memory device may contain code in protected storage that is executed to examine software that is intended to be executed from a memory array of the non-volatile memory device. The code may look for instructions, patterns, sequences, etc., in the software that indicate whether the software, when executed,... Agent: Blakely Sokoloff Taylor & Zafman

20070055830 - Time slicing in a shared partition: An operating system in a shared processor logical partitioned data processing system is given a target percentage. The hypervisor assigns the target processor percentage to the operating system. The operating system also has a predetermined time slice to allot to threads in a multitasking environment. The operating system adjusts the... Agent: Ibm Corp (ya) C/o Yee & Associates Pc

20070055832 - Method and system for fast data access using a memory array: First and second address-selection information, as well as first and second read/write information, is contemporaneously provided to various enabling circuits. The enabling circuits can then enable one or more first memory cells based on the first address-selection and first read/write information, and further enable the one or more second memory... Agent: Sterne, Kessler, Goldstein & Fox Pllc

20070055831 - System and method for performing a search operation within a sequential access data storage subsystem: A system and method for performing a search operation within a sequential access data storage subsystem are disclosed. According to one embodiment, a data storage subsystem is provided which comprises a search module and a communication channel interface to communicatively couple the data storage subsystem to a host data processing... Agent: Dillion & Yudell, LLP

20070055835 - Incremental replication using snapshots: A first snapshot is taken of a first block storage resource that is initially identical in content to a second block storage resource. A second snapshot of the first block storage resource is taken at a later time. A record is kept of all blocks modified on the first block... Agent: Heslin Rothenberg Farley & Mesiti Pc

20070055836 - Information processing system, separation concealment apparatus, separation control method, and program: A concealment apparatus is provided between a replication source storage and a replication destination storage, a separation between the replication source storage and the replication destination storage is replaced with a separation between the concealment apparatus and the replication destination storage and, thereby, the separation between the replication source storage... Agent: Foley And Lardner LLP Suite 500

20070055834 - Performance improvement for block span replication: The portion of a source block storage resource to be replicated, and the corresponding portion of the block storage resource being written to, are each divided into a predefined number of equal-sized spans. A digest calculation is then generated for each span in a corresponding pair and compared. If the... Agent: Heslin Rothenberg Farley & Mesiti Pc

20070055833 - Snapshot restore method and apparatus: Methods and apparatuses for providing a data storage system having snapshot restore capabilities are provided. In particular, snapshots may be taken to represent a state of a storage volume at different times. The state of the storage volume may be returned to the state represented by any snapshot even while... Agent: Sheridan Ross Pc

20070055837 - Memory protection within a virtual partition: The present disclosure relates to attempting to monitor and control memory access and, more specifically, to attempting to limit memory access to a specific registered software agent.... Agent: Intel Corporation C/o Intellevate, Llc

20070055838 - Storage control system and storage controller: A storage control system that makes it possible to integrate the setting of access between initiators and targets connected to a communication network and the setting of LUN security for the targets. The storage control system has: a host computer having one or more initiators; a storage controller having one... Agent: Mattingly, Stanger, Malur & Brundidge, P.c.

20070055840 - Control method of device in storage system for virtualization: In a system where a first storage system and a second storage system are connected to a third storage system, when the first storage system virtualizes and provides a device in the third storage system as a device in its own storage system, update data stored in a cache in... Agent: Mattingly, Stanger, Malur & Brundidge, P.c.

20070055839 - Processing operation information transfer control systems and methods: Systems and methods of controlling transfer of information associated with processing operations, illustratively threads, are disclosed. Instead of transferring information from all storage locations in which information associated with a processing operation is stored for use by a processor in executing the processing operation, a determination is made regarding to... Agent: Eckert Seamans Cherin & Mellott, Llc.

20070055842 - Computer system and storage area allocation method: A burden placed on an administrator in creating a volume is reduced. An evaluation hint value and a performance hint value are employed as hint values for each hint. The evaluation hint value is determined by the administrator considering a service usage and the like of the service server 1... Agent: Townsend And Townsend And Crew, LLP

20070055841 - Memory allocation in a computer system: A method of controlling memory allocation in a computer system (1) comprising physical memory (3), at least one storage device (7, 9, 10) and at least one processing unit (2) and arranged to implement virtual memory, which computer system is capable of enabling at least two processes associated with respective... Agent: Knoble, Yoshida & Dunleavy

20070055843 - Predictive prefaulting in the page fault handler: A predictive prefaulting method reduces the number of page faults and accelerates the process of mapping virtual memory to physical memory. A single page fault results in the mapping of one virtual memory page or, where a contiguous block of virtual memory is linearly accessed, it may result in the... Agent: Patterson & Sheridan, L.l.p.

20070055844 - Efficient algorithm for multiple page size support in ipf long format vhpt: A machine-accessible medium may contain program instructions that, when executed by a processor, may cause the processor to perform at least one operation including searching a virtual hash page table (VHPT) using a region identifier and a virtual page number of a virtual address, and a default page size corresponding... Agent: Venable LLP

20070050530 - Integrated memory core and memory interface circuit: A memory device comprises a first and second integrated circuit dies. The first integrated circuit die comprises a memory core as well as a first interface circuit. The first interface circuit permits full access to the memory cells (e.g., reading, writing, activating, pre-charging and refreshing operations to the memory cells).... Agent: Stattler Johansen & Adeli LLP

20070050532 - Device and control method of the device: A device communicatable through a network by using an address corresponding to a predetermined communication protocol and capable of entering a power-saving state, the device includes a storage unit configured to store an address being used by the device, and a determination unit configured to determine whether the address stored... Agent: Canon U.s.a. Inc. Intellectual Property Division

20070050531 - Information processing apparatus and method, and program and recording medium used therewith: An information processing apparatus reads and writes information in a plurality of recording media is provided. The apparatus includes a formatting determination section which, in the case of formatting the recording media, determines whether or not the recording media are to be formatted by handling the recording media as an... Agent: Bell, Boyd & Lloyd, LLC

20070050533 - Information processing apparatus: An information processing apparatus according to the present invention comprises a communication device, a volatile memory for storing a communication data therein, a first CPU for controlling communication processings of the communication device and the communication data stored in the volatile memory, a ROM memory in which a program of... Agent: Mcdermott Will & Emery LLP

20070050534 - A method for supporting unrecognizable flash memory: A method for supporting an unrecognizable flash memory, at least including steps of sending a parameter table comprising strings for error checking to a specified address, checking if the identification is unknown, reading the specified address in the flash memory to determine its cycle if the identification is unknown, checking... Agent: Pai Patent & Trademark Law Firm

20070050536 - Flash drive fast wear leveling: A system and method comprising a non-volatile memory including one or more memory blocks to store data, a controller to allocate one or more of the memory blocks to store data, and a wear-leveling table populated with pointers to unallocated memory blocks in the non-volatile memory, the controller to identify... Agent: Marger Johnson & Mccollom, P.C.

20070050537 - Flash memory device including a multi buffer program scheme: A memory device comprises of a first buffer including programmable data. The memory device also comprises of a second buffer including real time information related to a load status of the programmable data in the first buffer. The memory device also comprises of a buffer control circuit which activates an... Agent: Volentine Francos, & Whitt PLLC

20070050535 - Flash real-time operating system for small embedded applications: A flash real time operating system for embedded applications employing flash memory is capable of storing and accessing individual bytes of data corresponding to a particular logical address in real time. The operating system writes data bytes to sequential physical blocks within the flash memory. Physical blocks written with data... Agent: Kinney & Lange, P.A.

20070050538 - Smart scalable storage switch architecture: A method and system for providing advanced storage features using commodity, consumer-level storage devices is provided. The advanced storage system is a component that is connected between the computer system and one or more physical disk drives. The host interface of the advanced storage system presents itself to the computer... Agent: Perkins Coie LLP Patent-sea

20070050539 - Accelerated write performance: A generic disk driver filter may be used to accelerate performance when writing to a disk. The generic disk driver filter may be connected between a file system and a di