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Electrical computers and digital processing systems: memory January USPTO class patent listing 01/07

20070022240 - Method of assigning virtual import/export element addresses: A method for assigning element addresses in an automated data storage library includes determining if a data storage device, such as a tape cartridge, belongs to a particular host's cartridge assignment policy. If so, the data storage device is issued a virtual import/export element address taken from a set of... Agent: Quarles & Brady Streich Lang LLP

20070022241 - Dual media storage device: A dual media storage device is provided. Two separate non-volatile mass storage devices, one having a faster access time and a lower capacity than the other, are combined into a single system. A storage controller can direct the flow of data into one device or the other, depending upon various... Agent: Beyer Weaver & Thomas, LLP

20070022243 - Method and apparatus capable of disabling authenticated operations and guaranteed secure boot in a wireless platform: An embodiment of the present invention provides an apparatus, comprising flash memory capable of blocking reads from a secure boot block and capable of disabling authenticated operations after a secure boot process. A configuration register may control access to the secure boot block and enable/disable the authenticated operations. An embodiment... Agent: Blakely Sokoloff Taylor & Zafman

20070022242 - [structure of access of nand flash memory]: A structure of an access of a NAND flash memory, for randomly accessing said NAND flash memory is provided. The access of the NAND flash memory comprises a direct access interface having an asynchronous read mode, an asynchronous write mode, a synchronous read mode and a synchronous write mode for... Agent: Phison Electronics Corporation

20070022245 - Method of controlling refresh operation in multi-port dram and a memory system using the method: A multi-port memory system includes a shared memory bank, multiple command decoders configured to receive refresh commands from multiple processors, and a refresh controller coupled to the shared memory bank and the command decoders, and configured to selectively apply refresh commands from the command decoders to the shared memory bank.... Agent: Marger Johnson & Mccollom, P.C.

20070022244 - Methods and systems for refresh and error scrubbing of dynamic memory devices: Methods and systems for refresh and error scrubbing of dynamic memory devices is provided. A method for maintaining the integrity of data stored in dynamic memory devices comprises determining a refresh-scrub-access-period time interval for a dynamic memory device having a plurality of memory elements, based on a refresh rate requirement... Agent: Honeywell International Inc.

20070022246 - Distributed programmable priority encoder capable of finding the longest match in a single operation: A distributed, hierarchically-structured, programmable priority encoder for a content addressable memory (CAM) device including at least one section, the section further including a section level priority encoder, and a plurality of blocks, each block further including a block level priority encoder, and a plurality of slices. The distributed, hierarchically-structured, programmable... Agent: Dickstein Shapiro LLP

20070022247 - Disk array control device with an internal connection system for efficient data transfer: A disk array controller which includes a channel interface unit for connecting a host computer through a first type channel, a channel interface unit for connecting a host computer through a second type channel, a plurality of disk interface units provided with an interface with a magnetic disk unit respectively,... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070022248 - Method and device for controlling a cache memory: A computer cache memory comprises a memory device comprising a plurality of parts, a probe device for probing the memory parts for a cache hit, a ranking device for ranking each of the memory parts; and a data fetching device for fetching data from a higher level of memory into... Agent: Hewlett Packard Company

20070022249 - Information processing apparatus and its data processing method capable of forming descriptor queue: In an information processing apparatus, a descriptor queue forming unit forms descriptors each including one task command for designating one task program and corresponding to one task data processed by the program, forms descriptor columns each formed by linking at least two of the descriptors including the same task command,... Agent: Mcginn Intellectual Property Law Group, PLLC

20070022251 - Data caching method and computer program product therefor: A data caching method and a computer program product used in a cache system where a data replacing parameter is used for a data replacement rule, are provided to assist determining whether a use data has to be replaced or not. The data caching method and the computer program product... Agent: J C Patents, Inc.

20070022250 - System and method of responding to a cache read error with a temporary cache directory column delete: A system and method of responding to a cache read error with a temporary cache directory column delete. A read command is received at a cache controller. In response to determining that data requested by said read command is stored in a specific data location in the cache, a read... Agent: Dillon & Yudell LLP

20070022253 - Cache coherence protocol with speculative writestream: A system and method for performing speculative writestream transactions in a computing system. A computing system including a plurality of subsystems has a requesting subsystem configured to initiate a writestream ordered (WSO) transaction to perform a write operation to an entire coherency unit by conveying a WSO request to a... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20070022252 - Two-hop cache coherency protocol: The invention facilitates a distributed cache coherency conflict resolution in a multi-node system to resolve conflicts at a home node.... Agent: Blakely Sokoloff Taylor & Zafman

20070022254 - System for reducing the latency of exclusive read requests in a symmetric multi-processing system: A symmetric multi-processing system for processing exclusive read requests. The system includes a plurality of cell boards, each of which further includes at least one CPU and cache memory, with all of the cell boards being connected to at least one crossbar switch. The read-latency reducing system includes write-through cache... Agent: Hewlett Packard Company

20070022255 - Method, apparatus, and computer program product for a cache coherency protocol state that predicts locations of modified memory blocks: A method, apparatus, and computer program product are disclosed for reducing the number of unnecessarily broadcast remote requests to reduce the latency to access data from local nodes and to reduce global traffic in an SMP computer system. A modified invalid cache coherency protocol state is defined that predicts whether... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20070022256 - Method, apparatus, and computer program product for a cache coherency protocol state that predicts locations of shared memory blocks: A method, apparatus, and computer program product are disclosed for reducing the number of unnecessarily broadcast local requests to reduce the latency to access data from remote nodes in an SMP computer system. A shared invalid cache coherency protocol state is defined that predicts whether a memory read request to... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20070022257 - Data bus logical bypass mechanism: A microprocessor apparatus is provided, for performing a self-snoop operation. The microprocessor apparatus includes output driver logic and bypass logic. The output driver logic is configured to drive a latched signal out to a bus. The bypass logic is coupled to the latched signal. The bypass logic is configured to... Agent: Huffman Law Group, P.C.

20070022258 - Preparing memory to allow access to data when primary operating system is unavailable: Systems and methods of sharing files and data in memory between the two operating systems running on a computing device. A main operating system (OS) may execute on the computing device an provide numerous system features and functionality. To conserver power, the main OS may unload, or the computer may... Agent: Woodcock Washburn LLP (microsoft Corporation)

20070022259 - Write protection in a storage system allowing both file-level access and volume-level access: A method for write protection in a storage system using both the “file-level WORM function” and the “block-level WORM function”. The block-level WORM function has two modes: the first mode is to prohibit both file access and block access, and the second mode is to prohibit block access only. When... Agent: Sughrue Mion, PLLC

20070022260 - Data processor memory circuit: A memory circuit for use in a data processing circuit is described, in which memory cells have at least two states, each state being determined by both a first voltage level corresponding to a first supply line and a second voltage level corresponding to a second supply line. The memory... Agent: Nixon & Vanderhye, PC

20070022262 - Interleaving method and system: An interleaving method employing symbol interleaving, tone interleaving, and cyclic interleaving for transmitting data includes storing data at write address values in a memory which are sequentially calculated according to a predetermined process, and reading data stored at read address values of the memory which are sequentially calculated according to... Agent: Sughrue Mion, PLLC

20070022261 - Method of interleaving asymmetric memory arrays: A method of interleaving asymmetric memory arrays for providing more uniform memory access performance in computer systems utilizing asymmetrical memory configurations. The method of interleaving asymmetric memory arrays includes grouping a quantity of memory devices into a paired set and one unpaired device if the quantity of memory devices present... Agent: Gateway, Inc. Attn: Patent Attorney

20070022265 - Computer system: A method include a configuration definition creation step of writing configuration information on a primary site into a storage subsystem; a data transfer step of copying the configuration information, which is written into a storage device, to a storage subsystem in a secondary site over a network; a data reception... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070022263 - Data synchronization management: In one embodiment, a method comprises receiving, in a source controller, a signal indicative of a write request to a source volume managed by the source controller in response to the signal: writing data associated with the write request to a destination controller when a connection to the destination controller... Agent: Hewlett Packard Company

20070022264 - Maintaining write order fidelity on a multi-writer system: Write order fidelity (WOF) is maintained for totally-active implementations wherein a plurality of access nodes at geographically separated sites can concurrently read and/or write data in a “totally active” fashion on a distributed data system. From the hosts' perspective at diverse geographic locations, a synchronous, cache-coherent view of data is... Agent: Townsend And Townsend And Crew, LLP

20070022267 - Method, system, and article of manufacture for consistent copying of storage volumes: Provided are a method, system, and article of manufacture for copying storage. Copy operations are performed on source storage units to copy to target storage units, wherein the copy operations create a consistent copy of the source storage units in the target storage units. While performing a copy operation to... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20070022266 - Storage system, method of controlling storage system, and storage device: The present invention provides a storage system and a method of controlling the storage system, in which a second site rapidly resumes system process when a first site is damaged. The storage system comprises a first site including a first storage device, a second site including a second storage device,... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070022268 - Add/remove memory pressure per object: The scheduling, scope, and other parameters of memory management for execution of a managed object may be influenced by at least an amount of native memory associated with the managed object.... Agent: Microsoft Corporation Attn: Patent Group Docketing Department

20070022269 - Storage space management methods and systems: Methods and systems for storage space management are provided. An embodiment of a method manages storage space comprising multiple blocks. Multiple discontinuous and unused regions are merged into a single and consecutive region for each block. For each block, the merged region does not contain the minimum and maximum addresses... Agent: Quintero Law Office

20070022270 - Translation lookaside buffer prediction mechanism: According to one embodiment a central processing unit (CPU) is disclosed. The CPU includes a translation lookaside buffer (TLB). The TLB predicts a set index value prior to the generation of an effective address.... Agent: Intel/blakely

20070016716 - Method of controlling a database management system by changing allocation of cache memory: Provided is a computer system, including: at least one of database computers, in which a database management system operates; a storage system for storing a database operated by the database management system; and a management computer for managing the database computer and the storage system, the storage system having a... Agent: Townsend And Townsend And Crew, LLP

20070016717 - Cache system: A cache system includes a data storage which stores the data, which a memory supplies, in memory regions that are identified by identification numbers. A management data storage stores a relation between the identification numbers and the addresses of data items stored or being stored in the data storage and... Agent: SprinkleIPLaw Group

20070016718 - System and method for enhancing read performance of a memory storage system including fully buffered dual in-line memory modules: A system and method for enhanced read performance of a memory storage system is disclosed. The storage system includes a first memory controller. At least one first channel of a plurality of memory modules couples to the first memory controller. At least one memory module in the at least one... Agent: Roger Fulghum Baker Botts L.L.P.

20070016721 - Flash file system power-up by using sequential sector allocation: A method and system for reducing the time for initializing a non-volatile memory device, such as flash memory, at power-up that takes advantage of the fact that many file systems are designed to perform sequential writes within a block of data units. The method and system includes, in one aspect,... Agent: Mcdermott Will & Emery LLP

20070016722 - Flash memory device with multi level cell and burst access method therein: A flash memory device including memory cells, each memory cell configured to store bits, a sensing circuit configured to sequentially sense, for each memory cell, sets of the bits of the memory cell, a data rearrangement unit configured to receive words of data and to rearrange bits of the words... Agent: Marger Johnson & Mccollom, P.C.

20070016719 - Memory device including nonvolatile memory and memory controller: A memory device includes a first nonvolatile memory and a second nonvolatile memory. The first nonvolatile memory is used as a main memory and includes a plurality of physical blocks which store data. The second nonvolatile memory is used as a cache memory for the first nonvolatile memory and includes... Agent: C. Irvin Mcclelland Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070016720 - Non-volatile memory cell device, programming element and method for programming data into a plurality of non-volatile memory cells: A programming element for programming data into a plurality of non-volatile memory cells of a non-volatile memory cell array, the data being transferred to the non-volatile memory cell array in a data word comprising a plurality of data items. The programming element comprises a detection element for detecting at least... Agent: Slater & Matsil LLP

20070016723 - Semiconductor memory device for storing multivalued data: Data storage circuits are connected to the bit lines in a one-to-one correspondence. A write circuit writes the data on a first page into a plurality of first memory cells selected simultaneously by a word line. Thereafter, the write circuit writes the data on a second page into the plurality... Agent: Hogan & Hartson L.L.P.

20070016724 - Memory controller based (de)compression: Systems, methodologies, media, and other embodiments associated with (de)compressing data at a time and in a location that facilitates increasing memory transfer bandwidth by selectively controlling a burst-mode protocol used to transfer data to and/or from a memory are described. One exemplary system embodiment includes a memory controller configured to... Agent: Hewlett Packard Company

20070016725 - System and method for selective write to flash memory in hdd: For non-bursty data writes, data is written to flash memory of a hard disk drive for subsequent de-staging to disk, whereas for bursty writes data is written directly to disk.... Agent: Rogitz & Associates

20070016726 - Automatic rebalancing of a data storage system: A method for operating a data storage system that includes a plurality of mass storage devices, which are configured to store data redundantly, the method including determining a characteristic service level of one or more of the mass storage devices and defining a reduced service level, which is less than... Agent: Katten Muchin Rosenman LLP

20070016727 - Computer system and process for transferring multiple high bandwidth streams of data between multiple storage units and multiple applications in a scalable and reliable manner: Multiple applications request data from multiple storage units over a computer network. The data is divided into segments and each segment is distributed randomly on one of several storage units, independent of the storage units on which other segments of the media data are stored. At least one additional copy... Agent: Peter J. Gordon, Patent Counsel

20070016728 - Automatically detecting types of external data flash devices: Automatically detecting types of external FLASH devices is provided, and may comprise communicating one or more read memory device ID commands corresponding to at least one supported memory device to at least one memory device. Data received in response to this communication may be utilized to determine whether the received... Agent: Mcandrews Held & Malloy, Ltd

20070016729 - Cache organization for power optimized memory access: An N-set associative cache organization is disclosed. The cache organization comprises a plurality of SRAMs, wherein the data within the SRAMs such that a first 1/N of a plurality of cache lines is within a first portion of the plurality of SRAMs and last 1/N portion of the plurality of... Agent: Sawyer Law Group LLP

20070016730 - Cache consistency in a multiprocessor system with shared memory: A process to make the cache memory of a processor consistent includes the processor processing a request to write data to an address in its memory marked as being in the shared state. The address is transmitted to the other processors, data are written into the processor's cache memory and... Agent: Jenkens & Gilchrist, PC

20070016731 - Asynchronous arbitration device and microcontroller comprising such an arbitration device: An arbitration device is provided, which is designed to be connected between, on the one hand, a first and a second module and, on the other hand, storing means forming a memory workspace. This arbitration device includes a detector for detecting one or more requests coming, concurrently or not, from... Agent: Westman Champlin & Kelly, P.A.

20070016732 - Data transfer arbitration apparatus and data transfer arbitration method: When a concentration of access requests on a specific bank occurs, the delay time is caused due to the competition among the accesses, thereby lowering the processing speed of an information processing apparatus as a whole. A data transfer arbitration unit 172 sequentially transfers data to be recorded to a... Agent: Kaplan Gilman Gibson & Dernier L.L.P.

20070016733 - Method to provide atomic update primitives in an asymmetric heterogeneous multiprocessor environment: The present invention provides for atomic update primitives in an asymmetric single-chip heterogeneous multiprocessor computer system having a shared memory with DMA transfers. At least one lock line command is generated from a set comprising a get lock line command with reservation, a put lock line conditional command, and a... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20070016734 - Memory device and print recording material receptacle providing memory device: The operation code decoder 204 having received an access enable signal EN acquires and decodes the command, and sends the decoded command to the read/write controller 206. In the event that the received command is a write command, the read/write controller 206 acquires access control information from the fourth address... Agent: Stroock & Stroock & Lavan LLP

20070016735 - Flash memory device with improved management of protection information: A non-volatile memory device of flash type includes first memory cells for storing data, second memory cells for storing protection information of the first memory cells, and a circuit for updating the protection information that includes a circuit for writing a plurality of versions of the protection information in the... Agent: Seed Intellectual Property Law Group PLLC

20070016737 - Memory module indicator device: To improve the convenience of using a memory module, there are provided indicator elements corresponding to types of access to semiconductor memory. The indicator elements are configured to correspond to the access type and indicate the frequency of this type of access to the semiconductor memory. The indicator elements are... Agent: Yokoi & Co., U.s.a., Inc.

20070016736 - Method for analyzing performance information: A performance information display method using a computer, includes the steps, in the computer, of reading out information data of a storage device previously stored in a storage device and information data of a plurality of devices utilizing the storage device, displaying an identifier of the storage device and identifiers... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070016738 - Nonvolatile semiconductor memory: A non-volatile semiconductor memory includes a memory cell array having a plurality of electrically-rewritable non-volatile memory cells. The memory cell array is provided with an initially-setting data area, programmed in which is initially-setting data for deciding memory operation requirements. The non-volatile semiconductor memory also includes an initial-set data latch. The... Agent: Banner & Witcoff, Ltd., Attorneys For Reserve Attorneys For Client No. 000449, 001701

20070016739 - Data processing device and control method for the same: The present invention provides a data processing device and a method for processing data. The data processing device comprises a first memory for storing data, a second memory for storing programs and backup data, and a controller for reading the data based on a priority order and for executing one... Agent: Roylance, Abrams, Berdo & Goodman, L.L.P.

20070016740 - Method and system for managing point-to-time images: A point-in-time image of data in stored in a storage system is identified. Dependencies from the point-in-time image are detected. The dependencies are broken in an order before the point-in-time image is deleted. In one embodiment, an order in which to break the dependencies is presented to a user via... Agent: Network Appliance/blakely

20070016742 - Data security in an automated data storage library: An automated data storage library accesses data stored on storage media contained in cartridges in response to commands from an external host. The cartridges include cartridge memory and a component in the library includes a cartridge memory interface for reading data from and/or writing data to the cartridge memory. When... Agent: Law Office Of Dan Shifrin, PC - Ibm

20070016741 - Selectable block protection for non-volatile memory: A semiconductor non-volatile memory device, particularly a flash memory array, having a chip configuration with a plurality of pins including a write protect pin, a serial in pin and an optional parallel data bus with input-output pins (I/O7-0), plus other pins, all electrically communicating with the memory array and particularly... Agent: Schneck & Schneck

20070016743 - Secure storage device with offline code entry: A system to authorize access to secured data storage can compromise a user interface configured to receive a user code offline from a user to allow access to stored data, circuitry configured to authorize access to the stored data based, at least in part, on the user code and provide... Agent: Carr & Ferrell LLP

20070016744 - Memory management in a portable data carrier: In a process for memory management in the execution of a program by a portable data carrier which has a first and a second memory region for the storage of objects generated in program execution, an object is initially created at least in part in the second memory region. If,... Agent: Martine Penilla & Gencarella, LLP

20070016745 - Method and apparatus for migrating data between heterogeneous data storage devices: A method for migrating data between heterogeneous data storage devices within a storage area network is disclosed. A first virtualizer presents stored data as a first virtual disk, and then communicates a managed disk representation of the first virtual disk to a second virtualizer. After receiving the managed disk representation,... Agent: Dillion & Yudell, LLP

20070016746 - System and method for managing disk space in a thin-provisioned storage subsystem: A system and method for managing disk space in a thin-provisioned storage subsystem. If a number of free segments in a free segment pool at a storage subsystem is detected as below a desired minimum, one or more of the following is performed: selecting and adding logical devices (LDEVs) from... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070016747 - Computer system and method for improving processing velocity of memory: A computer system and method for improving processing speed of a memory are provided. A memory stores data and includes at least one memory module. A memory controller controls an operation of respective memory modules according to commands from a central processing unit (CPU) and includes a plurality of general... Agent: Roylance, Abrams, Berdo & Goodman, L.L.P.

20070016748 - Method for self-timed data ordering for multi-data rate memories: A self-timed data ordering method and circuit for multi-data rate memories orders a plurality of data words substantially simultaneously retrieved during successive read operations of a memory device. A data word ordering designator is stored from each of the successive read operations and managed in a first-in first-out manner. The... Agent: Trask Britt

20070016749 - Disk control system and control method of disk control system: In order to assign logical devices efficiently to logical units, a disk control system that receives a process command for writing or reading of data from an information processing device, and performs a write or read process of data with respect to a logical device corresponding to a logical unit... Agent: Townsend And Townsend And Crew, LLP

20070016751 - File system: The present invention provides a file system capable of reducing time taken to switch I/O paths, and hiding the process of switching the I/O paths from the user. In a system of the present invention in which a file ID is defined for each file, upon receiving a request for... Agent: Townsend And Townsend And Crew, LLP

20070016750 - System and method for managing storage and program for the same for executing an operation procedure for the storage according to an operation rule: A method for managing storage devices provides a function of automatically changing a scenario and automatically making a partial change to the scenario according to a change in the environment, which are made possible by executing an operation procedure according to an operation rule for storage devices and feeding back... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070016752 - Efficient data storage: One embodiment in accordance with the invention is a method for enabling efficient data storage. The method can include determining a maximum value for an element of a data structure, wherein the element can be stored. Also, a minimal bit number is determined that can represent the maximum value. A... Agent: Hewlett Packard Company

20070016753 - Method and apparatus for managing memory accesses in an av decoder: The invention describes apparatus and method for receiving and decoding a multiplexed data stream organised in sectors containing payload portions individually destined for one of two or more decoders. The apparatus is connected to a memory device addressable in an address space. At least one of the decoders generates read... Agent: Thomson Licensing Inc.

20070016754 - Fast path for performing data operations: Described are techniques used in a computer system for handling data operations to storage devices. A switching fabric includes one or more fast paths for handling lightweight, common data operations and at least one control path for handling other data operations. A control path manages one or more fast paths.... Agent: Proskauer Rose LLP

20070016755 - Using writeable page tables for memory address translation in a hypervisor environment: A method and system for using writeable page tables to increase performance of memory address translation in computing environments utilizing a hypervisor. Guest operating systems are given temporary write-access to a page table page after the system confirms that such page is not part of the current address space (i.e.,... Agent: Whiteford, Taylor & Preston, LLP Attn: Gregory M Stone

20070016756 - Device for identifying data characteristics for flash memory: A highly efficient data characteristic identification device for flash memory is provided, including an instruction register, a plurality of auxiliary controllers, a data register, an address register, a microprocessor, a plurality of hash function units, a hash table unit, a comparator, a shifter, and an adder. By connecting the instruction... Agent: Rosenberg, Klein & Lee

20070011392 - Reconfigurable memory module and method: A computer system includes a controller coupled to a plurality of memory modules each of which includes a memory hub and a plurality of memory devices divided into a plurality of ranks. The memory hub is operable to configure the memory module to simultaneously address any number of ranks to... Agent: Edward W. Bulchis, Esq. Dorsey & Whitney LLP

20070011393 - Information recorder, recording program and recording medium: The present invention provides an information recording apparatus a recording program by which inputted data can be written only in a specific recording medium, and a recording medium in which the inputted data can be written. This information recording apparatus is at least provided with: a means for inputting the... Agent: Lucas & Mercanti, LLP

20070011394 - Access method and access circuit for flash memory in embedded system: The present invention relates an access method for flash memory in an embedded system, including the following steps: divide the flash memory into a main program zone and a storage zone; provide an access circuit having a command register for receiving commands and a microcontroller status buffer; the access circuit... Agent: Troxell Law Office PLLC One Skyline Place

20070011395 - Non-volatile memory card apparatus and method for updating memory capacity information: A memory card apparatus includes a non-volatile memory and a controller configured to control the non-volatile memory and communicating with the host device, wherein the controller updates available memory capacity information according to occurrence of bad memory in the non-volatile memory and transmits the updated memory capacity information to a... Agent: F. Chau & Associates, LLC

20070011396 - Method and apparatus for bandwidth efficient and bounded latency packet buffering: A system and method for buffering data packets in a data network device having a DRAM buffer are presented. When writing packets, the buffering system separates available memory channels into two groups corresponding to ingress and egress data. Based on the source of the data packets, data pages from the... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20070011397 - Dram with hidden refresh: A synchronous DRAM is provided having specified time slots (e.g., every multiple of 4 clock pulses of a DRAM input clock) within which read or write commands may be entered on the command/address bus. During operation, the DRAM performs internally generated refresh operations on a periodic basis while avoiding collisions... Agent: Dickstein Shapiro LLP

20070011399 - Apparatus and method to write information to and/or read information from an information storage medium: A method to write information to an information storage medium. The method creates one or more objects comprising information and provides a first one of those one or more objects. The method writes a header label to an information storage medium, where the header label comprises an object processing indicator.... Agent: Dale F. Regelman

20070011398 - Method and device for transferring data between a main memory and a storage device: This invention relates to a device and a method of representing a transfer of data between a main memory and a storage device in a storage system. The invention uses scatter gather lists to describe the data area of both the main memory and of the storage device that are... Agent: Philips Intellectual Property & Standards

20070011400 - External storage subsystem: A plurality of independent cache units and nonvolatile memory units are provided in a disk controller located between a host (central processing unit) and a magnetic disk drive. A plurality of channel units for controlling the data transfer to and from the central processing unit and a plurality of control... Agent: Kenyon & Kenyon LLP

20070011403 - Data writing method for raid: A data writing method for RAID performs at a write cycle including a first clock and a second clock, and cooperates with a first disk, a second disk, a third disk, and a memory module. The disks store a first checking data, a second data, and a second checking data.... Agent: Birch Stewart Kolasch & Birch

20070011402 - Disk array apparatus and method for controlling the same: Proposed are: a disk array apparatus that can effectively and efficiently utilize its storage resources, and a method for controlling such a disk array apparatus. A disk array apparatus and a method for controlling the disk array apparatus with a function of: retaining difference data that represent a difference between... Agent: Stanley P. Fisher Reed Smith LLP

20070011401 - System and method for adaptive operation of storage capacities of raid systems: Apparatus and methods for efficiently operating on RAID systems. A fast access buffer comprising an off-disk fast access memory module supports RAID operations such as recovery or reconfiguration operations, thereby minimizing or reducing the need for on-disk destructive zones and/or reducing disk drive I/O activities. In some cases the fast... Agent: Irene Y.hu

20070011404 - Method and system for efficient fragment caching: Methods for serving data include maintaining an incomplete version of an object at a server and at least one fragment at the server. In response to a request for the object from a client, the incomplete version of the object, an identifier for a fragment comprising a portion of the... Agent: Keusey, Tutunjian & Bitetto, P.C.

20070011405 - High-speed interface for high-density flash with two levels of pipelined cache: A memory circuit and a method of operating a flash or EEPROM device that has two levels of internal cache. A memory device having a memory array, sense amplifiers, a data register, cache, an input-output circuit, and a control logic circuit is configured to output data while simultaneously reading data... Agent: Schneck & Schneck

20070011406 - Systems and methods for increasing yield of devices having cache memories by inhibiting use of defective cache entries: Systems and methods for increasing the yield of devices incorporating set-associative cache memories by selectively avoiding the use of cache entries that include defects. In one embodiment, a cache replacement manager determines in which of n possible entries data will be replaced. The cache replacement manager is configured to take... Agent: Law Offices Of Mark L. Berrier

20070011407 - Method and system for reconfiguring functional capabilities in a data processing system with dormant resources: A method, a computer program product and a system for reconfiguring functional capabilities in a data processing system with dormant resources. Dormant resources of a data processing system are used to replace (360) the functional characteristics of a broken hardware unit in order to compensate the lost resources. If sufficient... Agent: Ibm Corporation Intellectual Property Law

20070011408 - Adaptive snoop-and-forward mechanisms for multiprocessor systems: In a network-based cache-coherent multiprocessor system, when a node receives a cache request, the node can perform an intra-node cache snoop operation and forward the cache request to a subsequent node in the network. A snoop-and-forward prediction mechanism can be used to predict whether lazy forwarding or eager forwarding is... Agent: F. Chau & Associates, LLC

20070011410 - Data processing system, data processing method, and data processing program product suited for transmitting and receiving data among a plurality of image processing apparatuses: In order to facilitate the designation of a destination of data while allowing the data to be delivered in a processing method desired by a user at the destination, an MFP includes a registration portion to register for each user a processing method for processing data, a destination designation portion... Agent: Buchanan, Ingersoll & Rooney PC

20070011411 - Data processor apparatus and memory interface: A data processor apparatus and memory interface comprises a memory, a plurality of processor units couplable to receive data from the memory, and control means for controlling transmission of data from the control means to each processor unit. The control means for controlling operations of the data processor units is... Agent: Blackwell Sanders Peper Martin LLP

20070011412 - Data processor apparatus and memory interface: A data processor apparatus and memory interface comprises a memory, a plurality of memories, an interface for controlling access to the memories by a device, and an identifier identifying at least a memory location in one memory and a memory location in another memory. The interface is responsive to the... Agent: Blackwell Sanders Peper Martin LLP

20070011409 - Memory controller: A method of controlling a memory and a memory controller are disclosed. The memory controller is operable to control a memory, the memory being operable in a plurality of modes, the memory controller comprising: memory interface logic configurable to interact with the memory in each of the plurality of modes;... Agent: Nixon & Vanderhye, PC

20070011414 - Storage system and storage device system: Under a hetero-environment in which different sorts of disk-systems are mixed with each other, a data guaranteeing operation can be carried out. When a cache controller of a local disk system receives a data writing request from a host computer, the cache controller stores data into a local disk provided... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070011413 - Storage system having a plurality of interfaces: A hybrid-type storage system having both SAN and NAS interfaces can be implemented by simple hardware capable of carrying out a SAN function independently of a NAS function and a NAS load. To be more specific, a controller of the storage system comprises a NAS controller for accepting an I/O... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070011415 - Apparatus and method for deterministic garbage collection of a heap memory: A method includes executing an application in an execution environment. The application is allocated a plurality of memory blocks in a memory during execution. The method also includes executing a deterministic garbage collection process. The garbage collection process is capable of reclaiming at least one of the memory blocks in... Agent: Honeywell International Inc.

20070011416 - Data storage device and medium and related method of storing backup data: Provided are an apparatus, related method of storing data, and a computer readable recording medium. The apparatus includes a source/destination memory, a non-volatile back-up memory, and a transaction management module. The transaction management module is adapted to erase a plurality of memory location in backup memory upon initialization of the... Agent: Volentine Francos, & Whitt PLLC

20070011417 - Distributed storage system with global replication: A data storage system apparatus and associated method with a virtualization engine connectable to a remote device over a network for passing access commands between the remote device and a storage space. A plurality of intelligent storage elements (ISEs) are configured for replicating data from a first ISE to a... Agent: Fellers, Snider, Blankenship, Bailey & Tippens

20070011418 - Snapshot creating method and apparatus: In the storage-based snapshot creation, a block-selection specifying unit provided on a NAS processing unit specifies a block, which becomes necessary for the generation of snapshot data, to a specified-block analyzing unit within a disk apparatus. Moreover, a disk controller generates the snapshot data on the block specified as the... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070011419 - Method and system for a multi-sharing security firewall: Systems and methods for a multi-sharing security firewall are provided. Embodiments of a memory security firewall apparatus are provided that include region configuration logic, region selection logic, and access validation logic. The region configuration logic is operable to define memory protection regions of a target memory, each memory protection region... Agent: Texas Instruments Incorporated

20070011424 - Apparatus and methods for facilitating data tapping with host clustering in a storage area network: Disclosed is apparatus and methods for enabling an appliance to receive data being sent between any host of a host cluster to a specified storage device's logical unit (LUN) in a single stream or session. In one embodiment, a data virtual target is initially set up for a specified storage... Agent: Beyer Weaver & Thomas, LLP

20070011423 - Data migration method: It is desirable that data stored in an old storage device is migrated to a new storage device without any interruption. According to a computer system of this invention, in a first data storage device, a second data storage area of a second data storage device is recognized as a... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070011425 - Distributed storage system with accelerated striping: A data storage apparatus and associated method is provided wherein a software system is resident in a memory space and is configured to encode data retrieved from a first number of logical units into a single channel in order to store the data in a second number of logical units.... Agent: Fellers, Snider, Blankenship, Bailey & Tippens

20070011422 - Hierarchical state based migration of structured data: The present invention provides a method for hierarchical state based migration of data. The method includes determining one or more constraints and/or global parameters for migration of data from a first storage location to a second storage location, allocating copy and updating resources to copy data from the first storage... Agent: Mcandrews Held & Malloy, Ltd

20070011421 - Method and system for decreasing power consumption in memory arrays having usage-driven power management: A method and system for decreasing power consumption in memory arrays having usage-driven power management provides decreased power consumption in the memory array of a processing system. Per-page usage information is gathered on memory by a memory controller and periodically evaluated by software. The software distinguishes between more frequently accessed... Agent: Ibm Corporation (mh) C/o Mitch Harris, Attorney At Law, L.L.C.

20070011420 - Systems and methods for memory migration: Systems, methods and media for performing auto-migration of data among a plurality of memory devices are disclosed. In one embodiment, memory access of application program data is monitored for each of one or more application programs. The data may be stored in one or more of a plurality of memory... Agent: Ibm Corporation (jss) C/o Schubert Osterrieder & Nickelson PLLC

20070011426 - Transceiver with latency alignment circuitry: In a transceiver system a first interface receives data from a first channel using a first clock signal and transmits data to the first channel using a second clock signal. A second interface receives data from a second channel using a third clock signal and transmits data to the second... Agent: Deniro/rambus

20070011427 - Dynamic nv-ram: A method and apparatus of dynamically storing critical data of a gaming machine by allocating and deallocating memory space in a gaming machine is disclosed. One or more embodiments describe downloading or removing a new game to a gaming machine such that all existing critical data in NV-RAM memory is... Agent: Beyer Weaver & Thomas, LLP

20070011428 - System and method for auditing memory: According to one embodiment of the invention, a method of auditing memory in a system comprises receiving a request for memory from an application and populating a memory tag with a stack depth component and a traceback stack component. The traceback stack component contains a pointer to a traceback stack.... Agent: Baker Botts LLP

20070011430 - Systems and methods for host virtual memory reconstitution: Systems and methods are described herein to provide for host virtual memory reconstitution. Virtual memory reconstitution is the ability to translate the host device's virtual memory addresses to the host device's physical memory addresses. The virtual memory reconstitution methods are independent of the operating system running on the host device.... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070011429 - Virtual memory key generation: Methods, computer readable media, and computing devices including program instructions are provided for virtual memory key generation. One method embodiment includes selecting a memory location that has a virtual memory address and a unique descriptor, assigned to it. The method includes generating a key for identifying the memory location, by... Agent: Hewlett Packard Company

20070011431 - Rom software breakpoints: Software breakpoints for code that normally executes from ROM are set by remapping a page of virtual addresses normally translated to a page of physical addresses in ROM to a page of physical addresses in RAM. This new mapping is stored in the page table and translation look-aside table (TLB).... Agent: Merchant & Gould (microsoft)

20070011432 - Address generation unit with operand recycling: An address generation unit (AGU) including a single adder and a recycling path. The recycling AGU may receive a plurality of operands at a first and at a second selection device to perform a first address generation operation. The adder may sum a portion of the operands to generate an... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)