Electrical computers and digital processing systems: memory inventions 07/06

20060168389 - Portable operating system: A method for operating various host computers regardless of the type of operating system installed. A portable operating system is stored on read/write media such as a rewritable CD, DVD or jump memory drive (“R/W media”). The operating system is stored at a starting location on the R/W media to...

20060168390 - Methods and apparatus for dynamically managing banked memory: Techniques for controllably allocating a portion of a plurality of memory banks as cache memory are disclosed. To this end, a configuration tracker and a bank selector are employed. The configuration tracker configures whether each memory bank is to operate in a cache or not. The bank selector has a...

20060168392 - Flash memory file system: Provided is a file system for effectively using a flash memory. The file system includes a meta block for storing various file information, a data block where data is really stored, and an info block for storing information on the data block. Unlike the conventional method, the file system is...

20060168391 - [flash memory storage device with pci express]: A flash memory storage device with PCI Express includes a microcontroller connected separately to a flash memory and a peripheral component interconnect (PCI) Express connecting interface, and the microcontroller has a flash memory interface and a PCI Express interface, such that when the storage device is coupled to a PCI...

20060168393 - Apparatus and method for dependency tracking and register file bypass controls using a scannable register file: An apparatus and method for dependency tracking and register file bypass controls using a scannable register file are provided. With the apparatus and method, a scannable register file array is provided and used to track the stage of any instruction in the execution unit. Every entry in the target vector...

20060168394 - Storage system capable of dispersing access load: To automatically disperse access loads even when the number of client PCs using a storage-centric network changes. A storage controller that controls data write and data read in a disk device in which one or more logical units are set, includes: plural ports connected to client computers via a network;...

20060168396 - Method and system of obtaining data from field devices: Systems and methods for communicating data from field devices to data acquisition systems. In at least some exemplary embodiments, a remote process or field controller may obtain data, and send the data to a data cache only if the data has changed from previously sent data. The data acquisition system...

20060168395 - Method of sending command and data to movable storage device: The present invention provides a method for sending commands and/or data to a mobile storage device, wherein the application sets an identification mark for commands and/or data, and a data packet is formed of the identification mark and the commands and/or data; the application sends via the operating system to...

20060168397 - Achieving data consistency with point-in-time copy operations in a parallel i/o environment: A method for processing a point-in-time copy of data associated with a logical storage volume where the data to be copied is stored in a striped or parallelized fashion across more than one physical source volume. The method includes receiving a point-in-time copy command concerning a logical volume and distributing...

20060168398 - Distributed processing raid system: A distributed processing RAID data storage system utilizing optimized methods of data communication between elements. In a preferred embodiment, such a data storage system will utilize efficient component utilization strategies at every level. Additionally, component interconnect bandwidth will be effectively and efficiently used; systems power will be rationed; systems component...

20060168399 - Automatic generation of software-controlled caching and ordered synchronization: A method for applying software controlled caching and ordered thread optimizations in network applications includes collecting statistics for program variables, selecting program variable candidates for ordered synchronization and/or software controlled cache optimization, performing a safety check to ensure candidates can be properly optimized, and generating code for selected optimization candidates....

20060168400 - Packet data placement in a processor cache: Packet data received by a network controller is parsed and at least a portion of a received packet is stored by the network controller in both a host memory of a system and also in a cache memory of the central processing unit of the system. Other embodiments are described...

20060168401 - Method and structure for high-performance linear algebra in the presence of limited outstanding miss slots: A method and structure of increasing computational efficiency in a computer that comprises at least one processing unit, a first memory device servicing the at least one processing unit, and at least one other memory device servicing the at least one processing unit. The first memory device has a memory...

20060168402 - Data coherence system: A data coherence system includes a generation number written to a data track of a logical sub-system. The generation number is compared to a corresponding generation number in a processing device when it is initialized. If the two generations numbers are the same, the generation numbers are incremented and saved....

20060168403 - Intelligent cache management: An exemplary storage network, storage controller, and methods of operation are disclosed. In one embodiment, a method of managing cache memory in a storage controller comprises receiving, at the storage controller, a cache hint generated by an application executing on a remote processor, wherein the cache hint identifies a memory...

20060168404 - Memory control apparatus and method: A data storage control apparatus and method for reduction of traffic of an interconnect occurring in the timing of a cache miss within a CPU. The apparatus and method are realized by utilizing, as a response to the read request from the CPU, data tags DTAGs used for management of...

20060168406 - Balanced bitcell design for a multi-port register file: In a multi-port register file of a storage unit within a processor, an improved bitcell design for storing a data bit is disclosed. The bitcell comprises a first set of read bitlines having a first load and a second set of read bitlines having a second load, in which the...

20060168405 - Sharing memory among multiple information channels: Memory is shared among multiple information channels, which may be of particular use for storing streams of packets. Memory allocation information is maintained which can be used to identify the current number of memory segments (e.g., some definable amount of memory) allocated for each of the multiple channels as well...

20060168407 - Memory hub system and method having large virtual page size: A memory system and method includes a memory hub controller coupled to a plurality of memory modules through a high-speed link. Each of the memory modules includes a memory hub coupled to a plurality of memory devices. The memory hub controller issues a command to open a page in a...

20060168408 - System and method for interleaving sdram device access requests: A method and system is provided for interleaving multiple cycles streams from clients seeking SDRAM access. More particularly, a master scoreboard register is established for enabling the interleaving of many clients SDRAM access requests into a single stream optimized for maximum packing density of the different streams, thereby reducing the...

20060168409 - File folding technique: A method for reducing duplicate data of an active file system, where the data is stored on a storage device of a storage system, is disclosed. A persistent image of the active file system is generated at a first point in time. At a later time, a sequence of steps...

20060168412 - Method for controlling storage device controller, storage device controller, and program: Disclosed herein is a method for controlling a storage device controller connected to a storage device provided with a plurality of storage volumes for storing data respectively and an information processing apparatus for requesting an input/output of data so as to receive an input/output request from the information processing apparatus...

20060168411 - Method for controlling storage system, and storage control apparatus: A method for controlling a storage system including a host computer, and a first and a second storage control apparatuses each receiving a data input/output request from the host computer and executing a data input/output process for a storage device in response to the request, comprises connecting a first communication...

20060168410 - Systems and methods of merge operations of a storage subsystem: A first computer is adapted to communicate with another computer and to a redundant storage subsystem external to the first computer. The first computer comprises memory comprising state information and a processor that receives a state from another computer. The received state is indicative of whether the other computer may...

20060168414 - Memory block locking apparatus and methods: Memory block locking apparatus and methods are provided. A method of operating a memory device includes preventing programming of upper and lower bound regions of a memory array of the memory device and any regions of the memory array having addresses between addresses of the upper and lower bound regions...

20060168413 - Method for regulating access to data in at least one data storage device in a system consisting of several individual systems: The invention proposes methods and apparatuses for regulating access to data in at least one data storage device in a system comprising a plurality of individual systems (10-12), in which the individual systems (10-12) reserve themselves free data areas or address areas in the data storage device and the reserved...

20060168415 - Storage system, controlling method thereof, and virtualizing apparatus: A storage system, a controlling method thereof, and a virtual device that can secure enhanced reliability. A virtualizing apparatus for virtualizing storage areas provided by a storage apparatus to a host system consolidates the management of a data input/output limitation that is set for each storage area or for each...

20060168416 - Data processing circuit with multiplexed memory: A data processing apparatus contains several processing circuits each operating under control of its own periodic clock signal, so that the clock signals may have different frequencies and/or can be autonomous. The several processing circuits each have an output for outputting memory access requests, which remain at the output for...

20060168417 - Random access memory having low initial latency: A random access memory comprises an array of memory cells and a controller. The controller is configured to access the array of memory cells in a double data rate prefetch mode in response to a read command and in a single data rate mode after the first double data rate...

20060168418 - Simultaneous pipelined read with dual level cache for improved system performance using flash technology: A read command protocol and a method of accessing a nonvolatile memory device having an internal cache memory. A memory device configured to accept a first and second read command, outputting a first requested data while simultaneously reading a second requested data. In addition, the memory device may be configured...

20060168419 - Method for updating entries of address conversion buffers in a multi-processor computer system: A method for the updating of entries of address conversion buffers in a multi-processor computer system, wherein each processor exhibits an address conversion buffer and wherein a page-by-page virtually addressable main memory is provided. A table is provided in the main memory, into which an entry is made for each...

20060168421 - Method of providing microcontroller cache memory: A method of providing a deterministic microcontroller includes a providing a plurality of blocks of cache memories formed on the same integrated circuit as a microprocessor unit....

20060168420 - Microcontroller cache memory: A deterministic microcontroller includes a plurality of blocks of cache memories formed on the same integrated circuit as the microprocessor unit....

20060168422 - System for indicating a plug position for a memory module in a memory system: A memory system including a first and second of set of socket pads adapted for connection to memory module continuity pins. The memory system also includes a first indicator corresponding to the first set of socket pads. The memory system also includes a second indicator corresponding to the second set...

20060161719 - Virtualizing physical memory in a virtual machine system: A processor including a virtualization system of the processor with a memory virtualization support system to map a reference to guest-physical memory made by guest software executable on a virtual machine which in turn is executable on a host machine in which the processor is operable to a reference to...

20060161720 - Image data transmission method and system with dmac: Techniques for transmitting image data via the DMAC are disclosed. According to one aspect of the techniques, a DMA controller for an image data transmission system comprises a bus interface for receiving/transmitting data from/to a system bus; a request processing unit for processing a DMA request from a peripheral equipment...

20060161721 - Remote copying system with consistency guaranteed between a pair: When plural copy groups including pairs exist, remote copying for pairs belonging to copy groups is suspended selectively on a copy group-to-copy group basis, instead of suspending remote copying in all the copy groups at once. A computer system has a host computer, plural first storage systems comprising plural first...

20060161723 - Controlling operation of flash memories: A method controls write/erase operations in a memory device, such as a NAND flash memory. The method includes dividing the memory device in physical blocks, wherein each physical block is comprised of a number of pages; considering the memory device as comprising consecutive virtual blocks, each virtual block including consecutive...

20060161727 - Method and system for managing a suspend request in a flash memory: System and method for the managing of suspend requests in flash memory devices. The system includes a microcontroller performing a modify operation on a flash memory array, a memory coupled to the microcontroller and storing suspend sequence code for causing a suspension of the modify operation when executed by the...

20060161726 - Method for storing control information in flash memory devices: A flash memory system including one or more flash memory devices; the flash memory devices are partitioned into multiple units, at least a first unit and a second unit. A mechanism which allocates the units in combination as a super-unit, reserves at least a portion of a first unit field...

20060161725 - Multiple function flash memory system: A system and method for implementing a flash memory system. The flash memory system includes a processor and at least one flash memory device. The at least one flash memory device includes a plurality of partitions. As a result, the flash memory system can utilize the multiple partitions to provide...

20060161724 - Scheduling of housekeeping operations in flash memory systems: A re-programmable non-volatile memory system, such as a flash EEPROM system, having its memory cells grouped into blocks of cells that are simultaneously erasable is operated to perform memory system housekeeping operations in the foreground during execution of a host command, wherein the housekeeping operations are unrelated to execution of...

20060161728 - Scheduling of housekeeping operations in flash memory systems: A re-programmable non-volatile memory system, such as a flash EEPROM system, having its memory cells grouped into blocks of cells that are simultaneously erasable is operated to perform memory system housekeeping operations in the foreground during execution of a host command, wherein the housekeeping operations are unrelated to execution of...

20060161722 - Scratch pad block: In a memory array having a minimum unit of erase of a block, a scratch pad block is used to store data that is later written to another block. The data may be written to the scratch pad block with a low degree of parallelism and later written to another...

20060161729 - Quaternary content-addressable memory: A quaternary content-addressable memory includes multiple entries configured to match a lookup word, with each of these entries including multiple cells and with the lookup word including multiple lookup bits for matching corresponding cells of each of the entries. Each of the cells is individually configurable to be in one...

20060161730 - Apparatus, system, and method for enforcing policy controls for non-system managed tape media: An apparatus, system, and method are disclosed for enforcing policy controls for non-system managed tape media. The apparatus includes an operating system configured to communicate with a tape media drive, and an identification module configured to identify a tape media type of a tape media cartridge. The apparatus may also...

20060161731 - Updated data write method using journal log: A problem with a journaling file system is that the load on input/output processing executed between a server and a storage system is increased because a journal log is written when the file system is updated and updated data is written when flush processing is executed. In a system according...

20060161732 - Disk array apparatus and disk array apparatus control method: A journal write unit writes journal data into a third storage device. The journal data includes an identifier of a logical volume in a first storage device into which data has been written, information of a location in which the data is stored in the logical volume, update time which...

20060161733 - Host buffer queues: The preferred embodiment of present invention is directed to an improved method and system for buffering incoming/unsolicited data received by a host computer that is connected to a network such as a storage area network. Specifically, in a host computer system in which the main memory of the host server...

20060161734 - Lazy flushing of translation lookaside buffers: Address translation control (ATC) limits the mappings between virtual and physical addresses in order to implement a memory access policy. Each processor in a multi-processor system maintains a translation lookaside buffer (TLB) that caches mappings to speed translation of virtual addresses. Each processor also maintains a counter. Each time a...

20060161735 - Multithread controller and control method: A multithread control apparatus and control method to switch a plurality of threads in a multithread processor, which includes a plurality of thread processors to execute the plurality of threads, by executing a synchronization lock control by considering release of exclusive access right to a relevant thread processor when a...

20060161736 - Pre-fetch control method: A pre-fetch control method comprises the following steps. First, after a data request for M-bytes request data sent from a cache controller is received, a determination is made on whether the M-bytes request data are found in the pre-fetch buffer. Then, a further determination is made on whether a combined...

20060161737 - Concurrency technique for shared objects: In some embodiments, a Hat Trick deque requires only a single DCAS for most pushes and pops. The left and right ends do not interfere with each other until there is one or fewer items in the queue, and then a DCAS adjudicates between competing pops. By choosing a granularity...

20060161738 - Predicting contention in a processor: In one embodiment, the present invention includes a predictor to predict contention of an operation to be executed in a program. The operation may be processed based on a result of the prediction, which may be based on multiple independent predictions. In one embodiment, the operation may be optimized if...

20060161741 - Methods and apparatus for providing synchronization of shared data: A synchronization scheme is provided for a multiprocessor system. In particular, a processor includes a buffer sync controller. The buffer sync controller is operative to allow or deny access by a subprocessor to shared data in a shared memory, such that a processor seeking to write data into or read...

20060161740 - Transaction based shared data operations in a multiprocessor environment: The apparatus and method described herein are for handling shared memory accesses between multiple processors utilizing lock-free synchronization through transactional-execution. A transaction demarcated in software is speculatively executed. During execution invalidating remote accesses/requests to addresses loaded from and to be written to shared memory are track by a transaction buffer....

20060161739 - Write protection of subroutine return addresses: Exemplary methods, systems, and products are described that operate generally by moving subroutine return address protection to the processor itself, in effect proving atomic locks for subroutine return addresses stored in a stack, subject to application control. More particularly, exemplary methods, systems, and products are described that write protect subroutine...

20060161742 - Communication system and method, information processing apparatus and method, information managing apparatus and method, recording medium, and program: A communications system and method, an information processing apparatus and method, an information management apparatus and method, a recording medium and a program make it possible to efficiently and comfortably make use of contents, which are stored in one server, from a plurality of devices connected via a network. In...

20060161743 - Intelligent memory array switching logic: Techniques and circuitry that support switching operations required to exchange data between memory arrays and external data pads are provided. In a write path, such switching operations may include latching in and assembling a number of bits sequentially received over a single data pad, reordering those bits based on a...

20060161744 - Logic embedded memory having registers commonly used by macros: A semiconductor integrated circuit device includes a plurality of memory macros, macro-common register block, and memory macro operation setting circuits. The macro-common register block has macro-common registers which are provided outside the plurality of memory macros and supply memory macro operation specifying signals to the plurality of memory macros. The...

20060161745 - Methods of operating memory systems including memory devices set to different operating modes and related systems: A method of operating a memory system including a plurality of memory devices coupled to a command address bus may be provided. In particular, a first memory device of the plurality of memory devices may be set to a first operating mode, and a second memory device of the plurality...

20060161748 - Backup/recovery system and methods regarding the same: A backup/recovery system and methodology that securely backs up every data and status of a computer system. The backup/recovery system is utilized for protecting a computer system, having a volatile storage device and a nonvolatile storage device. The backup system comprises a data processing unit for processing data stored in...

20060161746 - Directory and file mirroring for migration, snapshot, and replication: A NAS switch provides mirroring in a NAS storage network that is transparent to client. A source file server exports an original NAS file handles indicative of object locations on the source file server to the NAS switch. The NAS switch modifies the original NAS file handles to an internal...

20060161747 - Distributed control system and control device thereof: A control device that is used in a distributed control system and controlling a control target while serially transmitting data to a reception side control device by a pulse train signal, wherein when the control target is normal, state quantity data representing the state quantity of the control target is...

20060161749 - Delivery of a message to a user of a portable data storage device as a condition of its use: A memory card, flash memory drive or other removable re-programmable non-volatile memory device is configured so that at least part of the memory is not available for storage of user data until data of a message stored in the memory is at least read out by the user through a...

20060161750 - Using hardware to secure areas of long term storage in ce devices: A system includes long-term storage (e.g., flash memory) for storing sensitive data and critical components of a consumer electronic (CE) device such as an operating system (OS) kernel, private cryptographic key values, security applications, and firmware configurations, for example. Security hardware/software designates and restricts access to secured portions of long-term...

20060161754 - Apparatus, system, and method for validating logical volume configuration: An apparatus, system, and method are disclosed for validating logical volume configuration. A determination module makes a determination of a type of a host operating system of a host computer requesting access to a logical volume. A characterization module characterizes the host type of the logical volume. A compatibility module...

20060161752 - Method, apparatus and program storage device for providing adaptive, attribute driven, closed-loop storage management configuration and control: A method, apparatus and program storage device for providing adaptive, attribute driven, closed-loop storage management configuration and control is disclosed. The closed loop control mechanism provides not only continuous self-tuning to the storage system, but also allows the system to perform the initial configuration better....

20060161753 - Method, apparatus and program storage device for providing automatic performance optimization of virtualized storage allocation within a virtualized storage subsystem: A volume provisioning advisor for managing storage allocation in a plurality of virtual storage subsystems is disclosed. A request for data storage and workload requirements is received from a user. Performance information for storage controllers and managed disks within a virtualization engine is received. Resource groups are defined based on...

20060161755 - Systems and methods for evaluation and re-allocation of local memory space: Systems and methods for improving the efficiency of memory usage in a computing system by periodically evaluating the usage of local memory by each of the buffers implemented in the memory and changing the allocation of the local memory to the different buffers if necessary to improve the performance of...

20060161751 - Virtual memory management infrastructure for monitoring deltas and supporting undo versioning in a paged memory system: An improved method, apparatus, and computer instructions for writing a page of data in response to receiving a request to write the page in the paged memory system. Creating a version of the page of data in response to receiving the request to write the page in the paged memory...

20060161757 - Dynamic allocation of a buffer across multiple clients in a threaded processor: A method may include distributing ranges of addresses in a memory among a first set of functions in a first pipeline. The first set of the functions in the first pipeline may operate on data using the ranges of addresses. Different ranges of addresses in the memory may be redistributed...

20060161756 - Storage system: The storage system includes a disk controller for receiving write commands from a computer, and a plurality of disk devices in which data is written in accordance with the control of the disk controller. The size of the first block which constitutes the data unit handled in the execution of...

20060161759 - Methods and apparatus for memory access within a computer system: In a first aspect, a first method is provided for accessing a main memory. The first method includes the steps of (1) receiving a real address of the main memory that includes critical bits requiring conversion to bits of a physical address to start a memory access in a node...

20060161758 - Multiple page size address translation incorporating page size prediction: Page size prediction is used to predict a page size for a page of memory being accessed by a memory access instruction such that the predicted page size can be used to access an address translation data structure. By doing so, an address translation data structure may support multiple page...

20060161760 - Multiple contexts for efficient use of translation lookaside buffer: The present invention provides a method and apparatus for increased efficiency for translation lookaside buffers by collapsing redundant translation table entries into a single translation table entry (TTE). In the present invention, each thread of a multithreaded processor is provided with multiple context registers. Each of these context registers is...

20060161761 - Systems and methods for validating executable file integrity using partial image hashes: Systems and methods for validating integrity of an executable file are described. In one aspect, multiple partial image hashes are generated, the combination of which represent a digest of an entire executable file. Subsequent to loading the executable file on a computing device, a request to page a portion of...

20060155909 - Methods relating to configuration of software: A method relating to configuration of software includes receiving a request sent from a sender computer system to a recipient computer system. The sender computer system including software that has an unsuccessful configuration. The sender computer system is requesting the recipient computer system to provide a new configuration for the...

20060155911 - Extended register microprocessor: An extended register processor includes a register file having a legacy register set and an extended register set. The extended register set includes a plurality of extended registers accessible only to extended register instructions. The processor maps extended register references to physical extended registers at run time. The processor includes...

20060155910 - Sonet data byte switch: A switch system including a plurality of input ports and a plurality of output ports for transferring data from one of the input ports to one of the output ports, and a plurality of memory devices is disclosed. The memory devices include a first memory bank configured for data being...

20060155912 - Server cluster having a virtual server: An architecture and method of operation of a server cluster is disclosed in which a virtual standby node is established for each active node of the server cluster. The virtual nodes are each housed in singly physical server. The standby cluster also includes a monitoring module for monitoring the operational...

20060155915 - Database query processor: Disclosed is an associative content or memory processor for wirespeed query of routing, security string or multi-dimensional lookup tables or databases, which enables high utilization of memory resources and fast updates. The device can operate as binary or ternary CAM (content addressable memory). The device applies parallel processing with spatial...

20060155914 - Highly portable media device: An improved portable media device and methods for operating a media device are disclosed. According to one aspect, the portable media device can also function as a solid-state drive for data storage. The form factor of the portable media device can be hand-held or smaller, such that it is highly...

20060155913 - Sim reader/writer and mobile phone: A SIM reader/writer 1 can be removably loaded with a SIM 2. The SIM reader/writer 1 has a case 1a, a controlling IC chip 3 placed in the case 1a, a USB/ISO7816 conversion IC chip 10, and an coil antenna 11a for noncontact communication placed in the case 1a. The...

20060155923 - Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices: In one embodiment of the present invention, a memory storage system for storing information organized in sectors within a nonvolatile memory bank is disclosed. The memory bank is defined by sector storage locations spanning across one or more rows of a nonvolatile memory device, each the sector including a user...

20060155918 - Method of controlling a semiconductor memory device applied to a memory card: Plural second logic blocks are set to a first logic block, and when data is written to the second logic block, write waiting is given using an address next to the address of the current second logic block. In order to protect data of the written second logic block, the...

20060155919 - Method of managing a multi-bit cell flash memory with improved reliability and performance: A method of storing data by providing a flash memory device including a plurality of memory cells; each of the memory cells is capable of storing data bits. First data bits are stored into memory cells used for storing M bits per cell, the memory cells are allocated to a...

20060155922 - Non-volatile memory and method with improved indexing for scratch pad and update blocks: Update data to a non-volatile memory may be recorded in at least two interleaving streams such as either into an update block or a scratch pad block depending on a predetermined condition. The scratch pad block is used to buffered update data that are ultimately destined for the update block....

20060155921 - Non-volatile memory and method with multi-stream update tracking: Update data to a non-volatile memory may be recorded in at least two interleaving streams such as either into an update block or a scratch pad block depending on a predetermined condition. The scratch pad block is used to buffered update data that are ultimately destined for the update block....

20060155920 - Non-volatile memory and method with multi-stream updating: In a memory that is programmable page by page and each page having multiple sectors that are once-programmable, even if successive writes are sequential, the data recorded to an update block may be fragmented and non-sequential. Instead of recording update data to an update block, the data is being recorded...

20060155917 - Optimizing write/erase operations in memory devices: A method controls write/erase operations in a memory device including memory blocks that are exposed to wear as a result of repeated erasures. The method includes: storing the erase counts of the memory blocks, creating a chain storing the erase counts of the memory blocks that are available for writing...

20060155916 - Writing uncorrupted data to electronic memory: A write mode for programming selected memory locations of an electronic module with data includes writing data to be programmed into memory into first, second and third data blocks, and a checksum corresponding to data block. A read mode for reading and using data located in memory locations includes reading...

20060155925 - Data access in a processor: A data processor comprising: a register memory comprising an array of memory cells extending in two dimensions, the cells being located on rows in the first dimension and columns in the second dimension, each cell being addressable by means of an instruction specifying a pair of coordinates that identify the...

20060155924 - Hardware stack having entries with a data portion and associated counter: According to some embodiments, determining a new value to be pushed onto a hardware stack having n entries is determined. Each entry in the stack may include a data portion and an associated counter. If the new value equals the data portion of the entry associated with a current top...

20060155926 - Efficient content addressable memory array for classless inter-domain routing: An efficient Content Addressable Memory array for Classless Inter-Domain Routing with each CAM cell including an additional storage unit for storing the prefix length associated with the contents of the cell. An enabling logic connects the prefix length value to a wired OR plane common to all CAM cells, and...

20060155927 - Single memory with multiple shift register functionality: The present invention relates to a memory device comprising a memory (EM) having at least two predetermined register memory sections addressable by respective address ranges AS1-ASz) and at least one access port (P1-PZ) for providing access to said memory (EM). Furthermore, access control means (A) are provided for addressing said...

20060155928 - Apparatus and method for managing a plurality of kinds of storage devices: A storage system including a memory unit having a disk management program, plural disk controllers each having a SAS port which can be attached to either a SAS disk drive or a SATA disk drive, and a LAN port which communicates with a user interface program in a management console....

20060155929 - Storage medium with reserved area for file system data and application start-up data: According to a first aspect of the invention, data that will be needed for starting the applications of the storage medium are stored in a reserved area of the storage medium. The data stored in the reserved area are read and cached in a single operation when the storage medium...

20060155930 - System and methods for an overlay disk and cache using portable flash memory: A lifting and shaping system for a bra is disclosed. The system uses lift platforms shaped to fit into the cups of the bra and formed from thin material such as plastic. The lift platforms are attached to the bra toward the center of the bra. Connectors having one end...

20060155931 - System and methods for an overlay disk and cache using portable flash memory: A system is provided for reading and writing sectors which may be realized as either a disk device to the local operating system, or as a virtual disk device to a virtual machine. A user's computing environment is stored in the network in the form of a disk image, which...

20060155932 - Method and apparatus for an efficient multi-path trace cache design: A novel trace cache design and organization to efficiently store and retrieve multi-path traces. A goal is to design a trace cache, which is capable of storing multi-path traces without significant duplication in the traces. Furthermore, the effective access latency of these traces is reduced....

20060155933 - Cost-conscious pre-emptive cache line displacement and relocation mechanisms: A hardware based method for determining when to migrate cache lines to the cache bank closest to the requesting processor to avoid remote access penalty for future requests. In a preferred embodiment, decay counters are enhanced and used in determining the cost of retaining a line as opposed to replacing...

20060155934 - System and method for reducing unnecessary cache operations: A system and method for cache management in a data processing system. The data processing system includes a processor and a memory hierarchy. The memory hierarchy includes at least an upper memory cache, at least a lower memory cache, and a write-back data structure. In response to replacing data from...

20060155935 - System and method for maintaining cache coherency in a shared memory system: A data processing system having shared memory accessible through a transaction-based bus mechanism. A plurality of system components, including a central processor, are coupled to the bus mechanism. The bus mechanism includes a cache coherency transaction within its transaction set. The cache coherency transaction comprises a request issued by one...

20060155936 - Efficient memory update process for on-the-fly instruction translation for well behaved applications executing on a weakly-ordered processor: A multiprocessor data processing system (MDPS) with a weakly-ordered architecture providing processing logic for substantially eliminating issuing sync instructions after every store instruction of a well-behaved application. Instructions of a well-behaved application are translated and executed by a weakly-ordered processor. The processing logic includes a lock address tracking utility (LATU),...

20060155937 - System for selectively enabling data tables: A method of selectively enabling data tables includes accessing data from a first data table, downloading a second data table, upon reaching a predetermined criteria, comparing corresponding data from the first and second data tables each time data is accessed from the first data table, prompting a user to accept...

20060155938 - Shared-memory switch fabric architecture: A shared memory is described having a plurality of receive ports and a plurality of transmit ports characterized by a first data rate. A memory includes a plurality of memory banks organized in rows and columns. Operation of the memory array is characterized by a second data rate. Non-blocking receive...

20060155939 - Data processing system and method: An access control attribute that can be established for an extent that is provided in a storage device may be any access control attribute signifying write permission, read permission, and write prohibition, but an access control attribute signifying read prohibition is not supported. In cases where a read request for...

20060155940 - Multi-queue fifo memory systems that utilize read chip select and device identification codes to control one-at-a-time bus access between selected fifo memory chips: Multi-Q FIFO memory systems include a plurality of multi-Q first-in first-out (FIFO) memory chips electrically coupled to a data output bus. The plurality of multi-Q FIFO memory chips, which are responsive to respective identification codes ID and respective read chip select signals (/RCS), are configured to support an enhanced multi-chip...

20060155941 - Program rewriting system, boot loader, storage medium, and electronic control unit: A system is communicably coupled to an external device at least when rewriting, at least in a module, a first application program stored in a first memory of the system into a second application program stored in the external device. In the system, a receiving unit is configured to receive...

20060155942 - Storage control subsystem for managing logical volumes: The present invention provides a storage control subsystem that facilitates logical volume access management by a host. Before copying, the host instructs a disk array device to identify the states of target logical volumes and collect information in control memory, whereupon the disk array device reads information in the control...

20060155943 - Methods and apparatus for managing deletion of data: One embodiment is directed to the deletion of content units from a storage system. When a content unit is deleted, a reflection may be created and stored on the storage system. The reflection identifies the deleted content unit and may include additional information, such as a portion of the content...

20060155944 - System and method for data migration and shredding: Migration techniques are described for moving data within a storage system from a source to a target location. After movement of the data from the source, the data is shredded by being overwritten with a predetermined pattern and the source location is designated as being made available for future data...

20060155946 - Method for taking snapshots of data: A method for taking snapshots of data. In an embodiment, a first map data structure is obtained that records locations for a plurality of data blocks. A second map data structure is formed that is initially empty of locations, the second map data structure representing the snapshot after the snapshot...

20060155945 - System, method, and computer program product for multi-master replication conflict resolution: A method, computer program product, and a data processing system for performing data replication in a multi-mastered system is provided. A first data processing system receives a replication command generated by a second data processing system. A conflict is identified between a first entry maintained by the first data processing...

20060155947 - Selectable block protection for non-volatile memory: A semiconductor non-volatile memory device, particularly a flash memory array, having a chip configuration with a plurality of pins including a write protect pin, a serial in pin and an optional parallel data bus with input-output pins (I/O7-0), plus other pins, all electrically communicating with the memory array and particularly...

20060155948 - Semiconductor memory system and method for data transmission: A semiconductor memory system is proposed, in which the transmission of memory data of a burst that follows command/address data of a write/read command is identified by means of a modified clock signal. The modified clock signal has identifying regions with masked-out clock edges, so that the transmission of memory...

20060155949 - Method and apparatus for allocating memory: In an embodiment of the present invention there is a method of allocating memory for a computer process, comprising the steps of determining a memory allocation pattern for the computer process, and determining a memory allocation algorithm based on the memory allocation pattern, whereby to facilitate allocation of memory for...

20060155950 - Data migration with reduced contention and increased speed: Methods and apparatus are provided for managing data in a hierarchal storage subsystem. A plurality of volumes is designated as a storage group for Level 0 storage; a high threshold is established for the storage group; space is allocated for a data set to a volume of the storage group,...

20060155951 - Computer system, storage and storage utilization and monitoring method: A computer system includes a plurality of computers and at least one storage connected to the plurality of computers. The storage includes a device that obtains information concerning areas within the storage that are used by the respective plurality of computers, a device that obtains information concerning a capacity within...

20060155952 - Memory management system and method using a hash table: A memory management system and method includes, in one embodiment, an index location in a hash table that represents metadata, and a file memory address saved at the index location so that the hash table is searchable by a processor by entering the metadata into a hash function to transform...

20060155953 - Method and apparatus for accessing multiple vector elements in parallel: Vector processing is a suitable technique for processing applications that have large computational demands. Vector processors provide high-level operations that work on vectors, i.e. linear arrays of numbers. Vector operations can be made faster than a sequence of scalar operations on the same number or data items. Typical applications where...

20060149887 - External ram module: An external random access memory (RAM) module for increasing the RAM capacity of a computer system. The RAM module includes: a plurality of RAM slots for receiving removable memory modules; a memory addressing unit for addressing the removable memory modules in the external RAM module; and a connector for connecting...

20060149888 - Method and apparatus for extending memory addressing: Techniques for extending memory addressing with more accessing range are disclosed. According to one aspect of the techniques, an apparatus for extending addressing space comprises a plurality of extended memories, each being allocated an unique identifier, a direct addressing memory reserving a data cell as a public identifier cell for...

20060149889 - Method and system for backup data access through standard network file sharing protocols: Back-Up (B/U) data is made immediately available to users on a networked client-server system by standard file sharing protocol methods using the user accessible Back-Up and Restore (B/U/R) process of the present invention. Implementations of the invention first extract file data and file meta-data from user files during a B/U...

20060149892 - Adaptive disk layout techniques and tools: In one aspect, in response to each of plural page faults, a copy of a requested virtual memory page is written to a sorted set of pages in the read order of the sorted pages. A copy of a modified or new data page also can be written to the...

20060149893 - Data storage management for flash memory devices: Logical units of allocation may be designated as overhead and unallocated and made unavailable for use. During one or more write operations, when one or more logical unit is invalidated, one or more of the unallocated overhead logical units may be designated as available for use and one or more...

20060149897 - Flash memory programming: The various embodiments provide for programming floating-gate, or flash, memory devices by writing a block of data words to a volatile storage media from an external processor and programming the block of words to the nonvolatile flash memory cells from the volatile storage media without the need for further input...

20060149895 - Flash memory with integrated male and female connectors and wireless capability: A handheld, portable flash memory drive includes a flash memory chip, a controller for controlling the transfer of data to or from the flash memory chip, and a wireless communication chip for establishing a direct radio communication link with another flash memory drive for radio transmitting data from the flash...

20060149896 - Maintaining an average erase count in a non-volatile storage system: Methods and apparatus for maintaining an average erase count in a system memory of a non-volatile memory system are disclosed. According to one aspect of the present invention, a method for determining an average number of times each block of a number of blocks within a non-volatile memory of a...

20060149894 - Method of downloading main code to flash memory: A method of downloading a main code to a flash memory is provided. The method includes: comparing the size of the buffer with the size of the flash memory and determining a number of stages or segments in which the main code is to be downloaded to the flash memory...

20060149890 - On-chip data grouping and alignment: The invention describes the method for regrouping data read from multi-sector pages inside a memory chip. As a result, garbage collection operation time greatly reduces and overall system performance increases. Architectural features include the ability to selectively transfer individual data sectors of a page between on-chip registers and the ability...

20060149891 - Relocated reclaim block: In a memory, a reclaim block is relocated. Memory management may employ an algorithm to determine how to determine which of multiple blocks to use as a reclaim block. The block selected as the reclaim block may be used as the reclaim block for a number of write cycles, program...

20060149898 - Apparatus, system, and method for optimizing recall of logical volumes in a virtual tape server: An apparatus, system, and method are disclosed for recalling a logical volume from a mountable media for use in a virtual tape server. The apparatus includes a receiving module, a queuing module, and an optimizer module. The receiving module receives recall requests for logical volumes stored in a mountable media...

20060149899 - Method and apparatus for ongoing block storage device management: Methods and apparatus for performing ongoing block storage device management operations. Software and/or firmware components are disclosed for performing ongoing block storage device management operations, such as file defragmentation and file erasures, in conjunction with corresponding block input/output (I/O) transactions for block storage devices, such as magnetic disk drives and...

20060149901 - Information processing system, primary storage device, and computer readable recording medium recorded thereon logical volume restoring program: In a hierarchical storage system, a primary storage device interposed between a secondary storage device and a data processing apparatus has a restoring unit. When at least two current storage units, which configure a logical volume and are in the mirroring relationship, concurrently fail, the restoring unit reads out data...

20060149900 - Intelligent hotspare or \"smartspare\" drive with pre-emptive drive rebuild: An intelligent hotspare drive with pre-emptive drive rebuild is disclosed. In accordance with one embodiment of the present disclosure, a method for rebuilding a drive using an intelligent hotspare drive in an information handling system including detecting an error in a first drive in an information handling system such that...

20060149902 - Apparatus and method for storing data in nonvolatile cache memory considering update ratio: An apparatus and method for storing data in a nonvolatile cache memory considering an update ratio are provided. The apparatus includes a nonvolatile mass storage unit, a nonvolatile cache unit, and a memory controller for controlling the nonvolatile mass storage unit and the nonvolatile cache unit, and selectively storing the...

20060149903 - Fault tolerant computer system and a synchronization method for the same: Each time a sync controller sequentially issues a read request to a memory controller, a count value of a first counter is incremented. When a read operation is conducted for the read request, a count value of a second counter is incremented and the data is transferred to a standby...

20060149904 - Prefetching hints: A processor capable of executing prefetching instructions containing hint fields is provided. The hint fields contain a first portion which enables the selection of a destination indicator for refill operations, and a second portion which identifies a destination....

20060149905 - Service system for providing context information based on ubiquitous sensor network and method thereof: Provided is a service system for providing context information based on a ubiquitous sensor network and a method thereof. The context information providing service system includes: a sensing block for collecting context information of each user; an intermediating block for changing the user context information transmitted from the sensing block...

20060149906 - Method and apparatus for inter partition communication within a logical partitioned data processing system: A method and structure for inter partition communication within a logical partitioned data processing system are provided. Each partition is configured for an inter partition communication area (IPCA) allocated from partition's own system memory. Each partition's IPCA combined together forms a non-contiguous block of memory which is treated as a...

20060149907 - System and method for using virtual memory for redirecting auxilliary memory operations: A method for using virtual memory for redirecting auxiliary memory operations redirects the auxiliary memory write operations of a process to a buffer after capturing the state of the auxiliary memory at various times during the method in three buffers. After the write operations have ended, the auxiliary memory is...

20060149908 - Method of providing a sport mode of a portable electronic device: The present invention relates to a method of providing a sport mode of a portably electronic device having a hard disk and a memory device. The method includes: (A) determining whether the portably electronic device switches to the sport mode; (B) switching to the sport mode and downloading at least...

20060149909 - Method and apparatus for backup and recovery system using storage based journaling: A storage system maintains a journal of journal entries and at lease one snapshot of one or more data volumes. By assigning a unique sequence number to journal and snapshot, it is easy to find a journal which can be applied to the snapshot. A technique is described for detecting...

20060149910 - Apparatus and method for reproducing multimedia data using the virtual file system: An apparatus and a method that creates a virtual file system by combining directory information of data recorded on an information storage medium and directory information of data downloaded from a network and reproducing multimedia data with reference to the virtual file system. The reproducing apparatus includes: a local storage...

20060149911 - Data processing apparatus having memory protection unit: A data processor (100) has a memory operable to store data values; a memory protection unit (130) operable to associate memory attributes with portions of said memory and to identify a plurality of memory regions corresponding to respective address ranges of said memory. The memory protection unit is operable to...

20060149912 - Methods of operating integrated circuit memory devices: Methods of operating an integrated circuit memory device include providing a first address and a first command to the memory device and executing the first command within the memory device. This step of executing the first command is performed concurrently with providing at least one of a second address and...

20060149913 - Reducing memory fragmentation: Reducing memory fragmentation. Memory is allocated during a preboot phase of a computer system, wherein the memory is allocated based on a plurality of memory types. Fragmentation of memory is determined, wherein a fragment includes a contiguous block of memory of the same type. At least a portion of memory...

20060149915 - Memory management technique: Methods for allocating memory by a memory manager for an application are provided. The method may include the steps of allocating a first block size for a first amount of data, and allocating a second block size for memory allocated after the first amount of data. In some variations, the...

20060149914 - Systems and methods for allocating data structures to memories: Systems and methods allocate data structures to memories coupled to a processor. The allocation may be based on system aspects such as memory size constraints, bandwidth constraints, and memory latency. Further aspects that may be included in the allocation decision are minimization of wasted bandwidth and task priorities. A constraint...

20060149916 - Method and apparatus for block-oriented memory management provided in smart card controllers: A method for memory management in smart card controllers by writing of data into a data space in a persistent memory is described. In order to save memory space the persistent memory is split into blocks with fixed data length having logical block numbers; whereby the size of blocks is...

20060149917 - Secure memory controller: A memory controller partitions memory into secure partitions and non-secure partitions....

20060149918 - Memory with modifiable address map: A memory device includes a flag register to modify the address map of the memory device based on the state of an input node on the memory device....

20060149919 - Method, system, and program for addressing pages of memory by an i/o device: Provided are a method, system, and program for translating virtual addresses of memory locations within pages of different sizes. In one embodiment, a translation entry containing a physical address is stored in a data structure table for each page. Each virtual address includes a page virtual address which identifies the...