FREE patent keyword monitoring and additional FREE benefits. /images/triangleright (1K) REGISTER now for FREE triangleleft (1K)
Fresh Patents freshpatentsnav7_icons (5K)
browse patent apps by agents browse patent apps by inventors browse patent apps by industry browse patents by location monitor patent applications
    




USPTO Class 711  |  Browse by Industry: Previous - Next | All     monitor keywords
06/2006 | Recent  |  09: Oct | Sept | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan |  | 08: Dec | Nov | Oct | Sp | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan |  | 07: Dec  | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan |  | 06: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | 

Electrical computers and digital processing systems: memory inventions 06/06

Recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing format for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.    06/29/2006 > 69 patent applications in 29 patent subcategories.

20060143360 - Distributed cache architecture: Methods for a treatment of cached objects are described. In one embodiment, an object, associated with an object key, is stored in a first local memory cache associated with a first virtual machine within a first computing system. The object is also stored in a serialized format to a database....

20060143359 - Virtual machine monitoring: A system and method for monitoring internal operation of a virtual machine (“VM”). The VM is operated to interpret and execute a program. During operation of the VM, status information regarding internal operation of the VM is stored to an internal memory buffer. The status information is subsequently extracted from...

20060143362 - Apparatus and method for incremental package deployment: A method and apparatus for incremental package deployment are described. In one embodiment, the method includes the redirection of disk input/output (I/O) requests to preserve contents of disk memory. Following redirection of the disk I/O request, a software distribution package is created according to disk I/O write requests redirected to...

20060143364 - Computer network storage environment hostile to fault-intolerant electronic file types: A method and system for operating a network server to discourage inappropriate use are disclosed. The method provides for altering files on the server in such a way so as essentially not affect acceptable, desired file types in any noticeable way, and to substantially corrupt undesirable file types. The method...

20060143363 - Module interface handler for controller area network (can) communication module: A CAN communication module (10) comprises a message RAM (16), a status and control register set (18, 20), a CAN bus interface, a module interface for communication with a central processing unit (CPU) in a connected device and a CAN message handler (14). The module interface includes a dedicated module...

20060143361 - Synchronizing multiple threads efficiently: In one embodiment, the present invention includes a method of assigning a location within a shared variable for each of multiple threads and writing a value to a corresponding location to indicate that the corresponding thread has reached a barrier. In such manner, when all the threads have reached the...

20060143366 - Apparatus and system having in-system-programming function: An apparatus and a system having in-system-programming function are disclosed. The apparatus comprises a non-volatile memory, a controller and a serial interface unit. When the non-volatile memory is to be programmed, the controller will actively catch the program data from an external device via the serial interface unit and save...

20060143365 - Memory device, memory managing method and program: Disclosed is a memory device which is not easily deteriorated and a memory managing method which does not easily deteriorate a memory device. A physical address is given to a memory area of a flash memory (11) page by page. When supplied with to-bewritten data and a logical address where...

20060143368 - Method for using a multi-bit cell flash device in a system not designed for the device: A computerized system including: a processor; and a flash memory device including memory cells grouped into blocks, wherein one or more of the blocks stores in M bits per cell an initialization program, e.g boot code, which is retrieved and executed by the processor; and wherein the processor accesses one...

20060143367 - Non-volatile memory lock: In some embodiments access to a non-volatile memory is controlled. If a received code matches an unlock code, write access to the non-volatile memory is allowed. If the received code does not match the unlock code, write access to the non-volatile memory is not allowed. Other embodiments are described and...

20060143369 - Nonvolatile memory and card reader provided with the same: A nonvolatile memory may include a plurality of blocks as a unit for performing writing and erasing of data which is stored in the respective blocks. The block may include a write data area in which data is written and stored, a correlative code area in which a correlative code...

20060143370 - Nonvolatile memory and memory card: The present invention provides a nonvolatile memory having a plurality of memory banks having a plurality of erasable and programmable nonvolatile memory cells and capable of memory operation independently respectively. The nonvolatile memory is capable of sequentially receiving write data and a write start command by the number of write...

20060143372 - Directed auto-refresh synchronization: In a directed auto-refresh (DARF) mode, refresh commands are issued by a controller, and refresh row and bank addresses are maintained internally to a memory module. A bank address counter internal to the memory is initialized to a first predetermined value upon entering DARF mode. The memory refreshes the currently...

20060143371 - Integrated memory management apparatus, systems, and methods: Apparatus and systems, as well as methods and articles, may perform operations including memory bank management and memory bus arbitration associated with a first memory module comprising non-refreshable memory cells and a controller, a second memory module coupled to the first memory module by a memory management control bus, or...

20060143375 - Content addressable memory with shared comparison logic: Techniques for sharing comparison logic in content addressable memories are disclosed. In one embodiment, a content addressable memory includes a first entry location and a second entry location. The first entry location includes a first plurality of cells and first comparison logic. The second entry location includes a second plurality...

20060143374 - Pipelined look-up in a content addressable memory: A pipelined look-up in a content addressable memory disclosed. In one embodiment, a content addressable memory includes a first cell and a second cell. The first cell is to compare a first bit of look-up data to a first bit of stored data. The second cell is to compare a...

20060143373 - Processor having content addressable memory for block-based queue structures: Queuing command information is stored in a content addressable memory (CAM) where a queuing command for a first queue is received, the CAM is examined to determine if commands for the first queue are present, and if commands for the first queue were found to be present, information is stored...

20060143376 - Tape emulating disk based storage system and method: A data protection and storage system includes an array of disk drives for data storage. Data is received for storage on the disk drive via an interface that is configured to emulate a tape drive interface. A virtual tape data structure is created and stored on the disk drives....

20060143378 - Information processing apparatus and control method for this information processing apparatus: An information processing apparatus includes a obtaining circuit to obtain control information necessary for an operation requested through a communication with the external device upon the occurrence of one of requests to write the information to the first recording medium and to read the information from the first recording medium...

20060143377 - Magnetic disk drive and method for controlling write operation: Embodiments of the invention reduce the time required to execute an erase command received from the host device and thereby reduce the time that the interface bus to the host device must spend for the command. In one embodiment, a host issues an erase command. Upon receiving the command, a...

20060143380 - Dynamically upgradeable fault-tolerant storage system permitting variously sized storage devices and method: A dynamically upgradeable fault-tolerant storage system permits a storage device to be replaced with a larger storage device. Data stored redundantly across multiple storage devices is reproduced on the replacement device, and the additional storage space on the replacement device is made available for redundantly storing additional data....

20060143379 - I/o performance in raid subsystem: adaptive maximum request size for ld: Disclosed is an adaptive maximum request size process to change the maximum request size for a RAID system in order to reflect the highest possible maximum request size permitted by the RAID type and the physical drives included in the RAID system. The maximum request size is a primary limiting...

20060143381 - System and method for accessing an offline storage unit through an online storage unit: By the same method as that of making data access to a data storage area in an online state, it is performed to access a data storage area other than the data storage area. A plurality of logical volumes carried by a disk array apparatus includes an online volume that...

20060143383 - Method, system and circuit for efficiently managing a cache storage device: A system, method and circuit for efficiently managing a cache storage device. A cache storage device may include a cache management module. The cache management module may be adapted to generate a management unit and to associate the management unit with new data that is to be written into the...

20060143382 - Reducing power consumption in a sequential cache: In one embodiment, the present invention includes a cache memory, which may be a sequential cache, having multiple banks. Each of the banks includes a data array, a decoder coupled to the data array to select a set of the data array, and a sense amplifier. Only a bank to...

20060143391 - Computer device: A computer device having a plurality of system components which access a common memory. For memory access, a common buffer store is provided which increases access and can be matched to the memory....

20060143390 - Fair sharing of a cache in a multi-core/multi-threaded processor by dynamically partitioning of the cache: An apparatus and method for fairly accessing a shared cache with multiple resources, such as multiple cores, multiple threads, or both are herein described. A resource within a microprocessor sharing access to a cache is assigned a static portion of the cache and a dynamic portion. The resource is blocked...

20060143386 - Grouping and group operations: Methods for a treatment of cached objects are described. In one embodiment, management of a region of a cache is configured with an eviction policy plug-in and a storage plug-in. The eviction policy plug-in includes code to evict an object that is cached in the region of cache. The storage...

20060143389 - Main concept for common cache management: A system and method of common cache management. Plural VMs each have a cache infrastructure component used by one or more additional components within each VM. An external cache is provided and shared by the components of each of the VMs. In one embodiment, a shared external memory is provided...

20060143388 - Programming models for eviction policies: Methods for a treatment of cached objects are described. In one embodiment, management of a region of a cache is configured with an eviction policy plug-in. The eviction policy plug-in includes an eviction timing component and a sorting component, with the eviction timing component including code to implement an eviction...

20060143387 - Programming models for storage plug-ins: Methods for a treatment of cached objects are described. In one embodiment, management of a region of a cache is configured with an eviction policy plug-in and a storage plug-in. The eviction policy plug-in includes code to evict an object that is cached in the region of cache. The storage...

20060143385 - Storage plug-in based on shared closures: Methods for a treatment of cached objects are described. In one embodiment, a first shared closure for a first application is cached into a shared memory with a first virtual machine that is executed on a CPU. A second shared closure for a second application is cached into the shared...

20060143384 - System and method for non-uniform cache in a multi-core processor: A system and method for the design and operation of a distributed shared cache in a multi-core processor is disclosed. In one embodiment, the shared cache may be distributed among multiple cache molecules. Each of the cache molecules may be closest, in terms of access latency time, to one of...

20060143392 - First in first out eviction implementation: Methods for a treatment of cached objects are described. In one embodiment, management of a region of a cache is configured with an eviction policy plug-in. The eviction policy plug-in includes an eviction timing component and a sorting component, with the eviction timing component including code to implement an eviction...

20060143393 - Least frequently used eviction implementation: Methods for a treatment of cached objects are described. In one embodiment, management of a region of a cache is configured with an eviction policy plug-in. The eviction policy plug-in includes an eviction timing component and a sorting component, with the eviction timing component including code to implement an eviction...

20060143395 - Method and apparatus for managing a cache memory in a mass-storage system: In accordance with some embodiments of the present invention, there is provided a cache management module for managing a cache memory device, comprising a groups management module adapted to define groups of allocation units in accordance with at least an operative criterion and to create a new group of allocation...

20060143394 - Size based eviction implementation: Methods for a treatment of cached objects are described. In one embodiment, management of a region of a cache is configured with an eviction policy plug-in. The eviction policy plug-in includes an eviction timing component and a sorting component, with the eviction timing component including code to implement an eviction...

20060143396 - Method for programmer-controlled cache line eviction policy: A method and apparatus to enable programmatic control of cache line eviction policies. A mechanism is provided that enables programmers to mark portions of code with different cache priority levels based on anticipated or measured access patterns for those code portions. Corresponding cues to assist in effecting the cache eviction...

20060143397 - Dirty line hint array for cache flushing: Techniques for using a dirty line hint array when flushing a cache are disclosed. In one embodiment, an apparatus includes a number of hint bits. Each hint bit corresponds to a number of cache lines, and indicates whether at least one of those cache lines is dirty....

20060143399 - Least recently used eviction implementation: Methods for a treatment of cached objects are described. In one embodiment, management of a region of a cache is configured with an eviction policy plug-in. The eviction policy plug-in includes an eviction timing component and a sorting component, with the eviction timing component including code to implement an eviction...

20060143398 - Method and apparatus for least recently used (lru) software cache: A data cache has a number of rows. A corresponding list of the rows is maintained, the list including a number of entries, each entry corresponding to a row and including a key uniquely identifying the row, and a count indicating an age of the row. Updating the cache involves...

20060143400 - Replacement in non-uniform access cache structure: An embodiment of the present invention is a technique to perform replacement in a non-uniform access cache structure. A cache memory stores data and associated tags in a non-uniform access manner. The cache memory has a plurality of memory banks arranged according to a distance hierarchy with respect to one...

20060143401 - Method and apparatus for prefetching based on cache fill buffer hits: An apparatus and method for prefetching based on fill buffer hits is disclosed. In one embodiment, a processor includes a cache fill buffer and a prefetcher. The cache fill buffer has a number of fill buffer entry locations. Each load entry location is to store a load entry, including an...

20060143405 - Data processing device: A data processor has a central processing unit and a plurality of logical blocks (1104) to be connected to the central processing unit, and the central processing unit sets a predetermined logical block to be a control object based on a result of decode of a predetermined instruction code (CBP)...

20060143403 - Early coherency indication for return data in shared memory architecture: In a shared memory architecture, early coherency indication is used to notify a communications interface, prior to the data for a memory request is returned, and prior to updating a coherency directory in response to the memory request, that the return data can be used by the communications interface when...

20060143402 - Mechanism for processing uncacheable streaming data: In one embodiment, a buffer is presented. The buffer comprises a type designator to designate that the buffer is a streaming read buffer, and a plurality of use designators to indicate whether data within the buffer has been used. The data within the buffer is an uncacheable memory type, such...

20060143404 - System and method for cache coherency in a cache with different cache location lengths: A system and method for the design and operation of a cache system with differing cache location lengths in level one caches is disclosed. In one embodiment, each level one cache may include groups of cache locations of differing length, capable of holding portions of a level two cache line....

20060143407 - Methods and structure for improved storage system performance with write-back caching for disk drives: Methods and associated structures for utilizing write-back cache management modes for local cache memory of disk drives coupled to a storage controller while maintaining data integrity of the data transferred to the local cache memories of affected disk drives. In one aspect hereof, a state machine model of managing cache...

20060143406 - Predictive early write-back of owned cache blocks in a shared memory computer system: A method for predicting early write back of owned cache blocks in a shared memory computer system. This invention enables the system to predict which written blocks may be more likely to be requested by another CPU and the owning CPU will write those blocks back to memory as soon...

20060143408 - Efficient usage of last level caches in a mcmp system using application level configuration: This disclosure presents an architectural mechanism which allows a caching bridge to efficiently store data either inclusively or exclusively based upon information configured by an application. An INC bit is set for each access to a page table that indicates whether the data is shared or not shared by a...

20060143409 - Method and apparatus for providing a low power mode for a processor while maintaining snoop throughput: A method and apparatus for providing a low power mode for a processor while maintaining snoop throughput are disclosed. In one embodiment, an apparatus includes a cache, a processor, and a frequency controller. The frequency controller is to operate the apparatus in a low power mode in which the operating...

20060143410 - Method and related apparatus for realizing two-port synchronous memory device: Method and related apparatus for realizing a two-port synchronous memory device with a single-port memory. Clock-triggered two-port synchronous memory device can synchronously receive reading and writing commands within a clock period to simultaneous execute these two commands, while a single port memory must execute a single reading and writing command...

20060143411 - Techniques to manage partition physical memory: System, method and apparatus to partition physical memory for a device are described....

20060143414 - Method and apparatus for increasing an amount of memory on demand when monitoring remote mirroring performance: A method and storage system for increasing an amount of memory in a queuing area on. The storage system includes first and second storage subsystems connected to each other via a path. A primary volume in the first storage subsystem and a remote secondary volume in the second storage subsystem...

20060143412 - Snapshot copy facility maintaining read performance and write performance: To make a snapshot copy of a production dataset concurrent with read/write access, a record is kept of the blocks in the production dataset that have been written to since the point-in-time of the snapshot. The first write to each data block is done as a “fast write” to a...

20060143413 - Storage system with multiple copy targeting and disk failure protection: A method and apparatus is disclosed in which a storage controller cooperable with a host and a plurality of controlled storage is provided to localize an impact of a failure to a target disk in an affected segment. The storage controller includes a host write component to write a data...

20060143415 - Managing shared memory access: Managing access to shared memory by a plurality of access entities includes storing a first identifier in a first storage location, the first identifier identifying a data structure in the shared memory; storing a second identifier in a second storage location associated with the first storage location, the second identifier...

20060143416 - Multiprocessor system with high-speed exclusive control: A multiprocessor system includes a plurality of processors, a shared bus coupled to the plurality of processors, a resource coupled to the shared bus and shared by the plurality of processors, and an exclusive control unit coupled to the plurality of processors and configured to include a lock flag indicative...

20060143417 - Mechanism for restricting access of critical disk blocks: According to one embodiment, an apparatus is presented. The apparatus includes a storage device, a hypervisor, a plurality of partitions mapped by the hypervisor, and a key created by the hypervisor to prevent one of the plurality of partitions from accessing a protected block range of the storage device. In...

20060143419 - Managing disk storage media: Systems and methods for managing the distribution and access of data on a pool of storage media are disclosed. The data are managed based on access patterns, storage media activity, and/or health parameters. An access pattern of one or more units of data in a pool of two or more...

20060143418 - Storage system and data relocation control device: The present invention achieves data relocation in accordance with a user's policies, in an environment where a plurality of storage devices coexist. The volumes belonging to storage devices A-D are managed virtually integrally. A host recognizes a plurality of storage devices A-D as a single virtual storage device. The user...

20060143421 - Dynamic performance monitoring-based approach to memory management: Techniques are described for optimizing memory management in a processor system. The techniques may be implemented on processors that include on-chip performance monitoring and on systems where an external performance monitor is coupled to a processor. Processors that include a Performance Monitoring Unit (PMU) are examples. The PMU may store...

20060143420 - Power saving method for portable streaming devices: A method (2) of controlling memory usage in a portable streaming device (100), a portable streaming device (100) and a computer readable medium (110). The portable streaming device (100) comprises at least one memory (102), at least one processing unit (101), and at least one storage device (103) being operatively...

20060143422 - Storage control system: A storage control system having no risk of changing the storage content of a logical volume by a data update to a virtual logical volume. A logical volume, which is not correspondent to a virtual logical volume, can be specified when defining a virtual logical volume correspondent to a logical...

20060143423 - Storage device, data processing method thereof, data processing program thereof, and data processing system: The present invention relates to a storage device which is defined by a logical volume, and makes it possible to perform processing, such as duplication of a logical volume, without using environmental construction and hardware resources of a host server side. The storage device has a storage part (a storage),...

20060143424 - Virtual storage architecture management system, information processing equipment for virtual storage architecture, computer- readable storage medium, and method of producing virtual storage architecture: A virtual storage architecture management system for producing a virtual storage architecture on the basis of information on a storage device comprises a storage device having a plurality of storage areas, information processing equipment that performs various kinds of information processing on the storage device, and a selective linkage unit...

20060143425 - Storage system and storage management system: A storage system whereby all managers of the storage system can easily collect the history data of the manager of each partition. The storage system is designed such that the memory resources within the system are managed by a system manager while partitions of the memory resources are managed by...

20060143426 - System and method for accessing data in a memory device: A memory and storage device includes a data management system for transferring data units referenced by logical addresses. The data management system maps the logical addresses to sequential virtual addresses according to the order the data units are received. The data management system also maps the sequential virtual addresses to...

20060143427 - Storage plug-in based on hashmaps: Methods for a treatment of cached objects are described. In one embodiment, management of a region of a cache is configured with an eviction policy plug-in and a storage plug-in. The eviction policy plug-in includes code to evict an object that is cached in the region of cache. The storage...

  
06/22/2006 > 46 patent applications in 27 patent subcategories.

20060136652 - Electronic system with remap function and method for generating bank with remap function: An electronic system with remap function comprises a memory unit, a remap unit, and a microprocessor. The memory unit at least has a first bank and a second bank, which have a common area and a non-common area, respectively. The common area of the first bank comprises an addressing table...

20060136653 - Systems and methods for exposing processor topology for virtual machines: The present invention is directed to making a guest operating system aware of the topology of the subset of host resources currently assigned to it. At virtual machine boot time a Static Resource Affinity Table (SRAT) will be used by the virtualizer to group guest physical memory and guest virtual...

20060136655 - Cluster auto-alignment: Alignment of clusters to pages is provided in a non-volatile memory system that receives data from a host in clusters and writes data to a memory array in units of a page. Alignment is implemented within each block using offsets in logical-to-physical mapping of data. Different blocks may have different...

20060136657 - Embedding a filesystem into a non-volatile device: An integrated microcontroller is embedded with non-volatile memory to enhance host processor execution by transferring the computational load of the filesystem from the host processor to the integrated microcontroller. The integrated microcontroller allows the physical nature of the non-volatile memory to be changed without changing the host software....

20060136654 - Method and computer program product to increase i/o write performance in a redundant array: A method and related computer program product for achieving high performance I/O write rates in a redundant array using a fully recoverable communication queue stored in NVRAM on a RAID controller comprising, receiving an I/O write request from an application, determining if the I/O request is an inline write command,...

20060136656 - System and method for use of on-chip non-volatile memory write cache: A method of programming a non-volatile memory array using an on-chip write cache is disclosed. Individual data packets received by the memory system are stored in cache memory. More than one data packet may be stored in this way and then programmed to a single page of the non-volatile array....

20060136658 - Ddr2 sdram memory module: A DDR2 SDRAM memory module having memory chips arranged bilaterally symmetrical on the module. A register chip is arranged on each of two faces of the memory module, with each register chip coupled to half of the memory chips....

20060136660 - Associative memory with invert result capability: An associative memory with an invert result capability to allow the identification of an entry as being matched when an entry or portion thereof is specifically not matched is disclosed (or alternatively viewed as an entry or portion thereof indicated as matched when it actually was not matched). One such...

20060136659 - Processor having content addressable memory with command ordering: A content addressable memory (CAM) includes a linked list structure for a pending queue to order memory commands for maximizing memory channel bandwidth by minimizing read/write stalls due to read-modify-write commands....

20060136661 - Data management method and apparatus, hierarchical storage apparatus and computer-readable storage medium: A data management method is adapted to a hierarchical virtual storage system which virtually uses a library apparatus having a plurality of recording media as a portion of a hard disk apparatus. The data management method manages loading of the recording media to the library apparatus and unloading of the...

20060136662 - Method, apparatus, and computer program product for permitting access to a storage drive while the drive is being formatted: A method, apparatus, and computer program product are disclosed for permitting access to a data storage device while the device is being formatted. A format command is received within the device from the host. A command complete response is then transmitted to the host before the device has completed being...

20060136663 - Sector-specific access control: A method, of controlling access to storage locations on a hard-disk-based memory device, may include: receiving an input/output (I/O) request for access to the memory device; evaluating the I/O request in terms of one or more sectors on the hard-disk-based memory device comprehended by the I/O request; and selectively granting...

20060136664 - Method, apparatus and system for disk caching in a dual boot environment: In some embodiments, a method, apparatus and system for disk caching in a dual boot environment are presented. In this regard, a caching agent is introduced to, responsive to a system boot, read a location in non-volatile memory to determine whether a previous system boot was made into an operating...

20060136665 - Cyclically-interleaved access requests queuing method and system: A cyclically-interleaved access requests queuing method and system is proposed, which is designed for use in conjunction with an access control interface that is coupled between a computer system cluster (such as a server cluster) having multiple independent processing units and a data storage unit, and which is characterized by...

20060136666 - Sas storage virtualization controller, subsystem and system using the same, and method therefor: A storage virtualization computer system. The storage virtualization computer system comprises a host entity for issuing an IO request, a SAS storage virtualization controller coupled to the host entity for executing IO operations in response to the IO request, and at least one physical storage device, each coupled to the...

20060136668 - Allocating code objects between faster and slower memories: Code objects stored in faster and slower memory may be checked to determine their access frequency. For example, in connection with a paging system, a reference count may be accessible. Based on the reference count and other statistics, code objects that are more frequently accessed may be moved to faster...

20060136669 - Cache refresh algorithm and method: We present, in an exemplary embodiment of the present invention, a novel method for providing cache refresh within a finite time window (i.e., a time-box) with predictable accuracy and given constrained resources. Instead of refreshing the entire cache in a specified time window, we introduce an error. As used herein,...

20060136670 - Method and system for an atomically updated, central cache memory: Disclosed is a central cache that is updated without the overhead of locking. Updates are “atomic” in that they cannot be interrupted part way through. Applications are always free to read data in the cache, accessing the data through a reference table. Applications do not directly update the cache, instead,...

20060136667 - System, method and program to preserve a cache of a virtual machine: A system, computer program product and method for managing a cache of a virtual machine. A cache is defined in memory, and a virtual machine is assigned to the cache. An identity of the cache is recorded in storage. The virtual machine terminates, and the cache and contents of the...

20060136672 - Logging of level-two cache transactions into banks of the level-two cache for system rollback: A plurality of processors on a chip is operated in lockstep. A crossbar switch on the chip couples and decouples the plurality of processors to a plurality of banks in a level-two (L2) cache. As data is stored in a first bank of the L2 cache, the old data at...

20060136671 - Software controlled dynamic push cache: Methods, software and systems of dynamically controlling push cache operations are presented. One method, which may also be implemented in software and/or hardware, monitors performance parameters and enables or disables push cache operations depending on whether the performance parameters are within a predetermined range. Another method, which may also be...

20060136673 - Unused item management: Items that are in use are maintained in a used item store. Items that are no longer in use are placed in an unused items store. When an item that is not currently in use is requested again, an attempt is made to retrieve the item from the unused item...

20060136674 - Buffering apparatus and buffering method using ring buffer: A read unit in a buffering apparatus writes data in a memory apparatus used as a ring buffer. A determination unit determines whether data is consecutively written in the memory apparatus. When it in determined that data in consecutively written, the determination unit, in response to a request for transfer...

20060136675 - Method of storing data in blocks per operation: The present invention is to provide a method of storing data for driving an MMC or SD under an operating system (e.g., Linux), which comprises the steps of collecting data in a plurality of discreet blocks of a high-speed buffer for each writing request made by a device driver under...

20060136676 - Apparatus and methods using invalidity indicators for buffered memory: A storage system includes a storage medium configured to store data and a buffer memory configured to buffer data to be written to the storage medium. The storage system further includes a controller configured to selectively transfer the buffered data to the storage medium responsive to an invalidity indicator received...

20060136677 - Concurrent read access and exclusive write access to data in shared memory architecture: Concurrent read access and exclusive write access are provided in a shared memory architecture to permit one or more devices in the shared memory architecture to maintain read access to a block of memory such as a cache line while one device has exclusive permission to modify that block of...

20060136678 - Method and system for reducing program code size: In a method for reducing code size a replaceable subset of instructions at a first location within a set of instructions and a matching target subset of instructions at a second location within the set of instructions are identified. A base offset and a relative offset are determined. The base...

20060136679 - Protected processing apparatus, systems, and methods: An apparatus and a system, as well as a method and article, may operate to prohibit program execution from entering into a location of a physical memory partition from a location outside the physical memory partition if the physical memory partition location does not include an entry instruction....

20060136683 - Arbitration system and method for memory responses in a hub-based memory system: A memory hub includes a local queue that stores local memory responses, a bypass path that passes downstream memory responses, and a buffered queue coupled to the bypass path that stores downstream memory responses from the bypass path. A multiplexer is coupled to the local queue, buffered queue, and the...

20060136680 - Capacity on demand using signaling bus control: An apparatus and method is disclosed for providing capacity on demand using control to alter latency and/or bandwidth on a signaling bus in a computer system. If additional capacity is required, authorization is requested for additional capacity. If authorized, bandwidth of the signaling bus is increased to provide additional capacity...

20060136682 - Method and apparatus for arbitrarily initializing a portion of memory: Techniques for initializing an arbitrary portion of memory with an arbitrary pattern includes using a memory controller for performing sequenced read and write operations. The memory controller receives address data, length data and pattern data on a data bus connected to a processor. The address data indicates a location in...

20060136681 - Method and apparatus to support multiple memory banks with a memory block: A memory controller system includes a memory command storage module to store commands for a plurality of memory banks. The system includes a plurality of control mechanisms, each of which includes first and second pointers, to provide, in combination with a next field in each module location, a link list...

20060136684 - Method and system for accessing auxiliary data in power-efficient high-capacity scalable storage system: A method for preparing data units for access in a data storage system is disclosed. The data storage system includes multiple storage devices having data units. All the storage devices of the data storage system are not powered on at the same time. The method includes preparing and storing the...

20060136686 - Log shipping data replication with parallel log writing and log shipping at the primary site: A log-shipping data replication system employs a primary server coupled to a standby server. In operation, the primary server concurrently flushes log data at the primary server and transmits the same log data from the primary server to the standby server. The primary server further transmits at least one buffer...

20060136685 - Method and system to maintain data consistency over an internet small computer system interface (iscsi) network: A method and system is disclosed to maintain data consistency over an internet small computer system interface (iSCSI) network, for disaster recovery and remote data replication purposes. Data consistency and replication is maintained between primary and secondary sites geographically distant from each other. According to the method, a primary journal...

20060136687 - Off-chip data relocation: The on-chip copy process is extended so that the data may be copied between two blocks that may be on different chips, different planes on the same chip, or the same plane of the same chip. More specifically, the methods described here provide a single data copying mechanism that allows...

20060136688 - Redundant sas storage virtualization subsystem and system using the same, and method therefor: A redundant external storage virtualization computer system. The redundant storage virtualization computer system includes a host entity for issuing an IO request, a redundant external SAS storage virtualization controller pair coupled to the host entity for performing an IO operation in response to the IO request issued by the host...

20060136689 - Method for overcoming system administration blockage: This invention relates to a method for overcoming system administration blockage and refers particulars, though not exclusively, to a method for overcoming system administrator blockage of a device newly connected to a computer....

20060136690 - Storage device having independent storage areas and password protection method thereof: A storage device having independent storage areas and password protection method thereof are described for resolving the problem of a prior-art storage device assigning its storage memory to a single continuous storage area and its data protection. The multi-sector storage device has a password protection function with an application system...

20060136691 - Method to perform parallel data migration in a clustered storage environment: A clustered storage array consists of several nodes coupled to one or more storage systems. The nodes provide a LUN-device for access by a client, the LUN-device mapping to a source logical unit corresponding to areas of storage on the one or more storage systems. A target logical unit corresponds...

20060136692 - Detection circuit for mixed asynchronous and synchronous memory operation: A memory access mode detection circuit and method for detecting and initiating memory access modes for a memory device The memory access mode detection circuit receives the memory address signals, the control signals, and the clock signal and generates a first mode detection signal in response to receipt of the...

20060136693 - Media memory system: A method and apparatus for matching parent processor address translations to media processors' address translations and providing concurrent memory access to a plurality of media processors through separate translation table information. In particular, a page directory for a given media application is copied to a media processor's page directory when...

20060136695 - Method and system for controlling the capacity usage of a logically partitioned data processing system: The present invention provides a new method and a new system for controlling the capacity usage of a logically partitioned data processing system comprising physical data processing resources that are divided into multiple logical partitions, wherein the capacity of the logical partitions is monitored to control the consumption of the...

20060136694 - Techniques to partition physical memory: System, method and apparatus to partition physical memory for a device are described....

20060136696 - Method and apparatus for address translation: A memory management unit (MMU) has a cache for storing address translation entries (ATEs) corresponding to virtual addresses. If an ATE is present for a requested virtual address, then it is translated to the physical address and sent to main memory. If the MMU cache misses, the virtual address is...

20060136697 - Method, system, and program for updating a cached data structure table: Provided are a method, system, and program for updating a cache in which, in one aspect of the description provided herein, changes to data structure entries in the cache are selectively written back to the source data structure table maintained in the host memory. In one embodiment, translation and protection...

  
06/15/2006 > 50 patent applications in 21 patent subcategories.

20060129737 - Data allocation in a distributed storage system: A method for data distribution, including distributing logical addresses among an initial set of devices so as provide balanced access, and transferring the data to the devices in accordance with the logical addresses. If a device is added to the initial set, forming an extended set, the logical addresses are...

20060129738 - Data allocation in a distributed storage system: A method for data distribution, including distributing logical addresses among an initial set of devices so as provide balanced access, and transferring the data to the devices in accordance with the logical addresses. If a device is added to the initial set, forming an extended set, the logical addresses are...

20060129742 - Direct-memory access for content addressable memory: A network device for processing packets. The network device includes a CPU processing module for transmitting information between at least one memory location on the network device and an external CPU memory location. The CPU processing module includes a first engine for performing bulk transfer of information from the at...

20060129740 - Memory device, memory controller and method for operating the same: One embodiment of the present invention provides a memory device comprising a plurality of sets of memory banks, wherein each memory bank includes a memory array and is adapted to be read out in a data access; a plurality of internal data buses and a plurality of internal command and...

20060129741 - Method and apparatus for accessing memory in a computer system architecture supporting heterogeneous configurations of memory structures: A computer system includes at least one processor, multiple memory modules embodying a main memory, a communications medium for communicating data between the at least one processor and main memory, and memory access control logic which controls the routing of data and access to memory. The communications medium and memory...

20060129739 - Method controller having tables mapping memory addresses to memory modules: A memory controller includes ports and corresponding tables. Each port is receptive to one or more memory modules. Each table includes entries mapping memory addresses to the memory modules. Each entry corresponds to no more than one of the memory modules. The tables support asymmetric population of the memory modules...

20060129747 - Method and apparatus for a configurable protection architecture for on-chip systems: Various methods and apparatuses of protection mechanism are described. A target intellectual property block may field and service requests from an initiator intellectual property block in a system-on-chip network. The target intellectual property block has an associated protection mechanism with logic configured to restrict access for the requests to the...

20060129744 - Method and apparatus for enabling non-volatile content filtering: A method for managing a basic input output system (BIOS) includes filtering a request to change a policy of a platform associated with the BIOS. Other embodiments are described and claimed....

20060129746 - Method and graphic interface for storing, moving, sending or printing electronic data to two or more locations, in two or more formats with a single save function: A single graphic user interface enabling a computer user to store, print, back up or send an electronic file to multiple locations. The electronic file can be sent on multiple paths to multiple devices in multiple formats....

20060129745 - Process and appliance for data processing and computer program product: The present invention concerns an appliance, a process and a computer program product for the processing of unstructured or semi-structured digital data in a file system. In order to create an appliance, a process and a computer program product which allow simple, reliable, high-performance and purpose oriented management of every...

20060129748 - System and related methods for reducing memory requirements of a media processing system: A method of generating a development project including at least a matrix switch and one or more adjacent objects is presented comprising establishing an initial rendering of the development project, and negotiating buffer size and attributes between an input/output coupling the matrix switch to an input/output of the adjacent objects,...

20060129743 - Virtualization logic: Systems, methodologies, media, and other embodiments associated with externally trapping transactions are described. One exemplary system embodiment includes an external virtualization logic configured to be operably connected to a processor that does not include internal virtualization support. The example system may include a data store for storing a trappable memory...

20060129752 - Burst write in a non-volatile memory device: A synchronous flash memory has been described that includes an array of non-volatile memory cells. The memory device has a package configuration that is compatible with an SDRAM. The synchronous flash memory device includes an array of non-volatile memory cells arranged in a plurality of rows and columns. During a...

20060129750 - Method and apparatus for storing multimedia data in nonvolatile storage device in units of blocks: Provided are a method and apparatus for storing multimedia data in a nonvolatile storage device in units of blocks, in which the time required for storing the multimedia data in the nonvolatile storage device can be reduced. The method includes receiving the multimedia data, sequentially storing the received multimedia data...

20060129749 - Nonvolatile memory system, nonvolatile memory device, memory controller, access device, and method for controlling nonvolatile memory device: When a file system control part 155A writes file data into a main memory 142, a file can be easily written continuously and the number of file copy can be decreased at updating a directory entry by writing the file data and a directory entry into different allocation units. In...

20060129751 - Novel multi-state memory: Maximized multi-state compaction and more tolerance in memory state behavior is achieved through a flexible, self-consistent and- self-adapting mode of detection, covering a wide dynamic range. For high density multi-state encoding, this approach borders on full analog treatment, dictating analog techniques including A to D type conversion to reconstruct and...

20060129753 - Dynamic packing of volatile memory: A system and method for managing volatile memory which, may not simply look for a good fit in memory or store content according to rigid memory area classifications, but allocates memory to minimize the memory area requiring refresh and/or free memory areas so they may be powered down. A number...

20060129755 - Memory rank decoder for a multi-rank dual inline memory module (dimm): The invention refers to a Memory Rank Decoder for a Multi-Rank Dual Inline Memory Module (DIMM) having a predetermined number of DRAM memory chips mounted on a printer circuit board (PCB), wherein each DRAM memory chip comprises a predetermined number of stacked DRAM memory dies which are selectable by a...

20060129754 - Reuse of functional data buffers for pattern buffers in xdr dram: A method, an apparatus, and a computer program are provided to reuse functional data buffers. With Extreme Data Rate (XDR™) Dynamic Random Access Memory (DRAM), test patterns are employed to dynamically calibrate data with the clock. To perform this task, data buffers are employed to store data and commands for...

20060129756 - Computer arrangement using non-refreshed dram: A computer arrangement with a processor (5) and at least one memory unit (7, 9, 11, 13) connected to the processor (5) and including dynamic random access memory (13), wherein the computer arrangment is arranged to use but not to refresh at least part of the dynamic random access memory...

20060129757 - System and method of operating a mobile computer system: A method, system, and computer-usable medium for operating a mobile computer system. In response to receiving a write request, a control system attempts to write data associated with said write request to a non-volatile memory cache coupled to said hard disk drive. In response to determining the non-volatile memory cache...

20060129761 - Method and apparatus for power-efficient high-capacity scalable storage system: Systems and methods for providing scalable, reliable, power-efficient, high-capacity data storage, wherein large numbers of closely packed data drives having corresponding metadata and parity volumes are individually powered on and off, depending upon their respective usage. In one embodiment, the invention is implemented in a RAID-type data storage system which...

20060129759 - Method and system for error strategy in a storage system: Apparatus and computer program product for enabling an error strategy in a storage system with an initiator and a plurality of storage devices connected by a network, such as a storage area network (SAN). The computer program product is operable for recording timing statistics for transactions between an initiator and...

20060129760 - Method and system for recovering from multiple drive failures: A method of calculating parity for an m-storage element failure in a networked array of storage elements. A first set of n XOR relationships is derived, each first set relationship containing n data symbols from n storage elements and one parity symbol from a first set of parity symbols. A...

20060129758 - Zero channel raid architecture: A computer system motherboard includes connection points for receiving a processor and a disk controller card. At least one communication bus connects the processor and the disk controller card. Another connection point is provided between the processor and the disk controller card for receiving one of a jumper or a...

20060129762 - Accessible buffer for use in parallel with a filling cacheline: A cache system, used in conjunction with a processor of a computer system, is disclosed herein for increasing the processor access speed. The cache system comprising a cache controller in communication with the processor and cache memory in communication with the cache controller. The cache memory comprising a number of...

20060129763 - Virtual cache for disk cache insertion and eviction policies and recovery from device errors: Processor-based systems may include a disk cache to increase system performance in a system that includes a processor and a disk drive. The disk cache may include physical cache lines and virtual cache lines to improve cache insertion and eviction policies. The virtual cache lines may also be useful when...

20060129764 - Methods and apparatus for storing a command: In a first aspect, a first method is provided for storing a command. The first method includes the steps of (1) receiving a new command referencing an address; (2) determining whether the new command is dependent on at least one previously-received command referencing the address stored in a queue of...

20060129765 - System, method and computer program product for testing software: A test system, method and a computer program product are provided for testing software to be run on a data processing apparatus having a plurality of processors operable to share access to a memory system, where at least a part of the memory system has a memory ordering type which...

20060129766 - Method and apparatus for preloading caches: A method (400) of preloading data on a cache (210) in a local machine (235). The cache (210) is operably coupled to a data store (130), in a remote host machine (240). The method includes the steps of determining a user behaviour profile for the local machine (235); retrieving data...

20060129767 - Method and memory controller for scalable multi-channel memory access: An electrical device is connected to at least one memory accessing unit and to a memory including at least one physical memory module. The device includes at least one access channel circuit connected to the least one memory accessing unit via at least one system bus and to the at...

20060129768 - Methods and systems for archiving data: Methods, computer readable medium and systems are provided for moving data objects from a first storage location to a second storage location. One or more data objects may be selected from a first storage location. An identifier of a first type may be assigned to each of the selected data...

20060129773 - Copy controller and method thereof: After a first copy request is received and copy operation from a copy source area to a copy destination area is activated, information indicating an update section is recorded when a data update of at least one of either the copy source area or the copy destination area is generated....

20060129772 - Data processing method and system: It is an object of the present invention to use the resources of various sites in an effective manner. The first site has a first DB access part in use. The second site has a second DB access part in use in addition to a first DB access part for...

20060129771 - Managing data migration: A method for performing a data migration task on an on-line data storage system comprises computing a migration utility, which is a function of the expected time taken to complete the data migration task and generating migration requests for performing the data migration task, where the data migration task is...

20060129775 - Method, system and apparatus for releasing storage in a fast replication environment: Regions of data storage involved with fast replication relationships are managed and tracked in order to maintain the integrity of the data on the source and target volumes. In response to a delete operation referencing specified regions of storage, pending fast replication transfers are completed for source regions, fast replication...

20060129770 - Resource management for data storage services: Provided are a method, system, and an article of manufacture, wherein resources corresponding to at least one copy pool are acquired, and wherein the at least one copy pool has been defined for a first primary storage pool of a storage hierarchy. The acquired resources are retained, in response to...

20060129774 - Storage system and method for acquisition and utilization of snapshots: A computer system including: a computer having a display to display information of a plurality of backup times, and an inputting device by which a user selects a backup time of the plurality of backup times; and, a storage system coupled to the computer and having an interface controller receiving...

20060129769 - System and method for migration to manufactured information handling systems: Data migration directly from legacy to replacement information handling systems is managed over a set of one or more switches. The legacy information handling system boots with a manufacturing operating system provided from a data migration information handling system server and runs a data migration application also provided from the...

20060129776 - Method, system and memory controller utilizing adjustable read data delay settings: A method, system and memory controller that uses adjustable read data delay settings. The memory controller includes control transmit circuitry, data reception circuitry and timing circuitry. The control circuitry transmits a control signal to multiple memory devices via a shared control signal path. The data reception circuitry receives data signals...

20060129777 - Processor cluster architecture and associated parallel processing methods: A parallel processing architecture comprising a cluster of embedded processors that share a common code distribution bus. Pages or blocks of code are concurrently loaded into respective program memories of some or all of these processors (typically all processors assigned to a particular task) over the code distribution bus, and...

20060129782 - Apparatus, system, and method for dynamically allocating main memory among a plurality of applications: An apparatus, system, and method are disclosed for dynamically allocating main memory among applications. The apparatus includes a cache memory module configured to maintain a first list and a second list, each list having a plurality of pages, and a resize module configured to resize the cache by adaptively selecting...

20060129778 - Apparatus, system, and method for managing storage space allocation: An apparatus, system, and method are disclosed for managing storage space allocation. The apparatus includes a recognizing module, a reserving module, and a managing module. The recognizing module recognizes a trigger event at a client of the data storage system. The reserving module reserves logical units of space for data...

20060129783 - Data allocation in a distributed storage system: A method for data distribution, including distributing logical addresses among an initial set of devices so as provide balanced access, and transferring the data to the devices in accordance with the logical addresses. If a device is added to the initial set, forming an extended set, the logical addresses are...

20060129780 - Memory pacing: A method, system, and program for managing memory page requests in a multi-processor data processing system determines a threshold value of available memory, and dynamically adjusts an allocation time to fulfill a page request if the available memory is below a threshold value. The allocation time to fulfill the page...

20060129784 - Method of controlling storage device controlling apparatus, and storage device controlling apparatus: In a storage device controlling apparatus which includes: a plurality of channel controllers having a circuit board on which are formed a file access processing section receiving from an information processing apparatus requests to input and output data in files as units via a network and an I/O processor outputting...

20060129781 - Offline configuration simulator: An offline configuration simulator allows a user to model and manage a simulated data storage system. Once the simulated data storage system is properly configured, a configuration file is applied to a corresponding real data storage system. An existing configuration of the data storage system can be imported into the...

20060129779 - Storage pool space allocation across multiple locations: Techniques are provided for allocating storage space to a storage pool. A request for storage space for the storage pool is received. A list of locations associated with the storage pool is obtained, wherein the locations are capable of spanning multiple file systems or multiple directories within a single file...

20060129785 - Storage of data blocks of logical volumes in a virtual disk storage subsystem: When data is stored in many storage subsystems, metadata, such as a sequence number, is also generated and stored with the data. When the data is accessed, the metadata is checked to ensure that the desired data element has been accessed. In conventional storage subsystems, data elements, such as logical...

20060129786 - Methods and apparatus for address translation from an external device to a memory of a processor: Methods and apparatus provide for using a first portion of an external address as a pointer to select one of a plurality of entries in a segment table, each entry of the segment table representing a different segment of a memory; using at least a portion of the selected entry...

  
06/07/2006 > 50 patent applications in 21 patent subcategories.
  
06/01/2006 > 34 patent applications in 26 patent subcategories.

20060117129 - High speed dram cache architecture: A high speed DRAM cache architecture. One disclosed embodiment includes a multiplexed bus interface to interface with a multiplexed bus. A cache control circuit drives a row address portion of an address on the multiplexed bus interface and a command to open a memory page containing data for a plurality...

20060117130 - Method and program for controlling a virtual computer: This invention provides a program product for a virtual computer that partitions a physical computer into a plurality of logical partitions through a hypervisor and runs an OS on each of the logical partitions, the program product including: a procedure (S1) of detecting an exception or an interruption occurring in...

20060117131 - Method for the secure checking of a memory region of a microcontroller in a control device and control devide with a protected microcontroller: A method is provided for controlling a microcontroller in a control unit in a motor vehicle, having a processor core, at least one read-only memory area and at least one rewritable memory area, at least one control program which is intended to be processed by the processor core being stored...

20060117132 - Self-configuration and automatic disk balancing of network attached storage devices: Systems and methods for self-configuration and automatic disk balancing of network attached storage devices are disclosed. Methods are disclosed for providing automatic disk balancing that uses a self-configuring set of network storage devices. A self-configuring set of network storage devices enables a user to merely plug in a new storage...

20060117133 - Processing system: A processing system on a constructed circuit includes a group of processing cores. A group of dedicated random access memories are severally coupled to one of the group of processing cores or shared among the group. A star bus couples the group of processing cores and random access memories. Additional...

20060117134 - System and method for prolonging usage lifetime of a non-volatile memory: A system for prolonging usage lifetime of a non-volatile memory includes a non-volatile memory (1) and a host (2). The non-volatile memory is logically divided into a plurality of sectors (10), each of which stores a sector tag and data. The host includes a data writing module (20), a sector...

20060117135 - Method and system of computing quota usage: A method and system for computing disk space used by a directory and its descendants that may proceed while input and output are occurring that involve the directory and any of its descendants. A calculation of the total amount of disk space consumed by a set of objects is commenced....

20060117136 - System for secure erasing of files: The present invention is directed to a system and method for the secure and correct deletion of data files from a data storage that bypasses the file system of an operating system. A secure erase service receives a secure erase request from a system interceptor component, which has intercepted a...

20060117137 - System and method to enable efficient communication with a dynamic information storage and retrieval system, or the like: An information storage and retrieval system (40) and method for operating same has a host device (42) and an information storage device (41), which includes mass data storage means (54), such as a DVD, a DVD RAM, CD-ROM, alone, or in combination. The information storage device (41) includes a cache...

20060117138 - Disk array device and remote coping control method for disk array device: Various types of resources of the disk array device are divided for respective users and communications resources used in remote copying are appropriately assigned to the users so that functional interference between the split units is prevented and stable remote copying is realized. SLPRs which are dedicated regions for the...

20060117139 - Data-cache apparatus and a data-cache method used by a radio communications system: A data-cache apparatus for providing a data-cache function to a radio communications system is disclosed. The data-cache apparatus includes a data distinguishing unit (310) to distinguish an attribute of data requested by a mobile station, a cache memory (340) that temporarily stores data provided to a mobile station, and a...

20060117142 - Disk array device, method for controlling the disk array device and storage system: A disk array device is equipped with a plurality of input/output channels that receive data input/output requests from an external device, a plurality of cache memories provided for the corresponding respective input/output channels, each of the cache memories connected to each of the corresponding respective input/output channels, a disk drive...

20060117140 - Memory control device and memory control method: Address information of target data is stored in an ELA register at the start of a cache excluding process performed by BackEviction, and a request processing unit continuously re-executes a data acquiring process while an address of data requested to be acquired by a processor is present in the ELA...

20060117141 - Parallel cachelets: Parallel cachelets are provided for a level of cache in a microprocessor. The cachelets may be independently addressable. The level of cache may accept multiple load requests in a single cycle and apply each to a respective cachelet. Depending upon the content stored in each cachelet, the cachelet may generate...

20060117143 - Ternary cam with software programmable cache policies: A circuit comprising a plurality of first line buffers, an arbiter and a cache. The plurality of first line buffers may be configured to communicate on a plurality of first busses. The arbiter may be configured to perform an arbitration among the first line buffers. The cache block may be...

20060117144 - Method and apparatus for optimizing data streaming in a computer system utilizing random access memory in a system logic device: An apparatus and a method for optimizing data streaming in a computer system utilizing random access memory in a system logic device have been presented. In one embodiment, the apparatus includes a processor interface unit and a cache to store information received from a processor coupled to the processor interface...

20060117145 - Prefetching data in a computer system: A method and apparatus to detect and filter out redundant cache line addresses in a prefetch input queue, and to adjust the detector window size dynamically according to the number of detector entries in the queue for the cache-to-memory controller bus. Detectors correspond to cache line addresses that may represent...

20060117146 - Cache for an enterprise software system: Techniques are described for caching data from a software system, such as an enterprise software system. The techniques may be applied to a computing device connected to the software system via a network. In one example, the cache comprises an elegant, file-based cache that includes an object store that stores...

20060117147 - Managing multiprocessor operations: In managing multiprocessor operations, a first processor repetitively reads a cache line wherein the cache line is cached from a line of a shared memory of resources shared by both the first processor and a second processor. Coherency is maintained between the shared memory line and the cache line in...

20060117149 - Information processing system, system control apparatus, and system control method: A system control apparatus and method capable of increasing the possibility of recovery from a synchronization error in snooping between system controllers are provided. The system control apparatus has a local port that holds a memory access request received externally and reoutputs it in response to an error retry instruction....

20060117148 - Preventing system snoop and cross-snoop conflicts: Preventing cache conflicts within microprocessors and/or computer systems. More particularly, embodiments of the invention relate to a technique to prevent cache conflicts within a processor and/or computer system in which a number of accesses may be made to a particular cache or group of caches....

20060117150 - Memory system comprising a plurality of memory controllers and method for synchronizing the same: The invention relates to a memory system which is configured with a plurality of memory controllers (SCx), disposed in parallel on a clocked bus (B), and memory chips (Fx) associated with the respective memory controllers (SCx). The system communicates via the bus (B) with a host system (HS) by means...

20060117151 - Method of verifying a system in which a plurality of master devices share a storage region: In logical verification of a system in which a plurality of master devices share a storage region, a scoreboard common to all master devices is provided. When starting verification, an initial value of data stored in each address of each storage device is set in correspondence with the address in...

20060117152 - Transparent four rank memory module for standard two rank sub-systems: A transparent four rank memory module has a front side and a back side. The front side has a third memory rank stacked on a first memory rank. The back side has a fourth memory rank stacked on a second memory rank. An emulator coupled to the memory module activates...

20060117153 - System for secure erasing of files: The present invention is directed to a system and method for the secure and correct deletion of data files from a data storage that bypasses the file system of an operating system. A secure erase service receives a secure erase request from a system interceptor component, which has intercepted a...

20060117154 - Data processing system: A data processing system includes at least a first storage system, a second storage system and a third storage system. The third storage system maintains a replication of data stored in the first storage system. When updating data in the first storage system, the first storage system updates the replication...

20060117157 - Assuring genuineness of data stored on a storage device: Techniques to assure genuineness of data stored on a storage device are provided. The storage device includes a storage controller that conducts I/O operations and management operations. A description of management operations and corresponding timestamps are recorded to an operation log stored in a memory. The memory additionally stores an...

20060117156 - Method and apparatus for dual protection of a protected memory block: If the logic module detects the hardware state as a write permit state (118) and the logic module fails to receive the write-protect signal (116), the logic module permits the memory controller to modify the protected memory block. If the logic module either detects the hardware state is a write...

20060117155 - Micro-threaded memory: A micro-threaded memory device. A plurality of storage banks are provided, each including a plurality of rows of storage cells and having an access restriction in that at least a minimum access time interval must transpire between successive accesses to a given row of the storage cells. Transfer control circuitry...

20060117158 - Method for managing viewing of a particular content recorded on an information recording medium: A DVD player 11 reads disc control information recorded on a DVD medium M and causes a display 12 to display a start menu screen, thereby prompting a viewer to perform authentication (1). The viewer uses a remote controller 11a to display a first viewer authentication screen (2). Then, an...

20060117159 - Data storage system and data storage control device: A storage system has a plurality of control modules for controlling a plurality of storage devices, which make mounting easier with maintaining low latency response even if the number of control modules increases. A plurality of storage devices are connected to the second interface of each control module using back...

20060117160 - Method to consolidate memory usage to reduce power consumption: A method and system for reducing power consumption of a computer system by allocating memory pages that are associated with lower memory address before those associated with higher memory addresses. Memory elements that do not include any allocated memory pages and that are positioned at a higher address than a...

20060117161 - Method and apparatus for configuring a storage device: A method and apparatus is disclosed in which a storage device controller is arranged to use a set of sequential physical block addresses on a storage device as a single logical block address....

20060117162 - System and method for information handling system memory page mapping optimization: Plural consecutive virtual memory pages associated with an application running on an information handling system are mapped to a physical memory page of the information handling system's physical memory, such as dual channel interleaved memory. Each physical memory page that stores plural consecutive virtual memory pages becomes an effective cache...

Previous industry: Electrical computers and digital data processing systems: input/output
Next industry: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors)


######

RSS FEED for 20091112: - PDF
Integrate FreshPatents.com into your RSS reader/aggregator or website to track weekly updates.
For more info, read this article.

######

Thank you for viewing Electrical computers and digital processing systems: memory patents on the FreshPatents.com website. These are patent applications which have been filed in the United States. There are a variety ways to browse Electrical computers and digital processing systems: memory patent applications on our website including browsing by date, agent, inventor, and industry. If you are interested in receiving occasional emails regarding Electrical computers and digital processing systems: memory patents we recommend signing up for free keyword monitoring by email.



###

FreshPatents.com Support

Results in 1.23151 seconds

filepatents (1K)

* Easy, fast online form
* Protect your Inventions
* US Patent Office filing

Provisional Patent
Utility Patent

- - - - - - - - - - - - - - - - - - - - - -

filetrademarks (1K)

* Fast online form
* Protect your Name/Design
* US Government filing

Trademark Services

- - - - - - - - - - - - - - - - - - - - - -

PATENT INFO