Electrical computers and digital processing systems: memory inventions 03/06

20060069843 - Apparatus and method for filtering unused sub-blocks in cache memories: A memory system and method includes a cache having a filtered portion and an unfiltered portion. The filtered portion is divided into block sized components, and the unfiltered portion is divided into sub-block sized components. Blocks evicted from the filtered portion have selected sub-blocks thereof cached in the unfiltered portion...

20060069844 - Apparatus, system, and method for managing addresses and data storage media within a data storage library: An apparatus, system, and method are disclosed for managing physical addresses of data storage media within a data storage library. The library maintains a data table of storage slots and the media stored in those slots. The data table may contain addresses for storage slots that are not physically present...

20060069846 - Data processing device, data management method, storage medium of storing computer-readable program, and program: A data processing device comprises a second storage unit for storing data accessed in a first storage unit, and compares data read from the first storage unit with the data stored in the second storage unit. Thus, the data processing device judges whether or not the first storage unit is...

20060069845 - Write/read apparatus to control overwriting: In one embodiment, a write/read apparatus includes an external interface section for data input; an external interface section for data output; a memory for temporarily storing the data that is input through the external interface section for data input and written on the recording medium and the data that is...

20060069847 - Corruption tolerant method and system for deploying and modifying data in flash memory: In accordance with embodiments of the present techniques, a method and system are disclosed for storing write data in electronic memory. The system and method may comprise traversing a contiguous data chain beginning at a target position. The contiguous data chain may be adapted for population with data disposed in...

20060069848 - Flash emulation using hard disk: A device including a storage controller. A flash memory is connected to the storage controller. The flash memory to store flash memory data. A processing unit is connected to the storage controller. The processing unit to generate memory commands. A volatile memory is connected to the processing unit. A non-volatile...

20060069852 - Free sector manager for data stored in flash memory devices: A flash driver tracks data stored in a flash memory device through the use of logical-to-physical sector mapping. The mapping is stored in a data structure and allows data to be written into the next free physical sector in the flash memory medium. Write operations complete quickly, because there is...

20060069851 - Integrated circuit memory devices that support detection of write errors occuring during power failures and methods of operating same: Integrated circuit devices that support error detection include a non-volatile memory device having a memory array therein containing a plurality of pages of memory cells. A memory controller is also provided. The memory controller is electrically coupled to the non-volatile memory device and is configured to provide the non-volatile memory...

20060069850 - Methods and apparatus to perform a reclaim operation in a nonvolatile memory: A method and apparatus to perform a reclaim operation in a nonvolatile memory is provided. The apparatus may be a nonvolatile memory that may include a control circuit to receive a reclaim request from a device external to the nonvolatile memory and to perform a reclaim operation in response to...

20060069849 - Methods and apparatus to update information in a memory: A method and apparatus to update information in a memory is provided. The apparatus may be a nonvolatile memory that may include a control circuit to swap the physical addresses of a first block and a second block of the nonvolatile memory as part of an operation to update information...

20060069853 - Software management: Methods and systems for operating computing devices are described. In one embodiment, a small amount of static RAM (SRAM) is incorporated into an automotive computing device. The SRAM is battery-backed to provide a non-volatile memory space in which critical data, e.g. the object store, can be maintained in the event...

20060069854 - Method and apparatus providing efficient queue descriptor memory access: A system having queue control structures includes a conflict avoidance mechanism to prevent memory bank conflicts for queue descriptor access. In one embodiment, a queue descriptor bank table contains information including in which memory bank each queue descriptor is stored....

20060069856 - Memory controller method and system compensating for memory cell data losses: A computer system includes a memory controller coupled to a memory module containing several DRAMs. The memory module also includes a non-volatile memory storing row addresses identifying rows containing DRAM memory cells that are likely to lose data during normal refresh of the memory cells. Upon power-up, the data from...

20060069855 - System and method for controlling the access and refresh of a memory: The present invention provides a memory and memory control system wherein, except for one case noted below, the main memory gives priority to read or write operations over refresh operations. On the other hand, the cache memory give priority to the refresh operations over read or write operations. The exceptional...

20060069857 - Compression system and method: A new compression and decompression architecture is herein disclosed which advantageously uses a plurality of parallel content addressable memories of different sizes to perform fast matching during compression....

20060069858 - Sorting method and apparatus using a cam: Method and apparatus for using a Content Addressable Memory for sorting a plurality of data items is presented. The data items to be sorted are stored in the Content Addressable Memory. A plurality of bit-by-bit burst searches are performed on the contents of the Content Addressable Memory with all other...

20060069860 - Data storage apparatus that appropriately revises fdcb information during background formatting: A data storage apparatus, including a controller that formats a rewritable recording medium in the background, interrupts the background formatting when a host computer requests to store data in the rewritable recording medium, stores the data in the rewritable recording medium after interrupting the background formatting, revises control information stored...

20060069859 - Optical disk apparatus: An optical disk apparatus which records data on the basis of a predetermined minimum amount of recording data. Recording data supplied from an external device is stored in a buffer memory and then encoded and recorded on an optical disk. The data is recorded in units of one ECC block...

20060069866 - Disk array apparatus, disk array control method and computer program product therefor: A disk array apparatus including a plurality of physical disks, includes: a response time measuring unit measuring a response time to an access to the physical disk; and a performance deterioration judging unit judging performance deterioration of a specific physical disk of the plurality of physical disks, on the basis...

20060069861 - Method and apparatus for storage pooling and provisioning for journal based strorage and recovery: A set of interconnected storage systems supporting different types of storage devices and different performance attributes are intelligently applied to process types, such as journal entries. The processes are ranked according to a predetermined priority ranking. Storage devices in the storage system having similar performance attributes are pooled and ranked...

20060069862 - Method for managing volume groups considering storage tiers: A tiered storage system according to the present invention provides for the management of migration groups. When a migration group is defined, a reference tier position is determined and the relative tier position of each constituent logical device is determined. Movement of a migration group involves migrating data in its...

20060069864 - Method to detect and suggest corrective actions when performance and availability rules are violated in an environment deploying virtualization at multiple levels: A computer system or memory medium with instructions executable by a computer system to detect and/or suggest corrective actions when performance and availability are violated in an environment deploying virtualization at multiple levels. In one embodiment the computer system receives identities of a plurality of first physical storage devices, wherein...

20060069863 - Model and system for reasoning with n-step lookahead in policy-based system management: When an alarm condition relating to a performance goal of a storage system is detected, a storage management system invokes an N-step lookahead engine for simulating operation of the storage system when there are multiple actions that could be taken by the storage system for eliminating the alarm condition. The...

20060069865 - Remote copying system and remote copying method: Composition of a consistency group is changed easily without releasing a volume pair of the consistency group concerning a remote copying system and a remote copying method using a sequence number. In order to change the composition of the consistency group, predetermined data sent from a data sending side after...

20060069867 - Storage concept: The present invention relates to a device as well as a method for the saving or storage of data on physically different storage devices. By distributing the data to physically different storage devices, the deletion or removal of specific data is simplified. In addition, the specific storage and protection of...

20060069868 - Storage system having a plurality of interfaces: A hybrid-type storage system having both SAN and NAS interfaces can be implemented by simple hardware capable of carrying out a SAN function independently of a NAS function and a NAS load. To be more specific, a controller of the storage system comprises a NAS controller for accepting an I/O...

20060069869 - Enqueueing entries in a packet queue referencing packets: Provided are a method, system, network processor, network device, and article of manufacture for enqueueing entries in a packet queue referencing packets. When adding a packet to a first memory area, an entry is written to a packet queue in a second memory area referencing the added packet. A pointer...

20060069870 - Method and system for improved reliability in storage devices: A method of preventing data loss in a data storage system includes supplying write data to a high speed volatile write buffer and supplying electrical power from an energy storage device upon detection of a primary power loss event. The backup electrical power is supplied to the write buffer and...

20060069871 - System and method for dynamic sizing of cache sequential list: A self-tuning, low overhead, simple to implement, locally adaptive, novel cache management policy that dynamically and adaptively partitions the cache space amongst sequential and random streams so as to reduce read misses....

20060069872 - Deterministic finite automata (dfa) processing: A processor for traversing deterministic finite automata (DFA) graphs with incoming packet data in real-time. The processor includes at least one processor core and a DFA module operating asynchronous to the at least one processor core for traversing at least one DFA graph stored in a non-cache memory with packet...

20060069873 - Instruction cache using single-ported memories: Systems, methodologies, media, and other embodiments associated with cache systems are described. One exemplary system embodiment includes an instruction cache comprising single-ported memories. The example system can further include a cache control logic configured to process cache events of different types that may be received by the instruction cache, and...

20060069874 - Cache organization with an adjustable number of ways: A method and apparatus for an adjustable number of ways within a cache is herein described. A cache may comprise a plurality of lines addressably organized as a plurality of ways, wherein the plurality of ways may be addressably organized as groups. The cache may also have associated cache control...

20060069875 - Cache victim sector tag buffer: A method of operating a sub-sector cache includes receiving a request for a first sub-sector of a first cache line. The method further includes identifying a first replaced line in a cache data RAM, the first replaced line including a plurality of replaced sub-sectors. The method further includes storing the...

20060069876 - Method and system of clock with adaptive cache replacement and temporal filtering: A method and system of managing data retrieval in a computer comprising a cache memory and auxiliary memory comprises organizing pages in the cache memory into a first and second clock list, wherein the first clock list comprises pages with short-term utility and the second clock list comprises pages with...

20060069877 - Apparatus and method for providing information to a cache module using fetch bursts: Apparatus and method for providing information to a cache module, the apparatus includes: (i) at least one processor, connected to the cache module, for initiating a first and second requests to retrieve, from the cache module, a first and a second data unit; (ii) logic, adapted to receive the requests...

20060069879 - Methods and apparatus for providing a compressed network in a multi-processing system: The present invention provides methods and apparatus for transferring and storing data among processors and memory in a multiprocessor system. The data is compressed locally before it is sent to a shared memory. The memory stores the data in its compressed state, but the data is aligned in the memory...

20060069878 - System and method for virtualization of processor resources: A system and method for virtualization of processor resources is presented. A thread is created on a processor and the processor's local memory is mapped into an effective address space. In doing so, the processor's local memory is accessible by other processors, regardless of whether the processor is running. Additional...

20060069880 - Apparatus for controlling access, by processing devices, to memories in an embedded system: The present invention provides an apparatus for controlling access, by processing devices to memories in an embedded system, with the apparatus being arranged between the processing devices and the memories, and with the apparatus independently moving data between the memories and between the memories and internal memories in the processing...

20060069881 - Shared memory access control apparatus: A main CPU and a sub-CPU share a single port memory. In the single port memory in which a predetermined time has elapsed after the main CPU ends access to the single port memory, the sub-CPU sets a bus right of the single port memory to itself to access the...

20060069882 - Memory controller for processor having multiple programmable units: A parallel hardware-based multithreaded processor is described. The processor includes a general purpose processor that coordinates system functions and a plurality of microengines that support multiple hardware threads. The processor-also includes a memory control system that has a first memory controller that sorts memory references based on whether the memory...

20060069883 - Directory server and data processing method in directory server: This invention is a technique to appropriately manage and use data before and after updating in a directory server. A data processing method executed by the directory server comprises: receiving first request data containing at least a first attribute value and concerning registration of an attribute into a particular entry...

20060069885 - File system with file management function and file management method: The storage area of a storage unit includes a file area and temporary write area. A pair of map tables are allocated in the storage area. An update processing unit executes update of a page in a file stored in a file area by writing updated data to an unused...

20060069884 - Universal network to device bridge chip that enables network directly attached device: Network bridge circuit, logic, chip, and method that enables a host computer to access a storage device or a plurality of storage devices directly from the network. Hardware architecture includes protocol layer handler, DMA, storage device interface, command execution unit, and optional error handler. Bridge circuit logic implemented on a...

20060069886 - Managing disk storage media: Systems and methods for managing the distribution of data on a pool of storage media are disclosed. The data are managed based on access patterns, storage media activity, and/or health parameters. An access pattern of one or more units of data in a pool of two or more storage media...

20060069891 - Computer system: A method include a configuration definition creation step of writing configuration information on a primary site into a storage subsystem; a data transfer step of copying the configuration information, which is written into a storage device, to a storage subsystem in a secondary site over a network; a data reception...

20060069892 - Method, apparatus, and computer readable medium for managing back-up: Duplicate data obtained by copying and a volume containing it are flexibly managed according to the attribute of the file to be copied by a storage apparatus as is required by a user. When receiving a backup instruction for the file to be backed up, an instruction for a method...

20060069888 - Method, system and program for managing asynchronous cache scans: A method, apparatus, and article of manufacture containing instructions for the management of data in a point-in-time logical copy relationship between a source and multiple target storage devices. The method consists of establishing first and second point-in-time logical copy relationships between a source storage device and at least two target...

20060069889 - Remote copy system: A reliable remote copy system is provided at low costs. The remote copy system includes a first storage system connected to a first upper level computing system to transmit or receive data to or from the first upper level computing system; a second storage system connected to the first storage...

20060069887 - Triangular asynchronous replication: Storing recovery data includes providing chunks of data to a remote destination, where each chunk of data represents data written before a first time and after a second time and where the second time for one of the particular chunks corresponds to a first time for a subsequent one of...

20060069890 - Triangular asynchronous replication with minimal synchronous storage: Storing recovery data includes providing chunks of data to a remote destination, where each chunk of data represents data written before a first time and after a second time and where the second time for one of the particular chunks corresponds to a first time for a subsequent one of...

20060069894 - De-coupled memory access system and method: A de-coupled memory access system including a memory access control circuit configured to generate first and second independent, de-coupled time references. The memory access control circuit includes a read initiate circuit responsive to the first time reference and a read signal for generating a read enable signal, and a write...

20060069893 - Host implementation of triangular asynchronous replication: Storing recovery data includes a host processor writing data to a local storage device, the host processor causing the local storage device to accumulate chunks of data corresponding to writes by the host processor, where each chunk of data represents data written before a first time and after a second...

20060069895 - Method, system and memory controller utilizing adjustable write data delay settings: A method, system and memory controller that uses adjustable write data delay settings. The memory controller includes control transmit circuitry, data transmit circuitry and timing circuitry. The control circuitry transmits a control signal to multiple memory devices via a shared control signal path. The data transmit circuitry transmits data signals...

20060069897 - Information processing device and information processing method: An information processing device having a plurality of processors, for carrying out processing on a data stream according to an aspect of the present invention includes a manager which reads a configuration file showing relations among a plurality of modules of processes to be executed on the data stream, allocates...

20060069896 - System and method for storing data: The disclosure is directed to a system including a first flash memory device having a first interface and a first control interface that includes a first chip enable control input, a second flash memory device having a second interface and a second control interface that includes a second chip enable...

20060069898 - Memory manager for an embedded system: A memory manger acts on a memory that has been arranged with a predetermined number of fixed memory blocks, with each memory block set to a predefined size. These fixed blocks have been initialized to accelerate the allocation process. When a memory manger receives an allocation request, the size of...

20060069899 - Performance enhancement of address translation using translation tables covering large address spaces: An embodiment of the present invention is a technique to enhance address translation performance. A register stores capability indicators to indicate capability supported by a circuit in a chipset for address translation of a guest physical address to a host physical address. A plurality of multi-level page tables is used...

20060069900 - Method and system for supporting virtual mappings for shared firmware: System and method of supporting virtual mappings for shared firmware contents in a computer system are described. In one embodiment, the method comprises, responsive to a function call issued by a processor, determining whether address translation has been enabled for the issuing processor; and responsive to a determination that address...

20060069901 - Apparatus and method for an address generation circuit: A method and apparatus for an address generation circuit. In one embodiment, the method includes computing a carry-in for at least one group of a predetermined number of bits of a propagate and a generate signal formed from a plurality of logical address components. Once the carry-in is computed, a...

20060059296 - Emulating small block size of flash memory: A memory, that is erased in units of physical blocks, is presented as though the memory is erased in units of pseudo-blocks that are smaller than the physical blocks. One of the physical blocks is designated spare. In one embodiment, to erase a pseudo-block, all other valid data in the...

20060059297 - Memory control apparatus, memory control method and program: Memory control apparatus, memory control method, and program are provided. The present invention provides a preparatory process for determining whether or not a data-updating process to update data of a flash memory or a data-writing process to write new data into the memory has been completed normally. A data-updating process...

20060059295 - Memory management device and memory device: A memory management device for managing a nonvolatile semiconductor memory which comprises a plurality of blocks, and permits data to be erased in units of one block, the memory management device comprises a setting unit configured to set an address range of data to be erased in response to an...

20060059299 - Apparatus and method for pipelined memory operations: A memory device has interface circuitry and a memory core which make up the stages of a pipeline, each stage being a step in a universal sequence associated with the memory core. The memory device has a plurality of operation units such as precharge, sense, read and write, which handle...

20060059298 - Memory module with memory devices of different capacity: A memory module includes a first set of at least one first type of memory device and a second set of at least one second type of memory device having a higher capacity than the first type. In addition, an additional capacity portion of the first and second sets stores...

20060059300 - Firmware update for optical disc drive: The present invention discloses an optical disc drive capable of updating firmware, and firmware update method thereof. The disclosed optical disc drive includes a firmware memory, a buffer memory, and a system control chip. The system control chip includes a processor and a memory update controller. When the optical disc...

20060059302 - Disk array subsystem: There is a technique for a disk array subsystem which can reduce the number of LSIs required per one channel and mount more channels on a package, in a package of a channel control unit. In the disk array subsystem, a channel control unit receiving a data input/output request from...

20060059301 - Storage apparatus and method for relocating volumes thereof: A storage apparatus is capable of relocating volumes accurately even when a plurality of storage apparatuses are connected. The storage apparatus comprises an external connection function for recognizing an external logical volume set on a physical storage device as a logical volume inside the storage apparatus, a storage control device...

20060059303 - Storage system and method of controlling the same: A storage system which manages a plurality of storage control apparatus in an integrated manner is provided. An I/O request issued by a host apparatus to a second storage control apparatus is forwarded to the second storage control apparatus through a first storage control apparatus. The first storage control apparatus...

20060059306 - Apparatus, system, and method for integrity-assured online raid set expansion: An apparatus, system, and method are disclosed for online RAID set expansion from an amount of disks i to an amount of disks j, where j disks includes one or more new disks, with data integrity assurance during the expansion process. In accordance with the invention, data migration to the...

20060059304 - Apparatus, system, and method for servicing a data storage device: An apparatus, system, and method are disclosed for servicing a data storage device. A service registration module registers a service process for servicing the stripe groups of a data storage device. A WIP map initialization module creates a WIP map for each stripe group of the service process. The stripe...

20060059305 - Efficient firmware update for hierarchical data storage systems: An apparatus, system, and method are disclosed to shutdown a library manager while the library system remains in a partially online state. A message module is included to send a suspend message to a host such that the host stops sending library manager commands, a shutdown module is included to...

20060059308 - Storage device and device changeover control method for storage devices: The present invention makes it possible to change over a volume transparently with respect to a host. A first storage device 2A and a second storage device 2B are connected through a communication network 3B; a volume 8 provided by the second storage device 2B is mapped as a volume...

20060059307 - Storage system and information system using the storage system: A storage controller is realized in which validity/invalidity of functions is settable in a unit of logical division in conformity with logical division of logical groups control is performed such that operation has the influence upon only the inside of a range defined by resource groups of logical division and...

20060059309 - Cache memory system and control method of the cache memory system: To improve the efficiency of access to a system memory associated with changes (writes) to cache data, a cache line having the same memory size as write data is selected and the write data is written into the selected cache line, thereby reducing the number of accesses to the system...

20060059310 - Local scratchpad and data caching system: A RISC-type processor includes a main register file and a data cache. The data cache can be partitioned to include a local memory, the size of which can be dynamically changed on a cache block basis while the processor is executing instructions that use the main register file. The local...

20060059312 - System and method for fetching information in response to hazard indication information: A method for fetching information in response to hazard indication information, the method includes: (i) associating hazard indication information to at least one information unit that is being fetched to the cache module; (ii) receiving a request to perform a fetch operation; and (iii) determining whether to fetch at least...

20060059311 - Using a cache miss pattern to address a stride prediction table: Data prefetching is used to reduce an average latency of memory references for retrieval of data therefrom. The prefetching process is typically based on anticipation of future processor data references. In example embodiment, there is a method of data retrieval that comprises providing a first memory circuit (610), a stride...

20060059314 - Direct access to low-latency memory: A content aware application processing system is provided for allowing directed access to data stored in a non-cache memory thereby bypassing cache coherent memory. The processor includes a system interface to cache coherent memory and a low latency memory interface to a non-cache coherent memory. The system interface directs memory...

20060059313 - Method and apparatus for reading a data store: In an electronic computing system, an instruction is provided as to whether to cache in a region of a memory of the system an attribute of a context if and when the context is accessed in a permanent storage device. When the context is accessed in the permanent storage, the...

20060059316 - Method and apparatus for managing write back cache: A network services processor includes an input/output bridge that avoids unnecessary updates to memory when cache blocks storing processed packet data are no longer required. The input/output bridge monitors requests to free buffers in memory received from cores and 10 units in the network services processor. Instead of writing the...

20060059315 - Nonuniform chip multiprocessor: In accordance with the present invention, an integrated circuit system and method are provided for increasing the number of processors on a single integrated circuit to a number that is larger than would typically be possible to coordinate on a single bus. In the present invention a two-level memory coherency...

20060059317 - Multiprocessing apparatus: The multiprocessing apparatus of the present invention is a multiprocessing apparatus including a plurality of processors, a shared bus, and a shared bus controller, wherein each of the processors includes a central processing unit (CPU) and a local cache, each of the local caches includes a cache memory, and a...

20060059318 - Managing shared memory usage within a memory resource group infrastructure: A method for allocating memory associated with a local shared memory segment to facilitate execution of a first process. The method includes automatically allocating memory associated with a first MRG to the local shared memory segment if the local shared memory segment is created by the first process. The first...

20060059319 - Architecture with shared memory: A system with multiple processors sharing a single memory module without noticeable performance degradation is described. The memory module is divided into n independently addressable banks, where n is at least 2 and mapped such that sequential addresses are rotated between the banks. Such a mapping causes sequential data bytes...

20060059320 - Memory control device: It is an object of the present invention to provide a memory controller which prevents successive access to the same bank of SDRAM and improves processing time. A memory controller (105) of the present invention is a memory controller for controlling memory which has a plurality of banks and can...

20060059321 - Backup and archiving system by means of tape volume cassettes for data processing units: A backup and archiving system utilizing tape cassettes avoids bottlenecks at a higher performance level that may be caused by a central working storage, especially during backup and archiving procedures. Such a backup and archiving system provides a distributed hardware architecture in which several Component Computers work without reciprocal obstruction....

20060059322 - Data storage system and process: Computer systems may loose data when a failure occurs within a system. To counteract such loss of data a backup system may be employed. Common backup systems make a copy of either of the data on a storage device or the data, which has changed, on a storage device. The...

20060059323 - Physical memory control using memory classes: A method for allocating memory in a computer system is disclosed. The method includes creating a kernel memory class, the kernel memory class acting as a logical container for at least a first kernel memory resource group. The method further includes processing a kernel client's request for additional memory by...

20060059324 - System for compression of physiological signals: A method of optimizing retention of signal information from a physiologically generated digital signal is provided. The method can comprise steps of generating a digital signal from a physiological source, storing the digital signal into a memory location as a stored digital signal, identifying within the stored digital signal a...

20060059325 - Apparatus and method for assigning addresses to components or modules in a system: A system having replaceable components, each with a MAC address provided by its manufacturer, includes a central system controller which generates predetermined MAC addresses each associated with a slot into which the components are inserted. When a component (card) is inserted into a slot, the controller checks the MAC address...

20060059326 - Dynamic data structures for tracking file system free space in a flash memory device: One or more secondary data structures are maintained containing mappings of logical flash memory addresses to physical flash memory addresses. Each secondary data structure has a predetermined capacity of mappings. A master data structure is also maintained containing a pointer to each of the one or more secondary data structures....

20060053245 - Power reduction for processor front-end by caching decoded instructions: A power aware front-end unit for a processor may include a UOP cache that disables other circuitry within the front-end unit. In an embodiment, a front-end unit may disable instruction synchronization circuitry, instruction decode circuitry and, optionally, instruction fetch circuitry while instruction look-ups are underway in both a block cache...

20060053246 - Systems and methods for providing nonvolatile memory management in wireless phones: The present invention is related to memory management, and in particular, to methods and systems for accessing and managing nonvolatile, such as in a wireless phone. A wireless phone memory controller is disclosed that, comprises a first interface circuit configured to be coupled to wireless phone nonvolatile memory, a second...

20060053247 - Incremental erasing of flash memory to improve system performance: A method and system for erasing a page in a flash memory system including a CPU (11), a flash memory (12) including an array of flash memory cells (1), a flash memory controller (12A) coupled to the flash memory (12) and also coupled by a memory bus (19) to the...

20060053248 - Techniques for implementing accurate operating current values stored in a database: Memory modules and methods for fabricating and implementing memory modules wherein unique operating current values corresponding to specific memory devices on the memory modules are accessed from a database such that the operating current values may be implemented to improve system performance. Memory modules comprising a number of volatile memory...

20060053249 - Information recording/reproduction processing device, method, and computer program: The present invention provides an apparatus and a method that judge whether contents recording processing is in progress and make it possible to execute reproduction processing under accurate control. A recording control process for executing contents recording processing generates reproduction synchronization management information having a reproduction synchronization management information name,...

20060053251 - Controlling preemptive work balancing in data storage: A storage network control apparatus is operable to present virtualized storage to a host system and includes a monitoring component, an analysis component, a detection component, and a migration component. The monitoring component is for monitoring input/output (I/O) activity for virtual storage logical units over time. The analysis component is...

20060053250 - Storage system and data management device for storage system: In the present invention, archive volumes are created in accordance with the size of data that is to be archived, and hence the storage regions are used in an efficient manner. The archive server acquires the data to be archived, via the application server, and detects the size of that...

20060053252 - Embedded storage device with integrated data-management functions and storage system incorporating it: In a storage system, a system controller is connected to an embedded storage device for supervising writing and reading operations in the embedded storage device. A data manager based upon a microprocessor is integrated in the embedded storage device and provides a high-level abstraction of the physical organization of the...

20060053253 - Caching control for streaming media: Improved caching control for streaming media includes one or more cache control directives associated with streaming media content that can be used by a source of the streaming media content to identify how caching proxy servers are to handle the streaming media content. Upon receipt of the streaming media content,...

20060053255 - Apparatus and method for retrieving data from a data storage system: In a memory controller such as a system controller including a level-3 cache memory for common use of data with a level-2 cache memory within a CPU by forming a chip set such as a server, an effective memory controller and a control method are realized to store the necessary...

20060053254 - Data processing system and method for operating the same: A data processing system according to the invention comprises a processor (P) and a memory hierarchy. The highest ranked level therein is a cache coupled to the processor. The memory hierarchy comprises a higher ranked cache (C1) having a cache controller (CC1) operating according to a write allocate scheme, and...

20060053256 - Prefetch control in a data processing system: In one embodiment, a data processing system (10) includes a first master, storage circuitry (35) coupled to the first master (12) for use by the first master (12), a first control storage circuit (38) which stores a first prefetch limit (60), a prefetch buffer (42), and prefetch circuitry (40) coupled...

20060053257 - Resolving multi-core shared cache access conflicts: Preventing request conflicts within microprocessors and/or computer systems. More particularly, embodiments of the invention relate to a technique to manage request conflicts within a processor and/or computer system in which a number of accesses may be made to a particular cache or group of caches shared amongst a set of...

20060053258 - Cache filtering using core indicators: A caching architecture within a microprocessor to filter core cache accesses. More particularly, embodiments of the invention relate to a technique to manage transactions, such as snoops, within a processor having a number of processor core caches and an inclusive shared cache....

20060053260 - Computing system with memory mirroring and snapshot reliability: A computing system is provided with enhanced data reliability by implementing mirroring and snapshot functionality of the system memory. In the computing system, a processor executes its programs from a first region of a physical memory. Using instructions from the system itself, or from an external console, the first region...

20060053259 - Framework for taking shadow copies and performing backups in a networked environment: A framework for taking shadow copies and performing backups in systems that may have data spread across multiple machines. A requester communicates names to a primary coordinator and requests the creation of shadow copies of all the volumes associated with the names. The primary coordinator communicates with one or more...

20060053261 - Hierarchical systems and methods for providing a unified view of storage information: The present invention provides systems and methods for data storage. A hierarchical storage management architecture is presented to facilitate data management. The disclosed system provides methods for evaluating the state of stored data relative to enterprise needs by using weighted parameters that may be user defined. Also disclosed are systems...

20060053262 - Systems and methods for detecting & mitigating storage risks: The present invention provides systems and methods for data storage. A hierarchical storage management architecture is presented to facilitate data management. The disclosed system provides methods for evaluating the state of stored data relative to enterprise needs by using weighted parameters that may be user defined. Also disclosed are systems...

20060053263 - Systems and methods for generating a storage-related metric: The present invention provides systems and methods for data storage. A hierarchical storage management architecture is presented to facilitate data management. The disclosed system provides methods for evaluating the state of stored data relative to enterprise needs by using weighted parameters that may be user defined. Also disclosed are systems...

20060053265 - Centralized data transformation: A method of facilitating transformation of survey data from being in at least one foreign format used by a survey-tool to being in a desired format may include: receiving instances of foreign data from survey-tools, the foreign data being in foreign format used by the survey-tools, respectively; and appending, to...

20060053264 - Semiconductor device preventing writing of prohibited set value to register: A semiconductor device includes a data hold circuit configured to acquire data from a data bus and hold the data therein in response to assertion of a write signal, a prohibited set value hold circuit configured to store a predetermined prohibited set value, and a comparison circuit coupled to the...

20060053266 - Storage device system: A storage device system in which migration of data from an existing storage device to a higher-standard storage device is unnecessary, and in which discarding of existing storage devices by the user can be prevented. A CHF 61 receives a Read Capacity command from a new-type storage device 25 (S101)....

20060053267 - Scaling address space utilization in a multi-threaded, multi-processor computer: Scaling address space utilization in a multi-threaded, multi-processor computer, including attaching to process memory of an exporting process a region of virtual memory specified in a cross-memory descriptor; requesting, by an importing thread of an importing process having process memory, a lightweight attachment of the region of virtual memory to...

20060047883 - Serially indexing a cache memory: In one embodiment, the present invention includes a method of accessing a cache memory to determine whether requested data is present. In this embodiment, the method may include indexing a cache with a first index corresponding to a first memory region size, and indexing the cache with a second index...

20060047884 - System and method for power efficent memory caching: A system and method for power efficient memory caching. Some illustrative embodiments may include a system comprising: a hash address generator coupled to an address bus (the hash address generator converts a bus address present on the address bus into a current hashed address); a cache memory coupled to the...

20060047885 - Configurable memory module and method for configuring the same: A configurable memory module capable of multiple times of use is provided. A string of register bits is used to mark a usage status of the memory segments. The register bits are converted into a sequence of segment identification bits as the most significant bits of a sequence of memory...

20060047886 - Memory controller: A memory controller maps a processor generated address to a banked DRAM address by applying a randomising function which results in the banks appearing in an irregular and non-cyclic order in the conceptual memory map. Incremental addressing by two or more requestors is thereby more evenly distributed amongst the banks...

20060047887 - Memory system and method having unidirectional data buses: A memory system and method includes a unidirectional downstream bus coupling write data from a memory controller to several memory devices, and a unidirectional upstream bus coupling read data from the memory devices to the memory controller. The memory devices each include a write buffer for storing the write data...

20060047889 - Memory device and controlling method for nonvolatile memory: A memory device and controlling method for nonvolatile memory are provided. The memory device and the controlling method for a nonvolatile memory are provided by which, where a file management system wherein there is a tendency that lower logic addresses are used frequently like the MS-DOS is adopted, physical blocks...

20060047888 - Semiconductor memory device and access method and memory control system for same: A semiconductor memory device using inexpensive block access semiconductor memories for storage media and able to be treated like a usual randomly accessible system memory, including a first semiconductor memory and a second semiconductor memory, wherein the second semiconductor memory is a cache of the first semiconductor memory, the first...

20060047892 - Method for resolving parameters of dram: A method for resolving DRAM parameters includes setting a chip number, a DIMM number and a DRAM bank number of the DRAM according to the chip number, the DIMM number and the DRAM bank number recorded on a SPD of the DRAM. The method further includes initializing the DRAM with...

20060047890 - Sdram address mapping optimized for two-dimensional access: Typically, a bulk of the memory space utilized by an SOC (103) is located in cheaper off-chip memory devices such as Synchronous Dynamic Random Access Memory (SDRAM) memories (104). These memories provide a large capacity for data storage, at a relatively low cost. It is common for SOC devices to...

20060047891 - System and method for transmitting data packets in a computer system having a memory hub architecture: A system and method for transmitting data packets from a memory hub to a memory controller is disclosed. The system includes an upstream reception port coupled to an upstream link. The upstream reception port receives the data packets from downstream memory hubs. The system further includes a bypass bus coupled...

20060047893 - Non-skipping auto-refresh in a dram: In a dynamic random access memory device, an auto-refresh method comprises receiving a command for the memory device to operate in a half-density mode. This causes a remapping circuit to remap a first memory address bit to an unused memory address location. Using the new addressing scheme, an auto-refresh operation...

20060047894 - Data recording apparatus, and data recording control method and program: A data recording apparatus controls writing to and reading from a recording medium such as a magnetic tape, etc. loaded based on input/output requests from a host. A medium information acquiring unit acquires the number of medium marks read out from a memory disposed on a housing of the recording...

20060047897 - Method for improving data throughput for a data storage device: A method for improving throughput performance of a data storage device by executing an execution critical write-back data priority routine programmed into a controller of the data storage device. The method includes, determining a write-back data aging threshold limit; identifying and executing a pending command; recognizing write-back data exceeding the...

20060047898 - Read/write device, and format management method of read/write device: Embodiment of the present invention provide a technique for carrying out work in a short time to prevent without fail data stored in a read/write device from leaking to persons other than an authorized user. There are provided a read/write device, and a format management method for managing a format...

20060047896 - Storing parity information for data recovery: Provided are a method, system, and article of manufacture in which a first storage unit at a first site is coupled to a second storage unit at a second site and a third storage unit at a third site. Data is received at the first storage unit. The received data...

20060047895 - Systems and methods for providing a modification history for a location within a data store: A storage management device can receive a request for a modification history for a location within a data store, determine one or more times at which at least a portion of data stored at the location was modified, and transmit the one or more determined times....

20060047901 - Access control method, disk control unit and storage apparatus: An access control method receives an access command, and permitting access to a cache segment accessed by the access command if no access range overlap occurs, even when a contention exists between a cache segment and an arbitrary cache segment that is already being accessed. The cache memory is segmented...

20060047900 - Storage device: A storage system is disclosed for performing control to match data among cache memories corresponding to shared volumes when multiple disk controllers containing cache memories are accessing shared volumes formed in the storage device. The storage system contains a switch for switching and connecting the multiple disk controllers containing cache...

20060047899 - Storage device control apparatus: A storage device control apparatus includes a channel control unit for outputting an I/O request for a storage device, having a CPU for receiving a data input/output request in a file unit, an I/O processor for outputting the I/O request corresponding to the data input/output request in the file unit...

20060047906 - Data processing system: This invention provides a control technique of a data processing system, in which functions of a highly-functional high-performance storage system are achieved in an inexpensive storage system so as to effectively use the existing system and reduce the cost of its entire system. This system has a RAID system, an...

20060047908 - Disk array apparatus: A disk array apparatus using an SAS can transfer data without lowering a transfer efficiency of data even if rates of a plurality of physical links connected to a controller and storage device are different. A plurality of HDDs are connected to a controller through an expander. Data are transferred...

20060047904 - Method and system for processing markers, data integrity fields and digests: A system with a host bus adapter (“HBA”) having a TCP/IP offload engine is provided. The HBA includes logic for concurrently processing markers, data integrity fields (“DIFs”) and digests by using plural counters that count words in a data stream and individual routing bits are set for markers, DIFs and...

20060047902 - Processing storage-related i/o requests using binary tree data structures: The disclosed technology can be used to develop systems and perform methods that receive and process I/O requests directed to at least a part of a logical unit of storage. The I/O requests can be associated with different times corresponding to when such I/O requests were received. Nodes that include...

20060047907 - Storage system and a storage management system: A storage device managing one or more logical volumes is connected with a name management device through an IP-SAN 6 composed of a switch. The storage device stores a topology table saving connecting relation among physical ports of host, physical ports of the storage device and physical ports of the...

20060047909 - Storage system and data relocation control device: The present invention achieves data relocation in accordance with a user's policies, in an environment where a plurality of storage devices are combined. The volumes belonging to storage devices A-D are managed virtually integrally. A host recognizes a plurality of storage devices A-D as a single virtual storage device. The...

20060047903 - Systems, apparatus, and methods for processing i/o requests: A method, apparatus, and system for accessing units of storage in at least one logical unit by processing I/O requests directed to the logical units using a LUN queue and an operation-type queue. By using the queues to process the I/O requests, the requests can be processed without address collisions....

20060047905 - Tape emulating disk based storage system and method with automatically resized emulated tape capacity: A data protection and storage system includes an array of disk drives for data storage. Data is received for storage on the disk drive via an interface that is configured to emulate a tape drive interface. A virtual tape data structure is created and stored on the disk drives. The...

20060047910 - Segmented on-chip memory and requester arbitration: A memory access technique is provided that may be used in WLAN (Wireless Local Area Network) communication devices. An on-chip memory has multiple memory circuits forming individually addressable memory segments. An arbitration unit arbitrates between multiple requesters, each requesting access to the on-chip memory. The requesters are on-chip circuits and/or...

20060047911 - Method and apparatus for enabling early memory reads for node local data: A method, apparatus, and computer instructions for accessing data. In response to identifying a transaction requiring data, address information is obtained for the data. The address information includes an indication of whether the data is unlikely to be located on remote caches for local nodes. The remote caches for local...

20060047912 - System and method for high performance, power efficient store buffer forwarding: The present disclosure describes a system and method for high performance, power efficient store buffer forwarding. Some illustrative embodiments may include a system, comprising: a processor coupled to an address bus; a cache memory that couples to the address bus and comprises cache data (the cache memory divided into a...

20060047913 - Data prediction for address generation interlock resolution: A method providing a microprocessor with the ability to predict data cache content based on the instruction address of an instruction which is accessing the data cache allows the reduction of address generation interlocking scenarios with the ability to self-correct should the data cache content prediction be incorrect. Content prediction...

20060047915 - Method and apparatus for prefetching data to a lower level cache memory: A prefetching scheme to detect when a load misses the lower level cache and hits the next level cache. Consequently, the prefetching scheme utilizes the previous information for the cache miss to the lower level cache and hit to the next higher level of cache memory that may result in...

20060047914 - Method and apparatus for transmitting memory pre-fetch commands on a bus: A processing system and method is disclosed wherein a processor may be configured to predict an address of memory from which data will be needed, transmit to a memory controller a pre-fetch command for the data at the predicted address of the memory, and transmit to the memory controller a...

20060047916 - Compressing data in a cache memory: In one embodiment, the present invention includes a cache memory having a plurality of cache lines to store data, in which at least some of the cache lines are adapted to store data in a compressed state. The cache memory also may include a first tag corresponding to each of...

20060047918 - Information processing apparatus, system controller, local snoop control method, and local snoop control program recorded computer-readable recording medium: The present invention relates to an information processing apparatus equipped with a plurality of storage units and a plurality of system controllers sharing communication control on the plurality of storage units. For shortening the processing time needed for a memory access request, each of the plurality of system controllers includes...

20060047917 - Method and apparatus for modifying an information unit using an atomic operation: A system and method for modifying an information unit, the method includes the following stages: (i) receiving, over a first bus, a request to initiate a snooping type atomic operation associated with at least one information unit located at a first address of a memory module; (ii) providing the information...

20060047919 - Atomic read/write support in a multi-module memory configuration: Efficient transfer of data to and from random access memory is described. Multiple request sources and a memory system comprise memory modules having memory banks, each bank containing rows of data. The retrieval comprises transferring all data pursuant to a given request by one source before any data is transferred...

20060047921 - Method and apparatus for managing storage used by a processor when processing instructions: A method and apparatus is disclosed for managing storage used by a processor when processing instructions in which an estimate of register usage for program procedures or functions is generated and used to control the storage of the register bank in memory....

20060047920 - Method and apparatus for using a one-time or few-time programmable memory with a host device designed for erasable/rewriteable memory: The embodiments described herein can be used to enable one-time or few-time programmable memories to work with existing consumer electronic devices (such as those that work with flash—an erasable, non-volatile memory) without requiring a firmware upgrade, thereby providing backwards compatibility while minimizing user impact. As such, these embodiments are a...

20060047922 - Reclaiming application isolated storage: Relatively-temporary applications may be installed. As a result of the installation and/or execution of such an application, an associated application isolated storage unit may be established. When established, the application isolated storage unit is designated for private storage use by the associated application. Additionally, a linkage between the application isolated...

20060047923 - Method and system for data lifecycle management in an external storage linkage environment: A system and method for data lifecycle management. In one embodiment, data is migrated from a source physical volume at a primary storage system to a target physical volume at an external storage system. The data from the source physical volume is copied to the target physical volume. When a...

20060047924 - Server and method for managing volume storing digital archive: The archive host selects the desired logical VOL-ID from among a plurality of logical VOL-ID corresponding with a plurality of physical VOL that exist in the storage control system pool that consists of a plurality of storage control systems, and sends the selected logical VOL-ID to the server. The server...

20060047927 - Incremental provisioning of software: Methods and apparatuses provide for incremental provisioning of software for a processing system. For instance, a processing system may include a machine accessible medium and a processor in communication with the machine accessible medium. In addition, instructions encoded in the machine accessible medium may cause the processing system to automatically...

20060047926 - Managing multiple snapshot copies of data: A method for providing multiple, different point-in-time, and read and write accessible snapshot copies of a base disk in storage arrays is disclosed. The method improves the performance of multiple snapshots by linking them together and sharing only one copy of a unique data block. This method also has the...

20060047931 - Method and program for creating a snapshot, and storage system: This invention includes: a step (S1) of receiving a snapshot creation request from a client computer; a step (S3) of obtaining, upon reception of the snapshot creation request, a usage ratio of a second volume by the update differences; a step (S2) of obtaining a use history of the update...

20060047932 - Protocol for communicating data block copies in an error recovery environment: The present invention provides an exemplary system and method for storing information for later recovery. One or more first memory addresses within a recovery storage are assigned to one or more data blocks. One or more second memory addresses within a primary storage associated with the one or more data...

20060047925 - Recovering from storage transaction failures using checkpoints: The disclosed technology facilitates recovery from storage-related failures by checkpointing copy-on-write operation sequences. An operation sequence incorporating such checkpoints into a copy-on-write can include the following: receive a write request that identifies payload data to be written to a first data store, read original data associated with the first data...

20060047928 - Storage switch asynchronous replication: Systems and methods in accordance with embodiments are provided for the replication of data from virtual logical units to remote virtual logical units. Change logs can be provided at a primary storage switch including a primary VLU to indicate changes made to the primary VLU between replications. The change log...

20060047929 - Storage system: A storage network system includes a storage device including a volume for recording data, and a network connection device, and a host including a device for reading/writing data from/into the volume through a network. The host includes a security inspection program for performing security inspection of data communicated through a...

20060047930 - Storage system and data relocation control device: The present invention achieves data relocation in accordance with a user's policies, in an environment where a plurality of storage devices are combined. The volumes belonging to storage devices A-D are managed virtually integrally. A host recognizes a plurality of storage devices A-D as a single virtual storage device. The...

20060047933 - System and method for using address bits to form an index into secure memory: A integrity control system uses the address bits to enable protection of data stored in a system memory. An address bus that determines the location of data to be stored or retrieved from system memory has a plurality of address lines. A subset of the address lines enables the protection...

20060047934 - Integrated circuit capable of memory access control: A method according to one embodiment may include selecting a port, among a plurality of ports. The method of this embodiment may also include selecting between a memory read request and a memory write request from at least one port, among the plurality of ports, based on, at least in...

20060047935 - Data processing system having translation lookaside buffer valid bits with lock and method therefor: A system (10) translates memory addresses. Processing circuitry (12) provides an effective address to a storage array (14, 16) having a plurality of stored effective addresses, each of the plurality of stored effective addresses having a corresponding pair of a lock bit and a valid bit. An output tag value...

20060047936 - System and method for using address lines to control memory usage: A computing environment maintains the integrity of data stored in system memory. The system has a memory management unit that maintains a plurality of real page numbers. The system also comprises an address bus in communication with the memory management unit. The address bus comprises a plurality of address lines,...

20060047937 - Simd processor and addressing method: A single instruction, multiple data (SIMD) processor including a plurality of addressing register sets, used to flexibly calculate effective operand source and destination memory addresses is disclosed. Two or more address generators calculate effective addresses using the register sets. Each register set includes a pointer register, and a scale register....