|Electrical computers and digital data processing systems: input/output patents - Monitor Patents|
USPTO Class 710 | Browse by Industry: Previous - Next | All
01/2010 | Recent | 14: Apr | Mar | Feb | Jan | 13: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | 12: Dec | Nov | Oct | Sep | Aug | July | June | May | April | Mar | Feb | Jan | 11: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | 10: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 09: Dec | Nov | Oct | Sep | Aug | Jl | Jn | May | Apr | Mar | Fb | Jn | | 2008 | 2007 |
Electrical computers and digital data processing systems: input/output January recently filed with US Patent Office 01/10Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 01/28/2010 > patent applications in patent subcategories. recently filed with US Patent Office
20100023648 - Method for input output expansion in an embedded system utilizing controlled transitions of first and second signals: A method for expanding input/output in an embedded system is described in which no additional strobes or enable lines are necessary from the host controller. By controlling the transitions of the signal levels in a specific way when controlling two existing data or select lines, an expansion input and/or output... Agent: Knobbe Martens Olson & Bear LLP
20100023647 - Swapping pprc secondaries from a subchannel set other than zero to subchannel set zero using control block field manipulation: A method for swapping peer-to-peer remote copy (PPRC) secondary device definitions from a subchannel set other than zero to subchannel set zero by the utilization of control block-field manipulation includes identifying a PPRC primary and secondary device pair, wherein a PPRC primary device definition resides at subchannel set zero and... Agent: Cantor Colburn LLP-ibm Poughkeepsie
20100023649 - Changing class of device: A class changing apparatus includes a link unit configured to be linked with a client device to transmit and receive data. The class change apparatus also includes a storage unit configured to store apparatus information including class information of the client device. The class changing apparatus further includes a control... Agent: Fish & Richardson P.C.
20100023650 - System and method for using a smart card in conjunction with a flash memory controller to detect logon authentication: A system and method of operating a device connected to a host computer in a manner to preserve knowledge of logon authentication status to the host computer. Upon initialization of the device perform a pattern matching operation of an instruction sequence received by the second microcontroller. When the instruction sequence... Agent: The Jansson Firm
20100023651 - Method and system for detecting state of field asset using packet capture agent: Methods and systems for detecting a state of a field asset using a packet capture agent is disclosed. A method may include capturing one or more packets transmitted on a shared bus in a field asset and determining the occurrence of a door event based at least one the one... Agent: Docket Clerk
20100023652 - Storage device and control method thereof: The present invention provides a storage device and a control method thereof which can enhance general-use property and availability of a storage system while enhancing I/O performance of the storage system as a whole. The storage device is provided with an external connection function in which a command is generated... Agent: Antonelli, Terry, Stout & Kraus, LLP
20100023653 - System and method for arbitrating between memory access requests: A system having memory access capabilities, the system includes: (i) a dynamic voltage and frequency scaling (DVFS) controller, adapted to determine a level of a voltage supply supplied to a first memory access requester and a frequency of a clock signal provided to the first memory access requester and to... Agent: Freescale Semiconductor, Inc. Law Department
20100023654 - Method and system for input/output pads in a mobile multimedia processor: Methods and systems for a low noise amplifier with tolerance to large inputs are disclosed and may include generating at least one control signal that controls a plurality of directional modes of at least one contact pad on a mobile multimedia processor (MMP) in an integrated circuit. Selectable modes may... Agent: Mcandrews Held & Malloy, Ltd
20100023655 - Data storage apparatus and method of data transfer: A data storage apparatus having improved data transfer performance. The storage apparatus has: plural controllers connected to each other by first data transfer paths; plural processors controlling the controllers; and second data transfer paths through which the controllers send data to various devices. Each of the controllers has a data-processing... Agent: Antonelli, Terry, Stout & Kraus, LLP
20100023656 - Data transfer method: There is provided a data transfer method in an IEEE1394 system including a band request node and a transfer band management node. The method includes generating, at the band request node, a transfer request that can detect a data amount of transfer data and transmitting the transfer request from the... Agent: Staas & Halsey LLP
20100023657 - System and method for serial data communications between host and communications devices, and communications device employed in the system and method: A communications device includes a communications circuit, a memory, an identifier generator, and a latency controller. The communications circuit exchanges serial data with a host computer and a downstream device, and includes a first input, a first output, a second input, and a second output. The first input receives data... Agent: Dickstein Shapiro LLP
20100023658 - System and method for enabling legacy medium access control to do energy efficent ethernet: A system and method for enabling legacy media access control (MAC) to do energy efficient Ethernet (EEE). A backpressure mechanism is included in an EEE enhanced PHY that is responsive to a detected need to transition between various power modes of the EEE enhanced PHY. Through the backpressure mechanism, the... Agent: Law Office Of Duane S. Kobayashi
20100023659 - Keyboard: A keyboard includes a keyboard control circuit, a card reader unit, at least one universal serial bus (USB) interface, a switch, and a BLUETOOTH unit. The USB interface is capable of coupling to the card reader unit. The BLUETOOTH unit is selectively connected to the keyboard control circuit or the... Agent: PCe Industry, Inc. Att. Steven Reiss
20100023660 - Kvm system: A keyboard-video-mouse (KVM) system is disclosed. The KVM system comprises a module, a KVM switch and a signal cable. The module transmits a single-ended video signal from a computer, converts a universal asynchronous receiver/transmitter (UART) signal to an input/output (IO) signal, and transmits the IO signal to the computer. The... Agent: Patterson & Sherldan - Aten
20100023661 - Portable image sharing system: A system allowing a portable display apparatus to share an image from a host computer is disclosed. The image sharing system is composed of a portable display apparatus, a transmitter and a computer. An image of the computer is acquired by software to send to the transmitter connected to the... Agent: Hdls Patent & Trademark Services
20100023662 - Bus mastering method: A mastering method of a bus includes the following steps: receiving a command; determining if the command is a bus master command to generate a determined result; outputting at least one break event to switch a processor from a non-snoop state into a snoop state according to the determined result;... Agent: North America Intellectual Property Corporation
20100023663 - Method and device for detecting bus subscribers: In order to register the order of bus subscribers (12) when starting a system without the use of a token line to be specifically laid for his purpose along the two-wire bus (11), the bus master (13) temporarily activates a reflective discontinuity, preferably a bus short circuit, in a respective... Agent: Scully Scott Murphy & Presser, PC
20100023664 - Bus system and operating method thereof: An operating method applied to an out-of-order executive bus system includes: according to dependency constraints, linking requests using the bus system to form dependency request links having an order; and processing the order of the requests according to the dependency request links. In addition, a bus system is provided. The... Agent: North America Intellectual Property Corporation
20100023665 - Multiprocessor system, its control method, and information recording medium: To provide a multiprocessor system in which data transmission efficiency is unlikely to be affected if a damaged processor should exist among a plurality of processors. The multiprocessor system has a plurality of processing modules, including a predetermined number, being three or more, of processors, and a bus for relaying... Agent: Gibson & Dernier L.L.P.
20100023666 - Interrupt control for virtual processing apparatus: A data processing system supporting one or more virtual processing apparatuses is provided with external interrupt interface hardware 26 and virtual interface hardware 28. Hypervisor software responds to an interrupt received by the external interrupt interface hardware 26 to write data characterising that interrupt into list registers 18 of the... Agent: Nixon & Vanderhye P.C.
20100023667 - High availability system and execution state control method: A high availability system includes a first server computer for a first virtual computer and a first hypervisor and a second server computer for a second virtual computer and a second hypervisor. The first virtual computer executes a processing and the second virtual computer executes the processing behind from the... Agent: Ohlandt, Greeley Ruggiero & Perle, L.l.p
20100023668 - Computer system having multi-function card reader module with pci express interface: A computer system includes a host, a PCI Express bus and a multi-function card reader module. The PCI Express bus is coupled to the host. The multi-function card reader module includes a plurality of card readers, a PCI Express interface and a PCI Express host controller. The plurality of card... Agent: North America Intellectual Property Corporation
20100023669 - Host controller disposed in multi-function card reader: A host controller disposed in a multi-function card reader includes: a Serial Advanced Technology Attachment (SATA) interface configured for coupling to a host computer; and a port multiplier having a control port and a plurality of peripheral device ports. The control port is coupled to the SATA interface, and the... Agent: North America Intellectual Property Corporation
20100023670 - Method and system for routing data in a parallel turbo decoder: Described herein are system(s) and method(s) for routing data in a parallel Turbo decoder. Aspects of the present invention address the need for reducing the physical circuit area, power consumption, and/or latency of parallel Turbo decoders. According to certain aspects of the present invention, address routing-networks may be eliminated, thereby... Agent: Mcandrews Held & Malloy, Ltd01/21/2010 > patent applications in patent subcategories. recently filed with US Patent Office
20100017541 - Memory device and memory device controlling apparatus: A memory device controlling apparatus of the present invention includes a device information requesting part that requests device information with respect to a memory device, when recognizing that the memory device is connected to the memory device controlling apparatus, and an extension activating part that activates an extension of the... Agent: Hamre, Schumann, Mueller & Larson P.C.
20100017540 - Semiconductor memory device and method of controlling semiconductor memory device: A USB memory includes: a USB terminal unit, a main unit which incorporates therein a NAND memory and a processor module; and a rotation portion which changes a relative position between the main unit and the USB terminal unit. The processor module switches an access management mode to a first... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100017542 - Storage subsystem with configurable buffer: A storage subsystem includes a variable-size write buffer that temporarily stores write data received from a host system. The storage subsystem is capable of adjusting the size of the write buffer so as to vary both the performance (e.g., sustained write speed) of the storage subsystem and a risk of... Agent: Western Digital Technologies, Inc. Attn: Lesley Ning
20100017543 - Method and apparatus for dynamic configuration of multiprocessor system: A communication system for a mobile vehicle, home, or office environment includes multiple processors. The multiple processors each run an Open Communication system that controls how data is transferred between processors based on data content as opposed to the links that connect the processors together. The open communication system enables... Agent: Stolowitz Ford Cowger LLP
20100017544 - Direct memory access controller and data transmitting method of direct memory access channel: Provided is a direct memory access (DMA) controller. The DMA controller includes a plurality of channel groups and a channel group controller. Each of the channel groups has a plurality of DMA channels, and the channel group controller controls enablement of the DMA channels in units of channel groups. Herein,... Agent: Ladas & Parry LLP
20100017545 - Method for empirically determining a qualified bandwidth of file storage for a shared filed system: A method for preventing oversubscription to a file storage by multiple processes, whether such processes are operating on one node with directly attached storage or on several nodes of a computing cluster sharing a storage area network. Processes or nodes issue requests for bandwidth reservations to a controller daemon. The... Agent: Sunstein Kann Murphy & Timbers LLP
20100017546 - Method, apparatus and system for authentication of external storage devices: A method for authentication of an external storage device (16) operatively connected to a port of a host computer (10) where the host computer (10) conducts a handshake with the external storage device (16) seeking an authentication key from the external storage device. The host computer (10) electrically disconnects the... Agent: Sonnenschein Nath & Rosenthal LLP
20100017547 - Pci bus burst transfer sizing: Various apparatuses, methods and systems for specifying memory transaction sizes on a PCI bus are disclosed herein. For example, some embodiments of the present invention provide apparatuses for transferring data including a PCI bus, a memory map for memory transactions performed on the PCI bus, and at least one set... Agent: Texas Instruments Incorporated
20100017548 - Buffer management device, buffer management method, and integrated circuit for buffer management: A buffer management apparatus that sequentially receives L (L>1) types of data and transmits the L types of data to an external device, including: a reception unit that receives data; M (M<L) data storage units, each including a buffer area; an interval storage unit that, for each type of data,... Agent: Wenderoth, Lind & Ponack L.L.P.
20100017549 - Mechanism to flexibly support multiple device numbers on point-to-point interconnect upstream ports: A method and apparatus for supporting multiple device numbers on point-to-point interconnect upstream ports. In one embodiment, the method includes a downstream component (DC) that performs discovery of internal device components of the DC during initialization of the DC. Subsequent to the discovery of internal devices of the DC, the... Agent: Blakely Sokoloff Taylor & Zafman LLP
20100017550 - Method and system for data transmission between dual processors: A method and system for data transmission between dual processors are provided. The dual processors include a first processor and a second processor with a controller and a point-to-point protocol (PPP) module. The method includes sending a connection instruction from the first processor to the PPP module, transmitting network configurations... Agent: PCe Industry, Inc. Att. Steven Reiss
20100017551 - Bus access moderation system: A method, programmed medium and system are provided in which system bus traffic is moderated with real-time data. The Operating System (OS) is enabled to get information from the firmware (FW) to determine if a resource threshold has been reached. This is accomplished by generating an interrupt to flag the... Agent: Ibm Corporation (rvw)
20100017552 - Converter and control system: A CPCIe switchboard 22 is applied to a slot of a CPCIe backboard 25 of a 3 U size compliant with the CPCIe standard, and cooperative with a CPCIe CPU board 21 and I/O boards 23 applied to other slots, for mutual transmission and reception of PCIe bus signals, and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100017553 - Interface between a twin-wire bus and a single-wire bus: A method and a device for converting a first bus including at least a data wire and a clock wire into a single-wire bus, wherein a data bit of the first bus is converted on half a period of the clock signal for transmission over the second bus, a waiting... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.01/14/2010 > patent applications in patent subcategories. recently filed with US Patent Office
20100011128 - Unified input/output controller for integrated wireless devices: A novel and useful apparatus for and method of a unified IO controller well suited for use in integrated wireless devices incorporating multiple functions. The unified IO controller is operative to provide a single host interface PHY/MAC that is shared among all functions on the controller. The invention provides an... Agent: Texas Instruments Incorporated
20100011129 - Storage device and control unit: A storage and a controller each include an assignment number-managing unit for managing the number of command-processing resources assigned corresponding to a command-sending/receiving pair in combination of an external device and a logical device receiving a data input/output-requiring command; and an assignment-controlling unit for assigning the data input/output-requiring command to... Agent: Fujitsu Patent Center C/o Cpa Global
20100011130 - Non-intrusive debug port interface: A processor having a core configured to control a keyboard and a plurality of pins connected to the core, configured to transfer signals from the processor to the keyboard. A controller is configured to transfer signals from one or more registers through at least one of the pins, intermittently with... Agent: Robert G. Lev
20100011131 - Printing apparatus for establishing priority identifier: Disclosed is a printing apparatus including a priority identifier establishment unit. More particularly, the printing apparatus, processing an instruction designated by a priority identifier before another instruction, includes the priority identifier establishment unit that allows a priority identifier to be designated in various forms and methods. Since the priority identifier... Agent: The Webb Law Firm, P.C.
20100011132 - Fiber channel connection storage controller: N_Port_Name information capable of distinctly identifying a host computer has seen set in a microprocessor 42 of a storage controller 40 prior to start-up of host computers 10, 20, 30; upon startup of the host computers 10, 20, 30, when the storage controller 40 receives a frame issued, then the... Agent: Mattingly & Malur, P.C.
20100011133 - Information processing apparatus, method for controlling activation of class module, and computer program product for carrying out the method: An information processing apparatus including a general-purpose interface connecting external devices to the apparatus; plural plug-in class modules accessing the external devices through the interface to provide the external devices with services; a connection and separation detection module detecting connection or separation of an external device; and a list registration... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20100011134 - Loading and executing firmware module without resetting operation: A host communicates a firmware module to an electronic device utilizing a data communication interface (e.g., I2C). The host may also communicate a set of values representing information associated with execution of the firmware module to the electronic device. The host may utilize commands and/or flags to execute the firmware... Agent: Workman Nydegger 1000 Eagle Gate Tower
20100011135 - Synchronization of real-time media playback status: In a system comprising a content performance device, multiple status display devices can communicate with the performance device to receive messages updating status of content being performed by the performance device, or being transmitted to one or more other performance devices. Content performance devices can include computers configured with software... Agent: Apple Inc. C/o Novak Druce + Quigg LLP
20100011136 - Functional dma: In one embodiment, a direct memory access (DMA) controller comprises a transmit control circuit, an offload engine, and a receive control circuit. The transmit control circuit is configured to read first DMA data from an address space in a host. Coupled to receive the first DMA data from the transmit... Agent: Mhkkg, PC/apple, Inc.
20100011137 - Method and apparatus for universal serial bus (usb) command queuing: A method and apparatus for improving performance of mass storage class devices accessible via a Universal Serial Bus (USB) is presented. Performance is improved by providing support in a USB host to allow command queuing and First-Party DMA (FPDMA) to be supported in the mass storage class devices.... Agent: Intel Corporation C/o Cpa Global
20100011138 - Design structure for automated means for determining internet access on a system on a chip: A method for determining Internet access by an autonomous electronic circuit on a system on a chip integrated circuit includes a system bus which is snooped to determine if Internet activity is occurring on the system bus. Local header information is collected when the snooping has determined that Internet activity... Agent: Mcginn Intellectual Property Law Group, PLLC
20100011139 - Network apparatus and method for communication between different components: The present invention discloses a method for communication among different components, including integrating a Network Forwarding Component (NFC) for forwarding messages and at least one Independent Application Component (IAC) for performing other service processing into one network device; setting at least one cooperation mode in the NFC and each of... Agent: Ladas & Parry LLP
20100011140 - Ethernet controller using same host bus timing for all data object access: An Ethernet controller has a host interface for coupling to a host processor and a physical layer transceiver for coupling to a data network and includes multiple data objects having different access times where the data objects communicate with the host interface over an internal data bus. The Ethernet controller... Agent: Patent Law Group LLP
20100011141 - Signal relay device and method for accessing an external memory via the signal relay device: A signal relay device for accessing an external memory is provided. The signal relay device includes a bus arbiter and a burst access engine. The bus arbiter performs bus arbitration among main masters on a bus. The burst access engine exchanges signals with the bus arbiter and an external memory... Agent: PCe Industry, Inc. Att. Steven Reiss
20100011142 - Request controller, processing unit, method for controlling requests and computer program product: A request controller for controlling processing of requests by one or more semiconductor data processing unit. The resource controller includes a controller input for receiving a request for the processing unit to switch a context of the processing unit or to switch the processing unit from a current an operation... Agent: Freescale Semiconductor, Inc. Law Department
20100011143 - Hdmi extender compatible with high-bandwidth digital content protection: A high-definition multimedia interface (HDMI) extender compatible with high-bandwidth digital content protection (HDCP) has a data receiver for receiving video/audio data and a data transmitter for transmitting the video/audio data to a display device. An Ethernet cable consisting of eight cores is connected between the data receiver and the data... Agent: Bacon & Thomas, PLLC
20100011144 - Device for detecting interruptions in a ring bus: A device for detecting interruptions in a ring bus has a first interface configured so that it permits connection of a first free end of a line of the ring bus so that the device transmits data to bus elements of the ring bus via the first interface, a second... Agent: Striker, Striker & Stenby
20100011145 - Dynamic storage resources: A storage server in a distributed content storage and access system provides a mechanism for dynamically establishing storage resources, such as buffers, with specified semantic models. For example, the semantic models support distributed control of single buffering and double buffering during a content transfer that makes use of the buffer... Agent: Daly, Crowley, Mofford & Durkee, LLP
20100011146 - Conveying information with a pci express tag field: A method for determining when all data has been sent for a given PCI Express bus command issued by a backend entity of a PCI Express bus device, by setting a PCI Express bus packet header tag field of a PCI Express bus packet to indicate a backend entity that... Agent: Lng/lsi Joint Customer C/o Luedeka, Neely & Graham, P.C.01/07/2010 > patent applications in patent subcategories. recently filed with US Patent Office
20100005197 - Network device and active control card detecting method: A network device (100) includes a backplane (30), at least one line card (20) and a control card module (10). The control card module includes a first control card (12) and a second control card (14). The first control card or second control card is designated as an active control... Agent: PCe Industry, Inc. Att. Steven Reiss
20100005196 - System and method for distributing user interface device configurations: A system that incorporates teachings of the present disclosure may include, for example, a system having a controller to collect a plurality of User Interface (UI) device configurations, receive a request from a computing device to download one or more of the plurality of UI device configurations, and transmit to... Agent: Akerman Senterfitt
20100005198 - Data input/output system, data input/output system control method and control apparatus: A data input/output system, a data input/output system control method and a data input/output system control apparatus can be provided. In the data input/output system having input and output devices, it is determined and displayed whether an output device can output an input data received from an input device, thereby... Agent: Sidley Austin LLP
20100005200 - Apparatus and method for processing high speed data using hybrid dma: An apparatus and a method for processing high speed data using hybrid Direct Memory Access (DMA) are provided. The method includes determining a size of data to be transmitted, determining a memory access method of the data by comparing the determined size of the data with a first threshold, and... Agent: JeffersonIPLaw, LLP
20100005199 - Direct memory access (dma) data transfers with reduced overhead: A digital processing system, in which a single interrupt to a processor is used in transferring multiple messages in the form of corresponding packets. In an embodiment, a processor continues to write messages to a transmit first-in-first-out (FIFO) along with a length of the message in a header of a... Agent: Texas Instruments Incorporated
20100005201 - Multi-processor system and fluid ejecting apparatus having the same: A multi-processor system includes two or more processors, a message box in which messages are stored which have been sent from a transmitting processor to a receiving processor, which each correspond to one of the two or more processors, at an address in a matrix form which correspond to the... Agent: Townsend And Townsend And Crew, LLP
20100005202 - Dynamic segment sparing and repair in a memory system: A communication interface device, system, method, and design structure for providing dynamic segment sparing and repair in a memory system. The communication interface device includes drive-side switching logic including driver multiplexers to select driver data for transmitting on link segments of a bus, and receive-side switching logic including receiver multiplexers... Agent: Cantor Colburn LLP-ibm Poughkeepsie
20100005203 - Method of merging and incremantal construction of minimal finite state machines: A method of merging at least two state machines includes: mapping a first node from a first state machine to a second node of a second state machine to generate an input pair; performing a depth-first recursive analysis of transitions and nodes in the first state machine and the second... Agent: Cantor Colburn LLP-ibm Europe
20100005204 - Power optimized dynamic port association: A method, device, system, and computer readable medium are disclosed. In one embodiment the method includes dynamically associating a newly active port in a computer system with a first host controller. The first association happens when a total number of currently active ports in the computer system is less than... Agent: Intel Corporation C/o Cpa Global
20100005205 - Device for processing a stream of data words: State of the art processor systems, esp. in embedded systems, are not able to process data under real-time conditions especially with throughput rates near 10 Gbps. So, when using interfaces like PCI Express (PCIe) or Infiniband or 10G-Ethernet for 10 Gbps data throughput, special data-paths have to process the high... Agent: Robert D. Shedd, Patent Operations Thomson Licensing LLC
20100005206 - Automatic read data flow control in a cascade interconnect memory system: Systems and methods for providing automatic read flow control in a cascade interconnect memory system. A hub device includes an interface to a channel in a cascade interconnect memory system for connecting the hub device to an upstream hub device or a memory controller. The channel includes an upstream bus... Agent: Cantor Colburn LLP-ibm Poughkeepsie
20100005207 - Integrated circuit device with multiple communication modes and operating method thereof: An integrated circuit device having multiple communication modes is provided. The integrated circuit device includes a transceiver coupled to first and second data lines. The integrated circuit device further includes a voltage control circuit. The voltage control circuit determines whether or not an external device is connected to the integrated... Agent: F. Chau & Associates, LLC
20100005208 - Efficient execution of memory barrier bus commands: The disclosure is directed to a weakly-ordered processing system and method of executing memory barriers in weakly-ordered processing system. The processing system includes memory and a master device configured to issue memory access requests, including memory barriers, to the memory. The processing system also includes a slave device configured to... Agent: Qualcomm Incorporated
20100005209 - Arbitration device for arbitrating among a plurality of master devices, arbitration method, and video processing device including the arbitration device: An arbitration device arbitrates among master devices such that each master device is allowed to access a shared memory at a predetermined bandwidth, and the arbitration device permits an access request in a first period that a designer has set as desired if the access request has been made by... Agent: Wenderoth, Lind & Ponack L.L.P.
20100005210 - Motherboard with video data processing card capability: The motherboard comprises a CPU and a memory component; further at least one video data processing chip mounted to the motherboard wherein the video data processing chip is programmable; and further at least one additional memory component provided to store a software that is executable by the video data processing... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.
20100005211 - Adapter board assembly: An adapter board assembly includes a board member installed in one slot of a motherboard of an electronic apparatus and having arranged thereon a plurality of electronic devices, signal input ports and signal output ports, a metal frame fixedly provided at one side of the board member for affixing the... Agent: Chenbro Micom Co., Ltd.
20100005212 - Providing a variable frame format protocol in a cascade interconnected memory system: Systems and methods for providing a variable frame format protocol in a cascade interconnected memory system. The systems include a memory hub device that utilizes a first bus interface to communicate on a high-speed bus. The hub device also includes frame decode logic for translating variable format frames received via... Agent: Cantor Colburn LLP-ibm Poughkeepsie
20100005213 - Access table lookup for bus bridge: Cross-bar segment routing and access table address remapping functions are combined within a cross-bar of a system-on-a-chip. In this manner, address remapping may occur prior to segment routing. One or more access table caching registers may be included for each master port. The caching registers may allow for a rapid... Agent: Ibm-rochester C/o Toler Law Group
20100005214 - Enhancing bus efficiency in a memory system: A communication interface device, system, method, and design structure for enhancing bus efficiency and utilization in a memory system. The communication interface device includes a first bus interface to communicate on a high-speed bus, a second bus interface to communicate on a lower-speed bus, and clock ratio logic configurable to... Agent: Cantor Colburn LLP-ibm Poughkeepsie
20100005215 - Control unit including a computing device and a peripheral module which are interconnected via a serial multiwire bus: A control unit includes at least one computing device and at least one separate peripheral module which is connected to the computing device via a serial multiwire bus, the peripheral module including at least one output stage for transferring serial data to means outside of the control unit. In order... Agent: Kenyon & Kenyon LLP
20100005216 - Double network physical isolation circuit: A double network physical isolation circuit includes a north bridge chip, a bus switch circuit, a first memory, and a second memory. The bus switch circuit includes a first and a second bus switch chip. The first and second memories are connected to different networks. The north bridge chip is... Agent: PCe Industry, Inc. Att. Steven ReissPrevious industry: Electrical computers and digital processing systems: multicomputer data transferring or plural processor synchronization
Next industry: Electrical computers and digital processing systems: memory
RSS FEED for 20140410:
Integrate FreshPatents.com into your RSS reader/aggregator or website to track weekly updates.
For more info, read this article.
Thank you for viewing Electrical computers and digital data processing systems: input/output patents on the FreshPatents.com website. These are patent applications which have been filed in the United States. There are a variety ways to browse Electrical computers and digital data processing systems: input/output patent applications on our website including browsing by date, agent, inventor, and industry. If you are interested in receiving occasional emails regarding Electrical computers and digital data processing systems: input/output patents we recommend signing up for free keyword monitoring by email.
Results in 0.6755 seconds