Electrical computers and digital data processing systems: input/output inventions 07/08

20080183903 - Systems and methods for providing dynamic memory pre-fetch: Systems and methods for providing dynamic memory pre-fetch. Embodiments include a hub device including an input command stream interface and an adaptive pre-fetch logical unit (APLU). The input command stream interface detects commands from a memory controller directed to one or more memory devices that are connected to the hub... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20080183904 - Digital signal processor using handshake interfacing and operating method thereof: Provided are a digital signal processor controlled according to handshake interfacing and a method of operating the digital signal processor. The method of operating the digital signal processor may comprise receiving a request signal for executing an application program from an external device, reading an address corresponding to the request... Agent: Harness, Dickey & Pierce, P.L.C

20080183906 - Configurable backplane connectivity for an electrical device: A method comprises obtaining connectivity information from a plurality of electrical devices. Each such electrical device is separately coupled to a backplane, and at least one electrical device comprises a plurality of electrical interfaces adapted to be selectively coupled to each of multiple other electrical devices. Based on connectivity information... Agent: Hewlett Packard Company

20080183905 - System and method of seamlessly switching between embedded and external functions on a multi-function printer: A method and apparatus for launching a host application of an image handling device, determining external functions for the image handling device, storing information regarding available external functions determined by the determining in a configuration file, presenting a graphical interface that includes selectable graphical indicia representing each function accessible on... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080183908 - Control of data transfer: A system for managing data transfer using an operating system address space, the address space comprising a user space and a kernel space, the system comprising a data buffer in the kernel space and a control module for the data buffer in the user space, the system further comprising a... Agent: Hewlett Packard Company

20080183907 - Data packet processing device: A device for data packet processing is disclosed. In one embodiment, the device includes a processor implemented on a chip, an on-chip internal segment memory accessible by the processor, an off-chip external segment memory and a data transfer channel between the internal segment memory and the external segment memory. The... Agent: Dicke, Billig & Czaja

20080183909 - Apparatus and method for controlling usb operation: An apparatus and method for controlling a USB operation, whereby the USB operation can be controlled without unplugging a USB cable while maintaining a charge state from a host device. The USB apparatus includes a USB connector to which a USB cable connected to a host device is connected, and... Agent: Stein, Mcewen & Bui, LLP

20080183911 - Hands-free controller: The present invention is a hands free controller with a foot controlled handsfree pushbutton based wireless remote control electronic device designed specifically for the seamless and simple integration with digital music devices (DMD) such as the iPod/MP3/Zune and provides: hands-free control of playback and volume, and the ability to navigate... Agent: Michael Ries

20080183910 - Personal medical device (pmd) docking station: A method and system for controlling and monitoring various functions of a personal medical device attached to a docking station, wherein the docking station may include technology to provide power, incremental I/O, control signals and/or a secured physical receptacle for various personal medical devices, and the docking station may be... Agent: Darby & Darby P.C.

20080183912 - Coprocessor command synchronization using a dma channel: Coprocessor systems for using a main microprocessor DMA channel to write to a port to control a coprocessor system are provided. In certain examples, coprocessor systems are described using a main CPU counter to trigger a DMA channel to perform a single byte transfer to a port used to control... Agent: Pitney Bowes Inc. 35 Waterview Drive

20080183913 - Method and apparatus for determining priorities in direct memory access device having multiple direct memory access request blocks: A priority determining method and apparatus can reduce a total waiting time of DMA request blocks by granting priority to each of Direct Memory Access (DMA) request blocks transmitting a DMA request signal, based on Data Transfer Amounts (DTAs) of the DMA request blocks and Arrival Times (ATs) of the... Agent: Staas & Halsey LLP

20080183914 - Method of and apparatus for addressing a target device within a chain of devices: A method of addressing a target device within a chain of devices, the method comprising a sending device setting an address value and sending data in association with the address value, and wherein each device receiving the address value and data compares the address value to a device number, and... Agent: Wolf Greenfield & Sacks, P.C.

20080183915 - Communication system, communication device and flow control method: A communication system complying with SPI-4 Phase 2 standard includes a local device, an opposing device, a first data channel to transfer payload data from the local to the opposing device, a second data channel opposed to the first data channel, and a first status channel to be able to... Agent: Foley And Lardner LLP Suite 500

20080183917 - Out-of-band signaling support over standard optical sfp: An out-of-band to optical conversion component is provided that uses a transmit disable signal and a receive loss of signal (LOS) signal built into optical small form-factor pluggable transceiver and cable to pass the out-of-band protocol between serial attached SCSI enclosures. The transmit disable signal, when asserted, turns off the... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20080183916 - Using extreme data rate memory commands to scrub and refresh double data rate memory: In a first aspect, a first method of interfacing a processor and memory is provided. The first method includes the steps of (1) providing a processor adapted to issue a command complying with a first protocol; (2) providing a memory coupled to the processor and accessible by a command complying... Agent: Ibm Corporation, Intellectual Property Law

20080183918 - Extending flash drive lifespan: In a computer-implemented method for filtering input/output operations of a flash drive, an input/output request directed toward a flash drive is received. It is determined whether the input/output request is associated with a high volume write operation. If the input/output request is associated with the high volume write operation, a... Agent: Microsoft Corporation

20080183919 - Simple bus buffer: A bus buffer can include a data buffer and a clock signal buffer. The data buffer for can include two symmetrical buffer circuits with an output signal that can follow the input voltage to provide bi-directional buffer action for a data path of the bus buffer. The clock buffer can... Agent: Akerman Senterfitt

20080183920 - Buffer management for wireless usb isochronous in endpoints: An apparatus such as a Device Wire Adapter (DWA) with improved buffer management and packaging of Wireless Universal Serial Bus (WUSB) isochronous packets for transmission to a host. The apparatus includes an isochronous IN endpoint that receives data segments from a device function. Memory is associated with the endpoint and... Agent: Stmicroelectronics, Inc.

20080183921 - Serial advanced technology attachment (sata) frame information structure (fis) processing: A method and apparatus improves a link rate to a plurality of storage devices accessible through a port multiplier. An SATA/STP Transport Layer Transmit Processor in a FIS-based switching Port Multiplier system may service a next task to be transmitted to a next device accessible through the port multiplier even... Agent: Intel Corporation C/o Intellevate, LLC

20080183922 - Method, apparatus and software for processing input or output requests for a mirrored storage volume: A method, apparatus and software is disclosed for processing input/output (I/O) requests for a mirrored storage volume in recovery mode in which the processing of normal I/O is optimised using the recovery map for the volume.... Agent: Hewlett Packard Company

20080183923 - Determining an optimal data transfer rate via a transfer medium: Sequences that respectively comprise different data are transmitted via a transfer medium, the transfer quality being detected in accordance with the transmitted sequences. Accordingly, the sequences to be transmitted are assigned to several chronologically sequential stages, the sequences that are assigned to one stage having a pre-definable interval in terms... Agent: Bell, Boyd & Lloyd, LLP

20080183924 - Clock circuitry architecture to improve electro-magnetic compatibility and optimize peak of currents in micro-controller: A system comprises a central processing unit and a set of peripheral units accessible by the CPU and being able to be driven by the same clock source. At least one programmable delay line is located in the clock branch of one of the peripheral units and has a delay... Agent: Schwegman, Lundberg & Woessner / Atmel

20080183926 - Communications system and method with multilevel connection identification: An embodiment includes a communication medium coupled to a plurality of the functional blocks in an integrated circuit. Three or more of the initiator functional blocks communicate with a target functional block by sending requests having an associated identifier to indicate a transaction stream that the request is part of.... Agent: Rutan & Tucker, LLP.

20080183925 - Memory command and address conversion between an xdr interface and a double data rate interface: A command translation method, apparatus and system are provided for interfacing a processor and a memory. The processor initiates a memory system command in an extreme data rate (XDR) command format which is automatically converted by the command translation method, apparatus and system into a memory system command in a... Agent: Ibm Corporation Department 417

20080183927 - Shared rf bus structure: A device includes a plurality of ICs and an RF bus structure. Each IC includes a plurality of circuit modules, a switching module, an RF bus transceiver, an antenna interface, and an antenna structure. The switching module provides controlled access to the RF bus transceiver, which communicates via the RF... Agent: Garlick Harrison & Markison

20080183928 - Addressable serial peripheral interface: An addressable SPI bus and an associated communication protocol. The addressable SPI bus comprises a plurality of slaves each exhibiting a particular address and a shift register whose output is connected to a common MISO bus by a buffer exhibiting a three state output, also known as a tri-state output.... Agent: Microsemi Corp - Amsg Ltd.

20080183929 - Method and devices for transmitting data on a data line between a control device and at least one decentralized data processing device: A method of transmitting data on a data line between a central control device and a decentralized data processing device. During a normal operation of the system, the central control device periodically sends synchronization pulses to the at least one data processing device via the data line in order to... Agent: Lerner Greenberg Stemer LLP

20080183931 - Method, system and device for handling a memory management fault in a multiple processor device: A method or device handles memory management faults in a device having a digital signal processor (“DSP”) and a microprocessor. The DSP includes a memory management unit (“DSP MMU”) to manage memory access by the DSP, and the DSP and the microprocessor access shared physical memory. Upon the DSP executing... Agent: Texas Instruments Incorporated

20080183930 - Profiling collector for computer system: In one embodiment a computer system comprises one or more processors and a memory module communicatively connected to the one or more processors. The memory module comprises logic instructions which, when executed on the one or more processors configure the one or more processors to receive an interrupt in an... Agent: Hewlett Packard Company

20080183932 - Talking webcam: The invention relates to a talking webcam mainly composed of a camera and a network phone. The network phone includes a USB hub integrated circuit, a USB network phone integrated circuit, an audio amplifier circuit and an echo killer in conjunction with a key set, an earphone jack, a speaker,... Agent: Wei Hsu

20080183933 - Removable interface card expansion module: A removable interface card expansion module slidably disposed in a case for the insertion of at least one interface card is provided. An opening is opened in the case, and a mainboard having at least one interface card slot corresponding to the interface card is disposed in the case. The... Agent: Morris Manning Martin LLP

20080183934 - Optional mobile media storage system: A data storage system that retrieves and stores data to a mobile random access memory device that can virtually function as any number of variable storage media is accomplished by a switching means linked to the mobile random access memory device. The storage system generally possesses at least one mobile... Agent: Spectra Logic C/o Hiscock & Barclay, LLP

20080183935 - Interface adapter: Field devices for measuring a pressure or a fill level are connected, by way of a cable connection or a radio connection, to stationary evaluation- and display devices. To provide flexible parameterization or flexible measured-value inquiry, a connection box for the wireless transmission of signals between the field device and... Agent: Fay Kaplun & Marcin, LLP

20080183936 - Bus bridge and arbitration method: A bus bridge is connected to a first bus and a second bus. In the bus bridge, an arbiter grants ownership of the first bus to one of a plurality of devices connected to the first bus. A detecting unit detects a read cycle initiated by the device on the... Agent: Snell & Wilmer L.L.P. (matsushita)

20080183937 - Method and apparatus to reduce emi emissions over wide port sas buses: A mechanism is provided for selecting IDLE patterns based on data being transmitted on the different ports of a wide lane serial attached small computer system interface cable. The mechanism examines the frequency content of the data bearing lanes and selects a DWORD to transmit for an IDLE that has... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20080183938 - Architecture to connect circuitry between customizable and predefined logic areas: An integrated circuit comprises a predefined logic area including a microprocessor coupled to a plurality of peripheral devices including an external bus interface over a system bus. A customizable logic area is accessible by the microprocessor over the system bus. A first I/O bus sends data to an external device.... Agent: Schwegman, Lundberg & Woessner / Atmel

20080183939 - Tapping systems and methods: A device may include a link configured to transmit signals. The signals may provide at least one network topology, such as a bus. A tapping structure may be connected to the device using, for example, at least one of a snap fit, a friction fit or an interference fit. The... Agent: Workman Nydegger

20080183940 - Computer switch having integrated direct connection and scan interface structures: A computer switch having integrated direct connection and scan interface structures is mainly developed for improving upon the features under the framework of a CAT5 KVM switch, and in particular adopting under the structure of a switch of scan switch UART type. The switch can still be electrically-connected to control... Agent: Lin & Associates Intellectual Property, Inc.

20080183941 - Hardware assisted bus state transition using content addressable memories.: A universal peripheral processor architecture on an integrated circuit (IC) includes a first data bus and a second data bus communicating with first and second ternary content addressable memory (TCAM) devices configured as state machines. First and second processors are coupled to the first bus interface logic and the second... Agent: Scully, Scott, Murphy & Presser, P.C.

20080183942 - Sharing memory interface: A device and a method for sharing a memory interface are disclosed. According to preferred embodiments of the present invention, a supplementary control unit included in a digital processor can control some of the pins, constituting a memory interface, to be shared by a plurality of memory. With the present... Agent: Husch Blackwell Sanders LLP

20080177900 - Medical device including a slider assembly: A medical system includes an input assembly for receiving one or more user inputs. The input assembly includes at least one slider assembly for providing an input signal. Processing logic receives the input signal from the input assembly and provides a first output signal and a second output signal. A... Agent: Holland & Knight LLP

20080177901 - Communication error information output method, communication error information output device and recording medium therefor: A method and device of outputting information related to a communication error including obtaining a communication log containing a communication message delivered between a second device and a third device in accordance with a control message transmitted from a first device to the second device. A non-transmitted control message specifying... Agent: Staas & Halsey LLP

20080177902 - Hierarchical enclosure management services: A configuration of an array of storage devices compliant with a fibre-channel arbitrated loop (FC-AL) specification includes first and second controllers having integrated first and second SCSI enclosure services (SES) processing devices acting as leader processors. Third and fourth controllers are coupled to the first and second controllers and act... Agent: Ingrassia Fisher & Lorenz, P.c. (ibm)

20080177903 - System and method for aggregating shelf ids in a fibre channel storage loop: A modular fibre channel information handling system includes a storage processor and multiple associated fibre channel data storage enclosures. The storage processor and the fibre channel data storage enclosures are connected by a fibre channel storage loop. The storage processor includes an identification engine operable to assign device addresses to... Agent: Baker Bolls L.l.p. One Shell Plaza

20080177904 - Automatic configuration of peripheral devices: A method for automatically Configuring peripheral devices performs a device assessment resulting in a list of available peripheral devices currently connected to the computer, calculates a configuration setting value from the list, and compares the configuration setting value to other values in a settings repository. If there is a match,... Agent: Lumen Patent Firm, Inc.

20080177905 - Peripheral switching device and a peripheral switching control device: A peripheral switching device includes an ownership switch request receiver unit configured to receive an ownership switch request for requesting to assign a peripheral to an operating system; an ownership request holding unit configured to receive and hold an ownership request for requesting to ensure or release an ownership of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.

20080177906 - Storage control system and control method for storage control system: A storage control system of the present invention can carry out settings for a storage device using redundantly configured access channels. A controller of the storage control system can access a storage device using a plurality of access channels of system A and system B. Respective I/F control units each... Agent: Mattingly, Stanger, Malur & Brundidge, P.c.

20080177907 - Method and system of a peripheral port of a server system: A method and system of a peripheral port of a server system. At least some of the illustrative embodiments are a server system comprising a processor, a non-volatile storage device coupled to the processor, a peripheral port coupled to the processor, and an indicator coupled to the processor (and the... Agent: Hewlett Packard Company

20080177908 - Method and apparatus for detecting the type of interface to which a peripheral device is connected: A peripheral device is connectable to a computer having one of a first interface and a second interface. The first interface communicates with the peripheral device over a differential data connection having a first data conductor and a second data conductor. The second interface communicates with the peripheral device over... Agent: Westman Champlin (microsoft Corporation)

20080177909 - Content terminated dma: A Content-Terminated Direct Memory Access (CT-DMA) circuit autonomously transfers data of an unknown length from a source to a destination, terminating the transfer based on the content of the data. Filter criteria are provided to the CT-DMA prior to the data transfer. The filter criteria include pattern data that are... Agent: Qualcomm Incorporated

20080177910 - Data reproducing apparatus, content management method, program, and storage medium: A data reproducing apparatus comprises: a reproducing unit adapted to read out data from a plurality of recording media; a list generating unit adapted to generate a content list which describes storage location information in association with contents stored in the plurality of recording media; and a communication unit adapted... Agent: Cowan Liebowitz & Latman P.c. John J Torrente

20080177911 - Multi-component module fly-by output alignment arrangement and method: A method and multi-component electronic module device are provided that control the timing of output of data from a plurality of components on the multi-component module. One or more of the components are programmed to delay outputting data by a corresponding amount of time. In one embodiment, the one or... Agent: Edell, Shapiro & Finnan, Llc

20080177912 - Semiconductor integrated circuit and data processing system: A semiconductor integrated circuit includes: a central processing unit; an external memory interface circuit; a network interface circuit; an image processing unit; and a data compression unit. The image processing unit performs image processing in response to an input from an external bus, the image processing unit is coupled to... Agent: Miles & Stockbridge Pc

20080177913 - Memory systems and memory access methods: A memory system includes a first memory unit, a transmission bus having an impedance, and a memory controller having a first on-die termination circuit, coupled to the first memory unit through the transmission bus. The first on-die termination circuit matches the impedance of the transmission bus in response to the... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080177914 - Hardware support system for accelerated disk i/o: A hardware support system for implementing accelerated disk I/O for a computer system. The system includes a bus interface for interfacing with a processor and a system memory of the computer system, a disk I/O engine coupled to the bus interface, and a device interface coupled to the disk I/O... Agent: Murabito Hao & Barnes LLP

20080177915 - Communication in accordance with a master-slave communication protocol: A communication apparatus for communication according to a master-slave communication protocol is formed as a slave instance communicating with a master instance via a bus. The master instance is operative to switch the bus into a bus suspend state if no bus activity is present during a predetermined interval. In... Agent: Dickstein Shapiro LLP

20080177917 - Apparatus, system, and method for automatically resetting an inter-integrated circuit bus: An apparatus, system, and method are disclosed for resetting an inter-integrated circuit (I2C) bus slave. A data line resistor in series is provided with a data line of an I2C bus in communication with the I2C bus slave. A clock line resistor in series is provided with a clock line... Agent: Kunzler & Mckenzie

20080177916 - Apparatus, system, and method for resetting an inter-integrated circuit data line using a negative voltage: An apparatus, system, and method are disclosed for resetting an inter-integrated circuit (I2C) data line with negative voltage. A hang detection module detects an I2C hung line selected from a data line and a clock line wherein an I2C bus master and I2C bus slave communicate over the data line... Agent: Brian C. Kunzler Kunzler And Associates

20080177919 - Communication system and method for assigning addresses: A master ECU instructs door actuators having a counter value of θ n (where n=1,2,3) to set the address n as their unique network addresses. A control unit in each door servo actuator determines whether a counter value (θ n) that is the subject of a query from the master... Agent: Posz Law Group, Plc

20080177918 - Method and apparatus for controlling timing of state transition of serial data line in 12c controller: A method and apparatus for controlling the timing of a state transition of a serial data line (SDA) in an I2C controller are provided. The apparatus includes a processor, a serial clock line (SCL) edge detector, a counter, and an SDA generator. The processor controls an I2C controller. The SCL... Agent: Sughrue Mion, Pllc

20080177920 - Methods for handling keyboard inputs: A computer implemented method of processing keyboard input, the method including receiving a keyboard type of a keyboard coupled an information handling system, receiving keyboard input from the keyboard and processing the keyboard input as a function of the keyboard type.... Agent: Andrea E. Tran Pramudji Wendt & Tran, LLP

20080177921 - Terminal apparatus and control program thereof: In a terminal apparatus, the central control section 1-10 judges whether or not a function accompanied with an audio output is in operation when a change in a folding opening/closing state of the terminal apparatus is detected by the folding open/close detecting section 1-6, and changes the priority of the... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20080177922 - Mass production testing of usb flash cards with various flash memory cells: A high volume testing/formatting process is provided for Universal Serial Bus-based (USB-based) electronic data flash cards (USB devices) that meets the increasing demand for USB electronic data flash cards (USB devices). A test host is simultaneously coupled to the multiple USB devices (e.g., using a multi-port card reader or a... Agent: Blakely Sokoloff Taylor & Zafman LLP

20080177924 - Expansion device for bios chip: A motherboard assembly of a computer includes a motherboard (80) and an expansion device. The expansion device is connected to the motherboard. The expansion device includes a BIOS chip (10), a first connector (20) and at least one second connector (30). The first connector is connected to a socket (40)... Agent: Pce Industry, Inc. Att. Cheng-ju Chiang

20080177925 - Hardware support system for accelerated disk i/o: A hardware support system for implementing accelerated disk I/O for a computer system. The system includes a bus interface for interfacing with a processor and a system memory of the computer system, a disk I/O engine coupled to the bus interface, and a device interface coupled to the disk I/O... Agent: Murabito Hao & Barnes LLP

20080177923 - Memory system and method having volatile and non-volatile memory devices at same hierarchical level: A processor-based system includes a processor coupled to core logic through a processor bus. This includes a dynamic random access memory (“DRAM”) memory buffer controller. The DRAM memory buffer controller is coupled through a memory bus to a plurality of a dynamic random access memory (“DRAM”) modules and a flash... Agent: Dorsey & Whitney LLP Intellectual Property Department

20080177926 - Log memory access circuit, information processing apparatus: A log-memory access circuit includes a log memory that stores a log; a connection-channel switching unit that switches between a first connection channel that connects a first access apparatus for accessing the log memory and the log memory and a second connection channel that connects a second access apparatus for... Agent: Staas & Halsey LLP

20080172498 - System and apparatus for managing interactive content, advertising, and devices: A memory device and system for managing links to content or digital assets in an on-line, network or software application environment. The links and digital assets may be represented by unique identifiers and pointers or similar data. The memory device can take the form of a piece of jewelry, handheld... Agent: Blakely Sokoloff Taylor & Zafman

20080172499 - Virtual machine system: The present invention provides a machine system that enables the arbitration of IO accesses and band control based on the priority of virtual servers while curbing performance overhead during IO sharing among the virtual servers. A virtual machine system including a CPU, a memory, and an IO interface includes a... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080172500 - Memory system and method accessing memory array via common signal ports: A memory system and method of operation are disclosed. The system includes a memory device having multiple RAMs, and a memory controller having a plurality of controllers, each one of the plurality of controllers is configured to generate an address signal and a control signal controlling read/write operations in a... Agent: Volentine & Whitt PLLC

20080172502 - Portable computer: A portable computer is provided. The portable computer includes a motherboard, a first display, a second display, a non-volatile memory device, and a microprocessor, wherein the motherboard includes an audio circuit. When the motherboard is shut down and the microprocessor receives a playing command, the microprocessor enables the audio circuit... Agent: Jianq Chyun Intellectual Property Office

20080172501 - System and method for providing pcie over displayport: An apparatus and method is disclosed for providing an extensible information handling system (IHS) bus implemented on predetermined channels of a digital video interface. IHS video signal information is multiplexed with IHS bus information by a host multiplexer for transmission across a digital video connector. The multiplexed IHS video signal... Agent: Hamilton & Terrile, LLP

20080172503 - System and method for dynamically assigning i/o priority: A system for controlling I/O transfers includes a host system or initiator including an adapter driver layer; and a storage controller. The storage controller includes a priority store and an operation queue. The adapter driver is selectively responsive to a datapath command from an initiator application for setting a default... Agent: Randall J. Bluestone IBM Corporation

20080172504 - Interactive control apparatus using remote control signal between computer and electric home appliance: An interactive control system using a remote control signal in accordance with HDMI-CEX standards between a computer and an electric home appliance performs power supply control and screen display from a PC to a television, power supply control from the television to the PC, and application control on the PC.... Agent: Staas & Halsey LLP

20080172505 - Electronic device, control method, and program product: An electronic device controlled by control software stored in a volatile memory, wherein said software is retained in the memory and said electronic device is stopped after executing steps to initialize said software.... Agent: Frank Pincelli Patent Legal Staff

20080172506 - Network device interface for digitally interfacing data channels to a controller via a network: A communications system and method are provided for digitally connecting a plurality of data channels, such as sensors, actuators, and subsystems, to a controller using a network bus. The network device interface interprets commands and data received from the controller and polls the data channels in accordance with these commands.... Agent: Alston & Bird, LLP

20080172507 - Methods and apparatus for synchronizing a plurality of processors: In a first aspect, a first method of synchronizing a plurality of processors of a system is provided. The first method includes the steps of (1) modifying a peripheral component interconnect express (PCIe) protocol to include a completion status encode associated with a synchronization command that indicates whether a condition... Agent: Ibm Corporation Intellectual Property Law Dept. 917

20080172508 - Method and an arrangement for arbitrating requests to grant access to shared resources: The present invention relates to a method for arbitrating requests from masters to grant access to shared resources, wherein each master has an individual weight. The method comprises the steps of assigning time slots to the masters depending on the weights of the masters, mapping the current time slot index... Agent: W. Riyon Harding International Business Machines Corporation

20080172509 - Data processor and semiconductor integrated circuits: This invention provide a data processor capable of multiplexing data transfers with desired data transfer characteristics guaranteed, without multiplexing buses. The data processor includes: a transfer path that mutually connects plural processors and plural transfer element circuits such as memory; an arbitration circuit that controls data transfer in the transfer... Agent: Miles & Stockbridge PC

20080172510 - Parallel bus architecture and related method for interconnecting sub-systems utilizing a parallel bus: A parallel bus architecture is disclosed. The parallel bus architecture includes: a first sub-system comprising at least a first master device and at least a first slave device, wherein the first master device can access the first slave directly; a second sub-system comprising at least a second master device and... Agent: North America Intellectual Property Corporation

20080172511 - Multiprocessor system: The present invention provides a technique capable of processing a plurality of interrupt causes sharing one interrupt request in different processors. An interrupt controller outputs an interrupt request when the interrupt request shared by a plurality of interrupt causes is notified. The interrupt request output by the interrupt controller is... Agent: Mcdermott Will & Emery LLP

20080172512 - Network card with built-in card reader: An exemplary wireless network card includes a wireless network card controller, a bus interface having two input ports and one output port, and a card reader controller, wherein the wireless network card controller and the card reader controller are connected to the inputs port of the bus interface respectively, and... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang

20080172513 - Computer and built-in flash memory storage device thereof: A computer comprises a mother board. A CPU, a chipset and a flash memory storage device are configured on the mother board. Wherein, the chipset is coupled to the CPU and coupled to the flash memory storage device through a USB bus, so that the CPU is able to access... Agent: Jianq Chyun Intellectual Property Office

20080172514 - Packet communication device which selects an appropriate operation mode: A packet communication device autonomously selects an appropriate operation mode according to a connection environment to an external device before a service of the device is started. When the device is connected to the external buses, connection interface units notify an external device discrimination unit of connection of the device.... Agent: Foley And Lardner LLP Suite 500

20080168186 - I/o adapter lpar isolation with assigned memory space using pcie requestor ids: A data processing system and method of isolating a plurality of I/O adapters in the system. The data processing system also comprises a set of processors communicating with the I/O adapters using a PCIe protocol. Each of the I/O adapters has a respective ID. In the preferred embodiment the commands... Agent: International Business Machines Corporation

20080168187 - Web configurable human input devices: A web configurable human input device is provided. The device includes at least one mechanical control element having a dynamically alterable appearance. In some embodiments, the appearance of the at least one mechanical control element is dynamically altered in response to the execution of an input device web script. An... Agent: Westman Champlin (microsoft Corporation)

20080168188 - Symbiotic smart peripherals: Systems and methods for augmenting the functionality of a device using a virtual machine monitor is provided. In general, in one aspect, a computer implemented method is provided. The computer implemented method includes launching a virtual machine monitor on a host device and for a peripheral device. The virtual machine... Agent: Fish & Richardson P.C.

20080168189 - Conditional activation and deactivation of a microprocessor: Conditional activation and deactivation of a microprocessor. A hardware portion of an apparatus performs packet processing on received data, where the hardware portion selectively decodes the received data. A microprocessor performs data processing on decoded data, where the microprocessor is conditionally activated for performing the data processing and is conditionally... Agent: Wagner Blecher LLP

20080168190 - Input/output tracing in a protocol offload system: I/O tracing is implemented in a system in which an I/O device is configured for protocol offload. A data unit having headers and payload is replicated and the replicated unit sent to the end node along with the payload data. In an alternative embodiment, the I/O device keeps track of... Agent: Hewlett Packard Company

20080168191 - Barrier and interrupt mechanism for high latency and out of order dma device: A direct memory access (DMA) device includes a barrier and interrupt mechanism that allows interrupt and mailbox operations to occur in such a way that ensures correct operation, but still allows for high performance out-of-order data moves to occur whenever possible. Certain descriptors are defined to be “barrier descriptors.” When... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20080168192 - Apparatus and method of tracing descriptor in host controller: Apparatus and method of tracing descriptor in a host controller are provided. The host controller for controlling a device includes a first bus interface coupled to a system bus, a processor which determines whether data received from a system memory through the first bus interface are descriptor data, and a... Agent: Sughrue Mion, PLLC

20080168193 - Use of unique identifiers for each data format supported by a multi-format data store: Provided are techniques for storing data. An Input/Output (I/O) command is received, wherein the I/O command includes a unique identifier that is associated with one region of a multi-format data store. The unique identifier is used to select an I/O channel from among multiple I/O channels, wherein each I/O channel... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080168194 - Low latency send queues in i/o adapter hardware: Send queues provided in an InfiniBand hardware adapter receive a single transmission from a connected computer system which includes work request information, address vector, and message data. This information is sufficient for the adapter to generate packet header information and to send the requested message, thereby providing a low latency... Agent: International Business Machines Corporation

20080168195 - Method for provision of data objects in a digital image information system: In a method for provisioning data objects in a digital image information system controlled by an electronic data management device, the digital image information system having an image storage system with at least one non-volatile image data storage for storage of the data objects and at least one client with... Agent: Schiff Hardin, LLP Patent Department

20080168196 - Communications module interface: A communications module including an electrical interface for operatively connecting the communications module to an electric device is disclosed. The electric interface enables data communication between the communications module and the electric device in either a serial mode or parallel mode. The communications module includes: one or more electrical connectors... Agent: Harness, Dickey & Pierce, P.L.C

20080168197 - Peripheral device for connection with a host: A peripheral device for connecting to a host includes a body and a peripheral connector attached to the body. The peripheral connector is connectable to a connector of the host. The peripheral device is configured to facilitate manual attachment to the host and to impede manual detachment from the host.... Agent: Mark M. Friedman

20080168198 - Apparatus and method for serial to parallel in an i/o circuit: A serial to parallel I/O circuit apparatus includes M sequential logic circuits and each of them includes a first D-type flip-flop for receiving one bit of input data, and the output of each the first D-type flip-flop connects to the input of a first D-type flip-flop of a next stage.... Agent: Birch Stewart Kolasch & Birch

20080168199 - Dynamic readjustment of power: System and methods for the dynamic readjustment of power are provided. In one embodiment a communications system comprises a base station including one or more radio head interface modules and a signal processing module, the radio head interface modules adapted to communicate with the signal processing module. The signal processing... Agent: Fogg & Powers LLC

20080168200 - Method of compensating for propagation delay of tri-state bidirectional bus in a semiconductor device: A semiconductor device for detecting and compensating for a propagation delay of a tri-state bidirectional bus connected between a master block and a plurality of slave blocks. The master block controls the slave blocks. A bidirectional bus connects the master block and each of the slave blocks and accommodates transmission... Agent: Volentine & Whitt PLLC

20080168201 - Methods and systems for time keeping in a data processing system: Data processing systems with interrupts and methods for operating such data processing systems and machine readable media for causing such methods and containing executable program instructions. In one embodiment, an exemplary data processing system includes a processing system, an interrupt controller coupled to the processing system and a timer circuit... Agent: Apple Computer, Inc./blakely

20080168202 - Directly initiating by external adapters the setting of interruption initiatives: The setting of interruption initiatives is directly initiated by external adapters. An adapter external to the processors at which the initiative is to be made pending sends a request directly to a system controller coupled to the adapter and the processors. The system controller then broadcasts a command to the... Agent: Heslin Rothenberg Farley & Mesiti P.C.

20080168203 - Data processing system with interrupt controller and interrupt controlling method: The present invention relates to a data processing system comprising a first interrupt controller with an interrupt source interface, an interrupt controller interface, prioritizing means, and an interrupt controller output. The Data processing system further comprises a processing unit providing an interrupt controller interface. The invention also is related to... Agent: Philips Intellectual Property & Standards

20080168204 - Information handling system card: An information handling system card (IHS card) includes a base having a first end. A first card connector is located on the first end and is operable to electrically couple to a first information handling system connector (IHS connector) located on an information handling system (IHS), wherein the first IHS... Agent: Haynes And Boone, LLP

20080168205 - Functional adapter for a consumer electronic device: A modular system comprising a host, a consumer electronic device, and an adapter coupling the consumer electronic device to the host. The adapter performs a first function of supplying at least one service provided by one of the host and the consumer electronic device to the other of the host... Agent: Whirlpool Patents Company - Md 0750

20080168206 - Methods and apparatus for interfacing a processor and a memory: In a first aspect, a first method of interfacing a processor and memory is provided. The first method includes the steps of (1) providing a computer system including (a) a first memory; (b) a processor adapted to issue a functional command to the first memory; (c) a translation chip; (d)... Agent: Ibm Corporation, Intellectual Property Law

20080168207 - I/o adapter lpar isolation in a hypertransport envikronment employing a content addressable memory: A data processing system and method of isolating a plurality of I/O adapters in the system. The data processing system also comprises a set of processors, a host bridge including a content addressable memory, and a system bus connecting the set of processors and the host bridge. Each of the... Agent: International Business Machines Corporation

20080168208 - I/o adapter lpar isolation in a hypertransport environment with assigned memory space indexing a tvt via unit ids: A data processing system and method of isolating a plurality of I/O adapters in the system. The data processing system also comprises a set of processors, a host bridge, and a system bus connecting the set of processors and the host bridge. Each of the I/O adapters has a respective... Agent: International Business Machines Corporation

20080162734 - Computer system and a chipset: When the entire system is split into plural partitions on chipsets connecting plural processors, IO hubs, and memory controllers, and an OS is operating on each of the partitions, the present invention prevents a failure in a partition from propagating to other partitions. Based on address information or issuer information... Agent: Mattingly, Stanger, Malur & Brundidge, P.c.

20080162733 - Enumeration of devices on a memory channel: According to one embodiment, a method is disclosed. The method includes receiving a bit pattern value at a first memory device from a host device via an interface to establish a first sideband address and the first memory device receiving a unique device identification (ID) from the host device.... Agent: Intel/blakely

20080162735 - Methods and systems for prioritizing input/outputs to storage devices: Embodiments include methods, apparatus, and systems for prioritizing input/outputs (I/Os) to storage devices. One embodiment includes a method that receives an input/output (I/O) command having a group number field and a priority number field at a target device. The method then generates a new priority value based on the group... Agent: Hewlett Packard Company

20080162736 - Image processing system, image forming system, information processing system, image processing method, information processing method and computer readable medium: An image processing system includes: a receiving section that receives print information including at least a first control command indicating a first print setting and a second control command embedded in a document to be printed and indicating a second print setting; an interpreting section that interprets the first control... Agent: Oliff & Berridge, Plc

20080162737 - Usb controller with full transfer automation: A USB controller and method of implementing a full transfer automation mode is described. The USB controller may have a host interface module configured to generate hardware logic signals for communication to a backend module having buffer memory. The backend module may be configured to generate hardware logic signals for... Agent: Brinks Hofer Gilson & Lione/sandisk

20080162738 - Input/output device with configuration, fault isolation and redundant fault assist functionality: An I/O device is provided for use in a process control system having a controller operating under a particular version of communication software. The I/O device has a storage device for storing a plurality of potential versions of I/O communication software. An I/O device processor determines the particular version of... Agent: Marshall, Gerstein & Borun LLP (fisher)

20080162739 - Gpio mux/dynamic port configuration: Dynamically configurable routing logic coupled between physical I/O ports and special purpose I/O associated with functions within a panel ASIC is disclosed that provide different routing configurations between the physical I/O ports and the special purpose I/O. In one routing configuration, any special purpose output can be coupled to one... Agent: Apple C/o Morrison And Foerster ,llp Los Angeles

20080162740 - Standalone data storage device electromagnetic interference test setup and procedure: A method for operating a data storage device having a plurality of sectors and at least one port, each port having a transmitter and a receiver, is disclosed. In one embodiment the method includes coupling at least one of the transmitters to at least one of the receivers, providing power... Agent: Haynes And Boone, LLP

20080162741 - Wireless usb hub: This invention provides a Wireless USB hub that includes a first port configured to communicate with a wired USB enabled device, a second port configured to communicate with a first wireless USB enabled device, and a controller that detects the wired USB enabled device and presents the wired USB enabled... Agent: Haynes And Boone, LLP

20080162742 - Method of creating and managing session between wireless universal serial bus host and wireless universal serial bus device and providing wireless universal serial bus host and wireless universal serial bus device: Provided is a session management method of managing a session created between a wireless universal serial bus (USB) host and a wireless USB device through a wireless network, the session management method including: receiving session status messages periodically transmitted for checking a status of the created session; counting a number... Agent: Stein, Mcewen & Bui, LLP

20080162743 - Method and apparatus to select and modify elements of vectors: A method and apparatus to permute a given set of elements utilizing a permutation network which uses nodes and edges. The permutation network is a minimal network where each of the nodes except the input nodes has N+1 inputs and each of the nodes except the output nodes has N+1... Agent: Schneck & Schneck

20080162744 - Method, system and computer program for monitoring activities on computers connected through a hardware switch: A technique for monitoring computers connected to a hardware switch. The switch is used to selectively connect a single set of peripheral units to the central unit of a selected one of the computers. In the proposed solution, status information of each non-selected computer is transmitted from the corresponding central... Agent: Ibm Corp (ya) C/o Yee & Associates Pc

20080162745 - Methods and apparatus for sharing a peripheral in a multi-core system: A queued interface device configured to communicate with a peripheral includes a first interface configured to receive and store a first set of peripheral requests from a first core, a second interface configured to receive and store a second set of peripheral requests from a second core, and an arbitrator... Agent: Ingrassia Fisher & Lorenz, P.c. (fs)

20080162746 - Semiconductor apparatus and buffer control circuit: A semiconductor apparatus comprises a data processing unit for processing data, a buffer for temporarily storing the data processed by the data processing unit, and a buffer control unit for causing the data stored in the buffer to be burst-transferred to a data storage unit. The buffer control unit allows... Agent: Staas & Halsey LLP

20080162747 - Multi-media kvm switch: A multi-media KVM switch is for providing an output signal to drive a user-interface output device. The multi-media KVM switch comprises an embedded multi-media system, an arbiter and a multiplexer. The embedded multi-media system is enabled as receiving an enabling signal and providing a first device signal. The arbiter is... Agent: Rabin & Berdo, Pc

20080162748 - Efficient power management techniques for computer systems: Techniques involving power management techniques in computer systems are disclosed. For instance, an apparatus may include an input output queue (IOQ), an interface coupled to a processor, and a control module. The interface communicates with the processor regarding power states of the processor. The control module may initiate draining the... Agent: Kacvinsky Llc C/o Intellevate

20080162750 - Low latency mechanism for data transfers between a media controller and a communication device: A mechanism and technique to transfer data between a communication device and media hardware in a computing device. More particularly, an embodiment of the invention uses a quality of service to assure deterministic latencies in direct data transfers between a memory buffer and each of a communication device and an... Agent: Intel/blakely

20080162749 - Method and apparatus for dynamic data buffer: A dynamic data buffer method, includes providing a system for accessing a database having a plurality of fields of data potentially used by applications, analyzing an application's structure to identify at least one field of data from the plurality of fields of data in the database used by the application,... Agent: Richard F. Jaworski Cooper & Dunham LLP

20080162751 - Multi buffer asynchronous scheme for processing incoming information: Disclosed is an electronic device featuring a multi buffer scheme for processing incoming signals. For example, two buffers can be used. A processor can read and process stored signals from a first buffer while an incoming data module can concurrently store signals in a second buffer. Once, the processor is... Agent: Apple C/o Morrison And Foerster ,llp Los Angeles

20080162752 - Keyboard-video-mouse cable having indicator for indicating switching status: The present invention discloses a Keyboard-Video-Mouse (KVM) cable capable of indicating at least one switching status of a KVM switch for at least one computer coupled thereto. The KVM cable further comprises a set of transmission lines for transmitting indicating signals from the KVM switch to the indicator. The KVM... Agent: Madson & Austin

20080162753 - Method for performing full transfer automation in a usb controller: A USB controller and method of implementing a full transfer automation mode is described. The USB controller may have a host interface module configured to generate hardware logic signals for communication to a backend module having buffer memory. The backend module may be configured to generate hardware logic signals for... Agent: Brinks Hofer Gilson & Lione/sandisk

20080162755 - Storage apparatus and control method: The interface changeover switch, serving as an external interface, selects any of the USB interface and the E-SATA interface. The conversion LSI reads in a changeover signal of the interface changeover switch from the GP-IO port upon turning power on, and executes signal conversion between the serial ATA interface of... Agent: Greer, Burns & Crain

20080162754 - Storage system, program and method: Disclosed is a storage system including a unit that requests reconnection to a host after once disconnecting the connection, and a unit that on receipt of a message for reconnection from the host sends to the host a message indicating that connection migration has been made to another storage and... Agent: Nec Corporation Of America

20080162756 - Method and apparatus for communication between universal serial bus (usb) host and usb device: A method of interfacing between a universal serial bus (USB) host and a USB device. The USB host and the USB device include modules to process packets according to network protocols, instead of USB bus interfaces. Therefore, the USB device can be connected to the USB host even without a... Agent: Stein, Mcewen & Bui, LLP

20080162757 - Transactional flow management interrupt debug architecture: According to some embodiments, a first bus may be monitored, via a first debug gate, the first bus being to exchange data between a first processing system and a second processing system. A second bus may also be monitored, via a second debug gate, the second bus being to exchange... Agent: Buckley, Maschoff & Talwalkar Llc

20080162759 - Method and apparatus for adjusting the performance of a synchronous memory system: A method and apparatus for adjusting the performance of a memory system is provided. A memory system comprises a master device and a slave device. A memory channel couples the master device to the slave device such that the slave device receives the system operating information from the master device... Agent: Deniro/rambus

20080162758 - System and method for enhancing i2c bus data rate: A system for, and method of, enhancing I2C bus data rate and an electronic assembly including the system or the method. In one embodiment, the system includes: (1) a modulus register associable with a slave device and configured to contain a modulus and (2) data transfer logic associated with the... Agent: Texas Instruments Incorporated

20080162760 - Efficient resource arbitration: Resource requests are allocated by storing resource requests in a queue slots in a queue. A token is associated with one of the queue slots. During an arbitration cycle, the queue slot with the token is given the priority to the resource. If the queue slot with the token does... Agent: Townsend And Townsend And Crew, LLP

20080162761 - Interrupt control circuit, circuit board, electro-optic device, and electronic apparatus: An interrupt control circuit includes: a section that generates an interrupt signal for requesting an interrupt in response to occurrence of a plurality of interrupt causes; a section that generates an interrupt vector signal for indicating a storing destination of an interrupt processing program corresponding any of the plurality of... Agent: Oliff & Berridge, Plc

20080162762 - Interrupt remapping based on requestor identification: Embodiments of apparatuses, methods, and systems for interrupt remapping based on requestor identification are disclosed. In one embodiment, an apparatus includes look-up logic, and comparison logic. The look-up logic is to look-up an entry associated with an interrupt request in a data structure. The comparison logic is to compare an... Agent: Intel/blakely

20080162763 - Interrupt mailbox in host memory: Embodiments of an interrupt mailbox in host memory are described herein. In an implementation, a device connected to a host writes interrupt data corresponding to an interrupt generated by the device to host memory. Then, the host, when processing the interrupt, accesses the interrupt data from the host memory.... Agent: Lee & Hayes, Pllc C/o Intellevate, Llc

20080162764 - Processing method and processing device for a hardware interrupt: The present invention discloses a processing device and a processing method for a hardware interrupt, for processing the sharing interrupt. The processing method for the hardware interrupt comprises steps of: after receiving a hardware interrupt, determining whether the hardware interrupt is a sharing interrupt, and if not, sending the interrupt... Agent: Dickstein Shapiro LLP

20080162765 - Method and apparatus for controlling connections of pc cards and a passive-card-adapting card used for connecting one of the pc cards to the apparatus: A PC card control apparatus includes a PC card connector, a card detector and an interconnection switching circuit. The PC card connector is configured to provide connections for connecting one of a first PC card compliant with specific card standards and a card-adapting card for connecting a second PC card... Agent: Cooper & Dunham, LLP

20080162767 - 4x framer/deframer module for pci-express and pci-express framer/deframer device using the same: Provided is a 4× framer/deframer module for PCI-Express and a framer/deframer device using the same. In the PCI-Express for high-rate data processing, delimiter and pad processing, and 4× framer shifting and arrangement/reverse arrangement for framing/deframing a frame format are performed to achieve a structure that facilitates reconfiguration and expansion, for... Agent: Sughrue Mion, Pllc

20080162768 - Memory interface for volatile and non-volatile memory devices: Accessing data stored in a memory device through an interface, with addressing data on the memory device through at least one address bus, controlling at least data flow to and from the memory device through at least one command bus, and transferring data to and from the memory through at... Agent: Ware Fressola Van Der Sluys & Adolphson, LLP

20080162766 - Signal techniques for bus interfaces: Techniques involving the transfer of signals across interconnection media are disclosed. For instance, an apparatus may include a configuration module and a driver module. The configuration module establishes an operational mode setting from a first operational mode and a second operational mode. The driver module may operate according to this... Agent: Kacvinsky Llc C/o Intellevate

20080162769 - Systems and methods for improving data transfer between devices: Systems and methods are disclosed for detecting a first device on a first bus issuing a read request for an amount of data to a second device on a second bus. The systems and methods further include detecting a bridge requesting a first portion of the data from the second... Agent: Texas Instruments Incorporated

20080162771 - Bus arbitration system: A circuit arrangement for bus arbitration alters the sequence in which device requests are arbitrated with respect to each other and to a previous arbitration sequence. To this end, an arbiter grants access to a first group of devices according to a predetermined sequence. The arbiter then automatically alters the... Agent: Wood, Herron & Evans, L.l.p. (ibm)

20080162770 - Hardware voting mechanism for arbitrating scaling of shared voltage domain, integrated circuits, processes and systems: An electronic circuit includes processors (CPU1, CPU2) operable to make respective voltage requests (Vcpu1, Vcpu2), and a power management circuit (1470) having a controllable supply voltage output (VDD1) is coupled to said processors (CPU1, CPU2) and further has a voting circuit (4520) responsive to the voltage requests (Vcpu1, Vcpu2) and... Agent: Texas Instruments Incorporated

20080162772 - Portable memory device with auto-play audio: A USB flash memory device is provided which automatically plays pre-recorded audio when the device is inserted into a USB port of a personal computer. The housing of the memory device may be imprinted with promotional information. The pre-recorded audio may include a promotional message, a message relating to a... Agent: Ryndak & Suri LLP

20080162773 - Apparatus and methods for multiple unidirectional virtual connections among sas devices: Apparatus and methods for enabling multiple, unidirectional, virtual connections between a first SAS device and multiple other SAS devices in a SAS domain. An enhanced first SAS device may be substantially simultaneously coupled to each of two other SAS devices through one or more appropriately enhanced SAS expanders to allow... Agent: Lsi Corporation

20080162774 - Interleave mechanism for a computing environment: Provided is a system to communicate data in a computing environment, comprising an interleaving mechanism operable to interleave data being communicated across the computing environment according to a selected interleaving protocol; and an interleaving instruction set operable on the interleaving mechanism providing operating instructions to the interleaving mechanism in accordance... Agent: Hewlett Packard Company