FREE patent keyword monitoring and additional FREE benefits. /images/triangleright (1K) REGISTER now for FREE triangleleft (1K)
Fresh Patents freshpatentsnav7_icons (5K)
browse patent apps by agents browse patent apps by inventors browse patent apps by industry browse patents by location monitor patent applications
    



USPTO Class 710  |  Browse by Industry: Previous - Next | All     monitor keywords
07/2006 | Recent  |  08: Dec | Nov | Oct | Sp | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan |  | 07: D | N | O | S | A | J | J | M | A | M | F | J |  | 06: 12 | 11 | 10 | 09 | 8 | 7 | 6 | 5 | 4 | Dec | Nov |  | 2010 | 2009 |

    SEARCH:      Monitor Keywords | rss Custom RSS

Electrical computers and digital data processing systems: input/output July category listing 07/06

Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.
  
07/27/2006 > 33 patent applications in 19 patent subcategories. category listing

20060168356 - Method and system for transmitting data for a shared application: A method and system for compressing bitmap data in a system for sharing an application running on a host computer with a remote computer, wherein the shared application's screen output is simultaneously displayed on both computers. Simultaneous display of screen output is achieved by efficiently transmitting display data between the...

20060168357 - Information input/output system: An input/output (IO) system reduces the processing load involved in judging whether a device is valid or revoked. The system is constituted from an input/output (IO) device and an information usage device. The IO device outputs an identifier (ID) list to the information usage device, the ID list including one...

20060168361 - Apparatus and method for managing configuration of computer systems on a computer network: A system configuration manager provides a graphical user interface that allows a system administrator to easily administer configuration settings for different computer systems and platforms on a computer network. The system configuration manager allows identifying one system configuration or a settings profile as a “model system”. Once the model system...

20060168362 - Control method for storage device controller system, and storage device controller system: The present invention provides a control method for a storage device controller system provided with a first storage device controller that is connected to first and second storage devices storing data in the CKD format and the FBA format, respectively, and that has first and second communications control means that...

20060168360 - Disk playback apparatus and disk playback method: A disk apparatus has reader unit which reads disk having re-writable storage area, a plurality of defect management areas, and a plurality of location information areas that indicate the location of optimum one to be played back in the plurality of defect management areas, and which outputs readout signal, playback...

20060168359 - Method, system, and program for handling input/output commands: Provided are a method, system, and program for handling Input/Output (I/O) requests. A bus enables communication with an initiator, target device and device controller, wherein the device controller accesses the target device to execute I/O commands directed to the target device. An I/O request command is received to access the...

20060168358 - Storage control system: A storage control system connects to a host with a standard device driver. The control system includes a first bus, a host interface controller, a memory, a controller and a plurality of device interface controllers. The controller controls the host interface controller and the device interface controllers through the first...

20060168363 - Generic device integration within an auto-id system: Systems, methods and computer program products for generic device integration within an auto-id system. The system includes an auto-id node operable to collect data emitted by one or more automatic data acquisition devices, process the data, and make the data available to one or more enterprise applications, user interfaces, or...

20060168364 - Method for maintaining register integrity and receive packet protection during ulpi phy to link bus transactions: A system and method for protecting register write operations, especially register write operations performed in a USB PHY. A USB transmitter/receiver, operable to receive a register write command from a USB LINK device, may monitor the write sequence initiated by the register write command to determine if/when the register write...

20060168366 - Direct memory access control method, direct memory access controller, information processing system, and program: In a DMA control method in which a DMA controller transfers data in memory to an input/output device in accordance with the control information which is provided by a processing device to a DMA controller, a processing device implements a step in which the processing device sets an information block...

20060168367 - Integrated circuit having multiple modes of operation: A method according to one embodiment may include operating an integrated circuit in a selected mode of operation. The integrated circuit may include first circuitry and second circuitry. The first circuitry may be capable of performing at least one operation including, at least in part, generating check data based at...

20060168365 - Method for programming a dma controller in a system on a chip and associated system on a chip: A method is provided for programming a DMA controller in a system on a chip. According to the method, a memory management unit translates a programming virtual address into a programming physical address according to a translation table. A first sub-block without discontinuity beginning at the programming physical address and...

20060168368 - Method for updating firmware in the control chip: A control chip for updating firmware in an optical disk drive by hardware. The control chip includes a microprocessor for controlling actions of the optical disk drive, a decoder controlled by the microprocessor and connected to an external buffer memory and a host interface, a controller controlled by the microprocessor...

20060168369 - Method for controlling storage system, and storage control apparatus: A method for controlling a storage system including a host computer, and a first and a second storage control apparatuses each receiving a data input/output request from the host computer and executing a data input/output process for a storage device in response to the request, comprises connecting a first communication...

20060168370 - Removable identity circuit for a networked appliance: The instant invention is directed to a variety of networked appliances, including equipment controlled or monitored via an Ethernet connection in industrial applications. In one example embodiment of the present invention, a networked industrial-application appliance, having a processor, includes a removable modular circuit board and a memory arrangement. The removable...

20060168373 - Configurable application specific standard product with configurable i/o: A configurable application specific product with a configurable input/output interface is described. The illustrative embodiment of the invention includes a single microcontroller and a microprocessor having a configurable I/O interface that can be programmed to handle any one of a plurality of interfaces that embedded applications might have, including communication...

20060168374 - Configurable input/output interface: A configurable input/output interface is described that can be programmed to handle any one of a plurality of interfaces that embedded applications might have, including communication protocols and bus interfaces, data acquisition from multiple sensors and actuators, and controls of various motors....

20060168371 - Fibre channel environment supporting serial ata devices: A system and method in a fibre channel environment supporting serial ATA devices. In one embodiment, the system and method includes a network having a plurality of servers and a plurality of fiber-channel devices connected to each other through the network. In another embodiment, a command arbitrator answers at least...

20060168372 - Rich targeting: Systems and methods are disclosed that facilitate refining a list of candidate driver packages for a detected plug-and-play device. A device can be detected and a hardware ID there for can be determined and compared to hardware IDs in a data store to determine a preliminary list of driver packages...

20060168375 - System for adding extra characters to the vocabulary banks of character key-in methods in hand-held mobile communication devices: A system to be used to add non-listed characters (i.e., characters not listed in character key-in methods) to the vocabulary banks of character-key-in methods used in hand-held mobile communication devices is disclosed. Users of a mobile communication device can select a character or characters which are built in the system...

20060168376 - Usage of keyboard driver in extensible firmware interface for adding new hot keys at firmware level: A hot key register request is created in an extensible firmware interface application, the hot key register request has a key number and a pointer to a hot key function for the new hot key. The hot key register request is sent to a keyboard driver in the extensible firmware...

20060168377 - Reallocation of pci express links using hot plug event: A method and circuitry for reconfiguring the links of a PCI Express bus after a user hot swaps a PCI device. A computer system has been initially configured with PCI Express bus links to various endpoints, using the scaling features of the PCI Express standard. If a hot swap occurs,...

20060168378 - Method and chip unit for addressing and/or activating a user of a serial data bus: To further develop a method and a chip unit (30) for addressing and/or activating at least one user (40) that is associated with at least one data base (10), in particular at least one C[ontroller] A[rea] N[etwork] bus, and is intended to carry out at least one application, in such...

20060168379 - Method, system, and apparatus for link latency management: A link latency management for a high-speed point-to-point network (pTp) is described The link latency management facilitates calculating latency of a serial interface by tracking a round trip delay of a header that contains latency information. Therefore, the link latency management facilitates testers, logic analyzers, or test devices to accurately...

20060168380 - Method, system, and storage medium for time and frequency distribution for bufferless crossbar switch systems: A bufferless crossbar switch system and technique for synchronization and error recovery between switch line cards is provided. A network switches data through the bufferless data crossbar switch and distributes a high-speed frequency and time signal on a separate channel. The separate channel allows clock recovery, eliminating the need to...

20060168381 - Apparatus and method for controlling resource transfers in a logically partitioned computer system: A resource and partition manager of the preferred embodiments includes a lock mechanism that operates on a plurality of locks that control access to individual I/O slots. The resource and partition manager uses the lock mechanism to obtain a lock on an I/O slot when transferring control of the I/O...

20060168382 - Resolving conflicting requests for use of shared resources: Requests obtained from multiple components of a communications environment are processed, including simultaneous requests that use a shared resource. Conflicts resulting from simultaneous attempts to initiate operations between components of the communications environment are resolved. The conflicts are resolved using a set of rules that do not introduce significant complexity...

20060168383 - Apparatus and method for scheduling requests to source device: An apparatus and method for scheduling requests to a source device is provided. The apparatus comprises a high-priority request queue for storing a plurality of high-priority requests to the source device; a low-priority request queue for storing a low-priority request to the source device, wherein a priority of one of...

20060168385 - Interrupt controller for a microprocessor: An interrupt controller for a microprocessor having a plurality of event memories which are combined to form at least one group and each having an input for a setting signal and an output for an event memory signal which portrays the state of the event memory. The setting signal for...

20060168384 - Maximal length packets: Detecting and flushing maximal length packets is set forth herein. In one embodiment, the method comprises receiving a flushing event and, in response to the flushing event, repeatedly detecting a maximum length packet of write data from a write combining storage area and flushing the detected maximum length packet to...

20060168386 - System management interrupt interface wrapper: In a personal computing system function calls, formatted in 16-bit format for a 16-bit interface to the firmware, are communicated through an operating system providing a System Management Interrupt (SMI) interface to the firmware. An SMI function call in SMI format is generated and sent to an SMI Interface Wrapper...

20060168388 - Method and device for providing interfaces that are tailored to specific devices: A generic interface device may operate as an interface with different types of electronic data devices that perform data operations. The interface device may establish communications with one of these data devices, and identify the particular type of data device based on data received from the data device. Using the...

20060168387 - [crad reader with pci express]: A card reader with PCI Express includes a microcontroller connected separately to a flash memory connecting interface and a peripheral component interconnect (PCI) Express connecting interface, and the microcontroller has a memory card interface and a PCI Express interface, such that when the memory card is coupled to a PCI...

  
07/20/2006 > 30 patent applications in 23 patent subcategories. category listing

20060161689 - Apparatus and systems for monitoring communication: Apparatus and systems may include a connector to connect lines sending or receiving data between two communicating devices to lines communicating the data to a monitoring computer system. The monitoring computer system may display the data sent between the two devices....

20060161691 - Methods and systems for synchronous execution of commands across a communication link: A method for synchronously executing a plurality of commands generated by a first module and executed at a second module, wherein the first and second modules communicate through a communication link, is provided. The method includes generating the commands at the first module, transmitting the commands through the link to...

20060161690 - Remote device configuration automation: A remote control device tries each of a number of command sets and detects a user's response to each attempt to identify the correct command set. Each attempt includes sending a signal to a controlled device that, if properly received and understood by the controlled device, would cause the controlled...

20060161692 - Configurable mapping of devices to bus functions: Techniques are disclosed for enabling a single computer system to execute both operating systems that permit multiple devices to be mapped to a single PCI function and operating systems that do not permit such mapping. Prior to loading and executing an operating system (e.g., during system reset), the computer system...

20060161693 - Liquid crystal display device: A driver circuit drives display device and LCD device has a driver circuit that includes driving stages and dummy stage. The driving stage includes output and control terminals. The output terminal of the present stage is connected to the control terminal of the previous state to be cascade-connected each other....

20060161695 - Direct memory access system: A direct memory access system has a DMA setting decoding portion 17 and a DMA clock/reset control portion 18. The DMA setting decoding portion 17 acquires various pieces of DMA data transfer control information including a data transfer length and a data transfer target from information set in a DMA...

20060161694 - Dma apparatus: A DMA apparatus which reads data corresponding to a descriptor from memory, and a dividing unit in a descriptor management device divides one descriptor into a plurality of sub-descriptors. A plurality of DMA controllers produce a plurality of reading requests for reading data corresponding to the plurality of sub-descriptors from...

20060161696 - Stream processor and information processing apparatus: An array type processor comprises a data path unit to execute processing, and a state management unit to control the state of the data path unit in accordance with a command that specifies processing on the data. An input DMA circuit reads from a memory information and data to be...

20060161697 - Microcontroller: A peripheral circuit control register has a plurality of bits corresponding respectively to peripheral resources. A decoder activates an access signal to the peripheral resource at an access destination when the bit corresponding to the peripheral resource at the access destination in the peripheral circuit control register is under a...

20060161698 - Architecture for accessing an external memory: Provided is an external memory accessing architecture for use with IC comprising a first bus connected to an external memory and having n-bit data width; a first buffer unit of k serially connected first buffers each having n-bit data width, a first one of the first buffers connected to the...

20060161699 - Identifying a processor in a multiprocessor system: A method for storing an identity of a processor in a multiprocessor computer system, the processor including a high frequency clock having a clock value represented as a set of binary digits, the method comprising encoding an identifier of the processor in a subset of the set of binary digits....

20060161700 - Redirection of storage access requests: Provided are a method, system, and article of manufacture, wherein a controller receives a request from one of a plurality of hosts. The controller determines whether a primary storage control unit coupled to the controller is operational. A response is generated by accessing the primary storage control unit, in response...

20060161701 - Method and apparatus to establish class of usb device: A method and apparatus to establish a class of a universal interface device, and more particularly, a method and apparatus to receive classes supported by the universal interface device and to establish a class among the received classes supported by the universal interface device as the class of the universal...

20060161702 - Method and system for testing host bus adapters: A system and method to test a host bus adapter's (“HBAs”) ability to handle stream of invalid characters is provided. A data presenter module presents data to a HBA without being aware of a data format. A data producer module that is aware of the data format and schedules special...

20060161703 - Mixed-signal single-chip integrated system electronics for data storage devices: An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital...

20060161704 - Microprocessor systems: A slave device (20) communicates with a host system (21) via a host communications bus (22). The host system (21) includes one (or more) processing units that can act as bus masters and send access requests for slave resources on the slave device (20) via the communications bus (22). The...

20060161705 - Method for regulating a transmission with short data telegrams: A method for regulating a transmission of a quantity of user data between a plurality of users of a communication system via a field-bus system is provided, in which method the individual users communicate by way of data telegrams, each data telegram containing at least one destination address, one source...

20060161706 - Storage controller and methods for using the same: In a first aspect, a first method is provided for processing a request. The first method includes the steps of (1) receiving a request in first logic of a controller from a device master; (2) issuing a response to the device master to reissue the request at a later time;...

20060161707 - Method for efficient inter-processor communication in an active-active raid system using pci-express links: A fault-tolerant RAID system is disclosed. The system includes redundant RAID controllers coupled by a PCI-Express link. When a PCI-Express controller of one of the RAID controllers receives a PCI-Express memory write request transaction layer packet (TLP), it interprets a predetermined bit in the header as an interrupt request flag,...

20060161709 - Safe message transfers on pci-express link from raid controller to receiver-programmable window of partner raid controller cpu memory: A fault-tolerant mass storage system includes two RAID controllers that communicate via a PCI-Express link. Each controller has a bus bridge coupled to the link, a cache memory that caches user data for storage on disk drives controlled by the controllers, and a CPU. The CPU fetches and executes program...

20060161708 - Status reporting apparatus and status reporting method: A priority determining unit determines a priority of a status of a device connected to a second bus that is connected, via a bridge, to a first bus to which a central processing unit and a storage unit are connected. A bus-status determining unit determines a use status of the...

20060161711 - Information device: An information device is provided, which can be prevented from being pulled out by mistake from an information processing terminal beforehand, but can be pulled out safely. The device is provided with an interface, a CPU, a modem portion, a memory portion, and sensors to a projection portion. A sounding...

20060161710 - Single board computer for industry personal computer: A single board computer for an industry personal computer is disclosed. The single board computer comprises a CPU, a memory controller hub, and input/out zones, wherein at least one of the input/output zones is provided with a connector, the connector being dedicated for transporting a differential signal and connected with...

20060161712 - Pci arbiter with hot plug controller support: A Hot Plug system includes a PCI bus, an expansion card, a slot for receiving the expansion card, and a Hot Plug controller directly connected to the expansion card and the slot, but only indirectly connected to the PCI bus. An enhanced arbiter monitors and controls the PCI bus on...

20060161713 - Mounting a computer in a transport vehicle: An apparatus for use with a transport vehicle comprises a docking station for removably mounting a computer in an upside-down orientation to an inside the transport vehicle....

20060161714 - Method and apparatus for monitoring number of lanes between controller and pci express device: After the initialization of the information processing apparatus, the MMB reads out a value in the Negotiated Link Width register and stores the value in a RAM. When receiving an interrupt from the I/O bridge, the MMB reads out a value in the Negotiated Link Width register again and compares...

20060161715 - Data bus line and bus: The present application relates to a data bus line to secure secrecy of digital data without a complicated exchange of hardware and decreasing processing speed....

20060161716 - Adapter for connecting a portable memory unit to a host, and a memory device having the adapter: An adapter for connecting a portable memory unit to a host, comprises a first connector, a second connector, a third connector and a coupling circuit. The first connector is for connecting the portable memory unit for transmitting power and data signals. The data signals are conforming to a communication protocol...

20060161717 - Dual pci-x/pci-e card: A dual bus interface PCB includes a main chipset component, a first type bus interface connector, and a second type bus interface connector. The PCB can be configured at fabrication time to enable a variety of configurations for operation. Optionally, the PCB can also be provided at least one memory...

20060161718 - System and method for a non-uniform crossbar switch plane topology: A system and method for communicatively coupling a plurality of processor groups residing in a symmetric multiprocessing (SMP) system. One embodiment of a non-uniform crossbar switch plane multiprocessing (SMP) system comprises a plurality of processor groups and a non-uniform crossbar switch plane system comprising a plurality of routes, such that...

  
07/13/2006 > 30 patent applications in 19 patent subcategories. category listing

20060155880 - Apparatus and method for providing remote access redirect capability in a channel adapter of a system area network: A method and apparatus for providing remote access redirect in a host channel adapter of a system area network are provided. The apparatus and method provide a mechanism by which a host channel adapter, in response to receiving a marker message, places selected channel(s) of the host channel adapter in...

20060155879 - [method for receiving data by a universal asynchronous receiver transmitter]: The present invention discloses a method for receiving data by a universal asynchronous receiver transmitter and the universal asynchronous receiver transmitter includes a receive shift register and a counter, and the receive shift register is connected to a receive register, and the receive register is connected to a preinstalled microprocessor...

20060155881 - Method for identification by a host computer avoiding collision of elements: An anti-collision process for elements controlled by a host computer allowing the identification of elements by the latter, each of the elements having an identification number between 0 and a maximum value (MAX), and including transmission by the host computer of a query instruction able to be received and recognized...

20060155884 - Apparatus and method for selectively configuring a memory device using a bi-stable relay: The disclosed embodiments of the present invention include a semiconductor memory apparatus having a selectable memory capacity. In one embodiment, a system includes input, output, and data storage devices, a processor coupled to the devices, a memory device coupled to the processor, and a configuration circuit interposed between the processor...

20060155882 - Integrity control for data stored in a non-volatile memory: The present invention relates to a write controller (10) for a memory with a plurality of non-volatile storage cells, a read controller for a memory with a plurality of nonvolatile storage cells, to a combined write/read controller, to a solid state device comprising a memory with a plurality of non-volatile...

20060155883 - Redundant storage virtualization computer system: A redundant storage virtualization computer system is provided. The redundant storage virtualization computer system comprises a host entity for issuing an IO request, a redundant storage virtualization controller set coupled to the host entity for performing an IO operation in response to the IO request issued by the host entity,...

20060155887 - Enhanced multi-access data port: A method and system provide for transmitting data between a host and a device external to the host. The data is transmitted across an external bus having a width that is less than a native bus width of the host. The method includes receiving a first read/write access, accessing a...

20060155886 - Methods and arrangements to manage on-chip memory to reduce memory latency: Methods, systems, and media for reducing memory latency seen by processors by providing a measure of control over on-chip memory (OCM) management to software applications, implicitly and/or explicitly, via an operating system are contemplated. Many embodiments allow part of the OCM to be managed by software applications via an application...

20060155885 - Processor and a method in the processor, the processor comprising a programmable pipeline and at least one interface engine: A processor is presented, comprising a programmable pipeline and at least one interface engine (130), adapted to be connected to at least one external device (140) located externally of the processor. The processor is characterized in that the interface engine (130) is adapted to receive a request (170) from the...

20060155888 - Request conversion: In one embodiment, a method may include, if an amount of data requested to be transferred by a data transfer request according to a first protocol exceeds a maximum data transfer amount permitted to be requested by a single data transfer request according to a second protocol, generating one data...

20060155890 - Multi-functional peripheral combination apparatus and control method thereof: A multi-functional peripheral combination apparatus includes a multi-functional peripheral, a portable electronic equipment and a transforming unit being electrically connected between the multi-functional peripheral and the portable electronic equipment for image management, file management and other administrative affairs. Furthermore, the operation applied to both of the portable electronic equipment and...

20060155889 - Programmable logic controller peripheral device and program creation method thereof: A peripheral device for a programmable logic controller according to the invention includes: an instruction table for correlatively storing instructions and the input/output types of parameters for the instructions; a search/discrimination means for searching the instruction table for an instruction in a code in a portion of a sequence program...

20060155891 - Method relating to rule-regulated software configuration: A method relating to rule-regulated configuration of software includes receiving an unsuccessful configuration that a sender computer system sends to a recipient computer system upon software being unsuccessfully configured in the sender computer system. Validation rules for configuring the software allowed the unsuccessful configuration. The validation rules are modified in...

20060155892 - Data output device for determining candidate of adequate data: A media data switch request receiving unit of a media data reproducing apparatus receives a media data switch request operation from a user. A preference score counting unit counts the preference score voting operations received by a preference score vote receiving unit, and the result is stored in a preference...

20060155893 - Methods and apparatus for sharing memory bandwidth: In one aspect, a method is provided. The method includes the steps of (1) sharing memory bandwidth between a processor and one or more direct memory access (DMA) engines; (2) providing memory bandwidth to a DMA engine; (3) starting a data transfer between a memory and the DMA engine, via...

20060155894 - Asynchronous messaging in storage area network: A computer system includes an asynchronous messaging-and-queuing system; and a storage area network having a storage area network controller in communication with the asynchronous messaging-and-queuing system. The storage area network controller includes control means to control a message queue on behalf of one or more queue managers, which may be...

20060155895 - Data transferring apparatus and data transferring method: A data transferring apparatus receives comparison data to be compared with stored data from an external unit, searches data corresponding to the comparison data from among the stored data, and transfers the data searched to the external unit. A control unit generates comparison-condition information for searching predetermined stored data from...

20060155896 - Program verification for non-volatile memory: A non-volatile memory device includes page buffers arranged in groups, each group being coupled to a corresponding data output line so that data from more than one of the page buffers in each group may be simultaneously represented on the corresponding data output line during a program verification operation. Page...

20060155897 - System, apparatus, computer program product and method of performing operational validation with limited cpu use of a communications network: A system, apparatus, computer program product and method of performing operational validation on a system are provided. The system may include a CPU with a cache, a communications network, and a plurality of devices exchanging data during a test. When the test is ready to be performed, the CPU may...

20060155898 - Data generator for generating data of arbitrary length: A data generator provides faster data than before. A parallel data generator 18 provides first data having four or five effective data width according to a divided clock DCLK. A bit width adjuster 20 having a FIFO memory receives the first parallel data to provide second parallel data of constant...

20060155899 - Chip processors with integrated i/o: A solution to the read-modify-write problem for mixed tri-state chip processors by implementing a simple hardware change. This change could easily be built into microcontrollers and other chip processors to once and for all solve the problem. The present invention uses at least one logic gate to route data from...

20060155900 - System for programmed control of signal input and output to and from cable conductors: An input/output module for implementing directions from a controller for sending and receiving signals to and from devices. The input/output module includes a microprocessor for communication with, and receiving programming from the controller. The input/output module further includes device communication connectors, each having number of pins, each pin for interconnection...

20060155901 - Bus control arrangement and method: The present invention relates to a method and arrangement for controlling dataflow on a databus, especially for avoiding reception problems by a receiver unit. The databus (12) connects at least one receiver unit (11) to one or several transmitter units (11). The method comprises the steps of transmitting by said...

20060155902 - Multi-layer bus system having a bus control circuit: A multi-layer bus system includes an interconnect matrix, bus slaves, bus masters and a bus control circuit. The interconnect matrix has master connection ports and slave connection ports, and connects one of the master connection ports to one of the slave connection ports in response a control signal. The slaves...

20060155903 - Resource management device: A bus arbitration part for arbitrating access requests from bus masters includes an arbitration history management section that records absence of an access request from any bus master at a given basic arbitration timing. Based on this record, an access request arbitration section issues access permission for an access request...

20060155904 - Resource management device: A bus arbitration section and a resource control section are interposed between a shared resource and a plurality of bus masters. The minimum number of receivable access permissions within a given period is set as bus arbitration information for each of the bus masters. If two or more of the...

20060155905 - Method for specifying and verifying multi-threaded object-oriented programs with invariants: Various new and non-obvious systems and methods for ensuring within a multi-threaded environment that object fields hold legal values are disclosed. One of the disclosed embodiments is a method for a thread locking the top object of an object hierarchy. The thread then gains ownership of the locked object and...

20060155906 - Data processor with a built-in memory: A memory-built-in data processor comprises a controller connected to an external unit and a memory via first and second buses, and a data processor performing readout/write-in of data with respect to the memory via a third bus, the controller and the second bus, the controller performing arbitration between a first...

20060155907 - Multiprocessor system: A multiprocessor system from which redundancy relating to data assurance at the time of data communication between processing sections is removed. At the time of data communication between a network processing section (101) and a real-time processing section (201), exclusive control of a shared memory is performed by means of...

20060155908 - Isolating system that couples fieldbus data to a network: A system couples fieldbus data from a fieldbus line to a network line. The system includes a data format converter that converts the data to USB data. A coupler that includes a first insulating barrier is coupled in cascade with the converter. A host receives the USB data. The host...

  
07/06/2006 > 32 patent applications in 26 patent subcategories. category listing

20060149855 - Adapter and memory unit: Data stored in a memory unit can be transmitted to an external apparatus such as a PC, a television or a printer without relying on operations carried out on a host apparatus, onto which the memory unit has been mounted. The memory unit includes a memory card and an adapter...

20060149856 - Modular computing system: A computing system is provided that includes a plurality of interconnected components. The components include a processing subsystem, an input subsystem, an output subsystem, a storage subsystem, and a power subsystem. Subsets of the plurality of components may be rearranged and interconnected in various configurations to form different computing subsystems....

20060149857 - Memory system including a memory module having a memory module controller: A system that has a system memory controller and a memory module. The memory module includes a memory module controller coupled to the system memory controller and a plurality of memory devices coupled to the memory module controller....

20060149858 - Establishing wireless universal serial bus (wusb) connection via a trusted medium: An extensible architecture for untrusted medium (e.g., wireless) device configuration via trusted medium. The architecture includes systems and methods for establishing a wireless universal serial bus (WUSB) connection between a connecting device and a host device using a trusted medium, such as a wired connection. In one implementation, the connecting...

20060149859 - Configuration data management: Corrupted configuration data stored in a first memory for a device may be restored using backup configuration data stored in a second memory. In one embodiment, the second memory may be carried by the device itself. In another embodiment, the second memory may be carried on a motherboard and may...

20060149860 - Virtual ide interface and protocol for use in ide redirection communication: A method and system of communicating data to or from a remote computer. The remote computer is accessed by a CPU as though it were a local IDE controller attached to a local IDE device. A peripheral device distinct from the CPU provides a set of virtual IDE device registers...

20060149862 - Dma in processor pipeline: The present technique is an atomic technique that places a triggered operation within a processor pipeline, whereby the processor is stalled until the triggered operation is completed. A processor issues an access operation that will trigger an external block operation. The external operation does not return an access valid until...

20060149861 - Methods and apparatus for list transfers using dma transfers in a multi-processor system: Methods and apparatus provide for transferring a plurality of data blocks between a shared memory and a local memory of a processor in response to a single DMA command issued by the processor to a direct memory access controller (DMAC), wherein the processor is capable of operative communication with the...

20060149863 - System for extending length of a connection to a usb device: A system for extending in length a connection from a universal serial bus (USB) peripheral device to a computer beyond the length enabled by the device hardware. The system includes: a USB host emulator, for polling the USB peripheral device according to a USB standard protocol, for receiving input provided...

20060149864 - Data packet queue handling method and system: A data packet queue handling method and system is proposed, which is designed for use with a computer system having a data packet generating unit, a data packet transfer interface, a data packet processing unit, and a memory unit, wherein the data packet generating unit is capable of generating a...

20060149866 - Method and apparatus for transferring data: A pointer comparing unit determines whether a value of a writing pointer is identical to a value of a reading pointer. When it is determined that the value of the writing pointer is different from the value of the reading pointer, an inter-memory transfer unit reads data stored in a...

20060149865 - Queue rendezvous: Queue rendezvous services allow mutual exclusion of processing of certain message types in a generic way without unnecessarily tying up queue resources while waiting for certain conditions to be met and without requiring a queue client to implement application locks to support mutual exclusion processing rules....

20060149867 - Bus system design method, bus system, and device unit: On the basis of a period of a timing signal, a signal propagation delay in a device unit, signal propagation delay in the timing signal bus and the data bus, and a setup time of another device unit or a device connected to the data bus, a timing at which...

20060149868 - Direct access storage system having plural interfaces which permit receipt of block and file i/o requests: A storage system includes a storage controller and storage media for reading data from or writing data to the storage media in response to SCSI, NFS, CIFS, or HTTP type read/write requests. The storage controller includes SCSI, NFS, CIFS, and HTTP interface adapters for receiving the read/write requests and effecting...

20060149869 - Apparatus and method for quickly connecting network real-time communication system: An apparatus and a method for quickly connecting a real-time communication system. The apparatus includes a communication control device that can be inserted into a signal receiving device. The communication control device includes an initiation button, a hot key and an input unit, so as to input the control commands...

20060149870 - Parallel to usb bridge controller: A parallel to USB bridge controller includes a USB transceiver for transmitting and receiving on a USB link and a serial interface engine connected to the USB link for converting between USB protocol and serial interface protocol. A memory interface within the controller includes a transmit data register for receiving...

20060149871 - Wireless security beacon for consumer equipment: A security system for consumer equipment has a lock for preventing use of the equipment, and broadcasts a beacon signal indicating stolen status, if the lock does not receive a valid key signal over a wireless link. The beacon signal can help police identify stolen goods, and makes mere possession...

20060149872 - Apparatus and method to merge and align data from distributed memory controllers: We describe a system and method to merge and align data from distributed memory controllers. A memory system includes a command bus to transmit a predetermined memory access command, and a memory interface to manipulate data from at least two memory channels, each memory channel corresponding to a portion of...

20060149873 - Bus isolation apparatus and method: A system includes a bus isolation component having plural ports and enable inputs to enable respective ports, and bus devices connected to respective ports. Each bus device has logic to provide an enable signal to a respective enable input of the bus isolation component. The port of the bus isolation...

20060149874 - Method and apparatus of reducing transfer latency in an soc interconnect: Embodiments of the invention are directed to a method and apparatus for reducing transfer latency in a system on a chip, the system on a chip comprising a bus master, a bus slave and an arbiter, wherein the bus master, bus slave and arbiter are in electronic communication therebetween. A...

20060149875 - Method and system for master devices accessing slave devices: Techniques for multiple master devices accessing one or more slave devices via a single data bus are disclosed. According to one aspect of the techniques, a bus controller coupled between the master devices and the slave device, wherein the bus controller is configured to receive bus signals from the master...

20060149876 - System and method for implicit transaction control: Embodiments of the invention are generally directed to a system and method for implicit transaction control. A transaction manager receives an indication that an operation is to be executed within a transaction. The transaction manager determines whether a preexisting transaction context is available to provide the transaction for the operation....

20060149877 - Interrupt management for digital media processor: A method includes receiving a first interrupt from a digital media processor and blocking execution of an application program while the first interrupt is being handled. The method further includes receiving a second interrupt from the digital media processor and allowing execution of the application program to continue while the...

20060149878 - Efficient interrupt processing in systems with multiple serial protocol engines: An apparatus and method for quickly processing latency-sensitive interrupts and for processing order-dependent interrupts in the proper order....

20060149879 - Mini pci module having antenna pin set for electrically connecting to an antenna set: A mini PCI module includes a mini PCI card and a mini PCI slot for the mini PCI card to be inserted into. The mini PCI card includes 124 signal pins and an antenna pin set. The mini PCI slot includes 124 signal connection ends corresponding to the 124 signal...

20060149880 - Electronic device with card interface: When initializing a card-shaped device inserted in a card interface, operation mode acquiring means incorporated in an electronic device acquires operation mode information, stored in a register file incorporated in the card-shaped device, by a predetermined procedure using a predetermined pin. Operation mode setting means incorporated in the electronic device...

20060149881 - Method and system for virtual enclosure management: A process and system for virtually managing enclosures. A process determines whether a system includes an enclosure processor, a virtual enclosure processor, or both an enclosure processor and a virtual enclosure processor. The process receives a command by a virtual enclosure processor if it is determined that the system includes...

20060149882 - Computer communication interface transmission control codes analyzing method and system: A computer communication interface transmission control codes analyzing system and method for a computer platform to analyze machine codes received by the computer platform are disclosed. The system includes a header record area having a plurality of header units for storing address information, a code definition record area for storing...

20060149883 - Systems and methods for providing co-processors to computing systems: Computing systems with conventional CPUs coupled to co-processors or accelerators implemented in FPGAs (Field Programmable Gate Arrays). One embodiment of the systems and methods according to the invention includes a FPGA accelerator implemented in a computer system by providing an adapter board configured to be used in a standard CPU...

20060149884 - Information processing device: The information processing device comprises first and second master circuits and an arbiter for arbitrating access rights to a bus to which the master circuits are connected. The arbiter has storage units retaining information representing priorities of the access rights, and an arbitration control logical unit for arbitrating the access...

20060149885 - Enforcing global ordering through a caching bridge in a multicore multiprocessor system: The present invention presents an efficient way to implement global ordering between a system interconnect and internal core interfaces in a MCMP system. In particular, snooping transactions on the system interconnect, processor requests, and processor request completions may trigger corresponding snooping transactions and request completions to the cores. The order...

20060149886 - Bus controller and bus control method for use in computer system: A bus controller and a control method are used in a computer system. In a bus controller, a bus controller main circuit issues a first signal to the central processing unit in response to a bus configuration cycle for announcing a first-level bus that the first group of components is...

Previous industry: Electrical computers and digital processing systems: multicomputer data transferring or plural processor synchronization
Next industry: Electrical computers and digital processing systems: memory


######

RSS FEED for 20140410: xml
Integrate FreshPatents.com into your RSS reader/aggregator or website to track weekly updates.
For more info, read this article.

######

Thank you for viewing Electrical computers and digital data processing systems: input/output patents on the FreshPatents.com website. These are patent applications which have been filed in the United States. There are a variety ways to browse Electrical computers and digital data processing systems: input/output patent applications on our website including browsing by date, agent, inventor, and industry. If you are interested in receiving occasional emails regarding Electrical computers and digital data processing systems: input/output patents we recommend signing up for free keyword monitoring by email.



Results in 0.91907 seconds

PATENT INFO