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USPTO Class 710 | Browse by Industry: Previous - Next | All 04/2006 | Recent | 08: Jun | May | Apr | Mar | Feb | Jan | | 07: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 06: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | Electrical computers and digital data processing systems: input/output inventions 04/06Recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.Listing format for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 04/27/2006 > 15 patent applications in 12 patent subcategories. 20060090013 - Group communication and collaboration method: A system for communicating information among participants in a distributed application having peripheral communications devices comprises a central agent having two-way links to the peripheral devices, a notice generator triggered by an information input from one participant directed to at least one other participant, the notice generator generating a notice... 20060090014 - Transaction layer link down handling for pci express: Transaction layer link down handling for Peripheral Component Interconnect (PCI) Express. A link between an input/output (I/O) controller port of an I/O controller and a device port of a device is initialized, wherein the link includes a physical layer, a data link layer, and a transaction layer. The transaction layer... 20060090016 - Mechanism to pull data into a processor cache: A computer system is disclosed. The computer system includes a host memory, an external bus coupled to the host memory and a processor coupled to the external bus. The processor includes a first central processing unit (CPU), an internal bus coupled to the CPU and a direct memory access (DMA)... 20060090017 - Microprocessor system with memory device including a dmac, and a bus for dma transfer of data between memory devices: A processor system having a memory device including a (RAM) memory and a direct memory access controller (DMAC) and an internal bus switchably connected between the memory and the DMAC. A Bus Switch (multiplexer) within the memory device alternately establishes a first data transmission path over the system bus between... 20060090015 - Pipelined circuit for tag availability with multi-threaded direct memory access (dma) activity: A method and system for determining multi-thread direct memory activity is described. A pipelined circuit for tag availability with multi-threaded direct memory access activity may be employed. The pipelined circuit includes registers for providing a tag to a direct memory access (DMA) thread and receiving the tag upon completion of... 20060090018 - Method and apparatus for indirect addressing: A display controller is provided. The display controller is configured to provide an indirect addressing mode to access a memory location within the display controller. The display controller includes a first pin configured to enable access to one of a register of the display controller or a memory region of... 20060090019 - Asynchronous communications technique: A main processor manages serial communication with one or more external devices by establishing the requisite tasks needed for serial communications. For example, these tasks can include (1) serial device handling, (2) protocol encapsulation, and (3) low-level communication with external devices. A priority is assigned to each of the tasks... 20060090020 - Connector for satellite radio-computer interface: Circuitry and method including communications capability for converting from one format signal to a second format signal. An input connector couples an RS-232 input to a conversion circuit provided from a source of RS-232 audio signals. An output connector coupled to the conversion circuit provides audio signals that have been... 20060090021 - Pc managed networked audio bell/intercom system: A bell and intercom system consisting of a Controller PC with software which sends instructions across a computer network to client PCs and network audio devices. System plays audio at client PCs and network audio devices at scheduled times or in real-time. The controller PC software consists of modules for... 20060090022 - Input device for controlling movement in a three-dimensional virtual environment: A user-controlled input device for use with a computer system is disclosed. The user controlled input device controls at least three-dimensional movement in a three-dimensional virtual space defined by a three axis coordinate system. The device includes a controller body and at least a pressure controlled button joystick coupled to... 20060090023 - Computer and method for on-demand network access control: A computer and method that control access to a network. The computer includes an application that shrinks the window of opportunity for a network attack and reduces power consumption by automatically causing a computer to connect to the network when access is needed and to disconnect the computer from the... 20060090024 - Bus controller: A single bus apparatus enables the simultaneous execution of both high-speed data transfer, which requires real time operation, and low-speed data transfer. At least one of slaves I/F 22-0, 22-1, . . . that control slave devices SV0-SV3 upon the request from master devices MS0-MS3 connected to interconnection bus BS... 20060090025 - 9u payload module configurations: A multi-service platform system (100, 200, 300) includes a computer chassis (101, 201, 301) having a plurality of 9U slots (207), a backplane (104) integrated in the computer chassis, a switched fabric (106) on the backplane. At least one of a VMEbus network and a PCI network are coincident with... 20060090026 - Usb control circuit for saving power and the method thereof: A USB control circuit for saving power and the method thereof employs a first logic circuit to generate a control signal that turns on the power of a transmitting module, so as to enable the transmitting module just before sending data. The above-mentioned USB control circuit and the method thereof... 20060090027 - Disk array control device with two different internal connection systems: A disk array control device which includes a plurality of channel interface (IF) units, a plurality of disk IF units, a cache memory unit, and a shared memory unit. The connection system between the plurality of channel IF units and plurality of disk IF units and the cache memory unit... 04/20/2006 > 25 patent applications in 16 patent subcategories.20060085563 - Terminal apparatus: A low cost, a low power consumption and a small size are three very important factors for a mobile communication terminal. A great problem is posed by the conventional technique using a DSP and a CPU independent of each other which requires two external memory systems. Also, two peripheral units... 20060085564 - Flash mirroring: A firmware update system includes a high-level management device implementing high-level management software application that selects a redundant embedded processor as a master sub-system. Firmware update images are transmitted to the master sub-system over a primary communication path. The master sub-system re-distributes the firmware update images to other associated redundant... 20060085565 - Method of configuring device property of storage device for a windows operating system: This invention discloses a method of configuring a device property of a storage device for a Windows operating system. A step (A) is to code a lower-level filter driver for intercepting and processing an I/O request packet (IRP) that queries a storage device property. The IRP of the step (A)... 20060085566 - System with data bus and method for controlling operation thereof: A system with a data bus and a method for controlling operation thereof are provided. In the system with a data bus, a host controls primary functions of the overall system including the data bus, and an agent is connected to the data bus for performing additional functions of the... 20060085568 - Audio/video devices for visualizing operational states therein or thereamong into content flow and method of controlling operations thereof: An audio/video (A/V) device and a method of controlling the operation thereof, which visualize operation states in or among AN devices into a flow of content. The A/V device includes an on screen display (OSD) processing unit to OSD process information, and a control unit to control the OSD processing... 20060085567 - Image forming apparatus, job execution apparatus, and job execution method: An image forming apparatus includes a job execution portion, a connecting portion for detachably connecting an external storage, a detection portion for detecting connection to the connecting portion of the external storage, a stored information reading portion for reading stored information of the external storage based on connection detection of... 20060085570 - Disk controller and storage system: A disk controller has a channel adapter having a connection interface to a host computer or a disk drive; a memory adapter for temporarily storing data to be transferred between the host computer and disk drive; a processor adapter for controlling operations of the channel adapter and memory adapter; and... 20060085569 - Method for minimizing the translation overhead for large i/o transfers: A number of DMA addresses are resolved to system memory addresses at a time to decrease latency time. The number of addresses resolved at a time is preferably correlated to the number of DMA addresses that can be stored in a single cache line. Additionally, system memory is allocated in... 20060085571 - Data collection system: A transfer apparatus transmits template information to each of a plurality of input/output units, wherein the template information indicates an area where an individual data relative to the input/output unit is to be stored in a data fragment. A target bit string including the individual data is generated in the... 20060085572 - Control device connected to external device: The control device is a device which can be connected to an external device that transmits data, comprising a computer program which analyzes data received from the abovementioned external device using data format information related to the format of the data, wherein the abovementioned data format information is stored in... 20060085574 - Methods for accessing remotely located devices: A method for enabling access to resources connected to client nodes of a network is provided. The method includes establishing communication between a local client and a remote client. The local client establishes communication with the remote client by providing a remote client identification code and a password to the... 20060085573 - Multi-context selection with pci express to support hardware partitioning: A system and method for hardware partitioning of an information handling system. The partitioning is through the CPU, memory, and I/O systems. This is accomplished by providing multiple contexts for each I/O device (one for each partition), and by using the transaction ID field of the PCI Express bus packet... 20060085575 - Storage network system, host computer and physical path allocation method: The object of the invention is to prevent differential data transfer for a volume pair from being stopped by the influence of another volume pair and make the loads on physical paths equal to each other by finding an optimum allocation of the physical paths to logical paths. A storage... 20060085576 - System and method for a high-speed shift-type buffer: Systems and methods for improving the performance of a multimedia processor system by dynamically evaluating the current performance of the system and, if necessary, updating the configurations of the individual processors to improve the performance of the system. One embodiment comprises a method implemented in a multiprocessor system, including evaluating... 20060085578 - Flash memory card with enhanced operating mode detection and user-friendly interfacing system: An interfacing system facilitating user-friendly connectivity in a selected operating mode between a host computer system and a flash memory card. The interfacing system includes an interface device and a flash memory card. The interfacing system features significantly expanded operating mode detection capability within the flash memory card and marked... 20060085577 - Portable recording and reproducing apparatus, recording and reproducing system and recording and reproducing method: A portable recording and reproducing apparatus has a power supply unit configured to receive a direct current from an external power supply device C and charge a built-in battery with the direct current to supply electricity to respective units, an input unit configured to receive an instruction signal for instructing... 20060085579 - Remote control system, remote control method, remote controller, and electronic device: A remote control system for a user to operate at least one device using a remote controller includes device specification means for specifying a device located in front of the user who is holding the remote controller via a first communication medium under a constraint on at least one of... 20060085581 - Computer system and method for inhibiting interruption of a user that is actively using the computer system: A computer system and method inhibit interruption of a user that is actively using the computer system. A user is actively using the computer system if the user has provided defined input within a time period specified in a “do not disturb” specification. For example, if the time period in... 20060085580 - Method for synchronizing processors in smi following a memory hot plug event: A method for synchronizing processors during a system management interrupt caused from a memory hot plug event in multiple processor systems is disclosed. In one embodiment, a method for synchronizing processors during an assertion of a system management interrupt (SMI) in an information handling system including, for each processor, identifying... 20060085582 - Multiprocessor system: An interrupt notification network is provided for a multiprocessor system in which many processor units are installed. An interrupt notification source processor unit transmits an interrupt notification packet to an interrupt notification destination processor unit. The interrupt notification packet to be transmitted by the interrupt notification source processor unit contains... 20060085583 - Multi-functional integrated circuit card module with a mixed interface: The present invention provides a multi-functional integrated circuit card module with a mixed interface, which comprises a controller, multiple first pins and second pins coupled to the controller, and a non-volatile memory whose read/write function is controlled by the controller. The controller works at a first mode after detecting the... 20060085584 - Multi-function ultrabase: A multi-function ultrabase comprises a base member, a Mass Storage Device Interface, at least one Universal Serial Bus (USB), and a plurality of connectors (PS/2 connector and COM ports). Wherein, the USB connector is locate at the base member for connecting with a notebook or a desktop; An Integrated Device... 20060085585 - Main board with a slot-sharing circuit for pci express x16 and x1 slot to be connected to: A main board has a slot-sharing circuit for a PCI express ×16 slot and a PCI express ×1 slot to be electrically connected to, an ×16 resistor-capacitor circuit corresponding to the PCI express ×16 slot, an ×1 resistor-capacitor circuit corresponding to the PCI express ×1 slot, a slot installed on... 20060085586 - Voltage indicator signal generation system and method: The present invention provides for a system comprising a peripheral component interface (PCI) host bridge. The PCI host bridge is configured to be coupled to a PCI bus, and to receive a system reset signal, to generate a PCI bus reset signal based on the received system reset signal, to... 20060085587 - Cpu system, bus bridge, control method therefor, and computer system: In a system having an arrangement that a CPU (101) connected to a bus (107) via bus bridge (103) and a CPU 102 connected to a bus (107) via bus bridge (104), when the bus bridge (103) receives a semaphore acquisition request from the CPU (101), it controls acquisition of... 04/13/2006 > 23 patent applications in 19 patent subcategories.20060080470 - System and method of reducing the rate of interrupts generated by a device in microprocessor based systems: Herein described are at least a system and a method of reducing or decreasing the rate of interrupts transmitted by a device to a microprocessor. In a representative embodiment, the device comprises a universal asynchronous receiver/transmitter. In a representative embodiment, the rate of interrupts is reduced by receiving and using... 20060080472 - Method and apparatus for simultaneous bidirectional signaling in a bus topology: A method and apparatus for providing bidirectional signaling in a bus topology is provided. The bus topology allows more than two electrical circuits or devices to be coupled together along one or more common electrical conductors. For each device on the bus, a transmit buffer is preferably provided for every... 20060080471 - Offline caching of control transactions for storage devices: A system and method using hardware and software components enable a storage module to collect and maintain control transaction data (e.g., directives/events) when a storage device of the module is offline or in a low power configuration. The storage module contains a nonvolatile memory cache and a module controller, and... 20060080473 - Apparatus for emulating memory and method thereof: A memory emulating apparatus and its method are proposed to emulate a read-only memory (ROM) of a motherboard. The motherboard has a first or a second ROM socket. The present invention includes a first and second connectors for connecting with the first and the second ROM socket respectively, a rewritable... 20060080474 - Information processor: An information processor capable of easily dealing with addition or alteration of a format engine is provided. The information processor includes format engine management means and operation control means. The format engine managing means pre-defines common states which define operating states of each format engine in a representation common to... 20060080475 - Controller for portable electronic devices: A controller for use with laptop and notebook digital computers for reproducing compressed digital audio and video files. The controller includes a drive interface for traversing and accessing data stored on a drive of a computer system. Function keys or a remote controller permit users to access drives containing desired... 20060080476 - Multiple-apparatus connection system and the method thereof: The present invention is a multiple-apparatus connection system; the multiple-apparatus connection system comprises a USB port, a controller, and a voltage determining device. The USB port connects to a peripheral device. The voltage determining device connects to the USB port to generate a detection voltage signal. The controller receives the... 20060080479 - Information processing apparatus: A descriptor queue composed of descriptors containing input address information that represents an address for storing data to be processed and output address information that represents an address for storing processed data is constructed and stored in a memory. A stream processor for performing a plurality of processes parallel to... 20060080477 - Multi-channel dma with shared fifo: A direct memory access (DMA) circuit (200) includes a read port (202) and a write port (204). The DMA circuit (200) is a multithreaded initiator with “m” threads on the read port (202) and “n” threads on the write port (204). The DMA circuit (200) includes a data FIFO (210)... 20060080478 - Multi-threaded dma: A direct memory access (DMA) circuit (200) includes a read port (202) and a write port (204). The DMA circuit (200) is a multithreaded initiator with “m” threads on the read port (202) and “n” threads on the write port (204). The DMA circuit (200) includes two decoupled read and... 20060080480 - Data distribution system: A transfer apparatus receives, from a controller, a bit string including a plurality of individual data addressed to plural input/output units. The bit string is divided into data fragments. The data fragments are specified as corresponding to a target input/output unit. The specified data fragment is processed without performing a... 20060080481 - Compressed report descriptors for usb devices: A method and apparatus for creating USB peripheral device report descriptors: A short, compressed, report descriptor is stored in a peripheral device. This short report descriptor is transmitted to a USB wireless bridge and combined with templates stored in the bridge to create a USP report descriptor. Power is saved... 20060080482 - Dynamic buffer size allocation for multiplexed streaming: A method and disc drive are disclosed that employ dynamic buffer size allocation for handling multiple data streams, such as time-sensitive audio/video data. The method involves allocating a certain amount of required buffer space for each data stream to be handled without an interruption in recording or playing back the... 20060080483 - Disk device for serial communication and method of controlling the same: Embodiments of the invention provide a disk device and a method of controlling the device which is capable of suppressing peak current, even for serial communication, that is required when initiating rotation of a spindle motor down to a level equivalent to that of parallel communication, without prolonging elapsed time... 20060080484 - System having a module adapted to be included in the system in place of a processor: A system comprises a plurality of processor sockets and a module adapted to be received into at least one of the processor sockets in place of a processor. The sockets are electrically connected by way of communication links. Each socket has a plurality of electrical contacts electrically connected to the... 20060080485 - Bus system and semiconductor integrated circuit: A technology for allowing easy handling of a change in the address range of the subject of access or any of bus masters is provided. There is provided an address monitor unit including a table which is shared among a plurality of bus masters and stores therein access right information... 20060080486 - Method and apparatus for prioritizing requests for information in a network environment: A network system is disclosed in which requests for access to a shared resource are supplied to a request scheduler. The request scheduler includes a request handler that determines a priority level of a current request. The request handler inserts the current request into a request priority queue according to... 20060080487 - Time-based weighted round robin arbiter: A PCI bus time-based weighted round robin arbiter has a phase table divided into a plurality of phases. Each of the phases is assigned to one of the ports on the PCI bus. An arbiter state machine is coupled to the phase table and looks at the port assignment for... 20060080488 - Composite compact flash card: A composite Compact Flash card includes a storage unit, a slot, a mechanical switch, a switch detecting circuit and a control unit. The slot is used for plugging an external small-sized memory card therein. The mechanical switch is electrically connected to the slot for selecting one of the storage unit... 20060080489 - Bus bridge and data transfer method: In response to a direct memory access (DMA) request, a direct memory access controller (DMAC) performs reading at a host side at which a high-speed bus master is arranged. A bus bridge sends a dummy data to the DMAC, and performs reading at an input/output (I/O) side at which a... 20060080491 - Electronic device with usb interface: A mobile device 1 has a USB transmitter-receiver 3 having one or more interfaces formed by one or more endpoints for exchanging information via the USB, one or more logical devices 61 to 65 performing the exchanging of information with a host computer 2 via the USB transmitter-receiver, and a... 20060080490 - Usb controller with intelligent transmission mode switching function and the operating method thereof: There is provided a USB controller with an intelligent transmission mode switching function and the operating method thereof. The USB controller includes a host controller, a device controller, a data line set, and a monitor unit, wherein the data line set includes a D+ data line and a D− data... 20060080492 - Method of and apparatus for interfacing buses operating at different speeds: The present invention relates to a bridge for interfacing buses within an embedded system. There is provided a method of interfacing a first bus and a second bus operating at different speeds, the method includes counting a match value assigned to a predetermined peripheral device among peripheral devices connected to... 04/06/2006 > 35 patent applications in 18 patent subcategories.20060075146 - Address translation for input/output devices using hierarchical translation tables: An embodiment of the present invention is a technique to perform address translation. A table structure is indexed by a source identifier of an input/output (I/O) transaction specifying a guest physical address and requested by an I/O device to map the I/O device to a domain assigned to the I/O... 20060075147 - Caching support for direct memory access address translation: An embodiment of the present invention is a technique to provide cache support for direct memory access address translation. A cache structure stores cached entries used in address translation of a guest physical address to a host physical address. The guest physical address corresponds to a guest domain identified by... 20060075145 - Transfer acknowledgement mechanism for an msl architecture: Method and apparatus relating to an acknowledgement mechanism in an interconnected subsystem architecture. After a data message is transmitted, the transmitting device may transmit an acknowledge message on a channel undefined by the inter-subsystem communication protocol associated with the interconnection architecture. The undefined channel may be a generated using a... 20060075149 - Communications command control system with a software based at command receiver/transmitter: A communications command control system with a software-based AT command receiver/transmitter is disclosed. A data communications equipment (DCE) microprocessor is used for data computation. A communications application software is used for generating a communications command signal based on a set of communications commands. A software-based AT command receiver/transmitter is implemented... 20060075148 - Method of and system for testing remote storage: A remote backup storage system that may be tested with current backup data while the remote system continues to received data from a primary source data storage system includes a remotely located front-end volume that is connected to receive data from a source volume. A remotely located secondary volume normally... 20060075150 - Multi function peripheral device having priority operation mode and method of initializing mfp device: A multi function peripheral (MFP) device having priority operation mode and a method of initializing the MFP device in priority operation mode. The MFP device having priority operation mode according to the present general inventive concept includes a key input unit for setting a priority operation mode, to execute a... 20060075153 - Error-flagging apparatus, systems, and methods: Apparatus and systems, as well as methods and articles, may operate to monitor a flag bit to indicate an occurrence of at least one of a plurality of operational excursions associated with a peripheral card coupled to a bus controller.... 20060075154 - Extended input/output measurement block: An Input/output (I/O) measurement block facility is provided that creates subchannel measurement blocks (comprising device busy values) related to performance of an I/O operation of a subchannel, wherein a device busy time value is a sum of time intervals when the subchannel is device busy during an attempt to initiate... 20060075151 - Mp3 walkman with a replaceable hard disk: An audio player with an exchangeable hard drive as storage device, which is used to play audio files, comprises a main body, a power supply, an exchangeable hard drive, and a main PCB. The main PCB is installed inside the main body and comprises a set of golden fingers, which... 20060075152 - Usb attach detection for usb 1.1 and usb otg devices: An apparatus for detection of a USB host or a USB OTG device being attached to Vbus connector terminal of a USB device includes an attach detection pull down resistor isolated from the Vbus connector terminal. This attach detection feature guarantees USB attach detection and complies with current limits of... 20060075155 - Information handling system including detection of serial attached small computer systems interface (\"sas\") and serial advanced technology attachment (\"sata\") devices: It is determined whether a storage device that is coupled to a serial attached small computer systems interface (“SAS”) interface is a SAS storage device or a serial attached advanced technology attachment (“SATA”) storage device.... 20060075156 - Storage system and communications path control method for storage system: The present invention prompts path switching in accordance with the state of occurrence of intermittent failures, and prevents the responsiveness of a storage system from declining, or the like. Here, it is supposed, for example, that a host 1 is performing data communications with a storage device 2 by means... 20060075158 - Information processing apparatus and data transfer control method: An I/O controller to which an I/O device is connected includes a DMA controller (DMAC) and an access control unit (ACU). The DMAC executes DMA transfer in accordance with data transfer control information set in a control/status register by a user process. The ACU limits execution of DMA transfer by... 20060075157 - Programmable memory interfacing device for use in active memory management: An interface device for manipulating the data inside a memory or for assisting in manipulating the data between the memory and a nearby processor is disclosed. The device is a programmable core, having a limited instruction set designed for data layout transformations, pointer-chasing and data congregation/distribution. It is attached to... 20060075159 - Dsl modem and method for establishing a data transfer mode therefore: A modem for interconnecting a DSL line and a local bus comprises a DSL interface adapted to send and receive data on the DSL line at a DSL bandwidth selected from a first set of bandwidths, and a local bus interface adapted to operate at a local bus bandwidth selected... 20060075163 - Decimation of fixed length queues: Decimation of data from a fixed length queue retaining a representative sample of the old data. Exponential decimation removes every nth sample. Dithered exponential decimation offsets the exponential decimation approach by a probabilistic amount. Recursive decimation selects a portion of the queue and removes elements.... 20060075162 - Elastic buffer: An output of a first ring counter is held in a first storage circuit. Outputs of a second ring counter and the first storage circuit are input to a first AND circuit group. An output of a third ring counter and an output of the first storage circuit are input... 20060075161 - Methd and system for using an in-line credit extender with a host bus adapter: A storage area network (“SAN”) and a system is provided. The SAN includes, a host bus adapter operationally coupled with a credit extender, wherein the credit extender receives frames from a Fibre Channel network and sends the received frames to the HBA based on buffer space available in the HBA.... 20060075160 - Method for reducing the bus load in a synchronous data bus system: The present invention is related to buffering between synchronous circuits communication via a global synchronous bus, and in particular an arrangement for reducing the busload in a TDM bus system by, in a preferred embodiment, introducing a local TEM data bus and an active buffer including a CPU controlled logic... 20060075164 - Method and apparatus for using advanced host controller interface to transfer data: A method and apparatus for entering a mode of a host controller and omitting a state of a state machine sequence of the host controller for data exchange by the host controller are disclosed. For one embodiment, the method and apparatus include setting a bit before a command information is... 20060075165 - Method and system for processing out of order frames: A method and system for processing out of order frames received by a host bus adapter is provided. The method includes, determining if a current frame is out of order; determining if a frame is within a range of transfer for an Exchange; and creating (or appending if not the... 20060075166 - Multiple function integrated circuit: An integrated circuit for a multi-function handheld device includes a host interface, a bus, a processing module, a memory interface, a multimedia module, and a DC-to-DC converter. The host interface is operable to receive or transmit data with a host device when the multi-function handheld device is operably coupled to... 20060075167 - Recording/reproducing apparatus: A control method for controlling a recording/reproducing apparatus having plural storage units and an equipment to which the recording/reproducing apparatus is connected. The recording/reproducing apparatus has first and second storage units in which data and management data are stored. The equipment, to which is connected the recording/reproducing apparatus, has a... 20060075168 - Concurrent asynchronous usb data stream destuffer with variable width bit-wise memory controller: A concurrent asynchronous USB 2.0 data stream destuffer and separator with variable-width bit-wise memory controller is described. A parallel stream bit destuffer module identifies in parallel one or more stuffed bits in a decoded data field of a received data stream using a six-bit sliding window. The stuffed bits are... 20060075169 - Bus deadlock avoidance: Bus logic, a data processing apparatus and a method is disclosed. The bus logic is operable to couple a plurality of master logic units with a plurality of slave logic units to enable data transfers to occur, each master logic unit being operable to perform an address transfer which, when... 20060075170 - System and method for high voltage bidirectional communications interface: A system and method for providing an interface between a master device referenced at a first voltage and a slave device referenced at a second voltage. The system includes a bidirectional communications link between the master device and the slave device and a bidirectional transceiver device in the communications link... 20060075172 - Method for applying interrupt coalescing to incoming messages based on message length: A balanced approach is provided for interrupt coalescing, wherein interrupts of locking and other small size packets are maximized, while large data segment interrupts are minimized. Thus, the most desirable interrupt characteristics of both large data segments and smaller packets are achieved. Usefully, a data processing system has an adapter... 20060075171 - Providing unique event notifications: Embodiments of the present invention pertain to methods and apparatuses for providing unique event notifications is described. In one embodiment, an object accessor accesses an object that represents hardware. A notification value accessor acceses a notification value. A universally unique identifier (UUID) accessor accesses a UUID, and a unique action... 20060075173 - System and method for providing compatibility with both electrically isolated and non-isolated modules in an ethernet system: A system and method for configuring a slot to be compatible with both modules that are compliant with the isolation requirements for power over Ethernet and modules that are not compliant.... 20060075174 - Method and aparatus for plug-and-play webserver: A system, method and computer program for an apparatus is described. An apparatus is a very convenient, plug-and-play, ultra small, smart device that lets the end-users to host their websites at computer peripheral port. When said device is plugged in one of the computer peripheral ports: Universal Serial Bus (USB),... 20060075176 - Disk array system: A technique to distribute processing to meet a request from other system without partializing the processing to specific processor and can execute processing efficiently while adopting configuration to control one port unit by multiple processors at channel adapter of disk array system. CHA of a controller has a port unit... 20060075177 - Method and apparatus to permit external access to internal configuration registers: Access to internal configuration registers on a computer system's chipset using an external micro-controller is provided. A SMB configuration read command including a register address may be received from an external micro-controller. Access to an internal bus may be requested from a bus arbiter. If internal bus access is granted,... 20060075175 - Method and system for configuring high-speed serial links between components of a network device: A system for selectively forming high-speed serial connections between various components of a network device that includes a multiplexing switch coupled a GE slot and to the high speed serial interfaces of a PHY and at least two network devices. The switch can be programmed to connect the serial interfaces... 20060075178 - Communication between logical macros: A connection is provided between logical macros to allow prioritization of operations in accordance with an arbitration scheme that distinguishes between operations based on such factors as priority or size of transaction. The invention allows connection of logical macros and prioritizes the appropriate operation for the resources available to optimize... 20060075179 - Master electronics card with an adaptive bandwidth circuit: The bus circuit of a master electronics card in a backplane-based communications system adaptively grants the upstream bus to the slave electronics cards by the early termination of a scheduled number of grants to a slave electronics card when the bus circuit on the master electronics card detects idle cells.... Previous industry: Electrical computers and digital processing systems: multicomputer data transferring or plural processor synchronizationNext industry: Electrical computers and digital processing systems: memory ###### RSS FEED for 20080717: Integrate FreshPatents.com into your RSS reader/aggregator or website to track weekly updates. For more info, read this article. ###### Thank you for viewing Electrical computers and digital data processing systems: input/output patents on the FreshPatents.com website. These are patent applications which have been filed in the United States. There are a variety ways to browse Electrical computers and digital data processing systems: input/output patent applications on our website including browsing by date, agent, inventor, and industry. If you are interested in receiving occasional emails regarding Electrical computers and digital data processing systems: input/output patents we recommend signing up for free keyword monitoring by email. ### FreshPatents.com Support Results in 2.19967 seconds |