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Electrical computers: arithmetic processing and calculating January recently filed with US Patent Office 01/09

20090030960 - Data processing system and method: A matrix by vector multiplication processing system (1) comprises a compression engine (2) for receiving and dynamically compressing a stream of elements of a matrix; in which the matrix elements are clustered, and in which the matrix elements are in numerical floating point format, and a memory (SDRAM, 3) for... Agent: Jacobson Holman Pllc

20090030961 - Microprocessor performing iir filter operation with registers: A filter operation circuit of a microprocessor executes an IIR filter operation by using data provided from registers R0 to R2 and outputs one sample of data Y[n] subjected to filter operation and transfer data P[n] to be used in the next IIR filter operation. Register R0 provides filter coefficients... Agent: Mcginn Intellectual Property Law Group, Pllc

20090030962 - Quantum computing method and quantum computer: An (N+1) number of physical systems each having five energy levels |0>, |1>, |2>, |3>, and |4>, a qubit being expressed by |0> and |1>, are provided in an optical cavity having a cavity mode resonant with |2>-|3>, such that an N number of control systems and a target system... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c.

20090030963 - Multiplication circuit, digital filter, signal processing device, synthesis device, synthesis program, and synthesis program recording medium: A multiplication circuit of the present invention is provided with a first Booth encoder (1) for encoding lower-order several bits of a multiplier according to first rules of encoding using a Booth algorithm, and a second Booth encoder (5) for encoding most-significant several bits of the multiplier according to second... Agent: Mcdermott Will & Emery LLP

20090030964 - Matrix operation device: There is provided a matrix operation device comprising a k201-th power weighting multiplication circuit (202) for weighting inputs with k201-th power weighting coefficients (202b) which are obtained by multiplying weighting coefficients (202a) by 2 to the k201-th power and then integerizing the product, a k202 bit shift multiplication circuit (206)... Agent: Wenderoth, Lind & Ponack L.l.p.

20090024680 - Method and apparatus for dedicated hardware and software split implementation of rate matching and de-matching: In the method of rate-matching, software is used to calculate at least one rate-matching parameter for data, and dedicated hardware is used to perform at least one of a puncturing and repetition process on data based on the calculated rate-matching parameter. In rate de-matching, software is again used to calculate... Agent: Harness, Dickey & Pierce, P.L.C

20090024681 - Filter circuit and filtering method for removing consecutive noise from sampled digital signals: A filter circuit removes noise from digital data which is successively input in synchronism with a sampling clock signal. The filter circuit serves to filter the digital data by calculating the average value of every two of the current, previous and twice previous values, determining one of the three average... Agent: Studebaker & Brackett Pc

20090024682 - Determining an approximate number of instances of an item for an organization: Embodiments of the present invention pertain to determining an approximate number of instances of an item for an organization. According to one embodiment, instances of items that reside on computer systems associated with the organization are determined. Instances of the same item can reside on different computers and an identification... Agent: Hewlett Packard Company

20090024683 - N-dimensional coordinates conversion: Aspects of the subject matter described herein relate to converting between polar and rectangular coordinates. In aspects, the Nth polar angle is measured upward from the sine-projection of the Nth component in the (N−1)th dimension. The last polar coordinate is zero if and only if the corresponding last rectangular coordinate... Agent: Microsoft Corporation

20090024684 - Method for controlling rounding modes in single instruction multiple data (simd) floating-point units: A method for controlling rounding modes in a single instruction multiple data (SIMD) floating-point unit is disclosed. The SIMD floating-point unit includes a floating-point status-and-control register (FPSCR) having a first rounding mode bit field and a second rounding mode bit field. The SIMD floating-point unit also includes means for generating... Agent: Dillon & Yudell LLP

20090024685 - High speed and efficient matrix multiplication hardware module: A matrix multiplication module and matrix multiplication method are provided that use a variable number of multiplier-accumulator units based on the amount of data elements of the matrices are available or needed for processing at a particular point or stage in the computation process. As more data elements become available... Agent: Edell, Shapiro & Finnan, Llc

20090019099 - Math calculation in word processors: Architecture for a word processing application that facilitates operating on mathematical symbols, expressions, and/or equations input to a word processing document, and returning results back to the document. User input to the document in the form of math symbols, expressions or equations is transformed into a format for processing by... Agent: Microsoft Corporation

20090019100 - Population count approximation circuit and method thereof: A circuit and method provides an estimate of a population count (popcount) of a plurality of input bit values. In one form the input bit values represent respective nodes of an integrated circuit. An approximation circuit uses an approximation input stage which receives a plurality of data inputs and has... Agent: Freescale Semiconductor, Inc. Law Department

20090019101 - Coefficient control for filter in magnetic media read channel: A read channel of a magnetic data storage device includes a filter to provide equalization of the signal being detected from the magnetic media. The filter utilizes coefficients for the filter response. The filter coefficients may drift sideways over time. The drift is detected and a correction is implemented by... Agent: Schiff Hardin, LLP Patent Department

20090019102 - Coefficient memory for least mean square finite impulse response filter: A read channel of a magnetic recording apparatus includes a filter that uses filter coefficients to process the data detected by a read head from the magnetic recordable media. The coefficients change with time and circumstances. When data is read and found to pass error detection, the filter coefficient set... Agent: Schiff Hardin, LLP Patent Department

20090013018 - Automatic calculation with multiple editable fields: A simplified transaction data management system using automatic calculation with multiple editable fields is provided. The system enables a user to manage transactions with a simplified interface, with multiple editable fields and automatic calculation of other fields based on mathematical relations with inputs that are received in any of the... Agent: Westman Champlin (microsoft Corporation)

20090013019 - Apparatus and method for generating random numbers: Random number generation apparatus (2) is described that comprises a threshold detector (4) and an electrical noise generator (6). The electrical noise generator (6) has at least two channels (8a-8d) and each channel is arranged to generate an electrical noise signal. The threshold detector (4), which may comprise a digital... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20090013020 - Method and device for restoring degraded information: The present invention provides a technology which can perform a precise restoration to a distribution of original information by carrying out an iterative calculation using only a distribution of degraded information. The method according to the present invention performs the restoration to original information based only on degraded information. The... Agent: Oliff & Berridge, PLC

20090013021 - Variable length fft system and method: The present invention discloses a variable length fast Fourier transform (FFT) system and a method for performing the FFT system in a global navigation satellite system (GNSS) signal acquisition and tracking, which includes a memory and a number of processing elements. Based on the GNSS signal tracking, the variable length... Agent: Madson & Austin

20090013022 - Multiplier engine apparatus and method: A multiplier engine that reduces the size of the circuitry used to provide the multiplier engine, as well as increases the speed at which the multiplication algorithm is performed, are provided. The illustrative embodiments may comprise a M*8 multiplication engine having one or more 4:2 compressors that comprise only two... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20090006508 - Method and apparatus for extrapolating diagnostic data: A method and an apparatus for extrapolating diagnostic data relating to one pupil diameter to another pupil diameter. Embodiments according to the invention are more particularly directed to extrapolating wavefront aberration data, for example, in the form of Zernike polynomial data, obtained from a smaller pupil diameter, d1, to a... Agent: Bausch & Lomb Incorporated

20090006509 - High-radix multiplier-divider: m

20090006510 - System and method for deflate processing within a compression engine: An apparatus to implement a deflate process in a compression engine. An embodiment of the apparatus includes a hash table, a dictionary, comparison logic, and encoding logic. The hash table is configured to hash a plurality of characters of an input data stream to provide a hash address. The dictionary... Agent: Zilka-kotab, PC- Rmi

20090006512 - Normal-basis to canonical-basis transformation for binary galois-fields gf(2m): Basis conversion from normal form to canonical form is provided for both generic polynomials and special irreducible polynomials in the form of “all ones”, referred to as “all-ones-polynomials” (AOP). Generation and storing of large matrices is minimized by creating matrices on the fly, or by providing an alternate means of... Agent: Intel Corporation C/o Intellevate, LLC

20090006511 - Polynomial-basis to normal-basis transformation for binary galois-fields gf(2m): Basis conversion from polynomial-basis form to normal-basis form is provided for both generic polynomials and special irreducible polynomials in the form of “all ones”, referred to as “all-ones-polynomials” (AOP). Generation and storing of large matrices is minimized by creating matrices on the fly, or by providing an alternate means of... Agent: Intel Corporation C/o Intellevate, LLC

20090006513 - Device and method for generating a random number: A method and a device are provided, in particular a transponder, for generating a random number by a linear feedback shift register, wherein a first seed is generated by means of a first automaton, a second seed is generated by means of a second automaton, the first and second automata... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20090006514 - Method and device for numerically generating a frequency: To generate a digital signal at a given frequency, a step of calculating at least one trigonometric function for consecutive phases separated by a phase gap φS which is dependent on the frequency to be generated is repeated, and, during the step of calculating said trigonometric function for a phase... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090006515 - System and method for dynamic weight processing: A dynamic weight processing system. The inventive system includes a first circuit for receiving an input signal and a second circuit for filtering the input signal with dynamic weights to provide a weighted signal. In an illustrative embodiment, the dynamic weights are finite impulse response filter correlation coefficients that are... Agent: Benman, Brown & Williams

20090006516 - Methods and systems for processing and displaying data: Methods and systems of processing and displaying data that include obtaining and processing time-time data to obtain an in-phase sum of the time-time data, and of providing and utilizing the in-phase sum of the time-time data to generate a graphical display of the Radon sum of the time-time data. The... Agent: O'keefe, Egan, Peterman & Enders LLP

20090006517 - Unified integer/galois field (2m) multiplier architecture for elliptic-curve crytpography: A unified integer/Galois-Field 2m multiplier performs multiply operations for public-key systems such as Rivert, Shamir, Aldeman (RSA), Diffie-Hellman key exchange (DH) and Elliptic Curve Cryptosystem (ECC). The multiply operations may be performed on prime fields and different composite binary fields in independent multipliers in an interleaved fashion.... Agent: Intel Corporation C/o Intellevate, LLC

20090006518 - Simple mimo precoding codebook design for a mimo wireless communications system: The present invention relates to methods and apparatus for establishing a precoding codebook for a Multiple Input Multiple Output (MIMO) wireless communication system. The precoding codebook includes a plurality of codebook entries. Each codebook entry includes four sets of vectors for four respective corresponding transmission ranks. The vectors may be... Agent: Robert E. Bushnell