Electrical computers: arithmetic processing and calculating inventions 12/08

20080320063 - Transacting accesses via unmanaged pointers: Various technologies and techniques are disclosed for transacting accesses via unmanaged pointers in a transactional memory system. A transactional memory system is provided. Source code is analyzed to identify operations that create unmanaged pointers. Information is tracked about the targets of unmanaged pointer values in pointer variables. The target information... Agent: Microsoft Corporation

20080320064 - Method and apparatus for controlling reading level of memory cell: A method and apparatus for controlling a reading level of a memory cell are provided. The method of controlling a reading level of a memory cell may include: receiving metric values calculated based on given voltage levels and reference levels; generating summed values for each of the reference levels by... Agent: Harness, Dickey & Pierce, P.L.C

20080320065 - Arithmetic processing apparatus and arithmetic processing method: In an arithmetic processing apparatus, a dividing unit divides a second bit string into a low-order bit part having a bit width equal to a first bit width and a high-order bit part which is higher than the low-order bit part, a first arithmetic unit performs arithmetic operations for a... Agent: Staas & Halsey LLP

20080320066 - Cryptographic random number generator using finite field operations: An apparatus and method are provided in various illustrative embodiments for an integrated circuit chip that provides a fast, compact, and cryptographically strong random number generator. In one illustrative embodiment, an apparatus includes an initial random source, and a post-processing block in communicative connection with the initial random source. The... Agent: Lsi Logic Corporation Timothy Croll Ms D-106

20080320067 - Method and system for constant amplitude random sequence construction: Aspects of a method and system for constant amplitude random sequence construction may include generating one or more real signal components via a random number generator, wherein each of the generated one or more real signal components may be subjected to an amplitude constraint. One or more corresponding imaginary signal... Agent: Mcandrews Held & Malloy, Ltd

20080320068 - Wideband suppression of motion-induced vibration: The present invention is a new method to create motions based on the use of rate limited profiles convolved with FIR kernel filters, termed herein as Rate limited Boxcar Aliased IFIR (RBAI) motions, or profiles. The present invention demonstrates a simpler generalized view of the creation of pulse-based profiles based... Agent: Valauskas & Pine LLC

20080320069 - Variable length fft apparatus and method thereof: The invention discloses a variable length FFT apparatus and a method thereof. The FFT apparatus includes a split-radix based FFT unit and a multiplexing unit. The split-radix based FFT unit has a plurality of processing elements cascaded in a series. The multiplexing unit is coupled to the split-radix based FFT... Agent: North America Intellectual Property Corporation

20080320070 - Method and system for efficient full resolution correlation: Aspects of a method and system for efficient full resolution correlation may include correlating a first signal with a second signal at a rate corresponding to a first discrete signal, wherein each sample of the first signal may be generated by summing a plurality of consecutive samples from the first... Agent: Mcandrews Held & Malloy, Ltd

20080313247 - Page ranking based on a behavioral web graph: A computer implemented method for scoring a first network node comprising data accessible to a user when connected to the network has steps of (a) determining at least an approximate probability for the first network node that a user not connected to the node will connect to the first node... Agent: Central Coast Patent Agency, Inc

20080313248 - Arrangement and method for cross-monitoring of data: An arrangement for cross monitoring two independent signals. The arrangement a calculator configured to calculate a value depending upon a signal value, a drift value and a feedback value, and a determining unit configured to determine a larger of the calculated value and a first predetermined value. The arrangement also... Agent: Venable LLP

20080313249 - Random number generator with ring oscillation circuit: A random number generator includes a ring oscillator having an EX-OR gate and four inverters together forming a loop. This loop enters stable state for a start signal having the low level and oscillates for the start signal having the high level. When the start signal has a pulse of... Agent: Mcdermott Will & Emery LLP

20080313250 - Random signal generator and random number generator including the same: A random signal generator includes a differential noise generation circuit, an amplification circuit and a single-ended amplifier. The differential noise generation circuit includes a pair of input nodes and a pair of output nodes, and is configured to receive noise signals at the pair of input nodes and to generate... Agent: Volentine & Whitt PLLC

20080313251 - System and method for graph coarsening: r

20080313252 - Sphere decoder and decoding method thereof: A sphere decoder sets a Euclidean distance between a lattice vector obtained by using an MMSE or ZF estimate and a received signal as an initial radius, further reduces the initial radius, and searches lattices points included inside a hypersphere with the further reduced initial radius. In addition, one lattice... Agent: JeffersonIPLaw, LLP

20080313253 - Operation circuit for modified euclidean algorithm in high-speed reed-solomon decoder and method of implementing the modified euclidean algorithm: Provided are an operation circuit for a modified Euclidean algorithm in a high-speed Reed-Solomon (RS) decoder and a method of implementing the modified Euclidean algorithm. Since a finite state machine (FSM) for generating a stop signal and an FSM for generating a control signal that controls a swap operation, a... Agent: Lahive & Cockfield, LLP Floor 30, Suite 3000

20080307022 - Mixed radix conversion with a priori defined statistical artifacts: A method is presided for masking a process used in generating a random number sequence. The method includes generating a random number sequence. This step involves selectively generating the random number sequence utilizing a ring structure which has been punctured. The method also includes performing a mixed radix conversion to... Agent: Harris Corporation C/o Darby & Darby PC

20080307023 - Method and apparatus for adjusting reference frequency: The invention discloses a method for adjusting a reference frequency. First, a training signal is received based on the reference frequency. Then, a target region of the training signal is divided by an original training sequence so that a quotient polynomial is generated. Afterward, the quotient polynomial is divided by... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20080307024 - Mixed radix number generator with chosen statistical artifacts: A method is provided for masking a process used in generating a number sequence. The method includes generating a first sequence of numbers contained within a Galois field GF[M]. The method also includes performing a first modification to a first number in the first sequence of numbers. The first modification... Agent: Harris Corporation C/o Darby & Darby PC

20080307025 - Location determination in sensor networks using time-window algorithm: A network system and a method of determining a location of a transmitter are described. The method includes reading a signal strength of a signal transmitted by the transmitter by each of a plurality of receivers, at each frequency in a plurality of frequencies, extracting phase information using an amplitude... Agent: Dla Piper LLP (us) Attn: Patent Group

20080307026 - Memory address generating method and twiddle factor generator using the same: The present invention relates to a memory address generating method and a twiddle factor generator using the memory address generating method in a fast Fourier transform (FFT) system. In the memory address generating method for generating a memory address of a twiddle factor in a fast Fourier transform (FFT) system... Agent: Cantor Colburn, LLP

20080307027 - System and method to compute narrow bounds on a modal interval spherical projection: A computer executable method of processing a representation of a modal interval spherical projection is provided. A representation of a vector comprised of modal intervals X, Y, and Z is provided wherein each modal interval of the modal intervals are delimited by first and second marks of a digital scale.... Agent: Nawrocki, Rooney & Sivertson Suite 401, Broadway Place East

20080307028 - Generation of test cases with range constraints for floating point add and subtract instructions: Methods, apparatus and systems are disclosed for the generation of range-constrained test cases for verification of designs of arithmetic floating point units. Given three ranges of floating point numbers Rx, Ry, Rz, a floating point operation (op), and a rounding-mode (round), three floating point numbers x, y, z are generated... Agent: Scully, Scott, Murphy & Presser, P.C.

20080307029 - Arithmetic device and arithmetic method: An FMA arithmetic unit has a timing control circuit. The timing control circuit controls bypass selectors to bypass intermediate resisters on performing floating point addition/subtraction, controls another bypass selector to bypass another intermediate register on performing floating point multiplication, and controls still another bypass selectors to bypass a register file/other... Agent: Staas & Halsey LLP

20080307030 - Generation of test cases with range constraints for floating point add and subtract instructions: Methods, apparatus and systems are disclosed for the generation of range-constrained test cases for verification of designs of arithmetic floating point units. Given three ranges of floating point numbers Rx, Ry, Rz, a floating point operation (op), and a rounding-mode (round), three floating point numbers x, y, z are generated... Agent: Scully, Scott, Murphy & Presser, P.C.

20080307031 - Fast modular zero sum and ones sum determination: In one embodiment, a state determiner comprises a plurality of logic circuits and a second logic circuit. Each logic circuit corresponds to a respective bit position of a result of an adder. A first logic circuit corresponds to a least significant bit of the result and is coupled to receive... Agent: Mhkkg, PC/apple, Inc.

20080307032 - Divider circuit: A divider circuit for dividing a dividend by a divisor, includes: a multiplicative divisor generating circuit configured to generate 2m-2 multiplicative divisors that are 2 to 2m-1 times the divisor, the m indicating an integer of 2 or more; and a quotient generating circuit configured to sequentially generate a quotient... Agent: SocalIPLaw Group LLP

20080301208 - Electronic date calculator: An electronic date calculator includes an electronic processor, input keys operably connected to the processor, at least one date function key corresponding with a selected date unit and operably connected to the processor, and a display operably connected to the processor. The processor is programmed to drive the display to... Agent: Trego, Hines & Ladenheim, PLLC

20080301209 - Redundancy-free circuits for zero counters: A more efficient method of counting the number of zeros in a 4-bit value generates three output bits (q0, q1 and q2) from four input bits (a0, a1, a2 and a3) according to the logic equations q0=not(a1+a2+a3+a4), q1=not(a0+a1), q2=a1(not a0)+not(a0+a2). These output bits yield the number of non-significant (leading or... Agent: Ibm Corporation (jvm)

20080301210 - Random telegraph signal noise as a source for random numbers: An apparatus and method for providing a source of random numbers are generally described. In one example, an apparatus includes one or more storage elements having a selected voltage and a trip point, the voltage being close enough to the trip point such that random telegraph signal (RTS) noise associated... Agent: Cool Patent, P.C. C/o Intellevate

20080301211 - Systems, methods and apparatus for d-dimensional formulation and implementation of recursive hierarchical segmentation: Systems, methods and apparatus are provided through which in some embodiments of recursive hierarchical segmentation of data with any number of spatial dimensions. Some embodiments of the recursive hierarchical segmentation include computationally efficient parallel implementations and other embodiments of the recursive hierarchical segmentation include computationally efficient serial implementations.... Agent: Nasa Goddard Space Flight Center

20080301212 - Real time universal date and time conversion: A method and system makes date-time conversions and complex date-time calculations between dates of different calendaring systems. The conversion method herein allows embedded, real-time conversion in computer applications and systems between multiple calendaring systems. A date of a first date-time format is converted to any date of a second date-time... Agent: Martin & Associates, LLC

20080301213 - Division with rectangular multiplier supporting multiple precisions and operand types: A division method includes determining a precision indicator for the division operation that indicates whether the quotient should be a single precision, double precision, or extended precision floating-point number. The division is performed at a rectangular multiplier using the Goldschmidt or Newton-Raphson algorithm. Each algorithm calculates one or more intermediate... Agent: Larson Newman Abel Polansky & White, LLP