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Electrical computers: arithmetic processing and calculating inventions 01/08

Recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing format for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.

  
01/31/2008 > patent applications in patent subcategories.

20080028012 - Device and program for ciphering data: A terminal to be connected to a network has: a data acquisition unit for acquiring first data from the network; an extraction unit for extracting second data regarding a physical quantity in accordance with the first data; a random number generation unit for generating a random number in accordance with... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080028013 - Two-dimensional fast fourier transform calculation method and apparatus: A two-dimensional fast Fourier transform is carried out on a block of sample points by executing a one-dimensional fast Fourier transform on all vertical lines of sample points, storing the resulting values at one or more specified positions in each vertical line in an internal buffer, and then executing a... Agent: Volentine & Whitt PLLC

20080028014 - N-bit 2's complement symmetric rounding method and logic for implementing the same: A rounding circuit is provided that includes an input for receiving a 2's complement number to be rounded. The 2's complement number has a format SXY, where S represents a sign bit, X represents one or more bits to round and keep, and Y represents one or more bits to... Agent: Renner, Otto, Boisselle & Sklar

20080028015 - Systolic array: Disclosed is a one-dimensional MFA systolic array for matrix computation using an MFA (modified Faddeeva algorithm), in which downward square MFA array processing and upward square MFA array processing are mapped to a one-dimensional array in horizontal directions, respectively. In each PE in the one-dimensional array, downward and upward MFA... Agent: Foley And Lardner LLP Suite 500

  
01/24/2008 > patent applications in patent subcategories.

20080021941 - Detection of a disturbance in a calculation performed by an integrated circuit: A method for detecting a disturbance of a calculation, by an electronic circuit, of a result of an integral number of applications of an internal composition law on elements of an abelian group, by successive iterations of different steps according to the even or odd character of a current coefficient... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20080021940 - Electronic device and data processing method: An electronic device that defends against an attack trying to identify confidential information from power consumption is provided without any circuit that performs a complementary operation to eliminate bias in power consumption. An elementary device A 100 is formed by a plurality of transistors 101-112. The elementary device A 100... Agent: Birch Stewart Kolasch & Birch

20080021942 - Arrangements for evaluating boolean functions: In some embodiments a flexible scalable Boolean processing apparatus is disclosed. The apparatus can include a register to accept Boolean inputs, a Boolean lookup table coupled to the register to accept the Boolean inputs and to perform a Boolean function on the Boolean inputs and to produce a result. The... Agent: Alan Carlson

20080021943 - Equality comparator using propagates and generates: A carry lookahead adder is employed to determine an equality relationship and one or more inequality relationships between two operands. The carry lookahead adder includes a hierarchy of carry lookahead stages, each carry lookahead stage using either corresponding bits of the two operands or the carry generate values and carry... Agent: Larson Newman Abel Polansky & White, LLP

20080021944 - Method and apparatus for reducing jitter in output signals from a frequency synthesizer using a control word having a fractional bit: A method for reducing jitter in an output signal from a frequency synthesizer using a control word having a fractional bit includes dividing the output signal by a predetermined divisor to present a modified output signal substantially free of jitter.... Agent: Texas Instruments Incorporated

20080021945 - Method of processing spatial-temporal data processing: In one embodiment, the invention includes a method of formulating a parametric model from spatial-temporal data including fitting model parameters calculated from spatial-temporal data to at least one displacement model and calculating new spatial temporal data based on the model. In another embodiment, the invention includes a method of processing... Agent: Schox PLC

20080021946 - Polyphase interpolating filter with noise shaping modulator: A polyphase filtering method and a polyphase filter is described having N polyphase branches, which receives input samples, an a single branch of the polyphase filter is selected for an interpolation of an input sample. A noise shaping modulator is used for noise shaping the output of the filter to... Agent: Nxp, B.v. Nxp Intellectual Property Department

20080021947 - Triple-base number digital signal and numerical processing system: A processor includes a triple-base-number-system (TBNS) Arithmetic Unit architecture. TBNS processing enables extremely high-performance digital signal processing of larger word-size data, and enables a processor architecture having reduced hardware complexity and power dissipation. With demanding signal processing applications a TBNS processing is much more efficient as compared to either traditional... Agent: Manelli Denison & Selter PLLC

20080021948 - Optical correlation apparatus and method: This invention relates to a pattern recognition correlator and method for correlating input data with one or more reference data sets. The input data, which may be for instance digital amplitude modulated optical data, is used to modulate an optical signal to form a phase modulated optical signal. This temporal... Agent: Nixon & Vanderhye, PC

  
01/17/2008 > patent applications in patent subcategories.

20080016133 - Electronic book cover: The electronic book cover is made of a thick board which is strategically adapted to support an electronic device, such as a calculator or MP3 player. A cutout in the board receives the electronic device, and it is securely bolstered to the main block of book pages. The board is... Agent: Law Offices Of Clement Cheng

20080016134 - Methods and apparatuses to find a median of a set of values: Methods and apparatuses that can determining a median value from a set of m values are disclosed. The method can include receiving a set of values, separating the set of values into subsets where some subsets have multiple values and at least one other has a single value. The subsets... Agent: Alan Carlson

20080016135 - Method and apparatus for generating an initial value for a pseudo-random number generator: Apparatus and method for generating an initial value for a pseudo-random number generator, with an oscillator configured to generate an oscillator signal; and a generator configured to generate the initial value based on the oscillator signal at least during part of a transient of the oscillator.... Agent: Dickstein Shapiro LLP

20080016136 - Filtering integrated circuit: A filtering integrated circuit comprises: a storing circuit; a filter coefficient calculating unit configured to receive frequency information that identifies a characteristic frequency of an output signal in a filtering process, and to set filter coefficients calculated based on the frequency information in the storing circuit; and a filtering unit... Agent: SocalIPLaw Group LLP

20080016137 - Systems and methods for graphical rendering: A computer readable medium configured to approximate the integral of the product of a plurality of functions includes logic configured to factor the plurality of functions into a set of fixed functions and one varying function, logic configured to determine a first vector that represents the product of the fixed... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080016138 - Systems and methods for graphical rendering: A computer readable medium is configured to determine the integral of the product of a plurality of functions. The computer readable medium includes logic configured to project each function of the plurality of functions into the wavelet domain, logic configured to encode basis coefficients of each function in a wavelet... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080016139 - Shift register with each stage controlled by a specific voltage of the next stage and the stage after thereof: A shift register has shift register units. The nth shift register unit includes first to third level control units and first and second driving units. The first and second level control units respectively provide a first clock signal and a first voltage to an output terminal. The first driving unit... Agent: Bacon & Thomas, PLLC

20080016140 - Binary coded decimal addition: The binary coded decimal (BCD) adder circuit adds two BCD encoded operands, with an input carry bit, and produces a BCD encoded sum. The adder has three stages. The first stage receives two BCD encoded operands as inputs, groups the inputs into contiguous blocks of 4-bits each, computes an intermediate... Agent: Ibm Endicott (anthony England) Law Office Of Anthony England

20080016141 - A direct digital synthesis circuit: A direct digital synthesis circuit (108) includes a plurality of current sources (210, 211, 212), an output circuit (200), and a logical multiplier circuit (202). The output circuit (200) provides a synthesized waveform (164) output and includes a first (206) and second branch (208). The logical multiplier circuit (202) is... Agent: Vedder Price/freescale

  
01/10/2008 > patent applications in patent subcategories.

20080010329 - Method and computer program product for circuit analysis and circuit simulation device: A method and a computer program product for a circuit analysis and a circuit simulation device, capable of increasing an analysis speed for circuit analysis, the circuit simulation device includes a circuit matrix generation unit for generating a coefficient matrix based on netlist information corresponding to a circuit to be... Agent: Foley And Lardner LLP Suite 500

20080010328 - System and method to determine a single sql bom solve: A system, method, and computer program for storing a plurality of usage conditions to a data set for retrieval by a single query statement, comprising the steps of converting a usage condition into a first normal form representation, minimizing said first normal form representation, transforming said minimized first normal form... Agent: Ugs Corp.

20080010330 - Method and system for detecting difference between plural observed results: A method and system for analyzing time series data. In an embodiment, a loop is executed and terminated upon a specified maximum number of iterations of the loop being performed or upon a difference between scores in successive iterations of the loop not being greater than a specified tolerance, wherein... Agent: Schmeiser, Olsen & Watts

20080010331 - Method and device for creating a starting value for a pseudorandom number generator: Method and device for creating a starting value for a pseudorandom number generator, having a reader configured to unstably read out an output value from a memory cell and a determiner configured to determine the starting value on the basis of the output value of the memory cell.... Agent: Dickstein Shapiro LLP

20080010332 - Efficient computation of the modulo operation based on divisor (2n-1): A system and method for computing A mod (2n−1), where A is an m bit quantity, where n is a positive integer, where m is greater than or equal to n. The quantity A may be partitioned into a plurality of sections, each being at most n bits long. The... Agent: Huffman Law Group, P.C.

20080010333 - Fused booth encoder multiplexer: A multiplier circuit comprises a fused Booth encoder multiplexer which produces partial product bits, a tree which uses the partial product bits to generate partial products, and an adder which uses the partial products to generate intermediate sum and carry results for a multiplication operation. The fused Booth encoder multiplexer... Agent: Ibm Corporation (jvm)

Previous industry: Data processing: database and file management or data structures
Next industry: Electrical computers and digital processing systems: multicomputer data transferring or plural processor synchronization


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