Electrical computers: arithmetic processing and calculating inventions 03/07

20070073795 - Method and apparatus for calculating an inverse dct: A method, and associated apparatus is described for calculating an inverse transform for transform coded data. In a main embodiment, an 8×8 Discrete Cosine Transform (DCT) (200) is arranged in columns of coefficients (202,204,206), the last coefficient is selectively modified to control mismatch in a known manner. The inverse DCT... Agent: Philips Intellectual Property & Standards

20070073796 - Method and apparatus for fft computation: The invention relates to a method and apparatus for computing a 2N-point Fourier transform, direct or inverse, out of a 2N-sample input sequence. According to the invention, a signal processing method and apparatus is provided that makes use of an existing N-point FFT processor as well as other blocks such... Agent: Baker & Daniels LLP 111 E. Wayne Street

20070073797 - Recursive method for solving the inexact greatest common divisor problem: A method, system, and computer program product are provided for determining the greatest common divisor (GCD) for a plurality of data points. A plurality of interim solutions are generated from an initial set of at least one data point from the plurality of data points. An iterative algorithm is then... Agent: Tarolli, Sundheim, Covell & Tummino L.L.P.

20070073798 - Enhanced floating-point unit for extended functions: An embodiment of the present invention is a technique to perform floating-point operations. A floating-point (FP) squarer squares a first argument to produce an intermediate argument. The first and intermediate arguments have first and intermediate mantissas and exponents. A FP multiply-add (MAD) unit performs a multiply-and-add operation on the intermediate... Agent: Blakely Sokoloff Taylor & Zafman

20070067374 - Random number generating circuit: A random number generating circuit comprises a pseudo random number generating circuit that generates pseudo random numbers of an M-sequence; a physical random number generating circuit that generates physical random numbers; and a modulation circuit that modulates the physical random numbers generated by the physical random number generating circuit with... Agent: Fish & Richardson P.C.

20070067375 - Random number generation device and method, generator evaluation method and method for using random numbers: A random number generation device, comprising: a random number generation unit for generating random numbers; a random number generation control unit for providing parameters for enabling the random generation unit to generate random numbers; and a randomness determination unit for determining the randomness of each generated random number, wherein if... Agent: Arent Fox PLLC

20070067376 - Complimentary discrete fourier transform processor: Method and apparatus for a complimentary discrete Fourier transform processor. An input signal is sampled, samples then being sequentially delayed, channelized, and processed. Synthesized outputs are provided in complimentary form. Channels are independent so as to allow for the application of gain, equalization and interference cancellation on a channel-by-channel basis.... Agent: Air Force Research Laboratory Ifoj

20070067377 - Methods, devices, and programs for designing a digital filter and for generating a numerical sequence of desired frequency characteristics: A standard function is inputted and an interpolation function of finite length is calculated therefrom. Then, the frequency characteristics of the interpolation function is shifted by a desired amount in the frequency axis direction, thereby determining input frequency characteristics based on specification. Filter coefficients are determined by performing inverse FFT... Agent: Connolly Bove Lodge & Hutz LLP

20070067378 - Method and apparatus of spectral estimation: A spectrum of a set of samples from a data stream of sampled data is estimated until a targeted signal to noise ratio is achieved.... Agent: Agilent Technologies Inc.

20070067379 - Data processing apparatus: A reconfigurable data processing apparatus. In this apparatus, many cells A 100 for performing ALU processing and cells B 150 for performing bit processing are arranged, each cell includes n-bit input/output ports and the cells are connected through a network with n-bit buses. Furthermore, when the number of output bits... Agent: Stevens, Davis, Miller & Mosher, LLP

20070067380 - Floating point intensive reconfigurable computing system for iterative applications: A reconfigurable computing system for accelerating execution of floating point intensive iterative applications. The reconfigurable computing system includes a plurality of interconnected processing elements mounted on a printed circuit board, a host processing system for displaying real-time outputs of the floating point calculations performed by the processing elements, and an... Agent: Womble Carlyle Sandridge & Rice, PLLC

20070061387 - System and method for converting from decimal floating point into scaled binary coded decimal: A system and method for converting from decimal floating point (DFP) into scaled binary coded decimal (SBCD). The system includes a mechanism for receiving a DFP number. The system also includes at least one of a mechanism for performing coefficient expansion on the DFP number to create a binary coded... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20070061388 - System and method for converting from scaled binary coded decimal into decimal floating point: A system and method for converting from scaled binary coded decimal (SBCD) into decimal floating point (DFP). The system includes a mechanism for receiving one or more of an exponent part of a SBCD number and a coefficient part of the SBCD number. The system also includes at least one... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20070061389 - Logarithm processing systems and methods: Embodiments of logarithm processing systems and methods are disclosed. The system embodiments described herein comprise two tables corresponding to various base and derivative functions of a logarithm, with logic configured to access the tables and format and normalize the accessed values to evaluate the logarithm using a standard FMAD unit.... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070061390 - Interpolator using splines generated from an integrator stack seeded at input sample points: An interpolator comprises a delay line, a state-variable computer coupled to the delay line and configured to compute initial conditions for at least one interpolation interval, an integrator stack coupled to the state-variable computer and configured to process the initial conditions, and a direct load of state variables for producing... Agent: Tensorcomm, Inc.

20070061391 - Floating point normalization and denormalization: A data processor includes a first bit field of a first plurality of bits representing a mantissa of a floating point number and a second bit field of a second plurality of bits representing an exponent of the floating point number. The first plurality of bits is partitioned into a... Agent: Freescale Semiconductor, Inc. Law Department

20070061392 - Fused multiply add split for multiple precision arithmetic: An apparatus and method for performing floating-point operations, particularly a fused multiply add operation. The apparatus includes a arithmetic logic unit adapted to produce both a high-order part (H) and a low-order part (L) of an intermediate extended result according to H, L=A*B+C, where A, B are input operands and... Agent: Scully Scott Murphy & Presser, PC

20070055717 - Receiving module and receiver having the same: Provided are a receiving module and a receiver having the same. The receiving modules includes: a comparing and detecting means for comparing a current bit of a received signal having a continuous waveform to a previous bit thereof and detecting a difference between the current bit and the previous bit;... Agent: Ladas & Parry LLP

20070055718 - Apparatus and method for treating a reference signal to present a synthesized output signal: An apparatus employing control words to present a synthesized output signal having an output frequency and a delay with respect to an input signal includes: (a) A multiplexer receiving the input signal and having an output and an address input. (b) An output unit generates the output signal in response... Agent: Texas Instruments Incorporated

20070055720 - Apparatus and method of processing signals of an optical disk recording/reproducing apparatus: A signal processing apparatus of an optical disk recording/reproducing apparatus and a signal processing method performed thereby are provided. The signal processing apparatus may include an operational data generation unit for receiving digital signals, filtering received digital signals and outputting filtered signals as operational data and a data arithmetic-operation unit... Agent: Lee & Morse, P.c.

20070055719 - Method and apparatus for digital noise mask filtering: A system and method for filtering spurious transitions from a digital signal is disclosed. The system includes a latch, a timer, and a logic circuit. Upon a transition of the digital signal, the latch holds the digital signal to block any additional transitions and the timer, which is connected to... Agent: Huffman Law Group, P.c.

20070055721 - Repetitive controller for compensation of periodic signals: A repetitive controller scheme with positive feedback and feedforward introduces infinitely many poles on the imaginary axis located at the resonant peaks. The feedforward introduces zeros, which produce notches located in between two consecutive resonant peaks. The latter has the advantage of making the controller more selective, in the sense... Agent: Fish & Richardson P.c.

20070055722 - Control device optimizing computing input sample of data with discrete fourier transform algorithm: An automatic control device having an input for inputting measured values of cyclic voltage and/or current; computing device for computing a parameter based on said values of voltage and/or current, and for comparing the computed parameter against a predefined condition; and initiating device for initiating a control function in response... Agent: Buchanan, Ingersoll & Rooney Pc

20070055723 - Method and system for performing quad precision floating-point operations in microprocessors: Embodiments of a method and system for performing quad precision floating-point operations in a microprocessor are disclosed. In one embodiment, a method for calculating the square root of a number in a proposed revised IEEE 754 compliant 64-bit microprocessor comprises performing a single Newton-Raphson iteration in high precision to obtain... Agent: Courtney Stanford & Gregory LLP C/o Intellevate

20070055724 - Method of obtaining correction value of optical sensor and recording apparatus: A method of obtaining a correction value of an optical sensor detecting an edge of the medium so as to generate detection information, includes: acquiring edge information on an edge position of one of opposite edges of the medium based on the detection information; forming on the medium a correction... Agent: Edwards & Angell, LLP

20070050432 - Electronic apparatus and its control program: In an electronic apparatus having multiple functions such as a scientific electronic calculator, some of the multiple functions are set to be disabled according to need. Function disabling information (protection data) including disabled applications, protect display screen and protection period is stored on a memory card. When the memory card... Agent: Frishauf, Holtz, Goodman & Chick, PC

20070050433 - Method of operating a portable terminal in a calculator mode and portable terminal adapted to operate in the calculator mode: An apparatus and method for operating a calculator mode in a portable terminal having a camera are provided. The apparatus and method comprise the steps of recognizing an arithmetic expression from an image taken by the camera and displaying the recognized arithmetic expression; shifting to an editing mode when an... Agent: Roylance, Abrams, Berdo & Goodman, L.L.P.

20070050434 - Data processing apparatus and method for normalizing a data value: A data processing apparatus and method are provided for normalizing a data value to produce a result value. The data processing apparatus includes prediction logic for generating a shift indication based on a prediction of the number of bit positions by which the data value needs to be shifted in... Agent: Nixon & Vanderhye, PC

20070050435 - Leading-zero counter and method to count leading zeros: The present invention relates to a circuit comprising a Leading Zero Counter (LZC) sub-circuit driving a second sub-circuit, like a shifter or arbiter. Shifter circuits or arbiter circuits operating with fewer stages than before have a smaller delay since every stage can select between more than two inputs. This reduces... Agent: International Business Machines Corporation

20070050436 - Order-preserving encoding formats of floating-point decimal numbers for efficient value comparison: A method for conversion between a decimal floating-point number and an order-preserving format has been disclosed. The method encodes numbers in the decimal floating-point format into a format which preserves value ordering. This encoding allows for fast and direct string comparison of two values. Such an encoding provides normalized representations... Agent: Sawyer Law Group LLP

20070050437 - Systems and methods for random value generation: Systems, methods and circuits for generating random numbers. As one example, a system for generating random numbers is disclosed that includes an analog to digital conversion element that provides an output, and a digital filter that is electrically coupled to the analog to digital conversion element and provides an information... Agent: Texas Instruments Incorporated

20070050439 - Complex half-band finite impulse response filter and method of making same: An electrical signal filter for processing a discrete-time real signal having a length N. In one embodiment, the filter comprising a delay line having N taps and a corresponding respective N filter coefficients. Values for the filter coefficients are determined by first shifting an impulse function of length N by... Agent: Downs Rachlin Martin PLLC

20070050438 - Programmable digital filter: A method of filtering one or more input signals, includes receiving one or more input signals, each having an input signal value. The method includes storing at least two instructions in a program memory to filter one or more of the input signals. Each instruction includes an opcode and identifies... Agent: Baker Botts, LLP

20070050440 - Inverse modified discrete cosine transform (imdct) co-processor and audio decoder having the same: Provided are an IMDCT co-processor and an audio decoder having the same. The IMDCT co-processor includes: an input buffer for storing an input inverse-quantized frequency spectrum sample value; an I/Q separator for dividing the sample value stored in the input buffer into real data I and imaginary data Q; a... Agent: Ladas & Parry LLP

20070050441 - Method and apparatus for improving noise discrimination using attenuation factor: Noise discrimination in signals from a plurality of sensors is conducted by enhancing the phase difference in the signals such that off-axis pick-up is suppressed while on-axis pick-up is enhanced. Alternatively, attenuation/expansion are applied to the signals in a phase difference dependent manner, consistent with suppression of off-axis pick-up and... Agent: Thelen Reid & Priest, LLP

20070050442 - Method, apparatus, and program for modular arithmetic: A computing method for accelerating the iterations of modular multiplications is provided. In a newly defined image, variables U and V in a residue system are transformed to X=U·R mod M and Y=V·R mod M, and a modular multiplication U·V mod M is replaced with X·Y·R−1 mod M=U·V·R mod M.... Agent: Sughrue Mion, PLLC