Electrical computers: arithmetic processing and calculating inventions 02/07

20070043794 - Method and system of signal noise reduction: A method and system of signal noise reduction used for digital chips to prevent errors when signal noise occurs includes checking whether a recent received signal is logically consistent. If the recent signal is consistent, then the consistent signal is adopted. If the recent signal is not consistent, then a... Agent: Bacon & Thomas, PLLC

20070043795 - Method and apparatus for performing alignment shifting in a floating-point unit: An apparatus for performing alignment shifting in a floating-point unit is disclosed. An alignment shifter includes a shift amount calculator, a set of first level shifters and a set of second level shifter. The shift amount calculator generates one shift amount under a double-precision mode and two shift amounts under... Agent: Dillon & Yudell LLP

20070043796 - Residue-based error detection for a shift operation: Errors in a shift result can be detected with a residue-based mechanism, instead of with duplication of an entire shifter. The commutative property of residue computation over a bit string allows the residue of a value to be independent of the actual bit positions when the divisor is a Merrill... Agent: Darby & Darby, P.C.

20070043797 - Apparatus for providing a random bit stream: An apparatus for providing a random bit stream includings a first provider for providing a clock signal, a second provider for providing a sample signal, an activator for activating the first and second providers such that a sampling edge of the sample signal is aligned to an edge of the... Agent: Dickstein Shapiro LLP

20070043798 - Random number generator: A random number generator, a method, and a computer program product are provided for producing a random number seed. Each oscillator within an array of oscillators operates at a different frequency. The operating frequencies of each oscillator are not harmonically related, such that no integer multiple exists between the frequencies... Agent: Ibm Corporation (cs) C/o Carr LLP

20070043799 - System and method for generating a fixed point approximation to nonlinear functions: A system and method are provided for use in an electronic device configured to process data to perform a method of generating a fixed point approximation of a number x by first locating the most significant bit of a given number, then retrieving predetermined values from electronic data storage, where... Agent: Christopher P. Maiorana, P.C.

20070043800 - Reducing computational complexity in determining the distance from each of a set of input points to each of a set of fixed points: An aspect of the present invention takes advantage of the fact that the coordinates of fixed points do not change, and thus the energy (sum of squares of the coordinates defining the vector) of each fixed point is computed and stored. The energy of each variable input point may also... Agent: Texas Instruments Incorporated

20070043801 - Performing rounding in an arithmetic operation: An arithmetic unit comprising: an encoding circuit arranged to receive first and second operands each having a bit length of m bits and to generate therefrom a number n of partial products of varying bit length of m bits or less; an addition circuit having m columns each having n... Agent: Docket Clerk

20070043802 - Multiplication circuitry: Combining circuitry for combining a plurality of multi-bit partial product terms in a multiplier circuit includes a plurality of compression columns, each column receiving a plurality of partial product term bits. At least one compression column includes: a first circuit arranged to receive a first set of the plurality of... Agent: Docket Clerk

20070038690 - Adjustable time accumulator: A time accumulator is adjustable to provide sufficient calculation time regardless of the clock frequency. The time accumulator includes a first register storing a current time and a second register storing a time increment value corresponding to a multiplier multiplied by an original time increment associated with a clock pulse... Agent: Agilent Technologies Inc.

20070038691 - Methods for performing fast discrete curvelet transforms of data: Fast digital implementations of the second generation curvelet transform for use in data processing are disclosed. One such digital transformation is based on unequally-spaced fast Fourier transforms (USFFT) while another is based on the wrapping of specially selected Fourier samples. Both digital transformations return a table of digital curvelet coefficients... Agent: Robert Dabney Eastham Ladas & Parry

20070038692 - Correlator having user-defined processing: In one embodiment of the invention, a circuit may include and/or involve a correlator, a programmable fabric, and logic to enable selection of one of default processing logic and alternate processing logic to process corresponding data and coefficient values of the correlator.... Agent: Lattice Semiconductor Corporation

20070038693 - Method and processor for performing a floating-point instruction within a processor: The invention relates to a method for performing floating-point instructions within a processor of a data processing system is described, wherein an input of said floating-point instruction comprises a normal or a denormal floating-point number. Said method comprises the steps of storing said floating-point number, normalization of said floating-point number... Agent: International Business Machines Corporation

20070038694 - Method of root operation for voice recognition and mobile terminal thereof: A method of a root operation for voice recognition and mobile terminal thereof are disclosed, by which an operational speed faster than that of a Taylor series using method can be provided and by which a memory having a size smaller than that of a table using method is needed.... Agent: Birch Stewart Kolasch & Birch

20070033241 - Method and associated device for generating random numbers at a given interval in time: The invention relates to a cryptographic method wherein a random number generator producing random numbers Si whose size N is fixed between 0 and W-1 is used to produce a random number R between 0 and a predefined limiter K. According to the invention: E31: a random variable Si is... Agent: Buchanan, Ingersoll & Rooney PC

20070033242 - Random number generator and generation method: An RNG circuit is connected to the parallel port of a computer. The circuit includes a flat source of white noise and a CMOS amplifier circuit compensated in the high frequency range. A low-frequency cut-off is selected to maintain high band-width yet eliminate the 1/f amplifier noise tail. A CMOS... Agent: Thomas Swenson

20070033243 - Microwave filter banks: The present invention concerns microwave filter banks of the type including at least one interconnection network and filters, each of said at least interconnection network comprising an input line and at least two output lines connected to said input line, a filter being connected to each output line of said... Agent: C. Irvin Mcclelland Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070033244 - Fast fourier transform (fft) architecture in a multi-mode wireless processing system: A system and method Fast Fourier Transform (FFT) method in a multi-mode wireless processing system. The method can include loading an input vector into an input buffer, initializing a second counter and a variable N, where N=log2 (input vector size), and s is the value of the second counter, performing... Agent: Foley & Lardner LLP

20070033245 - Re-sampling methodology for wireless broadband system: A system and method for performing a convolution operation in a multi-mode wireless processing system. The method can include loading an initial value and a stride value into an address generator, generating an address based on the initial value and the stride value, supplying the generated address to a series... Agent: Foley & Lardner LLP

20070027943 - Channel-select decimation filter with programmable bandwidth: A channel-select decimation filter capable of operating in multiple bandwidth modes includes a first low pass filter stage, a variable gain stage, a subtraction module a second low pass filter stage and a down-sampling module. The first low pass filter stage includes a first programmable delay module for filtering input... Agent: Garlick Harrison & Markison

20070027944 - Instruction based parallel median filtering processor and method: An instruction based parallel median filtering processor and method sorts in parallel each combination of pairs of inputs into greater and lesser values; determines from that sorting the minimum, maximum and median filter values of the inputs; and applies at least one instruction for enabling indication of at least one... Agent: Iandiorio & Teska

20070027945 - Audio frequency response processing system: The invention provides a method and system for forming an output impulse response function. The method includes the steps of creating an initial impulse response, and dividing the impulse response into a head portion and a tail portion. The tail portion is high pass filtered, and low frequency components of... Agent: Dov Rosenfeld

20070027946 - Method and system for high-speed floating-point operations and related computer program product: A circuit for estimating propagated carries in an adder starting from operands that include actual addition inputs or at least one earlier carry, the circuit performs statistical circuit operations with independent binary traffic for the operands. Preferably, this binary traffic is independent and equiprobable or quasi-equiprobable binary traffic, and the... Agent: Seed Intellectual Property Law Group PLLC