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USPTO Class 708 | Browse by Industry: Previous - Next | All 01/2007 | Recent | 08: Jun | May | Apr | Mar | Feb | Jan | | 07: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 06: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | Electrical computers: arithmetic processing and calculating inventions 01/07Recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.Listing format for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 01/25/2007 > 4 patent applications in 4 patent subcategories. 20070022150 - Non-linear algorithm calculating device: A portable hand-held device for producing output values, such as body mass index calculations, has a hand-holdable housing that includes a memory unit storing a pre-defined non-linear algorithm. A processing unit located in the housing applies the algorithm to input values selected by an input means on the housing, and... Agent: The Soni Law Firm 20070022151 - Dynamic management of a keyboard memory: A method is disclosed for entering and/or changing the data assigned to keys and/or accessory devices of a freely programmable keyboard and stored in at least one programmable memory, a method for retrieving these data, and to a keyboard for carrying out the method. So that despite limited available memory... Agent: Mcgrath, Geissler, Olds & Richardson, PLLC 20070022152 - Method and floating point unit to convert a hexadecimal floating point number to a binary floating point number: Method to convert a hexadecimal floating point number (H) into a binary floating point number by using a Floating Point Unit (FPU) with fused multiply add with an A-register a B-register for two multiplicand operands and a C-register for an addend operand, wherein a leading zero counting unit (LZC) is... Agent: International Business Machines Corporation 20070022153 - Liquid cooled high-frequency filter: The invention refers to a high-frequency filter (1), comprising a filter housing (2), the filter housing (2) having at least one cover element (2a) with at least one resonator (5, 6, 7, 8, 9, 10, 11, 12) positioned therein and at least one signal input (3), through which a high... Agent: Tarolli, Sundheim, Covell & Tummino L.L.P. 01/18/2007 > 1 patent applications in 1 patent subcategories.20070016635 - Inversion calculations: An Elliptic Curve Cryptography inversion technique utilises operating on the MSW of four auxiliary variables U, V, R and S with specified invariences.... Agent: Philips Electronics North America Corporation Intellectual Property & Standards 01/11/2007 > 1 patent applications in 1 patent subcategories.20070011217 - Low-power random bit generator using thermal noise and method thereof: A random bit generator and a method thereof are provided. The random bit generator includes an amplifier, a comparing circuit, an oscillator, a sampler, and a storage circuit. The amplifier amplifies a difference between input signals generated based on thermal noise. The comparing circuit compares an alternating current (AC) signal... Agent: F. Chau & Associates, LLC 20070011218 - Automatic input error recovery circuit and method for recursive digital filters: Recursive digital filter circuitry which avoids persistent unstable conditions therein provides a serial clock signal, a synchronization signal, and a serial data input to corresponding inputs of a 3-wire serial interface circuit to produce a serial clock output signal, a synchronization output signal, and a parallel data output signal which... Agent: Texas Instruments Incorporated 20070011219 - Method for estimating a frequency offset of a modulated bandpass signal: In a method for estimating a frequency offset (fe, Ωe) of a modulated bandpass signal (s) with an assumed carrier frequency (Ω0) in a mobile radio receiver, times (τj) of the zero cross-overs of the bandpass signal are determined in a first step. Using the times (τj) of the zero... Agent: Baker Botts, L.L.P. 20070011220 - Electronic circuit for implementing a permutation operation: A crossbar (20) circuit with multiplexer (22A, 22B) circuits implemented in a polygonal form on a chip. The crossbar can be used for implementing a permutation of input bits (24A, 24B) controlled by a bit vector (25). Horizontal and vertical wiring lengths in the crossbar (20) are reduced by stacking... Agent: Ibm Corporation Intellectual Property Law 20070011221 - Apparatus and method for correlation operation: A data input means has a data storing unit, transfer control unit, and exclusive wiring. The data input means divides a plurality of data strings into a plurality of groups on a frequency axis. Each of the plurality of data strings includes frequency components which is Fourier-transformed. The data input... Agent: Patrick G. Burns, Esq. Greer, Burns & Crain, Ltd. 20070011222 - Floating-point processor for processing single-precision numbers: A system and method for processing single-precision floating-point numbers. The system includes a processor that has a double-precision (DP) register, wherein the DP register receives a plurality of single-precision (SP) operands, and a recoder coupled to the DP register, wherein the recoder recodes a first SP operand of the plurality... Agent: Sawyer Law Group LLP 01/04/2007 > 8 patent applications in 6 patent subcategories.20070005670 - Text input window with auto-growth: A user input panel dynamically expands to accommodate user input, such as handwritten or keyboard input. Expansion may occur in one or two out of four possible directions, depending upon the language to be written or typed. For example, when writing English words, the input panel may expand to the... Agent: Banner & Witcoff Ltd., Attorneys For Client Nos. 003797 & 013797 20070005671 - Method and apparatus for generating a random bit stream: Presently disclosed is method and apparatus for generating a random bit stream by generating a random bit according to a polynomial expression, providing a modification function operative on the polynomial expression, and modifying the polynomial expression by modifying the modification function.... Agent: Intellectual Property Development Jack Ivan J'maev 20070005672 - Method and apparatus for generating random number: An apparatus for generating a random number includes a holding unit configured to hold a data segment, a mixing unit configured to mix the data segment held in the holding unit, a quality evaluation unit configured to evaluate the quality of the data segment held in the holding unit as... Agent: Canon U.s.a. Inc. Intellectual Property Division 20070005673 - The creation and detection of binary and non-binary pseudo-noise sequences not using lfsr circuits: The invention discloses methods to create binary and non-binary sequences of a pseudo-random nature such that possible symbols occur at or almost at the same rate. The invention also discloses methods using symbol words of fixed lengths to generate unique sequences. These methods do not apply Linear Feedback Shift Registers... Agent: Diehl Servilla LLC 20070005674 - Single-channel convolution in a vector processing computer system: The invention provides a system and method for performing convolution in a single channel of a vector processing computer system. The invention takes advantage of the parallel computing capability of the vector processing system and the distributed properties of the discrete-time convolution sum by performing convolution on portions of an... Agent: Buchanan, Ingersoll & Rooney PC 20070005675 - Multiple media access control apparatus and methods: Embodiments of twin media access control apparatus and methods are generally described herein. Other embodiments may be described and claimed. The present arrangement provides for eliminating a functional media access control unit from one or more processors in a processor/co-processor(s) situation. A dual media access control interface of the processor... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A. 20070005676 - Simple and amended saturation for pipelined arithmetic processors: A method and apparatus to substantially prevent overflow in microprocessors are described.... Agent: Volentine Francos & Whitt, PLLC. One Freedom Square 20070005677 - Method and system for multiplier optimization: Described herein is a method and system for multiplier optimization. A gate count savings that does not introduce additional quantization error can be achieved with this method and system. By increasing the number of digits in a multiplication result, partial products within a multiplication can be truncated. When the multiplication... Agent: Christopher C. Winslade Mcandrews, Held & Malloy, Ltd. Previous industry: Data processing: database and file management or data structuresNext industry: Electrical computers and digital processing systems: multicomputer data transferring or plural processor synchronization ###### RSS FEED for 20080717: Integrate FreshPatents.com into your RSS reader/aggregator or website to track weekly updates. For more info, read this article. ###### Thank you for viewing Electrical computers: arithmetic processing and calculating patents on the FreshPatents.com website. These are patent applications which have been filed in the United States. There are a variety ways to browse Electrical computers: arithmetic processing and calculating patent applications on our website including browsing by date, agent, inventor, and industry. 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