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Edge ring assembly with dielectric spacer ringRelated Patent Categories: Semiconductor Device Manufacturing: Process, Chemical EtchingEdge ring assembly with dielectric spacer ring description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20070032081, Edge ring assembly with dielectric spacer ring. Brief Patent Description - Full Patent Description - Patent Application Claims
BACKGROUND [0001] In the description that follows reference is made to certain structures and methods, however, such references should not necessarily be construed as an admission that these structures and methods qualify as prior art under the applicable statutory provisions. Applicants reserve the right to demonstrate that any of the referenced subject matter does not constitute prior art. [0002] In the field of semiconductor processing, plasma processing chambers are commonly used to etch one or more layers formed on a substrate. During etching, the substrate is supported on a substrate support surface within the chamber. Substrate supports can include edge rings positioned around the substrate support (i.e., around the substrate) for confining plasma to the volume above the substrate and/or to protect the substrate support, which typically includes a clamping mechanism, from erosion by the plasma. The edge rings, sometimes called focus rings, can be sacrificial (i.e., consumable) parts. Conductive and non-conductive edge rings are described in commonly-owned U.S. Pat. Nos. 5,805,408; 5,998,932; 6,013,984; 6,039,836 and 6,383,931. [0003] Lithographic techniques can be used to form geometric patterns in a surface of a semiconductor substrate. During a lithographic process, a pattern such as an integrated circuit pattern can be projected from a mask or reticle and transferred to a photosensitive (e.g., photoresist) coating formed on a surface of the substrate. Plasma etching, in turn, can be used to transfer the pattern formed in the photoresist layer to one or more layers formed on the substrate that underlie the photoresist layer. [0004] During plasma etching, plasma is formed above the surface of a substrate by adding large amounts of energy to a gas (or gas mixture) at low pressure. The plasma may contain ions, free radicals, and neutral species with high kinetic energies. By adjusting the electrical potential of the substrate, charged species in the plasma can be directed to impinge upon the surface of the substrate and thereby remove material (e.g., atoms) therefrom. [0005] Plasma etching can be made more effective by using gases that are chemically reactive with the material to be etched. So called "reactive ion etching" combines the energetic etching effects of the plasma with the chemical etching effects of a reactive gas. However, during plasma etching, in addition to etching one or more layers of semiconductor material, the photoresist layer can also be removed by the plasma. [0006] Residue from the photoresist and/or polymer that may form as an etching byproduct may undesirably redeposit on a lateral edge (e.g., bevel edge) or underside of the substrate. Bevel polymer, which may be volatilized during subsequent processing, may have an adverse effect on process yield. In order to maximize yield, reduction in polymer buildup at the underside and on the bevel edge of the substrate would be desirable. SUMMARY [0007] In a first embodiment, an edge ring assembly adapted to surround a substrate support surface in a plasma etching chamber comprises an edge ring dimensioned to underlie a peripheral portion of substrate located on a substrate support surface and provide a clearance gap between a lower peripheral surface of the substrate and an upper surface of the edge ring, and a dielectric spacer ring between the edge ring and the substrate support surface dimensioned so as to provide a clearance gap between a lower surface of the substrate and an upper surface of the dielectric spacer ring. [0008] When the edge ring assembly is mounted in a plasma etching chamber, an annular gap between the edge ring and the dielectric spacer ring and/or an annular gap between the dielectric spacer ring and the substrate support surface is preferably less than 0.25 mm, and an upper surface of the dielectric spacer ring and an innermost upper surface of the edge ring are preferably substantially co-planar. [0009] The edge ring assembly is preferably configured such that the distance between the plane of the substrate support surface and the plane of the uppermost surface of the dielectric spacer ring is less than about 0.25 mm, and the distance between the plane of the substrate support surface and the plane of the upper surface of a radially inner portion of the edge ring is less than about 0.25 mm. Thus, when a substrate is positioned on the substrate support surface, a gap between a lower surface of the substrate and an upper surface of the dielectric spacer ring is preferably less than about 0.25 mm, and a gap between a lower surface of the substrate and an upper surface of a radially inner portion of the edge ring is preferably less than about 0.25 mm. In an embodiment, a radially outer portion of the edge ring is thicker than the dielectric spacer ring. [0010] In a further embodiment, a plasma etching chamber comprises an edge ring assembly adapted to surround a substrate support surface in the plasma etching chamber. The substrate support preferably comprises an electrostatic chuck on an upper surface of a baseplate forming a lower electrode. The edge ring assembly can overlie a coupling ring that overlies a peripheral portion of the baseplate. A substrate can be mounted on the substrate support surface such that the outer edge of the substrate overhangs the dielectric spacer ring and a radially inner portion of the edge ring. [0011] A preferred dielectric spacer ring has a width (e.g., from about 0.5 to 2.5 mm) effective to electrically insulate the edge ring from the baseplate and a height (e.g., 1 to 3 mm) effective to minimize the deposition of polymer in a gap between the dielectric spacer ring and the substrate. At least one gas passage can extend through the coupling ring or the baseplate, the gas passage being adapted to supply a heat transfer gas to an adjacent surface of the edge ring and/or the dielectric spacer ring. [0012] A preferred plasma etching chamber comprises a parallel plate reactor having an upper showerhead electrode facing the substrate support surface. The baseplate can comprise an RF driven electrode and/or the substrate support surface can comprise an electrostatic chuck on an upper surface of a baseplate. [0013] The edge ring assembly is preferably adapted to reduce at least one of (i) RF coupling between the edge ring and the baseplate, (ii) arcing between the edge ring and the baseplate, and (iii) polymer deposition on an underside and/or edge of a substrate supported on the substrate support surface. [0014] A method of etching a layer on a semiconductor substrate in a plasma etching chamber having an edge ring assembly comprises supporting the substrate on a substrate support surface positioned inside the chamber, supplying etching gas to the chamber, energizing the etching gas into a plasma state adjacent an exposed surface of the substrate, and etching one or more layers on the semiconductor substrate with the plasma. Due to plasma erosion of the dielectric spacer ring, the dielectric spacer ring can be removed from the chamber and replaced with another dielectric spacer ring after etching a predetermined number of semiconductor substrates. [0015] According to yet a further embodiment, a dielectric spacer ring is dimensioned so as to provide a clearance gap between a lower surface of a substrate located on a substrate support surface in a plasma etching chamber and an upper surface of the dielectric spacer ring, the dielectric spacer ring being further dimensioned so as to be surrounded by an edge ring dimensioned so as to underlie the substrate and provide a clearance gap between a lower surface of the substrate and an upper surface of the edge ring. [0016] An upper surface of the dielectric spacer ring and an innermost upper surface of the edge ring are preferably substantially co-planar when the dielectric spacer ring and the edge ring are mounted in the plasma etching chamber. [0017] The dielectric spacer ring can be bonded to an upper surface of a coupling ring or to an upper surface of a baseplate, and either or both of the dielectric spacer ring and the coupling ring can be made of quartz. In a further embodiment, the dielectric spacer ring can comprise an axially upward-extending portion formed on a radially inner surface of a coupling ring. BRIEF DESCRIPTION OF THE DRAWINGS [0018] FIG. 1 is an illustration of a parallel plate plasma etch reactor. [0019] FIG. 2 shows a parallel plate plasma etch reactor comprising an edge ring assembly mounted on a coupling ring according to one embodiment. [0020] FIG. 3 shows a parallel plate plasma etch reactor comprising an edge ring assembly according to a further embodiment. [0021] FIG. 4 shows a parallel plate plasma etch reactor comprising an edge ring assembly mounted on a baseplate according to another embodiment. Continue reading about Edge ring assembly with dielectric spacer ring... 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