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Duane Morris LLPIPDepartment (tsmc) patentsThe following is a sampling of recent Duane Morris LLPIPDepartment (tsmc) patent applications (USPTO Patent Application #, Patent Title) sorted by month.
October 2008 - Duane Morris LLPIPDepartment (tsmc) patents
20080252361 - Electrical fuses with redundancy
20080254588 - Methods for forming transistors with high-k dielectric layers and transistors formed therefrom
20080254600 - Methods for forming interconnect structures
September 2008 - Duane Morris LLPIPDepartment (tsmc) patents
20080233710 - Methods for forming single dies with multi-layer interconnect structures and structures formed therefrom
20080225616 - Method for increasing retention time in dram
20080225617 - Method for high speed sensing for extra low voltage dram
20080218931 - System for decharging a wafer or substrate after dechucking from an electrostatic chuck
20080211106 - Via/contact and damascene structures and manufacturing methods thereof
August 2008 - Duane Morris LLPIPDepartment (tsmc) patents
20080197473 - Chip holder with wafer level redistribution layer
20080188053 - Method for forming fully silicided gate electrodes and unsilicided poly resistors
July 2008 - Duane Morris LLPIPDepartment (tsmc) patents
20080179293 - Apparatus and method for controlling silicon nitride etching tank
20080174027 - Semiconductor interconnect structure with rounded edges and method for forming the same
20080157315 - Package structures
20080158939 - Memory having improved power design
June 2008 - Duane Morris LLPIPDepartment (tsmc) patents
20080149985 - Method for fabricating floating gates structures with reduced and more uniform forward tunneling voltages
20080136481 - Edge-triggered flip-flop design
20080128885 - Stress decoupling structures for flip-chip assembly
May 2008 - Duane Morris LLPIPDepartment (tsmc) patents
20080121526 - Adjustable anode assembly for a substrate wet processing apparatus
20080122018 - work function adjustment on fully silicided (fusi) gate
20080122100 - Novel bond pad design to minimize dielectric cracking
20080122107 - Poly silicon hard mask
20080122114 - Bonding structures and methods of forming bonding structures
20080124845 - Stacked structures and methods of fabricating stacked structures
20080124912 - Semiconductor methods
20080125902 - Methods and systems for forming semiconductor structures
20080126901 - Memory with improved bist
April 2008 - Duane Morris LLPIPDepartment (tsmc) patents
20080094093 - Universal array type probe card design for semiconductor device testing
20080096394 - Gate dielectric layers and methods of fabricating gate dielectric layers
20080083710 - Adjustable electrodes and coils for plasma density distribution control
20080083938 - Image sensors and methods of fabricating image sensors
20080083959 - Stacked structures and methods of forming stacked structures
20080083975 - Stacked structures and methods of fabricating stacked structures
20080083992 - Novel bonding and probing pad structures
20080081441 - Methods of forming semiconductor structures and systems for forming semiconductor structures
March 2008 - Duane Morris LLPIPDepartment (tsmc) patents
20080073724 - Double layer etch stop layer structure for advanced semiconductor processing technology
20080060682 - High temperature spm treatment for photoresist stripping
20080061030 - Methods for patterning indium tin oxide films
20080064127 - Method and system for yield and productivity improvements in semiconductor processing
20080054455 - Semiconductor ball grid array package
20080057211 - Methods for plating and fabrication apparatus thereof
February 2008 - Duane Morris LLPIPDepartment (tsmc) patents
20080047578 - Method for preventing clogging of reaction chamber exhaust lines
20080047589 - Apparatus and methods of cleaning substrates
20080050879 - Methods of forming metal-containing gate structures
20080042269 - Bump structures and packaged structures thereof
20080044756 - Method of fine pitch bump stripping
20080044984 - Methods of avoiding wafer breakage during manufacture of backside illuminated image sensors
20080029876 - Bump pattern design for flip chip semiconductor package
20080032482 - Isolation structures and methods of fabricating isolation structures
January 2008 - Duane Morris LLPIPDepartment (tsmc) patents
20080017956 - Interconnect structure for semiconductor package
20080019586 - Methods of determining quality of a light source
20080020559 - Pad structure design with reduced density
20080002832 - Methods of detecting an abnormal operation of processing apparatus and systems thereof
December 2007 - Duane Morris LLPIPDepartment (tsmc) patents
20070296073 - Three dimensional integrated circuit and method of making the same
20070290371 - Pad structure and method of testing
20070293019 - Methods of die sawing and structures formed thereby
20070294654 - Method for using mixed multi-vt devices in a cell-based design
20070284747 - Integrated circuit having improved interconnect structure
20070285890 - Method and apparatus for increasing heat dissipation of high performance integrated circuits (ic)
20070279816 - System to protect electrical fuses
November 2007 - Duane Morris LLPIPDepartment (tsmc) patents
20070267461 - Process apparatuses
20070267737 - Packaged devices and methods for forming packaged devices
20070269293 - Substrate carrier and facility interface and apparatus including same
20070262270 - Insulator for high current ion implanters
20070257339 - Shield structures
October 2007 - Duane Morris LLPIPDepartment (tsmc) patents
20070248895 - Method for reduction of photomask defects
20070249179 - Method of forming a low-k dielectric layer with improved damage resistance and chemical integrity
20070235862 - Hybrid flip-chip and wire-bond connection package system
20070235873 - Pad structures and methods for forming pad structures
20070238200 - Method of nbti prediction
20070238220 - Stratified underfill in an ic package
20070238283 - Novel under-bump metallization for bond pad soldering
20070238306 - Method of forming dual damascene semiconductor device
August 2007 - Duane Morris LLPIPDepartment (tsmc) patents
20070197005 - Delamination resistant semiconductor film and method for forming the same
20070197037 - Surface preparation for gate oxide formation that avoids chemical oxide formation
20070190474 - Systems and methods of controlling systems
20070177788 - System and method for detecting wafer failure in wet bench applications
20070178389 - Universal photomask
20070178696 - Method for silicide formation on semiconductor devices
20070178713 - Method for forming a dielectric layer with an air gap, and a structure including the dielectric layer with the air gap
July 2007 - Duane Morris LLPIPDepartment (tsmc) patents
20070163716 - Gas distribution apparatuses and methods for controlling gas distribution apparatuses
20070151949 - Semiconductor processes and apparatuses thereof
20070154060 - Digital imaging device having watermarking capability
June 2007 - Duane Morris LLPIPDepartment (tsmc) patents
20070145366 - Semiconductor structures
20070132061 - Mim capacitor in a copper damascene interconnect
20070127287 - Resistive cell structure for reducing soft error rate
May 2007 - Duane Morris LLPIPDepartment (tsmc) patents
20070122958 - Spacer barrier structure to prevent spacer voids and method for forming the same
April 2007 - Duane Morris LLPIPDepartment (tsmc) patents
20070082473 - Process for low resistance metal cap
20070082474 - Process for making a metal seed layer
20070077697 - Semiconductor device with semi-insulating substrate portions and method for forming the same
February 2007 - Duane Morris LLPIPDepartment (tsmc) patents
20070034923 - Devices with different electrical gate dielectric thicknesses but with substantially similar physical configurations
20070026668 - Low k dielectric surface damage control
January 2007 - Duane Morris LLPIPDepartment (tsmc) patents
20070019360 - Method and apparatus for dynamic plasma treatment of bipolar esc system
20070012336 - Photomask cleaning using vacuum ultraviolet (vuv) light cleaning
October 2006 - Duane Morris LLPIPDepartment (tsmc) patents
20060238220 - Method of using mixed multi-vt devices in a cell-based design
20060220653 - Measuring low dielectric constant film properties during processing
September 2006 - Duane Morris LLPIPDepartment (tsmc) patents
20060201848 - Method for reducing mask precipitation defects
20060203600 - Low power word line control circuits with boosted voltage output for semiconductor memory
20060196530 - Novel semiconductor wafer lifter
20060197171 - System and method to improve image sensor sensitivity
20060197464 - Integrated circuit with low power consumption and high operations speed
20060197593 - Negative feedback system with an error compensation scheme
20060197616 - Oscillating buffer with single gate oxide devices
20060199393 - H20 plasma and h20 vapor methods for releasing charges
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This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. Freshpatents.com is not affiliated or associated with Duane Morris LLPIPDepartment (tsmc) in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Duane Morris LLPIPDepartment (tsmc) with additional patents listed. Browse our Agent directory for other possible listings.
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