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Dielectric material forming methods and enhanced dielectric materialsRelated Patent Categories: Semiconductor Device Manufacturing: Process, Making Field Effect Device Having Pair Of Active Regions Separated By Gate Structure By Formation Or Alteration Of Semiconductive Active Regions, Having Insulated Gate (e.g., Igfet, Misfet, Mosfet, Etc.), Including Passive Device (e.g., Resistor, Capacitor, Etc.), Capacitor, Having High Dielectric Constant Insulator (e.g., Ta2o5, Etc.)Dielectric material forming methods and enhanced dielectric materials description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20070093018, Dielectric material forming methods and enhanced dielectric materials. Brief Patent Description - Full Patent Description - Patent Application Claims
TECHNICAL FIELD [0001] This invention relates to dielectric material forming methods and dielectric materials. BACKGROUND OF THE INVENTION [0002] Dielectric materials are used in a wide variety of apparatuses including, but not limited to semiconductor-based electronic devices and other electronic devices. For example, a dielectric material can form a dielectric layer in a capacitor as shown in FIG. 1. The capacitor of FIG. 1 includes a lower electrode 2 underlying a dielectric layer 4 and an upper electrode 6. Generally, a capacitor can be formed smaller and perform better when the dielectric constant "K" of dielectric layer 4 is maximized. Often, processing limitations and/or cost limitations impact the ability to provide a desirably high K. Some dielectric materials, although exhibiting a high K may suffer the disadvantage of exhibiting an unacceptable leakage current. [0003] FIG. 2 shows an example of another device using dielectric material, namely a transistor. The transistor of FIG. 2 is formed over a substrate 8 including source and drain regions 10. A gate dielectric 14 is formed between a word line 12 and substrate 8. Wordline 12 is insulated by an overlying insulator cap 18 and side wall spacers 16. In transistors, the K of a gate dielectric might be of less concern compared to a capacitor, while leakage current may be of equal or greater concern in comparison to a capacitor. [0004] Accordingly, improved capacitors, transistors, semiconductor-based electronic components, and other electronic components can be improved by providing improved dielectric materials. SUMMARY OF THE INVENTION [0005] In one aspect of the invention, a dielectric material forming method includes forming a first monolayer, forming a second monolayer on the first monolayer, and forming a dielectric layer containing the first and second monolayers. One of the first and second monolayers can contain tantalum and oxygen and the other of the first and second monolayers can contain oxygen and another element different from tantalum. The dielectric layer can exhibit a dielectric constant greater than the first monolayer. As an example, the first monolayer can contain tantalum and oxygen and may be in the form of tantalum pentoxide (Ta.sub.2O.sub.5). The another element can include a Group IB to VIIIB element. Such a dielectric material may be formed using atomic layer depositing. [0006] In another aspect of the invention, a dielectric material forming method can include chemisorbing a first dielectric material on a substrate, chemisorbing a second dielectric material on the first material, one of the first and second materials comprising oxygen and a metal element, and forming an enhanced dielectric material containing the first and second materials. The enhanced dielectric material can exhibit a dielectric constant greater than the first dielectric material. As an example, the metal element can be a Group IB to VIIIB element, such as titanium or zirconium. Also, the one of the materials can further contain a different metal element. The enhanced dielectric material may further exhibit less current leakage than the first diectric material. [0007] In a further aspect of the invention, an enhanced diectric layer can contain a first monolayer including tantalum and oxygen and a second monolayer including oxygen and another element. The enhanced dielectric layer can exhibit a dielectric constant greater than the first monolayer. [0008] In yet another aspect of the invention, an enhanced dielectric material can contain first and second chemisorbed materials, the second material including oxygen and a Group IB to VIIIB element. Then enhanced dielectric material can exhibit dielectric constant greater than the first chemisorbed. BRIEF DESCRIPTION OF THE DRAWINGS [0009] Preferred embodiments of the invention are described below with reference to the following accompanying drawings. [0010] FIG. 1 shows a fragmentary, sectional view of a capacitor. [0011] FIG. 2 shows a fragmentary, sectional view of a transistor. [0012] FIG. 3 shows an atomic concentration depth profile of a tantalum oxide dielectric material containing titanium oxide. [0013] FIGS. 4-7 show spectral analyses of the surface and the bulk of the dielectric material referenced in FIG. 3. [0014] FIG. 8 shows an atomic concentration depth profile of a dielectric material containing tantalum oxide and zirconium oxide. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [0015] Atomic layer deposition (ALD) involves formation of successive atomic layers on a substrate. Such layers may comprise an epitaxial, polycrystalline, amorphous, etc. material. ALD may also be referred to as atomic layer epitaxy, atomic layer processing, etc. Further, the invention may encompass other deposition methods not traditionally referred to as ALD, for example, chemical vapor deposition (CVD), but nevertheless including the method steps described herein. The deposition methods herein may be described in the context of formation on a semiconductor wafer. However, the invention encompasses deposition on a variety of substrates besides semiconductor substrates. [0016] In the context of this document, the term "semiconductor substrate" or "semiconductive substrate" is defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term "substrate" refers to any supporting structure, including, but not limited to, the semiconductive substrates described above. Also in the context of the present document, "metal" or "metal element" refers to the elements of Groups IA, IIA, and IB to VIIIB of the periodic table of the elements along with the portions of Groups IIIA to VIA designated as metals in the periodic table, namely, Al, Ga, In, TI, Ge, Sn, Pb, Sb, Bi, and Po. The Lanthanides and Actinides are included as part of Group IIIB. "Non-metals" refers to the remaining elements of the periodic table. [0017] Described in summary, ALD includes exposing an initial substrate to a first chemical species to accomplish chemisorption of the species onto the substrate. Theoretically, the chemisorption forms a monolayer that is uniformly one atom or molecule thick on the entire exposed initial substrate. In other words, a saturated monolayer. Practically, as further described below, chemisorption might not occur on all portions of the substrate. Nevertheless, such an imperfect monolayer is still a monolayer in the context of this document. In many applications, merely a substantially saturated monolayer may be suitable. A substantially saturated monolayer is one that will still yield a deposited layer exhibiting the quality and/or properties desired for such layer. [0018] The first species is purged from over the substrate and a second chemical species is provided to chemisorb onto the first monolayer of the first species. The second species is then purged and the steps are repeated with exposure of the second species monolayer to the first species. In some cases, the two monolayers may be of the same species. Also, a third species or more may be successively chemisorbed and purged just as described for the first and second species. [0019] Purging may involve a variety of techniques including, but not limited to, contacting the substrate and/or monolayer with a carrier gas and/or lowering pressure to below the deposition pressure to reduce the concentration of a species contacting the substrate and/or chemisorbed species. Examples of carrier gases include N.sub.2, Ar, He, Ne, Kr, Xe, etc. Purging may instead include contacting the substrate and/or monolayer with any substance that allows chemisorption byproducts to desorb and reduces the concentration of a contacting species preparatory to introducing another species. A suitable amount of purging can be determined experimentally as known to those skilled in the art. Purging time may be successively reduced to a purge time that yields an increase in film growth rate. The increase in film growth rate might be an indication of a change to a non-ALD process regime and may be used to establish a purge time limit. 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