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  Connector chip and manufacturing method thereofUSPTO Application #: 20070072454Title: Connector chip and manufacturing method thereof Abstract: The present invention provides a connector chip capable of preventing electrical shorting between adjoining electrodes and also capable of readily connecting a plurality of electrodes on a first circuit substrate and a plurality of electrodes on a second circuit substrate without using a dedicated mounting device or the like. A plurality of conductive paths 5 are formed on an outer periphery surface constituted by continuous four surfaces 9A to 9D of an insulating substrate 3 including six surfaces of the surfaces 9A to 9D and surfaces 9E and 9F. Each of the conductive paths 5 goes round on the outer periphery surface. The conductive paths 5 are formed on the outer periphery surface at a predetermined interval in an opposing direction in which the remaining two surfaces 9E and 9F are opposing to each other. Each of insulating layers 7 having a property of repelling molten solder is formed between portions of each two adjoining conductive paths located on a pair of the surfaces 9A and 9B. The width of a conductive-path-formed portion 3A with a conductive path 5 formed thereon, orthogonal to a center line C is formed to be smaller than the width of a conductive-path-unformed portion 3B with no conductive path 5 formed thereon, orthogonal to the center line C. (end of abstract) Agent: Rankin, Hill, Porter & Clark LLP - Willoughby, OH, US Inventors: Shinji Okamoto, Katsumi Takeuchi, Yutaka Nomura USPTO Applicaton #: 20070072454 - Class: 439086000 (USPTO) Related Patent Categories: Electrical Connectors, Including Elastomeric Or Nonmetallic Conductive Portion The Patent Description & Claims data below is from USPTO Patent Application 20070072454. Brief Patent Description - Full Patent Description - Patent Application Claims
TECHNICAL FIELD [0001] The present invention relates to a connector chip for electrically connecting corresponding electrodes among a plurality of electrodes on two circuit substrates respectively, and a manufacturing method thereof. BACKGROUND ART [0002] Japanese Patent Application Laid-Open Publication No. 2000-77556 illustrates an embodiment in which a plurality of electrodes formed on a surface of a first circuit substrate and a plurality of electrodes on a second circuit substrate arranged in a semiconductor device are connected using a connector chip constituted by a plurality of spherical balls (BGA ball). At least surfaces of the BGA balls have conductivity, and the BGA balls are respectively fixed to the electrodes of the second circuit substrates arranged in the semiconductor device. Then, the semiconductor device including the BGA balls is arranged at a predetermined location on the first circuit substrate, and the BGA balls are soldered to the corresponding electrodes on the first circuit substrate, respectively. The BGA balls are spherical. Accordingly, when soldering is performed, solder gets into a gap between the spherical surface of each BGA ball and a flat surface of a corresponding one of the electrodes to a satisfactory extent. For this reason, formation of a fillet due to extrusion of the solder from the gap can be prevented. As a result, electrical shorting between the adjoining electrodes among the electrodes caused by soldering can be prevented. Patent Document 1: Japanese Patent Application Laid-Open Publication No. 2000-77556 DISCLOSURE OF THE INVENTION PROBLEM TO BE SOLVED BY THE INVENTION [0003] Since the BGA balls are spherical, they tend to roll. It is difficult to handle them. Further, in order to mount the BGA balls onto the semiconductor device or the like, a dedicated mounting device is necessary. [0004] Accordingly, an object of the present invention is to provide a connector chip which is capable of preventing electrical shorting between adjoining electrodes and is also capable of readily connecting a plurality of electrodes on a first circuit substrate and a plurality of electrodes on a second circuit substrate without using a dedicated mounting device, and a manufacturing method thereof. [0005] Another object of the present invention is to provide a connector chip capable of connecting a plurality of electrodes on a first circuit substrate and a plurality of electrodes on a second circuit substrate using just one connector chip or a small number of connector chips, and a manufacturing method thereof. MEANS FOR SOLVING THE PROBLEM [0006] A connector chip of the present invention comprises a rectangular parallelepiped insulating substrate having six surfaces, and a conductive path continuously formed on four continuous surfaces of the six surfaces. No conductive paths are formed on remaining two opposing surfaces of the six surfaces. With the two surfaces with no conductor paths formed thereon being opposing to the adjoining connector chips, a pair of the opposing surfaces with the conductor paths formed thereon are soldered to electrodes on a first circuit substrate and electrodes on a second circuit substrate, respectively. Thus, the electrodes on the first circuit substrate and the electrodes on the second circuit substrate are connected. Since the connector chip of the present invention has a rectangular parallelepiped shape, the connector chips do not roll unlike the conventional ones. For this reason, the electrodes on the first circuit substrate and the electrodes on the second circuit substrate can be readily connected without using a dedicated mounting device or the like. Further, since it is difficult to attach solder to the two surfaces of the connector chips where no conducting paths are formed, it is possible to prevent running of the solder along the mutually opposing surfaces of the adjoining connector chips. For this reason, electrical shorting caused by soldering between the adjoining electrodes among the electrodes can be prevented. [0007] In a circuit device that uses connector chips of the present invention, a plurality of electrodes formed on a front surface of a first circuit substrate and a plurality of electrodes formed on a rear surface or underside of a second circuit substrate arranged above the first circuit substrate with a predetermined gap provided therebetween are electrically connected by a plurality of connector chips including conductive paths. The conductive paths and the electrodes are connected by soldering, and the gap is maintained by the connector chips. Each of the connector chips comprises a rectangular parallelepiped insulating substrate having six surfaces, and the conductive path that is continuously formed on four continuous surfaces of the six surfaces. No conductive paths are formed on remaining two opposing surfaces of the six surfaces. Incidentally, the first and second circuit substrates herein may be the discrete circuit substrates or the circuit substrates each mounted onto an electronic component or the like. As described before, the connector chip of the present invention can be readily mounted without using the dedicated mounting device or the like. Accordingly, the circuit device that uses the connector chips of the present invention can be manufactured readily and at low cost. [0008] However, since the connector chip as described above connects one of the electrodes on the first circuit substrate and one of the electrodes on the second circuit substrate, a lot of the connector chips must be used for connection. Another connector chip of the present invention comprises a rectangular parallelepiped insulating substrate having six surfaces, and a plurality of conductive paths formed on an outer peripheral surface, which is constituted by four continuous surfaces of the six surfaces, at a predetermined interval in an opposing direction of remaining two opposing surfaces of the six surface. The plurality of conductive paths run round on the outer peripheral surface. In the so-called connector chip having multiple connections as described above, the conductive paths are formed on one connector chip. Accordingly, connection between the electrodes on the first circuit substrate and the electrodes on the second circuit substrate can be made, using one connector chip or a small number of the connector chips. For this reason, the connection can be performed at low cost. [0009] It is preferable that, on at least a pair of the surfaces opposing to each other among the four surfaces, insulating layers having a property of repelling molten solder are formed respectively between portions of two adjoining conductive paths among the plurality conductive paths, located on the pair of the surfaces. With this arrangement, when the conductor paths are soldered to the electrodes respectively, running of the solder extruded from between the conductive paths and the electrodes along surfaces between the portions of each two adjoining paths of the conductive paths on the insulating substrate can be prevented by the insulating layers. For this reason, it is possible to prevent electrical shorting from occurring between the two adjoining electrodes. [0010] Preferably, the insulating layers formed on one of the pair of the surfaces and the insulating layers on the other of the pair of the surfaces have different colors. With this arrangement, when the connector chip is arranged on the circuit substrate, a front and a back of the arranged connector chip can be discriminated as necessary. [0011] It is preferable that, in the insulating substrate, a plurality of conductive-path-formed portions where the conductive paths are formed and a plurality of conductive-path-unformed portions where the conductive paths are not formed are alternately arranged along a center line so that the conductive-path-formed portions and the conductive-path-unformed portions share the center line, and that a width of each of the conductive-path-formed portions orthogonal to the center line is smaller than a width of each of the conductive-path-unformed portions orthogonal to the center line. With this arrangement, portions of each conductive path on one of the pairs of the opposing surfaces among the continuous four surfaces of the insulating substrate are exposed on the surfaces of the insulating substrate, and portions of each conductive path on the other of the pairs of the opposing surfaces are formed within depressed portions bordered by the conductive-path-unformed portions. For this reason, when the portions of each conductive path on the one of the pairs of the opposing surfaces are connected to the electrodes on the first and second circuit substrates respectively, the solder that has been extruded from between the conductive paths and the electrodes on the first circuit substrate, and from between the conductive paths and the electrodes on the second circuit substrate gets into the depressed portions bordered by the conductive-path-unformed portions, at a time of soldering. For this reason, it is possible to prevent electrical shorting caused by the solder extruded as described above. [0012] Alternatively, the width of each of the conductive-path-formed portions orthogonal to the center line may also be formed to be larger than the width of each of the conductive-path-unformed portions orthogonal to the center line. With this arrangement, the depressed portions are formed between the adjoining conductive paths. For this reason, when the connector chip is arranged so that opening portions of the depressed portions are opposed to the first and second circuit substrates respectively, and when the conductive paths are connected to the electrodes on the first circuit substrate and the electrodes on the second circuit substrate respectively, the solder that has been extruded from between the conductive paths and the electrodes on the first circuit substrate and from between the conductive paths and the electrodes on the second circuit substrate gets into the depressed portions at a time of soldering. For this reason, it is possible to prevent electrical shorting caused by the solder extruded as described above. Each of the conductive paths may be constituted by one single layer. The conductive path may also be constituted by forming one or more plated layers over a base layer made of a metal thick film or a metal thin film. With this arrangement, by selecting a material for the plated layer appropriately, corrosion resistance and solderability of the conductive path can be improved. [0013] The base layer may be constituted by a metal thick film of silver (Ag) or copper (Cu), or a metal thin film of a nickel (Ni)-chromium (Cr) alloy or copper (Cu). Then, the one or more plated layers may be constituted by a first plated layer made of copper (Cu) or nickel (Ni) and a second plated layer made of a tin (Sn) alloy or tin (Sn), formed over the first plated layer. With this arrangement, the corrosion resistance can be improved by the first plated layer, and the solderability can be improved by the second plated layer. Since the second plated layer is formed of the tin alloy or tin in particular, the solder free of lead can be employed. Environmental pollution caused by lead can thus be prevented. [0014] The connector chip, in which the width of each of the conductive-path-formed portions orthogonal to the center line is smaller than the width of each of the conductive-path-unformed portions orthogonal to the center line, can be manufactured as follows: first, a plate-like insulating substrate material with a plurality of through hole rows arranged therein is prepared. Each of the through hole rows includes through holes arranged at a constant interval. Next, a plurality of first base layers are formed on one side of the insulating substrate material, and a plurality of second base layers are formed on the other side of the insulating substrate material respectively. Each of the first and second base layers is formed between each two adjoining through hole rows. The first base layers and the second base layers are each formed of a metal thick film or a metal thin film. Then, insulating layers are formed between each two adjoining first base layers and between each two adjoining second base layers respectively. Then, third base layers are formed edge portions of the first base layers located on one side, internal surfaces of the through holes, and edge portions of the second base layers located on the one side, respectively, by metal vapor deposition of a metal. Fourth base layers are then formed over edge portions of the first base layers located on the other side, the internal surfaces of the through holes, and edge portions of the second base layers located on the other side, respectively, by metal vapor deposition of a metal. Next, the insulating substrate material is cut along substantially the middle of each of the through hole rows, and then one or more plated layers are formed over the first to fourth base layers. When the connector chip is manufactured as described above, the insulating substrate material is cut along substantially the middle of each of the through hole rows. The through holes are thereby divided into a plurality of depressed portions. For this reason, the connector chip with the depressed portions formed therein can be readily mass-produced. Such cutting can be performed by forming grooves constituted by braking slits along substantially the middle of each through hole row, for example, and cutting along these breaking slits. [0015] When the breaking slits are formed in only one side of the insulating substrate material, it is preferable that the insulating layers formed on one side of the insulating substrate material and the insulating layers formed on the other side of the insulating substrate material are made of different colors. With this arrangement, the side with the breaking slits formed therein can be readily determined according to the colors of the insulating layers. BRIEF DESCRIPTION OF THE DRAWINGS [0016] FIG. 1 is a perspective view of a connector chip according to a first embodiment of the present invention. [0017] FIG. 2 is a schematic diagram showing a section taken along a line II-II in FIG. 1. [0018] FIG. 3 is a partial view of a circuit device that uses the connector chip shown in FIG. 1, as viewed from a front thereof. Continue reading... Full patent description for Connector chip and manufacturing method thereof Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Connector chip and manufacturing method thereof patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. 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