|Coded data generation or conversion patents - Monitor Patents|
USPTO Class 341 | Browse by Industry: Previous - Next | All
Recent | 13: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | 12: Dec | Nov | Oct | Sep | Aug | July | June | May | April | Mar | Feb | Jan | 11: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | 10: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 09: Dec | Nov | Oct | Sep | Aug | Jl | Jn | May | Apr | Mar | Fb | Jn | | 2008 | 2007 |
Coded data generation or conversionBelow are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 02/27/2014 > 8 patent applications in 8 patent subcategories.
20140055289 - Thin illuminated keyboard: A thin illuminated keyboard comprises a plurality of keys, a carrying unit and at least one light emission board. The carrying unit includes a baseboard to hold the keys and at least one light guide element located between the keys and baseboard. The light guide element includes at least one... Agent:
20140055290 - Methods and apparatus in alternate finite field based coders and decoders: Methods and apparatus for coding and decoding n-state symbols with n≧2 and n>2 and n>3 and n>4 are provided wherein at least one implementation of an addition over an alternate finite field GF(n) and an inverter defined by a multiplication over the alternate finite field GF(n) are provided. Encoders and... Agent:
20140055291 - Data processing system: The present invention provides a data processing system which can increase resolution and which has excellent tracking with respect to the switching of a conversion range and is small in conversion error. The data processing system, which obtains an A/D conversion result after an n (where n: positive integer)-bit extension... Agent: Renesas Electronics Corporation
20140055292 - Sharing embedded adc resources across hardware and software sample-conversion queues with improved availability of the resources: An apparatus for sharing embedded analog-to-digital conversion resources across multiple hardware and software sample conversation queues includes an analog front end, a least one FIFO buffer, a plurality of configuration registers and a sequencer. The sequencer admits a higher priority hardware stepping sequence until the higher priority stepping sequence is... Agent: Texas Instruments Incorporated
20140055293 - Digital-to-analog converter to produce paired control signals in a power supply controller: An controller for use in a power supply includes a variable oscillator and a digital-to-analog converter (DAC). The variable oscillator generates a switching signal to control a first switch of the power supply to regulate an output current of the power supply. The variable oscillator sets a duration of an... Agent: Power Integrations, Inc.
20140055294 - Resonator and oversampling a/d converter: Two resistive elements and a capacitive element are coupled between a first node and each of an inverting input terminal of an operational amplifier, an output terminal of the operational amplifier, and a common node. A resistive element and a capacitive element are coupled between the first node and a... Agent: Panasonic Corporation
20140055295 - Methods and apparatus for calibrating stages in pipeline analog-to-digital converters: A calibration control circuit is provided for calibrating a stage in a pipeline analog-to-digital converter (ADC). The stage includes an analog-to-digital subconverter (ADSC) and a multiplying digital-to-analog converter (MDAC). The calibration control circuit includes circuitry coupled to comparators in the ADSC to force the comparators to output a predetermined digital... Agent: Hittite Microwave Norway As
20140055296 - Time-to-digital converting circuit and digital-to-time converting circuit: A time-to-digital converting circuit includes a first flip-flop and a second flip-flop. The time-to-digital converting circuit a first delay controlling circuit that outputs a first data signal obtained by controlling a delay time of the reference data signal input thereto via the first signal input terminal based on the first... Agent: Kabushiki Kaisha Toshiba02/20/2014 > 8 patent applications in 7 patent subcategories.
20140049410 - Selective recompression of a string compressed by a plurality of diverse lossless compression techniques: In response to receiving an input string to be compressed, a plurality of diverse lossless compression techniques are applied to the input string to obtain a plurality of compressed strings. The plurality of diverse lossless compression techniques include a template-based compression technique and a non-template-based compression technique. A most compressed... Agent:
20140049411 - State metrics based stopping criterion for turbo-decoding: A stopping criterion for a turbo-encoding method. The criterion is based on a state metrics calculated by a forward-backward recursion in a coding trellis of an elementary encoder. If, for at least one elementary decoding stage, forward state metrics of a last symbol of a block or backward state metrics... Agent:
20140049412 - Data compression utilizing longest common subsequence template: In response to receipt of an input string, an attempt is made to identify, in a template store, a closely matching template for use as a compression template. In response to identification of a closely matching template that can be used as a compression template, the input string is compressed... Agent: International Business Machines Corporation
20140049413 - Data compression utilizing longest common subsequence template: In response to receipt of an input string, an attempt is made to identify, in a template store, a closely matching template for use as a compression template. In response to identification of a closely matching template that can be used as a compression template, the input string is compressed... Agent:
20140049414 - Systems and methods for correcting an offset at an output of a digital to analog converter: A system including a converter, a buffer, and an offset adjust circuit. The converter is configured to provide, based on a digital input signal, a first output current. The buffer is configured to provide, based on the first output current, a second output current to an output pin. The offset... Agent: Marvell World Trade Ltd.
20140049415 - Testing of digital to analog converters in serial interfaces: A system and method for testing digital to analog converters (DAC) in a serial interface having a comparator to receive an input signal and a local offset signal is disclosed. A first DAC selectably provides one of a global offset to the input signal during a normal mode of operation... Agent: International Business Machines Corporation
20140049416 - Analogue to digital converter: Measures are provided for performing direct radio-frequency to digital conversion. A radio-frequency input signal is compared with a plurality of reference voltages to generate a plurality of comparison signals, each comparison signal corresponding to one of the plurality of reference voltages. One or more of the plurality of generated comparison... Agent: Renesas Mobile Corporation
20140049417 - Wireless motion activated command transfer device, system, and method: A device, system or method may optionally control a function of a secondary device and include a body-wearable user device including a wireless transmitter configured to communicate directly with a wireless receiver associated with a secondary device, a sensor configured to sense a physical motion of at least one of... Agent: Playtabase, LLC02/13/2014 > 7 patent applications in 5 patent subcategories.
20140043174 - Parallel-to-serial converter circuit: A first multiplexer, at each given cycle, outputs a second input data signal, after outputting a first input data signal. A second multiplexer, at each given cycle, outputs a fourth input data signal, after outputting a third input data signal. The second multiplexer outputs the third input data signal at... Agent: Fujitsu Limited
20140043175 - Method and system for asynchronous successive approximation register (sar) analog-to-digital converters (adcs): An asynchronous successive approximation register analog-to-digital converter (SAR ADC), which utilizes one or more overlapping redundant bits in each digital-to-analog converter (DAC) code word, is operable to generate an indication signal that indicates completion of each comparison step and indicates that an output decision for each comparison step is valid.... Agent: Maxlinear, Inc.
20140043177 - Apparatuses and methods for linear to discrete quantization conversion with reduced sampling variation errors: Provided is an apparatus for converting a continuous-time, continuously variable signal into a sampled and quantized signal, which includes an input line for accepting an input signal, multiple processing branches coupled to the input line, and an adder coupled to outputs of the plurality of processing branches. Each of the... Agent: Syntropy Systems, LLC
20140043176 - Modulator with variable quantizer: Representative implementations of devices and techniques provide a variable quantizer for a modulator. A compare value of the quantizer changes with each clock cycle of the modulator. The variable compare value results in a spread spectrum output of the modulator.... Agent:
20140043178 - Interpolative digital-to-analog converter: An interpolative digital-to-analog (D/A) converter is adapted to convert a N-bit digital signal into an analog signal, where N is a positive integer greater than 1. The interpolative D/A converter includes a router unit that outputs first and second router voltages based on the first and second bits of the... Agent: Ili Technology Corporation
20140043179 - Method and apparatus for direct digital synthesis of signals using taylor series expansion: A method and apparatus for direct digital synthesis (DDS) of signals using Taylor series expansion is provided. The DDS may include a modified phase-to-amplitude converter that includes read-only-memories (ROMs), registers and, a single size, such as a coarse, intermediate, and fine ROM corresponding to respective higher resolution phase angles. The... Agent: M.s. Ramaiah School Of Advanced Studies
20140043180 - Analog to digital conversion apparatus with a reduced number of adcs: An analog to digital conversion includes a multiplexor circuit for receiving analog input signals and, responsive to a select input, an analog to digital converter circuit to convert a selected analog signal into a digital signal, a conversion starting device to send a conversion start signal on the basis of... Agent: Stmicroelectronics, Srl.02/06/2014 > 9 patent applications in 6 patent subcategories.
20140035764 - Code set conversion management optimization: A management module registers a request to convert code from a first code set to a second code set, identifies a code set converter (CSC), determines whether a most recently used CSC is the identified CSC and, in response to determining that the most recently used CSC is not the... Agent: International Business Machines Corporation
20140035765 - Method and apparatus for parallel data interfacing using combined coding and recording medium therefor: A semiconductor device may include a coding lookup table unit including a plurality of coding lookup tables each of which is selected by a respectively selection signal, and a selection unit configured to receive one of N-bit parallel data and extract respective encoded data corresponding to the selection signal and... Agent:
20140035766 - Trellis state based stopping criterion for turbo-decoding: A stopping criterion for a turbo-coding method. The criterion is based on states of a trellis determined by forward-backward recursion. If, for at least one elementary decoding stage, a transition ending state of a previous symbol is found identical to a transition starting state of a current symbol, for every... Agent: Commissariat A L'energie Atomique Et Aux Ene Alt
20140035767 - Successive-approximation-register analog-to-digital converter and method thereof: A main ADC (analog-to-digital converter) for converting an analog input signal into a digital data, and an auxiliary ADC for converting the same analog input signal into an auxiliary digital data, wherein: the main ADC is a successive-approximation-register (SAR) ADC of a first resolution with a first conversion speed; the... Agent: Realtek Semiconductor Corp.
20140035768 - Analog-to-digtal converter: An analog-to-digital converter (ADC) comprises a plurality of time-interleaved integrating ADCs having feedback from an integrated output signal. In variations, the time-interleaved integrating ADCs have feedback compensation from at least one measure of quantization error. The time-interleaved integrating ADCs may also share a single comparator and may also share a... Agent: Texas Instruments Incorporated
20140035770 - Analogue-to-digital converter: An integrated-circuit, continuous-time, sigma-delta analogue-to-digital converter has a single-ended analogue input, a converter reference input, and a ground connection. The converter has a resistor-capacitor integrator arranged to receive the single-ended analogue input. The integrator comprises a differential amplifier. The converter also has a clocked comparator connected to an output from... Agent:
20140035769 - Low distortion feed-forward delta-sigma modulator: A low distortion feed forward delta sigma modulator includes a first adder configured to receive a feedback signal and an input signal. The modulator also includes a first integrator configured to receive an output from the first adder, and a second integrator configured to receive an output from the first... Agent: Qualcomm Incorporated
20140035771 - Predictive successive approximation register analog-to-digital conversion device and method: A predictive successive approximation register analog-to-digital conversion device and method are provided. A difference between two input signals of a comparator is detected according to a threshold less than or equal to 1/2 of a voltage increment represented by one least significant bit (LSB). When a difference between a first... Agent: Realtek Semiconductor Corp.
20140035772 - Successive approximation analog-to-digital converter using capacitor array with sub-capacitors configured by capacitor disassembling and related method thereof: A successive approximation analog-to-digital converter (SAR ADC) includes a capacitor array and a comparator. The capacitor array has M capacitors which are arranged to perform capacitor switching operations sequentially, wherein a sum of capacitance values of the M capacitors is equal to (2N−1) unit capacitors, M>N, and M and N... Agent: Realtek Semiconductor Corp.Previous industry: Communications: electrical
Next industry: Communications: directive radio wave systems and devices (e.g., radar, radio navigation)
RSS FEED for 20140227:
Integrate FreshPatents.com into your RSS reader/aggregator or website to track weekly updates.
For more info, read this article.
Thank you for viewing Coded data generation or conversion patents on the FreshPatents.com website. These are patent applications which have been filed in the United States. There are a variety ways to browse Coded data generation or conversion patent applications on our website including browsing by date, agent, inventor, and industry. If you are interested in receiving occasional emails regarding Coded data generation or conversion patents we recommend signing up for free keyword monitoring by email.
Results in 0.15705 seconds