Calibration of oscillator devices

Abstract: A clock device having a resonating device such as a crystal of SAW supplying a controllable oscillator such as a digitally controlled oscillator is calibrated by supplying a calibration clock. A phase-locked loop is utilized to generate one or more correction factors causing the PLL to lock to the calibration clock. The one or more correction factors are then stored in non-volatile memory. (end of abstract)

Agent: Zagorin O'brien Graham LLP - Austin, TX, US
Inventors: Jerrell Hein, Axel Thomsen
USPTO Applicaton #: #20070146083 - Class: 331016000 (USPTO)

Calibration of oscillator devices description/claims

The Patent Description & Claims data below is from USPTO Patent Application 20070146083, Calibration of oscillator devices.

Brief Patent Description - Full Patent Description - Patent Application Claims

CROSS-REFERENCE TO RELATED APPLICATION(S)

[0001] This application is a continuation of U.S. patent application Ser. No. 10/675,543, U.S. Pat. No. 7,187,241, filed Sep. 30, 2003, which claims benefit under 35 U.S.C. .sctn.119(e) of application No. 60/467,813, filed May 2, 2003, both of which are incorporated herein by reference.

FIELD OF THE INVENTION

[0002] This application relates to oscillator devices such as VCXOs and XOs and more particularly to calibration of such devices.

DESCRIPTION OF THE RELATED ART

[0003] In the crystal oscillator (XO) and voltage-controlled oscillator (VCXO) markets, standard low cost four or six pin XO and six pin VCXO packages having standard inputs/outputs (I/Os) are commonly used. In order to provide greater flexibility, some XO and VCXO devices include both an integrated circuit (IC) and a crystal (or surface acoustic wave (SAW) device), supplying a source frequency, in the package. In order to program and/or calibrate such XO or VCXO devices, some prior art approaches have used additional pins or contact points on the package to supply one or more programming parameters that determine the output frequency supplied by the XO or VCXO device. The use of extra package pins or contact points to provide programmability may require custom packages, which can result in additional package size, additional tooling and higher manufacturing costs. In addition, there may be a marketing disadvantage from using a non-standard package. Thus, for certain applications, additional package pins for programming may be undesirable. Other prior art techniques have utilized existing package pins for such programming.

[0004] In prior art devices, in order to program the output frequency, one or more parameter(s) are supplied to the XO or VCXO device, the output frequency is measured, and, if necessary, new parameters are supplied to adjust the output frequency. Such calibration can be time consuming. In addition, the parameter(s) appropriate for one crystal and semiconductor device pair may need to be adjusted for other crystal/semiconductor device pairs.

[0005] Rather than program through package pins, some prior art techniques use an open top package with additional connection points on the integrated circuit in order to calibrate the device prior to packaging. However, programming with an open lid on the package may not be desirable because after calibration with the open lid, the device characteristics can change after the lid is sealed, at least partially defeating the calibration efforts. If the device is not programmable at all, the inability to program a device means that the device lacks flexibility and calibration features.

[0006] Accordingly, it would be desirable to provide a flexible device for crystal oscillator (XO) and voltage-controlled oscillator (VCXO) applications with improved programming and calibration capability.

SUMMARY

[0007] Accordingly, according to an embodiment of the invention, a device is provided for use in XO and VCXO applications that is calibrated by supplying a calibration clock to the device and having the device generate its own correction factors internally using a control loop such as a phase-locked loop configured to control the output clock of the controllable oscillator during calibration and cause the output clock to lock to a multiple of the calibration clock.

[0008] In one embodiment, a method is provided that includes receiving a calibration clock over a terminal; generating at least one correction factor using a control loop to lock an output clock generated by a controllable oscillator to a multiple of the calibration clock; and storing a value corresponding to the at least one correction factor in a non-volatile memory.

[0009] In another embodiment, a method is provided for calibrating a device that includes a controllable oscillator and a resonating device that supplies a fixed reference frequency used by the controllable oscillator to synthesize an output clock, the controllable oscillator and the resonating device being mounted in a package. The method includes supplying a calibration clock to an input/output terminal of the device; generating a control value to cause the controllable oscillator to lock to a multiple of the calibration clock; and storing the control value in a non-volatile memory in the device.

[0010] In another embodiment, the invention provides a device that includes a controllable oscillator coupled to receive a reference frequency and a control value and to output a clock. A terminal of the device receives a calibration clock. A phase-locked loop circuit using the controllable oscillator is programmably provided and is coupled to receive the calibration clock and generate a correction factor to cause the controllable oscillator to lock a multiple of the calibration clock. A non-volatile memory stores the correction factor.

BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The present invention may be better understood, and its numerous objects, features, and advantages made apparent to those skilled in the art by referencing the accompanying drawings.

[0012] FIG. 1 illustrates a device according to an embodiment of the present invention having an integrated circuit and a crystal packaged in a standard six pin VCXO ceramic package.

[0013] FIG. 2 illustrates a device according to an embodiment of the present invention having an integrated circuit and a crystal in a configuration in which they are packaged in a standard four pin XO ceramic package.

[0014] FIG. 3 illustrates an embodiment utilizing a multi-function output enable input/output terminal that provides a serial communication terminal and an input terminal for receiving a configuration clock.

[0015] FIG. 4 illustrates an embodiment in which P1 and P2 I/O terminals provide a serial communication terminal for programming and for receiving a configuration clock.

[0016] FIG. 5 illustrates exemplary read and write formats utilized for communicating over the serial port.

[0017] FIG. 6 illustrates exemplary use of Manchester encoding for data supplied over the serial port.

[0018] FIG. 7 illustrates exemplary use of a calibration clock over the serial port.

[0019] FIG. 8 illustrates an exemplary embodiment of the digitally controlled oscillator utilized in FIGS. 3 and 4.

Brief Patent Description - Full Patent Description - Patent Application Claims
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Industry Class:
Oscillators

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