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Ball grid array package and process for manufacturing sameUSPTO Application #: 20060223229Title: Ball grid array package and process for manufacturing same Abstract: A ball grid array integrated circuit package is manufactured by mounting a semiconductor die, to a first surface of a substrate such that bumps on the semiconductor die are electrically connected to conductive traces of the substrate. At least one collapsible spacer is mounted to at least one of a heat spreader, the semiconductor die and the substrate. The heat spreader is fixed to the at least one of the first surface of the substrate and the semiconductor die such that the at least one collapsible spacer is disposed therebetween. A ball grid array is formed on a second surface of the substrate, bumps of the ball grid array being electrically connected to the conductive traces and the integrated circuit package is singulated. (end of abstract)
Agent: Mayer, Brown, Rowe & Maw LLP - Washington, DC, US Inventors: Mohan Kirloskar, Chun Ho Fan, Neil McLellan USPTO Applicaton #: 20060223229 - Class: 438106000 (USPTO) Related Patent Categories: Semiconductor Device Manufacturing: Process, Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged Semiconductor The Patent Description & Claims data below is from USPTO Patent Application 20060223229. Brief Patent Description - Full Patent Description - Patent Application Claims CROSS REFERENCE TO RELATED APPLICATIONS [0001] This application is a Continuation of U.S. application Ser. No. 10/866,702, filed Jun. 15, 2004, which is a Division of U.S. application Ser. No. 10/647,696 (now U.S. Pat. No. 6,933,176), filed Aug. 25, 2003, which is a Continuation-In-Part of U.S. application Ser. No. 10/643,961 (now U.S. Pat. No. 6,987,032), filed Aug. 20, 2003, which is a Continuation-In-Part of U.S. application Ser. No. 10/323,657 (now U.S. Pat. No. 6,979,594), filed Dec. 20, 2002, which is a Continuation-In-Part of U.S. application Ser. No. 10/197,832 (now U.S. Pat. No. 6,800,948), filed Jul. 19, 2002. These applications, in their entirety, are incorporated herein by reference. FIELD OF THE INVENTION [0002] The present invention relates in general to integrated circuit packaging, and in particular to an improved ball grid array package with enhanced thermal characteristics and a unique method of manufacturing the ball grid array package. BACKGROUND OF THE INVENTION [0003] High performance integrated circuit (IC) packages are well known in the art. Improvements in IC packages are driven by industry demands for increased thermal and electrical performance and decreased size and cost of manufacture. [0004] In general, array packaging such as Plastic Ball Grid Array (PBGA) packages provide a high density of interconnects relative to the surface area of the package. However, typical PBGA packages include a convoluted signal path, giving rise to high impedance and an inefficient thermal path which results in low thermal dissipation performance. With increasing package density, the spreading of heat generated by the package is increasingly important. [0005] Reference is made to FIG. 1, which shows an elevation view of a conventional PBGA package indicated generally by the numeral 20. The PBGA package 20 includes a substrate 22 and a semiconductor die 24 attached to the substrate 22 by a die adhesive. Gold wire bonds 26 electrically connect the die 24 to metal traces on the substrate 22. The wire bonds and die 24 are encapsulated in a molding compound 28. Solder balls 30 are disposed on the bottom surface of the substrate 22 for signal transfer. Because of the absence of a thermal path away from the semiconductor die 24, thermal dissipation in this package is poor. [0006] Variations to conventional BGA packages have been proposed for the purpose of increasing thermal and electrical performance. One particular variation includes the addition of a metal heat spreader to the package, as shown in FIG. 2 which shows an elevation view of a PBGA package 20 of the prior art including the heat spreader, indicated by the numeral 32. In general, the metal heat spreader is fixed to the molded package. This package suffers disadvantages, however, as heat must be dissipated form the semiconductor die 24, through the molding compound 28 and then through the heat spreader 32. [0007] It is therefore an object of an aspect of the present invention to provide a process for manufacturing a BGA package with a heat spreader that obviates or mitigates at least some of the disadvantages of the prior art. SUMMARY OF THE INVENTION [0008] In one aspect, a ball grid array integrated circuit package is manufactured by mounting a semiconductor die, to a first surface of a substrate such that bumps on the semiconductor die are electrically connected to conductive traces of the substrate. At least one collapsible spacer is mounted to at least one of a heat spreader, the semiconductor die and the substrate. The heat spreader is fixed to the at least one of the first surface of the substrate and the semiconductor die such that the at least one collapsible spacer is disposed therebetween. A ball grid array is formed on a second surface of the substrate, bumps of the ball grid array being electrically connected to the conductive traces and the integrated circuit package is singulated. [0009] In another aspect, a ball grid array integrated circuit package is manufactured by mounting a semiconductor die, to a first surface of a substrate such that bumps on the semiconductor die are electrically connected to conductive traces of the substrate. At least one collapsible spacer is mounted to at least one of a heat spreader, the semiconductor die and the substrate. One of the heat spreader and the substrate is placed in a mold cavity and; the other of the heat spreader and the substrate is releasably clamped to a die of the mold cavity, such that the collapsible spacer is disposed between the heat spreader and the substrate. A molding compound is molded in the mold, thereby molding the semiconductor die, the substrate, the at least one collapsible spacer and the heat spreader into the molding compound to provide a molded package. A ball grid array is formed on a second surface of the substrate, bumps of the ball grid array being electrically connected to the conductive traces and the integrated circuit package is singulated. [0010] In another aspect, there is provided a process for manufacturing a plurality of integrated circuit packages. The process includes mounting a plurality of semiconductor dice to a first surface of a substrate array such that bumps on the semiconductor dice are electrically connected to conductive traces of the substrate. A collapsible spacer array is mounted to one of a heat spreader array and the substrate array. One of the heat spreader array and the substrate array is placed in a mold cavity and the other of the heat spreader array and the substrate array is clamped to a first die of the mold such that the collapsible spacer array is disposed between the heat spreader array and the substrate array. A molding compound is molded in the mold, thereby molding the semiconductor dice, the substrate array, the collapsible spacer array and the heat spreader array into the molding compound to provide an array of molded packages. A plurality of ball grid arrays are formed on a second surface of the substrate array, bumps of the ball grid arrays being electrically connected to the conductive traces, and each integrated circuit package is singulated from the array of molded packages. [0011] In yet another aspect, there is provided an integrated circuit package. The integrated circuit package includes a substrate having a plurality of conductive traces and a semiconductor die flip-chip mounted to a first surface of the substrate such that bumps of the semiconductor die are electrically connected to the ones of the plurality of conductive traces. A heat spreader is disposed proximal to and spaced from the semiconductor die by at least one collapsible spacer. A molding compound encapsulates the semiconductor die and the collapsible spacer between the substrate and the heat spreader. A ball grid array is disposed on a second surface of the substrate, bumps of the ball grid array being electrically connected to the conductive traces. [0012] Advantageously, a heat spreader is incorporated into the BGA package during manufacture. The heat spreader is prepared and placed in the mold and is incorporated into the package by molding. An array of heat spreaders is placed in the mold and molded with a substrate array such that a plurality of packages including heat spreaders are manufactured in a single mold shot. [0013] A thermal path is provided from the semiconductor die, through the collapsible spacer and to the heat spreader. Also, the heat spreader is effectively pressed against the lower mold die surface during molding, thereby inhibiting mold flash on the outer side of the heat spreader. The incorporation of a deformable material (collapsible spacer) that is stable at molding temperature, provides a compliant layer between the substrate and the heat spreader and the between the semiconductor die and the heat spreader. Thus, the heat spreader is pressed against the lower mold die, maintaining the heat spreader in contact with the lower mold die during molding and reducing mold flash. [0014] In another aspect, the semiconductor die is bonded to the semiconductor die is attached to the substrate such that pads of the semiconductor die are electrically connected to the conductive traces of the substrate. Thus, wire bonds between the semiconductor die and the substrate are not required in the present embodiment. Advantageously, this arrangement obviates problems associated with electrical impedence in wire bonds. BRIEF DESCRIPTION OF THE DRAWINGS [0015] The invention will be better understood with reference to the following description and to the drawings, in which: [0016] FIG. 1 shows an elevation view of a conventional plastic ball grid array package; [0017] FIG. 2 shows an elevation view of a prior art plastic ball grid array package including a heat spreader; [0018] FIGS. 3A to 3J show processing steps for manufacturing a ball grid array package, in accordance with one embodiment of the present invention; [0019] FIG. 4 shows a mold including molding dies and a mold cavity for molding the ball grid array package according to an embodiment of the present invention; Continue reading... Full patent description for Ball grid array package and process for manufacturing same Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Ball grid array package and process for manufacturing same patent application. ### 1. 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