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Ball grid array package and method thereofRelated Patent Categories: Semiconductor Device Manufacturing: Process, Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged Semiconductor, Assembly Of Plural Semiconductive Substrates Each Possessing Electrical Device, Flip-chip-type AssemblyBall grid array package and method thereof description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20080096314, Ball grid array package and method thereof. Brief Patent Description - Full Patent Description - Patent Application Claims
CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is a Divisional application of U.S. application Ser. No. 10/974,936 filed Oct. 28, 2004. Priority is claimed based on U.S. application Ser. No. 10/974,936 filed Oct. 28, 2004, which claims the priority date of Taiwan Patent Application Serial Number 092129954, filed Oct. 28, 2003, the full disclosure of which is incorporated herein by reference. BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] This invention generally relates to a ball grid array package, and more particularly to a ball grid array package having a plurality of partitioning walls for keeping solder balls in proper position. [0004] 2. Description of the Related Art [0005] Miniaturization of semiconductor device size has been an important topic in the art, when the device requires more I/O pins along with the increase of device density. Relatively, the ball grid array (BGA) package is an efficient packaging technology since it can provide more I/O pins. [0006] Referring to FIG. 1, it shows a conventional ball grid array (BGA) package 10 using wire bonding technique and being disposed on a main board 30. The BGA package 10 includes a substrate 20, a chip 11, and a plurality of solder balls 40. The substrate 20 has an upper surface 22, a lower surface 24 opposite to the upper surface 22, and a plurality of metal wirings (not shown). The chip 11 is disposed on the upper surface 22 of the substrate 20 and electrically connected to the metal wirings of the substrate 20 by a plurality of bonding wires 12. The solder balls 40 are disposed on the lower surface 24 of the substrate 20 and electrically connected to the chip 11 through the metal wrings and the bonding wires 12. [0007] Referring to FIGS. 2 and 3, in manufacturing processes of the BGA package 10, a solder mask 26 is provided on the lower surface 24 of the substrate 20 and a plurality of pads 50 are exposed therefrom. A plurality of flux units 60 are applied to the pads 50. Then, the solder balls 40 are disposed on the flux units 60 and adhered to the pads 50 (as shown in FIG. 3) by a reflow process. [0008] After the solder balls 40 pass through the reflow process, a solder bridge formed between two pads 50 as shown in FIG. 3 might be occurred due to the spread of the flux units 60. Further, in manufacturing and/or transporting processes, the solder balls 40 may also be shifted due to the occurrence of a shake, a vibration and so on such that the implantation yield of the solder balls 40 is reduced. [0009] For example, U.S. Pat. No. 5,636,104 discloses a BGA package using wire bonding technique, which is incorporated herein by reference. The substrate of such a BGA package comprises a plurality of groove mounting pads for carrying a plurality of solder balls, thereby improving the strength and the positioning capability of the solder balls on the substrate. However, the plurality of groove mounting pads will increase the manufacturing processes and cost. [0010] Accordingly, there exists a need to provide a BGA package which can improve the positioning capability and increase the implantation yield of the solder balls. SUMMARY OF THE INVENTION [0011] It is an object of the present invention to provide a ball grid array (BGA) package, which can avoid the shift problem of the solder balls and thus improve the positioning accuracy of the solder balls on the substrate. [0012] In order to achieve the above object, the present invention provides a BGA package including a substrate, a chip, a plurality of pads, a solder mask, a plurality of partitioning walls, and a plurality of solder balls. The substrate has an upper surface and a lower surface opposite to the upper surface. The chip is disposed on the upper surface of the substrate. The pads are disposed on the lower surface of the substrate and electrically connected to the chip. The solder mask is disposed on the lower surface of the substrate. The partitioning walls are disposed on the solder mask and each between the adjacent pads. The solder balls are respectively disposed on the pads. [0013] According to the BGA package of the present invention, the plurality of partitioning walls can prevent the flux from spreading and therefore avoid the solder bridge being formed between two solder balls. Furthermore, the plurality of partitioning walls can also prevent the solder balls from being shifted and therefore increase the implantation yield of the solder balls. BRIEF DESCRIPTION OF THE DRAWINGS [0014] Other objects, advantages, and novel features of the present invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings. [0015] FIG. 1 is a cross-sectional view of a conventional BGA package using wire bonding technique and being disposed on a main substrate. [0016] FIG. 2 is an enlarged view of the area A shown in FIG. 1. [0017] FIG. 3 illustrates that the solder balls of FIG. 2 are adhered to the pads through a reflow process. [0018] FIG. 4 is a bottom view of a BGA package according to one embodiment of the present invention. [0019] FIG. 5 is a cross-sectional view of the BGA package taken along line 5-5 of FIG. 4. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT Continue reading about Ball grid array package and method thereof... Full patent description for Ball grid array package and method thereof Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Ball grid array package and method thereof patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Ball grid array package and method thereof or other areas of interest. ### Previous Patent Application: Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates Next Patent Application: Stacked chip package and method for forming the same Industry Class: Semiconductor device manufacturing: process ### FreshPatents.com Support Thank you for viewing the Ball grid array package and method thereof patent info. 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