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Attn: Andrew C. Walseth Leffert Jay & Polglaze, P.A. patents

The following is a sampling of recent Attn: Andrew C. Walseth Leffert Jay & Polglaze, P.A. patent applications (USPTO Patent Application #, Patent Title) sorted by month.

July 2010 - Attn: Andrew C. Walseth Leffert Jay & Polglaze, P.A. patents

20100182843 - Current sensing for flash

May 2009 - Attn: Andrew C. Walseth Leffert Jay & Polglaze, P.A. patents

20090129153 - M+n bit programming and m+l bit read for m bit memory cells

April 2008 - Attn: Andrew C. Walseth Leffert Jay & Polglaze, P.A. patents

20080092017 - Erasure pointer error correction

December 2007 - Attn: Andrew C. Walseth Leffert Jay & Polglaze, P.A. patents

20070279033 - Zero power start-up circuit for self-bias circuit

September 2007 - Attn: Andrew C. Walseth Leffert Jay & Polglaze, P.A. patents

20070226592 - Variable sector-count ecc

August 2007 - Attn: Andrew C. Walseth Leffert Jay & Polglaze, P.A. patents

20070189073 - Programming method to reduce gate coupling interference for non-volatile memory

March 2007 - Attn: Andrew C. Walseth Leffert Jay & Polglaze, P.A. patents

20070045718 - Band engineered nano-crystal non-volatile memory device utilizing enhanced gate injection

November 2006 - Attn: Andrew C. Walseth Leffert Jay & Polglaze, P.A. patents

20060261869 - Graduated delay line for increased clock skew correction circuit operating range
20060258090 - Band-engineered multi-gated non-volatile memory device with enhanced attributes
20060245272 - Method of comparison between cache and data register for non-volatile memory

February 2006 - Attn: Andrew C. Walseth Leffert Jay & Polglaze, P.A. patents

20060028870 - Nand string wordline delay reduction



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