Asynchronous wires for graphical programming

Title: Asynchronous wires for graphical programming

Brief Patent Description - Full Patent Description - Patent Claims

The Patent Description & Claims data below is from USPTO Patent Application 20080126956, Asynchronous wires for graphical programming.

1. A computer-implemented method for asynchronous communication in a graphical program, the method comprising: displaying a first node and a second node in a graphical program, wherein the graphical program comprises a plurality of interconnected nodes that visually indicate functionality of the graphical program, wherein each of the first and second nodes has a respective functionality, and wherein each of the first and second nodes includes a respective terminal; including an asynchronous wire in the graphical program, wherein the asynchronous wire connects the first node and the second node via their respective terminals; configuring the asynchronous wire for asynchronous communication between the first and second nodes; executing the graphical program, wherein said executing comprises: executing the first and second nodes; and the first and second nodes communicating asynchronously during said executing the first and second nodes.

2. The method of claim 1, wherein the graphical program is a first graphical program, wherein the asynchronous wire is implemented by a second graphical program, and wherein the second graphical program is separate and distinct from the first graphical program.

3. The method of claim 2, wherein being implemented by a second graphical program comprises the asynchronous wire being implemented by an instance of the second graphical program.

4. The method of claim 3, wherein the instance of the second graphical program includes data transmitted by the asynchronous wire.

5. The method of claim 2, wherein the second graphical program is not viewable by a user of the first graphical program.

6. The method of claim 1, wherein at least one of the first and second nodes is comprised in a respective loop.

7. The method of claim 1, wherein said configuring the asynchronous wire for asynchronous communication between the first and second nodes comprises configuring one or more of: a data structure included in or associated with the asynchronous wire; a buffer size for the asynchronous wire; a read policy for the asynchronous wire; a write policy for the asynchronous wire; directionality of the asynchronous wire; or semantics of wire branching.

8. The method of claim 7, wherein configuring directionality of the asynchronous wire configures the asynchronous wire for one or both of: one way communications between the first node and the second node; or two way communications between the first node and the second node.

9. The method of claim 1, wherein said configuring the asynchronous wire implements a model of computation.

10. The method of claim 9, wherein the model of computation comprises one or more of: Kahn Process Networks (PN); or Communicating Sequential Processes (CSP).

11. The method of claim 1, wherein the asynchronous wire has a default configuration comprising default values for one or more attributes of the asynchronous wire.

12. The method of claim 11, wherein said configuring the asynchronous wire comprises overwriting at least one of the default values for the one or more attributes of the asynchronous wire with a respective at least one new value.

13. The method of claim 1, wherein said configuring the asynchronous wire further comprises configuring the terminals of the first and second nodes for asynchronous communication via the asynchronous wire.

14. The method of claim 1, further comprising configuring one or both of the terminals of the first and second nodes for asynchronous communications, wherein after configuring a terminal for asynchronous communications, any wire connected to the terminal is automatically configured as an asynchronous wire.

15. The method of claim 1, wherein the graphical program is a data flow program; and wherein the asynchronous wire does not operate according to data flow protocol.

16. The method of claim 1, wherein the asynchronous wire includes or is associated with one or more data structures for storing data transmitted on the asynchronous wire.

17. The method of claim 16, wherein the one or more data structures for storing data transmitted on the asynchronous wire comprise a queue.

18. The method of claim 17, wherein the queue is implemented as one or more of: a software data structure; a field programmable gate array (FPGA) first in first out (FIFO) structure; or a real time (RT) FIFO.

19. The method of claim 1, further comprising: including one or more additional asynchronous wires in the graphical program connecting at least a subset of the plurality of nodes for asynchronous communication among the at least a subset of the plurality of nodes.

20. The method of claim 19, wherein the graphical program includes at least one cycle formed by at least some of the asynchronous wires and nodes in the graphical program.

21. The method of claim 19, wherein at least one of the nodes in the graphical program receives input from two different asynchronous wires.

22. The method of claim 19, wherein at least one of the nodes in the graphical program provides output to two different asynchronous wires.

23. The method of claim 1, wherein the graphical program is operable to perform one or more of: an industrial automation function; a process control function; a test and measurement function.

24. A computer readable memory medium that stores program instructions for asynchronous communication in a graphical program, wherein the program instructions are executable by a processor to perform: displaying a first node and a second node in a graphical program, wherein the graphical program comprises a plurality of interconnected nodes that visually indicate functionality of the graphical program, wherein each of the first and second nodes has a respective functionality, and wherein each of the first and second nodes includes a respective terminal; including an asynchronous wire in the graphical program, wherein the asynchronous wire connects the first node and the second node via their respective terminals; configuring the asynchronous wire for asynchronous communication between the first and second nodes; executing the graphical program, wherein said executing comprises: executing the first and second nodes; and the first and second nodes communicating asynchronously during said executing the first and second nodes.

25. A system for asynchronous communication in a graphical program, comprising: a processor; and a memory medium coupled to the processor, wherein the memory medium stores program instructions for asynchronous communication in a graphical program, wherein the program instructions are executable by a processor to: display a first node and a second node in a graphical program, wherein the graphical program comprises a plurality of interconnected nodes that visually indicate functionality of the graphical program, wherein each of the first and second nodes has a respective functionality, and wherein each of the first and second nodes includes a respective terminal; include an asynchronous wire in the graphical program, wherein the asynchronous wire connects the first node and the second node via their respective terminals; configure the asynchronous wire for asynchronous communication between the first and second nodes; execute the graphical program, wherein to execute the graphical program, the program instructions are executable to: execute the first and second nodes, wherein the first and second nodes communicate asynchronously during execution.

26. A system for asynchronous communication in a graphical program, comprising: means for displaying a first node and a second node in a graphical program, wherein the graphical program comprises a plurality of interconnected nodes that visually indicate functionality of the graphical program, wherein each of the first and second nodes has a respective functionality, and wherein each of the first and second nodes includes a respective terminal; means for including an asynchronous wire in the graphical program, wherein the asynchronous wire connects the first node and the second node via their respective terminals; means for configuring the asynchronous wire for asynchronous communication between the first and second nodes; means for executing the graphical program, wherein said executing comprises: executing the first and second nodes; and the first and second nodes communicating asynchronously during said executing the first and second nodes.

Brief Patent Description - Full Patent Description - Patent Claims

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Industry Class:
Data processing: presentation processing of document

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