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Ardavan Niroomand patents

Recent bibliographic sampling of Ardavan Niroomand patents listed/published in the public domain by the USPTO (USPTO Patent Application #,Title):



01/22/15 - 20150021744 - Pitch reduction technology using alternating spacer depositions during the formation of a semiconductor device and systems including same
A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched....
Inventors: Baosuo Zhou, Mirzafer K. Abatchev, Ardavan Niroomand, Paul A. Morgan, Shuang Meng, Joseph Neil Greely, Brian J. Coppa (Micron Technology, Inc.)

05/02/13 - 20130105937 - Simplified pitch doubling process flow
A method for fabricating a semiconductor device comprises patterning a layer of photoresist material to form a plurality of mandrels. The method further comprises depositing an oxide material over the plurality of mandrels by an atomic layer deposition (ALD) process. The method further comprises anisotropically etching the oxide material from...
Inventors: Ardavan Niroomand, Baosuo Zhou, Ramakanth Alapati (Micron Technology, Inc.)

04/11/13 - 20130089977 - Method for forming high density patterns
In one or more embodiments, a method is provided for forming an integrated circuit with a pattern of isolated features having a final density of isolated features that is greater than a starting density of isolated features in an integrated circuit by a multiple of two or more. The method...
Inventors: Baosuo Zhou, Gurtej S. Sandhu, Ardavan Niroomand (Micron Technology, Inc)

09/20/12 - 20120238077 - Methods of forming high density structures and low density structures with a single photomask
Some embodiments include formation of polymer spacers along sacrificial material, removal of the sacrificial material, and utilization of the polymer spacers as masks during fabrication of integrated circuitry. The polymer spacer masks may, for example, be utilized to pattern flash gates of a flash memory array. In some embodiments, the...
Inventors: Ramakanth Alapati, Ardavan Niroomand, Gurtej S. Sandhu (Micron Technology, Inc.)

12/29/11 - 20110316114 - Simplified pitch doubling process flow
A method for fabricating a semiconductor device comprises patterning a layer of photoresist material to form a plurality of mandrels. The method further comprises depositing an oxide material over the plurality of mandrels by an atomic layer deposition (ALD) process. The method further comprises anisotropically etching the oxide material from...
Inventors: Ardavan Niroomand, Baosuo Zhou, Ramakanth Alapati (Micron Technology, Inc.)

01/13/11 - 20110008970 - Methods of forming semiconductor constructions
The invention includes methods of forming isolation regions for semiconductor constructions. A hard mask can be formed and patterned over a semiconductor substrate, with the patterned hard mask exposing a region of the substrate. Such exposed region can be etched to form a first opening having a first width. The...
Inventors: Ramakanth Alapati, Ardavan Niroomand, Gurtej S. Sandhu, Luan C. Tran (Micron Technology Inc.)

11/25/10 - 20100295114 - Semiconductor constructions
Some embodiments include formation of polymer spacers along sacrificial material, removal of the sacrificial material, and utilization of the polymer spacers as masks during fabrication of integrated circuitry. The polymer spacer masks may, for example, be utilized to pattern flash gates of a flash memory array. In some embodiments, the...
Inventors: Ramakanth Alapati, Ardavan Niroomand, Gurtej S. Sandhu (Micron Technology, Inc.)

08/26/10 - 20100216307 - Simplified pitch doubling process flow
A method for fabricating a semiconductor device comprises patterning a layer of photoresist material to form a plurality of mandrels. The method further comprises depositing an oxide material over the plurality of mandrels by an atomic layer deposition (ALD) process. The method further comprises anisotropically etching the oxide material from...
Inventors: Ardavan Niroomand, Baosuo Zhou, Ramakanth Alapati (Micron Technology, Inc.)

05/06/10 - 20100112818 - Method for forming high density patterns
Methods are disclosed, such as those involving increasing the density of isolated features in an integrated circuit. In one or more embodiments, a method is provided for forming an integrated circuit with a pattern of isolated features having a final density of isolated features that is greater than a starting...
Inventors: Baosuo Zhou, Gurtej S. Sandhu, Ardavan Niroomand (Micron Technology, Inc.)

12/03/09 - 20090294878 - Circuitry and gate stacks
The present invention includes semiconductor circuitry. Such circuitry encompasses a metal silicide layer over a substrate and a layer comprising silicon, nitrogen and oxygen in physical contact with the metal silicide layer. The present invention also includes a gate stack which encompasses a polysilicon layer over a substrate, a metal...
Inventors: Zhiping Yin, Ravi Iyer, Thomas R. Glass, Richard Holscher, Ardavan Niroomand, Linda K. Somerville, Gurtej S. Sandhu

06/11/09 - 20090149026 - Method for forming high density patterns
Methods are disclosed, such as those involving increasing the density of isolated features in an integrated circuit. In one or more embodiments, a method is provided for forming an integrated circuit with a pattern of isolated features having a final density of isolated features that is greater than a starting...
Inventors: Baosuo Zhou, Gurtej S. Sandhu, Ardavan Niroomand (Micron Technology, Inc.)

Micron Technology, Inc., Micron Technology, Inc, Micron Technology Inc.

Archived*
(*May have duplicates - we are upgrading our archive.)

20120238077 - Methods of forming high density structures and low density structures with a single photomask


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The bibliographic references displayed about Ardavan Niroomand's patents are for a recent sample of Ardavan Niroomand's publicly published patent applications. The inventor/author may have additional bibliographic citations listed at the USPTO.gov. FreshPatents.com is not associated or affiliated in any way with the author/inventor or the United States Patent/Trademark Office but is providing this non-comprehensive sample listing for educational and research purposes using public bibliographic data published and disseminated from the United States Patent/Trademark Office public datafeed. This information is also available for free on the USPTO.gov website. If Ardavan Niroomand filed recent patent applications under another name, spelling or location then those applications could be listed on an alternate page. If no bibliographic references are listed here, it is possible there are no recent filings or there is a technical issue with the listing--in that case, we recommend doing a search on the USPTO.gov website.

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