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  Apparatus for removing a halogen-containing residueUSPTO Application #: 20070272359Title: Apparatus for removing a halogen-containing residue Abstract: The invention provides for a method and integrated system for removing a halogen-containing residue from a substrate comprising etching the substrate, heating the substrate and exposing the heated substrate to a plasma that removes the halogen-containing residue. (end of abstract) Agent: MoserIPLaw Group / Applied Materials, Inc. - Shrewsbury, NJ, US Inventors: MARK N. KAWAGUCHI, JAMES S. PAPANU, SCOTT WILLIAMS, MATTHEW FENTON DAVIS USPTO Applicaton #: 20070272359 - Class: 156345320 (USPTO) The Patent Description & Claims data below is from USPTO Patent Application 20070272359. Brief Patent Description - Full Patent Description - Patent Application Claims
CROSS-REFERENCE TO RELATED APPLICATION [0001] This application is a divisional of co-pending U.S. patent application Ser. No. 10/777,026, filed Feb. 11, 2004, which claims the benefit of U.S. Provisional Application No. 60/447,406 filed Feb. 14, 2003. Each of the aforementioned related patent applications is herein incorporated by reference. BACKGROUND OF THE DISCLOSURE [0002] 1. Field of the Invention [0003] The present invention generally relates to a method and apparatus for fabricating devices on a semiconductor substrate. More specifically, the present invention relates to a method and apparatus for removing halogen-containing residue after plasma etching a conducting or semiconducting layer. [0004] 2. Description of the Related Art [0005] Ultra-large-scale integrated (ULSI) circuits may include more than one million electronic devices (e.g., transistors) that are formed on a semiconductor substrate, such as a silicon (Si) wafer, and cooperate to perform various functions within the device. Typically, the transistors used in the ULSI circuits are complementary metal-oxide-semiconductor (CMOS) field effect transistors. A CMOS transistor has a gate structure comprising a polysilicon gate electrode and gate dielectric and is disposed between a source region and drain regions that are formed in the wafer. [0006] Fabrication of the electronic devices comprises etch processes in which one or more layers of a film stack (e.g., film stack of the gate structure) are plasma etched and removed, either partially or in total. During plasma etch processes, the layers (e.g., layers of silicon, polysilicon, hafnium dioxide (HfO.sub.2), silicon dioxide (SiO.sub.2), and the like) are typically exposed to etchants comprising at least one halogen-containing gas, such as hydrogen bromide (HBr), chlorine (Cl.sub.2), carbon tetrafluoride (CF.sub.4), carbon monoxide (CO), and the like. Such processes cause a halogen-containing residue to build up on the surfaces of the etched features, etch masks, and elsewhere on the wafer. [0007] When exposed to a non-vacuumed environment (e.g., within factory interfaces that interconnect various wafer processing systems) and/or during consecutive processing, the halogen-containing residues release gaseous halogens and halogen-based reactants (e.g., bromine (Br.sub.2), chlorine, hydrogen chloride (HCl), and the like). The released halogens and halogen-based reactants cause corrosion and particle contamination of the interior of the processing systems and factory interfaces, as well as corrosion of metallic layers on the substrate. Cleaning of the processing systems and factory interfaces and replacement of the corroded parts is a time consuming and expensive procedure. [0008] Therefore, there is a need in the art for a method of removing a halogen-containing residue from a substrate during fabrication of CMOS transistors and other devices used in the integrated circuits. SUMMARY OF THE INVENTION [0009] A method and apparatus for removing a halogen-containing residue from a substrate comprises pre-heating the substrate in an atmosphere of oxygen and nitrogen and exposing the pre-heated substrate in a remote plasma reactor to a gas (or gas mixture) comprising oxygen, nitrogen, and an optional hydrogen-containing gas. BRIEF DESCRIPTION OF THE DRAWINGS [0010] The teachings of the present invention can be readily understood by considering the following detailed description in conjunction with the accompanying drawings, in which: [0011] FIG. 1 depicts a flow diagram of a method of removing a halogen-containing residue in accordance with the present invention; [0012] FIGS. 2A-2D, together, depict a sequence of schematic, cross-sectional views of a substrate having a gate structure of a field effect transistor being formed in accordance with the method of FIG. 1; [0013] FIG. 3 depicts a schematic diagram of an exemplary remote plasma processing apparatus of the kind used in performing portions of the inventive method; and [0014] FIG. 4 depicts a schematic plan view of an integrated platform used to perform the method of the present invention. [0015] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. [0016] It is to be noted, however, that the appended drawings illustrate only exemplary embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments. DETAILED DESCRIPTION [0017] The present invention is a method and apparatus for removing a halogen-containing residue (i.e., a residue containing bromine (Br), chlorine (Cl), and the like) after plasma etching a layer on a semiconductor substrate, e.g., silicon (Si) wafer. [0018] The invention increases the productivity of fabricating integrated electronic devices and is generally used to protect factory interfaces, processing equipment, and metallic layers of the thin film electronic devices from corrosion and particle contamination caused by halogen-based reactants (e.g., Br.sub.2, Cl.sub.2, and the like). Such reactants are formed when the wafers comprising a halogen-containing residue are exposed, even momentarily, to a non-vacuumed portion (e.g., atmospheric pressure portion) of a facility for fabricating devices on semiconductor wafers, e.g., semiconductor fabrication process. [0019] FIG. 1 depicts a flow diagram of a method 100 of removing a halogen-containing residue in accordance with the present invention. In one illustrative embodiment, the method 100 comprises processes performed upon a film stack of a gate structure of a field effect transistor, such as a complementary metal-oxide-semiconductor (CMOS) transistor and the like. Although the invention is described for use during gate structure fabrication, the invention also finds use wherever a halogen-containing residue is to be removed, e.g., shallow trench isolation formation. For best understanding of this embodiment of the invention, the reader should refer simultaneously to FIGS. 1 and 2A-2D. Continue reading... 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