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  Apparatus for direct plating on resistive linersUSPTO Application #: 20060163055Title: Apparatus for direct plating on resistive liners Abstract: An apparatus for direct electroplating of a conductive material, such as copper, on resistive liners or substrates is provided. The apparatus includes an integrated in-situ measuring system to follow the actual progress of the front of the conductive material during plating. Feed-back of this information to a power supply allows for more precise control of the effective current density during plating. (end of abstract) Agent: Connolly Bove Lodge & Hutz LLP (ibm Yorktown) - Washington, DC, US Inventors: Philippe M. Vereecken, Panayotis Andricacos, Hariklia Deligianni, Keith T. Kwietniak, Caliopi Andricacos USPTO Applicaton #: 20060163055 - Class: 204228900 (USPTO) Related Patent Categories: Chemistry: Electrical And Wave Energy, Apparatus, Electrolytic, With Current, Voltage, Or Power Control Means Responsive To Sensed Condition, Having Auxiliary Electrode The Patent Description & Claims data below is from USPTO Patent Application 20060163055. Brief Patent Description - Full Patent Description - Patent Application Claims
FIELD OF THE INVENTION [0001] The present invention relates to electroplating an electrically conductive material such as a relatively low resistive metal and especially copper onto a platable resistive metal barrier layer or stack of layers. More particularly, the present invention relates to an apparatus for directly plating onto the resistive metal without the need of a seed or catalyst layer, and especially without the need of a copper seed layer (even though a thin seed may be present, e.g. about 1.ANG.-about 10.ANG.). The present invention makes it possible to form a continuous and relatively uniform layer by growing a thin film from the edge of the surface to be plated towards its center by controlling the conditions of the current or voltage being applied. BACKGROUND OF THE INVENTION [0002] The current damascene plating process and especially that for copper requires a copper seed as a conductive layer on top of the highly resistive barrier liner which covers the underlying substrate such as a patterned wafer. The continuous miniaturization of ULSI technology will eventually require the elimination of this copper seed layer. Without this conductive seed, an applied current or voltage will drop off drastically within a short distance from the edge where the electrical contact is made (as will be described below.) As a result of this so-called terminal effect, a sufficient overpotential, .eta., for copper deposition will only exist near the edge of the substrate and plating is observed at the edge of the substrate only. When applied current is based on the total area of the substrate the effective current density for the perimeter ring is much higher and as a result burned, powdery deposits may be obtained. [0003] Conventional methods to overcome the terminal effects for thin seed layers such as low plating current, segmented anode configuration, high copper concentration and low conductivity (low acid concentration) copper plating baths improve the current distribution and result in a more uniform film thickness. However, these methods apply only in the case where a sufficient plating overpotential exists over the whole substrate surface, from edge to center. For very thin seed layers and more importantly in the absence of a seed layer, the terminal effect of the resistive liner or seed causes such a drastic increase in the potential of the liner material, U.sub.m(r), from the edge (r=r.sub.0) to center (r=0) of the wafer, that the overpotential, .eta., becomes zero at a certain distance from the electrical contact and no further plating can occur: .eta.=U.sub.eq,Cu.sup.2+.sub.Cu-U.sub.m(r) (1) with U.sub.eq,cu.sup.2+.sub./Cu the equilibrium potential (Nernst potential) for copper deposition. [0004] Copper deposition will proceed when .eta.>0, i.e. when U.sub.m(r)<U.sub.eq,Cu.sup.2+.sub./Cu. In the case of thin copper seeds (5-50 nm), the sheet resistance is still low enough to ensure deposition over the whole substrate surface, although with a non-uniform growth rate in the case of a primary current distribution. In contrast, in the case of highly resistive liner, the drop-off in the overpotential is much more severe and becomes zero at a certain distance, x=r.sub.0-r, from the edge of the wafer. In this case, deposition is only observed at the edge of the wafer. Additionally, too low current or overpotential results in a low density of nucleation sites leading to powdery, poorly adherent deposits. [0005] As with copper, the principle of seedless plating holds for the deposition of any conductive material (metal, compound, alloy, composite, semi-metal or semiconductor) onto a resistive substrate. SUMMARY OF THE INVENTION [0006] The present invention provides an apparatus for electroplating a conductive material, such as copper, on a liner or substrate. The apparatus includes: [0007] (a) at least one auxiliary electrode, wherein the at least one auxiliary electrode provides a counter electrode to the liner or substrate, wherein the liner or substrate acts as a first electrode; [0008] (b) a programmable power supply providing for the generation of a current between the at least one auxiliary electrode and the liner or substrate, allowing for the conductive material to be electroplated onto the liner or substrate, and further providing for the adjustment of the current as a function of the change in the area of the conductive material as it is electroplated on the liner or substrate; [0009] (c) a measuring device to detect the propagation of the front of the electroplated material over the surface of the liner or substrate; and [0010] (d) a computer to process the output of the measuring device and calculate a new current to be applied by the programmable power supply as a function of the output of the measuring device. [0011] The measuring device of the apparatus is not limited and can include one or more reference electrodes, a light source (such as a laser or light-emitting diode) and at least one photo detector (such as a photodiode) to measure the reflectivity of the at least one light source, an alternating current or voltage generator and analyzer (such as a frequency response analyzer (FRA) or Lock-in amplifier) to measure the electrochemical impedance of the system, and/or an alternating electromagnetic field generator and sensor for Eddy-current measurements. [0012] The present invention further relates to methods of using the apparatus of the invention. BRIEF DESCRIPTION OF THE DRAWINGS [0013] These and other features of the present invention will become apparent upon consideration of the following detailed description of the invention when read in conjunction with the drawings, in which: [0014] FIG. 1 shows the calculated change in overpotential, .eta., (calculated using the Bessel function assuming a linear change in current) for copper seeds (FIG. 1A) and platable liners (FIG. 1B) with different sheet resistance values as a function of distance from the center of a wafer; [0015] FIG. 2A shows a set of conventional electronic components, which symbolically represents the path of current flow from an electrical contact with the wafer (cathode) to the opposite electrode (anode), for plating a certain spot on a wafer; [0016] FIG. 2B shows the difference in resistive path for different spots on a wafer in a conventional cup or fountain plater; [0017] FIG. 3 shows a schematic representation of the progressive growing of copper from the edge to the center of a wafer with an associated increase in current; [0018] FIG. 4 shows a schematic representation of a basic two-electrode setup for direct plating on a wafer with a platable resistive metal layer stack in contact with the plating bath, using a programmable power supply controlling the current and voltage between the wafer (cathode) and an auxiliary electrode (anode); [0019] FIG. 5 shows a schematic representation of an advanced setup for direct plating allowing the measurement of the advancement of the plated metal from edge to center, and feed-back to a computer to control the current and voltage accordingly; [0020] FIG. 6 shows a schematic representation of a basic three-electrode setup for direct plating on a wafer with a platable resistive metal layer stack in contact with the plating bath, using a programmable power supply that can control the current between the wafer (cathode) and an auxiliary electrode (anode), and can measure and control the voltage between the wafer and the reference electrode; Continue reading... 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