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06/26/08 - USPTO Class 438 |  1 views | #20080153188 | Prev - Next | About this Page  438 rss/xml feed  monitor keywords

Apparatus and method for forming semiconductor layer

USPTO Application #: 20080153188
Title: Apparatus and method for forming semiconductor layer
Abstract: Grooves forming a thin-film transistor (TFT) pattern are formed on the surface of a roller. A tank supplies ink including semiconductor materials to the roller. A squeegee embeds the ink supplied to the roller into the grooves formed on the surface thereof. The roller transfers the ink embedded in the grooves onto a substrate. With this arrangement, the processing time for forming substrates is shortened. (end of abstract)



Agent: Birch Stewart Kolasch & Birch - Falls Church, VA, US
Inventors: Hiroshi Ohki, Yoshiharu Nakajima
USPTO Applicaton #: 20080153188 - Class: 438 21 (USPTO)

Apparatus and method for forming semiconductor layer description/claims


The Patent Description & Claims data below is from USPTO Patent Application 20080153188, Apparatus and method for forming semiconductor layer.

Brief Patent Description - Full Patent Description - Patent Application Claims
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This nonprovisional application claims priority under 35 U.S.C. § 119(a) on Patent Application No. 346737/2006 filed in Japan on Dec. 22, 2006, the entire contents of which are hereby incorporated by reference.

FIELD OF THE INVENTION

The present invention relates to a semiconductor layer forming apparatus and a method for forming a semiconductor layer.

BACKGROUND OF THE INVENTION

Flat panel displays (FPD) such as liquid crystal displays, organic EL (electroluminescence) displays, and inorganic EL displays are categorized into a passive matrix display and an active matrix display according to a driving method. The passive matrix display employs a passive driving method, and the active matrix display employs an active driving method.

The passive matrix display has a positive electrode (column) and a negative electrode (row) provided in a matrix fashion. A scanning signal is fed to a selected row electrode from a row driver circuit. A data signal for each pixel is fed to a column electrode from a column driver circuit.

On the other hand, the active matrix display controls an input signal for each pixel through a thin-film transistor. Therefore, the active matrix display is suitable for FPDs used for video displays, which requires to process a large volume of signals.

The following briefly describes a thin-film transistor used for the active matrix display. A thin-film transistor includes: a source and a drain into which concentrated impurities are doped; a channel which is formed between the source and the drain; a gate electrode which switches on and off the channel; and an insulating film which isolates the channel from the gate electrode.

Conventionally, amorphous silicon or polysilicon was used for the channel of the thin-film transistor. Recently, polysilicon has been frequently used because polysilicon is more excellent in electrical characteristic and reliability, applicability to large-area electronics, and the like. However, unfortunately, a grain size of polysilicon is as large as several hundred nanometers (nm). This gives rise to the problems including reduction in electrical properties and reliability of a miniaturized thin-film transistor.

One of the solutions to the problem associated with such a thin-film transistor made of polysilicon is to use nanostructures in a transistor. However, in order to form a nanodevice with nanostructures, the nanostructures need to be precisely oriented to a source electrode, a drain electrode, or a gate electrode of the transistor, which is a minimal unit of the nanodevice. There are various methods as a method for controlling orientation of such nanostructures.

Japanese Unexamined Patent Publication No. 2005-169614 (published on Jun. 30, 2005; hereinafter referred to as Patent Document 1) discloses a method for controlling orientation of carbon nanotubes, which are a kind of the nanostructures. According to the method, a plurality of grooves is formed on the surface of a substrate placed on a stage. A width of an open end of each groove is formed to be larger than a diameter of the carbon nanotube, and shorter than a length of the carbon nanotube. Ink in which the carbon nanotubes are dispersed is applied on this substrate. The substrate on which the ink is applied is swept with a squeegee, so that the carbon nanotubes as well as the ink are fallen into each groove. This allows the carbon nanotubes to be oriented in longitudinal directions of the grooves. The ink is heat-treated so that a solvent in the ink is vaporized. In this way, the carbon nanotubes are oriented along the grooves on the substrate.

However, in the method disclosed in Patent Document 1, the grooves are formed on the surface of the substrate placed on the stage, and the ink in which the carbon nanotubes are dispersed is applied thereon. The method therefore requires the steps of placing the substrate to be processed, washing the squeegee to sweep the ink and the stage to which extra ink is adhered, and the like steps. This makes the substrate treatment process complicated. As a result, the processing time becomes longer.

The present invention is accomplished to solve the problems discussed above. An object of the present invention is to provide a semiconductor layer forming apparatus and a method for forming a semiconductor layer, in which a semiconductor layer is formed on a surface of a substrate by transferring ink onto the surface of the substrate, the ink including semiconductor materials and being embedded in grooves forming a pattern of the semiconductor layer, whereby the processing time for forming substrates is shortened.

SUMMARY OF THE INVENTION

In order to achieve the above object, a semiconductor layer forming apparatus in accordance with the present invention includes: first ink transfer means which has grooves formed on a surface thereof, the grooves forming a pattern of a semiconductor layer; ink supplying means which supplies ink to the first ink transfer means, the ink including semiconductor materials; and ink embedding means which embeds the ink supplied to the first ink transfer means into the grooves, the first ink transfer means directly or indirectly transferring the ink embedded into the grooves onto a surface of a substrate so that the semiconductor layer is formed on the surface of the substrate.

With this configuration, the grooves forming a pattern of the semiconductor layer are formed on the surface of the first ink transfer means. The ink supplying means supplies the ink to the first ink transfer means. This ink at least includes semiconductor materials. The ink supplied to the first ink transfer means by the ink supplying means is embedded into the grooves formed on the surface of the first ink transfer means by the ink embedding means. The first ink transfer means directly or indirectly transfers the ink embedded into this grooves onto the surface of the substrate. Thus, the semiconductor layer is formed on the surface of the substrate.

In this way, by transferring the ink forming the pattern of the semiconductor layer onto the substrate, the semiconductor layer is formed on the surface of the substrate. This enables the processing time for forming substrates to be shortened.

In order to achieve the above object, a method for forming a semiconductor layer in accordance with the present invention includes the steps of: supplying ink including semiconductor materials to first ink transfer means which has grooves formed on a surface thereof, the grooves forming a pattern of a semiconductor layer; embedding the ink supplied to the first ink transfer means into the grooves; and directly or indirectly transferring the ink embedded into the grooves onto a surface of a substrate so that the semiconductor layer is formed on the surface of the substrate.

The above configuration brings the same advantageous effect as that of the semiconductor layer forming apparatus in accordance with the present invention.

Additional objects, features, and strengths of the present invention will be made clear by the description below. Further, the advantages of the present invention will be evident from the following explanation in reference to the drawings.



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