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Apparatus and method for converting image dataRelated Patent Categories: Pulse Or Digital Communications, Bandwidth Reduction Or Expansion, Television Or Motion Video Signal, Predictive, Motion VectorApparatus and method for converting image data description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20060109907, Apparatus and method for converting image data. Brief Patent Description - Full Patent Description - Patent Application Claims
BACKGROUND OF THE INVENTION [0001] The present invention relates to an apparatus and method for converting image data. The apparatus and the method are suitable in receiving compressed image data (i.e., bit streams) through network media (e.g., satellite broadcast, cable television and the Internet). The image data may be one that has been compressed by orthogonal transformation (e.g., discrete cosine transform) and motion compensation, as in an MPEG (Moving Picture image coding Experts Group) system. The apparatus and the method are suitable, too, in processing image data recorded on storage media such as optical disks and magnetic disks. [0002] In recent years, more and more apparatuses complying with the MPEG system are used in data-distributing facilities such as broadcast stations and data-receiving sites such as households. These apparatuses perform orthogonal transformation (e.g., discrete cosine transform) and motion compensation on digital image data that has redundancy, thereby compressing the image data. The image data can be transmitted and stored with a higher efficiency than in the case it is not so compressed at all. [0003] In particular, MPEG2 (ISO/IEC 13818-2) is defined as a general-purpose system for encoding image data. This will be applied widely to professional use and consumer use, as a standard system that processes various types of image data, including interlaced-scan image data, sequential-scan image data, standard-resolution image data, and high-definition image data. If the MPEG2 data-compressing system is utilized, a high compression ratio and high-quality images will be achieved by allocating a bit rate of 4 to 8 Mbps to interlaced-scan images of standard resolution, each having 720.times.480 pixels. Also, a high compression ratio and high-quality images will be achieved by allocating a bit rate of 18 to 22 Mbps to interlaced-scan images of high resolution, each having 1920.times.1088 pixels. [0004] This data-compressing system will be used to transmit image data in the digital broadcasting that will be put to general use. The system is designed to transmit not only standard-resolution image data but also high-resolution image data. The receiver needs to decode the two types of image data. To provide an inexpensive receiver that can decode both types of image data, it is required that some data be extracted from the high-resolution image data, while minimizing the inevitable deterioration of image quality. This requirement should be fulfilled not only in transmission media such as digital broadcasting, but also in storage media such as optical disks and flash memories. [0005] To fulfill the requirement, the inventor hereof has proposed an image data decoding apparatus of the type shown in FIG. 1. As shown in FIG. 1, the apparatus comprises an code buffer 101, a data-compressing/analyzing section 102, a variable-length decoding section 103, an inverse quantization section 104, motion-compensating sections 108 and 109, video memory 110 and an adder 107. These components are basically identical in function to those incorporated in the ordinary MPEG encoding apparatuses. [0006] In the apparatus of FIG. 1, the compressed image data input is supplied via the code buffer 101 to the data-compressing/analyzing section 102. The data-compressing/analyzing section 102 analyzes the compressed image data, thereby obtaining data that will be used to expand the image data. The data thus obtained is supplied to the variable-length decoding section 103, together with the compressed image data. The variable-length decoding section 103 performs variable-length encoding, i.e., a process reverse to the variable-length encoding that has been performed to generate the compressed image data. In the decoding section 103, however, only coefficients may be decoded and no other process may be carried out until the EOB (End of Block) is detected. These coefficients are required in a compression inverse discrete-cosine transform (4.times.4) section 105 or a compression inverse discrete-cosine transform (field separation) section 106, in accordance with whether the macro block is of field DCT mode or fame DCT mode. FIG. 2A and FIG. 2B show two operating principles the variable-length decoding section 103 assume to decode MPEG2-image compressed data (bit stream) that has been generated by zigzag scanning. More precisely, FIG. 2A depicts the operating principle that the decoding section 103 assumes to decode the compressed data in field DCT mode, and FIG. 2B illustrates the operating principle that the decoding section 103 assumes to decode the compressed data in frame DCT mode. FIG. 3A and FIG. 3B show two operating principles the variable-length decoding section 103 assume to decode MPEG2-image compressed data (bit stream) that has been generated by alternate scanning. To be more specific, FIG. 3A depicts the operating principle that the decoding section 103 assumes to decode the compressed data in field DCT mode, and FIG. 3B illustrates the operating principle that the decoding section 103 assumes to decode the compressed data in frame DCT mode. The numbers in FIGS. 2A, 2B, 3A and 3B indicate the order in which the data items have been generated by scanning. The data decoded by the variable-length decoding section 103 is supplied to the inverse quantization section 104. The inverse quantization section 104 performs inverse quantization on the input data. The data generated by the section 104 is supplied to the compression inverse discrete-cosine transform (4.times.4) section 105 or the compression inverse discrete-cosine transform (field separation) section 106. The section 105 or 106 performs inverse discrete-cosine transform on the input data. [0007] The inverse quantization section 104 performs inverse quantization, generating a discrete-cosine transform coefficient. The discrete-cosine transform coefficient is supplied to either the discrete-cosine transform (4.times.4) section 105 or the discrete-cosine transform (field separation) section 106, in accordance with whether the macro block is of the field DCT mode or the frame DCT mode. The section 105 or the section 106 performs inverse discrete-cosine transform on the input data. [0008] The macro block may be an intra macro block. In this case, the data subjected to compression inverse discrete-cosine transform is stored via the adder 107 into a video memory 110, without being further processed at all. If the macro block is an inter macro block, the data is supplied to the motion-compensating section 108 or the motion-compensating section 109, in accordance with whether the motion-compensating mode is a field-predicting mode or a frame-predicting mode. The section 108 or 109 effects interpolation which achieves 1/4 pixel precision in both the horizontal direction and the vertical direction, by using the reference data stored in the video memory 110, thereby generating predicted pixel data. The predicted pixel data is supplied to the adder 107, together with the pixel data subjected to the inverse discrete-cosine transform. The adder 107 adds the predicted pixel data and the pixel data, generating a pixel value. The pixel value is stored into the video memory 110. As shown in FIGS. 4A and 4B, the lower-layer pixel value stored in the video memory 110 contains a phase difference between the first and second fields, with respect to the upper-layer pixel value. The circles shown in FIGS. 4A and 4B indicate the pixels. [0009] The image data-decoding apparatus has a frame-converting section 111. The frame-converting section 111 converts the pixel value, which is stored in the video memory 110, to an image signal that represents an image of such a size as can be displayed by a display (not shown). The image signal output from the frame-converting section 111 is the decoded image signal that is output from the image decoding apparatus of FIG. 1. [0010] The operating principles of the compression inverse discrete-cosine transform (4.times.4) section 105 and compression inverse discrete-cosine transform (field separation) section 106 will be described. [0011] The compression inverse discrete-cosine transform (4.times.4) section 105 extracts the lower, fourth-order coefficients included in eighth-order discrete cosine transform coefficients, for both the horizontal component and the vertical component. Then, the section 105 performs fourth-order inverse discrete cosine transform on the fourth-order coefficients extracted. [0012] On the other hand, the compression inverse discrete-cosine transform section 106 carries out the process that will be described below. [0013] FIG. 5 illustrates the sequence of operations that the compression inverse discrete-cosine transform section 106 performs. [0014] As shown in FIG. 5, the compression inverse discrete-cosine transform (field separation) section 106 first performs 8.times.8 inverse discrete cosine transform (IDCT) on the discrete cosine transform coefficients y.sub.1 to y.sub.8 contained in the compressed image data (bit stream) that is the input data. Data items x.sub.1 to x.sub.8, or decoded data items, are thereby generated. Then, the section 106 separates the data items x.sub.1 to x.sub.8 into two first field data and second field data. The first field data consists of the data items x.sub.1, x.sub.3, x.sub.5 and x.sub.7. The second field data consists of data items x.sub.2, x.sub.4, x6 and x.sub.8. Next, the section 106 performs 4.times.4 discrete cosine transform (DCT) on the first field data, generating discrete cosine transform coefficients z.sub.1, z.sub.3, z.sub.5 and z.sub.7, and on the second field data, generating discrete cosine coefficients z.sub.2, z.sub.4, z6 and z.sub.8. Further, the section 106 performs 2.times.2 inverse discrete cosine transform on only the lower ones of each field data. Thus, compressed pixel values x'.sub.1 an x'.sub.3 are obtained for the first field data, and compressed pixel values x'.sub.2 an x'.sub.4 are obtained for the second field data. Then, the pixel values are subjected to frame synthesis, generating output values x'.sub.1, x'.sub.2, x'.sub.3 and x'.sub.4. In practice, the pixel values x'.sub.1, x'.sub.2, x'.sub.3 and x'.sub.4 are obtained by effecting a matrix algebraic operation equivalent to this sequence of operations, on the discrete cosine transform coefficients y.sub.1 to y.sub.8. The matrix [FS.sup.1] obtained by calculation using addition theorem is given as follows: equation 1: [ FS I ] = 1 2 .function. [ A B D - E F G H I A - C - D E - F - G - H - J A C - D - E - F G - H J A - B D E F - G H - I ] ( 1 ) [0015] A to J in the equation (1) are as follows: equation .times. .times. 2 .times. : .times. A = 1 2 .times. B = cos .function. ( .pi. 16 ) + cos .function. ( 3 .times. .pi. 16 ) + 3 .times. .times. cos .function. ( 5 .times. .pi. 16 ) - cos .function. ( 7 .times. .pi. 16 ) 4 .times. D = cos .function. ( .pi. 16 ) - 3 .times. cos .function. ( 3 .times. .pi. 16 ) - cos .function. ( 5 .times. .pi. 16 ) - cos .function. ( 7 .times. .pi. 16 ) 4 .times. D = 1 4 .times. E = cos .function. ( .pi. 16 ) - cos .function. ( 3 .times. .pi. 16 ) - cos .function. ( 5 .times. .pi. 16 ) - cos .function. ( 7 .times. .pi. 16 ) 4 .times. F = cos .function. ( .pi. 8 ) + cos .function. ( 3 .times. .pi. 8 ) 2 .times. G = cos .function. ( .pi. 16 ) - cos .function. ( 3 .times. .pi. 16 ) + cos .function. ( 5 .times. .pi. 16 ) + cos .function. ( 7 .times. .pi. 16 ) 4 .times. H = 1 4 + 1 2 .times. 2 .times. I = cos .function. ( .pi. 16 ) - cos .function. ( 3 .times. .pi. 16 ) + 3 .times. .times. cos .function. ( 5 .times. .pi. 16 ) + cos .function. ( 7 .times. .pi. 16 ) 4 .times. J = cos .function. ( .pi. 16 ) + 3 .times. cos .function. ( 3 .times. .pi. 16 ) - cos .function. ( 5 .times. .pi. 16 ) - cos .function. ( 7 .times. .pi. 16 ) 4 [0016] The operations of the compression inverse discrete-cosine transform (4.times.4) section 105 and compression inverse discrete-cosine transform (field separation) section 106 can be carried out by applying a fast algorithm. An example of a fast algorithm is the Wang algorithm (see Zhong de Wang, "Fast Algorithms for the Discrete W Transform and for the Discrete Fourier Transform," IEEE Tr. ASSP-32, No. 4, pp. 803-816, August 1984). [0017] The matrix representing the compression discrete cosine transform (4.times.4) that the section 105 performs can be decomposed as shown below, by applying the Wang algorithm: equation .times. .times. 3 .times. : .times. .times. [ C 4 II ] - 1 = [ 1 0 0 1 0 1 1 0 0 1 - 1 0 1 0 0 - 1 ] [ [ C 2 III ] [ C 2 III _ ] ] [ 1000 0010 0001 0100 ] ( 2 ) [0018] The matrix [C.sup.111.sub.2] in the equation (2) is expressed as follows: equation .times. .times. .times. 4 .times. : .times. .times. [ C 2 III ] = [ C 2 II ] T = 1 2 .function. [ 1 1 1 - 1 ] equation .times. .times. 5 .times. : .times. [ C 2 III _ ] = [ .times. - C 1 8 C 3 8 C 3 8 C 1 8 ] = [ .times. 1 0 - 1 0 1 1 ] [ - C 1 8 + C 3 8 0 0 0 C 1 8 + C 3 8 0 0 0 C 3 8 ] [ 1 0 0 1 1 - 1 ] [0019] In these equations, C.sub.r=cos (r.delta.). [0020] FIG. 6 illustrates how the compression inverse discrete-cosine transform (4.times.4) section 105 performs a 4.times.4 compression inverse discrete-cosine transform by using the above-mentioned Wang algorithm. [0021] As shown in FIG. 6, an adder 121 adds coefficients F(0) and F(2) (i.e., two of lower, fourth-order coefficients F(0) to F(3)), and an adder 122 adds an inverted coefficient F(2) to coefficient F(0), thereby performing subtraction. A multiplier 123 multiplies the output of the adder 121 by a coefficient A (=1/2). The product obtained by the multiplier 123 is supplied to adders 133 and 134. Meanwhile, a multiplier 124 multiplies the output of the adder 122 by the coefficient A. The product obtained by the multiplier 124 is supplied to adders 131 and 132. [0022] An adder 125 adds an inverted coefficient F(1) to the coefficient F(3), thereby effecting subtraction. A multiplier 128 multiplies the output of the adder 125 by a coefficient D (=C3/8). The product obtained by the multiplier 128 is supplied to an adder 130, and is inverted and then supplied to an adder 129. [0023] A multiplier 126 multiplies the coefficient F(3) by a coefficient B (=C.sub.1/8+C.sub.3/8). The product obtained by the multiplier 126 is supplied to the adder 129. A multiplier 127 multiplies the coefficient F(1) by a coefficient C (=C.sub.1/8+C.sub.3/8). The product obtained by the multiplier 127 is supplied to the adder 130. Continue reading about Apparatus and method for converting image data... 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