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Anthony Fai patents

Recent patents with Anthony Fai listed as an inventor - additional entries may be under other spellings.


Anthony Fai - Related organizations: Apple Inc. patents

Systems and methods for high-speed, low-profile memory packages and pinout designs

01/05/17 - 20170005056 - Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from
Inventors: Anthony Fai, Evan R. Boyle, Zhiping Yang, Zhonghua Wu

Systems and methods for high-speed, low-profile memory packages and pinout designs

11/12/15 - 20150325560 - Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from
Inventors: Anthony Fai, Evan R. Boyle, Zhiping Yang, Zhonghua Wu

Systems and methods for stacked semiconductor memory devices

10/30/14 - 20140321189 - Systems and methods are provided for stacked semiconductor memory devices. The stacked semiconductor memory devices can include a nonvolatile memory controller, a number of nonvolatile memory dies arranged in a stacked configuration, and a package substrate. The memory controller and the memory dies can be coupled to each other with
Inventors: Anthony Fai, Nicholas C. Seroff

Systems and methods for high-speed, low-profile memory packages and pinout designs

09/18/14 - 20140264906 - Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (“IC”) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from
Inventors: Anthony Fai, Evan R. Boyle, Zhiping Yang, Zhonghua Wu

Unified pcb design for ssd applications, various density configurations, and direct nand access

09/18/14 - 20140264904 - Memory systems and methods for creating the same are disclosed. The memory systems can include pairs of IC packages mounted on either side of a system substrate. Contacts formed on the IC packages can be communicatively coupled with contacts of a paired IC package using vias that extend through the
Inventors: Anthony Fai, Evan R. Boyle, Zhiping Yang, Zhonghua Wu

Systems and methods for improved communications in a nonvolatile memory system

06/12/14 - 20140164717 - Systems and methods are provided for improved communications in a nonvolatile memory (“NVM”) system. The system can toggle between multiple communications channels to provide point-to-point communications between a host device and NVM dies included in the system. The host device can toggle between multiple communications channels that extend to one
Inventors: Nicholas C. Seroff, Anthony Fai, Nir Jacob Wakrat

Systems and methods for proactively refreshing nonvolatile memory

04/24/14 - 20140115428 - System and methods for proactively refreshing portions of a nonvolatile memory including a memory system that proactively refreshes a portion of nonvolatile memory based on data associated with the portion. The data may include the time elapsed since the portion was last refreshed, the number of times the portion has
Inventors: Anthony Fai

Systems and methods for nonvolatile memory performance throttling

04/10/14 - 20140101371 - Systems and methods for nonvolatile memory (“NVM”) performance throttling are disclosed. Performance of an NVM system may be throttled to achieve particular data retention requirements. In particular, because higher storage temperatures tend to reduce the amount of time that data may be reliably stored in an NVM system, performance of
Inventors: Kevin M. Nguyen, David J. Yeh, Cheng P. Tan, Anthony Fai

Heterogeneous data paths for systems having tiered memories

03/06/14 - 20140068144 - A nonvolatile memory (“NVM”) buffer can be incorporated into an NVM system between a volatile memory buffer and an NVM to decrease the size of the volatile memory buffer and organize data for programming to the NVM. Heterogeneous data paths may be used for write and read operations such that
Inventors: Anthony Fai

Systems and methods for providing early hinting to nonvolatile memory charge pumps

11/07/13 - 20130297852 - Systems and methods for providing early hinting to nonvolatile memory charge pumps are disclosed. Charge pumps associated with one or more nonvolatile memory dies can be proactively activated based on a determination that a command queue of access requests contains at least a threshold number of consecutive access requests of
Inventors: Anthony Fai, Nicholas C. Seroff

Power management for a system having non-volatile memory

10/31/13 - 20130290606 - Systems and methods are disclosed for power management of a system having non-volatile memory (“NVM”). One or more controllers of the system can optimally turn modules on or off and/or intelligently adjust the operating speeds of modules and interfaces of the system based on the type of incoming commands and
Inventors: Victor E. Alessi, Nicholas C. Seroff, Arjun Kapoor, Nir Jacob Wakrat, Anthony Fai

Memory array power cycling

10/24/13 - 20130283081 - In a non-volatile memory system, physically separate power rails are provided from a host system to a NVM device for independently power cycling a controller and memory array in the NVM device. The controller of the NVM device can send a power cycle request signal to the host system over
Inventors: Nir Jacob Wakrat, Anthony Fai, Matthew Byom

Architecture for address mapping of managed non-volatile memory

08/15/13 - 20130212318 - The disclosed architecture uses address mapping to map a block address on a host interface to an internal block address of a non-volatile memory (NVM) device. The block address is mapped to an internal chip select for selecting a Concurrently Addressable Unit (CAU) identified by the block address. The disclosed
Inventors: Tahoma Toelkes, Nir Jacob Wakrat, Kenneth L. Herman, Barry Corlett, Vadim Khmelnitsky, Anthony Fai, Daniel Jeffrey Post, Hsiao Thio

Systems and methods for proactively refreshing nonvolatile memory

07/18/13 - 20130185606 - System and methods for proactively refreshing portions of a nonvolatile memory are disclosed. A memory system may proactively refresh a portion of nonvolatile memory based on data associated with the portion. The data may include the time elapsed since the portion was last refreshed, the number of times the portion
Inventors: Anthony Fai

Systems and methods for stacked semiconductor memory devices

06/13/13 - 20130148401 - Systems and methods are provided for stacked semiconductor memory devices. The stacked semiconductor memory devices can include a nonvolatile memory controller, a number of nonvolatile memory dies arranged in a stacked configuration, and a package substrate. The memory controller and the memory dies can be coupled to each other with
Inventors: Anthony Fai, Nicholas C. Seroff

Systems and methods for improved communications in a nonvolatile memory system

05/30/13 - 20130138868 - Systems and methods are provided for improved communications in a nonvolatile memory (“NVM”) system. The system can toggle between multiple communications channels to provide point-to-point communications between a host device and NVM dies included in the system. The host device can toggle between multiple communications channels that extend to one
Inventors: Nicholas C. Seroff, Anthony Fai, Nir Jacob Wakrat

Systems and methods for obtaining and using nonvolatile memory health information

05/02/13 - 20130111298 - Systems and methods are provided for obtaining and using nonvolatile memory (“NVM”) health information. Health information can include a variety of information associated with the performance and reliability of portions of an NVM device, such as the number of errors detected in a portion of NVM or the amount of
Inventors: Nicholas Seroff, Anthony Fai, Nir Jacob Wakrat

Multipage preparation commands for non-volatile memory systems

03/21/13 - 20130073800 - Multipage preparation commands for non-volatile memory systems are disclosed. The multipage preparation commands supply data that can be used to prepare a non-volatile memory device for forthcoming multipage program operations. A host controller can use the commands ahead of a multipage program operation to optimize usage of a multipage program
Inventors: Vadim Khmelnitsky, Nir Jacob Wakrat, Tahoma Toelkes, Daniel Jeffrey Post, Anthony Fai

Testing memory subsystem connectivity

02/07/13 - 20130036255 - In one implementation, a memory subsystem includes a plurality of non-volatile memory dies, a memory controller that is communicatively connected to each of the non-volatile memory dies over one or more first busses, a host interface through which the memory controller communicates with a host over a second bus, and
Inventors: Anthony Fai, Nir Jacob Wakrat, Nicholas Seroff

Debugging a memory subsystem

02/07/13 - 20130036254 - In one implementation, a memory subsystem includes non-volatile memory, a memory controller that is communicatively connected to the non-volatile memory over a first bus, a host interface through which the memory controller communicates with a host controller over a second bus, and a joint test action group (JTAG) interface that
Inventors: Anthony Fai, Nir Jacob Wakrat, Nicholas Seroff

Ad-hoc cash dispensing network

01/31/13 - 20130031009 - An ad-hoc cash-dispensing network that allows users to efficiently exchange cash is provided. The ad-hoc cash-dispensing network includes a cash-dispensing server, a network, and a plurality of client terminals that connect to the cash-dispending server through the network. The user of a client terminal sends a request for cash to
Inventors: Arjun Kapoor, Nir Wakrat, Anthony Fai

Using temperature sensors with a memory device

09/06/12 - 20120224425 - In one implementation, a method for performing memory operations includes receiving, at a memory device, a request to read data from one or more non-volatile memory cells; and retrieving stored temperature information associated with the non-volatile memory cells, wherein the temperature information is associated with a temperature at approximately at
Inventors: Anthony Fai, Nicholas Seroff, Nir Jacob Wakrat

Obtaining debug information from a flash memory device

08/23/12 - 20120216079 - This document generally describes systems, devices, methods, and techniques for obtaining debug information from a memory device. Debug information can include a variety of information associated with a memory device that can be used for debugging the device, such as a sequence of operations performed by the memory device and
Inventors: Anthony Fai, Nir Jacob Wakrat, Nicholas Seroff

Variable impedance control for memory devices

08/23/12 - 20120215958 - This document generally describes systems, devices, methods, and techniques for variably controlling impedance for a memory device where multiple NVM units (e.g., NVM dies) are accessible over a shared bus. Impedance can be varied using switches that are configured to switch between a NVM unit and an impedance terminal. Switches
Inventors: Anthony Fai, Nicholas Seroff

Stacked die with vertically-aligned conductors and methods for making the same

04/05/12 - 20120084478 - Stacked die having vertically-aligned conductors and methods for making the same are disclosed for providing a non-volatile memory, such as flash memory (e.g., NAND flash memory), for use in an electronic device.
Inventors: Nir J. Wakrat, Nick Seroff, Anthony Fai

Memory array power cycling

03/17/11 - 20110066869 - In a non-volatile memory system, physically separate power rails are provided from a host system to a NVM device for independently power cycling a controller and memory array in the NVM device. The controller of the NVM device can send a power cycle request signal to the host system over
Inventors: Nir Jacob Wakrat, Anthony Fai, Matthew Byom

Multipage preparation commands for non-volatile memory systems

11/11/10 - 20100287353 - Multipage preparation commands for non-volatile memory systems are disclosed. The multipage preparation commands supply data that can be used to prepare a non-volatile memory device for forthcoming multipage program operations. A host controller can use the commands ahead of a multipage program operation to optimize usage of a multipage program
Inventors: Vadim Khmelnitsky, Nir Jacob Wakrat, Tahoma Toelkes, Daniel Jeffrey Post, Anthony Fai

Architecture for address mapping of managed non-volatile memory

06/24/10 - 20100161886 - The disclosed architecture uses address mapping to map a block address on a host interface to an internal block address of a non-volatile memory (NVM) device. The block address is mapped to an internal chip select for selecting a Concurrently Addressable Unit (CAU) identified by the block address. The disclosed
Inventors: Tahoma Toelkes, Nir Jacob Wakrat, Kenneth L. Herman, Barry Corlett, Vadim Khmelnitsky, Anthony Fai, Daniel Jeffrey Post, Hsiao Thio


### Anthony Fai patent invention listings

The bibliographic references displayed about Anthony Fai's patents are for a recent sample of Anthony Fai's publicly published patent applications. The inventor/author may have additional bibliographic citations listed at the USPTO.gov. FreshPatents.com is not associated or affiliated in any way with the author/inventor or the United States Patent/Trademark Office but is providing this non-comprehensive sample listing for educational and research purposes using public bibliographic data published and disseminated from the United States Patent/Trademark Office public datafeed. This information is also available for free on the USPTO.gov website. If Anthony Fai filed recent patent applications under another name, spelling or location then those applications could be listed on an alternate page. If no bibliographic references are listed here, it is possible there are no recent filings or there is a technical issue with the listing--in that case, we recommend doing a search on the USPTO.gov website.

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