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05/24/07 - USPTO Class 029 |  99 views | #20070113394 | Prev - Next | About this Page  029 rss/xml feed  monitor keywords

Air socket for testing integrated circuits

USPTO Application #: 20070113394
Title: Air socket for testing integrated circuits
Abstract: An electrical component testing device comprising a housing having at least one recess covered by a flexible membrane so as to form a chamber. A fluid passage extends through a portion of the housing and connects to the chamber thus permitting passage of a fluid material into the chamber. At least one contact member is positioned on the flexible membrane so as to provide an electrical connection to an electrical contact on a device to be tested. (end of abstract)



Agent: Knobbe Martens Olson & Bear LLP - Irvine, CA, US
Inventor: Salman Akram
USPTO Applicaton #: 20070113394 - Class: 029592100 (USPTO)

Related Patent Categories: Metal Working, Method Of Mechanical Manufacture, Electrical Device Making

Air socket for testing integrated circuits description/claims


The Patent Description & Claims data below is from USPTO Patent Application 20070113394, Air socket for testing integrated circuits.

Brief Patent Description - Full Patent Description - Patent Application Claims
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CROSS-REFERENCE TO RELATED CO-PENDING APPLICATION

[0001] This application is a divisional of U.S. patent application Ser. No. 11/435,081, filed May 15, 2006, which is a continuation of U.S. patent application Ser. No. 10/741,100, filed Dec. 19, 2003, now U.S. Pat. No. 7,069,638, issued on Jul. 4, 2006, which is a divisional of U.S. patent application Ser. No. 09/653,111, filed Aug. 31, 2000, entitled "AIR SOCKET FOR TESTING INTEGRATED CIRCUITS," now U.S. Pat. No. 6,690,184, issued Feb. 10, 2004, which are incorporated herein by reference.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] The invention relates to the testing of semiconductor devices. More specifically, the invention relates to a method and apparatus for improving the electrical connections during a testing sequence.

[0004] 2. Description of the Related Art

[0005] Flip-chip and bumped die technology is well known in the art. A flip-chip or bumped die is a semiconductor chip having contact bumps, typically in the form of spherical solder balls or controlled collapse chip connector (C4s) balls, which are electrically connected to the I/O contacts, or contact pads, formed on the active circuit or front side thereof The I/O contacts provide signal, power, and ground contacts for the chip. The contact bumps are used as electrical and mechanical connectors between the contact pads on the flip-chip and a substrate such as a chip carrier, printed circuit board, or other surface mount device. In some cases the bond pads may be located too close to one another to allow the placement of contact bumps directly on each bond pad without unintentionally electrically connecting every contact bump together. One common solution to this problem is to create a Ball Grid Array (BGA) using commonly known passivation and tracing techniques to place the contact bumps away from the bond pads, yet still retain the electrical connection between the contact bumps and the bond pads.

[0006] Another common semiconductor configuration is the board-on-chip (BOC), which comprises a chip permanently attached to a circuit board. In contrast to a flip-chip, the inactive circuit or backside of the chip is attached to the circuit board. The exposed bond pads on the side away from the circuit board are connected to the circuit board with the use of curved wire bonds. A glob top protective resin is subsequently applied over the chip and wire bonds. The contact bumps, which allow further connection to an electrical device or substrate, are then attached directly to the circuit board rather than the chip.

[0007] Several materials are typically used to form the contact bumps on the die or the board, such as, for example, conductive polymers, conductive resins, and solder (e.g. alloys of lead and tin). The specific constituents of solder, if used, are dependent on the desired melting temperature as well as the thermal characteristics of the mating surfaces. When the device is permanently attached, the contact bumps are reflowed to form a solder joint between the flip-chip and the substrate, forming both electrical and mechanical connections between the flip-chip and substrate. Due to the presence of the contact bumps on the flip-chip, a standoff exists between the substrate to which the flip-chip is attached or bonded and the bottom surface of the flip-chip.

[0008] Before the flip-chip is permanently attached to a substrate, it is typically tested to ensure proper performance. The flip-chip is commonly tested by temporarily connecting it to a socket made of a rigid non-conductive material by which multiple contact members are attached. The use of a non-conductive material prevents interference and allows for electrical isolation of each contact bump of the flip-chip. The electrical connection is made by physically laying the flip-chip onto the socket in a manner that lines up the contact bumps of the device with the appropriate contact members of the socket. The contact members of the socket are electrically connected to testing equipment, which provides the flip-chip with the necessary power and input signals to test the functions of the flip-chip.

[0009] A subtle problem often associated with the temporary interconnection of electrical components for testing is that the terminals of an electronic component are not co-planar. With the testing of a chip, the test socket's upper surface is generally flat to allow for the temporary connection between the contact bumps and its contact members. The flip-chip's lower surface, or the board surface in a BOC configuration, is also generally flat. The contact bumps on the flip-chip are not usually a uniform size because of the imprecise solidifying characteristics of the conductive materials used in creating the contact bumps. For example, when the contact bump is originally liquified to attach to the flip-chip or BOC, it may solidify into a slightly different shape than any of the other contact bumps. Accordingly, since the contact bumps may not be of a uniform shape, it may not be possible to temporarily electrically connect each of them to the socket during a test sequence. Nevertheless, the bumps on the flip-chip are not reflowed to achieve a connection to the socket during testing, as this connection is only temporary and would lead to the loss of the contact bumps or at least their significant degradation. Furthermore, the process of reflowing contact bumps requires the addition of thermal energy to the coupled electrical components which can adversely affect not only the integrated circuit contained in the component, but also the test socket. Thus, the inability to achieve an electrical connection between all of the solder bumps and the socket prevents an accurate test from being conducted, and may lead to the discarding of an otherwise usable flip-chip.

[0010] Thus, it will be appreciated that there is a need in the technology for a system for providing a reliable electrical connection between a semiconductor device and a socket in a test environment. The present invention provides an apparatus and method for improving the number of temporary electrical connections between a semiconductor device and a test socket.

SUMMARY OF THE INVENTION

[0011] The invention improves the electrical connections that are made between a flip-chip or BOC and a socket during the testing phase of fabrication. The invention can increase manufacturing efficiency and quality control by enabling the testing of flip-chips or BOCs without regard to whether its contact bumps are co-planar or have varying heights or diameters. Rather than using a solid base upon which to attach the contact members, the invention employs a flexible membrane for their attachment to allow relative motion between the contact members. This relative motion, derived from the resiliency of the flexible membrane, allows the contact members on the flexible membrane to adapt to the height variations of the contact bumps so as to form an electrical connection, and thereby improve the probability of a successful test of the chip. These variations may be on the same chip or between multiple chips. The movement of the flexible membrane is permitted by its attachment to a housing with a recess. The recess is covered by the flexible membrane to form a chamber in the housing. The chamber is filled with a fluid material, herein defined as a liquid or gas, which may form a delta between the chamber pressure and ambient pressure at a steady state (i.e. pressurized), be sealed at ambient pressure at a steady state, or be open to ambient pressure during the test sequence. The contact members are electrically connected by way of electrical contacts to the test equipment to maintain the flexibility of the flexible membrane.

[0012] The fluid material within the chamber will create an upward force upon the lower surface of the flexible membrane. This upward force, which is coupled with the resiliency of the flexible membrane, may help each unconnected contact member rise up towards the appropriate contact bump when the other connected contact members are pushed down toward the chamber. This will occur when the pressure in the chamber is dynamically increased by a reduction in the volume of the chamber caused by the contacting contact members. The fluid will try to equalize the pressure between the chamber and ambient pressure by bulging out in other areas of the flexible membrane. This bulging out helps instigate contact between the unconnected contact members and contact bumps. In this way, all of the contact members are enabled to form electrical connections with the contact bumps on the flip-chip or BOC and to enable the test equipment to perform an accurate test.

BRIEF DESCRIPTION OF THE DRAWINGS

[0013] These and other features and advantages of the invention will become more apparent upon reading the following detailed description and upon reference to the accompanying drawings, in which;

[0014] FIG. 1 is a perspective view of a socket of the invention having pads thereon configured in a conventional manner;

[0015] FIG. 2 is a side elevation view of the socket illustrated in FIG. 1, taken along lines 2-2 of FIG. 1, and illustrating a flip-chip positioned above the socket;

[0016] FIG. 3 is a cross-sectional view of the socket illustrated in FIG. 1, taken along lines 3-3 of FIG. 1, and illustrating a flip-chip positioned above the socket;

[0017] FIG. 4 is a cross-sectional view of the socket illustrated in FIG. 1 taken along lines 3-3 of FIG. 1, and illustrating a flip-chip positioned above the socket as occurs during a testing sequence;

[0018] FIG. 5 is a cross-sectional view of another embodiment of the socket illustrated in FIG. 1, taken along lines 3-3 of FIG. 1, and illustrating a flip-chip positioned above the socket.

[0019] FIG. 6 is a cross-sectional view of another embodiment of the socket illustrated in FIG. 1 taken along lines 3-3 of FIG. 1, and illustrating a flip-chip positioned above the socket as occurs during a testing sequence;

[0020] FIG. 7 is a cross-sectional view of an alternative embodiment of a socket of the invention with a flip-chip located above the socket;

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