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Active solid-state devices (e.g., transistors, solid-state diodes) December patent applications/inventions, industry category 12/13

Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.
  
12/26/2013 > 227 patent applications in 106 patent subcategories. patent applications/inventions, industry category

20130341581 - Device, a method for measuring temperature and a programmable insulator-semiconductor bipolar transistor: A memory device, a programmable insulator-semiconductor bipolar transistor (PISBT) and a method for measuring a temperature of a filament, the method may include: providing base voltages of different values to a base of the PISBT; obtaining measurement results by measuring a minority carrier current that flows from a collector of... Agent:

20130341582 - Nonvolatile memory device, nonvolatile memory device group, and manufacturing method thereof: A nonvolatile memory device group includes: (A) a first insulating layer; (B) a second insulating layer that has a first concavity and a second concavity communicating with the first concavity and having a width larger than that of the first concavity and that is disposed on the first insulating layer;... Agent: Sony Corporation

20130341586 - Memory structures, memory arrays, methods of forming memory structures and methods of forming memory arrays: Some embodiments include methods of forming memory structures. An electrically insulative line is formed over a base. Electrode material is deposited over the line and patterned to form a pair of bottom electrodes along the sidewalls of the line. Programmable material is formed over the bottom electrodes, and a top... Agent: Micron Technology, Inc.

20130341583 - Resistive memory and fabricating method thereof: A resistive memory and a fabricating method thereof are provided. The resistive memory includes first and second electrodes, a variable resistance material layer, a first dielectric layer, and a second dielectric layer. The first electrode includes a first portion and a second portion. The second electrode is disposed opposite to... Agent: Macronix International Co., Ltd.

20130341584 - Resistive-switching memory elements having improved switching characteristics: Resistive-switching memory elements having improved switching characteristics are described, including a memory element having a first electrode and a second electrode, a switching layer between the first electrode and the second electrode comprising hafnium oxide and having a first thickness, and a coupling layer between the switching layer and the... Agent: Intermolecular, Inc.

20130341585 - Variable resistance element and semiconductor storage device: A variable resistance element is formed by sandwiching a metal oxide layer whose resistance changes between a pair of electrodes and the metal oxide layer includes a pair of variable resistance layers whose resistances change by formation of a current path and a branching suppression layer which is sandwiched between... Agent: Nec Corporation

20130341587 - Memory arrays and methods of forming memory cells: Some embodiments include methods of forming memory cells. A stack includes ovonic material over an electrically conductive region. The stack is patterned into rails that extend along a first direction. The rails are patterned into pillars. Electrically conductive lines are formed over the ovonic material. The electrically conductive lines extend... Agent: Micron Technology, Inc.

20130341593 - Group iii nitride based quantum well light emitting device structures with an indium containing capping structure: Group III nitride based light emitting devices and methods of fabricating Group III nitride based light emitting devices are provided. The emitting devices include an n-type Group III nitride layer, a Group III nitride based active region on the n-type Group III nitride layer and comprising at least one quantum... Agent: Cree, Inc.

20130341592 - Light emitting device and method of manufacturing the same: The present invention relates to a light emitting device. The light emitting device comprises a substrate, an N-type semiconductor layer formed on the substrate, and a P-type semiconductor layer formed on the N-type semiconductor layer, wherein a side surface including the N-type or P-type semiconductor layer has a slope of... Agent: Seoul Opto Device Co., Ltd.

20130341589 - Light emitting diode and method for manufacturing the same: A light emitting diode includes a substrate, a first-type semiconductor layer, a nanorod layer and a transparent planar layer. The first-type semiconductor layer is disposed over the substrate. The nanorod layer is formed on the first-type semiconductor layer. The nanorod layer includes a plurality of nanorods and each of the... Agent: Lextar Electronics Corporation

20130341591 - Light emitting diode structure and manufacturing method thereof: The present invention relates to a light emitting diode (LED) structure and a manufacturing method thereof. A first semiconductor stacking layer consisting of a first type semiconductor layer, a light-emitting layer, a second type semiconductor layer and a second type light-guiding layer is sequentially formed on a semiconductor substrate. Partial... Agent: Lextar Electronics Corporation

20130341590 - Quantum dot narrow-band downconverters for high efficiency leds: The present disclosure is directed to LED components, methods and systems using such components, having light emitter devices with emissions tuned to meet CRI and LER goal values at a defined CCT. These emitter devices and methods may use a combination of light emitting diodes and quantum dots to tune... Agent:

20130341588 - Quantum rod light-emitting display device: A quantum rod light-emitting display device according to an embodiment of the invention includes a display panel including a first substrate, a second substrate opposite to the first substrate, and a quantum rod layer disposed between the first substrate and the second substrate, wherein quantum rods in the quantum rod... Agent: Lg Display Co., Ltd.

20130341594 - Single-photon nano-injection detectors: Single-photon detectors, arrays of single-photon detectors, methods of using the single-photon detectors and methods of fabricating the single-photon detectors are provided. The single-photon detectors combine the efficiency of a large absorbing volume with the sensitivity of nanometer-scale carrier injectors, called “nanoinjectors”. The photon detectors are able to achieve single-photon counting... Agent:

20130341595 - Semiconductor devices and methods of manufacturing the same: Semiconductor devices including a substrate (e.g., silicon substrate), a multi-layer structure disposed on a portion of the substrate, and at least one electrode disposed on the multi-layer structure and methods of manufacturing the same are provided. The multi-layer structure may include an active layer containing a Group III-V material and... Agent: Samsung Electronics Co., Ltd.

20130341596 - Nanowire fet and finfet: A complimentary metal oxide semiconductor (CMOS) device includes a wafer having a buried oxide (BOX) layer having a first region with a first thickness and a second region with a second thickness, the first thickness is less than the second thickness, a nanowire field effect transistor (FET) arranged on the... Agent: International Business Machines Corporation

20130341608 - Composite material, light-emitting element, light-emitting device, and manufacturing method thereof: It is an object of the present invention to provide a composite material that can be used for manufacturing a heat-resistant light-emitting element, provide a composite material that can be used for manufacturing a heat-resistant light-emitting element that can be driven with stability for a long period of time, and... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130341604 - Compound having substituted anthracene ring structure and pyridoindole ring structure and organic electroluminescence device: The present invention provides an organic compound having excellent properties, which is excellent in electron-injection/transport performance, has hole-blocking ability and is high stability in a thin-film state, as a material for an organic electroluminescence device having a high efficiency and a high durability, and provides is an organic electroluminescence device... Agent:

20130341603 - Display: Disclosed herein is a display including an acceptor substrate having thereon a red light-emitting element column, a green light-emitting element column, and a blue light-emitting element column that are arranged along a row direction and are each obtained by arranging rectangular organic light-emitting elements for generating light of one of... Agent:

20130341601 - Donor substrates, laser induced thermal imaging methods using donor substrates and methods of manufacturing organic light emitting display devices using donor substrates: A donor substrate includes a base substrate, a light to heat conversion layer, a buffer layer and a transfer layer. The light to heat conversion layer may be disposed on the base substrate. The buffer layer may be disposed on the light to heat conversion layer. The buffer layer may... Agent:

20130341609 - High efficiency yellow light emitters for oled devices: Novel heteroleptic iridium complexes are described. These iridium compounds contain alkyl substituted phenylpyridine ligands, which provide these compounds with beneficial properties when the iridium complexes are incorporated into OLED devices.... Agent: Universal Display Corporation

20130341613 - Light emitting device material and light emitting device: Provided are a light emitting device material which contains a compound having a carbazole skeleton of a specific structure and which makes it possible to achieve a light emitting device having both high luminance efficiency and durability; and a light emitting device using the light emitting device material.... Agent: Toray Industries, Inc.

20130341606 - Light-emitting element, light-emitting device, display device, and electronic apparatus: A light-emitting element includes an anode, a cathode, a luminescent layer disposed between the anode and the cathode and containing a host material, a first luminescence-assisting layer disposed in contact with the luminescent layer between the anode and the luminescent layer and containing a first luminescence-assisting material having characteristics the... Agent:

20130341611 - Methods of applying polymers to surfaces and surfaces coated by polymers: l

20130341602 - Organic electroluminescence device, lighting equipment and display device: The above organic electroluminescence device is constituted from organic layers including at least a light-emitting layer which are interposed between an anode and a cathode, wherein at least one layer of the above organic layers contains a blue phosphorescent organic metal complex having a structure represented by the following Formula... Agent:

20130341612 - Organic electroluminescence element: Provided is an organic EL element having a high emission efficiency, a light emission life, and excellent high-temperature preservation stability. This organic electroluminescence element has at least one light-emitting layer between a positive electrode and a negative electrode. The light-emitting layer comprises at least one type of light-emitting dopant and... Agent: Konica Minolta , Inc.

20130341598 - Organic layer deposition apparatus, method of manufacturing organic light-emitting display apparatus using the same, and organic light-emitting display apparatus manufactured using the method: An organic layer deposition apparatus, a method of manufacturing an organic light-emitting display device by using the same, and an organic light-emitting display device manufactured using the method, and in particular, an organic layer deposition apparatus that is suitable for use in the mass production of a large substrate and... Agent: Samsung Display Co. Ltd.

20130341597 - Organic light emitting diode display: An organic light emitting diode (OLED) display including a display panel, a chip on film, and a printed circuit (PCB) is disclosed. In one embodiment, the display panel includes a display area having an OLED and a pixel circuit, and a pad area in an outer side of the display... Agent: Samsung Display Co., Ltd.

20130341607 - Organic light emitting diode display device and method of fabricating the same: Discussed is a method of fabricating an organic light emitting diode display device capable of simplifying a manufacturing process by forming a photoresist pattern to cover a metal pattern to prevent a hole common layer and an electron common layer from being formed on the metal pattern.... Agent:

20130341614 - Organic light-emitting display device and method of manufacturing the same: An organic light-emitting display device, which may be configured to prevent moisture or oxygen from penetrating the organic light-emitting display device from the outside is disclosed. An organic light-emitting display device, which is easily applied to a large display device and/or may be easily mass produced is further disclosed. Additionally... Agent:

20130341599 - Phosphorescent emitters: Heteroleptic compounds containing phenylpyridine and phenylbenzimidazole are provided. The compounds may be used in organic light emitting devices, particularly as emissive dopants in the emissive layer of such devices.... Agent: Universal Display Corporation

20130341600 - Phosphorescent emitters: t

20130341605 - Substrate for oled and method of manufacturing the same: A substrate for an organic light-emitting device (OLED) and a method of manufacturing the same, in which the light extraction efficiency and process efficiency of the OLED can be improved. The substrate for an OLED that includes a base substrate, a first metal oxide thin film coating one surface of... Agent:

20130341610 - Transparent organic light emitting diode lighting device: Provided is a transparent organic light emitting diode (OLED) lighting device in which opaque metal reflectors are formed to adjust light emitting directions. The transparent OLED lighting device includes a transparent substrate, a transparent anode formed on a predetermined region of the transparent substrate, a reflective anode formed adjacent to... Agent:

20130341616 - Display device and electronic device: An object of the invention is to provide a circuit technique which enables reduction in power consumption and high definition of a display device. A switch controlled by a start signal is provided to a gate electrode of a transistor, which is connected to a gate electrode of a bootstrap... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130341617 - Oxide for semiconductor layer of thin-film transistor, semiconductor layer of thin-film transistor having said oxide, and thin-film transistor: The oxide of the present invention for thin-film transistors is an In—Zn—Sn-based oxide containing In, Zn, and Sn, wherein when the respective contents (atomic %) of metal elements contained in the In—Zn—Sn-based oxide are expressed by [Zn], [Sn], and [In], the In—Zn—Sn-based oxide fulfills the following expressions (2) and (4)... Agent: Kabushiki Kaisha Kobe Seiko Sho (kobe Steel, Ltd.)

20130341615 - Semiconductor device: A semiconductor device with a novel structure in which stored data can be retained even when power is not supplied, and does not have a limitation on the number of write cycles. The semiconductor device includes a memory cell including a first transistor, a second transistor, and an insulating layer... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130341618 - Shift register and display device and driving method thereof: The power consumption of a shift register or a display device including the shift register is reduced. A clock signal is supplied to a shift register by a plurality of wirings, not by one wiring. Any one of the plurality of wirings supplies a clock signal in only part of... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130341619 - Ultraviolet sensor and method for producing the same: An ultraviolet sensor having a p-type semiconductor layer containing, as its main constituent, a solid solution of NiO and ZnO, and an n-type semiconductor layer containing ZnO as its main constituent, which is joined to the p-type semiconductor layer such that a portion of the p-type semiconductor layer is exposed.... Agent: Murata Manufacturing Co., Ltd.

20130341620 - Monitor structures and methods of formation thereof: In accordance with an embodiment of the present invention, a method of forming an electronic device includes forming a first opening and a second opening in a workpiece. The first opening is deeper than the second opening. The method further includes forming a fill material within the first opening to... Agent: Infineon Technologies Ag

20130341621 - Electrical device and method for manufacturing same: An electrical device includes a first layer, a second layer and an intrinsic layer. The first layer is of a first conductivity type, wherein the second layer is of a second conductivity type opposite to the first conductivity type. The intrinsic layer is arranged between the first and the second... Agent: Infineon Technologies Ag

20130341622 - Polycrystalline silicon wafer: Provided is a polycrystalline silicon wafer produced by a melting and unidirectional solidification method, where the polycrystalline silicon wafer has a diameter of 450 mm or more, a thickness of 900 μm or more, and an average crystal grain size of 5 to 50 mm, and is made up of... Agent: Jx Nippon Mining & Metals Corporation

20130341623 - Photoreceptor with improved blocking layer: A photoreceptor includes a multilayer blocking structure to reduce dark discharge of the surface voltage of the photoreceptor resulting from electron injection from an electrically conductive substrate. The multilayer blocking structure includes wide band gap semiconductor layers in alternating sequence with one or more narrow band gap blocking layers. A... Agent: International Business Machines Corporation

20130341625 - Light emitting device, driving method of light emitting device and electronic device: By controlling the luminance of light emitting element not by means of a voltage to be impressed to the TFT but by means of controlling a current that flows to the TFT in a signal line drive circuit, the current that flows to the light emitting element is held to... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130341624 - Thin film transistor substrate having metal oxide semiconductor and method for manufacturing the same: The present disclosure relates to a thin film transistor substrate with a metal oxide semiconductor layer that has enhanced characteristics and stability. The present disclosure also relates to a method for manufacturing a thin film transistor substrate in which a thermal treatment is conducted for the metal oxide semiconductor layer... Agent: Lg Display Co., Ltd.

20130341627 - Display device: The invention provides an active matrix EL display device which can perform a clear multi-gray scale color display. In particular, the invention provides a large active matrix EL display device at low cost by a manufacturing method which can selectively form a pattern. Power supply lines in a pixel portion... Agent: Semiconductor Energy Laboratory Co., Ltd

20130341628 - Display device, electro-optical element driving method and electronic equipment: The present invention permits a capacitance value of an electro-optical element such as organic EL element to be arbitrarily set without changing the light extraction efficiency of a pixel. That is, the present invention permits a capacitance value Coled of an organic EL element (21) to be arbitrarily set by... Agent: Sony Corporation

20130341629 - Flexible display and method of manufacturing the same: A substrate for a flexible display is disclosed. The substrate has a film stress range that does not affect an electronic device such as a thin film transistor, and includes a barrier layer having excellent oxygen and moisture blocking characteristics, and a method of manufacturing the substrate. The substrate includes:... Agent: Samsung Display Co., Ltd.

20130341630 - Light-emitting device and method for manufacturing the same: The present invention provides a display device and a manufacturing method thereof that can simplify manufacturing steps and enhance efficiency in the use of materials, and further, a manufacturing method that can enhance adhesiveness of a pattern. One feature of the invention is that at least one or more patterns... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130341626 - Semiconductor device and method of manufacturing the same: An object of the present invention is to provide a semiconductor device having high operation characteristic and reliability. The measures taken are: A pixel capacitor is formed between an electrode comprising anodic capable material over an organic resin film, an anodic oxide film of the electrode and a pixel electrode... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130341631 - Semiconductor device having embedded strain-inducing pattern and method of forming the same: A semiconductor device can include an active region having a fin portion providing a channel region between opposing source and drain regions. A gate electrode can cross over the channel region between the opposing source and drain regions and first and second strain inducing structures can be on opposing sides... Agent:

20130341637 - Carbodiimide phosphors: s

20130341632 - Current aperture diode and method of fabricating same: A diode and a method of making same has a cathode an anode and one or more semiconductor layers disposed between the cathode and the anode. A dielectric layer is disposed between at least one of the one or more semiconductor layers and at least one of the cathode or... Agent: Hrl Laboratories, LLC

20130341635 - Double aluminum nitride spacers for nitride high electron-mobility transistors: An epitaxial structure and a high electron mobility transistor (HEMT) employing the epitaxial structure includes a first spacer layer over a channel layer, a first barrier layer over the first spacer layer, and a second spacer layer over the first barrier layer.... Agent:

20130341636 - Group iii nitride semiconductor light-emitting device and production method therefor: The present invention provides a Group III nitride semiconductor light-emitting device exhibiting improved light extraction efficiency. An AlGaN semiconductor layer is formed in contact with and on a p-GaN p-contact layer, and an ITO transparent electrode is formed in contact with and on the semiconductor layer. The semiconductor layer comprises... Agent:

20130341634 - Light emitting diode dielectric mirror: A high efficiency LED chip is disclosed that comprises an active LED structure comprising an active layer between two oppositely doped layers. A first reflective layer can be provided adjacent to one of the oppositely doped layers, with the first layer comprising a material with a different index of refraction... Agent: Cree, Inc.

20130341633 - Semiconductor device: Provided is a semiconductor device comprising: a GaN crystal substrate defining a principal, (0001) Ga face and defining a matrix, being a majority, polarity-determining domain of the GaN crystal, and inversion domains, being domains in which the polarity in the GaN crystal's [0001] direction is inverted with respect to the... Agent: Sumitomo Electric Industries, Ltd.

20130341639 - Deep depleted channel mosfet with minimized dopant fluctuation and diffusion levels: CMOS devices are fabricated with a channel layer having minimized dopant fluctuation and diffusion. Embodiments include forming a dummy gate, on a substrate, between a pair of spacers, forming, in the substrate, a source and drain separated by a ground plane layer, removing the dummy gate from the substrate, forming... Agent: Globalfoundries Singapore Pte. Ltd.

20130341644 - Method and design of an rf thru-via interconnect: In summary, a vertical metalized transition in the form of a via goes from the back side of a high thermal conductivity substrate and through any semiconductor layers thereon to a patterned metalized strip, with the substrate having a patterned metalized layer on the back side that is provided with... Agent: Bae Systems Information And Electronic Systems Integration Inc.

20130341649 - Method for making a semiconductor structure with a buried ground plane:

20130341648 - Method for manufacturing silicon carbide semiconductor device and silicon carbide semiconductor device: A first layer of a first conductivity type made of silicon carbide is formed. A second layer of a second conductivity type different from the first conductivity type positioned on the first layer, and a third layer of the first conductivity type positioned on the second layer are formed. The... Agent: Sumitomo Electric Industries, Ltd.

20130341642 - Mos transistor, fabrication method thereof, and sram memory cell circuit: Various embodiments provide an MOS transistor, a formation method thereof, and an SRAM memory cell circuit. An exemplary MOS transistor can include a channel region including an asymmetric stressing layer having a stress gradually varied from a compressive stress to a tensile stress or from a tensile stress to a... Agent: Semiconductor Manufacturing International Corp.

20130341638 - Multi-gate field-effect transistor and process thereof: A Multi-Gate Field-Effect Transistor includes a fin-shaped structure, a gate structure, at least an epitaxial structure and a gradient cap layer. The fin-shaped structure is located on a substrate. The gate structure is disposed across a part of the fin-shaped structure and the substrate. The epitaxial structure is located on... Agent:

20130341641 - Rectifier circuit: A rectifier circuit has a rectifier element and a unipolar field-effect transistor connected in series between a first terminal and a second terminal. The rectifier element comprises a first electrode and a second electrode disposed in a direction of a forward current flowing from the first terminal to the second... Agent: Kabushiki Kaisha Toshiba

20130341640 - Semiconductor device and method for manufacturing same: According to an embodiment, a semiconductor device includes a semiconductor, a source electrode, a drain electrode, an insulating layer and a gate electrode. The semiconductor layer includes an GaN layer and a AlGaN layer provided on the GaN layer. The source electrode and the drain electrode are provided on the... Agent:

20130341643 - Semiconductor device and method of manufacturing the device: A first first-conductivity-type impurity region (4) is provided in an upper portion of a semiconductor layer (102) around a trench (12). A gate electrode (8) is provided on a sidewall surface of the trench (12), and on the semiconductor layer (102) around the trench (12) with a gate insulating film... Agent: Panasonic Corporation

20130341645 - Silicon carbide semiconductor device: A collector layer is made of silicon carbide having a first conductivity type. A switching element is provided on the collector layer. The switching element includes a junction gate for controlling a channel having a second conductivity type different from the first conductivity type.... Agent: Sumitomo Electric Industries, Ltd.

20130341647 - Silicon carbide semiconductor device: A silicon carbide semiconductor device includes a silicon carbide substrate, and a contact electrode. The silicon carbide substrate includes an n type region and a p type region in contact with the n type region. The contact electrode forms contact with the silicon carbide substrate. The contact electrode includes a... Agent: Sumitomo Electric Industries, Ltd.

20130341646 - Silicon carbide semiconductor device and method for manufacturing same: A silicon carbide semiconductor device includes a silicon carbide substrate and a contact electrode. The silicon carbide substrate includes an n type region and a p type region that makes contact with the n type region. The contact electrode makes contact with the n type region and the p type... Agent:

20130341650 - Photosensor chip package structure: A photosensor chip package structure comprises a substrate, a light-emitting chip and a photosensor chip including an ambient light sensing unit and a proximity sensing unit. The substrate has a first basin, a second basin and a light-guiding channel. The openings of the first and second basins respectively face different... Agent:

20130341651 - Sensor substrate and sensing display panel having the same: A sensor substrate includes a base substrate, a black matrix pattern, a sensing electrode pattern, a driving electrode pattern, and at least one bridge line. The black matrix pattern is disposed on the base substrate and divides the base substrate into a light transmission area and a light blocking area.... Agent: Samsung Display Co., Ltd.

20130341654 - Light emitting device package and light unit having the same: Disclosed is an LED package. The LED package includes a package body, a first frame and a second frame on the package body and a light emitting device chip on the first frame. The first frame is separated from the second frame, and the first frame includes a bottom frame... Agent: Lg Innotek Co., Ltd.

20130341652 - Light emitting diode package and method for manufacturing the same: An exemplary light-emitting diode (LED) package includes a first electrode, a second electrode spaced from the first electrode, an electrically insulating substrate sandwiched by and connecting with the first electrode and the second electrode, a first LED chip and a second LED chip mounted on top surfaces of the first... Agent:

20130341655 - Method for producing an electrical terminal support: The invention relates to a method for producing an electrical terminal support for an optoelectronic semiconductor body, comprising the following steps: providing a carrier assembly (1), which comprises a carrier body (11), an intermediate layer (12) arranged on an outer surface (111) of the carrier body (11), and a use... Agent: Osram Opto Semiconductors Gmbh

20130341656 - Miniature surface mount device: A surface mount LED package includes a lead frame carrying a plurality of LEDs and a plastic casing at least partially encasing the lead frame. The lead frame includes an electrically conductive chip carrier and first, second, and third electrically conductive connection parts separate from the electrically conductive chip carrier.... Agent: Cree, Inc.

20130341653 - Solid state lighting component: An LED component comprising an array of LED chips mounted on a planar surface of a submount with the LED chips capable of emitting light in response to an electrical signal. The LED chips comprise respective groups emitting at different colors of light, with each of the groups interconnected in... Agent: Cree, Inc.

20130341657 - Light-emitting module and luminaire: A light-emitting module includes a substrate in an embodiment. The light-emitting module includes a first light-emitting element mounted on the substrate through a first connecting structure in an embodiment. The light-emitting module includes a second light-emitting element having a light-emitting efficiency that is more sensitive to a change in temperature... Agent: Toshiba Lighting & Technology Corporation

20130341659 - Display panel: A display panel including a substrate, a meshed shielding pattern, and a plurality of light-emitting devices is provided. The meshed shielding pattern is disposed on the substrate so as to define a plurality of pixel regions on the substrate. The light-emitting devices are disposed on the substrate. At least one... Agent: Industrial Technology Research Institute

20130341658 - Light-emitting device having dielectric reflector and method of manufacturing the same: A light-emitting device includes a first conductive semiconductor layer formed on a substrate, a mask layer formed on the first conductive semiconductor layer and having a plurality of holes, a plurality of vertical light-emitting structures vertically grown on the first conductive semiconductor layer through the plurality of holes, a current... Agent: Samsung Electronics Co., Ltd.

20130341665 - Led (light-emitting diode) luminous source module: A polymeric optical lens for a light-emitting diode (LED) light source module, and in particular an LED light source module comprising this polymeric optical lens, and an LED lamp comprising this module. More particularly, an optical lens for a light-emitting diode (LED) light source module comprising a polymer selected from... Agent: Solvay Acetow Gmbh

20130341660 - Led module: An exemplary LED module includes an LED and a lens covering the LED. The lens includes a light-guiding portion over the LED and retaining portions protruding downwardly from the light-guiding portion. The LED includes a substrate, a first electrode and a second electrode mounted on the substrate, and an LED... Agent: Advanced Optoelectronic Technology, Inc.

20130341663 - Led with surface roughening: An LED having a p-type layer of material with an associated p-contact, an n-type layer of material with an associated n-contact and an active region between the p-type layer and the n-type layer, includes a roughened emitting-side surface to further enhance light extraction.... Agent: Cree, Inc.

20130341667 - Light-emitting device: A light-emitting device includes a semiconductor light-emitting stack; a current injected portion formed on the semiconductor light-emitting stack; an extension portion having a first branch radiating from the current injected portion and a second branch extending from the first branch; an electrical contact structure between the second branch and the... Agent: Epistar Corporation

20130341668 - Optical semiconductor device and manufacturing method therefor: A manufacturing method for an optical semiconductor device, including disposing a semiconductor element that has a polarization dependent gain or polarization dependent loss between optical waveguide modes differing in the direction of polarization, positioning a lens at one end face side of the semiconductor element based on an optical coupling... Agent: Fujitsu Limited

20130341669 - Phosphor placement in white light emitting diode assemblies: A white LED assembly includes a blue LED die attached to a substrate. A first volume of a first luminescent material surrounds the blue LED die in a lateral dimension such that none of the first luminescent material is disposed directly over the blue LED die. The first luminescent material... Agent: Bridgelux, Inc.

20130341666 - Semiconductor light emitting device: A semiconductor light emitting device includes: a package which is made of a resin and includes a recess; a lead frame exposed to a bottom of the recess; a semiconductor light emitting element connected to the lead frame in the recess; a phosphor layer over the bottom of the recess;... Agent: Panasonic Corporation

20130341661 - Semiconductor light emitting element: A semiconductor light emitting element comprising a light-reflecting layer formed on a support substrate, the light-reflecting layer having light reflectivity and including a bank portion having a particular plane pattern, a first electrode formed on the light-reflecting layer so as to surround the bank portion of the light-reflecting layer, the... Agent:

20130341664 - Silicate phosphors: The invention relates to compounds of the general formula (I) EA2-xEuxSiO4.aM2B4O7 (I) where EA stands for two or more elements selected from Ca, Sr, Zn and Ba, M stands for Li, Na or K, and a stands for a value from the range 0.01≦a≦0.08, and x stands for a value... Agent: Merck Patent Gmbh

20130341662 - Yellow-green to yellow-emitting phosphors based on halogenated-aluminates: Disclosed herein are yellow-green and yellow-emitting aluminate based phosphors for use in white LEDs, general lighting, and LED and backlighting displays. In one embodiment of the present invention, the cerium-activated, yellow-green to yellow-emitting aluminate phosphor comprises the rare earth lutetium, at least one alkaline earth metal, aluminum, oxygen, at least... Agent: Intematix Corporation

20130341670 - Light source module: The light source module includes a circuit board adapted to be placed on a mounting base of a light source holding member, and a power feeding attachment to supply power to a semiconductor light emitting device, the circuit board including a board part on which the semiconductor light emitting device... Agent: Koito Manufacturing Co., Ltd.

20130341671 - Silicone resin composition, semi-cured material sheet, producing method of silicone cured material, light emitting diode device, and producing method thereof: A silicone resin composition contains a polysiloxane containing at least one pair of condensable substituted groups capable of condensation by heating and at least one pair of addable substituted groups capable of addition by an active energy ray.... Agent:

20130341672 - Iii nitride crystal substrate and light-emitting device: Toward making available III nitride crystal substrates advantageously employed in light-emitting devices, and light-emitting devices incorporating the substrates, a III nitride crystal substrate has a major face whose surface area is not less than 10 cm2 and is characterized by: edge dislocations in the crystal being concentrated along propagation lines... Agent: Sumitomo Electric Industries, Ltd.

20130341673 - Reverse conducting igbt: A semiconductor device includes a first emitter region of a first conductivity type, a second emitter region of a second conductivity type complementary to the first conductivity type, and a drift region of the second conductivity type arranged in a semiconductor body. The first and second emitter regions are arranged... Agent: Infineon Technologies Ag

20130341674 - Reverse conducting igbt: A semiconductor device includes a first emitter region of a first conductivity type, a second emitter region of a second conductivity type complementary to the first type, a drift region of the second conductivity type, and a first electrode. The first and second emitter regions are arranged between the drift... Agent: Infineon Technologies Ag

20130341675 - Latch-up free esd protection: An ESD module having a first portion (FP) and a second portion (SP) in a substrate is presented. The FP includes a FP well of a second polarity type and first and second FP contact regions. The first FP contact region is of a first polarity type and the second... Agent: Globalfoundries Singapore Pte. Ltd.

20130341676 - Methods and apparatus for increased holding voltage in silicon controlled rectifiers for esd protection: Methods and apparatus for increased holding voltage SCRs. A semiconductor device includes a semiconductor substrate of a first conductivity type; a first well of the first conductivity type; a second well of a second conductivity type adjacent to the first well, an intersection of the first well and the second... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130341680 - Field effect transistor: A field effect transistor includes a stacked body, a source electrode, a drain electrode, a gate electrode, a dielectric layer and a silicon nitride layer. The stacked layer has a heterojunction made of a nitride semiconductor. The source and drain electrodes are provided on a surface of the stacked body.... Agent:

20130341677 - Gan vertical superjunction device structures and fabrication methods: A semiconductor device includes a III-nitride substrate of a first conductivity type, a first III-nitride epitaxial layer of the first conductivity type coupled to the III-nitride substrate, and a first III-nitride epitaxial structure coupled to a first portion of a surface of the first III-nitride epitaxial layer. The first III-nitride... Agent: Avogy, Inc.

20130341678 - Semiconductor device with selectively etched surface passivation: A semiconductor device includes a semiconductor substrate configured to include a channel, a gate supported by the semiconductor substrate to control current flow through the channel, a first dielectric layer supported by the semiconductor substrate and including an opening in which the gate is disposed, and a second dielectric layer... Agent: Freescale Semiconductor, Inc.

20130341679 - Semiconductor device with selectively etched surface passivation: A semiconductor device includes a semiconductor substrate configured to include a channel, first and second ohmic contacts supported by the semiconductor substrate, in ohmic contact with the semiconductor substrate, and spaced from one another for current flow between the first and second ohmic contacts through the channel, and first and... Agent: Freescale Semiconductor, Inc.

20130341681 - Heterojunction bipolar transistor with improved current gain and a fabrication method thereof: A heterojunction bipolar transistor (HBT) with improved current gain and the fabrication method thereof, in which the HBT comprises a substrate, a p-type buffer layer, a sub-collector layer, a collector layer, a base layer, an emitter layer, an emitter cap layer, and an emitter contact layer. Multiple etching processes are... Agent:

20130341682 - Nitride semiconductor device: A nitride semiconductor device includes a semiconductor substrate and a nitride semiconductor layer disposed on the semiconductor substrate. The semiconductor substrate includes a normal region, a carrier supplying region, and an interface current blocking region. The interface current blocking region surrounds the normal region and the carrier supplying region. The... Agent: Panasonic Corporation

20130341683 - Solid-state imaging device and camera: A solid-state imaging device includes a photoelectric conversion unit that has a charge accumulation region and is configured to accumulate a charge that is generated in accordance with incident light in the charge accumulation region, and a transfer unit configured to transfer the charge accumulated in the charge accumulation region... Agent:

20130341684 - Solid-state image pickup element, method of manufacturing the same, and electronic apparatus: A solid-state imaging device, including a semiconductor substrate; a photoelectric conversion region in the semiconductor substrate that generates charges in response to light incident thereon; an electric charge holding region in the semiconductor substrate and capable of holding electric charges accumulated in the photoelectric conversion region until the electric charges... Agent: Sony Corporation

20130341687 - Metal silicide layer, nmos transistor, and fabrication method: Exemplary embodiments provide materials and methods for forming a metal silicide layer and/or an NMOS transistor. The metal silicide layer can be formed by heating a metal layer containing at least a tellurium element on a semiconductor substrate. The metal silicide layer can thus contain at least the tellurium element... Agent:

20130341689 - Method of forming a self-aligned charge balanced power dmos: Self-aligned charge balanced semiconductor devices and methods for forming such devices are disclosed. One or more planar gates are formed over a semiconductor substrate of a first conductivity type. One or more deep trenches are etched in the semiconductor self-aligned to the planar gates. The trenches are filled with a... Agent: Alpha & Omega Semiconductor Incorporated

20130341685 - Semiconductor device and manufacturing method thereof: A manufacturing method for a semiconductor device includes providing a substrate having at least a gate structure formed thereon and a first spacer formed on sidewalls of the gate structure, performing an ion implantation to implant dopants into the substrate, forming a disposal spacer having at least a carbon-containing layer... Agent:

20130341688 - Semiconductor device and method for fabricating semiconductor device: Disclosed is a semiconductor device and a method for fabricating the semiconductor device. The method for fabricating the semiconductor device comprises steps of: forming a side cliff in a substrate in accordance with a gate mask pattern, the side cliff being substantially vertical to a substrate surface; forming a dielectric... Agent:

20130341686 - Semiconductor devices, transistors, and methods of manufacture thereof: Semiconductor devices, transistors, and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes a gate dielectric disposed over a workpiece, a gate disposed over the gate dielectric, and a spacer disposed over sidewalls of the gate and the gate dielectric. A source region is disposed proximate... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130341690 - Ultra-violet light sensing device and manufacturing method thereof: The present invention provides an ultra-violet light sensing device. The ultra-violet light sensing device includes a first conductivity type substrate, a second conductivity type region, and a first conductivity type high density region. The first conductivity type substrate includes a light incident surface. The second conductivity type region is disposed... Agent: Pixart Imaging Incorporation, R.o.c.

20130341691 - Photoelectric conversion device and fabrication method therefor: A photoelectric conversion device comprises a high-refractive-index portion at a position close to a photoelectric conversion element therein. And, the high-refractive-index portion has first and second horizontal cross-section surfaces. The first cross-section surface is at a position closer to the photoelectric conversion element rather than the second cross-section surface, and... Agent: Canon Kabushiki Kaisha

20130341692 - Novel [n] profile in si-ox interface for cmos image sensor performance improvement: A semiconductor device including first and second isolation regions supported by a substrate, a first array well supported by the first isolation region, the first array well having a first field implant layer embedded therein, the first field implant layer surrounding a first shallow trench isolation region, a second array... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130341693 - Semiconductor device: Provided is a semiconductor device having good properties. Particularly, the semiconductor device is provided which can improve imaging properties. The semiconductor device (CMOS image sensor) includes a plurality of pixels, each having a photodiode PD for generating a charge by receiving light, and a transfer transistor TX for transferring the... Agent:

20130341694 - Photoelectric converter: A photoelectric converter according to the present invention includes a substrate, a lower electrode layer arranged on the substrate, a compound semiconductor layer of a chalcopyrite structure arranged on the lower electrode layer to cover the lower electrode layer and partitioned into a plurality of pixels, a transparent electrode layer... Agent: Rohm Co., Ltd.

20130341695 - Manufacturing process for zero-capacitor random access memory circuits: Embodiments of a manufacturing process flow for producing standalone memory devices that can achieve bit cell sizes on the order of 4F2 or 5F2, and that can be applied to common source/drain, separate source/drain, or common source only or common drain only transistor arrays. Active area and word line patterns... Agent: Micron Technology, Inc.

20130341696 - Metal-oxide-semiconductor (mos) transistor structure integrated with a resistance random access memory (rram) and the manufacturing methods thereof: The present invention belongs to the technical field of semiconductor memories, in particular to a metal oxide semiconductor (MOS) transistor structure integrated with a resistance random access memory (RRAM). The MOS transistor structure comprises a MOS transistor and a RRAM formed on a substrate, wherein a gate dielectric layer of... Agent: Fudan University

20130341697 - Tunnel transistor structure integrated with a resistance random access memory (rram) and a manufacturing method thereof: The invention relates to the technical field of semiconductor memories, in particular to a tunnel transistor structure integrated with a resistance random access memory and a manufacturing method thereof. The tunnel transistor structure in the present invention comprises a semiconductor substrate, and a tunnel transistor and a resistance random access... Agent: Fudan University

20130341698 - Nonvolatile semiconductor memory device and method of manufacturing: According to one embodiment, a nonvolatile semiconductor memory device includes a first insulating layer on a semiconductor layer, a charge storage layer on the first insulating layer, a second insulating layer on the charge storage layer, and a control gate electrode on the second insulating layer. The charge storage layer... Agent: Kabushiki Kaisha Toshiba

20130341699 - Nonvolatile semiconductor memory device and method of manufacturing the same: According to one embodiment, a nonvolatile semiconductor memory device includes a first insulating layer on a semiconductor layer, a charge storage layer on the first insulating layer, a second insulating layer on the charge storage layer, and a control gate electrode on the second insulating layer. The charge storage layer... Agent: Kabushiki Kaisha Toshiba

20130341700 - P-type control gate in non-volatile storage: Non-voltage storage and techniques for fabricating non-volatile storage are disclosed. In some embodiments, at least a portion of the control gates of non-volatile storage elements are formed from p-type polysilicon. In one embodiment, a lower portion of the control gate is p-type polysilicon. The upper portion of the control gate... Agent: Sandisk Technologies Inc.

20130341702 - Vertical memory device and method for making thereof: Described herein is a method for forming a vertical memory device (150) having a vertical channel region (113) sandwiched between a source region (109, 112) and a drain region (114). A charge trapping layer (106) is provided either side of the vertical channel region (113) and associated source and drain... Agent: Imec

20130341701 - Vertical semiconductor memory device and manufacturing method thereof: Disclosed are vertical semiconductor devices and methods of manufacturing vertical semiconductor devices. An example method includes providing a semiconductor substrate, and forming a stack of horizontal layers on the semiconductor substrate, where the horizontal layers are substantially parallel to a surface of the semiconductor substrate, and the horizontal layers comprise... Agent: Imec

20130341703 - Semiconductor memory device and method for manufacturing the same: According to one embodiment, the electrode films are provided on the substrate. The first insulating films are provided between the electrode films. The second insulating film is provided on an uppermost electrode film of the electrode films. The select gate is provided on the second insulating film. The channel body... Agent:

20130341704 - Variable gate width for gate all-around transistors: Nanowire-based gate all-around transistor devices having one or more active nanowires and one or more inactive nanowires are described herein. Methods to fabricate such devices are also described. One or more embodiments of the present invention are directed at approaches for varying the gate width of a transistor structure comprising... Agent:

20130341705 - Schottky diode integrated into ldmos: In an LDMOS device leakage and forward conduction parameters are adjusted by integrating an Schottky diode into the LDMOS by substituting one or more n+ source regions with Schottky diodes.... Agent: Texas Instruments Incorporated

20130341707 - Semiconductor device: A semiconductor device includes a first pillar, a second pillar underneath the first pillar, and a third pillar on a top of the first pillar. The second pillar has a second-conductive type region in a surface thereof except at least a part of a contact surface region with the first... Agent:

20130341706 - Semiconductor memory device and manufacturing method of the same: According to one embodiment, a semiconductor memory device includes a semiconductor laminated film comprising an embedded insulating film, and an SOI layer laminated on a semiconductor substrate. On the embedded insulating film, multiple pillar-shaped gate electrodes embedded in the SOI layer are provided. On the SOI layer, a pillar-shaped gate... Agent: Kabushiki Kaisha Toshiba

20130341710 - Method of fabricating semiconductor device: A method of fabricating a semiconductor device includes forming a first preliminary gate barrier layer and a first preliminary gate electrode recessed to have a first depth from the surface of the substrate within a gate trench, removing an upper portion of the first preliminary gate electrode by means of... Agent: Samsung Electronics Co., Ltd.

20130341711 - Semiconductor device: A technique for improving the characteristics of a semiconductor device (UMOSFET) is provided. In the UMOSFET in order to grow an epitaxial growth film on a trench side wall with an even film thickness, a channel is arranged in an optimum direction as a growth surface. For example, a trench... Agent:

20130341708 - Semiconductor device and method of manufacturing the semiconductor device: A low concentration P-type impurity (LCPI) layer situated over a drain layer has an impurity concentration lower than the drain layer. An N-type impurity base layer is situated over the LCPI layer. A gate insulating film is formed on the lateral side of a trench. A bottom insulation film formed... Agent: Renesas Electronics Corporation

20130341709 - Semiconductor device with electrode including intervention film: In a semiconductor device including a semiconductor substrate, a trench formed on the semiconductor substrate, an insulating film formed on a side wall of the trench, and an electrode formed on the insulating film. The electrode includes a first film made of first metal nitride, an intervention film made of... Agent:

20130341712 - Trench shielding structure for semiconductor device and method: A shielding structure for a semiconductor device includes a plurality of trenches. The trenches include passivation liners and shield electrodes, which are formed therein. In one embodiment, the shielding structure is placed beneath a control pad. In another embodiment, the shielding structure is placed beneath a control runner.... Agent: Semiconductor Components Industries, LLC

20130341714 - Semiconductor device having power metal-oxide-semiconductor transistor: A semiconductor device includes a power metal-oxide-semiconductor (MOS) transistor including a semiconductor substrate, an impurity region on the semiconductor substrate, the impurity region having a first conductivity, a drift region in the impurity region, the drift region having the first conductivity, a body region in the impurity region adjacent to... Agent:

20130341713 - Semiconductor devices and methods for manufacturing the same: Semiconductor devices and methods for manufacturing the same are disclosed. In one embodiment, a method includes forming a first shielding layer on a substrate. The method further includes forming one of source and drain regions, which is stressed, with the first shielding layer as a mask. The method further includes... Agent:

20130341715 - Power transistor and associated method for manufacturing: The present disclosure discloses a lateral transistor and associated method for making the same. The lateral transistor comprises a gate formed over a first portion of a thin gate dielectric layer, and a field plate formed over a thick field dielectric layer and extending atop a second portion of the... Agent: Monolithic Power Systems, Inc.

20130341716 - Semiconductor device and method for manufacturing semiconductor device: There are provided a semiconductor device having a drain region making a BLDD structure withstandable against a high voltage, sufficiently suppressing a hot-carrier deterioration, and having a high ESD withstandable characteristic, and a method for manufacturing the same. A semiconductor device is formed including a MOS transistor having a source... Agent: Asahi Kasei Microdevices Corporation

20130341717 - Semiconductor device with floating resurf region: A device includes a semiconductor substrate, a body region in the semiconductor substrate, having a first conductivity type, and including a channel region through which charge carriers flow, a drain region in the semiconductor substrate, having a second conductivity type, and spaced from the body region along a first lateral... Agent: Freescale Semiconductor, Inc.

20130341718 - Power semiconductor device: In one general aspect, a power semiconductor device can include a semiconductor substrate of a first conductivity type, and a semiconductor layer of a second conductivity type disposed on the semiconductor substrate. The semiconductor layer can include a high voltage unit, a low voltage unit disposed around the high voltage... Agent:

20130341719 - Hybrid high voltage device and manufacturing method thereof: The present invention discloses a hybrid high voltage device and a manufacturing method thereof. The hybrid high voltage device is formed in a first conductive type substrate, and includes at least one lateral double diffused metal oxide semiconductor (LDMOS) device region and at least one vent device region, wherein the... Agent: Richtek Technology Corporation, R.o.c.

20130341720 - Implementing gate within a gate utilizing replacement metal gate process: A method and circuit for implementing field effect transistors (FETs) having a gate within a gate utilizing a replacement metal gate process (RMGP), and a design structure on which the subject circuit resides are provided. A field effect transistor utilizing a RMGP includes a sacrificial gate in a generally central... Agent: International Business Machines Corporation

20130341721 - Semiconductor wafer, field-effect transistor, method of producing semiconductor wafer, and method of producing field-effect transistor: Provided is a semiconductor wafer including a base wafer, a first insulating layer, and a semiconductor layer. Here, the base wafer, the first insulating layer and the semiconductor layer are arranged in an order of the base wafer, the first insulating layer and the semiconductor layer, the first insulating layer... Agent: The University Of Tokyo

20130341722 - Ultrathin body fully depleted silicon-on-insulator integrated circuits and methods for fabricating same: Integrated circuits and methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes providing an ultrathin body (UTB) fully depleted silicon-on-insulator (FDSOI) substrate. A PFET temporary gate structure and an NFET temporary gate structure are formed on the substrate. The method implants... Agent: Globalfoundries Inc.

20130341724 - Finfet with body contact: A semiconductor device has a FinFET with at least two independently controllable FETs on a single fin. The fin may have a body area with a width between two vertical sides, each side has a single FET. The fin also may have a top fin area that is wider than... Agent: International Business Machines Corporation

20130341723 - Memory cell with asymmetric read port transistors: A memory cell includes a storage element and a read port. The read port includes a first transistor having a first gate coupled to the storage element, a first source region, and a first drain region. The second transistor includes a second gate, a second source region coupled to the... Agent: Globalfoundries Inc.

20130341725 - Semiconductor constructions: Some embodiments include DRAM having transistor gates extending partially over SOI, and methods of forming such DRAM. Unit cells of the DRAM may be within active region pedestals, and in some embodiments the unit cells may comprise capacitors having storage nodes in direct contact with sidewalls of the active region... Agent: Micron Technology, Inc.

20130341726 - Mos transistor, formation method thereof, and sram memory cell circuit: Various embodiments provide an MOS transistor, a formation method thereof, and an SRAM memory cell circuit. An exemplary MOS transistor can include a semiconductor substrate including a first groove on one side of a gate structure and a second groove on the other side of the gate structure. The first... Agent: Semiconductor Manufacturing International Corp.

20130341728 - Semiconductor device: The present invention has for its purpose to provide a technique capable of reducing planar dimension of the semiconductor device. An input/output circuit is formed over the semiconductor substrate, a grounding wiring and a power supply wiring pass over the input/output circuit, and a conductive layer for a bonding pad... Agent: Renesas Electronics Corporation

20130341727 - Semiconductor device and manufcturing method of the same: Disclosed is a semiconductor device including a first MISFET of an n channel type and a second MISFET of a p channel type, each of the MISFETs being configured with a gate insulating film featuring a silicon oxide film or a silicon oxynitride film and a gate electrode including a... Agent: Renesas Electronics Corporation

20130341729 - Semiconductor device, method for manufacturing same, and nonvolatile semiconductor memory device: Provided is a semiconductor element having, while maintaining the same integratability as a conventional MOSFET, excellent switch characteristics compared with the MOSFET, that is, having the S-value less than 60 mV/order at room temperature. Combining the MOSFET and a tunnel bipolar transistor having a tunnel junction configures a semiconductor element... Agent:

20130341730 - Semiconductor devices and structures: Devices, semiconductor structures and methods are provided, where a substrate is around a semiconductor device is biased via a resistive element.... Agent: Infineon Technologies Ag

20130341731 - Substrate resistor and method of making same: A semiconductor structure can include a resistor on a substrate formed simultaneously with other devices, such as transistors. A diffusion barrier layer formed on a substrate is patterned to form a resistor and barrier layers under a transistor gate. A filler material, a first connector, and a second connector are... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130341732 - Semiconductor device having silicide on gate sidewalls in isolation regions: Provided are a semiconductor device and a method of fabricating the same. According to the semiconductor device, a silicide layer is formed on at least a part of both sidewalls of a gate pattern on a device isolation layer, thereby reducing resistance of the gate pattern. This makes an operation... Agent:

20130341733 - Plural differential pair employing finfet structure: A plural differential pair may include a first semiconductor fin having first and second drain areas. First and second body areas may be disposed on the fin between the first and second drain areas. A source area may be disposed on the fin between the first and second body areas.... Agent: International Business Machines Corporation

20130341734 - Integrated circuit with sensors and manufacturing method: Disclosed is an integrated circuit comprising a substrate (10) carrying plurality of circuit elements (20); a plurality of sensing electrodes (34) over said substrate, each sensing electrode being electrically connected to at least one of said circuit elements; and a plurality of wells (50) for receiving a sample, each sensing... Agent:

20130341735 - Anodically bonded strain isolator: A stress isolator that allows a sensor to be attached to materials of the same coefficient of thermal expansion and still provide the required elastic isolation between the sensor and the system to which it is mounted. The isolator is made of two materials, borosilicate glass and silicon. The glass... Agent: Honeywell International Inc.

20130341738 - Method for manufacturing a component having an electrical through-connection: A method for manufacturing a component having an electrical through-connection includes: providing a semiconductor substrate having a front side and a back side opposite from the front side; producing, on the front side of the semiconductor substrate, an insulating trench which annularly surrounds a contact area; introducing an insulating material... Agent: Robert Bosch Gmbh

20130341736 - Packaging compatible wafer level capping of mems devices: This invention discloses and claims a cost-effective, wafer-level package process for microelectromechanical devices (MEMS). Specifically, the movable part of MEMS device is encapsulated and protected while in wafer form so that commodity, lead-frame packaging can be used. An overcoat polymer, such as, epoxycyclohexyl polyhedral oligomeric silsesquioxanes (EPOSS) has been used... Agent: Georgia Tech Research Corporation

20130341737 - Packaging to reduce stress on microelectromechanical systems: One example includes an integrated circuit including at least one electrical interconnects disposed on an elongate are extending away from a main portion of the integrated circuit and a microelectromechanical layer including an oscillating portion, the microelectromechanical layer coupled to the main portion of the integrated circuit.... Agent: Fairchild Semiconductor Corporation

20130341739 - Package structure having micro-electro-mechanical system element and method of fabrication the same: A package structure is provided, including: a substrate having a ground pad and an MEMS element; a lid disposed on the substrate for covering the MEMS element; a wire segment electrically connected to the ground pad; an encapsulant encapsulating the lid and the wire segment; and a circuit layer formed... Agent: Siliconware Precision Industries Co., Ltd.

20130341740 - Compensation of stress effects on pressure sensor components: Pressure sensors having components with reduced variations due to stresses caused by various layers and components that are included in the manufacturing process. In one example, a first stress in a first direction causes a variation in a component. A second stress in a second direction is applied, thereby reducing... Agent: Silicon Microstructures, Inc.

20130341741 - Ruggedized mems force die: Described herein are ruggedized wafer level MEMS force dies composed of a platform and a silicon sensor. The silicon sensor employs multiple flexible sensing elements containing Piezoresistive strain gages and wire bonds.... Agent:

20130341742 - Wafer level mems force dies: A composite wafer level MEMS force dies including a spacer coupled to a sensor is described herein. The sensor includes at least one flexible sensing element, such as a beam or diaphragm, which have one or more sensor elements formed thereon. Bonding pads connected to the sensor elements are placed... Agent:

20130341743 - Devices including tantalum alloy layers: A device that includes a sensor stack, the sensor stack including a reference layer, a free layer and a barrier layer positioned between the reference layer and the free layer; a seed layer; and a cap layer, wherein the sensor stack is positioned between the seed layer and the cap... Agent: Seagate Technology LLC

20130341744 - Magnetic random access memory: A magnetic random access memory according to the present invention is provided with: a magnetic recording layer including a magnetization free region having a reversible magnetization, wherein a write current is flown through the magnetic recording layer in an in-plane direction; a magnetization fixed layer having a fixed magnetization; a... Agent: Nec Corporation

20130341745 - Magnetic field measurement apparatus: A light pumping magnetic measurement apparatus configured to suppress an influence on a magnetic field from a heater and facilitate reduction in size and integration of a gas cell when heating the gas cell in order to improve a sensitivity of detection of the magnetic field is provided. This measurement... Agent: Hitachi, Ltd.

20130341747 - Chip package and method for forming the same: An embodiment of the invention provides a chip package which includes: a chip including: a semiconductor substrate having a first surface; a device region formed in the semiconductor substrate; and a plurality of micro-lenses on the first surface and the device region; a cover substrate disposed on the chip, wherein... Agent:

20130341749 - Nanowire structured photodiode with a surrounding epitaxially grown p or n layer: An embodiment relates to a device comprising a substrate, a nanowire and a doped epitaxial layer surrounding the nanowire, wherein the nanowire is configured to be both a channel to transmit wavelengths up to a selective wavelength and an active element to detect the wavelengths up to the selective wavelength... Agent: Zena Technologies, Inc.

20130341746 - Porous si as cmos image sensor arc layer: A semiconductor device is provided. The semiconductor device includes metallization layers supported by a substrate, a diode and a partially doped silicon layer disposed over the metallization layers, a buffer layer disposed over the diode and the partially doped silicon layer; and an anti-reflective coating disposed over the buffer layer,... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130341748 - Solid-state imaging device, manufacturing method of solid-state imaging device and electronic apparatus: A solid-state imaging device, includes: plural unit pixels including a photoelectric conversion portion converting incident light into an electrical signal, and a waveguide having a quadratic curve surface at an inner surface and introducing the incident light to the photoelectric conversion portion.... Agent: Sony Corporation

20130341750 - Solid-state imaging device, method for controlling the same, and electronic apparatus: There is provided a solid-state imaging device including a plurality of pixels which are arranged in a two-dimensional array form and in each of which color separation is performed in a substrate depth direction. The solid-state imaging device includes a pixel addition section which performs addition, when pixel signals of... Agent:

20130341751 - Semiconductor device: A semiconductor device includes a superjunction structure. The influence of external charge on device performance is suppressed using a shield electrode, field plate electrodes, and cover electrodes in various configurations. Optional embodiments include placing an interconnection film between certain electrodes and the upper surface of the superjunction structure. Cover electrodes... Agent:

20130341752 - Two-dimensional guard structure and a radiation detector with the same: A semiconductor device comprises a piece of semiconductor material. On a surface of said piece of semiconductor material, a number of electrodes exist and are configured to assume different electric potentials. A guard structure comprises a two-dimensional array of conductive patches, at least some of which are left to assume... Agent:

20130341753 - Three-dimensional array structure for memory devices: A disclosed memory device includes a three-dimension array structure that includes memory layers and transistor structures disposed between the memory layers. Each memory layer is connected to a common electrode, and each transistor structure includes transistors that share common column structures and common base structures. The transistors also each include... Agent: Macronix International Co., Ltd.

20130341756 - Semiconductor on glass substrate with stiffening layer and process of making the same: A semiconductor-on-glass substrate having a relatively stiff (e.g. relatively high Young's modulus of 125 or higher) stiffening layer or layers placed between the silicon film and the glass in order to eliminate the canyons and pin holes that otherwise form in the surface of the transferred silicon film during the... Agent: Corning Incorporated

20130341754 - Shallow trench isolation structures: Shallow trench isolation structures are provided for use with UTBB (ultra-thin body and buried oxide) semiconductor substrates, which prevent defect mechanisms from occurring, such as the formation of electrical shorts between exposed portions of silicon layers on the sidewalls of shallow trench of a UTBB substrate, in instances when trench... Agent: International Business Machines Corporation

20130341755 - Soi substrate, method for manufacturing soi substrate, and method for manufacturing semiconductor device: An insulating portion has a first region, a second region, and a third region in the stated order from the silicon portion side, the nitrogen concentration of the first region is lower than the nitrogen concentration of the second region and the oxygen concentration of the first region, the nitrogen... Agent:

20130341757 - Masking-less fuse formation with oxide remaining: The present disclosure relates to a method of fabricating a semiconductor device. A semiconductor device includes a bond pad and a fuse layer. The bond pad includes a coating on an upper surface. A dielectric layer is formed over the bond pad and the fuse layer. A passivation layer is... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20130341758 - Chip inductor: Disclosed herein is a chip inductor. The chip inductor according to the present invention includes a substrate on which a through-hole is formed, a conductive coil that is formed on the substrate, an upper resin composite magnetic layer that is filled to surround the conductive coil so that a core... Agent:

20130341759 - Integration of precision mim capacitor and precision thin film resistor: An integrated circuit with a high precision MIM capacitor and a high precision resistor with via etch stop landing pads on the resistor heads that are formed with the capacitor bottom plate material. A process of forming an integrated circuit with a high precision MIM capacitor and a high precision... Agent: Texas Instruments Incorporated

20130341760 - Semiconductor device: A semiconductor device includes first and second wells formed side by side as impurity diffusion regions of a first conductive type in a semiconductor substrate, below an intermediate dielectric film that covers a major surface of the substrate. A conductive layer formed above the intermediate dielectric film is held at... Agent:

20130341761 - Methods for extending ion source life and improving ion source performance during carbon implantation: A novel method and system for extending ion source life and improving ion source performance during carbon implantation are provided. Particularly, the carbon ion implant process involves utilizing a dopant gas mixture comprising carbon monoxide and one or more fluorine-containing gas with carbon. At least one fluorine containing gases with... Agent:

20130341763 - Bonded substrate and manufacturing method thereof: The invention provides a method for manufacturing a bonded substrate by bonding a base substrate to a bond substrate through an insulator film, including: a porous layer forming step of partially forming a porous layer or forming a porous layer whose thickness partially varies on a bonding surface of the... Agent: Shin-etsu Handotai Co., Ltd.

20130341762 - Semiconductor hole structure: A semiconductor device has a first layer formed on a substrate. A mask layer is formed and patterned above the first layer. The first layer is etched partially through. A second layer is formed over the first layer. The first and second layers are etched by a non-lithography process.... Agent: Macronix International Co., Ltd.

20130341764 - Method for manufacturing a diode, and a diode: In a method for manufacturing a diode, a semiconductor crystal wafer is used to produce a p-n or n-p junction, which extends in planar fashion across the top side of a semiconductor crystal wafer. Separation edges form perpendicularly to the top side of the semiconductor crystal wafer, which edges extend... Agent: Robert Bosch Gmbh

20130341766 - Component having through-hole plating, and method for its production: A method for producing a component having a semiconductor substrate with through-hole plating is provided, the through-plating being surrounded by a recess, and the semiconductor substrate having a first layer on one side, which covers the recess on the first side. The semiconductor substrate has a second layer on a... Agent: Robert Bosch Gmbh

20130341765 - Semiconductor device and method for manufacturing semiconductor device: A semiconductor device includes: a semiconductor substrate; a plurality of metal terminals that are formed on a surface of the semiconductor substrate on the opposite side to a circuit-forming surface; and a resin that is formed on the surface of the semiconductor substrate on the opposite side to the circuit-forming... Agent: Fujitsu Limited

20130341767 - Semiconductor device mounting structure, method of manufacturing the same, and electronic apparatus: A semiconductor device mounting structure includes: a substrate with an opening provided therein; a frame member with a frame body and a protruding portion that protrudes from the frame body, the frame body being formed and accommodated in a groove around the opening; a coreless substrate provided above the substrate... Agent: Fujitsu Limited

20130341769 - Aluminium oxide-based metallisation barrier: The present invention relates to aluminium oxide-based passivation layers which simultaneously act as diffusion barrier for underlying wafer layers against aluminium and other metals. Furthermore, a process and suitable compositions for the production of these layers are described.... Agent: Merck Patent Gmbh

20130341768 - Self repairing process for porous dielectric materials: The present disclosure relates to a structure and method to create a self-repairing dielectric material for semiconductor device applications. A porous dielectric material is deposited on a substrate, and exposed with treating agent particles such that the treating agent particles diffuse into the dielectric material. A dense non-porous cap is... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20130341770 - Radiation hardened soi structure and method of making same: An SOI substrate including a buried insulator layer positioned between a base substrate and a top semiconductor active layer is first provided. A semiconductor device can then be formed on and/or within a portion of the top semiconductor active layer. A bottommost surface of the buried insulator layer which is... Agent: International Business Machines Corporation

20130341771 - Protective structure: A protective structure may include: a semiconductor substrate having a doping of a first conductivity type; a semiconductor layer having a doping of a second conductivity type arranged at a surface of the semiconductor substrate; a buried layer having a doping of the second conductivity type arranged in a first... Agent: Infineon Technologies Ag

20130341773 - Encapsulation of an mems component and a method for producing said component: The invention relates to a component and a method for producing said component. The component comprises a substrate (S), a chip (CH), a frame (MF), which is connected to the substrate (S) and on which the chip (CH) bears. A metallic closure layer (ML) encompasses the frame (MF), the substrate... Agent: Epcos Ag

20130341772 - Substrate conductor structure and method: Embodiments of substrates, semiconductor devices and methods are shown that include elongated structures to improve conduction. Elongated structures and methods are also shown that provide electromagnetic isolation to reduce noise in adjacent components.... Agent:

20130341774 - Semiconductor package and method of fabricating the same: A semiconductor package is provided, including: an insulating layer; a semiconductor element embedded in the insulating layer; an adhesive body embedded in the insulating layer, wherein a portion of the semiconductor element is embedded in the adhesive body; a patterned metal layer embedded in the adhesive body and electrically connected... Agent: Siliconware Precision Industries Co., Ltd.

20130341775 - Semiconductor module: A semiconductor module includes: an insulating plate; a plurality of metal patterns formed on the insulating plate and spaced apart from each other; a power device chip solder-joined on one the metal pattern; a lead frame solder-joined on the metal pattern to which the power device chip is not solder-joined,... Agent: Mitsubishi Electric Corporation

20130341777 - Electro-thermal cooling devices and methods of fabrication thereof: In one embodiment, a semiconductor module includes a leadframe having a first side and an opposite second side. A semiconductor chip is disposed over the first side of the leadframe. A switching element is disposed under the second side of the leadframe. In another embodiment, a method of forming a... Agent: Infineon Technologies Ag

20130341776 - Semiconductor device apparatus and assembly with opposite die orientations: An electronic apparatus includes a base substrate, the base substrate including an interconnect. The electronic apparatus further includes a first die including a first semiconductor device, the first semiconductor device being coupled to the interconnect, and further includes a second die including a second semiconductor device, the second semiconductor device... Agent: Freescale Semiconductor. Inc.

20130341778 - Device contact, electric device package and method of manufacturing an electric device package: An electric device and a method of making an electric device are disclosed. In one embodiment the electric device comprises a component comprising a component contact area and a carrier comprising a carrier contact area. The electric device further comprises a first conductive connection layer connecting the component contact area... Agent: Infineon Technologies Ag

20130341779 - Method of manufacturing a semiconductor device and semiconductor device: A method of manufacturing a semiconductor device includes a sealing step of sealing an inner lead of a lead frame with a resin, and a bending step of bending a target bending region in which a stress by bending is not applied to a resin burr generated in the sealing... Agent: Mitsubishi Electric Corporation

20130341780 - Chip arrangements and a method for forming a chip arrangement: A chip arrangement is provided. The chip arrangement including: a chip including at least one electrically conductive contact; a passivation material formed over the at least one electrically conductive contact; an encapsulation material formed over the passivation material; one or more holes formed through the encapsulation material and the passivation... Agent: Infineon Technologies Ag

20130341781 - Heat transfer member and module with the same: A heat transfer member is disposed between a semiconductor element and an electrode plate. The heat transfer member comprises a metal portion extending between a first face at the semiconductor element side and a second face at the plate electrode side, and a ceramic portion surrounding the metal portion. An... Agent: Toyota Jidosha Kabushiki Kaisha

20130341782 - Semiconductor package module: There is provided a semiconductor package module, and more particularly, a semiconductor package module constituted by modularizing power semiconductor devices incapable of being able to be easily integrated due to heat generated therefrom. To this end, the semiconductor package module includes a plurality of semiconductor packages; and a plurality of... Agent: Samsung Electro-mechanics Co., Ltd.

20130341783 - Interposer with identification system: Various interposers and method of manufacturing related thereto are disclosed. In one aspect, a method of manufacturing is provided that includes coupling an identification structure to an interposer. The identification structure is operable to provide identification information about the interposer. The identification structure is programmable to create or alter the... Agent:

20130341787 - Carbon nanotube-solder composite structures for interconnects, process of making same, packages containing same, and systems containing same: A carbon nanotube (CNT) array is patterned on a substrate. The substrate can be a microelectronic die, an interposer-type structure for a flip-chip, a mounting substrate, or a board. The CNT array is patterned by using a patterned metallic seed layer on the substrate to form the CNT array by... Agent:

20130341786 - Package on package devices and methods of packaging semiconductor dies: Package on package (PoP) devices and methods of packaging semiconductor dies are disclosed. In one embodiment, a PoP device includes a first packaged die and a second packaged die coupled to the first packaged die. Metal pillars are coupled to the first packaged die. The metal pillars have a first... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130341785 - Semiconductor chip with expansive underbump metallization structures: Methods and apparatus to protect fragile dielectric layers in a semiconductor chip are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first polymer layer over a conductor pad of a semiconductor chip where the conductor pad has a first lateral dimension. An underbump metallization... Agent:

20130341789 - Semiconductor device and method of forming a wafer level package with top and bottom solder bump interconnection: A semiconductor device is made by forming solder bumps over a copper carrier. Solder capture indentations are formed in the copper carrier to receive the solder bumps. A semiconductor die is mounted to the copper carrier using a die attach adhesive. The semiconductor die has contact pads formed over its... Agent: Stats Chippac, Ltd.

20130341784 - Semiconductor device and method of forming an embedded sop fan-out package: A semiconductor device includes a ball grid array (BGA) package including first bumps. A first semiconductor die is mounted to the BGA package between the first bumps. The BGA package and first semiconductor die are mounted to a carrier. A first encapsulant is deposited over the carrier and around the... Agent: Stats Chippac, Ltd.

20130341788 - Semiconductor device and method of manufacturing the same, and wiring substrate and method of manufacturing the same: A semiconductor device has a semiconductor substrate, an electrode pad formed on a surface of the semiconductor substrate, and a protruding electrode electrically connected to the electrode pad. The protruding electrode comprises a pedestal part formed on the electrode pad and a protruding part formed on the pedestal part. The... Agent:

20130341790 - Interchangeable connection arrays for double-sided dimm placement: A memory module has an array of connections. The array of connections is arranged in rows and columns such that there are first and second outer columns. Connections in the first and second outer columns can be interchanged to optimize double-side module placement on a substrate. Other embodiments are also... Agent:

20130341791 - Process for enhanced 3d integration and structures generated using the same: An enhanced 3D integration structure comprises a logic microprocessor chip bonded to a collection of vertically stacked memory slices and an optional set of outer vertical slices comprising optoelectronic devices. Such a device enables both high memory content in close proximity to the logic circuits and a high bandwidth for... Agent: International Bushiness Machines Corporation

20130341792 - Method for producing graphene, graphene produced on substrate, and graphene on substrate: A production method for producing graphene on a substrate, and the like are provided. According to the method, in a forming step heating is conducted to a solid solution temperature at which a solid solution of carbon dissolved in a metal is able to be formed, and a solid solution... Agent: Japan Science And Technology Agency

20130341793 - Semiconductor device and method of manufacturing the same: An average diameter of first vacancies in a lower insulating layer which configures an interlayer insulating film of a porous low-k film for embedding a wiring therein, is made smaller than an average diameter of second vacancies in an upper insulating layer, and thereby an elastic modulus is increased in... Agent:

20130341794 - Ultra-thin copper seed layer for electroplating into small features: An apparatus and process are described that allow electroplating to fill sub-micron, high aspect ratio semiconductor substrate features using a non-copper/pre-electroplating layer on at least upper portions of side walls of the features, thereby providing reliable bottom up accumulation of the electroplating fill material in the feature. This apparatus and... Agent: Applied Materials, Inc.

20130341798 - Apparatuses including stair-step structures and methods of forming the same: Methods for forming semiconductor structures are disclosed, including a method that involves forming sets of conductive material and insulating material, forming a first mask over the sets, forming a first number of contact regions, forming a second mask over a first region of the sets, and removing material from of... Agent: Micron Technology, Inc.

20130341795 - Methods of forming semiconductor constructions: Some embodiments include a semiconductor construction having a pair of lines extending primarily along a first direction, and having a pair of contacts between the lines. The contacts are spaced from one another by a lithographic dimension, and are spaced from the lines by sub-lithographic dimensions. Some embodiments include a... Agent: Micron Technology, Inc.

20130341796 - Semiconductor device with redistributed contacts: A semiconductor device has external, exposed electrical contacts at an device active face and a semiconductor die, which has internal, electrical contacts at a die active face. The exposed contacts are offset from the internal contacts laterally of the device active face. A redistribution layer includes a layer of insulating... Agent: Freescale Semiconductor, Inc

20130341797 - Semiconductor devices and methods of manufacturing the same: A semiconductor device includes a substrate including a memory cell region and a contact region, a string structure including conductive layers and first interlayer insulating layers alternately stacked over the substrate and protruded toward a lower layer from the memory cell region toward the contact region, barrier rib patterns spaced... Agent:

20130341802 - Integrated circuit package having offset vias: Integrated circuit packages comprise vias, each of which extends from a pad in communication with an integrated circuit on a semiconductor chip through insulating material overlying the semiconductor chip to an attachment surface facing a substrate. The portion of each via proximate the attachment surface is laterally offset from the... Agent: Advanced Micro Devices, Inc.

20130341800 - Integrated circuit packages and methods for forming the same: A method includes forming an electrical connector over a substrate of a wafer, and molding a polymer layer, with at least a portion of the electrical connector molded in the polymer layer. A first sawing step is performed to form a trench in the polymer layer. After the first sawing... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130341803 - Method to enable controlled side chip interconnection for 3d integrated packaging system: Semiconductor multi-die structures having intermediate vertical side chips, and packages housing such semiconductor multi-die structures, are described. In an example, a multi-die semiconductor structure includes a first main stacked dies (MSD) structure having a first substantially horizontal arrangement of semiconductor dies. A second MSD structure having a second substantially horizontal... Agent:

20130341801 - Redeposition control in mram fabrication process: Methods and structures are described to reduce metallic redeposition material in the memory cells, such as MTJ cells, during pillar etching. One embodiment forms metal studs on top of the landing pads in a dielectric layer that otherwise covers the exposed metal surfaces on the wafer. Another embodiment patterns the... Agent:

20130341799 - Through silicon via structure and method of fabricating the same: A method of fabricating a through silicon via (TSV) structure is provided, in which, a first dielectric layer is formed on the substrate, the first dielectric layer is patterned to have at least one first opening, a via hole is formed in the first dielectric layer and the substrate, a... Agent:

20130341805 - Microelectronic device packages, stacked microelectronic device packages, and methods for manufacturing microelectronic devices: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the... Agent: Micron Technology, Inc.

20130341804 - Simultaneous wafer bonding and interconnect joining: Disclosed are a microelectronic assembly of two elements and a method of forming same. A microelectronic element includes a major surface, and a dielectric layer and at least one bond pad exposed at the major surface. The microelectronic element may contain a plurality of active circuit elements. A first metal... Agent: Tessera, Inc.

20130341806 - Substrate structure and semiconductor package using the same: A substrate structure is provided, including a substrate body and a plurality of circuits formed on the substrate body. At least one of the circuits has an electrical contact for connecting to an external element and the electrical contact is narrower in width than the circuit, thereby meeting the requirements... Agent: Siliconware Precision Industries Co., Ltd.

20130341807 - Semiconductor package structure: A semiconductor package structure includes a package substrate having a first surface, a second surface opposite to the first surface, and a sidewall surface between the first surface and the second surface. A semiconductor device is mounted on the first surface. A mold cap encapsulates the semiconductor device. The mold... Agent:

  
12/19/2013 > 232 patent applications in 105 patent subcategories. patent applications/inventions, industry category

20130334484 - Atomic layer deposition of hafnium and zirconium oxides for memory applications: Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack having a metal oxide buffer layer disposed... Agent: Kabushiki Kaisha Toshiba

20130334485 - Memristive elements that exhibit minimal sneak path current: Memristive elements are provided that include an active region disposed between a first electrode and a second electrode, the active region including two switching layers formed of a switching material capable of carrying a species of dopants and a conductive layer formed of a dopant source material. Memristive elements also... Agent: Hewlett-packard Development Company, L.p.

20130334483 - Methods of forming resistive memory elements and related resistive memory elements, resistive memory cells, and resistive memory devices: A method of forming a resistive memory element comprises forming an oxide material over a first electrode. The oxide material is exposed to a plasma process to form a treated oxide material. A second electrode is formed on the treated oxide material. Additional methods of forming a resistive memory element,... Agent: Micron Technology, Inc.

20130334491 - Methods for forming nickel oxide films for use with resistive switching memory devices: Methods for forming a NiO film on a substrate for use with a resistive switching memory device are presenting including: preparing a nickel ion solution; receiving the substrate, where the substrate includes a bottom electrode, the bottom electrode utilized as a cathode; forming a Ni(OH)2 film on the substrate, where... Agent: Intermolecular Inc.

20130334487 - Resistance change memory: According to one embodiment, a resistance change memory includes resistance change elements arrayed with a first space in a first direction and with a second space wider than the first space in a second direction orthogonal to the first direction, second conductive layers disposed on sidewalls of the resistance change... Agent: Kabushiki Kaisha Toshiba

20130334489 - Storage device and storage unit: A storage device includes: a first electrode; a storage layer including an ion source layer; and a second electrode. The first electrode, the storage layer, and the second electrode are provided in this order. The ion source layer contains a movable element, and has a volume resistivity of about 150... Agent:

20130334486 - Structure and method for a complimentary resistive switching random access memory for high density application: The present disclosure provides a resistive random access memory (RRAM) structure. The RRAM structure includes a bottom electrode on a substrate; a resistive material layer on the bottom electrode, the resistive material layer including a defect engineering film; and a top electrode on the resistive material layer.... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130334490 - Transition metal oxide bilayers: Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the... Agent: Kabushiki Kaisha Toshiba

20130334488 - Vertical memory device and method of fabricating the same: A vertical memory device capable of minimizing a cell size and improving current drivability and a method of fabricating the same are provided. The vertical memory device includes a common source region and source regions formed on the common source region and extending in a first direction. Channel regions are... Agent: Sk Hynix Inc.

20130334492 - Light receiving element and optical device: A light-receiving element includes a III-V group compound semiconductor substrate, a light-receiving layer having a type II multi-quantum well structure disposed on the substrate, and a type I wavelength region reduction means for reducing light in a wavelength region of type I absorption in the type II multi-quantum well structure... Agent: Sumitomo Electric Industries, Ltd.

20130334493 - Semiconductor light emitting structure: A semiconductor light emitting structure including an n-type semiconductor layer, a p-type semiconductor layer and an active layer is provided. The active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer is a multi-quantum well structure consisting of well layers and barrier layers interlaced and stacked to... Agent: Lextar Electronics Corporation

20130334494 - Solid-state imaging device, method for manufacturing solid-state imaging device, and imaging apparatus: A solid-state imaging device includes a first electrode, a second electrode disposed opposing to the first electrode, and a photoelectric conversion layer, which is disposed between the first electrode and the second electrode and in which narrow gap semiconductor quantum dots are dispersed in a conductive layer, wherein one electrode... Agent: Sony Corporation

20130334495 - Superlattice structure, semiconductor device including the same, and method of manufacturing the semiconductor device: A superlattice structure, and a semiconductor device including the same, include a plurality of pairs of layers are in a pattern repeated at least two times, in which a first layer and a second layer constitute a pair, the first layer is formed of AlxInyGa1-x-yN (where 0≦x and y≦1), the... Agent:

20130334496 - Semiconductor device, superlattice layer used in the same, and method for manufacturing semiconductor device: A semiconductor device includes a silicon substrate; a nitride nucleation layer disposed on the silicon substrate; at least one superlattice layer disposed on the nitride nucleation layer; and at least one gallium nitride-based semiconductor layer disposed on the superlattice layer. The at least one superlattice layer includes a stack of... Agent:

20130334497 - Nanowire epitaxy on a graphitic substrate: A composition of matter comprising at least one nanowire on a graphitic substrate, said at least one nanowire having been grown epitaxially on said substrate, wherein said nanowire comprises at least one group III-V compound or at least one group II-VI compound or comprises at least one non carbon group... Agent: Norwegian University Of Science And Technology

20130334499 - Method of isolating nanowires from a substrate: A method is provided. The method includes forming a plurality of nanowires on a top surface of a substrate and forming an oxide layer adjacent to a bottom surface of each of the plurality of nanowires, wherein the oxide layer is to isolate each of the plurality of nanowires from... Agent:

20130334498 - Transport conduits for contacts to graphene: An apparatus comprises at least one transistor. The at least one transistor comprises a substrate, a graphene layer formed on the substrate, and first and second source/drain regions spaced apart relative to one another on the substrate. The graphene layer comprises at least a first portion and a second portion,... Agent: International Business Machines Corporation

20130334500 - Tunnel field effect transistor device and method for making the device: A Tunnel Field Effect Transistor device (TFET) made of at least following layers: a highly doped drain layer, a highly doped source layer, a channel layer, a gate dielectric layer and a gate electrode layer, the gate dielectric layer extending along the source layer, and a highly doped pocket layer... Agent: Imec

20130334518 - Compound and organic electrical element using same, and electronic device and heat-resistance measuring method therewith: The present invention provides a diphenyl diamine derivative which is a combination of a nitrogen-containing diphenyl fluorenyl group and a spiro fluorenyl group; an organic electroluminescent device using the same; and a display apparatus which uses the organic electroluminescent device.... Agent: Duksan High Metal Co., Ltd.

20130334502 - Display panel and method for manufacturing the same: The present invention provides a display panel and a method for manufacturing the same. The display panel comprises a substrate, pixels, active elements and storage capacitors, and the active elements and storage capacitors are disposed in the pixels. Each of the storage capacitors includes a first storage electrode and a... Agent: Shenzhen China Star Optoelectronics Technology Co., Ltd.

20130334510 - Electronic devices with improved shelf lives: Embodiments of the present invention provide electronic devices such as OLEDs that have enhanced mechanical integrity and prolonged shelf, by minimizing the spread of a delamination region using topographical non-uniformities introduced in the device structure. For example, a device may be made deliberately non-planar by introducing multiple energy barriers which... Agent:

20130334501 - Field-effect p-n junction: Embodiments described herein provide a field-effect p-n junction. In some embodiments, the field-effect p-n junction includes (1) an ohmic contact, (2) a semiconductor layer above the ohmic contact, (3) at least one rectifying contact above the semiconductor layer, where the lateral width of the rectifying contact is less than the... Agent: The Regents Of The University Of California

20130334520 - Germole containing conjugated molecules and polymers: Embodiments of the invention are directed to Ge comprising heterocyclic compounds which can be used for the preparation of homopolymers and copolymers. The copolymers can be donor-acceptor (DA) alternating copolymers where the donor unit is a Ge comprising heterocyclic unit. The polymers can be used as materials in solar cells... Agent: University Of Florida Research Foundation, Inc.

20130334515 - Mask assembly and organic light emitting diode display manufactured using the same: A mask assembly includes a frame forming an opening, and a plurality of unit masks which form a plurality of deposition openings, the longitudinal ends of the unit masks being fixed to the frame. At least two adjacent ones of the plurality of unit masks have deposition recesses formed on... Agent: Samsung Display Co., Ltd

20130334511 - Method for deposition of high-performance coatings and encapsulated electronic devices: A method is disclosed for forming leak-free coatings on polymeric or other surfaces that provide optical functions or protect underlying layers from exposure to oxygen and water vapor and do not crack or peel in outdoor environments. This method may include both cleaning and surface modification steps preceding coating. The... Agent:

20130334517 - Novel compound and organic light-emitting device comprising same: The present invention relates to a novel compound and an organic light emitting device comprising the same. The compound according to the present invention may be used as hole injection, hole transport, electron injection and transport, and light emitting materials in an organic light emitting device, and the organic light... Agent: Lg Chem, Ltd.

20130334521 - Novel organometallic compound, and organic light-emitting diode using same: The present invention relates to a novel organometallic compound, and more particularly, to a luminescent organometallic compound in which intermolecular interaction is inhibited by means of introducing a germanium substituent, thereby improving light-emitting characteristics. The present invention also relates to an organic electronic device, specifically, to an organic light-emitting diode... Agent: Korea Research Institute Of Chemical Technology

20130334516 - Optoelectronic component having doped layers: The invention relates to an organic electronic or optoelectronic component, comprising an electrode and a counter-electrode and a layer system between the electrode and the counter-electrode, wherein the layer system contains at least one organic layer and at least one doped layer, wherein the dopant in the doped layer represents... Agent: Heliatek Gmbh

20130334507 - Organic el light emitting device and manufacturing method thereof: There is provided a layered color filter which can improve optical selectivity, without reducing optical transparency, an organic EL light emitting device on which such a layered color filter is mounted, and a fabrication method of such an organic EL light emitting device. The layered color filter includes a substrate... Agent:

20130334506 - Organic electroluminescent element: It is an object of the present invention to provide an organic electroluminescent element with which no light extraction layer needs to be produced separately, which has a transparent electrode that is advantageous in terms of cost and a simple film formation process, and which is excellent from the standpoint... Agent: Udc Ireland Limited

20130334512 - Organic electroluminescent element, composition for organic electroluminescent element, and organic electroluminescent device: The present invention relates to an organic electroluminescent element which comprises two or more hole injection/transport layers each formed by a wet film formation method using a composition containing, as a hole-injecting/transporting compound, an arylamine polymer compound that has a repeating unit having a triarylamine structure therein, in which when... Agent: Mitsubishi Chemical Corporation

20130334508 - Organic light emitting diode display and method for manufacturing an organic light emitting diode display: An OLED display is disclosed which included gate wires provided on a substrate and extended in a first direction, data wires provided on the gate wires and extended in a second direction that crosses the first direction; a pixel circuit including first thin film transistors respectively connected to the gate... Agent:

20130334514 - Organic light emitting diode display and method for manufacturing the same: An organic light emitting diode (OLED) display and a method for manufacturing the same are provided. The OLED display includes a substrate, an active layer and a capacitor lower electrode positioned on the substrate, a gate insulating layer positioned on the active layer and the capacitor lower electrode, a gate... Agent: Lg Display Co., Ltd.

20130334504 - Organic light emitting diode lighting devices: An organic light emitting diode (OLED) device includes a substrate, an anode, a cathode, an active region including an organic material, wherein the active region is electrically coupled to the anode and the cathode, at least one coupler configured to electrically couple at least one of the anode or the... Agent: Plextronics, Inc.

20130334519 - Organic light-emitting component and use of a copper complex in a charge transport layer: An organic light-emitting component has an active layer for emitting electromagnetic radiation. It also has an anode and an organic charge transport layer, arranged between the active layer and the anode, for transporting charge carriers from the anode to the active layer. The anode can be used to decouple electromagnetic... Agent: Osram Opto Semiconductors Gmbh

20130334503 - Organic light-emitting display apparatus: An organic light-emitting display apparatus includes a plurality of first emission units, each including a first organic light-emitting device configured to emit light in at least a first direction and through a first display surface, a plurality of second emission units, each including a second organic light-emitting device configured to... Agent: Samsung Display Co., Ltd.

20130334509 - Organic light-emitting display device: Organic light-emitting display devices are provided. One organic light-emitting display device includes a substrate, a first wire on the substrate, a second wire insulated from and crossing the first wire, and a static electricity dispersion pattern insulated from and crossing the second wire. Another organic light-emitting display device includes: a... Agent: Samsung Display Co., Ltd.

20130334505 - Polymers, their preparation and uses: A polymer containing an optionally substituted repeat unit of formula (I) wherein each R is the same or different and represents H or an electron withdrawing group, and each R1 is the same or different and represents a substituent.... Agent: Cambridge Display Technology Limited

20130334513 - Thin-film transistor device and method for manufacturing same, organic electroluminescent display elements and organic electroluminescent display device: A thin film transistor element is formed in each of a first aperture and a second aperture defined by partition walls, which further define a third aperture that is adjacent to the first aperture with a gap therebetween and is located in a direction, from the first aperture, differing from... Agent: Panasonic Corporation

20130334524 - Display device and manufacturing method for same: The present invention provides a display device having: gate electrodes formed on a transparent substrate; a gate insulating film for covering the gate electrodes; an oxide semiconductor formed on the gate insulating film; drain electrodes and source electrodes formed at a distance from each other with channel regions of the... Agent:

20130334522 - Method of fabricating oxide thin film device using laser lift-off and oxide thin film device fabricated by the same: Provided is a method of fabricating an oxide thin film device using laser lift-off and an oxide thin film device fabricated by the same. The method includes: forming an oxide thin film on a growth substrate; bonding a temporary substrate on the oxide thin film; irradiating laser onto the growth... Agent: Korea Institute Of Science And Technology

20130334523 - Semiconductor device: High field-effect mobility is provided for a transistor including an oxide semiconductor. Further, a highly reliable semiconductor device including the transistor is provided. In a bottom-gate transistor including an oxide semiconductor layer, an oxide semiconductor layer functioning as a current path (channel) of the transistor is sandwiched between oxide semiconductor... Agent:

20130334527 - Semiconductor device: One of the objects is to improve display quality by reduction in malfunctions of a circuit. In a driver circuit formed using a plurality of pulse output circuits having first to third transistors and first to fourth signal lines, a first clock signal is supplied to the first signal line;... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130334529 - Semiconductor device: A semiconductor device includes a semiconductor substrate on which a semiconductor device is formed; first and second pads; a first insulating film which is formed above the semiconductor substrate; a plurality of wiring lines which are embedded in ditches provided in the first insulating film; a second insulating film provided... Agent: Renesas Electronics Corporation

20130334525 - Semiconductor device and method for manufacturing the same: As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, there occurs a problem that it is difficult to mount an IC chip including a driver circuit for... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130334528 - Semiconductor device, fabrication method for the same, and display apparatus: A semiconductor device including a semiconductor layer, a plurality of electrode portions each overlapping the semiconductor layer, and an insulating film placed between the plurality of electrode portions to lie on the semiconductor layer is fabricated. The fabrication method includes the steps of: forming an oxide semiconductor layer part of... Agent: Sharp Kabushiki Kaisha

20130334526 - Thin film transistor: A thin film transistor includes a gate electrode formed on a substrate; a gate insulation film covering the gate electrode; an oxide semiconductor layer formed on the gate insulation film; a source electrode and a drain electrode covering an edge portion of the oxide semiconductor layer, and a passivation film... Agent: Panasonic Corporation

20130334530 - Thin film transistor, manufacturing method therefor, and display device: Widths of a source electrode (160a) and a drain electrode (160b) are smaller than a width of a channel layer (140). Accordingly, in the channel layer (140), low resistance regions (140b) are formed to surround respectively the source electrode (160a) and the drain electrode (160b). A high resistance region (140a)... Agent: Sharp Kabushiki Kaisha

20130334532 - Stress gauge comprised of a piezoelectric material for use with integrated circuit products: In one example, a stress gauge for an integrated circuit product is disclosed that includes a layer of insulating material, a body positioned at least partially in the layer of insulating material, wherein the body is comprised of a material having a piezoelectric constant of at least about 0.1 pm/V,... Agent: Globalfoundries Inc.

20130334531 - Systems and methods for measuring temperature and current in integrated circuit devices: Embodiments relate to measurement of temperature and current in semiconductor devices. In particular, embodiments relate to monolithic semiconductor, such as power semiconductor, and sensor, such as a current or temperature sensor, device. In embodiments, temperature and/or current sensing features are monolithically integrated within semiconductor devices. These embodiments thereby can provide... Agent:

20130334533 - Semiconductor device: A transistor having high field-effect mobility is provided. In order that an oxide semiconductor layer through which carriers flow is not in contact with a gate insulating film, a buried channel structure in which the oxide semiconductor layer through which carriers flow is separated from the gate insulating film is... Agent:

20130334534 - Liquid crystal display and method of manufacturing the same: A liquid crystal display which includes a first substrate having thin film transistors, and a second substrate disposed to face the first substrate, wherein the first substrate includes: a gate electrode, a source electrode, and a drain electrode; a gate wiring; a first insulating film formed on the gate electrode... Agent:

20130334535 - Semiconductor device, display device, and electronic device: A display device includes a load, a transistor for controlling a current value supplied to the load, a capacitor, a first wiring, a second wiring, and first to fourth switches. Variations in the current value caused by variations in the threshold voltage of the transistor can be suppressed through the... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130334540 - Compound semiconductor device and manufacturing method thereof: A first electrode, an intrinsic first compound semiconductor layer over the first electrode, a second compound semiconductor layer whose band gap is smaller than that of the first compound semiconductor layer on the first compound semiconductor layer, and a second electrode over the second compound semiconductor layer are provided.... Agent: Fujitsu Limited

20130334538 - High electron mobility transistor structure and method: Embodiments of the present disclosure describe structural configurations of an integrated circuit (IC) device such as a high electron mobility transistor (HEMT) switch device and method of fabrication. The IC device includes a buffer layer formed on a substrate, a channel layer formed on the buffer layer to provide a... Agent:

20130334537 - Optically controlled power devices: An electro-optically triggered power switch is disclosed utilizing a wide bandgap, high purity III-nitride semiconductor material such as BN, AN, GaN, InN and their compounds. The device is electro-optically triggered using a laser diode operating at a wavelength of 10 to 50 nanometers off the material's bandgap, and at a... Agent: Helava Systems, Inc.

20130334539 - Semiconductor light emitting device and method for manufacturing same: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a p-side electrode, an n-side electrode, and an inorganic film. The semiconductor layer includes a first surface having an unevenness, a second surface opposite to the first surface, and a light emitting layer. The semiconductor layer includes... Agent: Kabushiki Kaisha Toshiba

20130334536 - Single-crystal reo buffer on amorphous siox: A method of forming a layer of amorphous silicon oxide positioned between a layer of rare earth oxide and a silicon substrate. The method includes providing a crystalline silicon substrate and depositing a layer of rare earth metal on the silicon substrate in an oxygen deficient ambient at a temperature... Agent:

20130334542 - Normally-off power jfet and manufacturing method thereof: In general, in a semiconductor active element such as a normally-off JFET based on SiC in which an impurity diffusion speed is significantly lower than in silicon, gate regions are formed through ion implantation into the side walls of trenches formed in source regions. However, to ensure the performance of... Agent: Renesas Electronics Corporation

20130334541 - Three dimensional strained semiconductors: In one embodiment, an apparatus includes a three dimensional structure comprising a semiconductor material, and at least one thin film in contact with at least one exterior surface of the three dimensional structure for inducing a strain in the structure, the thin film being characterized as providing at least one... Agent:

20130334543 - Display apparatus and method of manufacturing the same: A display apparatus includes a display panel, a gate driver, and a data driver. The display panel includes a display area in which an image is displayed and a non-display area disposed adjacent to the display area. The display panel includes an insulating substrate which has a groove. The gate... Agent: Samsung Display Co., Ltd.

20130334544 - Optoelectronic semiconductor component, method for producing same and use of such a component: An opto-electronic component includes a housing, a radiation-emitting semiconductor chip and a radiation-detecting semiconductor chip. A first cavity and a second cavity are formed in the housing, wherein the radiation-emitting semiconductor chip is arranged in the first cavity and is cast by means of a first casting compound. The radiation-detecting... Agent: Osram Opto Semiconductors Gmbh

20130334546 - Novel illumination devices: Illumination device comprising at least one LED and at least one colour converter comprising at least one organic fluorescent colorant in a matrix consisting essentially of polystyrene or polycarbonate, wherein LED and colour converter are present in a remote phosphor arrangement.... Agent: Basf Se

20130334545 - Surface light source and display device: Therefore, in the present invention, the phosphor is far away from the LED light source to avoid the heat generated by the LED chip directly transmitting to the phosphor such that the heat received by the phosphor is reduced, decreasing the temperature of the phosphor, and avoiding that the lighting... Agent: Shenzhen China Star Optoelectronics Technology Co., Ltd.

20130334547 - Light-emitting element and display device using same: A light-emitting element includes a reflective electrode, a light-transmitting electrode disposed opposite the reflective electrode, a light-emitting layer emitting blue light disposed between the reflective electrode and the light-transmitting electrode, and a functional layer disposed between the reflective electrode and the light-emitting layer. The optical thickness of the functional layer... Agent: Panasonic Corporation

20130334549 - Light emitting device, method for manufacturing light emitting device, and package array: In a light emitting device, a first lead has a first terminal part that is contiguous with a first connector. The first terminal part includes a first convex part that is exposed from a molded article at the inner peripheral face of a mounting recess, and a first concave part... Agent: Nichia Corporation

20130334548 - Light emitting devices and methods: Light emitting devices and methods are disclosed. In one embodiment a light emitting device can include a submount and a plurality of light emitting diodes (LEDs) disposed over the submount. At least a portion of the submount can include a reflective layer at least partially disposed below a solder mask.... Agent:

20130334550 - Light emitting device, light emitting device package and illumination system: A light emitting device is provided. The light emitting device includes a first semiconductor layer, an uneven part on the first semiconductor layer, a first nonconductive layer including a plurality of clusters on the uneven part, a first substrate layer on the nonconductive layer, and a light emitting structure layer.... Agent: Lg Innotek Co., Ltd.

20130334557 - Composition containing quantum dot fluorescent body, molded body of quantum dot fluorescent body dispersion resin, structure containing quantum dot fluorescent body, light-emitting device, electronic apparatus, mechanical device, and method for producing: A quantum dot fluorescent body is dispersed in a cycloolefin (co)polymer that is a dispersion resin to form the composition containing a quantum dot fluorescent body, and the composition containing a quantum dot fluorescent body is molded, forming the molded body of the quantum dot fluorescent body dispersion resin, and... Agent: Showa Denko K.k.

20130334556 - Light emitting device and light unit having the same: Provided are a light emitting device and a light unit including the same. The light emitting device includes a body, a first cavity disposed at a center of the body, the first cavity having an opened upper side, a second cavity disposed around an upper portion of the body, the... Agent: Lg Innotek Co., Ltd.

20130334554 - Light emitting device and method for fabricating the same: Embodiments of a light emitting device and a method for fabricating the same are provided. The light emitting device comprises a cavity and one or more light emitting elements. The cavity is formed to a depth of 450 μm or less, and the light emitting elements are installed in the... Agent:

20130334560 - Light emitting diode chip: The present invention relates to a light-emitting diode chip. According to the present invention, the light-emitting diode chip comprises: a substrate, the thickness of which is greater than 120 μm; and a light-emitting diode provided on the surface of the substrate, at one side thereof.... Agent: Seoul Opto Device Co., Ltd.

20130334553 - Light emitting diode package structure and manufacturing method thereof: Various examples of a light emitting diode (LED) package structure and a manufacturing method thereof are described. In one aspect, a LED package structure includes a carrier, a LED chip, a first annular barricade, a second annular barricade and a fluorescent encapsulant. The LED chip is electrically connected to the... Agent:

20130334559 - Light emitting module, a lamp, a luminaire and a display device: A light emitting module 150 emits light through a light exit window 104 and comprises a base 110, a solid state light emitter 154, 156 and a partially diffusive reflective layer 102. The base 110 has a light reflective surface 112 which faces towards the light exit window 104. The... Agent: Koninklijke Philips N.v.

20130334551 - Light-emitting device and method for manufacturing the same: A light-emitting device comprising: a substrate having a first surface and a second surface, wherein the second surface is opposite to the first surface; a semiconductor structure formed on the first surface of the substrate, comprising a first type semiconductor layer, an active layer and a second type semiconductor layer;... Agent: Epistar Corporation

20130334558 - Method for producing an optoelectronic component, and optoelectronic component: A method of producing an optoelectronic component includes providing a cavity; introducing a liquid matrix material with phosphor particles distributed therein into the cavity; introducing a semiconductor chip into the matrix material; sedimenting the phosphor particles in the matrix material; and curing the matrix material, wherein a conversion layer including... Agent: Osram Opto Semiconductors Gmbh

20130334555 - Optoelectronic device and method for manufacturing the same: An optoelectronic device comprising: a substrate; and a transition stack formed on the substrate comprising one first transition layer formed on the substrate having a first hollow component formed inside the first transition layer and a second transition layer formed on the first transition layer having a second hollow component... Agent:

20130334552 - Semiconductor light emitting element, and light emitting device: A semiconductor light emitting element includes a light emitting structure including a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer. A first electrode structure includes a conductive via connected to the first conductivity type semiconductor layer. A second electrode structure is connected to... Agent:

20130334563 - Led having vertical contacts redistruted for flip chip mounting: A light emitting diode (LED) structure has semiconductor layers, including a p-type layer, an active layer, and an n-Type layer. The p-type layer has a bottom surface, and the n-type layer has a top surface though which light is emitted. A copper layer has a first portion electrically connected to... Agent: Koninklijke Philips N.v.

20130334561 - Method for bonding led wafer, method for manufacturing led chip and bonding structure: A method for bonding an LED wafer, a method for manufacturing an LED chip, and a bonding structure are provided. The method for bonding an LED wafer includes the following steps. A first metal film is formed on an LED wafer. A second metal film is formed on a substrate.... Agent:

20130334562 - Semiconductor device and manufacturing method thereof: A semiconductor device simplifies the manufacturing process. The device includes a protective chip which has a surface Zener diode to protect a light emitting chip with an LED formed therein from surge voltage. The protective chip is mounted over a wiring electrically coupled through a metal wire to an anode... Agent: Renesas Electronics Corporation

20130334564 - Monolithic compound semiconductor structure: A monolithic compound semiconductor structure is disclosed. The monolithic compound semiconductor structure comprises a substrate, an n-type FET epitaxial structure, an n-type etching-stop layer, a p-type insertion layer, and an npn HBT epitaxial structure, and it can be used to form an FET, an HBT, or a thyristor.... Agent: Win Semiconductors Corp.

20130334565 - Method of manufacturing a semiconductor device using an impurity source containing a metallic recombination element and semiconductor device: Source zones of a first conductivity type and body zones of a second conductivity type are formed in a semiconductor die. The source zones directly adjoin a first surface of the semiconductor die. A dielectric layer adjoins the first surface. Polysilicon plugs extend through the dielectric layer and are electrically... Agent: Infineon Technologies Austria Ag

20130334566 - Power semiconductor device and method for manufacturing such a power semiconductor device: An insulated gate bipolar device is disclosed which can include layers of different conductivity types between an emitter electrode on an emitter side and a collector electrode on a collector side in the following order: a source region of a first conductivity type, a base layer of a second conductivity... Agent: Abb Technology Ag

20130334567 - Semiconductor device having diode-built-in igbt and semiconductor device having diode-built-in dmos: A semiconductor device includes: a semiconductor substrate; a diode-built-in insulated-gate bipolar transistor having an insulated-gate bipolar transistor and a diode, which are disposed in the substrate, wherein the insulated-gate bipolar transistor includes a gate, and is driven with a driving signal input into the gate; and a feedback unit for... Agent:

20130334568 - Multilayer substrate structure and method of manufacturing the same: A multilayer substrate structure comprises a substrate, a thermal matching layer formed on the substrate and a lattice matching layer above the thermal matching layer. The thermal matching layer includes at least one of molybdenum, molybdenum-copper, mullite, sapphire, graphite, aluminum-oxynitrides, silicon, silicon carbide, zinc oxides, and rare earth oxides. The... Agent: Tivra Corporation

20130334569 - Semiconductor structure and method for manufacutring the same: A semiconductor structure comprises a substrate, a gate stack, a base area, and a source/drain region, wherein the gate stack is located on the base area, the source/drain region is located in the base area, and the base area is located on the substrate. A supporting isolated structure is provided... Agent: Institute Of Microelectronics, Chinese Academy Of Sciences

20130334570 - Integrated structure of compound semiconductor devices: An integrated structure of compound semiconductor devices is disclosed. The integrated structure comprises from bottom to top a substrate, a first epitaxial layer, an etching-stop layer, a second epitaxial layer, a sub-collector layer, a collector layer, a base layer, and an emitter layer, in which the first epitaxial layer is... Agent: Win Semiconductors Corp.

20130334571 - Epitaxial growth of smooth and highly strained germanium: A smooth germanium layer which can be grown directly on a silicon semiconductor substrate by exposing the substrate to germanium precursor in the presence of phosphine at temperature of about 350C. The germanium layer formation can be achieved with or without a SiGe seed layer. The process to form the... Agent: International Business Machines Corporation

20130334572 - Junctionless accumulation-mode devices on decoupled prominent architectures: A junctionless accumulation-mode (JAM) semiconductive device is isolated from a semiconducive substrate by a reverse-bias band below a prominent feature of a JAM semiconductive body. Processes of making the JAM device include implantation and epitaxy.... Agent:

20130334573 - Multi-channel hemt: A transistor device includes a semiconductor heterostructure including a plurality of alternating two-dimensional electron gasses (2DEGs) and two-dimensional hole gasses (2DHGs) extending in parallel at different depths in the semiconductor heterostructure. The 2DEGs form current channels of the transistor device. The transistor device further includes a source extending into the... Agent: Infineon Technologies Austria Ag

20130334574 - Monolithic integrated composite group iii-v and group iv device: According to one disclosed embodiment, a method for fabricating a monolithic integrated composite device comprises forming a group III-V semiconductor body over a group IV semiconductor substrate, forming a trench in the group III-V semiconductor body, and forming a group IV semiconductor body in the trench. The method also comprises... Agent: International Rectifier Corporation

20130334575 - Damascene word line: The technology relates to a damascene word line for a three dimensional array of nonvolatile memory cells. Partly oxidized lines of material such as silicon are made over a plurality of stacked nonvolatile memory structures. Word line trenches are made in the partly oxidized lines, by removing the unoxidized lines... Agent: Macronix International Co., Ltd.

20130334576 - Gate array architecture with multiple programmable regions: An integrated circuit includes a gate array layer having a two-dimensional array of logic gates, each logic gate including multiple transistors. At least one upper template-based metal layer is coupled to the gate array layer and is configured to define at least one of a power distribution network, a clock... Agent: Baysand Inc.

20130334577 - Image sensors having reduced dark level differences: An image sensor including a semiconductor layer including a plurality of unit pixels each including a photoelectric conversion device and read devices; and an insulating layer including a light-shielding pattern defining a light-receiving region and a light-shielding region of the semiconductor layer, the insulating layer covering one surface of the... Agent:

20130334579 - Manufacturing method of a graphene-based electrochemical sensor, and electrochemical sensor: A manufacturing method of an electrochemical sensor comprises forming a graphene layer on a donor substrate, laminating a film of dry photoresist on the graphene layer, removing the donor substrate to obtain an intermediate structure comprising the film of dry photoresist and the graphene layer, and laminating the intermediate structure... Agent:

20130334578 - Molecule sensor device: A molecule sensor included in a molecule sensor device has a semiconductor substrate, a bottom gate, a source portion, a drain portion, and a nano-scale semiconductor wire. The bottom gate is for example a poly-silicon layer formed on the semiconductor substrate and electrically insulated from the semiconductor substrate. The source... Agent: National Taiwan University

20130334581 - Device with mos device including a secondary metal and pvd tool with target for making same: A device includes a substrate and a metal-oxide-semiconductor (MOS) device. The MOS device includes a gate dielectric over the substrate, a gate electrode over the gate dielectric, a source/drain region adjacent the gate dielectric, and a source/drain silicide over and contacting the source/drain region. The source/drain silicide comprises silicon, nickel,... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130334580 - Replacement metal gate processing with reduced interlevel dielectric layer etch rate: A semiconductor structure includes an interlevel dielectric (ILD) layer disposed over a semiconductor substrate and a transistor gate structure formed on the substrate; and a shallow gas cluster ion beam (GCIB) layer infused in a top portion of the ILD layer; wherein the GCIB layer has a slower etch rate... Agent: International Business Machines Corporation

20130334582 - Dram device: A DRAM device includes plural N-channel MIS transistors arranged in a matrix over a P well, and a plurality of capacitors formed corresponding to the plurality of N-channel MIS transistors, and plural word lines formed corresponding to each row of the plurality of N-channel MIS transistors, and a plurality of... Agent:

20130334583 - Semiconductor devices including vertical transistors, electronic systems including the same and methods of manufacturing the same: The semiconductor device includes word lines on a semiconductor substrate, common gates connected to each of the word lines and vertically disposed in the semiconductor substrate, buried bit lines intersecting the word lines at a non-right angle in a plan view, and a pair of vertical transistors sharing each of... Agent: Sk Hynix Inc.

20130334584 - Integration of memory, high voltage and logic devices: A device and methods for forming a device are disclosed. The device includes a substrate having first, second and third regions. The first region includes a memory cell region, the second region includes a peripheral circuit region and the third region includes a logic region. A memory cell which includes... Agent: Globalfoundries Singapore Pte. Ltd.

20130334585 - Semiconductor device, memory system including the same, and method of manufacturing the same: The semiconductor device includes a vertical channel layer formed on a substrate; conductive layer patterns and insulating layer patterns alternately formed around a length of each of the vertical channel layer; and a charge storing layer pattern formed between each of the vertical channel layers and the conductive layer patterns,... Agent:

20130334586 - Non-self-aligned non-volatile memory structure: A non-self-aligned non-volatile memory structure, comprising: a semiconductor substrate; a left floating gate memory cell and a right floating gate memory cell; a control gate; and a gate insulation layer disposed among said two floating gate memory cells and said control gate. Drains of said two floating gate memory cells... Agent: Yield Microelectronics Corp.

20130334587 - Metal control gate structures and air gap isolation in non-volatile memory: High-density semiconductor memory utilizing metal control gate structures and air gap electrical isolation between discrete devices in these types of structures are provided. During gate formation and definition, etching the metal control gate layer(s) is separated from etching the charge storage layer to form protective sidewall spacers along the vertical... Agent: Sandisk Technologies Inc.

20130334588 - Field effect transistor and manufacturing method thereof: A field effect transistor (FET) and a manufacturing method thereof are provided. The FET includes a substrate, a fin bump, an insulating layer, a charge trapping structure and a gate structure. The fin bump is disposed on the substrate. The insulating layer is disposed on the substrate and located at... Agent: United Microelectronics Corp.

20130334591 - Method for manufacturing semiconductor device and semiconductor device: According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method includes forming a second stacked body on the planarized interlayer insulating film and on the uppermost stair. The second stacked body includes a second conductive film thicker than the first conductive film and a second... Agent:

20130334592 - Semiconductor device: A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile memory cell, adjacent to the first memory cell in a first direction, having a second charge storage layer and a second gate electrode. The first... Agent: Renesas Electronics Corporation

20130334590 - Semiconductor device and method for manufacturing same: According to one embodiment, a semiconductor device includes a substrate, a foundation structure, a first insulating film, and a second insulating film. The foundation structure is provided on the substrate. The foundation structure includes a plurality of circuit components and a gap provided between the circuit components. The first insulating... Agent: Kabushiki Kaisha Toshiba

20130334589 - Semiconductor device and method of manufacturing the same: In a semiconductor memory device, a plurality of control gates is stacked in a first region and a second region of a substrate. A plurality of interlayer insulating layers is stacked in a portion of the second region of the substrate. Each interlayer insulating layer is formed at the same... Agent: Sk Hynix Inc.

20130334593 - Three-dimensional semiconductor memory devices and methods of fabricating the same: Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode... Agent:

20130334594 - Recessed gate memory apparatuses and methods: Some embodiments include a memory device and a method of forming the memory device. One such memory device includes a string of stacked memory cells. Each of the memory cells in the string includes a charge storage structure and a recessed control gate. The recessed control gate has a substantially... Agent:

20130334595 - Structure and method for a field effect transistor: Provided is one embodiment of a semiconductor structure that includes a STI feature, wherein the STI feature is a continuous feature and includes a first portion in a first region and a second portion in a second region, and the first portion is recessed relative to the second portion; an... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130334596 - Semiconductor device and fabricating method thereof: A semiconductor device and a fabricating method thereof are provided. The semiconductor device includes: a substrate comprising a trench; a first electrode disposed below the trench; a second electrode disposed above the trench, a first insulating layer being disposed between the first electrode and the second electrode; a first contact... Agent: Magnachip Semiconductor, Ltd.

20130334597 - Power semiconductor device: A power semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type having an effective impurity concentration that is less than an effective impurity concentration of the first semiconductor layer arranged on the first semiconductor layer, a third semiconductor... Agent:

20130334598 - Semiconductor device and method for manufacturing same: A semiconductor device includes first to fourth semiconductor layers, a gate electrode, a field plate electrode, an insulating film, first and second main electrodes, and an insulating section. The second semiconductor layer has the first conductivity type and is provided on the first semiconductor layer. The third semiconductor layer has... Agent:

20130334599 - Integrated snubber in a single poly mosfet: A MOSFET device includes one or more active device structures and one or more dummy structures formed from semiconductor drift region and body regions. The dummy structures are electrically connected in parallel to the active device structures. Each dummy structure includes an electrically insulated snubber electrode formed proximate the body... Agent: Alpha And Omega Semiconductor Incorporated

20130334600 - Transistor device and manufacturing method thereof: A transistor device and a manufacturing method thereof are provided. The transistor device includes a substrate, a first well, a second well, a shallow trench isolation (STI), a source, a drain and a gate. The first well is disposed in the substrate. The second well is disposed in the substrate.... Agent: United Microelectronics Corp.

20130334601 - High voltage trench transistor: A method of forming a device is disclosed. A substrate defined with a device region is provided. A gate having a gate electrode, first and second gate dielectric layers is formed in a trench. The trench has an upper trench portion and a lower trench portion. A field plate is... Agent: Globalfoundries Singapore Pte. Ltd.

20130334602 - Continuously scalable width and height semiconductor fins: Arbitrarily and continuously scalable on-currents can be provided for fin field effect transistors by providing two independent variables for physical dimensions for semiconductor fins that are employed for the fin field effect transistors. A recessed region is formed on a semiconductor layer over a buried insulator layer. A dielectric cap... Agent: International Business Machines Corporation

20130334603 - Isolation structure for semiconductor devices: A method including etching a shallow trench laterally surrounding a portion of a semiconductor substrate, the semiconductor substrate comprising a semiconductor-on-insulator SOI layer, a pad oxide layer, and a pad nitride layer, depositing a first nitride liner, a dielectric liner, and a second nitride liner in the shallow trench, wherein... Agent: International Business Machines Corporation

20130334604 - Soi semiconductor device comprising a substrate diode and a film diode formed by using a common well implantation mask: When forming sophisticated SOI devices, a substrate diode and a film diode are formed by using one and the same implantation mask for determining the well dopant concentration in the corresponding well regions. Consequently, during the further processing, the well dopant concentration of any transistor elements may be achieved independently... Agent: Global Foundries Inc.

20130334605 - Mechanisms for forming ultra shallow junction: A fin field-effect transistor (FinFET) includes a substrate and a fin structure over the substrate. The fin structure comprises a lightly doped source and drain (LDD) region uniformly beneath a top surface and sidewall surfaces of the fin structure, the LDD region having a depth less than about 25 nm.... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130334606 - Finfet with high mobility and strain channel: An integrated circuit device includes a fin at least partially embedded in a shallow trench isolation (STI) region and extending between a source and a drain. The fin is formed from a first semiconductor material and having a trimmed portion between first and second end portions. A cap layer, which... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130334608 - Semiconductor device: A semiconductor device includes a first transistor formed on a semiconductor substrate, and including a first channel region, and a first gate electrode formed on the first channel region, and a second transistor formed on the semiconductor substrate, and including a second channel region having a conductivity type identical to... Agent:

20130334609 - Semiconductor device: In a semiconductor device, an active region includes: a first impurity region to which a predetermined voltage is applied; second and third impurity regions forming a pair of conductive electrodes of an insulated gate field effect transistor; and at least one impurity region disposed between the first and second impurity... Agent: Renesas Electronics Corporation

20130334607 - Semiconductor structure and fabrication method: A method is provided for fabricating a semiconductor structure. The method includes providing a semiconductor substrate having a first region and an adjacent second region, and etching the semiconductor substrate to form a plurality of first trenches in the first region and a second trench in the second region. Fins... Agent:

20130334610 - N-channel and p-channel end-to-end finfet cell architecture with relaxed gate pitch: A finFET block architecture uses end-to-end finFET blocks in which the fin lengths are at least twice the contact pitch, whereby there is enough space for interlayer connectors to be placed on the proximal end and the distal end of a given semiconductor fin, and on the gate element on... Agent: Synopsys, Inc.

20130334611 - Semiconductor device and manufacturing method thereof: The semiconductor device of the invention includes a transistor, an insulating layer provided over the transistor, a first conductive layer (corresponding to a source wire or a drain wire) electrically connected to a source region or a drain region of the transistor through an opening portion provided in the insulating... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130334612 - Integrated circuit and method of fabricating same: An integrated circuit includes a plurality of transistors. Each transistor is associated with a corresponding body terminal. At least one transistor is reverse biased at a first voltage level, and at least one other transistor is reverse biased at a second voltage level that is different from the first voltage... Agent: General Electric Company

20130334615 - Finfets and the methods for forming the same: A method includes forming a gate stack including a gate electrode on a first semiconductor fin. The gate electrode includes a portion over and aligned to a middle portion of the first semiconductor fin. A second semiconductor fin is on a side of the gate electrode, and does not extend... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130334613 - N-channel and p-channel end-to-end finfet cell architecture: A finFET block architecture uses end-to-end finFET blocks. A first set of semiconductor fins having a first conductivity type and a second set of semiconductor fins having a second conductivity type can be aligned end-to-end. An inter-block isolation structure separates the semiconductor fins in the first and second sets. The... Agent: Synopsys, Inc.

20130334616 - Reliable contacts: A method for forming a device is disclosed. The method includes providing a substrate prepared with first and second contact regions and a dielectric layer over the contact region. First and second vias are formed in the dielectric layer. The first via is in communication with the first contact region... Agent: Globalfoundrier Singapore Pte. Ltd.

20130334614 - Structure and method for finfet device: The present disclosure provides one embodiment of a field effect transistor (FET) structure. The FET structure includes shallow trench isolation (STI) features formed in a semiconductor substrate; a plurality of semiconductor regions defined in the semiconductor substrate and isolated from each other by the STI features; and a multi-fin active... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130334617 - Gate structure having lightly doped region: A gate structure includes a gate dielectric over a substrate, and a gate electrode over the gate dielectric, wherein the gate dielectric contacts sidewalls of the gate electrode. The gate structure further includes a nitrogen-containing dielectric layer surrounding the gate electrode, and a contact etch stop layer (CESL) surrounding the... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130334618 - Metal oxide semiconductor field effect transistor (mosfet) gate termination: A method of forming a semiconductor device is provided that includes forming an oxide containing isolation region in a semiconductor substrate to define an active semiconductor region. A blanket gate stack including a high-k gate dielectric layer may then be formed on the active semiconductor region. At least a portion... Agent: International Business Machines Corporation

20130334619 - Integrated circuit with ion sensitive sensor and manufacturing method: Disclosed is an integrated circuit comprising a substrate (10) carrying plurality of circuit elements (20); a metallization stack (30) over said substrate for providing interconnections to at least some of said circuit elements, the metallization stack comprising a plurality of patterned metal layers (31) spatially separated from each other by... Agent:

20130334621 - Hybrid integrated component and method for the manufacture thereof: An expansion of the functional scope of a hybrid integrated component including an MEMS element, a cap for the micromechanical structure of the MEMS element, and an ASIC element having circuit components is provided. In this component, the circuit components of the ASIC element interact with the micromechanical structure of... Agent: Robert Bosch Gmbh

20130334620 - Mems devices and fabrication methods thereof: A method for fabricating a MEMS device includes providing a micro-electro-mechanical system (MEMS) substrate having a sacrificial layer on a first side, providing a carrier including a plurality of cavities, bonding the first side of the MEMS substrate on the carrier, forming a first bonding material layer on a second... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130334623 - Mems sensing device and method for the same: The present invention discloses a MEMS sensing device which comprises a substrate, a MEMS device region, a film, an adhesive layer, a cover, at least one opening, and a plurality of leads. The substrate has a first surface and a second surface opposite the first surface. The MEMS device region... Agent: Pixart Imaging Incorporation

20130334624 - Method of providing a semiconductor structure with forming a sacrificial structure: A method for providing a semiconductor structure includes forming a sacrificial structure by etching a plurality of trenches from a first main surface of a substrate. The method further includes covering the plurality of trenches at the first main surface with a cover material to define cavities within the substrate,... Agent: Infineon Technologies Ag

20130334622 - Micromechanical device and method for manufacturing a micromechanical device: A micromechanical device, in particular a sensor device, and a method for manufacturing a micromechanical device are provided. The micromechanical device has a housing, the housing including a first cavity, and the housing including a second cavity that is separate from the first cavity. The micromechanical device is configured in... Agent: Robert Bosch Gmbh

20130334626 - Hybrid integrated component and method for the manufacture thereof: A hybrid integrated component includes: at least one ASIC element having integrated circuit elements and a back-end stack; an MEMS element having a micromechanical structure, which extends over the entire thickness of the MEMS substrate; and a cap wafer. The hybrid integrated component is provided with an additional micromechanical function.... Agent: Robert Bosch Gmbh

20130334625 - Method for fabricating patterned polyimide film and applications thereof: A method for fabricating a patterned polyimide film, wherein the method comprises steps as follows: Firstly, a polyimide film is provided on a substrate. A wet planarization process is then performed to remove a portion of the polyimide film. Subsequently the planarized polyimide film is patterned.... Agent: United Microelectronics Corporation

20130334627 - Semiconductor integrated device assembly and related manufacturing process: Described herein is a semiconductor integrated device assembly, which envisages: a package defining an internal space; a first die including semiconductor material; and a second die, distinct from the first die, also including semiconductor material; the first die and the second die are coupled to an inner surface of the... Agent:

20130334628 - Process for manufacturing electro-mechanical systems: A method of avoiding stiction during vapor hydrofluoride (VHF) release of a microelectromechanical system (MEMS) or nanoelectromechanical system (NEMS) composed of a mechanical device and a substrate is described. A silicon nitride layer is provided between the substrate and a sacrificial oxide layer and/or between a device layer and the... Agent: Primaxx, Inc.

20130334633 - Magnetic tunnel junction with non-metallic layer adjacent to free layer: A spin transfer torque magnetic random access memory (STTMRAM) magnetic tunnel junction (MTJ) stack includes layers to which when electric current is applied cause switching of the direction of magnetization of at least one of the layer. The STTMRAM MTJ stack includes a reference layer (RL) with a direction of... Agent:

20130334630 - Memory cells, semiconductor device structures, memory systems, and methods of fabrication: Methods of forming magnetic memory cells are disclosed. Magnetic and non-magnetic materials are formed into a primal precursor structure in an initial stress state of essentially no strain, compressive strain, or tensile strain. A stress-compensating material, e.g., a non-sacrificial, conductive material, is formed to be disposed on the primal precursor... Agent: Micron Technology, Inc.

20130334631 - Memory cells, semiconductor device structures, memory systems, and methods of fabrication: Memory cells are disclosed. Magnetic regions within the memory cells include an alternating structure of magnetic sub-regions and coupler sub-regions. The coupler material of the coupler sub-regions antiferromagnetically couples neighboring magnetic sub-regions and effects or encourages a vertical magnetic orientation exhibited by the neighboring magnetic sub-regions. Neighboring magnetic sub-regions, spaced... Agent: Micron Technology, Inc.

20130334629 - Mtj element for stt mram: An all (111) MTJ stack is disclosed in which there are no transitions between different crystalline orientations when going from layer to layer. This is accomplished by providing strongly (111)-textured layers immediately below the MgO tunnel barrier to induce a (111) orientation therein.... Agent: Headway Technologies, Inc.

20130334632 - Nonvolatile magnetic memory device: A nonvolatile magnetic memory device using a magnetic tunneling junction (MTJ) uses as a data storage unit an MTJ including a pinned magnetic layer, a nonmagnetic insulating layer, and a free magnetic layer which are sequentially stacked. The free magnetic layer includes at least one soft magnetic amorphous alloy layer... Agent: Sk Hynix Inc.

20130334634 - Single-package bridge-type magnetic-field angle sensor: A single-package bridge-type magnetic-field angle sensor comprising one or more pairs of magnetic tunnel junction sensor chips rotated relative to each other by 90 degrees in order to detect two magnetic field components in orthogonal directions respectively is disclosed. The magnetic-field angle sensor may comprise a pair of MTJ full-bridges... Agent:

20130334635 - Pixel structure with reduced vacuum requirements: A pixel structure, which may be used for infrared bolometers or other microelectromechanical systems (MEMS) devices, configured to increase immunity of the pixel to molecular heat transfer and reduce the vacuum requirements for a wafer level packaged device incorporating the pixel or an array thereof. In one example, the pixel... Agent: Raytheon Company

20130334638 - Apparatus and method for backside illuminated image sensors: A backside illuminated image sensor comprises a photodiode and a first transistor located in a first substrate, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a plurality of logic circuits formed in a second substrate, wherein the second substrate is stacked... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130334636 - Back-illuminated image sensor and fabricating method thereof: A fabricating method of a back-illuminated image sensor includes the following steps. First, a silicon wafer having a first surface and a second surface is provided, wherein a number of trench isolations are formed in the first surface, and at least one image sensing member is formed between the trench... Agent: United Microelectronics Corporation

20130334637 - Cmos sensor with backside illumination electronic global shutter control: An apparatus comprising an image capture circuit and method for making the same. Electronic devices are formed on a first side of a substrate, each comprising a photo detector. A plurality of opaque shields are formed on a second side of the substrate corresponding to the electronic devices on the... Agent: Honeywell International Inc. Doing Business As (d.b.a.) Honeywell Scanning And Mobility

20130334640 - Image sensor, image processing device including the same, and method of fabricating the same: An image sensor includes a dielectric layer including a reflector, a photo-electric conversion region on the dielectric layer, and a resonance layer on the photo-electric conversion region, the resonance layer including ribbed materials arranged in a concentric pattern.... Agent: Samsung Electronics Co., Ltd.

20130334639 - Photodiode with reduced dead-layer region: A photodiode structure having an illuminated front-side surface and a back-side surface includes a front-side doped layer having a first conductivity type, a back-side doped layer having the first conductivity type, a front-side active cell region made sensitive to light by the action of at least one plug region formed... Agent: Aeroflex Colorado Springs Inc.

20130334641 - Solid-state image sensor, method for manufacturing the same, and camera: A method for manufacturing a solid-state image sensor having a pixel region, a peripheral circuit region, and an intermediate region interposed between the pixel region and the peripheral circuit region, includes forming a high melting point metal compound in active regions of the peripheral circuit region and the intermediate region,... Agent:

20130334642 - Solid-state imaging device, electronic apparatus, and method for manufacturing the same: A solid-state imaging device includes photoelectric conversion elements on an imaging surface of a substrate, receiving light incident on a light receiving surface and performing photoelectric conversion to produce a signal charge. Electrodes are interposed between the photoelectric conversion elements and light blocking portions are provided above the electrodes and... Agent: Sony Corporation

20130334643 - Semiconductor device and manufacturing method for semiconductor device: An image pickup apparatus includes a semiconductor chip including a light receiving section, a frame-like spacer arranged on the semiconductor chip to surround the light receiving section, a transparent flat plate section arranged on the semiconductor chip via the spacer and having a plan view dimension larger than a plan... Agent: Olympus Corporation

20130334644 - Integrated photodiode for semiconductor substrates: A substrate section that is at least partially fabricated to include contact elements and materials. The substrate section includes doped regions that have a heavily doped N-type region and a heavily doped P-type region adjacent to one another. An exterior surface of the substrate has a topography that includes a... Agent: Tau-metrix, Inc.

20130334645 - Front side implanted guard ring structure for backside: A method of forming a backside illuminated image sensor includes forming a guard ring structure of a predetermined depth in a front-side surface of a semiconductor substrate, the guard ring structure outlining a two-dimensional array of pixels, each pixel of the array of pixels separated from an adjacent pixel by... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130334646 - Metallic thermal sensor for ic devices: A thermal sensor for use in an IC device is formed of a plurality of metal resistor units connected in series where each of the plurality of metal resistor units are formed on different wiring layers of the IC device connected by via segments and the metal resistor units are... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20130334647 - Semiconductor device: A semiconductor device has a gate electrode including a leg part and a canopy part. A barrier layer is formed on a bottom face of the leg part of the gate electrode. In addition, on the lower surface of the barrier layer, a Schottky metal layer with an electrode width... Agent: Kabushiki Kaisha Toshiba

20130334648 - Methods and apparatus for high voltage diodes: High voltage diodes are disclosed. A semiconductor device is provided having a P well region; an N well region adjacent to the P well region and forming a p-n junction with the P well region; a P+ region forming an anode at the upper surface of the semiconductor substrate in... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130334649 - Semiconductor device having variably laterally doped zone with decreasing concentration formed in the termination region: In a semiconductor body, a semiconductor device has an active region with a vertical drift section of a first conduction type and a near-surface lateral well of a second, complementary conduction type. An edge region surrounding this active region comprises a variably laterally doped doping material zone (VLD zone). This... Agent: Infineon Technologies Austria Ag

20130334651 - Dual shallow trench isolation liner for preventing electrical shorts: A shallow trench is formed to extend into a handle substrate of a semiconductor-on-insulator (SOI) layer. A dielectric liner stack of a dielectric metal oxide layer and a silicon nitride layer is formed in the shallow trench, followed by deposition of a shallow trench isolation fill portion. The dielectric liner... Agent: Commissariat A L'energie Atomique Et Aux Energies Alternatives

20130334652 - Nitride shallow trench isolation (sti) structures: A shallow trench isolation (STI) structure includes a top surface formed completely of silicon nitride. The top surface of the STI structure is coplanar with a top substrate surface or extends above the top substrate surface. The STI structures include further dielectric materials beneath the silicon nitride and an oxide... Agent: Wafertech, LLC

20130334653 - Semiconductor device with an edge termination structure: A semiconductor device having a semiconductor die and an edge termination structure is provided. The semiconductor die includes an outer edge and an active area defining a main horizontal surface and being spaced apart from the outer edge. The edge termination structure includes at least one vertical trench having an... Agent: Infineon Technologies Austria Ag

20130334650 - Semiconductor structure and process thereof: A semiconductor structure is located in a recess of a substrate. The semiconductor structure includes a liner, a silicon rich layer and a filling material. The liner is located on the surface of the recess. The silicon rich layer is located on the liner. The filling material is located on... Agent:

20130334654 - Semiconductor device and method of manufacturing the same: Disclosed is a semiconductor device including: a semiconductor substrate, an element isolating trench structure that includes an element isolating trench formed in one main surface of the semiconductor substrate, an insulating material that is formed within the element isolating trench, element formation regions that are surrounded by the element isolating... Agent:

20130334655 - Semiconductor device and method of manufacturing the same: Disclosed is a semiconductor device including: a semiconductor substrate; first and second element isolating trenches that are formed in one main surface of the semiconductor substrate separately from each other; a first insulating material that is formed within the first element isolating trench; a plurality of first element formation regions... Agent:

20130334656 - Electrical interconnection structures including stress buffer layers: Provided are electrical connection structures and methods of fabricating the same. The structures may include a substrate including a bonding pad region provided with a bonding pad and a fuse region provided with a fuse, an insulating layer provided on the substrate and including a bonding pad opening exposing the... Agent: Samsung Electronics Co., Ltd.

20130334660 - Capacitor structure: One or more embodiments relate to a semiconductor device, comprising: a substrate; and a plurality of first conductive vias, the first conductive vias electrically coupled together, each of the first conductive vias passing through the substrate; and a plurality of second conductive vias, the second conductive vias electrically coupled together,... Agent:

20130334658 - Method and system for improved matching for on-chip capacitors: Methods and systems for improved matching of on-chip capacitors may comprise a semiconductor die with an on-chip capacitor comprising one or more metal layers. The on-chip capacitor may comprise interdigitated electrically coupled metal fingers. The electrically coupled metal fingers may be arranged symmetrically in the semiconductor die to compensate for... Agent:

20130334659 - Multiple depth vias in an integrated circuit: An integrated circuit with vias with different depths stopping on etch stop layers with different thicknesses. A method of simultaneously etching vias with different depths without causing etch damage to the material being contacted by the vias.... Agent:

20130334657 - Planar interdigitated capacitor structures and methods of forming the same: A planar interdigitated capacitor structure, methods of forming, and devices including, the same. The device includes first and second planar electrode structures including respective first and second pluralities of planar continuous rectangular plate electrode elements formed above a semiconductor substrate and extending continuously in first and second orthogonal directions substantially... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20130334661 - Semiconductor device, manufacturing method of the semiconductor device: A two-layered polysilicon capacitive element is manufactured to enable suppression of both of an increase in the applied electric field dependence of the capacitance value and the initial defect of the dielectric film. Included are a lower electrode into which phosphorous ions are implanted, a dielectric film formed on the... Agent: Asahi Kasei Microdevices Corporation

20130334662 - Current sensing using a metal-on-passivation layer on an integrated circuit die: A current sense resistor integrated with an integrated circuit die where the integrated circuit die is housed in a flip-chip semiconductor package includes a metal layer formed over a passivation layer of the integrated circuit die where the metal layer having an array of metal pillars extending therefrom. The metal... Agent: Micrel, Inc.

20130334663 - Metal-on-passivation resistor for current sensing in a chip-scale package: A current sense resistor integrated with an integrated circuit die housed in a chip-scale semiconductor package includes a metal layer formed over a passivation layer of the integrated circuit die where the metal layer having an array of metal pillars extending therefrom. The metal pillars are to be electrically connected... Agent: Micrel, Inc.

20130334664 - Interface control in a bipolar junction transistor: Methods of fabricating bipolar junction transistors, bipolar junction transistors, and design structures for a bipolar junction transistor. A first portion of the intrinsic base layer is masked while a second portion of an intrinsic base layer is etched. As a consequence of the masking, the second portion of the intrinsic... Agent: International Business Machines Corporation

20130334665 - Semiconductor device: A semiconductor device is disclosed with a protection device formed of a parasitic bipolar transistor, a parasitic diode and a parasitic resistance and operated at a lowered operating voltage to be capable of improving a blocking capability against an over voltage. The impurity concentration in a semiconductor layer as the... Agent:

20130334666 - Plasma-assisted atomic layer epitaxy of cubic and hexagonal inn and its alloys with aln at low temperatures: Described herein is a method for growing indium nitride (InN) materials by growing hexagonal and/or cubic InN using a pulsed growth method at a temperature lower than 300° C. Also described is a material comprising InN in a face-centered cubic lattice crystalline structure having an NaCl type phase.... Agent: The Government Of The United Stated Of America, As Represented By The Secretary Of The Navy

20130334667 - Alkaline etching liquid for texturing a silicon wafer surface: An etching liquid for texturing a silicon wafer surface is provided. The etching liquid may include an aqueous solution of at least one alkaline etching agent and at least one polysaccharide or derivative thereof. Also provided is a process for texture etching a silicon wafer using the etching liquid of... Agent: Solarworld Industries America, Inc.

20130334668 - Integrated circuit packaging system with an encapsulation and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: forming an integrated circuit device having a device contact surface, a device lateral side, and a device backside opposite the device contact surface; forming a device shell, having a shell lip, contiguous with the device backside and the device... Agent:

20130334669 - Semiconductor device: A semiconductor device includes a substrate; an inter layer dielectric disposed on the substrate; a TSV penetrating the substrate and the ILD. In addition, a plurality of shallow trench isolations (STI) is disposed in the substrate, and a shield ring is disposed in the ILD surrounding the TSV on the... Agent:

20130334670 - Semiconductor device and fabrication method thereof: A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a first type semiconductor layer doped with an N type ion, a second type semiconductor layer formed over the first type semiconductor layer, and a silicon germanium (SiGe) layer doped with a P type ion formed... Agent: Sk Hynix Inc.

20130334672 - Semiconductor device and manufacturing method thereof: In a semiconductor device, semiconductor chips and lead frames are soldered at the same time on an insulating circuit board by one reflow soldering, and the positions of the externally led out lead frames undergo no change. In manufacturing the semiconductor device, after power semiconductor chips and control ICs are... Agent: Fuji Electric Co., Ltd

20130334671 - Semiconductor package and lead frame thereof: A semiconductor package includes a lead frame, at least one chip and a molding compound. The lead frame comprises a plurality of leads, each lead comprises a first end portion and at least one coupling protrusion, wherein the first end portion comprises a first upper surface, the coupling protrusion comprises... Agent: Chipbond Technology Corporation

20130334673 - Flexible power module semiconductor packages: Power module semiconductor packages that contain a flexible circuit board and methods for making such packages are described. The semiconductor package contain a flexible circuit board, a conductive film on a first portion of the upper surface of the flexible circuit board, a land pad on a second portion of... Agent:

20130334674 - Integrated circuit packaging system with tiebar-less design and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a die attach pad integrally connected to a connector portion and a lead; attaching an integrated circuit die to the die attach pad; connecting an internal interconnect to the integrated circuit die and the lead; forming an encapsulation... Agent:

20130334675 - Package structure having lateral connections: An embodiment of a packaged semiconductor device includes a communication pad formed in a side surface, which is operatively coupled to a communication circuit so as to enable the establishing of a wireless communication channel to an adjacently positioned packaged semiconductor device. The communication pad may be formed upon cutting... Agent:

20130334676 - Semiconductor module and manufacturing method thereof: A semiconductor module is manufactured by bonding a resin case having a first opening through which surfaces of main circuit terminals and control terminals are exposed, onto a metal heat-dissipating substrate onto which is bonded, a conductive-patterned insulating substrate onto which are bonded, semiconductor chips, the main circuit terminals, and... Agent: Fuji Electric Co., Ltd.

20130334677 - Semiconductor modules and methods of formation thereof: In accordance with an embodiment of the present invention, a semiconductor module includes a first semiconductor device having a first plurality of leads including a first gate/base lead, a first drain/collector lead, and a first source/emitter lead. The module further includes a second semiconductor device and a circuit board. The... Agent: Infineon Technologies Ag

20130334678 - Device for supporting a substrate, as well as methods for manufacturing and using such a device: A device (10) supports a substrate during the manufacture of semiconductor components. The device includes a substantially flat plate with an upper surface (11) on which the substrate can be positioned. In some embodiments, the device (10) is of inexpensive and simple construction and allows for the passage of a... Agent:

20130334679 - Metal conservation with stripper solutions containing resorcinol: Resist stripping agents useful for fabricating circuits and/or forming electrodes on semiconductor devices for semiconductor integrated circuits and/or liquid crystals with reduced metal and metal alloy etch rates (particularly copper etch rates and TiW etch rates), are provided with methods for their use. The preferred stripping agents contain low concentrations... Agent: Dynaloy, LLC

20130334683 - Electronic device packages having bumps and methods of manufacturing the same: An electronic device package includes a bump having a post disposed on a contact portion of a semiconductor chip and an enlarged portion laterally protruded from an upper portion of the post; an interconnection portion having a locking portion that substantially surrounds the enlarged portion and an upper sidewall of... Agent: Sk Hynix Inc.

20130334682 - Embedded packages including a multi-layered dielectric layer and methods of manufacturing the same: The embedded package includes a semiconductor chip having contact portions disposed on a top surface thereof, a first dielectric layer substantially surrounding sidewalls of the semiconductor chip and including first fillers dispersed therein, a second dielectric layer substantially covering the top surface of the semiconductor chip and including second fillers... Agent: Sk Hynix Inc.

20130334681 - Semiconductor package structure and method for making the same: A semiconductor package structure includes a first substrate, a second substrate and an encapsulant. The first substrate comprises a plurality of first bumps and a plurality of first solder layers. Each of the first solder layers is formed on each of the first bumps and comprises a cone-shaped slot having... Agent: Chipbond Technology Corporation

20130334684 - Substrate structure and package structure: A substrate structure is provided, including a substrate body and a plurality of traces formed on a surface of the substrate body. At least one of the traces has an electrical contact formed in a groove thereof for electrically connecting an external element, thereby meeting the demands of fine line/fine... Agent: Siliconware Precision Industries Co., Ltd.

20130334680 - Wafer level packages of high voltage units for implantable medical devices and corresponding fabrication methods: A multi-chip modular wafer level package of a high voltage unit for an implantable cardiac defibrillator includes one or more high voltage (HV) component chips encapsulated with other components thereof in a polymer mold compound of a single reconstituted wafer, wherein all interconnect segments are preferably located on a single... Agent: Medtronic, Inc.

20130334685 - Embedded packages and methods of manufacturing the same: An embedded package that may be realized by surrounding a semiconductor chip (or a semiconductor die) in a package substrate. A semiconductor chip of an embedded package may be electrically connected to external connection terminals through interconnection wires instead of bumps, and the interconnection wires may be formed using a... Agent: Sk Hynix Inc.

20130334686 - Carrier-free land grid array ic chip package and preparation method thereof: A carrier-free land grid array (LGA) Integrated Circuit (IC) chip package and a preparation method thereof are provided. The IC chip package includes: an inner pin, an IC chip, a pad, a bonding wire, and a mold cap. The inner pin is designed to be a multi-row matrix form at... Agent: Tianshui Huatian Technology Co., Ltd.

20130334688 - Multi-elements-doped zinc oxide film, manufacturing method and application thereof: The invention relates to the semiconductor material manufacturing technical field. A multi-elements-doped zinc oxide film as well as manufacturing method and application in photo-electric devices thereof are provided. The manufacturing method comprises the following steps: (1) mixing the powder of Ga2O3, Al2O3, SiO2 and ZnO according to the following percentage... Agent: Ocean's King Lighting Science & Technology Co., Ltd.

20130334687 - Semiconductor device: A semiconductor device includes a semiconductor element, a lead, and a wire including a first bonding portion bonded to the semiconductor element and a second bonding portion bonded to the lead. The semiconductor element includes a first bonding surface which faces to a first side in a first direction and... Agent:

20130334689 - Apparatus and method for low contact resistance carbon nanotube interconnect: An apparatus comprises a first dielectric layer formed over a substrate, a first metal line embedded in the first dielectric layer, a second dielectric layer formed over the first dielectric layer, a second metal line embedded in the second dielectric layer, an interconnect structure formed between the first metal line... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130334690 - Semiconductor structure and process thereof: A semiconductor structure includes a work function metal layer, a (work function) metal oxide layer and a main electrode. The work function metal layer is located on a substrate. The (work function) metal oxide layer is located on the work function metal layer. The main electrode is located on the... Agent:

20130334691 - Sidewalls of electroplated copper interconnects: A structure formed in an opening having a substantially vertical sidewall defined by a non-metallic material and having a substantially horizontal bottom defined by a conductive pad, the structure including a diffusion barrier covering the sidewall and a fill composed of conductive material. The structure including a first intermetallic compound... Agent: International Business Machines Corporation

20130334692 - Bonding package components through plating: A method includes aligning a first electrical connector of a first package component to a second electrical connector of a second package component. With the first electrical connector aligned to the second electrical connector, a metal layer is plated on the first and the second electrical connectors. The metal layer... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130334693 - Raised silicide contact: A method for forming a raised silicide contact, the method including depositing a layer of silicon using a gas cluster implant technique which accelerates clusters of silicon atoms causing them to penetrate a surface oxide on a top surface of the silicide; heating the silicide including the silicon layer to... Agent: International Business Machines Corporation

20130334696 - Bumpless build-up layer package design with an interposer: The present disclosure relates to the field of integrated circuit package design and, more particularly, to packages using a bumpless build-up layer (BBUL) designs. Embodiments of the present description relate to the field of fabricating microelectronic packages, wherein an interposer, such as a through-silicon via interposer, may be used in... Agent:

20130334695 - Electronic device and method of manufacturing such device: The invention relates to an electronic device (200) for protection against transient voltages in high-power applications. The electronic device (200) comprises: i) a semiconductor substrate (220) comprising an active element (Dd) having at least two terminals (T1, T2); ii) a conductive pad (225) provided on said substrate (220) and being... Agent:

20130334694 - Packaging substrate, semiconductor package and fabrication method thereof: A packaging substrate is provided, including: a metal board having a first surface and a second surface opposite to the first surface, wherein the first surface has a plurality of first openings for defining a first core circuit layer therebetween, the second surface has a plurality of second openings for... Agent: Siliconware Precision Industries Co., Ltd.

20130334704 - Deposition and selective removal of conducting helplayer for nanostructure processing: A method for making one or more nanostructures is disclosed, the method comprising: depositing a conducting layer on an upper surface of a substrate; depositing a patterned layer of catalyst on the conducting layer; growing the one or more nanostructures on the layer of catalyst; and selectively removing the conducting... Agent: Smoltek Ab

20130334700 - Etch damage and esl free dual damascene metal interconnect: A method of forming a dual damascene metal interconnect for a semiconductor device. The method includes forming a layer of low-k dielectric, forming vias through the low-k dielectric layer, depositing a sacrificial layer, forming trenches through the sacrificial layer, filling the vias and trenches with metal, removing the sacrificial layer,... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20130334697 - Integrated circuit packaging system with through silicon via and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a bottom integrated circuit having bottom through silicon vias with a bottom via pitch; mounting outer interconnects over the bottom integrated circuit; and mounting a top integrated circuit between the outer interconnects, the top integrated circuit having top... Agent:

20130334698 - Microelectronic assembly tolerant to misplacement of microelectronic elements therein: A microelectronic assembly tolerant to misplacement of microelectronic elements therein may include a molded structure containing a plurality of microelectronic elements. Each microelectronic element has elements contacts having first and second dimensions in respective first and second directions that are transverse to each other, where the first dimension is at... Agent: Invensas Corporation

20130334705 - Semiconductor device: The semiconductor device 100 comprises a first semiconductor element 113 provided on a face on one side of a flat plate shaped interconnect component 101, an insulating resin 119 covering a face of a side where the first semiconductor element 113 of the interconnect component 101 is provided and a... Agent: Renesas Electronics Corporation

20130334699 - Semiconductor device and fabricating method thereof: A semiconductor device includes a substrate with a front side and a back side, an ILD, disposed on the substrate, a cap layer disposed on the backside of the substrate, a TSV penetrating the cap layer, the substrate and the ILD, wherein a cap layer sidewall in the TSV juts... Agent:

20130334702 - Semiconductor memory device, memory system including the same and method of manufacturing the same: A semiconductor memory device of the present invention includes a first dielectric layer located on an upper surface of a semiconductor substrate including contact area and a non-contact area, an etching stop layer pattern formed to expose the first dielectric layer in the non-contact area and cover the first dielectric... Agent:

20130334701 - Through silicon via wafer and methods of manufacturing: A through silicon via with sidewall roughness and methods of manufacturing the same are disclosed. The method includes forming a via in a substrate and roughening a sidewall of the via by depositing material within the via. The method further includes removing a backside of the substrate to form a... Agent: International Business Machines Corporation

20130334703 - Wiring substrate and method of manufacturing the same: A wiring substrate includes a core substrate including a first wiring layer, an interlayer insulating layer formed by a resin layer containing fiber reinforcement material formed on the core substrate and a primer layer formed on the resin layer containing fiber reinforcement material, and the interlayer insulating layer having a... Agent:

20130334707 - Apparatus, system, and method for wireless connection in integrated circuit packages: Some embodiments of the invention include a connecting structure between a support and at least one die attached to the support. The die includes a number of die bond pads on a surface of the die. The connecting structure includes a plurality of via and groove combinations. Conductive material is... Agent:

20130334710 - Contact and method of formation: A system and method for forming contacts is provided. An embodiment comprises forming the contacts on a substrate and then coining the contacts by physically shaping them using, e.g., a molding chamber. The physical shaping of the contacts may be performed using a patterned portion of the molding chamber or... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130334706 - Integrated circuit package and method of making same: A chip package includes a first die with an active surface having at least one die pad positioned thereon; a first adhesive layer having a first surface coupled to the active surface of the first die and a second surface opposite the first surface; and a first dielectric layer having... Agent:

20130334709 - Stacked semiconductor device and manufacturing method thereof: In an embodiment, a first semiconductor wafer having plural first chip areas sectioned by first dicing grooves, and first photosensitive surface protection and adhesive layers provided at each of circuit surfaces of the plural first chip areas is prepared. A second semiconductor wafer having plural second chip areas sectioned by... Agent: Kabushiki Kaisha Toshiba

20130334708 - Stacked semiconductor package having electrical connections of varying heights between substrates, and semiconductor device including the stacked semiconductor package: A stacked semiconductor package has a first semiconductor package including a first package substrate and a first semiconductor chip mounted on the first package substrate, a second semiconductor package including a second package substrate and a second semiconductor chip mounted on the second package substrate, and a plurality of connections... Agent: Samsung Electronics Co., Ltd.

20130334711 - Copper feature design for warpage control of substrates: An approach is provided in which a laminate substrate includes top layers, bottom layers, and a core layer. The top layers are positioned between the core layer and a top surface metallurgy (TSM) layer and include at least one top conductive layer. The bottom layers are positioned between the core... Agent: International Business Machines Corporation

20130334712 - A method for manufacturing a chip package, a method for manufacturing a wafer level package, a chip package and a wafer level package: A method for manufacturing a chip package is provided. The method includes forming a layer over a carrier; forming further carrier material over the layer; selectively removing one or more portions of the further carrier material thereby releasing one or more portions of the layer from the further carrier material;... Agent: Infineon Technologies Ag

20130334713 - Electrostatic discharge compliant patterned adhesive tape: The present disclosure relates to the field of fabricating microelectronic devices, wherein a microelectronic device substrate, such as a microelectronic wafer, may be thinned by a backgrinding process using a patterned adhesive tape that reduces slurry seepage and adhesive contamination while also reducing the potential of electrostatic discharge damage. The... Agent:

20130334714 - Integrated circuit packaging system with warpage prevention mechanism and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes providing a substrate; connecting an integrated circuit die; forming a molding having a temperature-dependent characteristic directly on the top surface of the substrate; and forming a coupling encapsulation having a coupled characteristic different from the temperature-dependent characteristic directly on... Agent:

  
12/12/2013 > 217 patent applications in 96 patent subcategories. patent applications/inventions, industry category

20130328005 - Three-dimensional resistive random access memory devices, methods of operating the same, and methods of fabricating the same: A semiconductor device includes a substrate extending in a horizontal direction. An active pillar is present on the substrate extending in a vertical direction relative to the horizontal direction of extension of the substrate. A variable resistive pattern is present on the substrate extending in the vertical direction along the... Agent:

20130328006 - Switching device and memory device including the same: A switching device includes a first electrode, a bipolar tunneling layer, and a second electrode. The bipolar tunneling layer is formed on the first electrode and includes a plurality of dielectric layers having different dielectric constants. The second electrode is formed on the bipolar tunneling layer.... Agent: Sk Hynix Inc.

20130328007 - Non-volatile solid state resistive switching devices: Non-crystalline silicon non-volatile resistive switching devices include a metal electrode, a non-crystalline silicon layer and a planar doped silicon electrode. An electrical signal applied to the metal electrode drives metal ions from the metal electrode into the non-crystalline silicon layer to form a conducting filament from the metal electrode to... Agent:

20130328008 - Nonvolatile resistance change element: According to one embodiment, a nonvolatile resistance change element includes a first electrode, a second electrode and a first layer. The first electrode includes a metal element. The second electrode includes an n-type semiconductor. The first layer is formed between the first electrode and the second electrode and includes a... Agent: Kabushiki Kaisha Toshiba

20130328009 - Nonvolatile variable resistance element: According to one embodiment, a nonvolatile variable resistance element includes a first electrode, a second electrode, a variable resistance layer, and a dielectric layer. The second electrode includes a metal element. The variable resistance layer is arranged between the first electrode and the second electrode. A resistance change is reversibly... Agent: Kabushiki Kaisha Toshiba

20130328012 - Light emitting diode structure utilizing zinc oxide nanorod arrays on one or more surfaces, and a low cost method of producing such zinc oxide nanorod arrays: A method of fabricating a Light Emitting Diode with improved light extraction efficiency, comprising depositing a plurality of Zinc Oxide (ZnO) nanorods on one or more surfaces of a III-Nitride based LED, by growing the ZnO nanorods from an aqueous solution, wherein the surfaces are different from c-plane surfaces of... Agent: The Regents Of The University Of California

20130328010 - Light-emitting diode and method for manufacturing the same: A high brightness light-emitting diode free of p-type gallium nitride (GaN) layer is provided, which includes an n-type semiconductor layer, a multi-quantum well (MQW) layer, a p-type indium gallium nitride (InGaN) layer and an indium tin oxide (ITO) layer. The grain size of the ITO layer is ranging from 5... Agent: Lextar Electronics Corporation

20130328013 - Nitride semiconductor ultraviolet light-emitting element: A nitride semiconductor ultraviolet light-emitting element is formed by laminating at least an n-type cladding layer configured of an n-type AlGaN semiconductor layer, an active layer including an AlGaN semiconductor layer having band gap energy of 3.4 eV or larger, and a p-type cladding layer configured of a p-type AlGaN... Agent: Soko Kagaku Co., Ltd.

20130328011 - Semiconductor light-emitting element and light-emitting device: While maintaining unity of wavelength of light emitted from a semiconductor light emitting element, decrease of light emission efficiency with an increase in environmental temperature is suppressed. A semiconductor light-emitting element includes: an n-cladding layer; a light emitting layer laminated on the n-cladding layer; and a p-type semiconductor layer laminated... Agent:

20130328014 - Gaas/ingaas axial heterostructure formation in nanopillars by catalyst-free selective area mocvd: An axially hetero-structured nanowire includes a first segment that includes GaAs, and a second segment integral with the first that includes InxGa1-xAs. The parameter x has a maximum value x-max within the second segment that is at least 0.02 and less than 0.5. A nanostructured semiconductor component includes a GaAs... Agent: The Regents Of The University Of California

20130328015 - Extreme high mobility cmos logic: A CMOS device includes a PMOS transistor with a first quantum well structure and an NMOS device with a second quantum well structure. The PMOS and NMOS transistors are formed on a substrate.... Agent:

20130328016 - Graphene sensor: A method for forming a sensor includes forming a channel in substrate, forming a sacrificial layer in the channel, forming a sensor having a first dielectric layer disposed on the substrate, a graphene layer disposed on the first dielectric layer, and a second dielectric layer disposed on the graphene layer,... Agent: International Business Machines Corporation

20130328017 - Side-gate defined tunable nanoconstriction in double-gated graphene multilayers: A graphene-based electrically tunable nanoconstriction device and a non-transitory tangible computer readable medium encoded with a program for fabricating the device that includes a back-gate dielectric layer over a conductive substrate are described. The back-gate dielectric layer may be hexagonal boron nitride, mica, SiOx, SiNx, BNx, HfOx or AlOx. A... Agent: International Business Machines Corporation

20130328021 - Compound for organic light-emitting device and organic light-emitting device including the same: Embodiments of the present disclosure are directed to a compound represented by Formula 1, and to organic light-emitting diodes including the compound.... Agent: Samsung Display Co., Ltd.

20130328041 - Compounds having bipyridyl group and carbazole ring, and organic electroluminescent element: The present invention relates to a compound having a bipyridyl group and a carbazole ring, which is represented by the following general formula (1); and an organic electroluminescent element containing a pair of electrodes and at least one organic layer interposed therebetween, in which the compound is used as a... Agent: Hodogaya Chemical Co., Ltd.

20130328026 - Ferroelectric devices, interconnects, and methods of manufacture thereof: A ferroelectric device comprising: a substrate; a first electrode disposed on the substrate; a ferroelectric layer disposed on and in contact with the first electrode; and a second electrode disposed on and in contact with the ferroelectric layer, wherein at least one of the first electrode and the second electrode... Agent:

20130328018 - Fluorine-modification process and applications thereof: The present invention is related to a process for reducing surface energy of a hole transport layer. The disclosed process comprises providing a hole transport layer; and providing a fluorine-containing layer directly on said hole transport layer. The configuration of said fluorine-containing layer reduces the structural disorder of an active... Agent: Academia Sinica

20130328019 - Metal complex with three different ligands: Compounds comprising the formula L1L2MX wherein L1, L2, and X are distinct bidentate ligands that form an octahedral complex on the metal M, wherein M is a metal with an atomic weight greater than 40. Compounds of this formula are sublimated more facilely than octahedral metal complexes where L1, L2,... Agent: Universal Display Corporation

20130328036 - Method for producing organic transistor, organic transistor, method for producing semiconductor device, semiconductor device, and electronic apparatus: m

20130328020 - Method of repairing short circuit defect, and display apparatus and organic light emitting display apparatus manufactured according to the repairing method: A method of repairing a defective pixel in a display apparatus that includes forming an insulating layer to cover the plurality of second signal wires, cutting both sides of a region of the corresponding second signal wire of the defective pixel and the insulating layer to form both sides of... Agent:

20130328029 - Microcavity oleds for lighting: Various methods and systems are provided for related to organic light emitting diodes (OLEDs) having a microcavity. In one embodiment, a white-light source includes a first microcavity organic light emitting diode (OLED) configured to emit a narrow spectrum of blue light; a second microcavity OLED configured to emit a narrow... Agent: University Of Florida Research Foundation, Inc.

20130328023 - Molecular memory: A molecular memory device has an insulating film with a cavity, the cavity having an upper portion and a lower portion; a first conductive member with a portion exposed at the lower portion of the cavity; a second conductive member with a portion exposed at the upper portion of the... Agent: Kabushiki Kaisha Toshiba

20130328025 - Organic el device: m

20130328030 - Organic electroluminescence device and organic light emitting medium: An organic electroluminescence device having a layer of an organic light emitting medium which comprises (A) a specific arylamine compound and (B) at least one compound selected from specific anthracene derivatives, spirofluorene derivatives, compounds having condensed rings and metal complex compounds and is disposed between a pair of electrodes and... Agent: Idemitsu Kosan Co., Ltd.

20130328024 - Organic electroluminescence display panel and manufacturing method: A organic EL display panel and similar are provided so as to constrain a gradual increase in contact resistance between a common electrode and a power supply layer. In a panel including a substrate, a pixel electrode, a power supply layer formed with separation from the pixel electrode, a resin... Agent: Panasonic Corporation

20130328039 - Organic electroluminescence display panel and organic electroluminescence display device: A hole injection layer and a second electrode are both formed to be continuous above a first electrode and above an auxiliary wiring. The hole injection layer contains a tungsten oxide. An UPS spectrum, obtained from a UPS measurement, has a protrusion appearing near a Fermi surface and within a... Agent: Panasonic Corporation

20130328040 - Organic electroluminescent device: An organic electroluminescent device comprising, between an anode and a cathode, a hole-transporting layer, a luminous layer and an electron-transporting layer, wherein the hole-transporting layer contains an arylamine compound (X) having a molecular structure to which three or more triphenylamine skeletons are singly bonded or bonded through a divalent hydrocarbon... Agent: Hodogaya Chemical Co., Ltd.

20130328027 - Organic electroluminescent element: [It is an object] to provide an organic electroluminescent element with which the initial durability of the element can be greatly improved while maintaining the efficiency of the element at a high level. This is an organic electroluminescent element having an anode, a hole injection layer, a first hole transport... Agent: Udc Ireland Limited

20130328031 - Organic electroluminescent element, display device and lighting device: Disclosed is an organic electroluminescent device having long life, while exhibiting high luminous efficiency. Also disclosed are an illuminating device and a display, each using such an organic electroluminescent device. In the organic electroluminescent device, a compound represented by the general formula (A) which is suitable as a host material... Agent: Konica Minolta, Inc.

20130328032 - Organic electroluminescent element, display device and lighting device: Disclosed is an organic electroluminescent device having long life, while exhibiting high luminous efficiency. Also disclosed are an illuminating device and a display, each using such an organic electroluminescent device. In the organic electroluminescent device, a compound represented by the general formula (A) which is suitable as a host material... Agent: Konica Minolta, Inc.

20130328037 - Organic electroluminescent element, lighting device, and display device: An object of the present invention is to provide an organic electroluminescent element that has low drive voltage, high emission efficiency, long endurance and an excellent effect of preventing generation of dark spots. Another object of the present invention is to provide a lighting device and a display device each... Agent: Konica Minolta , Inc.

20130328022 - Organic light-emitting display device and method of manufacturing the same: An organic light-emitting display device and a method of manufacturing the organic light-emitting display device are provided. The organic light-emitting display device includes a plurality of pixels each including: a first region including a light-emitting region for emitting light, a first electrode and an emission layer covering the first electrode... Agent: Samsung Display Co., Ltd.

20130328038 - Phosphorescent material, process for producing phosphorescent material, and phosphorescent element: In the general formula (1), end substituents R1 and R2 each is a hydrogen atom, an alkyl group having 1 to 20 carbon atoms, or the like, substituents a to l and o to s each is a hydrogen atom or the like, the central metal M is platinum or... Agent: Panasonic Corporation

20130328028 - Photocurable composition, protective layer including the same, and encapsulated apparatus including the same: Disclosed are a photocurable composition which includes (A) a photocurable monomer and (B) a monomer represented by Formula 1, and an apparatus including a protective layers formed of the composition;... Agent:

20130328033 - Thin-film transistor device and method for manufacturing same, organic electroluminescent display element, and organic electroluminescent display device: A thin film transistor element is formed in each of adjacent first and second apertures defined by partition walls. In plan view of a bottom portion of the first aperture, a center of a total of areas of a source electrode portion and a drain electrode portion is offset from... Agent: Panasonic Corporation

20130328034 - Thin-film transistor device and method for manufacturing same, organic electroluminescent display element, and organic electroluminescent display device: In a thin film transistor device, partition walls define first, second, and third apertures. In plan view, at a bottom portion of the first aperture, a center of a total of areas of a source electrode portion and a drain electrode portion is offset from a center of area of... Agent: Panasonic Corporation

20130328035 - Thin-film transistor element and method for manufacturing same, organic electroluminescent display element, and organic electroluminescent display device: A thin film transistor element includes a gate electrode, an insulating layer formed on the gate electrode, and partition walls formed on the insulating layer and defining a first aperture above the gate electrode. The thin film transistor element further includes, at a bottom portion of the first aperture, a... Agent: Panasonic Corporation

20130328045 - Field effect transistor, display device , sensor, and method of manufacturing field effect transistor: A field effect transistor including: a gate insulating film; an oxide semiconductor layer that serves as an active layer and whose main structural elements are Sn, Zn and O, or Sn, Ga, Zn and O; and an oxide intermediate layer that is disposed between the gate insulating film and the... Agent: Fujifilm Corporation

20130328044 - Manufacturing method of semiconductor device: An object is to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, impurities... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130328042 - Precursor composition of oxide semiconductor, thin film transistor substrate including oxide semiconductor, and method of manufacturing thin film transistor substrate including oxide semiconductor: A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor... Agent: Samsung Display Co., Ltd.

20130328043 - Thin film transistor substrate and manufacturing method thereof, display: An embodiment of the invention provides a thin film transistor substrate includes: a substrate; a plurality of transistors on the substrate, wherein each of the transistors includes: a light-blocking layer on the substrate; an active layer on the light-blocking layer; a gate insulating layer on the substrate and covering the... Agent:

20130328046 - Semiconductor device and a method of manufacturing the same: A device featuring a substrate configured to include an upper surface and an opposing lower surface and, in parallel, a first and an opposing second peripheral edge, the first peripheral edge being smaller in length than the second peripheral edge, one or more semiconductor chip mounted over the upper surface... Agent: Elpida Memory, Inc.

20130328047 - Structure for picking up a collector and method of manufacturing the same: A structure for picking up a collector region including a pair of polysilicon stacks formed in the isolation regions and extending below the collector region; and a pair of collector electrodes contacting on the polysilicon stacks, wherein the pair of polysilicon stacks includes: an undoped polysilicon layer and a doped... Agent: Shanghai Hua Hong Nec Electronics Co., Ltd.

20130328048 - Composite substrate, electronic component, and method of manufacturing composite substrate and electronic component: A composite substrate having silicon substrate with excellent crystallinity and a method of manufacturing the composite substrate and an electronic component using the composite substrate are provided. A composite substrate (1) is configured to bond a support substrate (10) having electrical insulating property, and a silicon substrate (20) which is... Agent: Kyocera Corporation

20130328050 - Semiconductor device: It is an object of the present invention to connect a wiring, an electrode, or the like formed with two incompatible films (an ITO film and an aluminum film) without increasing the cross-sectional area of the wiring and to achieve lower power consumption even when the screen size becomes larger.... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130328049 - Thin-film transistor substrate and method of manufacturing the same: A thin-film transistor substrate includes a gate line, and a gate electrode connected to the gate line, on a base substrate; an insulating layer on the gate electrode, the insulating layer including a first part and a second part, the first part having a hydrophobic property and the second part... Agent: Samsung Display Co., Ltd.

20130328051 - Notched display layers: An electronic device may have a display mounted in a housing. The display may have layers such as polarizer layers, a color filter layer, and a thin-film transistor layer. Display layers such as color filter layers and thin-film-transistor layers may have glass substrates. Notches or other openings may be formed... Agent:

20130328052 - Pixel structure, method of manufacturing pixel structure, and active device matrix substrate:

20130328053 - Thin film transistor with increased doping regions: A transistor that may be used in electronic displays to selectively activate one or more pixels. The transistor includes a metal layer, a silicon layer deposited on at least a portion of the metal layer, the silicon layer includes an extension portion that extends a distance past the metal layer,... Agent: Apple Inc.

20130328054 - Gallium nitride based semiconductor device and method of manufacturing the same: A gallium nitride based semiconductor device includes a silicon-based layer doped simultaneously with boron (B) and germanium (Ge) at a relatively high concentration, a buffer layer on the silicon-based layer, and a nitride stack on the buffer layer. A doping concentration of boron (B) and germanium (Ge) may be higher... Agent: Samsung Electronics Co., Ltd.

20130328060 - Layout design for a high power, gan-based fet: A FET includes a first and second set of finger arrays that each include a source, gate and drain. A first source pad is electrically coupled to source electrodes in the first set of finger arrays. A second source pad is electrically coupled to the source electrodes in the second... Agent: Power Integrations, Inc.

20130328056 - Light emitting device and light emitting device package: Disclosed is a light emitting device including a substrate, a buffer layer on the substrate, and a light-emitting structure on the buffer layer. The buffer layer has a refractive index decreased toward the substrate from the light-emitting structure.... Agent: Lg Innotek Co., Ltd.

20130328057 - Light emitting diode and method of fabricating the same: Disclosed herein is a light emitting diode, the structure of the light emitting diode comprises a substrate, a first-type semiconductor layer, a structural layer, a light emitting layer, a second-type semiconductor layer, a transparent conductive layer, a first contact pad and a second contact pad in regular turn. The structural... Agent:

20130328059 - Method of manufacturing gallium nitride substrate and gallium nitride substrate manufactured thereby: A method of manufacturing a gallium nitride (GaN) substrate and a GaN substrate manufactured thereby. The method includes the steps of growing an aluminum nitride nucleation layer on a base substrate, growing a first gallium nitride film on the base substrate on which the aluminum nitride nucleation layer has been... Agent:

20130328055 - Semiconductor light emitting device: According to one embodiment, a semiconductor light emitting device includes first and second electrodes, first, second and third semiconductor layers, and a light emitting layer. The first semiconductor layer of a first conductivity type is provided on the first electrode. The light emitting layer is provided on the first semiconductor... Agent:

20130328058 - Transversely-illuminated high current photoconductive switches with geometry-constrained conductivity path: A photoconductive switch having a wide bandgap semiconductor material substrate between opposing electrodes, with one of the electrodes having an aperture or apertures at an electrode-substrate interface for transversely directing radiation therethrough from a radiation source into a triple junction region of the substrate, so as to geometrically constrain the... Agent:

20130328064 - Method and system for transient voltage suppressors: A method of forming a silicon carbide transient voltage suppressor (TVS) assembly and a system for a transient voltage suppressor (TVS) assembly are provided. The TVS assembly includes a semiconductor die in a mesa structure that includes a first layer of a first wide band gap semiconductor having a conductivity... Agent: General Electric Company

20130328063 - Method for manufacturing semiconductor substrate, and semiconductor device: An object is to provide a novel manufacturing method of a semiconductor substrate containing silicon carbide, and another object is to provide a semiconductor device using silicon carbide. A semiconductor substrate is manufactured through the steps of: adding ions to a silicon carbide substrate to form an embrittlement region in... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130328061 - Normally-off gallium nitride transistor with insulating gate and method of making the same: A normally-off transistor includes a channel layer, an electron supply layer overlaying the channel layer, a source electrode and a drain electrode on the electron supply layer, an area in the electrode supply layer between the source electrode and the drain electrode treated with a fluoride based plasma followed by... Agent: Hrl Laboratories, LLC.

20130328062 - Semiconductor device and method for producing the same: A vertical Schottky barrier transistor in which a source region SR on a SiC epitaxial substrate is constituted by a metal material is formed. The source region SR composed of a metal material can be brought into a low resistance state without performing a high-temperature activation treatment. Further, by segregating... Agent: Hitachi, Ltd.

20130328065 - Semiconductor element, semiconductor device, and semiconductor element manufacturing method: A method for fabricating a semiconductor element according to the present disclosure includes the steps of: (A) forming a first silicon carbide semiconductor layer of a first conductivity type on a semiconductor substrate; (B) forming a first mask to define a body region on the first silicon carbide semiconductor layer;... Agent: Panasonic Corporation

20130328066 - Optoelectronic semiconductor chip and method for the production thereof: An optoelectronic semiconductor chip includes a semiconductor layer stack having an active layer that generates radiation, and a radiation emission side, and a conversion layer disposed on the radiation emission side of the semiconductor layer stack, wherein the conversion layer converts at least a portion of the radiation, which is... Agent: Osram Opto Semiconductors Gmbh

20130328067 - Led module: An LED module includes a silicone substrate, an LED grain mounted on a face of the silicone substrate, a temperature sensor formed under the LED grain, a luminous sensor formed close to the LED grain and an encapsulation gel enclosing the LED grain, wherein the LED grain, the luminous sensor... Agent: Feng Chia University

20130328069 - Active device, driving circuit structure, and display panel: An active device, a driving circuit structure, and a display panel are provided. The active device includes a gate, a gate insulation layer covering the gate, a semiconductor layer disposed above the gate, an etching stop layer disposed on the gate insulation layer and the semiconductor layer, a source, and... Agent: Au Optronics Corporation

20130328068 - Devices, systems, and methods related to distributed radiation transducers: Radiation-transducer devices, e.g., lighting-emitting devices, including radiation transducers, e.g., light-emitting diodes, and associated devices, systems, and methods are disclosed herein. A radiation-transducer device configured in accordance with a particular embodiment includes a base structure including a first lead, a cap structure including a second lead, and a plurality of radiation... Agent: Micron Technology, Inc.

20130328072 - Display apparatus, manufacturing method of display apparatus, and electronic device: A display apparatus includes: a display region provided with a plurality of pixel portions; wires installed to the respective pixel portions within the display region from an outside of the display region and transmitting a signal to drive the respective pixel portions; connection pads provided on the outside of the... Agent: Sony Corporation

20130328070 - Light emitting devices and substrates with improved plating: Light emitting devices and substrates are provided with improved plating. In one embodiment, a light emitting device can include a submount and one or more light emitting diodes (LED) chips disposed over the submount. In one embodiment, the submount can include a copper (Cu) substrate, a first metallic layer of... Agent:

20130328071 - Multilayer film substrate, method of manufacturing multilayer film substrate, method of manufacturing semiconductor device, method of manufacturing display unit, and method of manufacturing electronic apparatus: A method of manufacturing a multilayer film substrate, the method includes: forming an adhesion control layer on a first substrate, the adhesion control layer including an adhesion section and a separation section; forming a to-be-peeled layer being fixed to the first substrate in the adhesion section and being inhibited from... Agent: Sony Corporation

20130328073 - Led package with multiple element light source and encapsulant having planar surfaces: LED packages are disclosed that are compact and efficiently emit light, and can comprise encapsulants with planar surfaces that refract and/or reflect light within the package encapsulant. The packages can comprise a submount with a plurality of LEDs, which emit different colors of light, and a blanket conversion material layer... Agent: Cree, Inc.

20130328074 - Led package with multiple element light source and encapsulant having planar surfaces: LED packages are disclosed that are compact and efficiently emit light, and can comprise encapsulants with planar surfaces that refract and/or reflect light within the package encapsulant. The packages can comprise a submount with one or a plurality of LEDs. In packages with a plurality of LEDs, each LED can... Agent: Cree, Inc.

20130328076 - Light emitting diode: A light emitting diode includes a first semiconductor layer, an active layer, a second semiconductor layer, a first optical symmetric layer, a metallic layer, and a second optical symmetric layer stacked in that sequence. A first electrode is electrically connected to the first semiconductor layer, and a second electrode is... Agent: Tsinghua University

20130328075 - Semiconductor light emitting device and method for manufacturing same: According to one embodiment, a semiconductor light emitting device includes first and second electrodes, first and second semiconductor layers and a light emitting layer. The first electrode includes a first region, a second region, and a third region provided between them. The first semiconductor layer includes a first portion on... Agent:

20130328095 - Ceramic composite for light conversion, method for producing same, and light emitting device including same: A ceramic composite for light conversion, and method of producing same and a light emitting device including the same. The ceramic composite for light conversion of the present invention is a solidified body having a structure in which at least two oxide phases including a first phase and a second... Agent: Ube Industries, Ltd.

20130328088 - Led module and lighting apparatus: According to one embodiment, an LED module according to the embodiment is configured by an LED chip, a pair of wiring bodies, and sealing resin. The pair of wiring bodies are connected to both electrodes of the LED chip, respectively. The sealing resin is light-transmissive, and is provided so as... Agent:

20130328094 - Light emitting device and lighing system having the same: Provided is a light emitting device. The light emitting device includes a plurality of metal layers spaced from each other, a first insulation film having an opened area in which a portion of the plurality of metal layers is opened, the first insulation film being disposed around top surfaces of... Agent: Lg Innotek Co., Ltd.

20130328092 - Light emitting device, light emitting device package and lighting system including the same: A light emitting device is described, including a second conductive type semiconductor layer; an active layer over the second conductive type semiconductor layer; a first conductive type semiconductor layer over the active layer; a second electrode in a first region under the second conductive type semiconductor layer; a current blocking... Agent: Lg Innotek Co., Ltd.

20130328080 - Light emitting diode: A light emitting diode includes a first semiconductor layer, an active layer, a second semiconductor layer, a third optical symmetric layer, a metallic layer, a fourth optical symmetric layer, and a first optical symmetric layer, a first electrode, and a second electrode. The first semiconductor layer includes a first surface... Agent: Tsinghua University

20130328081 - Light emitting diode: A light emitting diode includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a third optical symmetric layer, a metallic layer, a fourth optical symmetric layer, and a first optical symmetric layer, and a second optical symmetric layer stacked with other in the listed sequence.... Agent: Tsinghua University

20130328082 - Light emitting diode: A light emitting diode includes a substrate, a source layer, a metallic plasma generating layer, a first optical symmetric layer, a second optical symmetric layer, a first electrode, and a second electrode. The source layer includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked on... Agent: Tsinghua University

20130328084 - Light emitting diode: A light emitting diode includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a first optical symmetric layer, a metallic layer, and a second optical symmetric layer stacked on the substrate in that sequence. A first electrode is electrically connected to the first semiconductor layer,... Agent: Tsinghua University

20130328086 - Light emitting diode: A light emitting diode includes a substrate, a buffer layer, a first semiconductor layer, an active layer, a second semiconductor layer, and a cermet layer. The active layer is on the first semiconductor layer. The second semiconductor layer is on the active layer. The cermet layer is on the second... Agent: Tsinghua University

20130328087 - Light emitting diode: A light emitting diode includes a first semiconductor layer, an active layer, a second semiconductor layer, and a cermet layer. The active layer is on the first semiconductor layer. The second semiconductor layer is on the active layer. The cermet layer is on the second semiconductor layer. A first electrode... Agent: Tsinghua University

20130328089 - Light emitting diode for harsh environments: A light emitting diode for harsh environments includes a substantially transparent substrate, a semiconductor layer deposited on a bottom surface of the substrate, several bonding pads, coupled to the semiconductor layer, formed on the bottom surface of the substrate, and a micro post, formed on each bonding pad, for electrically... Agent: Senseonics, Incorporated

20130328091 - Light reflecting member for optical semiconductor, and substrate for mounting optical semiconductor and optical semiconductor device using the light reflecting member: The present invention relates to a light reflecting member for an optical semiconductor which makes it possible to manufacture a high-quality optical semiconductor device at a low cost, as well as a substrate for mounting an optical semiconductor and an optical semiconductor device using such a light reflecting member.... Agent:

20130328077 - Light-emitting element: A light-emitting element includes: a light-emitting stack including an uneven upper surface; a transparent conductive layer formed on the uneven upper surface; an insulating layer formed on the transparent conductive layer, and partial regions of the transparent conductive layer are exposed; a reflective layer formed on the transparent conductive layer... Agent: Epistar Corporation

20130328090 - Lighting device: Provided is a lighting device, comprising: a light source module comprising: at least one light source disposed on a printed circuit board; and a resin layer disposed on the printed circuit board so that the light source is embedded; an indirect light emission unit which is formed in at least... Agent:

20130328079 - Semiconductor structure: A semiconductor structure includes a first semiconductor layer, a active layer, a second semiconductor layer, a third optical symmetric layer, a metallic layer, a fourth optical symmetric layer, and a first optical symmetric layer stacked in sequence. The first semiconductor layer, the active layer, and the second semiconductor layer constitute... Agent: Tsinghua University

20130328083 - Semiconductor structure: A semiconductor structure includes a first semiconductor layer, an active layer, a second semiconductor layer, a first optical symmetric layer, a metallic layer, and a second optical symmetric layer stacked in that sequence. A first effective refractive index n1 of the second optical symmetric layer, a second effective refractive index... Agent: Tsinghua University

20130328085 - Semiconductor structure: A semiconductor structure includes a first semiconductor layer, an active layer, a second semiconductor layer, and a cermet layer stacked together. The active layer is on a surface of the first semiconductor layer. The second semiconductor layer is on a surface of the active layer away from the first semiconductor... Agent: Tsinghua University

20130328078 - Small-size led packaging structure for enhancing light emitting angle: A small-size LED packaging structure for enhancing a Sight emitting angle includes an opaque base and at least one light emitting chip. The light emitting chip is installed on the opaque base, and the opaque base includes a transparent sidewall disposed around the base and a concave-cup space, and the... Agent: Unity Opto Technology Co., Ltd.

20130328093 - Thin-film led with p and n contacts electrically isolated from the substrate: A thin-film light emitting diode includes an insulating substrate, a reflective metal electrode on the insulating substrate forming a current spreading layer, and an epitaxial structure on the electrode.... Agent: Toshiba Techno Center Inc.

20130328098 - Buffer layer structure for light-emitting diode: A buffer layer structure for an LED is provided. The LED includes a P-type electrode, a permanent substrate, a binding layer, a buffer layer, a mirror layer, a P-type semiconductor layer, a light-emitting layer, an N-type semiconductor layer, and an N-type electrode that are stacked in sequence. The buffer layer... Agent: High Power Opto. Inc.

20130328097 - Group iii nitride semiconductor light-emitting element: A group III nitride semiconductor light-emitting element having a rectangular shape in a planar view, the element comprises an n-electrode connecting to an n-type layer and a p-electrode connecting to a p-type layer, on a same plane side; wherein the n-electrode has a n-wiring-shaped part that is wiring-shaped and extending... Agent:

20130328099 - Method for producing large lighting with power led: A method of packaging a power light emitting diode (LED). The method may include providing a printed circuit board (PCB) wherein first and second copper (Cu) thin films are formed on both faces of the PCB respectively, forming a single upper opening through an entire thickness of the first Cu... Agent:

20130328096 - Semiconductor light emitting diodes with crack-tolerant barrier structures and methods of fabricating the same: A light emitting device includes an epitaxial region, an insulating layer on the epitaxial region, a bond pad on the insulating layer, and a crack reducing feature in the insulating layer. The crack reducing feature is configured to reduce the propagation of cracks in the insulating layer to an outside... Agent: Cree, Inc.

20130328100 - Encapsulating sheet, light emitting diode device, and producing method thereof: An encapsulating sheet includes an encapsulating resin layer and a barrier film layer formed at one side in a thickness direction of the encapsulating resin layer.... Agent: Nitto Denko Corporation

20130328101 - Method of producing an optoelectronic semiconductor chip, and such a semiconductor chip: A method of producing an optoelectronic semiconductor chip having a semiconductor layer stack based on a material system AlInGaP includes preparing a growth substrate having a silicon surface, arranging a compressively relaxed buffer layer stack on the growth substrate, and metamorphically, epitaxially growing the semiconductor layer stack on the buffer... Agent: Osram Opto Semiconductors Gmbh

20130328102 - Optoelectronic device and method for manufacturing the same: An optoelectronic device comprising: a substrate; and an epitaxial stack including a first semiconductor layer having a first conductivity-type impurity, an active layer, and a second semiconductor layer having a second conductivity-type impurity formed in sequence on the substrate; a hollow component formed inside the active layer or the second... Agent: Epistar Corporation

20130328103 - Method and apparatus for protection and high voltage isolation of low voltage communication interface terminals: A high voltage isolation protection device for low voltage communication interface systems in mixed-signal high voltage electronic circuit is disclosed. According to one aspect, the protection device includes a semiconductor structure configured to provide isolation between low voltage terminals and protection from transient events. The protection device includes a thyristor... Agent: Analog Devices, Inc.

20130328105 - Narrow active cell ie type trench gate igbt and a method for manufacturing a narrow active cell ie type trench gate igbt: In an equal width active cell IE type IGBT, a wide active cell IE type IGBT, and the like, an active cell region is equal in trench width to an inactive cell region, or the trench width of the inactive cell region is narrower. Accordingly, it is relatively easy to... Agent:

20130328104 - Semiconductor device and manufacturing method thereof: A semiconductor device is disclosed which has a high voltage isolation structure that is a RESURF structure, wherein it is possible to reduce a displacement current generated by dV/dt noise, and a method of manufacturing the semiconductor device. It is possible to increase a lateral resistance without changing the total... Agent: Fuji Electric Co., Ltd.

20130328106 - Semiconductor device and method for manufacturing semiconductor device: Provided are a nitride-based semiconductor element with reduced leak current, and a manufacturing method thereof. The semiconductor element comprises a substrate; a buffer region that is formed above the substrate; an active layer that is formed on the buffer region; and at least two electrodes that are formed on the... Agent: Advanced Power Device Research Association

20130328107 - Semiconductor device: A semiconductor device protects against concentration of electric current at a front end portion of one of the electrodes thereof. The semiconductor device includes a substrate, a compound semiconductor layer formed on the substrate and having a channel layer based on a hetero junction, a first main electrode formed on... Agent: Sanken Electric Co., Ltd.

20130328108 - Ultra-high voltage sige hbt device and manufacturing method of the same: An ultra-high voltage silicon-germanium (SiGe) heterojunction bipolar transistor (HBT), which includes: a P-type substrate; an N-type matching layer, a P-type matching layer and an N− collector region stacked on the P-type substrate from bottom up; two field oxide regions separately formed in the N− collector region; N+ pseudo buried layers,... Agent:

20130328109 - Structures and methods for electrically and mechanically linked monolithically integrated transistor and mems/nems devices: A device including a NEMS/MEMS machine(s) and associated electrical circuitry. The circuitry includes at least one transistor, preferably JFET, that is used to: (i) actuate the NEMS/MEMS machine; and/or (ii) receive feedback from the operation of the NEMS/MEMS machine The transistor (e.g., the JFET) and the NEMS/MEMS machine are monolithically... Agent: Cornell University

20130328110 - Thin film hybrid junction field effect transistor: Junction field effect transistors are provided which include a gate junction located on a surface of a crystalline semiconductor material of a first conductivity type. The gate junction can be selected from one of a doped hydrogenated crystalline semiconductor material layer portion of a second conductivity type which is opposite... Agent: International Business Machines Corporation

20130328115 - Contact for high-k metal gate device: An integrated circuit includes a semiconductor substrate including a source region and a drain region and a gate dielectric over the semiconductor substrate. A metal gate structure is over the semiconductor substrate and the gate dielectric and between the source and drain regions. The integrated circuit further includes an interlayer... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130328114 - Integrated transistor and anti-fuse as programming element for a high-voltage integrated circuit: A semiconductor device includes an N type well region in a P type substrate. A source region of a MOSFET is laterally separated from a boundary of the well region, which includes the drain of the MOSFET. An insulated gate of the MOSFET extends laterally from the source region to... Agent: Power Integrations, Inc.

20130328111 - Recessing and capping of gate structures with varying metal compositions: A method for recessing and capping metal gate structures is disclosed. Embodiments include: forming a dummy gate electrode on a substrate; forming a hard mask over the dummy gate electrode; forming spacers on opposite sides of the dummy gate electrode and the hard mask; forming an interlayer dielectric (ILD) over... Agent: Globalfoundries Singapore Pte. Ltd.

20130328113 - Regenerative building block and diode bridge rectifier and methods: A rectifier building block has four electrodes: source, drain, gate and probe. The main current flows between the source and drain electrodes. The gate voltage controls the conductivity of a narrow channel under a MOS gate and can switch the RBB between OFF and ON states. Used in pairs, the... Agent: Stmicroelectronics N.v.

20130328112 - Semiconductor devices having improved gate height uniformity and methods for fabricating same: Semiconductor devices and methods for fabricating semiconductor devices are provided. In an embodiment, a method for fabricating a semiconductor device includes forming on a semiconductor surface a temporary gate structure including a polysilicon gate and a cap. A spacer is formed around the temporary gate structure. The cap and a... Agent: Globalfoundries Inc.

20130328116 - Dram with a nanowire access transistor: A semiconductor nanowire is formed integrally with a wraparound semiconductor portion that contacts sidewalls of a conductive cap structure located at an upper portion of a deep trench and contacting an inner electrode of a deep trench capacitor. The semiconductor nanowire is suspended from above a buried insulator layer. A... Agent: International Business Machines Corporation

20130328117 - Floating gate non-volatile memory bit cell: A solid-state non-volatile memory (NVM) device includes a memory bit cell. The memory bit cell includes a field effect transistor (FET) fabricated on a substrate and having a floating gate. The floating gate includes a thick oxide layer. The FET includes drain and source, each fabricated within the substrate and... Agent: Synopsys Inc.

20130328118 - Non-volatile memory using pyramidal nanocrystals as electron storage elements: A non-volatile memory device includes a floating gate with pyramidal-shaped silicon nanocrystals as electron storage elements. Electrons tunnel from the pyramidal-shaped silicon nanocrystals through a gate oxide layer to a control gate of the non-volatile memory device. The pyramidal shape of each silicon nanocrystal concentrates an electrical field at its... Agent: Globalfoundries Singapore Pte. Ltd.

20130328119 - Non-volatile memory and manufacturing method thereof: A non-volatile memory and a manufacturing method thereof are provided. The non-volatile memory includes a gate dielectric layer, a floating gate, a control gate, an inter-gate dielectric structure and two doped regions. The gate dielectric layer is disposed on a substrate. The floating gate is disposed on the gate dielectric... Agent: Macronix International Co., Ltd.

20130328120 - Semiconductor device: A device comprises a substrate, an n-layer and a p-layer, an n-electrode, and a p-electrode. A step is formed at an outer circumference of the device. A protective film is formed so as to continuously cover a side surface and a bottom surface of the step. A field plate electrode... Agent: Toyoda Gosei Co., Ltd.

20130328121 - Mosfet with improved performance through induced net charge region in thick bottom insulator: A semiconductor power device includes a thick bottom insulator formed in a lower portion of a trench in a semiconductor epitaxial region. An electrically conductive gate electrode is formed in the trench above the bottom insulator. The gate electrode is electrically insulated from the epitaxial region by the bottom insulator... Agent:

20130328122 - Split trench-gate mosfet with integrated schottky diode: A split trench-gate MOSFET device and method for forming this device is disclosed. The device has a trench gate structure, comprising a shield electrode and two gate electrodes, wherein a substantial portion of shield electrode region is lower than the gate electrode region, and wherein a portion of the shield... Agent: Monolithic Power Systems, Inc.

20130328123 - Semiconductor device: A semiconductor device includes a semiconductor substrate, a buried layer disposed in the semiconductor substrate; a deep well disposed in the semiconductor substrate; a first doped region disposed in the deep well, wherein the first doped region contacts the buried layer; a conductive region having the first conductivity type surrounding... Agent:

20130328124 - Gated diode structure for eliminating rie damage from cap removal: A semiconductor structure provided with a plurality of gated-diodes having a silicided anode (p-doped region) and cathode (n-doped region) and a high-K gate stack made of non-silicided gate material, the gated-diodes being adjacent to FETs, each of which having a silicided source, a silicided drain and a silicided HiK gate... Agent: International Business Machines Corporation

20130328125 - Protection component and electrostatic discharge protection device with the same: An electrostatic discharge protection device includes a protection component and a component controller. The protection component includes a first and a second P-type wells which are disposed in an N-type deep well, a first N-type transistor which is formed in the N-type deep well and the first P-type well, and... Agent: Macronix International Co., Ltd.

20130328126 - Epitaxial formation of source and drain regions: Mechanisms for forming source/drain (S/D) regions of field effect transistors (FETs) are provided. The mechanisms eliminate dislocations near gate corners and gate corner defects (GCDs), and maintain transistor performance. The mechanisms described involve using a post-deposition etch to remove residual dislocations near gate corners after a cyclic deposition and etching... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130328128 - Semiconductor device and method of manufacturing the same: By covering ends of a field insulating film in a region where a MOS transistor having a relatively thin gate insulating film is formed with a relatively thick gate insulating film, a channel region of the MOS transistor having the relatively thin gate insulating film is set apart from an... Agent: Seiko Instruments Inc.

20130328127 - Sige sram butted contact resistance improvement: The present disclosure relates to a device and method for fabricating a semiconductor memory device arrangement comprising a butted a contact arrangement configured to couple two transistors, wherein an active area of a first transistor is coupled to an active gate of a second transistor. The active gate of the... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20130328129 - Low power semiconductor transistor structure and method of fabrication thereof: A structure and method of fabrication thereof relate to a Deeply Depleted Channel (DDC) design, allowing CMOS based devices to have a reduced σVT compared to conventional bulk CMOS and can allow the threshold voltage VT of FETs having dopants in the channel region to be set much more precisely.... Agent: Suvolta, Inc.

20130328130 - Bipolar transistor in bipolar-cmos technology: A process of forming an integrated circuit containing a bipolar transistor and an MOS transistor, by forming a base layer of the bipolar transistor using a non-selective epitaxial process so that the base layer has a single crystalline region on a collector active area and a polycrystalline region on adjacent... Agent: Texas Instruments Incorporated

20130328131 - Semiconductor devices, methods of manufacture thereof, and methods of forming resistors: Semiconductor devices, methods of manufacture thereof, and methods of forming resistors are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming a first insulating material over a workpiece, and forming a conductive chemical compound material over the first insulating material. The conductive chemical compound material is... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130328132 - Power semiconductor device and method therefor: A power transistor includes a plurality of transistor cells. Each transistor cell has a first electrode coupled to a first electrode interconnection region overlying a first major surface, a control electrode coupled to a control electrode interconnection region overlying the first major surface, and a second electrode coupled to a... Agent: Estivation Properties LLC

20130328133 - Integrated circuit device with transistors having different threshold voltages: Integrated circuit device with transistors having different threshold voltages and methods of forming the device are provided. The device may include the first, second and third transistors having threshold voltages different from each other. The first transistor may be free of a stacking fault and the second transistor may include... Agent: Samsung Electronics Co., Ltd.

20130328134 - Method and apparatus for improving gate contact: A method of fabricating a semiconductor device includes providing a substrate having a first surface, forming an isolation structure disposed partly in the substrate and having an second surface higher than the first surface by a step height, removing a portion of the isolation structure to form a recess therein... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130328135 - Preventing fully silicided formation in high-k metal gate processing: A gate stack structure for a transistor device includes a gate dielectric layer formed over a substrate; a first silicon gate layer formed over the gate dielectric layer; a dopant-rich monolayer formed over the first silicon gate layer; and a second silicon gate layer formed over the dopant-rich monolayer, wherein... Agent: International Business Machines Corporation

20130328136 - Structure and method for forming programmable high-k/metal gate memory device: A method of fabricating a memory device is provided that may begin with forming a layered gate stack atop a semiconductor substrate and patterning a metal electrode layer stopping on the high-k gate dielectric layer of the layered gate stack to provide a first metal gate electrode and a second... Agent: International Business Machines Corporation

20130328137 - Modified high-k gate dielectric stack: A semiconductor fabrication method includes forming a gate dielectric stack on a semiconductor substrate and annealing the gate dielectric stack. Forming the stack may include depositing a first layer of a metal-oxide dielectric on the substrate, forming a refractory metal silicon nitride on the first layer, and depositing a second... Agent: Freescale Semiconductor, Inc.

20130328138 - Method for producing semiconductor device and semiconductor device: A method for producing a semiconductor device includes a first step including forming a planar silicon layer and forming first and second pillar-shaped silicon layers; a second step including forming a gate insulating film around each of the first and second pillar-shaped silicon layers, forming a metal film and a... Agent:

20130328141 - Hermetic plastic molded mems device package and method of fabrication: A hermetically packaged microelectromechanical system (MEMS) device has a substrate with an assembly pad (101) and a plurality of terminals (102); a chip (110) with a MEMS mechanical element (111) of a first height (111a) assembled on the pad and connected to the terminals by wires (120) with an insulating... Agent:

20130328142 - Integrated circuit with pressure sensor and manufacturing method: Disclosed is an integrated circuit (100), comprising a semiconductor substrate (110) carrying a plurality of circuit elements; and a pressure sensor including a cavity (140) on said semiconductor substrate, said cavity comprising a pair of electrodes (120, 122) laterally separated from each other; and a flexible membrane (130) over and... Agent:

20130328139 - Micromachined monolithic 3-axis gyroscope with single drive: This document discusses, among other things, a cap wafer and a via wafer configured to encapsulate a single proof-mass 3-axis gyroscope formed in an x-y plane of a device layer. The single proof-mass 3-axis gyroscope can include a main proof-mass section suspended about a single, central anchor, the main proof-mass... Agent: Fairchild Semiconductor Corporation

20130328140 - Vibration isolated mems structures and methods of manufacture: A microstructure device has a microstructure (e.g., a circuit card assembly, a printed circuit board, etc.) defining a sensitive axis and one or more isolators configured and adapted to be compliant along the sensitive axis and to be rigid along one or more other axes.... Agent:

20130328143 - Semiconductor manufacturing and semiconductor device with semiconductor structure: Embodiments related to semiconductor manufacturing and semiconductor devices with semiconductor structure are described and depicted.... Agent: Infeon Technologies Ag

20130328144 - Semiconductor device, manufacturing method therefor, and electronic apparatus: A semiconductor device includes: a first semiconductor chip; and a second semiconductor chip that is stacked on the first semiconductor chip. The first semiconductor chip includes a first wiring portion of which a side surface is exposed at a side portion of the first semiconductor chip. The second semiconductor chip... Agent: Sony Corporation

20130328147 - Chip package and method for forming the same: An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and a second surface; a device region disposed in the semiconductor substrate; a dielectric layer disposed on the first surface of the semiconductor substrate; a conducting pad structure disposed in the dielectric... Agent:

20130328148 - Cover for image sensor assembly with light absorbing layer and alignment features: An image sensor assembly includes an image sensor die attached adjacent to a cavity and a lower surface in a preformed package having substantially vertical surfaces extending from the lower surface to an upper surface of the package. The image sensor die provides the light receiving surface for capturing the... Agent: Apple Inc.

20130328145 - Integrated optical receiver architecture for high speed optical i/o applications: An integrated optical receiver architecture may be used to couple light between a multi-mode fiber (MMF) and silicon chip which includes integration of a silicon de-multiplexer and a high-speed Ge photo-detector. The proposed architecture may be used for both parallel and wavelength division multiplexing (WDM) based optical links with a... Agent:

20130328146 - Transversely-illuminated high current photoconductive switches with geometry-constrained conductivity path: A photoconductive switch having a wide bandgap semiconductor material substrate between opposing electrodes, with one of the electrodes having an aperture or apertures at an electrode-substrate interface for transversely directing radiation therethrough from a radiation source into a triple junction region of the substrate, so as to geometrically constrain the... Agent:

20130328149 - Wavelength conversion-type photovoltaic cell sealing material and photovoltaic cell module using the same: The present invention provides a wavelength conversion-type photovoltaic cell sealing material, the sealing material including at least one light emitting layer containing a group of spherical phosphors, the group of spherical phosphors having a ratio of a median value D50 of the group of spherical phosphors to a total thickness... Agent:

20130328150 - Adjustable avalanche diode in an integrated circuit: An avalance diode including, between two heavily-doped regions of opposite conductivity types arranged at the surface of a semiconductor region, a lightly-doped region, with length L of the lightly-doped region between the heavily-doped regions approximately ranging between 50 and 200 nm.... Agent: Stmicroelectronics International Nv

20130328151 - Integrated circuit structure, back side illumination image sensor and integrated circuit process thereof: An integrated circuit structure or a back side illumination image sensor is provided, wherein the integrated circuit structure includes a bond pad and a metal structure located in a dielectric layer, wherein the bond pad and the metal structure have different materials, and the back side illumination image sensor includes... Agent:

20130328152 - Solid-state imaging device, method for manufacturing the same, and electronic apparatus: A method for manufacturing a solid-state imaging device includes: forming pixels that receive incident light in a pixel array area of a substrate; forming pad electrodes in a peripheral area located around the pixel array area of the substrate; forming a carbon-based inorganic film on an upper surface of each... Agent: Sony Corporation

20130328154 - Electronic component package structure: A thermistor includes a metal substrate, a semiconductor ceramic layer on the metal substrate, and a pair of split electrodes on the semiconductor layer. The semiconductor ceramic layer is formed by a solid-phase method. The metal substrate includes ceramic particles and is not interrupted in the direction of thickness by... Agent: Murata Manufacturing Co., Ltd

20130328153 - Electronic-component mounting structure: An electronic-component mounting structure includes an electronic component which includes a metal substrate, a semiconductor ceramic layer located on the metal substrate, a pair of split electrodes located on the semiconductor ceramic layer, and plating films located on the split electrodes and the metal substrate, and a mounting body on... Agent: Murata Manufacturing Co., Ltd.

20130328156 - Design support method, recording medium storing design support program and semiconductor device: A design support method includes: selecting, by a computer, a power feed point of an integrated semiconductor circuit on a first board model in which a power supply layer and a ground layer are stacked; determining a first placement position of a first protrusion portion from the first board model... Agent: Fujitsu Limited

20130328155 - Generation of additional shapes on a photomask for a multiple exposure process: The disclosed aspects relate to controlling density of photomasks. One or more unprintable auxiliary patterns can be placed near a mask feature as well as onto a location of a feature of the main pattern. If a density is measured and is not within an acceptable density range, one or... Agent: Toshiba America Electronic Components, Inc.

20130328159 - Implementing isolated silicon regions in silicon-on-insulator (soi) wafers using bonded-wafer technique: Methods and structures are provided for implementing independently voltage controlled isolated silicon regions under a buried oxide layer for biasing field effect transistors above the buried oxide layer on Silicon-on-Insulator (SOI) wafers. Using a bonded-wafer technique, a first bulk substrate wafer is bonded with a second wafer providing a buried... Agent: International Business Machines Corporation

20130328160 - Semiconductor device: Semiconductor device comprises a memory cell region, a peripheral region, and first wiring. The memory cell region includes a first isolation region, and a first active region provided so as to be divided off by the first isolation region. The peripheral region includes a second isolation region, and a second... Agent: Elpida Memory, Inc.

20130328158 - Semiconductor seal ring design for noise isolation: A semiconductor structure includes a substrate layer and a conductive layer connected with the substrate layer. An active circuit is connected with the conductive layer. A seal ring is connected with the conductive layer and separated from the active circuit by an assembly isolation region. An electrical isolation region is... Agent: Broadcom Corporation

20130328157 - Spacer isolation in deep trench: A method of forming improved spacer isolation in deep trench including recessing a node dielectric, a first conductive layer, and a second conductive layer each deposited within a deep trench formed in a silicon-on-insulator (SOI) substrate, to a level below a buried oxide layer of the SOI substrate, and creating... Agent: International Business Machines Corporation

20130328161 - Spacer isolation in deep trench: A method of forming improved spacer isolation in deep trench including recessing a node dielectric, a first conductive layer, and a second conductive layer each deposited within a deep trench formed in a silicon-on-insulator (SOI) substrate, to a level below a buried oxide layer of the SOI substrate, and creating... Agent: International Business Machines Corporation

20130328162 - Homo-junction diode structures using fin field effect transistor processing: Diodes and bipolar junction transistors (BJTs) are formed in IC devices that include fin field-effect transistors (FinFETs) by utilizing various process steps in the FinFET formation process. The diode or BJT includes an isolated fin area and fin array area having n-wells having different depths and a p-well in a... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130328163 - Inductor device and fabrication method: Various embodiments provide inductor devices and fabrication methods. In one embodiment, an inductor device can include a first dielectric layer disposed on a semiconductor substrate; a first planar spiral wiring disposed on the first dielectric layer, and optionally one or more second planar spiral wirings disposed over the first planar... Agent: Semiconductor Manufacturing International Corp.

20130328164 - Inductor device and fabrication method: Various embodiments provide inductor devices and fabrication methods. An exemplary inductor device can include a plurality of planar spiral wirings isolated by a dielectric layer. The planar spiral wirings can be connected by conductive pads formed over the dielectric layer and by conductive plugs formed in the dielectric layer. In... Agent:

20130328165 - Microfabricated magnetic devices and associated methods: A magnetic device includes a semiconductor wafer, a spiral winding, and a magnetic core. The spiral winding forms a plurality of turns and is disposed in a channel of the semiconductor wafer. The magnetic core is disposed at least partially in the channel of the semiconductor wafer and at least... Agent:

20130328166 - Semiconductor device and method of manufacture thereof: A semiconductor device, a method of manufacturing a semiconductor device and a method for transmitting a signal are disclosed. In accordance with an embodiment of the present invention, the semiconductor device comprises a first semiconductor chip comprising a first coil, a second semiconductor chip comprising a second coil inductively coupled... Agent: Infineon Technologies Ag

20130328168 - Manufacturable high-k dram mim capacitor structure: A method for forming a capacitor stack is described. In some embodiments of the present invention, a first dielectric material is formed above a first electrode material. The first electrode material is rigid and has good mechanical strength and serves as a robust frame for the capacitor stack. The first... Agent: Intermolecular Inc.

20130328167 - Self-aligned metal-insulator-metal (mim) capacitor: A metal-insulator-metal (MIM) capacitor structure integrated within a back-end-of-the-line (BEOL) structure is provided. The MIM capacitor structure includes a lower electrode, i.e., a first conductive material, embedded within a dielectric material of the BEOL structure, a dielectric material liner having a dielectric constant of equal to, or greater than, silicon... Agent: International Business Machines Corporation

20130328169 - Resistive device and method of manufacturing the same: This disclosure is related to a resistive device including a silicide pattern. A resistive device can include a substrate, and a first resistive layer disposed above the substrate. The resistive device can include a second resistive layer disposed on the first resistive layer and has a resistance different from a... Agent:

20130328170 - Semiconductor element, manufacturing method thereof and operating method thereof: A semiconductor element, a manufacturing method thereof and an operating method thereof are provided. The semiconductor element includes a substrate, a first well, a second well, a third well, a fourth well, a bottom layer, a first heavily doping region, a second heavily doping region, a third heavily doping region... Agent: Macronix International Co., Ltd.

20130328171 - Semiconductor structure: A semiconductor structure includes a first semiconductor layer, an active layer, a second semiconductor layer, a metallic plasma generating layer, and a first optical symmetric layer stacked in series. The first semiconductor layer, the active layer, and the second semiconductor layer constitute a source layer. A refractive index difference between... Agent: Tsinghua University

20130328172 - Wafer-level flip chip device packages and related methods: In accordance with certain embodiments, semiconductor dies are at least partially coated with a conductive adhesive prior to singulation and subsequently bonded to a substrate having electrical traces thereon.... Agent:

20130328173 - High aspect ratio and reduced undercut trench etch process for a semiconductor substrate: A hydrofluorocarbon gas is employed as a polymer deposition gas in an anisotropic etch process employing an alternation of an etchant gas and the polymer deposition gas to etch a deep trench in a semiconductor substrate. The hydrofluorocarbon gas can generate a thick carbon-rich and hydrogen-containing polymer on sidewalls of... Agent: International Business Machines Corporation

20130328174 - Edge protection of bonded wafers during wafer thinning: A method of edge protecting bonded semiconductor wafers. A second semiconductor wafer and a first semiconductor wafer are attached by a bonding layer/interface and the second semiconductor wafer undergoes a thinning process. As a part of the thinning process, a first protective layer is applied to the edges of the... Agent: International Business Machines Corporation

20130328175 - Method for the hydrogen passivation of semiconductor layers: The present invention relates to a method for the hydrogen passivation of semiconductor layers, wherein the passivation is effected by using an arc plasma source, to the passivated semiconductor layers produced according to the method, and to the use thereof.... Agent: Evonik Degussa Gmbh

20130328176 - Emi-shielded semiconductor devices and methods of making: A wafer level package including a shield connected to a plurality of conductive elements disposed on a silicon wafer. The conductive elements are arranged to individually enclose micro-structure elements located on the silicon wafer within cavities formed by the conductive elements for better shielding performance. The shield and the conductive... Agent:

20130328178 - Shielding device: One aspect of the invention relates to a shielding device for shielding from electromagnetic radiation, including a shielding base element, a shielding cover element and a shielding lateral element for electrically connecting the base element to the cover element in such that a circuit part to be shielded is arranged... Agent: Infineon Technologies Ag

20130328177 - Stack semiconductor package and manufacturing the same: To manufacture a stack semiconductor package, a board mold covers a first semiconductor. The board mold includes a first face and a second face opposite to the first face. An active surface of the first semiconductor faces the second face. A first opening is formed in the board mold from... Agent: Samsung Electronics Co., Ltd.

20130328179 - Integrated circuit packaging system with warpage preventing mechanism and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a package substrate having a warpage-compensation zone with a substrate-interior layer exposed from a top substrate-cover, and the warpage-compensation zone having contiguous exposed portion of the substrate-interior layer over corner portions of the package substrate; connecting an integrated... Agent:

20130328180 - Packaged semiconductor device with an exposed metal top surface: In a manufacturing technique for packaged semiconductor devices, a pre-form of a packaged semiconductor device is formed by a molding process which encapsulates the semiconductor device and its associated heat transfer component in a passivating material presenting a surface. The surface is then processed to at least remove excess passivating... Agent:

20130328181 - Electronic system with a composite substrate: A composite substrate made of a conductive pattern structure mounted on a lead frame is used for an electronic system package. High heat generated electronic components are adapted to mount on the lead frame and relatively low heat generated electronic components are adapted to mount on the conductive pattern structure.... Agent:

20130328182 - Semiconductor memory device and method of fabricating the same: Provided is a semiconductor device and method of fabricating the semiconductor memory device. The semiconductor device may be formed by forming a first welding groove along outside edges of one case of a pair of upper and lower cases, forming a first welding protrusion along outside edges of the other... Agent: Samsung Electronics Co., Ltd.

20130328183 - Method for manufacturing semiconductor devices having a glass substrate: A method for manufacturing semiconductor devices is disclosed. A semiconductor wafer is provided having a first surface and a second surface opposite to the first surface. A first glass substrate is provided which has at least one of cavities and openings at the bonding surface. The first glass substrate is... Agent: Infineon Technologies Austria Ag

20130328184 - Composite member including substrate made of composite material: A composite member has a substrate made of a composite material having SiC combined with magnesium or a magnesium alloy, and has a warpage degree of not less than 0.01×10−3 and not more than 10×10−3, the warpage degree being defined as lmax/Dmax, where lmax being a difference between a maximum... Agent: Sumitomo Electric Industries, Ltd.

20130328185 - Power semiconductor module, method of manufacturing power semiconductor module, and power conversion device: A power semiconductor module includes: a circuit body having a power semiconductor element and a conductor member connected to the power semiconductor element; a case in which the circuit body is housed; and a connecting member which connects the circuit body and the case. The case includes: a first heat... Agent: Hitachi Automotive Systems, Ltd.

20130328189 - Bump-on-lead flip chip interconnection: A semiconductor device has a semiconductor die with a plurality of bumps formed over the die. A substrate has a plurality of conductive traces formed on the substrate. Each trace has an interconnect site for mating to the bumps. The interconnect sites have parallel edges along a length of the... Agent: Stats Chippac, Ltd.

20130328186 - Reduced stress tsv and interposer structures: A component can include a substrate and a conductive via extending within an opening in the substrate. The substrate can have first and second opposing surfaces. The opening can extend from the first surface towards the second surface and can have an inner wall extending away from the first surface.... Agent: Invensas Corporation

20130328187 - Semiconductor device: There is provided a semiconductor device which includes a plurality of first through-substrate vias that are used to supply power from a first power supply and that penetrate through a substrate structure, and a plurality of second through-substrate vias that are used to supply power from a second power supply... Agent:

20130328188 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a substrate including first and second surfaces, a first insulating film including third and fourth surfaces, the fourth surface being in contact with the first surface, and an electrode elongated to penetrate the substrate and the first insulating film, the electrode including a first portion and... Agent: Elpida Memory, Inc.

20130328191 - Cte adaption in a semiconductor package: A device such as a wafer-level package (WLP) device is proposed in which a dielectric layer is disposed between a surface of a semiconductor device and a surface of a redistribution layer (RDL). The dielectric layer may have at least one interconnect extending through the dielectric layer. The dielectric layer... Agent: Intel Mobile Communications Gmbh

20130328190 - Methods and apparatus of packaging semiconductor devices: Methods and apparatuses for wafer level packaging (WLP) of semiconductor devices are disclosed. A contact pad of a circuit may be connected to a solder bump by way of a post passivation interconnect (PPI) line and a PPI pad. The PPI pad may comprise a hollow part and an opening.... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130328193 - Semiconductor device: Provided is a semiconductor device capable of increasing the number of signals. A semiconductor device according to an embodiment of the invention includes memories; a controller that designates addresses of the memories; a mounting board having lines formed thereon, the lines connecting the controller with the memories; and a first... Agent:

20130328192 - Semiconductor package and method for manufacturing the same: One embodiment provides a semiconductor package by forming a redistribution layer extending from a bonding pad of a semiconductor chip using a photoresist pattern plated with the seed layer. Fabrication of the semiconductor package is relatively simple thereby shortening a manufacturing time and reducing the manufacturing cost, and which can... Agent: Amkor Technology, Inc.

20130328194 - Short and low loop wire bonding: A multi-die package includes a first semiconductor die and a second semiconductor die each having an upper surface with a plurality of bond pads disposed thereon. The upper surface of the second semiconductor die may be substantially coextensive with the upper surface of the first semiconductor die and extend substantially... Agent: Carsem (m) Sdn. Bhd.

20130328195 - Utilization of a metallization scheme as an etching mask: m

20130328197 - Electronic device and method for production: An electronic device and method for production is disclosed. One embodiment provides an integrated component having a first layer which is composed of copper or a copper alloy or which contains copper or a copper alloy, and having an electrically conductive second layer, whose material differs from the material of... Agent: Infineon Technologies Ag

20130328198 - Reverse damascene process: The present disclosure relates to a method of forming a back-end-of-the-line metallization layer. The method is performed by forming a plurality of freestanding metal layer structures (i.e., metal layer structures not surrounded by a dielectric material) on a semiconductor substrate within an area defined by a patterned photoresist layer. A... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20130328196 - Semiconductor device with multi-layered storage node and method for fabricating the same: A method for fabricating a semiconductor device includes forming a first dielectric structure over a second region of a substrate to expose a first region of the substrate, forming a barrier layer over an entire surface including the first dielectric structure, forming a second dielectric structure over the barrier layer... Agent:

20130328199 - Semiconductor device with spacers for capping air gaps and method for fabricating the same: A method for fabricating memory device includes forming a bit line pattern including a first conductive layer and a hard mask stacked over a substrate, forming a sacrificial layer on sidewalls of the bit line pattern, forming a second conductive layer in contact with the sacrificial layer and adjacent to... Agent: Sk Hynix Inc.

20130328200 - Direct bonded copper substrate and power semiconductor module: Disclosed are a DBC substrate and a power semiconductor module having improved thermal reliability by directly forming a via in a substrate of a semiconductor device used mainly as a power device such as a silicon device, a silicon carbide (SiC) device, and a gallium nitride (GaN) device. The power... Agent: Electronics And Telecommunications Research Institute

20130328201 - Reliable interconnect for semiconductor device: Semiconductor devices and methods of making thereof are disclosed. The semiconductor device includes a substrate prepared with a first dielectric layer formed thereon. The dielectric layer includes at least first, second and third contact regions. A second dielectric layer is disposed over the first dielectric layer. The device also includes... Agent:

20130328203 - Method for applying a final metal layer for wafer level packaging and associated device: A wafer level semiconductor device and manufacturing method including providing a semiconductor device wafer substrate having a backside, applying to the backside a conductive metallization layer, and applying to the backside over the conductive metallization layer a protective metal layer of titanium, titanium alloys, nickel, nickel alloys, chromium, chromium alloys,... Agent: Flipchip International, LLC

20130328202 - Through-silicon via and fabrication method thereof: A through silicon via (TSV) structure including a semiconductor substrate; a first inter-metal dielectric (IMD) layer on the semiconductor substrate; a cap layer overlying the IMD layer; a conductive layer extending through the cap layer, the first IMD layer and into the semiconductor substrate; a tungsten film capping a top... Agent:

20130328204 - Solderless die attach to a direct bonded aluminum substrate: A DBA-based power device includes a DBA (Direct Bonded Aluminum) substrate. An amount of silver nanoparticle paste of a desired shape and size is deposited (for example by micro-jet deposition) onto a metal plate of the DBA. The paste is then sintered, thereby forming a sintered silver feature that is... Agent: Ixys Corporation

20130328206 - Chip arrangement and method for producing a chip arrangement: A chip arrangement includes semiconductor chips coupled to opposing sides of an insulating layer. The arrangement includes a first semiconductor chip having a first chip surface presenting a first chip conductive region. An electrically insulating layer includes a first layer surface presenting a first layer conductive region, and a second,... Agent: Infineon Technologies Ag

20130328207 - Embedded semiconductive chips in reconstituted wafers, and systems containing same: A reconstituted wafer includes a rigid mass with a flat surface and a base surface disposed parallel planar to the flat surface. A plurality of dice are embedded in the rigid mass. The plurality of dice include terminals that are exposed through coplanar with the flat surface. A process of... Agent:

20130328205 - Integrated circuits having a continuous active area and methods for fabricating same: Integrated circuits and methods for fabricating integrated circuits are provided. In an embodiment, an integrated circuit includes a standard cell having a first boundary, a second boundary opposite the first boundary, a third boundary interconnecting the first and second boundaries, and a fourth boundary opposite the third boundary and interconnecting... Agent: International Business Machines Corporation

20130328215 - Die edge contacts for semiconductor devices: A semiconductor device utilizing die edge contacts is provided. An integrated circuit die has a post-passivation layer with a trench filled with a conductive material extending from a contact to a die edge, thereby forming a die edge contact. Optionally, a through substrate via may be positioned along the die... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130328208 - Dual damascene dual alignment interconnect scheme: A stack of a first metal line and a first dielectric cap material portion is formed within a line trench of first dielectric material layer. A second dielectric material layer is formed thereafter. A line trench extending between the top surface and the bottom surface of the second dielectric material... Agent: International Business Machines Corporation

20130328213 - Electronic device including a carrier and a semiconductor chip attached to the carrier and manufacturing thereof: One aspect is a device including a carrier comprising a first conducting layer, a first insulating layer over the first conducting layer, and at least one first through-connection from a first face of the first insulating layer to a second face of the first insulating layer. A semiconductor chip is... Agent: Infineon Technologies Ag

20130328210 - Semiconductor device and method of manufacturing thereof: A semiconductor device includes a substrate, a plurality of signal lines, and at least one power line. The substrate includes an integrated circuit unit. The signal lines are disposed on the substrate and are configured to provide the integrated circuit unit with signals. The power line is disposed on the... Agent: Samsung Electronics Co., Ltd.

20130328212 - Semiconductor package and manufacturing method thereof: A semiconductor package includes: a semiconductor chip: a first insulating layer, wherein the semiconductor chip is embedded in the first insulating layer such that the first surface and the side surface of the semiconductor chip are covered by the first insulating layer; a wiring structure on the first surface of... Agent:

20130328211 - Semiconductor package, semiconductor device, and method for manufacturing semiconductor package: A semiconductor device includes a semiconductor chip, a core substrate, first and second insulating layers, and first and second wiring layers. Adhesiveness of the insulating layer to a metal is higher than adhesiveness of the core substrate to the metal. A through hole extends through the insulating layer in the... Agent:

20130328209 - Stack arrangement: In an embodiment, a stack arrangement is provided. The stack arrangement may include a semiconductor arrangement, the semiconductor arrangement including a substrate; a via formed through the substrate; and a conductive portion arranged in the via. The stack arrangement may further include an interconnect portion arranged over the via; a... Agent: Agency For Science, Technology And Research

20130328214 - Through-hole electrode substrate: A method of manufacturing a through-hole electrode substrate includes forming a plurality of through-holes in a substrate, forming a plurality of through-hole electrodes by filling a conductive material into the plurality of through-holes, forming a first insulation layer on one surface of the substrate, forming a plurality of first openings... Agent: Dai Nippon Printing Co., Ltd.

20130328216 - Integrated circuit packaging system with interposer and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing an interposer having an interposer bottom side and an interposer top side; attaching a base integrated circuit to the interposer bottom side; attaching a lead to the interposer bottom side, the lead adjacent the base integrated circuit and... Agent:

20130328217 - Method of marking semiconductor element, method of manufacturing semiconductor device, and semiconductor device: An object of the present invention is to provide a method of marking a semiconductor element with which a semiconductor device can be manufactured effectively even in the case of marking every semiconductor element, and a method of manufacturing the semiconductor device. The present invention relates to a method of... Agent:

20130328218 - Sealed semiconductor device having adhesive patch with inwardly sloped side surfaces: A semiconductor device has an external terminal formed through the use of an electrolysis plating method. A front surface of a semiconductor wafer is placed over a front surface of a first support heated to a first temperature. An adhesive sheet is then bonded to a back surface of the... Agent: Renesas Electronics Corporation

20130328219 - Package-on-package assembly with wire bond vias: A structure includes a substrate having a first region and a second region, the substrate also having a first surface and a second surface. Electrically conductive elements are exposed at the first surface within the second region. Wire bonds have bases bonded to respective ones of the conductive elements and... Agent: Invensas Corporation

20130328220 - Integrated circuit packaging system with film assist and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming an integrated circuit device having a shaped side; mounting the integrated circuit device on the substrate; forming an encapsulation on the substrate and the integrate circuit device with the shaped side partially exposed from the... Agent:

20130328221 - Alignment mark design for semiconductor device: Better alignment mark designs for semiconductor devices may substantially lessen the frequency of layer misalignment scanner alignment problems. Exemplary alignment mark designs substantially avoid or minimize damage during the fill-in and etching and chemical mechanical processing processes. Thus, additional processing steps to even out various layers or to address the... Agent: Macronix International Co., Ltd.

  
12/05/2013 > 290 patent applications in 115 patent subcategories. patent applications/inventions, industry category

20130320283 - Memory arrays and methods of forming an array of memory cells: A method of forming an array of memory cells includes forming lines of covering material that are elevationally over and along lines of spaced sense line contacts. Longitudinal orientation of the lines of covering material is used in forming lines comprising programmable material and outer electrode material that are between... Agent: Micron Technology, Inc.

20130320284 - Field focusing features in a reram cell: A resistive random access memory (ReRAM) cell, comprising a first conductive electrode and a dielectric storage material layer over the first conductive electrode. The dielectric storage material layer is conducive to the formation of conductive filaments during the application of a filament forming voltage to the cell. The cell includes... Agent:

20130320285 - Field focusing features in a reram cell: A resistive random access memory (ReRAM) cell comprising a first conductive electrode and a dielectric storage material layer over the first conductive electrode. The dielectric storage material layer is conducive to the formation of conductive filaments during the application of a filament forming voltage to the cell. The cell includes... Agent:

20130320287 - Memory cell that employs a selectively grown reversible resistance-switching element and methods of forming the same: A method of forming a memory cell is provided that includes forming a steering element above a substrate, forming a material layer on the substrate, patterning and etching the material layer, and oxidizing the patterned and etched material layer to form a reversible resistance-switching material. Numerous other aspects are provided.... Agent: Sandisk 3d LLC

20130320286 - Switching elements and devices, memory devices and methods of manufacturing the same: A switching element includes: a first electrode; a second electrode; and a silicon-containing chalconitride layer between the first electrode and the second electrode. A switching device includes: a threshold switch material layer between a first electrode and a second electrode. The threshold switch material layer includes a cationic metal element,... Agent:

20130320290 - Phase change memory devices and methods of manufacturing the same: A phase change memory device includes a phase change memory unit and a heat sink. The phase change memory unit includes a phase change material layer pattern, a lower electrode beneath the phase change material layer pattern configured to heat the phase change material layer pattern, and an upper electrode... Agent: Samsung Electronics Co., Ltd.

20130320289 - Resistance random access memory and method of fabricating the same: A resistance random access memory including a first electrode layer, a second electrode layer, and a stacked structure is provided. The stacked structure includes a HfZrON layer and a ZrON layer and is located between the first electrode layer and the second electrode layer. In addition, the disclosure further provides... Agent: Industrial Technology Research Institute

20130320288 - Semiconductor constructions and memory arrays: Some embodiments include semiconductor constructions having an electrically conductive interconnect with an upper surface, and having an electrically conductive structure over the interconnect. The structure includes a horizontal first portion along the upper surface and a non-horizontal second portion joined to the first portion at a corner. The second portion... Agent: Micron Technology, Inc.

20130320291 - Semiconductor structures and memory cells including conductive material and methods of fabrication: Methods of forming conductive elements, such as interconnects and electrodes, for semiconductor structures and memory cells. The methods include forming a first conductive material and a second conductive material comprising silver in a portion of at least one opening and performing a polishing process to fill the at least one... Agent: Micron Technology, Inc.

20130320292 - Semiconductor memory device: A semiconductor memory device in accordance with an embodiment comprises first lines, second lines, and a memory cell array including memory cells. Each of the memory cells is disposed at each of intersections of the first lines and the second lines and is configured by a rectifier element and a... Agent: Kabushiki Kaisha Toshiba

20130320294 - Common-substrate semiconductor devices having nanowires or semiconductor bodies with differing material orientation or composition: Common-substrate semiconductor devices having nanowires or semiconductor bodies with differing material orientation or composition and methods to form such common-substrate devices are described. For example, a semiconductor structure includes a first semiconductor device having a first nanowire or semiconductor body disposed above a crystalline substrate. The first nanowire or semiconductor... Agent:

20130320293 - Semiconductor light emitting device package and method of manufacturing the same: A semiconductor light emitting device package includes a base unit including a main body having electrical insulation properties and at least one pair of first and second through electrodes formed in the main body in a thickness direction thereof and formed of a semiconductor material, and a light emitting structure... Agent: Samsung Electronics Co., Ltd

20130320295 - Vacuum encapsulated, high temperature diamond amplified cathode capsule and method for making same: A vacuum encapsulated, hermetically sealed cathode capsule for generating an electron beam of secondary electrons, which generally includes a cathode element having a primary emission surface adapted to emit primary electrons, an annular insulating spacer, a diamond window element comprising a diamond material and having a secondary emission surface adapted... Agent: Brookhaven Science Associates, LLC

20130320297 - Large emission area light-emitting devices: Light-emitting devices, and related components, systems and methods are disclosed.... Agent: Luminus Devices, Inc.

20130320296 - Light emitting device with qcse-reversed and qcse-free multi quantum well structure: A light-emitting device comprises a semiconductor stacked structure, the semiconductor stacked structure comprising a p-type semiconductor layer, a n-type semiconductor layer and an multiple quantum well structure between the p-type semiconductor layer and the n-type semiconductor layer, wherein the multiple quantum well structure comprises a first multiple quantum well structure... Agent: Epistar Corporation

20130320301 - Light emitting diode having photonic crystal structure and method of fabricating the same: Disclosed are a light emitting diode (LED) having a photonic crystal structure and a method of fabricating the same. An LED comprises a support substrate, a lower semiconductor layer positioned on the support substrate, an upper semiconductor layer positioned over the lower semiconductor layer, an active region positioned between the... Agent: Seoul Opto Device Co., Ltd.

20130320300 - Light-emitting devices: Light-emitting devices are provided, the light-emitting devices include a light-emitting structure layer having a first conductive layer, a light-emitting layer and a second conductive layer sequentially stacked on a first of a substrate, a plurality of seed layer patterns formed apart each other in the first conductive layer; and a... Agent: Samsung Electronics Co., Ltd.

20130320299 - Monolithic semiconductor light emitting devices and methods of making the same: A monolithic semiconductor light emitting device is described. The device includes an n-type region, a p-type region, an active region of a multiple quantum well structure comprising a plurality of alternating barrier and active layers interposed between the n-type region and the p-type region. The device emits multiple single-wavelength spectral... Agent:

20130320298 - Semiconductor structure having nanocrystalline core and nanocrystalline shell with insulator coating: A semiconductor structure comprises a nanocrystalline core of a first semiconductor material, a nanocrystalline shell of a second, different, semiconductor material at least partially surrounding the nanocrystalline core, and an insulator layer encapsulating the nanocrystalline shell and core, wherein an outer surface of the insulator layer is ligand-functionalized.... Agent:

20130320302 - Devices comprising graphene and a conductive polymer and related systems and methods: The present invention generally relates to devices comprising graphene and a conductive polymer (e.g., poly(3,4-ethylenedioxythiophene) (PEDOT)), and related systems and methods. In some embodiments, the conductive polymer is formed by oxidative chemical vapor deposition.... Agent: Massachusetts Institute Of Technology

20130320303 - Radiation hardened transistors based on graphene and carbon nanotubes: Graphene- and/or carbon nanotube-based radiation-hard transistor devices and techniques for the fabrication thereof are provided. In one aspect, a method of fabricating a radiation-hard transistor is provided. The method includes the following steps. A radiation-hard substrate is provided. A carbon-based material is formed on the substrate wherein a portion of... Agent: International Business Machines Corporation

20130320304 - Carrier transport material and electronic device: A carrier transport material and an electronic device are provided. The carrier transport material includes a conjugated polyelectrolyte and a functional organic molecule. The conjugated polyelectrolyte includes a conjugated backbone and at least one alkyl side-chain, where a tail end of the alkyl side-chain has a first ionic group. The... Agent: Industrial Technology Research Institute

20130320319 - Electroactive materials: In the Formulae: Ar1 is an arylene having 6-30 carbons; Ar2 is an aryl group; Ar3 is an arylene; R1 is selected from H, D, aryl groups, alkyl groups, silyl groups, siloxane groups, fluoroalkyl groups, alkoxy groups, and fluoroalkoxy groups; R2 is selected from D, aryl groups, alkyl groups, silyl... Agent: E I Du Pont De Nemours And Company

20130320311 - Electroluminescent organic transistor: The present invention relates to a field effect electroluminescent ambipolar organic transistor in which there are two couples of control electrodes, a layer of ambipolar organic semiconductor in direct contact with the source and the drain electrode and two separate dielectric layers, and wherein said dielectric layers are each arranged... Agent:

20130320316 - Fused polycyclic heteroaromatic compound, organic thin film including compound and electronic device including organic thin film: A low-molecular-weight fused polycyclic heteroaromatic compound may have a compact planar structure in which seven or more rings are fused together, and thereby exhibits high charge mobility, and furthermore, enables the use of a deposition process or a room-temperature solution process when applied to devices, therefore realizing improved processibility. An... Agent:

20130320326 - Insulating material forming composition for electronic devices, insulating material for electronic devices, electronic devices and thin film transistor: A composition for forming an insulating material used in electronic devices which includes, as a polymerizable component, a monomer comprising two or more (meth)acrylic moieties and a polycyclic alicyclic structure.... Agent: Idemitsu Kosan Co., Ltd.

20130320318 - Iridium complex with methyl-d3 substitution: Novel organic compounds comprising ligands with deuterium substitution are provided. In particular, the compound is an iridium complex comprising methyl-d3 substituted ligands. The compounds may be used in organic light emitting devices to provide devices having improved color, efficiency and lifetime.... Agent: Universal Display Corporation

20130320321 - Light emitting device and electronic appliance using the same: A light emitting device comprises a pair of electrodes and a mixed layer provided between the pair of electrodes. The mixed layer contains an organic compound which contains no nitrogen atoms, i.e., an organic compound which dose not have an arylamine skeleton, and a metal oxide. As the organic compound,... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130320305 - Memory device with a double helix biopolymer layer and fabricating method thereof: The present invention relates to a write-once and read-many-times memory device and the fabricating method thereof. The structure of the memory device comprises: a substrate, a first electrode, a double helix biopolymer layer and a second electrode, and a plurality of metal nanoparticles are distributed in the double helix biopolymer... Agent: National Tsing Hua University

20130320323 - Method for fabricating organic electroluminescence device and organic electroluminescence device: A method for fabricating an organic electroluminescence device according to the present invention includes: preparing an organic electroluminescence device having a lower electrode, an organic layer including an emitting layer, an upper electrode, and a shorted part in which the lower electrode and the upper electrode are shorted; and irradiating... Agent: Panasonic Corporation

20130320324 - Organic el device and method of manufacturing organic el device: An organic EL device includes: a first substrate having electrical conductivity; an organic layer formed on the first substrate; a second substrate having translucency; and an electrode layer formed on the second substrate. The electrode layer on the first substrate and the organic layer on the second substrate contact each... Agent: Panasonic Corporation

20130320312 - Organic electroluminescent element and compound: [Disclosed is] a high-efficiency and durable organic electroluminescent element having a low drive voltage, being an organic electroluminescent element having on a substrate a pair of electrodes comprising an anode and a cathode and at least one organic layer including a light-emitting layer between these electrodes, with this organic electroluminescent... Agent:

20130320310 - Organic electroluminescent element, materials for organic electroluminescent element, and light emitting device, display device, or illumination device, each using the element, and compounds used in the element: i

20130320313 - Organic electronic devices, compositions, and methods: Organic electronic devices, compositions, and methods are disclosed that employ electrically conductive nanowires and conducting materials such as conjugated polymers such as sulfonated regioregular polythiophenes which provide high device performance such as good solar cell efficiency. Devices requiring transparent conductors that are resilient to physical stresses can be fabricated, with... Agent: Plextronics, Inc.

20130320309 - Organic image sensor with optical black regions: An organic image sensor includes a first organic photoelectric conversion pixel circuit on an active region of a substrate and a second organic photoelectric conversion pixel circuit on an optical black region of the substrate. The first organic photoelectric conversion pixel circuit includes a first organic photoelectric conversion element configured... Agent: Samsung Electronics Co., Ltd.

20130320307 - Organic light emitting device: The present invention relates to an organic light emitting device comprising a layered structure including a substrate, a bottom electrode and a top electrode, wherein the bottom electrode is closer to the substrate than the top electrode, the region between the bottom electrode and the top electrode defining an electronically... Agent: Novaled Ag

20130320314 - Organic light emitting diode display: An OLED display includes: a substrate; a first signal line provided on the substrate; a second signal line crossing the first signal line; a thin film transistor connected to the first signal line and the second signal line; a pixel electrode connected to a drain electrode of the thin film... Agent:

20130320308 - Organic light emitting display device and method for manufacturing the same: The present invention has been made in an effort to provide an organic light emitting display device comprising: a substrate; and subpixels formed on the substrate, each of the subpixels comprising an emission layer consisting of a first host layer made of a first host material, a mixed layer made... Agent: Lg Display Co., Ltd.

20130320315 - Organic light-emitting device: An organic light-emitting device (OLED) is disclosed. The OLED includes a light-emitting layer, a first electrode, and a second electrode, in which the light-emitting layer is interposed between the first and the second electrodes and includes a first molecular energy level of a host, and a second molecular energy level... Agent: Au Optronics Corporation

20130320320 - Organic light-emitting display apparatus: An organic light-emitting display apparatus for selectively realizing circular polarization according to external light conditions, including a substrate; an organic light-emitting device on the substrate; a sealing member on the organic light-emitting device; a phase retardation layer on a surface of the substrate, the organic light-emitting device, or the sealing... Agent: Samsung Display Co., Ltd.

20130320306 - Organic light-emitting display apparatus and method of manufacturing the same: An organic light-emitting display apparatus including an active layer and a first insulating layer on a substrate; a gate electrode on first insulating layer and including a first transparent conductive layer and a first metal layer, a second insulating layer on the gate electrode and including contact holes exposing source... Agent:

20130320325 - Surface light-emitting object: A surface light emitter according to an embodiment of the present invention, includes: a base material; a plurality of ribbon-shaped organic electroluminescent elements provided side by side on the base material; and a lenticular sheet that is attached to the base material and the ribbon-shaped organic electroluminescent elements through an... Agent: Nitto Denko Corporation

20130320317 - Thin film transistor substrate and display: An embodiment of the invention provides a thin film transistor substrate includes: a substrate; and a plurality of transistors, wherein each of the transistors includes a gate electrode disposed on the substrate; a first diffusion barrier layer disposed on the substrate and covering an upper surface and a ring sidewall... Agent:

20130320322 - Transparent conductive laminate body and organic thin film device: A problem is to provide a transparent conductive laminate body that has a low surface resistivity and an organic thin film device using the laminate body, and the problem is solved by a transparent conductive laminate body having a transparent substrate having laminated directly on at least one surface thereof... Agent: Lintec Corporation

20130320331 - Light-emitting device: To provide a novel light-emitting device that can be manufactured with high productivity. In a light-emitting device in which a light-emitting diode (LED) layer is provided over a substrate, a metal oxide semiconductor (c-axis aligned crystalline oxide semiconductor (CAAC-OS)) substrate including a crystal part having a c-axis which is substantially... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130320338 - Method of manufacturing thin-film transistor, thin-film transistor, display apparatus, sensor, and digital x-ray image-capturing apparatus: A method of fabricating a thin-film transistor, the method including: film-forming an active layer, that contains as a main component thereof an oxide semiconductor structured by O and at least two elements among In, Ga and Zn, in a film formation chamber into which at least oxygen is introduced, and... Agent: Fujifilm Corporation

20130320336 - Oxide semiconductor sputtering target, method of manufacturing thin-film transistors using the same, and thin film transistor manufactured using the same: An oxide semiconductor sputtering target which is used for depositing a thin film having high electron mobility and high operational reliability, a method of manufacturing thin-film transistors (TFTs) using the same, and a TFT manufactured using the same. The oxide semiconductor sputtering target is used in a sputtering process for... Agent: Samsung Corning Precision Materials Co., Ltd.

20130320333 - Semiconductor device: In a display portion of a liquid crystal display device, the dead space corresponding to a unit pixel is reduced while the aperture ratio of the unit pixel is increased. One amplifier circuit portion is shared by a plurality of unit pixels, so that the area of the amplifier circuit... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130320334 - Semiconductor device: A highly reliable semiconductor device including an oxide semiconductor is provided by preventing a change in its electrical characteristics. A semiconductor device which includes a first oxide semiconductor layer which is in contact with a source electrode layer and a drain electrode layer and a second oxide semiconductor layer which... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130320337 - Semiconductor device: A highly reliable semiconductor device that includes a transistor including an oxide semiconductor, which can display a high-definition image and can be manufactured with a high yield. The semiconductor device includes a pixel portion including a plurality of pixels, a gate signal line driver circuit portion, and a source signal... Agent:

20130320330 - Semiconductor device and method for manufacturing the same: In order to form a structure in which an oxide semiconductor layer through which a carrier flows is not in contact with a gate insulating film, a buried channel structure in which the oxide semiconductor layer through which a carrier flows is away from the gate insulating film containing silicon... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130320332 - Semiconductor device and method for manufacturing the same: A transistor including an oxide semiconductor film, which has stable electric characteristics is provided. A transistor including an oxide semiconductor film, which has excellent on-state characteristics is also provided. A semiconductor device in which an oxide semiconductor film having low resistance is formed and the resistance of a channel region... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130320335 - Semiconductor device and method for manufacturing the same: A semiconductor device is provided which is used as a power device for a high-power application, includes an oxide semiconductor, and has high withstand voltage and high reliability. A semiconductor device for a high-power application with high productivity is also provided. In a crystal part included in an oxide semiconductor... Agent:

20130320327 - Thin film transistor and method of forming the same: A thin film transistor includes a substrate, an oxide semiconductor layer that is disposed on the substrate, a gate electrode that overlaps with the oxide semiconductor layer, a gate insulating layer that is disposed between the oxide semiconductor layer and the gate electrode, and a source electrode and a drain... Agent: Samsung Display Co., Ltd.

20130320329 - Thin film transistor structure and array substrate using the same: A thin film transistor structure is provided. The thin film transistor structure includes a first transistor having a first active layer, a second transistor having a second active layer, a first protection layer contacting the first active layer, and a second protection layer contacting the second active layer. The oxygen... Agent: E Ink Holdings Inc.

20130320328 - Thin film transistor, thin film transistor array panel including the same, and manufacturing method thereof: The present invention relates to a thin film transistor, a thin film transistor array panel, and a manufacturing method thereof. A thin film transistor according to an exemplary embodiments of the present invention includes: a gate electrode; a gate insulating layer positioned on or under the gate electrode; a channel... Agent: Samsung Display Co., Ltd.

20130320339 - Thin-film semiconductor device and method for manufacturing the same: A thin-film semiconductor device includes a gate electrode formed above a substrate; a gate insulating film formed to cover the gate electrode; a semiconductor layer formed above the gate insulating film and having a channel region; a channel protective layer formed above the semiconductor layer and containing an organic material... Agent: Panasonic Corporation

20130320340 - Circuit technique to electrically characterize block mask shifts: A physical test integrated circuit has a plurality of repeating circuit portions corresponding to an integrated circuit design. A first of the portions is fabricated with a nominal block mask location, and additional ones of the portions are deliberately fabricated with predetermined progressive increased offset of the block mask location... Agent: International Business Machines Corporation

20130320341 - Three dimensional memory structure: A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit... Agent:

20130320342 - Ultra-large grain polycrystalline semiconductors through top-down aluminum induced crystallization (taic): A seed layer structure is annealed. The seed layer structure comprises a crystallization catalyst material on a seed semiconductor over a substrate. The seed semiconductor comprises an amorphous portion. Annealing of the seed layer structure converts the amorphous portion into a crystalline portion. The crystalline portion is connected to the... Agent:

20130320343 - Structure for creating ohmic contact in semiconductor devices and methods for manufacture: A semiconductor-to-metal interface with ohmic contact is provided. The interface includes a semiconductor material, a metal layer, and a silicon carbide layer disposed between the semiconductor material and the metal layer. The silicon carbide layer causes the formation of a semiconductor-to-metal interface with ohmic contact. Applications include forming a photovoltaic... Agent:

20130320344 - Thin film transistor array panel: A thin film transistor array panel includes: a semiconductor layer disposed on an insulation substrate; a gate electrode overlapping the semiconductor layer; a source electrode and a drain electrode overlapping the semiconductor layer; a first barrier layer disposed between the source electrode and the semiconductor layer; and a second barrier... Agent: Samsung Display Co., Ltd.

20130320346 - Array substrate for liquid crystal display and manufacturing method thereof: An array substrate for a liquid crystal display (LCD) and manufacturing method thereof are provided. The array substrate for a liquid crystal display (LCD) includes: a substrate, including: a gate electrode, a pixel electrode, and a common electrode, a gate pad formed on the substrate, and connected to the gate... Agent: Lg Display Co., Ltd.

20130320345 - Method of forming an active pattern, display substrate formed by the same, and method of manufacturing the display substrate: In a method of forming an active pattern, a gate metal layer is formed on a base substrate. The gate metal layer is patterned to form a gate line, and a gate pattern spaced apart from the gate line. A gate insulation layer is formed on the base substrate including... Agent: Samsung Display Co., Ltd.

20130320347 - Thin film transistor array panel and a method for manufacturing the same: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of... Agent:

20130320348 - Analog memory cell circuit for the ltps tft-lcd: The present invention provides an analog memory cell circuit for the LTPS TFT-LCD. The circuit comprises the first transistor, second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the capacitor. It comprises a plurality of operation period, wherein the transistors are... Agent: National Chiao Tung University

20130320350 - Compound semiconductor transistor with self aligned gate: A transistor device includes a compound semiconductor body having a first surface and a two-dimensional charge carrier gas disposed below the first surface in the compound semiconductor body. The transistor device further includes a source in contact with the two-dimensional charge carrier gas and a drain spaced apart from the... Agent: Infineon Technologies Austria Ag

20130320349 - In-situ barrier oxidation techniques and configurations: Embodiments of the present disclosure describe apparatuses, methods, and systems of an integrated circuit (IC) device. The IC device may include a buffer layer disposed on a substrate, the buffer layer including gallium (Ga) and nitrogen (N), a barrier layer disposed on the buffer layer, the barrier layer including aluminum... Agent: Triquint Semiconductor, Inc.

20130320353 - Method of forming a group iii-nitride crystalline film on a patterned substrate by hydride vapor phase epitaxy (hvpe): A method of depositing a high quality low defect single crystalline Group III-Nitride film. A patterned substrate having a plurality of features with inclined sidewalls separated by spaces is provided. A Group III-Nitride film is deposited by a hydride vapor phase epitaxy (HVPE) process over the patterned substrate. The HVPE... Agent: Applied Materials, Inc.

20130320352 - Ohmic contact to semiconductor layer: A perforating ohmic contact to a semiconductor layer in a semiconductor structure is provided. The perforating ohmic contact can include a set of perforating elements, which can include a set of metal protrusions laterally penetrating the semiconductor layer(s). The perforating elements can be separated from one another by a characteristic... Agent:

20130320354 - Semiconductor device including a normally-off transistor and transistor cells of a normally-on gan hemt: A semiconductor device includes a first semiconductor die including a normally-off transistor and a second semiconductor die including a plurality of transistor cells of a normally-on GaN HEMT. One of a source terminal and a drain terminal of the normally-off transistor is electrically coupled to a gate terminal of the... Agent:

20130320351 - Semiconductor light emitting device and method for manufacturing the same: A semiconductor light emitting device is provided and includes a protective element including a first lower conductivity-type semiconductor layer and a second lower conductivity-type semiconductor layer. First and second lower electrodes are connected to the first lower conductivity-type semiconductor layer and the second lower conductivity-type semiconductor layer, respectively. A light... Agent: Samsung Electronics Co., Ltd.

20130320355 - Substrate structure, method of forming the substrate structure and chip comprising the substrate structure: A groove structure formed on a surface of a substrate. The groove structure includes a lateral epitaxial pattern in a cross section perpendicular to the surface, which has: a first edge inclined to the surface; a second edge adjacent to first edge and parallel to the surface; a third edge... Agent:

20130320357 - Epitaxial silicon carbide single crystal substrate and method for producing same: Provided are an epitaxial silicon carbide single crystal substrate having a high-quality silicon carbide single crystal thin film with less stacking faults on a silicon carbide single crystal substrate and a production method therefor. The epitaxial silicon carbide single crystal substrate is produced by growing a silicon carbide epitaxial layer... Agent: Nippon Steel & Sumitomo Metal Corporation

20130320356 - Semiconductor structure having a nitride active layer on a doped silicon carbide heat spreader: A semiconductor structure having: a doped silicon carbide heat spreader; a semi-insulating silicon carbide layer disposed over the doped silicon carbide heat spreader; and a nitride (such as GaN, Indium nitride, Aluminum nitride) semiconductor layer disposed on the semi-insulating silicon carbide layer.... Agent: Raytheon Company

20130320358 - Semiconductor device and a method of manufacturing the same: A semiconductor device is manufactured by forming at least one epitaxial structure over a substrate. A portion of the substrate is cut and lifted to expose a partial surface of the epitaxial structure. A first electrode is then formed on the exposed partial surface to result in a vertical semiconductor... Agent: Phostek, Inc.

20130320359 - Heterogeneous stack structures with optical to electrical timing reference distribution: A heterogeneous stack structure is provided which includes one or more optical signal-based chips and multiple electrical signal-based chips. The optical chip(s) and the electrical chip(s) are different layers of the stack structure, and the optical chip(s) includes optical signal paths extending at least partially laterally within the optical chip(s).... Agent: Sematech, Inc.

20130320360 - Diffusion type led apparatus utilizing dye-sensitized solar cells: An LED luminaire has a dye-sensitized solar cell for converting light emitted from a light source to electric energy and uses the converted electric energy. Since the dye-sensitized solar cell plays a role of a diffusion plate, the LED luminaire may diffuse light and convert wasted light into power. Further,... Agent:

20130320364 - Display device and manufacturing method thereof: A display device in which light leakage in a monitor element portion is prevented without increasing the number of steps and cost is provided. The display device includes a monitor element for suppressing influence on a light-emitting element due to temperature change and change over time and a TFT for... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130320362 - High voltage light emitting diode package and method for manufacuting the same: A high voltage LED package includes a substrate and LED chips formed on a top surface of the substrate. A periphery of each LED chip is roughened. The LED chips are electrically connected in series.... Agent: Advanced Optoelectronic Technology, Inc.

20130320366 - Light source and light-source band: LED light source having at least one light-emitting component. The light-emitting component is at least partly protected with a transparent protective material, which contains aliphatic thermoplastic polyurethane (TPU). A light-source band also includes at least one light-emitting component.... Agent: Marimils Oy

20130320365 - Lighting device: A lighting device includes a heat sink, through which air can flow transversely to its longitudinal extension and a plurality of semiconductor light sources, in particular light-emitting diodes, arranged on the heat sink, wherein at least two of the semiconductor light sources are aligned in different directions.... Agent: Osram Gmbh

20130320361 - Multichip package structure for generating a symmetrical and uniform light-blending source: A multichip package structure for generating a symmetrical and uniform light-blending source includes a substrate unit, a light-emitting unit and a package unit. The substrate unit includes a substrate body and at least one bridging conductive layer disposed on the top surface of the substrate body. The light-emitting unit includes... Agent: Brightek Optoelectronic Co., Ltd.

20130320363 - Sapphire substrate configured to form light emitting diode chip providing light in multi-directions, light emitting diode chip, and illumination device: A sapphire substrate configured to form a light emitting diode (LED) chip providing light in multi-directions, a LED chip and an illumination device are provided in the present invention. The sapphire substrate includes a growth surface and a second main surface opposite to each other. A thickness of the sapphire... Agent: Formosa Epitaxy Incorporation

20130320368 - Light-emitting element, light-emitting device, display device, electronic device, and lighting device: Disclosed is a light-emitting element comprising a plurality of light-emitting units which are separated from one another by a charge generation layer. The light-emitting units each have a light-emitting layer which is featured by a stack of two layers. Each of the two layers includes a host material and a... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130320369 - Optoelectronic semiconductor device: An optoelectronic semiconductor device includes a first light source that emits green, white or white-green light and includes a semiconductor chip that emits in the blue spectral range, and a first conversion element attached directly to the semiconductor chip, a second light source that emits red light, having a semiconductor... Agent: Osram Opto Semiconductors, Gmbh

20130320367 - Organic light emitting display device and method of manufacturing the same: An organic light emitting display device including a plurality of sub pixels, each of the sub pixels including an emissive layer between a pixel electrode and a counter electrode; and a partition wall defining regions of the plurality of sub pixels, wherein the partition wall is not located between at... Agent:

20130320384 - Ceramic conversion element, semiconductor chip comprising a ceramic conversion element and method for producing a ceramic conversion element: A ceramic conversion element includes an active ceramic layer that converts electromagnetic radiation in a first wavelength range into electromagnetic radiation in a second wavelength range, which is different from the first wavelength range, and a carrier layer transmissive to radiation in the first wavelength range and/or radiation in the... Agent: Osram Opto Semiconductors Gmbh

20130320371 - Device module: According to one embodiment, a device module includes a mounting substrate, a device, and a bonding agent. The mounting substrate has a mounting surface and a plurality of pads. The device includes a plurality of electrode surfaces arranged in a first direction. The pad has a first width portion and... Agent: Kabushiki Kaisha Toshiba

20130320374 - Double-layer circuit structure with high heat-dissipation efficiency: The present invention relates to a double-layer circuit structure with high heat-dissipation efficiency, comprising: a first thermal-conductive and electric-insulating layer, a plurality of first metal pads, a second thermal-conductive and electric-insulating layer, a circuit layer, and an anti-soldering layer. In the double-layer circuit structure, the second thermal-conductive and electric-insulating layer... Agent: Kocam International Co., Ltd.

20130320379 - Epoxy resin composition and light emitting apparatus: Disclosed are an epoxy resin composition and a light emitting apparatus. The epoxy resin composition includes a triazine derivative epoxy resin and an alicyclic epoxy resin.... Agent:

20130320376 - Frame holder: A method of assembling an optical element on top of an active component in a substrate, by providing a substrate with active component and an optical element with a base and lateral base walls, fixating a bottom surface of a frame holder with opening and lateral frame walls arranged in... Agent:

20130320373 - Light emitting device: The present invention relates to a light emitting device comprising a transparent substrate which light can pass through and at least one LED chip emitting light omni-directionally. Wherein the LED chip is disposed on one surface of the substrate and the light emitting angle of the LED chip is wider... Agent: Formosa Epitaxy Incorporation

20130320381 - Light emitting device, light emitting module, and method for manufacturing light emitting device: According to one embodiment, a light emitting device includes a semiconductor layer, a p-side electrode, an n-side electrode, a first insulating layer, a p-side interconnect layer, an n-side interconnect layer, and a second insulating layer. The portion of the second p-side interconnect layer has the L-shaped cross section being configured... Agent: Kabushiki Kaisha Toshiba

20130320372 - Light emitting diode and method for manufacturing the same: A light emitting diode, comprising a light emitting diode (LED) cell, a dielectric layer and a metal layer is provided. The LED cell has a top surface, a bottom surface, a first lateral surface and a second lateral surface. The bottom surface is opposite to the top surface. The second... Agent: Lextar Electronics Corporation

20130320378 - Light-emitting device: A light-emitting device includes a face-up type LED chip formed rectangular in a top view, and a rectangular parallelepiped-shaped sealing portion to seal the LED chip. An angle formed between a side surface of the LED chip and a side surface of the sealing portion in the top view is... Agent:

20130320377 - Light-emitting element, light-emitting device, display device, electronic device, and lighting device: An object is to provide a light-emitting element which uses a plurality of kinds of light-emitting dopants and has high emission efficiency. In one embodiment of the present invention, a light-emitting device, a light-emitting module, a light-emitting display device, an electronic device, and a lighting device each having reduced power... Agent: Semiconductor Energy Laboratory Co., Ltd.

20130320380 - Lighting device and method of manufacturing the same: In a first aspect of the present invention, a lighting device includes a light-emitting element, a frame including a phosphor that can be excited by light emitted from the light-emitting element, the frame having an inner side surface surrounding the light-emitting element and an outer side surface being positioned outside... Agent:

20130320385 - Method for producing a radiation conversion element, radiation conversion element and optoelectronic component containing a radiation conversion element: A method for producing a radiation conversion element is provided, in which a solution is applied to a substrate, a gel is formed from the solution and the gel is thermally treated. A radiation conversion element is also provided which is produced according to the method. An optoelectronic component is... Agent: Osram Opto Semiconductors Gmbh

20130320375 - Optoelectronic device and method for forming the same: According to an embodiment of the invention, an optoelectronic device is provided. The optoelectronic device includes: a lead frame having a reflective structure, wherein the reflective structure has an opening; an optoelectronic element disposed in the opening; at least one electrode disposed in the lead frame and electrically connected to... Agent: Delta Electronics, Inc.

20130320382 - Semiconductor light emitting device: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a p-side electrode, an n-side electrode, an inorganic insulating film, a p-side interconnection portion, an n-side interconnection portion, and an organic insulating film. The organic insulating film is provided on the inorganic insulating film, at least on... Agent: Kabushiki Kaisha Toshiba

20130320383 - Semiconductor light emitting device: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a p-side electrode, an n-side electrode, a p-side metal pillar, an n-side metal pillar, and an insulator. The semiconductor layer includes a first surface, a second surface opposite to the first surface, and a light emitting layer.... Agent: Kabushiki Kaisha Toshiba

20130320370 - Solid state transducer dies having reflective features over contacts and associated systems and methods: Systems and methods for improved light emitting efficiency of a solid state transducer (SST), for example light emitting diodes (LED), are disclosed. One embodiment of an SST die in accordance with the technology includes a reflective material disposed over electrical connectors on a front side of the die. The reflective... Agent: Micron Technology, Inc.

20130320390 - Flexible light emitting semiconductor device: A flexible polymeric dielectric layer has first and second major surfaces. The first major surface has a conductive layer thereon. The dielectric layer has at least one via extending from the second major surface to the first major surface. The conductive layer includes electrically separated first and second portions configured... Agent: 3m Innovative Properties Company

20130320387 - Light emitting diode and manufacturing method thereof: A light emitting diode (LED) and a manufacturing method thereof are provided. The LED comprises a semiconductor composite layer and an electrode. The semiconductor composite layer provides holes and electrons and allows the holes and the electrons to be combined to emit light. The electrode is formed on the semiconductor... Agent: Walsin Lihwa Corporation

20130320388 - Light-emitter and transistor: A light-emitter with a bank having an upper surface located at a height of h0 with reference to the top surface of the base layer and a circumferential surface facing the aperture in the bank. When h denotes a height of a given point on the circumferential surface with reference... Agent: Panasonic Corporation

20130320386 - Methods of separating solid state transducers from substrates and associated devices and systems: Wafer-level processing of wafer assemblies with transducers is described herein. A method in accordance with some embodiments includes forming a solid state transducer device by forming one or more trenches to define solid state radiation transducers. An etching media is delivered in to the trenches to release the transducers from... Agent: Micron Technology, Inc.

20130320389 - Semiconductor light-emitting device: Disclosed is a semiconductor light emitting device. The semiconductor light emitting device includes a first conductive semiconductor layer, an active layer under the first conductive semiconductor layer, a second conductive semiconductor layer under the active layer, a second electrode layer under the second conductive semiconductor layer; and an insulating layer... Agent: Lg Innotek Co., Ltd.

20130320392 - Curable composition for encapsulating optical semiconductor and optical semiconductor apparatus using the same: The curable composition for encapsulating an optical semiconductor includes, a linear polyfluoro compound, a cyclic organosiloxane having a SiH group and a fluorine-containing organic group, and/or an organo hydrogen siloxane having a SiH group and a fluorine-containing organic group, a platinum group metal catalyst, a cyclic organosiloxane having a SiH... Agent: Shin-etsu Chemical Co., Ltd.

20130320393 - Epoxy resin composition and light emitting apparatus: Disclosed are an epoxy resin composition and a light emitting apparatus. The epoxy resin composition includes a triazine derivative epoxy resin and a silicon-containing alicyclic epoxy resin... Agent:

20130320391 - Light-emitting device: A light-emitting device includes a light-emitting element, and a sealing material for sealing the light-emitting element. The sealing material includes a first layer including a radical polymerizable resin and a second layer including a non-radical polymerizable resin, the first layer being in contact with the light-emitting element and the second... Agent: Toyoda Gosei Co., Ltd.

20130320394 - Method for producing group-iii nitride semiconductor crystal, group-iii nitride semiconductor substrate, and semiconductor light emitting device: The method for producing a group III nitride semiconductor crystal comprises preparing a seed crystal having a non-polar plane followed by growing a group III nitride semiconductor from the non-polar plane in a vapor phase, wherein the growing includes growing the group III nitride semiconductor so as to extend in... Agent: Mitsubishi Chemical Corporation

20130320395 - High-voltage vertical power component: A vertical power component including: a silicon substrate of a first conductivity type; on the side of a lower surface of the substrate supporting a single electrode, a lower layer of the second conductivity type; and on the side of an upper surface of the substrate supporting a conduction electrode... Agent: Stmicroelectronics (tours) Sas

20130320396 - Mutual ballasting multi-finger bidirectional esd device: An integrated circuit includes a bidirectional ESD device which has a plurality of parallel switch legs. Each switch leg includes a first current switch and a second current switch in a back-to-back configuration. A first current supply node of each first current switch is coupled to a first terminal of... Agent: Texas Instruments Incorporated

20130320397 - Fully isolated ligbt and methods for forming the same: A device includes a dielectric layer, and a heavily doped semiconductor layer over the dielectric layer. The heavily doped semiconductor layer is of a first conductivity type. A semiconductor region is over the heavily doped semiconductor layer, wherein the semiconductor region is of a second conductivity type opposite the first... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320398 - Latch-up robust scr-based devices: An approach for providing a latch-up robust silicon control rectifier (SCR) is disclosed. Embodiments include providing a first N+ region and a first P+ region in a substrate for a SCR; providing first and second n-well regions in the substrate proximate the first N+ and P+ regions; providing a second... Agent: Globalfoundries Singapore Pte. Ltd.

20130320399 - Embedded planar source/drain stressors for a finfet including a plurality of fins: Fin-defining mask structures are formed over a semiconductor material layer having a first semiconductor material and a disposable gate structure is formed thereupon. A gate spacer is formed around the disposable gate structure and physically exposed portions of the fin-defining mask structures are subsequently removed. The semiconductor material layer is... Agent: International Business Machines Corporation

20130320400 - Heterojunction semiconductor device and manufacturing method: Disclosed is a semiconductor device comprising a group 13 nitride heterojunction comprising a first layer having a first bandgap and a second layer having a second bandgap, wherein the first layer is located between a substrate and the second layer; and a Schottky electrode and a first further electrode each... Agent: Nxp B.v.

20130320401 - Mixed orientation semiconductor device and method: A method of making a semiconductor device begins with a semiconductor wafer that includes a first semiconductor layer overlying a second semiconductor layer. A first trench is etched in the semiconductor wafer. The first trench is filled with insulating material. A second trench is etched within the first trench and... Agent: Infineon Technologies Ag

20130320402 - Phemt hbt integrated epitaxial structure and a fabrication method thereof: An improved pseudomorphic high electron mobility transistor (pHEMT) and heterojunction bipolar transistor (HBT) integrated epitaxial structure and the fabrication method thereof, in which the structure comprises a substrate, a pHEMT structure, an etching-stop spacer layer, and an HBT structure. The pHEMT's structure comprises a buffer layer, a barrier layer, a... Agent: Win Semiconductors Corp.

20130320403 - Epitaxial base layers for heterojunction bipolar transistors: An exemplary embodiment of the present invention provides a heterojunction bipolar transistor comprising an emitter, a collector, and a base. The base can be disposed substantially between the emitter and collector. The base can comprise a plurality of alternating type-I and type-II layers arranged to form a short period super... Agent: Georgia Tech Research Corporation

20130320404 - Gallium nitride to silicon direct wafer bonding: A direct wafer bonding process for joining GaN and silicon substrates involves pre-treating each of the wafers in an ammonia plasma in order to render the respective contact surfaces ammophilic. The GaN substrate and the silicon substrate may each comprise single crystal wafers. The resulting hybrid semiconductor structure can be... Agent:

20130320405 - Semiconductor device having decoupling capacitors and dummy transistors: A semiconductor device includes a logic region disposed in a central region of the semiconductor device, and a peripheral region disposed in an outer region thereof. The logic region includes a line-shaped logic transistor and a box-shaped decoupling capacitor. The peripheral region includes a line-shaped peripheral transistor and a line-shaped... Agent: Samsung Electronics Co., Ltd.

20130320406 - Image sensor devices having dual-gated charge storage regions therein: An image sensor device may include a dual-gated charge storage region within a substrate. The dual-gated charge storage region includes first and second diodes within a common charge generating region. This charge generating region is configured to receive light incident on a surface of the image sensor device. The first... Agent:

20130320407 - Image sensor: An image sensor includes a first device isolation layer separating a plurality of pixels from one another, and a second device isolation layer disposed along inner side surfaces of parts of the first device isolation layer that extend around the pixels. The second device isolation layer delimits an active region... Agent: Samsung Electronics Co., Ltd.

20130320411 - Borderless contacts for metal gates through selective cap deposition: A semiconductor device including a gate structure present on a channel portion of a substrate, in which the gate structure includes at least one high-k gate dielectric layer and at least one metal gate conductor. A source region and a drain region is present on opposing sides of the channel... Agent: International Business Machines Corporation

20130320414 - Borderless contacts for metal gates through selective cap deposition: A semiconductor device including a gate structure present on a channel portion of a substrate, in which the gate structure includes at least one high-k gate dielectric layer and at least one metal gate conductor. A source region and a drain region is present on opposing sides of the channel... Agent: International Business Machines Corporation

20130320415 - Full silicidation prevention via dual nickel deposition approach: Semiconductor devices are formed without full silicidation of the gates and with independent adjustment of silicides in the gates and source/drain regions. Embodiments include forming a gate on a substrate, forming a nitride cap on the gate, forming a source/drain region on each side of the gate, forming a first... Agent: Globalfoundries Inc.

20130320412 - Isolated insulating gate structure: Systems and methods are presented for forming a gate structure comprising an insulative portion, whereby the insulative portion is utilized to electrically isolate an electrically conductive portion of the gate structure from a conductive element located in the vicinity of the gate structure. The insulative portion is formed by chemically... Agent: Toshiba America Electronic Components, Inc.

20130320410 - Metal gate electrode of a semiconductor device: The invention relates to integrated circuit fabrication, and more particularly to a metal gate electrode. An exemplary structure for a semiconductor device comprises a substrate comprising a major surface; a first rectangular gate electrode on the major surface comprising a first layer of multi-layer material; a first dielectric material adjacent... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320417 - Methods to enhance doping concentration in near-surface layers of semiconductors and methods of making same: A die includes a semiconductive prominence and a surface-doped structure on the prominence. The surface-doped structure makes contact with contact metallization. The prominence may be a source- or drain contact for a transistor. Processes of making the surface-doped structure include wet- vapor- and implantation techniques, and include annealing techniques to... Agent:

20130320416 - Semiconductor device: A semiconductor device and a method for forming the same are provided. The method includes: providing a substrate having a gate structure and first spacers on both sidewalls of the gate structure formed on a top surface of the substrate; forming first openings in the substrate by using the first... Agent: Semiconductor Manufacturing International (beijing) Corporation

20130320408 - Semiconductor structure and fabricating method thereof: A semiconductor device comprises a substrate, a metal-semiconductor compound layer and at least one kind of metal dopant. The substrate has a surface. The metal-semiconductor compound layer extends downwards into the substrate from the surface. The metal dopant which is made by one of a group of metal elements with... Agent: National Applied Research Laboratories

20130320413 - Semiconductor structure and method for forming the same: A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a semiconductor substrate; a trench formed in the semiconductor substrate, in which a rare earth oxide layer is formed in the trench; a channel region partly or entirely formed on the rare earth oxide... Agent:

20130320409 - Source and drain architecture in an active region of a p-channel transistor by tilted implantation: In sophisticated P-channel transistors, which may frequently suffer from a pronounced surface topography of the active regions with respect to the surrounding isolation regions, superior performance may be achieved by using a tilted implantation upon forming the deep drain and source regions, preferably with the tilt angle of 20 degrees... Agent: Globalfoundries Inc.

20130320419 - Cis image sensors with epitaxy layers and methods for forming the same: A method includes performing a first epitaxy to grow a first epitaxy layer of a first conductivity type, and performing a second epitaxy to grow a second epitaxy layer of a second conductivity type opposite the first conductivity type over the first epitaxy layer. The first and the second epitaxy... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320418 - Self-aligned implantation process for forming junction isolation regions: A device includes a semiconductor substrate, a well region in the semiconductor substrate, and a Metal-Oxide-Semiconductor (MOS) device. The MOS device includes a gate dielectric overlapping the well region, a gate electrode over the gate dielectric, and a source/drain region in the well region. The source/drain region and the well... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320420 - Cmos image sensors and methods for forming the same: A device includes a diode, which includes a first, a second, and a third doped region in a semiconductor substrate. The first doped region is of a first conductivity type, and has a first impurity concentration. The second doped region is of the first conductivity type, and has a second... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320421 - Metal-oxide-semiconductor capacitor: A MOS capacitor includes a substrate, a p-type MOS (pMOS) transistor positioned on the substrate, and an n-type MOS (nMOS) transistor positioned on the substrate. More important, the pMOS transistor and the nMOS transistor are electrically connected in parallel. The MOS transistor further includes a deep n-well that encompassing the... Agent:

20130320422 - Finfet contacting a conductive strap structure of a dram: A conductive strap structure in lateral contact with a top semiconductor layer is formed on an inner electrode of a deep trench capacitor. A cavity overlying the conductive strap structure is filled with a dielectric material to form a dielectric capacitor cap having a top surface that is coplanar with... Agent: International Business Machines Corporation

20130320423 - Wrap-around fin for contacting a capacitor strap of a dram: A conductive strap structure in lateral contact with a top semiconductor layer is formed on an inner electrode of a deep trench capacitor. A cavity overlying the conductive strap structure is filled a dielectric material to form a dielectric capacitor cap having a top surface that is coplanar with a... Agent: International Business Machines Corporation

20130320424 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a first source layer; at least one of a second source layer, the second source layer formed substantially in the first source layer; a plurality of conductive layers stacked substantially over the first source layer; channel layers that pass through the plurality of conductive layers and... Agent: Sk Hynix Inc.

20130320425 - Nonvolatile semiconductor memory device: s

20130320426 - Nonvolatile semiconductor memory device and method of fabricating the same: According to one embodiment, a nonvolatile semiconductor memory device includes a semiconductor region, a tunnel insulator provided above the semiconductor region, a charge storage insulator provided above the tunnel insulator, a block insulator provided above the charge storage insulator, a control gate electrode provided above the block insulator, and an... Agent: Kabushiki Kaisha Toshiba

20130320428 - Electronic device including a gate electrode and a gate tap: An electronic device can include a gate electrode and a gate tap that makes an unlanded contact to the gate electrode. The electronic device can further include a source region and a drain region that may include a drift region. In an embodiment, the gate electrode has a height that... Agent:

20130320427 - Gated circuit structure with self-aligned tunneling region: A tunnel field-effect transistor is provided, which includes a fin-shaped, source-drain circuit structure with a source region and a drain region. The circuit structure is angled in cross-sectional elevation, and includes a first portion and a second portion. The first portion extends away from the second portion, and the source... Agent: Sematech, Inc.

20130320429 - Processes and structures for dopant profile control in epitaxial trench fill: Methods of depositing epitaxial material using a repeated deposition and etch process. The deposition and etch processes can be repeated until a desired thickness of silicon-containing material is achieved. During the deposition process, a doped silicon film can be deposited. The doped silicon film can be selectively deposited in a... Agent: AsmIPHolding B.v.

20130320434 - Semiconductor device having embedded strain-inducing pattern and method of forming the same: In a semiconductor device, a first active region has a first Σ-shape, and the second active region has a second Σ-shape. When a line that is perpendicular to the substrate and passes a side surface of a first gate electrode in the first region is defined as a first vertical... Agent:

20130320433 - Vertical channel transistor with self-aligned gate electrode and method for fabricating the same: A method for fabricating vertical channel transistors includes forming a plurality of pillars which have laterally opposing both sidewalls, over a substrate; forming a gate dielectric layer on both sidewalls of the pillars; forming first gate electrodes which cover any one sidewalls of the pillars and shield gate electrodes which... Agent:

20130320431 - Vertical power mosfet and methods for forming the same: A device includes a semiconductor region in a semiconductor chip, a gate dielectric layer over the semiconductor region, and a gate electrode over the gate dielectric. A drain region is disposed at a top surface of the semiconductor region and adjacent to the gate electrode. A gate spacer is on... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320430 - Vertical power mosfet and methods of forming the same: A device includes a semiconductor layer of a first conductivity type, and a first and a second body region over the semiconductor layer, wherein the first and the second body regions are of a second conductivity type opposite the first conductivity type. A doped semiconductor region of the first conductivity... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320432 - Vertical power mosfet and methods of forming the same: A device includes a semiconductor layer of a first conductivity type, and a first and a second body region over the semiconductor layer, wherein the first and the second body regions are of a second conductivity type opposite the first conductivity type. A doped semiconductor region of the first conductivity... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320439 - Device: A semiconductor device has a first and second transistors formed on an active region defined by an insulating region. The active region is divided into a first and second portions arranged in a first direction, and into a third and fourth portions interposed between the first portion and the second... Agent:

20130320440 - Floating body transistor constructions, semiconductor constructions, and methods of forming semiconductor constructions: The invention includes floating body transistor constructions containing U-shaped semiconductor material slices. The U-shapes have a pair of prongs joined to a central portion. Each of the prongs contains a source/drain region of a pair of gatedly-coupled source/drain regions, and the floating bodies of the transistors are within the central... Agent: Micron Technology, Inc.

20130320437 - Power mosfet and methods for forming the same: A device includes a trench extending into a semiconductor region and having a first conductivity type, and a conductive field plate in the trench. A first dielectric layer separates a bottom and sidewalls of the field plate from the semiconductor region. A main gate is disposed in the trench and... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320436 - Semiconductor device and method for fabricating the same: A semiconductor device includes a substrate including an active region, an insulation layer formed over the substrate, a plurality of openings formed in the insulation layer, a plurality of contact plugs filling the plurality of openings, a silicide layer formed over the substrate and between the substrate and each contact... Agent:

20130320438 - Semiconductor device and method for manufacturing the same: A semiconductor device comprises a gate electrode buried in a trench within a semiconductor substrate, a first sealing insulating film disposed over the gate electrode and the semiconductor substrate, an ion-implanting region disposed in portions of the semiconductor substrate adjacent to sidewalls of the trench, and a second sealing insulating... Agent: Sk Hynix Inc.

20130320435 - Trench power mosfet: A device includes a semiconductor region of a first conductivity type, a trench extending into the semiconductor region, and a conductive field plate in the trench. A first dielectric layer separates a bottom and sidewalls of the field plate from the semiconductor region. A main gate is disposed in the... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320441 - Semiconductor device and method for manufacturing the same: A semiconductor device and a method for manufacturing the same are disclosed. The method for forming the semiconductor device includes forming one or more buried gates in a semiconductor substrate, forming a landing plug between the buried gates, forming a bit line region exposing the landing plug over the semiconductor... Agent: Sk Hynix Inc.

20130320442 - Transistor device and method for manufacturing the same: Provided is a transistor device including at least a vertical transistor structure. The vertical transistor structure includes a substrate, a dielectric layer, a gate, a first doped region, a second doped region, a third doped region, and a fourth doped region. The dielectric layer is disposed in a trench of... Agent: Nanya Technology Corporation

20130320443 - Deep silicon via as a drain sinker in integrated vertical dmos transistor: A vertical DMOS device implements one or more deep silicon via (DSV) plugs, thereby significantly reducing the layout area and on-resistance (RDSON) of the device. The DSV plugs extend through a semiconductor substrate to contact a conductively doped buried diffusion region, which forms the drain of the vertical DMOS device.... Agent: Tower Semiconductor Ltd.

20130320444 - Integrated circuit having vertical compensation component: An integrated circuit and component is disclosed. In one embodiment, the component is a compensation component, configuring the compensation regions in the drift zone in V-shaped fashion in order to achieve a convergence of the space charge zones from the upper to the lower end of the compensation regions is... Agent: Infineon Technologies Austria Ag

20130320445 - High voltage metal-oxide-semiconductor transistor device: A high voltage metal-oxide-semiconductor (HV MOS) device includes a substrate, a gate positioned on the substrate, a drain region formed in the substrate, a source region formed in the substrate, a first doped region formed in between the drain region and the source region, and a second doped region formed... Agent:

20130320447 - Etsoi with reduced extension resistance: A semiconductor is formed on an SOI substrate, such as an extremely thin SOI (ETSOI) substrate, with increased extension thickness. Embodiments include semiconductor devices having an epitaxially formed silicon-containing layer, such as embedded silicon germanium (eSiGe), on the SOI substrate. An embodiment includes forming an SOI substrate, epitaxially forming a... Agent: Globalfounderies Inc.

20130320446 - Semiconductor structure and method for forming the same: A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises: a semiconductor substrate; a rare earth oxide layer formed on the semiconductor substrate; a channel region formed on the rare earth oxide layer; and a source region and a drain region formed at both... Agent:

20130320448 - Semiconductor devices having three-dimensional bodies with modulated heights: Semiconductor devices having three-dimensional bodies with modulated heights and methods to form such devices are described. For example, a semiconductor structure includes a first semiconductor device having a first semiconductor body disposed above a substrate. The first semiconductor body has a first height and an uppermost surface with a first... Agent:

20130320453 - Area scaling on trigate transistors: Improving an area scaling on tri-gate transistors is described. An insulating layer is deposited on a fin on a substrate. The insulating layer is recessed to expose the fin. The corner of the fin is rounded off using a noble gas. A gate dielectric layer is deposited on the rounded... Agent:

20130320456 - Gate aligned contact and method to fabricate same: Gate aligned contacts and methods of forming gate aligned contacts are described. For example, a method of fabricating a semiconductor structure includes forming a plurality of gate structures above an active region formed above a substrate. The gate structures each include a gate dielectric layer, a gate electrode, and sidewall... Agent:

20130320449 - Late in-situ doped sige junctions for pmos devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantations: A HKMG device with PMOS eSiGe source/drain regions is provided. Embodiments include forming first and second HKMG gate stacks on a substrate, forming a nitride liner and oxide spacers on each side of each HKMG gate stack, performing halo/extension implants at each side of each HKMG gate stack, forming an... Agent: Globalfoundries Singapore Pte. Ltd.

20130320450 - Middle in-situ doped sige junctions for pmos devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantations: A HKMG device with PMOS eSiGe source/drain regions is provided. Embodiments include forming first and second HKMG gate stacks on a substrate, each including a SiO2 cap, forming extension regions at opposite sides of the first HKMG gate stack, forming a nitride liner and oxide spacers on each side of... Agent: Globalfoundries

20130320454 - Semiconductor device and manufacturing method of semiconductor device: A semiconductor device capable of reducing an inter-source electrode resistance RSS(on) and reducing a chip size is provided. A semiconductor device according to the present invention includes a chip partitioned into three areas including a first area, a second area, and a third area, and a common drain electrode provided... Agent: Renesas Electronics Corporation

20130320452 - Semiconductor device and method of forming the same: A semiconductor device and method for fabricating a semiconductor device is disclosed. An exemplary semiconductor device includes a semiconductor substrate including an active region including a plurality of device regions. The semiconductor device further includes a first device disposed in a first device region of the plurality of device regions,... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320451 - Semiconductor device having non-orthogonal element: The present disclosure provides a device includes a first gate structure segment and a collinear second gate structure segment, as well as a third gate structure segment and a collinear fourth gate structure segment. An interconnection extends from the first gate structure segment to the fourth gate structure segment. The... Agent: Taiwan Semiconductor Manufacturing Company, Ltd., ("tsmc")

20130320455 - Semiconductor device with isolated body portion: Semiconductor devices with isolated body portions are described. For example, a semiconductor structure includes a semiconductor body disposed above a semiconductor substrate. The semiconductor body includes a channel region and a pair of source and drain regions on either side of the channel region. An isolation pedestal is disposed between... Agent:

20130320457 - Semiconductor devices including source/drain stressors and methods of manufacturing the same: A semiconductor device including source drain stressors is provided. The semiconductor device includes a gate structure including a gate insulating layer and a gate electrode on a semiconductor substrate. Gate spacers may be disposed on sidewalls of the gate structure and a stressor pattern including an impurity region is disposed... Agent:

20130320458 - Static random-access memory cell array with deep well regions: An integrated circuit including a complementary metal-oxide-semiconductor (CMOS) static random access memory (SRAM) with periodic deep well structures within the memory cell array. The deep well structures are contacted by surface well regions of the same conductivity type (e.g., n-type) in the memory cell array, forming two-dimensional grids of both... Agent: Texas Instruments Incorporated

20130320459 - Semiconductor isolation structure with air gaps in deep trenches: A device includes a semiconductor substrate, a contact plug over the semiconductor substrate, and an Inter-Layer Dielectric (ILD) layer over the semiconductor substrate, with the contact plug being disposed in the ILD. An air gap is sealed by a portion of the ILD and the semiconductor substrate. The air gap... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320461 - Semiconductor device and method of fabricating the same: A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A... Agent: Samsung Electronics Co., Ltd.

20130320460 - Semiconductor device having fin structure and method of manufacturing the same: In a semiconductor device, a thin wall oxide film formed over sidewalls of an active region is formed, and a portion of the wall oxide film adjacent to a gate region is removed. A gate insulating film is formed where the portion of wall oxide film was removed to prevent... Agent: Sk Hynix Inc.

20130320462 - Adaptive charge balanced edge termination: In one embodiment, a semiconductor device can include a substrate including a first type dopant. The semiconductor device can also include an epitaxial layer located above the substrate and including a lower concentration of the first type dopant than the substrate. In addition, the semiconductor device can include a junction... Agent: Vishay-siliconix

20130320464 - Integrally molded die and bezel structure for fingerprint sensors and the like: A biometric sensor device, such as a fingerprint sensor, comprises a substrate to which is mounted a die on which is formed a sensor array and at least one conductive bezel. The die and the bezel are encased in a unitary encapsulation structure to protect those elements from mechanical, electrical,... Agent:

20130320463 - Package structure having mems element and fabrication method thereof: A package structure includes: a substrate having a plurality of first conductive pads and a plurality of second conductive pads; an MEMS element disposed on the substrate; a cover member disposed on the MEMS element and having a metal layer formed thereon; a plurality of bonding wires electrically connected to... Agent: Siliconware Precision Industries Co., Ltd.

20130320465 - Thin mems microphone module: A MEMS microphone module includes a first circuit board and a second circuit board attached to the first circuit board. A MEMS chip and an ASIC chip are respectively received in one of two concavities of the first circuit board. A first ground layer of the first circuit board and... Agent: Merry Electronics Co., Ltd.

20130320466 - Package for damping inertial sensor: A capped micromachined accelerometer with a Q-factor of less than 2.0 is fabricated without encapsulating a high-viscosity gas with the movable mass of the micromachined accelerometer by providing small gaps between the movable mass and the substrate, and between the movable mass and the cap. The cap may be an... Agent: Analog Devices, Inc.

20130320467 - Method for assembling conductive particles into conductive pathways and sensors thus formed: A sensor is achieved by applying a layer of a mixture that contains polymer and conductive particles over a substrate or first surface, when the mixture has a first viscosity that allows the conductive particles to rearrange within the material. An electric field is applied over the layer, so that... Agent: Condalign As

20130320468 - Magnetic element with storage layer materials: According to an embodiment of the invention, a magnetic tunnel junction (MTJ) element includes a reference ferromagnetic layer, a storage ferromagnetic layer, and an insulating layer. The storage ferromagnetic layer includes a CoFeB sub-layer coupled to a CoFe sub-layer and/or a NiFe sub-layer through a non-magnetic sub-layer. The insulating layer... Agent: Qualcomm Incorporated

20130320469 - Image sensor with low step height between back-side metal and pixel array: A CMOS image sensor and a method of forming are provided. The CMOS image sensor may include a device wafer. A conductive feature may be formed on a back-side surface of the device wafer. The device wafer may include a pixel formed therein. A passivation layer may be formed over... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320470 - Photodetector: A photodetector 1A comprises a multilayer structure 3 having a first layer 4 constituted by first metal or first semiconductor, a semiconductor structure layer 5 mounted on the first layer 4 and adapted to excite an electron by plasmon resonance, and a second layer 6 mounted on the semiconductor structure... Agent:

20130320472 - Backside illumination cmos image sensor and method of manufacturing the same: A method of manufacturing a backside illumination image sensor includes forming an epitaxial layer on a silicon (Si) substrate, and forming an inter-metal dielectric (IMD) on the epitaxial layer. The method includes forming a trench in one side region of the epitaxial layer, forming an insulating layer at a side... Agent: Dongbu Hitek Co., Ltd.

20130320474 - Photo detector device, photo sensor and spectrum sensor: A photodetector device includes: a first semiconductor region of a first conductivity type electrically connected to a first external electrode: a second semiconductor region of a second conductivity type formed on the first semiconductor region; a third semiconductor region of the first conductivity type formed on the second semiconductor region;... Agent: Seiko Epson Corporation

20130320475 - Semiconductor apparatus, method of manufacturing semiconductor apparatus, method of designing semiconductor apparatus, and electronic apparatus: A semiconductor device including a first material layer adjacent to a second material layer, a first via passing through the first material layer and extending into the second material layer, and a second via extending into the first material layer, where along a common cross section parallel to an interface... Agent: Sony Corporation

20130320473 - Solid-state imaging device, production method of the same, and imaging apparatus: A solid-state imaging device in which a pixel circuit formed on the first surface side of a semiconductor substrate is shared by a plurality of light reception regions and second surface side of the semiconductor substrate is the light incident side of the light reception regions. The second surface side... Agent:

20130320471 - Wafer level optical sensor package and low profile camera module, and method of manufacture: A wafer-level camera sensor package includes a semiconductor substrate with an optical sensor on a front surface. Through-silicon-vias (TSV) extend through the substrate and provide I/O contact with the sensor from the back side of the substrate. A glass cover is positioned over the front surface, and the cover and... Agent: Stmicroelectronics Pte Ltd.

20130320476 - Miniaturized implantable sensor platform having multiple devices and sub-chips: An implantable, miniaturized platform and a method for fabricating the platform is provided, where the e platform includes a top cover plate and a bottom substrate, top cover plate including an epitaxial, Si-encased substrate and is configured to include monolithically grown devices and device contact pads, the Si-encased substrate cover... Agent: Optoelectronics Systems Consulting, Inc.

20130320477 - Method of etching of soi substrate, and back-illuminated photoelectric conversion module on soi substrate and process of manufacture thereof: A method of etching capable of rapidly and flatly performing wet etching on a Si substrate using fluonitric acid represented by HF(a)HNO3(b)H2O(c) (where the unit of a, b and c is wt % and a+b+c=100). The etching rate of an SiO2 layer with the highly concentrated fluonitric acid is significantly... Agent: Tohoku University

20130320479 - Image sensor, image processing system including the image sensor, and method of manufacturing the image sensor: An image sensor includes a photodetector formed in an epitaxial layer, and trench isolations each formed in a direction from a back side of the epitaxial layer to a front side of the epitaxial layer. Each of the trench isolations is filled with at least one insulator, and the insulator... Agent: Samsung Electronics Co., Ltd.

20130320478 - System and method for processing a backside illuminated photodiode: System and method for processing a semiconductor device surface to reduce dark current and white pixel anomalies. An embodiment comprises a method applied to a semiconductor or photodiode device surface adjacent to a photosensitive region, and opposite a side having circuit structures for the device. A doped layer may optionally... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320481 - High density pyroelectric thin film infrared sensor array and method of manufacture thereof: A method of manufacturing a thermal sensor array comprises: (a) providing a first wafer comprising an integrated circuit; (b) providing a second wafer comprising a carrier substrate, a thermally sensitive layer, a first electrode and a second electrode; (c) applying a polymer to a bonding surface of at least one... Agent: Bridge Semiconductor Corporation

20130320480 - Methods and structures for reducing heat exposure of thermally sensitive semiconductor devices: A semiconductor device comprises an integrated circuit (IC) die having a top side and a back side. The circuit substrate includes a heat source circuit, a heat sensitive circuit, a package substrate coupled to the top side of the circuit substrate, and a plurality of thermally conductive through-silicon vias (TSVs)... Agent:

20130320482 - High-voltage monolithic schottky device structure: A semiconductor device includes a pillar formed on a substrate of the same conductivity type. The pillar has a vertical thickness that extends from a top surface down to the substrate. The pillar extends in first and second lateral directions in a loop shape. First and second dielectric regions are... Agent: Power Integrations, Inc.

20130320484 - Semiconductor device formation: An apparatus of and method for making a semiconductor structure having a shallow trench isolation (STI) trench with a substantially v-shaped profile, that is the distance between top portions is greater than the distance between bottom portions of shallow trench isolation (STI) structure sidewalls adjacent to the trench, provides for... Agent: Macronix International Co., Ltd.

20130320483 - Semiconductor-on-insulator (soi) substrates with ultra-thin soi layers and buried oxides: Semiconductor-on-insulator (SOI) substrates including a buried oxide (BOX) layer having a thickness of less than 300 Å are provided. The (SOI) substrates having the thin BOX layer are provided using a method including a step in which oxygen ions are implanted at high substrate temperatures (greater than 600° C.), and... Agent: International Business Machines Corporation

20130320485 - Semiconductor device: An SOI or PSOI device including a device structure having a plurality of doped semiconductor regions. One or more of the doped semiconductor regions is in electrical communication with one or more electrical terminals. The device further includes an insulator layer located between a bottom surface of the device structure... Agent: X-fab Semiconductor Foundries Ag

20130320486 - Semiconductor device: Provided is a semiconductor device. The semiconductor device includes a conductive pattern disposed on a semiconductor substrate. First and second conductive lines disposed on the conductive pattern and located at the same level as each other, are provided. An isolation pattern is disposed between the first and second conductive lines.... Agent:

20130320487 - Semiconductor device with trench structures: A semiconductor body of a semiconductor device includes a doped layer of a first conductivity type and one or more doped zones of a second conductivity type. The one or more doped zones are formed between the doped layer and the first surface of a semiconductor body. Trench structures extend... Agent: Infineon Technologies Austria Ag

20130320489 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a fuse pattern disposed over a semiconductor substrate, an epoxy mold compound (EMC) layer disposed over the fuse pattern, a first package substrate disposed over the EMC layer, an insulating film disposed over the first package substrate, and a second package substrate disposed over the insulating... Agent: Sk Hynix Inc.

20130320488 - System and method for forming aluminum fuse for compatibility with copper beol interconnect scheme: A semiconductor fuse device and a method of fabricating the fuse device including a last metal interconnect layer including at least two discrete metal conductors, an inter-level dielectric layer deposited over the last metal interconnect layer and the at least two discrete metal conductors, a thin wire aluminum fuse connecting... Agent: International Business Machines Corporation

20130320490 - Inductive element with interrupter region and method for forming: A semiconductor device structure a semiconductor substrate having a first conductivity type and a top surface. A plurality of first doped regions is at a first depth below the top surface arranged in a checkerboard fashion. The first doped regions are of a second conductivity type. A dielectric layer is... Agent:

20130320491 - Semiconductor device having features to prevent reverse engineering: It is desirable to design and manufacture electronic chips that are resistant to modern reverse engineering techniques. Disclosed is a method and device that allows for the design of chips that are difficult to reverse engineer using modern teardown techniques. The disclosed device uses devices having the same geometry but... Agent: Static Control Components, Inc.

20130320492 - Semiconductor substrate and method for manufacturing semiconductor substrate: Disclosed herein is a substrate including: a base substrate; an insulating layer formed on an upper portion of the base substrate; a circuit layer formed in a form in which it is buried in the insulating layer; at least one electrode formed on upper portions of the circuit layer and... Agent:

20130320493 - Capacitor for interposers and methods of manufacture thereof: Capacitor designs for substrates, such as interposers, and methods of manufacture thereof are disclosed. A through via is formed in the interposer, and a capacitor is formed between a lower level metallization layer and a higher level metallization layer. The capacitor may be, for example, a planar capacitor with dual... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320495 - Integration of non-noble dram electrode: A method for forming a capacitor stack is described. In some embodiments of the present invention, a first electrode structure is comprised of multiple materials. A first material is formed above the substrate. A portion of the first material is etched. A second material is formed above the first material.... Agent: Intermolecular, Inc.

20130320494 - Metal finger capacitors with hybrid metal finger orientations in stack with unidirectional metal layers: A semiconductor die having a plurality of metal layers, including a set of metal layers having a preferred direction for minimum feature size. The set of metal layers are such that adjacent metal layers have preferred directions orthogonal to one another. Finger capacitors formed in the set of metal layers... Agent: Qualcomm Incorporated

20130320496 - Semiconductor device: A semiconductor device includes: a die pad comprised of a metal, and having at least one cutout portion in its peripheral edge portion, and a protruding portion formed by the cutout portion so as to protrude laterally from the peripheral edge portion; an inner lead having at its end a... Agent: Panasonic Corporation

20130320497 - On-chip resistor: An integrated circuit (IC) is disclosed. The IC includes a substrate with a resistor region and a resistor body disposed on the resistor region. A plurality of first resistor contact strips and a plurality of second resistor contact strips are disposed on the resistor body along a first direction. Two... Agent:

20130320498 - Low voltage protection devices for precision transceivers and methods of forming the same: A bi-directional protection device includes a bi-directional NPN bipolar transistor including an emitter/collector formed from a first n-well region, a base formed from a p-well region, and a collector/emitter formed from a second n-well region. P-type active regions are formed in the first and second n-well regions to form a... Agent: Analog Devices, Inc.

20130320499 - Semiconductor device: By configuring an ESD protection element of an NPN transistor (101), it is possible to reduce the area of the ESD protection element and reduce the voltage in a region in which the current increases sharply, and thus possible to increase ESD tolerance. Also, it is possible to provide a... Agent: Fuji Electric Co., Ltd.

20130320500 - A bipolar semiconductor component with a fully depletable channel zone: A bipolar semiconductor component, in particular a diode, comprising an anode structure which controls its emitter efficiency in a manner dependent on the current density in such a way that the emitter efficiency is low at small current densities and sufficiently high at large current densities, and an optional cathode... Agent:

20130320501 - Varactors including interconnect layers: In an embodiment of the present invention is provided a varactor comprising a substrate, a plurality of bottom electrodes positioned on a surface of the substrate separated to form a gap therein, a tunable dielectric material positioned on the surface of the substrate and within the gap, the tunable dielectric... Agent: Blackberry Limited

20130320503 - Methods and devices for fabricating and assembling printable semiconductor elements: The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials.... Agent: The Board Of Trustees Of The University Of Illinois

20130320502 - Semiconductor processing method and semiconductor structure: A semiconductor processing method that can generate a hole with different diameters, comprising: providing first material and second material different from the first material; and utilizing a etching process to etch the first material and the second material to form a hole through the first material and the second material;... Agent:

20130320506 - Back-side contact formation: In one embodiment, a semiconductor is provided comprising a substrate and a plurality of wiring layers and dielectric layers formed on the substrate, the wiring layers implementing a circuit. The dielectric layers separate adjacent ones of the plurality of wiring layers. A first passivation layer is formed on the plurality... Agent: Nxp B.v.

20130320504 - Semiconductor integrated circuit apparatus having through silicon vias: A semiconductor integrated circuit apparatus includes a semiconductor substrate, a plurality of through-silicon vias (TSVs) formed in the semiconductor substrate, and an impedance path blocking unit located between the plurality of TSVs.... Agent: Sk Hynix Inc.

20130320505 - Semiconductor reflow processing for high aspect ratio fill: A method for at least partially filling a feature on a workpiece includes obtaining a workpiece including a feature having a high aspect ratio in the range of about 10 to about 80, depositing a first conformal conductive layer in the feature, and thermally treating the workpiece to reflow the... Agent: Applied Materials, Inc.

20130320507 - Semiconductor device having plural patterns extending in the same direction: A photomask has a mask blank and a light shielding film formed on the mask blank. The light shielding film includes a plurality of opening traces extending in a first direction. An end of a first opening trace in the first direction and an end of a second opening trace... Agent: Elpida Memory, Inc.

20130320508 - Semiconductor device and method of manufacturing the same: A method of manufacturing a semiconductor device includes: forming a first electrode on a first semiconductor substrate; coating the semiconductor substrate with an insulating material having a first viscosity at a first temperature, having a second viscosity lower than the first viscosity at a second temperature higher than the first... Agent: Fujitsu Semiconductor Limited

20130320510 - Durable, heat-resistant multi-layer coatings and coated articles: An article having a surface treated to provide a protective coating structure in accordance with the following method: vapor depositing a first layer on a substrate, wherein said first layer is a metal oxide adhesion layer selected from the group consisting of an oxide of a Group IIIA metal element,... Agent: Applied Microstructures, Inc.

20130320509 - Moisture barrier coatings: A moisture barrier coating for protecting a substrate from moisture, comprises an inorganic layer disposed over the substrate, the inorganic layer comprising an oxide or nitride of an element selected from the group consisting of silicon, aluminum, titanium, zirconium, hafnium and combinations thereof; and an organic silicon-containing layer disposed over... Agent: Applied Microstructures, Inc.

20130320511 - Semiconductor device: A semiconductor device including a p or p+ doped portion and an n or n+ doped portion separated from the p or p+ doped portion by a semiconductor drift portion. The device further includes at least one termination portion provided adjacent to the drift portion. The at least one termination... Agent: X-fab Semiconductor Foundries Ag

20130320512 - Semiconductor device and method of manufacturing a semiconductor device: A method of manufacturing a semiconductor device includes forming a trench in a semiconductor body. The method further includes doping a part of the semiconductor body via sidewalls of the trench by plasma doping.... Agent: Infineon Technologies Austria Ag

20130320513 - Semiconductor package and fabrication method thereof: A semiconductor package is provided, including: a substrate having at least a conductive pad; a semiconductor element disposed on the substrate; a conductive adhesive formed on top and side surfaces of the semiconductor element and extending to the conductive pad; and an electronic element disposed on the conductive adhesive. The... Agent: Siliconware Precision Industries Co., Ltd.

20130320514 - Package-in-package for high heat dissipation having leadframes and wire bonds: A semiconductor system (100) comprises a first component including a first semiconductor chip (110) attached to the pad (120) of a leadframe made of a first metal sheet of high thermal conductivity, and a second component including a second semiconductor chip (140) attached to the pad (150) of a leadframe... Agent: Texas Instruments Incorporated

20130320515 - System, method and apparatus for leadless surface mounted semiconductor package: A packaged semiconductor device may include a termination surface having terminations configured as leadless interconnects to be surface mounted to a printed circuit board. A first flange has a first surface and a second surface. The first surface provides a first one of the terminations, and the second surface is... Agent: Freescale Semiconductor, Inc.

20130320516 - Semiconductor package and method of manufacturing the same: Disclosed herein are a semiconductor package and a method of manufacturing the same, the semiconductor package including: a molding member having a cavity formed therein; a device mounted in the cavity; an insulating member formed inside the cavity and on and/or beneath the molding member and the device; a circuit... Agent: Samsung Electro-mechanics Co., Ltd.

20130320517 - Lidded integrated circuit package: A lid comprising a heat conductive substrate and a native silicon oxide layer connected to said substrate by at least one intermediate layer; a lidded integrated circuit package; and a method of providing a heat path through an integrated circuit package comprising providing a substrate with an exterior layer of... Agent: Texas Instruments Incorporated

20130320518 - Wafer-level package and method of manufacturing the same: A wafer-level package and a method of manufacturing the same. The wafer-level package includes a first semiconductor chip on an upper side of which an active surface facing downward is disposed, a redistribution formed on the active surface of the first semiconductor chip, a second semiconductor chip disposed on the... Agent: Sts Semiconductor & Telecommunications Co., Ltd.

20130320520 - Chemically altered carbosilanes for pore sealing applications: A method including forming a dielectric material including a surface porosity on a circuit substrate including a plurality of devices; chemically modifying a portion of the surface of the dielectric material with a first reactant; reacting the chemically modified portion of the surface with a molecule that, once reacted, will... Agent:

20130320519 - Semiconductor device and method of backgrinding and singulation of semiconductor wafer while reducing kerf shifting and protecting wafer surfaces: A semiconductor device has a semiconductor wafer with an interconnect structure formed over a first surface of the wafer. A trench is formed in a non-active area of the semiconductor wafer from the first surface partially through the semiconductor wafer. A protective coating is formed over the first surface and... Agent: Stats Chippac, Ltd.

20130320528 - Coaxial solder bump support structure: A solder bump support structure and method of manufacturing thereof is provided. The solder bump support structure includes an inter-level dielectric (ILD) layer formed over a silicon substrate. The ILD layer has a plurality of conductive vias. The structure further includes a first insulation layer formed on the ILD layer.... Agent: International Business Machines Corporation

20130320524 - Design scheme for connector site spacing and resulting structures: A system and method for preventing cracks in a passivation layer is provided. In an embodiment a contact pad has a first diameter and an opening through the passivation layer has a second diameter, wherein the first diameter is greater than the second diameter by a first distance of about... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320525 - Integrated circuit packaging system with substrate and method of manufacture thereof: An integrated circuit packaging system and method of manufacture thereof includes: a substrate having a top insulation layer and a top conductive layer; an inter-react layer on the substrate; an integrated circuit die on the substrate; a package body on the inter-react layer and the integrated circuit die; and a... Agent:

20130320522 - Re-distribution layer via structure and method of making same: An embodiment is a semiconductor device comprising a contact pad over a substrate, wherein the contact pad is disposed over an integrated circuit on the substrate and a first passivation layer over the contact pad. A first via in the first passivation layer, wherein the first via has more than... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320521 - Releasable buried layer for 3-d fabrication and methods of manufacturing: A releasable buried layer for 3-D fabrication and methods of manufacturing is disclosed. The method includes forming an interposer structure which includes forming a carbon rich dielectric releasable layer over a wafer. The method further includes forming back end of the line (BEOL) layers over the carbon rich dielectric layer,... Agent: International Business Machines Corporation

20130320526 - Semiconductor construct and manufacturing method thereof as well as semiconductor device and manufacturing method thereof: A semiconductor construct includes a semiconductor substrate and connection pads provided on the semiconductor substrate. Some of the connection pads are connected to a common wiring and at least one of the remaining of the connection pads are connected to a wiring. The construct also includes a first columnar electrode... Agent:

20130320523 - Semiconductor device and method of reflow soldering for conductive column structure in flip chip package: A semiconductor device comprises a substrate and a semiconductor die. Bumps are formed over the substrate or a first surface of the semiconductor die. Conductive columns devoid of solder are formed over the substrate or the first surface of the semiconductor die. The semiconductor die is disposed over the substrate.... Agent: Stats Chippac, Ltd.

20130320527 - Semiconductor device and semiconductor device manufacturing method: A semiconductor device includes a semiconductor chip, and a terminal connected with the semiconductor chip. The terminal has a first surface and a second surface spaced from each other in a thickness direction. The semiconductor device also includes a sealing resin covering the semiconductor chip and the terminal. The sealing... Agent: Rohm Co., Ltd.

20130320533 - 3d system-level packaging methods and structures: A 3D system-level packaging method includes providing a packaging substrate having a first functional surface and a second surface with wiring arrangement within the packaging substrate and between the first functional surface and the second surface. The method also includes forming at least one flip package layer on the first... Agent: Nantong Fujitsu Microelectronics Co.ltd.

20130320532 - Chip package and method for forming the same: An embodiment of the invention provides a chip package which includes: a carrier substrate; a semiconductor substrate having an upper surface and a lower surface, disposed overlying the carrier substrate; a device region or sensing region located on the upper surface of the semiconductor substrate; a conducting pad located on... Agent: Xintec Inc.

20130320529 - Reactive bonding of a flip chip package: An array of bonding pads including a set of reactive materials is provided on a first substrate. The set of reactive materials is selected to be capable of ignition by magnetic heating induced by time-dependent magnetic field. The magnetic heating can be eddy current heating, hysteresis heating, and/or heating by... Agent: International Business Machines Corporation

20130320530 - Semiconductor device with redistributed contacts: A surface mount semiconductor device is assembled by positioning an array of semiconductor dies with an array of metallic ground plane members between and beside the semiconductor dies. The arrays of dies and ground plane members are encapsulated in a molding compound. A redistribution layer is formed on the arrays... Agent: Freescale Semiconductor, Inc.

20130320531 - Stacked integrated chips and methods of fabrication thereof: Structure and methods of forming stacked semiconductor chips are described. In one embodiment, a method of forming a semiconductor chip includes forming an opening for a through substrate via from a top surface of a first substrate. The sidewalls of the opening are lined with an insulating liner and the... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320534 - System-level packaging methods and structures: A system-level packaging method includes providing a packaging substrate having a first functional surface and a second surface with wiring arrangement within the packaging substrate and between the first functional surface and the second surface. The method also includes forming at least two package layers on the first functional surface... Agent:

20130320535 - Three-dimensional system-level packaging methods and structures: A 3D system-level packaging method includes providing a packaging substrate, forming a glue layer on the substrate, and attaching a first chip layer at an opposite side of a functional surface of the first chip layer on the packaging substrate through the glue layer. The method also includes forming a... Agent: Nantong Fujitsu Microelectronics Co., Ltd.

20130320536 - Integrated circuit including wire structure, related method and design structure: An integrated circuit (IC), design structure, and a method of making the same. In one embodiment, the IC includes: a substrate; a dielectric layer disposed on the substrate; a set of wire components disposed on the dielectric layer, the set of wire components including a first wire component disposed proximate... Agent: International Business Machines Corporation

20130320538 - Integrated circuit substrates comprising through-substrate vias and methods of forming through-substrate vias: A method of forming a through-substrate via includes forming a through-substrate via opening at least partially through a substrate from one of opposing sides of the substrate. A first material is deposited to line and narrow the through-substrate via opening. The first material is etched to widen at least an... Agent: Micron Technology, Inc.

20130320539 - Method and apparatus for back end of line semiconductor device processing: Methods and apparatus are disclosed for the back end of line process for fabrication of integrated circuits (ICs). The inter-metal dielectric (IMD) layer between two metal layers may comprise an etching stop layer over a metal layer, a low-k dielectric layer over the etching stop layer, a dielectric hard mask... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320542 - Method of fabricating a self-aligned buried bit line for a vertical channel dram: A method of fabricating a self-aligned buried bit line in a structure which makes up a portion of a vertical channel DRAM. The materials and processes used enable self-alignment of elements of the buried bit line during the fabrication process. In addition, the materials and processes used enable for formation... Agent:

20130320540 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a substrate, a conductive material, and a material layer. The substrate includes a through hole. The conductive material fills the through hole. The material layer is formed in the conductive material, wherein an electrical resistance of the conductive material is lower than an electrical resistance of... Agent: Nanya Technology Corporation

20130320541 - Semiconductor device contact structures: Semiconductor contact structures extend through a dielectric material and provide contact to multiple different subjacent materials including a silicide material and a non-silicide material such as doped silicon. The contact structures includes a lower composite layer formed using a multi-step ionized metal plasma (IMP) deposition operation. A lower IMP film... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20130320537 - Through silicon via (tsv) structure and process thereof: A through silicon via structure is located in a recess of a substrate. The through silicon via structure includes a barrier layer, a buffer layer and a conductive layer. The barrier layer covers a surface of the recess. The buffer layer covers the barrier layer. The conductive layer is located... Agent:

20130320543 - Semiconductor device manufacturing method and semiconductor device: A semiconductor device is manufactured by forming, on an insulating base material, a first support element having a side face that extends from a surface of the insulating base material, forming a coating of amorphous silicon on the side face of the first support element, filling an aperture disposed between... Agent: Kabushiki Kaisha Toshiba

20130320544 - Corrosion/etching protection in integration circuit fabrications: A method of producing reduced corrosion interconnect structures and structures thereby formed. A method of producing microelectronic interconnects having reduced corrosion begins with a damascene structure having a first dielectric and a first interconnect. A metal oxide layer is deposited selectively to metal or nonselective over the damascene structure and... Agent: International Business Machines Corporation

20130320545 - Hybrid copper interconnect structure and method of fabricating same: A hybrid interconnect structure containing copper regions that have different impurities levels within a same opening is provided. In one embodiment, the interconnect structure includes a patterned dielectric material having at least one opening located therein. A dual material liner is located at least on sidewalls of the patterned dielectric... Agent: International Business Machines Corporation

20130320546 - Dual-metal self-aligned wires and vias: Disclosed is a semiconductor structure which includes a semiconductor substrate and a wiring layer on the semiconductor substrate. The wiring layer includes a plurality of fin-like structures comprising a first metal; a first layer of a second metal on each of the plurality of fin-like structures wherein the first metal... Agent: International Business Machines Corporation

20130320547 - Enabling package-on-package (pop) pad surface finishes on bumpless build-up layer (bbul) package: A bumpless build-up layer (BBUL) integrated circuit package and method of manufacturing are presented. In some embodiments, the package-on-package (PoP) pads of the BBUL integrated circuit package has a surface finish that can be palladium, nickel-palladium, nickel-gold, nickel-palladium-gold, or palladium-nickel-palladium-gold. In some embodiments, the PoP pad surface finish can be... Agent:

20130320548 - Integrated circuit die assembly with heat spreader: A packaged semiconductor device comprises a package substrate comprising a first package substrate contact and a second package substrate contact, and a semiconductor die over the package substrate. The semiconductor device further includes electrical connections between signal contact pads of the die and the package substrate, and a heat spreader... Agent:

20130320551 - Discrete semiconductor device package and manufacturing method: Disclosed is a discrete semiconductor device package (100) comprising a semiconductor die (110) having a first surface and a second surface opposite said first surface carrying a contact (112); a conductive body (120) on said contact; an encapsulation material (130) laterally encapsulating said conductive body; and a capping member (140,... Agent: Nxp B.v

20130320552 - Integrated circuit fabrication: A method for defining patterns in an integrated circuit comprises defining a plurality of features in a first photoresist layer using photolithography over a first region of a substrate. The method further comprises using pitch multiplication to produce at least two features in a lower masking layer for each feature... Agent: Micron Technology, Inc.

20130320549 - Semiconductor device with air gap and method for fabricating the same: A method for fabricating a semiconductor device includes forming, over a substrate, a plurality of first conductive structures which are separated from one another; forming multi-layered dielectric patterns including a first dielectric layer which covers upper ends and both sidewalls of the first conductive structures; removing portions of the first... Agent:

20130320550 - Semiconductor device with air gap and method for fabricating the same: A method for fabricating a semiconductor device includes forming a plurality of bit line structures over a substrate, forming multiple layers of spacer layers with a capping layer interposed therebetween over the bit line structures, exposing a surface of the substrate by selectively etching the spacer layers, forming air gaps... Agent:

20130320564 - Avd hardmask for damascene patterning: A method including forming a dielectric layer on a contact point of an integrated circuit structure; forming a hardmask including a dielectric material on a surface of the dielectric layer; and forming at least one via in the dielectric layer to the contact point using the hardmask as a pattern.... Agent:

20130320559 - Chip package and method for forming the same: An embodiment of the invention provides a chip package including: a first semiconductor substrate; a second semiconductor substrate disposed on the first semiconductor substrate, wherein the second semiconductor substrate includes a lower semiconductor layer, an upper semiconductor layer, and an insulating layer located between the lower semiconductor layer and the... Agent: Xintec Inc.

20130320560 - Distributed on-chip decoupling apparatus and method using package interconnect: An integrated circuit device is disclosed. The integrated circuit device includes a semiconductor die fabricated by a front-end semiconductor process and having oppositely disposed planar surfaces. The semiconductor die is formed with semiconductor devices, power supply circuitry coupled to the semiconductor devices, decoupling capacitance circuitry, and through-vias. The through-vias include... Agent: Rambus Inc.

20130320555 - Eda tool and method, and integrated circuit formed by the method: A method comprises: accessing data representing a layout of a layer of an integrated circuit (IC) comprising a plurality of polygons defining circuit patterns to be divided among a number (N) of photomasks for multi-patterning a single layer of a semiconductor substrate, where N is greater than one. For each... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20130320553 - Novel bead for 2.5d/3d chip packaging application: An integrated circuit package having a multilayer interposer has one or more metal wiring beads provided in the interposer, each of the one or more metal wiring beads has a convoluted wiring pattern that is formed in one of the multiple layers of wiring structures in the interposer, and two... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20130320561 - Plug via stacked structure, stacked substrate having via stacked structure and manufacturing method thereof: Disclosed herein is a plug via stacked structure including: a through hole plating layer plated on a through hole inner wall and around top and bottom of a through hole at thickness t; a via plug filled in an inner space of the through hole plating layer; a circuit pattern... Agent:

20130320562 - Semiconductor device: The present invention aims to relax stress induced by through-silicon via formed on semiconductor substrate in order to prevent property fluctuation of a transistor. A semiconductor device includes a semiconductor substrate, a through-silicon via formed in semiconductor substrate, an insulating film formed between the semiconductor substrate and the through-silicon via,... Agent: Panasonic Corporation

20130320558 - Semiconductor device and method for manufacturing the same: A method for forming a semiconductor device includes forming a sealing insulation film over a semiconductor substrate including a device isolation film and an active region, forming a bit line contact plug that protrudes from an upper part of the sealing insulation film and is coupled to the active region,... Agent: Sk Hynix Inc.

20130320554 - Semiconductor device and method of manufacturing thereof: A semiconductor device includes a substrate having a top surface. A semiconductor circuit defines a circuit area on the top surface of the substrate. An interconnect is spaced apart from the circuit area and extends from the top surface into the substrate. The interconnect includes a sidewall formed of an... Agent: Intel Mobile Communications Gmbh

20130320557 - Semiconductor package having reliable electrical connection and assembling method: A semiconductor package includes a printed circuit board, a chip, a protection frame, and a covering layer. The chip is mounted on the printed circuit board and is electrically connected to the printed circuit board through a number of first bonding wires. The protection frame includes a sidewall surrounding the... Agent: Hon Hai Precision Industry Co., Ltd.

20130320556 - Three dimensional integrated circuit structures and hybrid bonding methods for semiconductor wafers: Three dimensional integrated circuit (3DIC) structures and hybrid bonding methods for semiconductor wafers are disclosed. A 3DIC structure includes a first semiconductor device having first conductive pads disposed within a first insulating material on a top surface thereof, the first conductive pads having a first recess on a top surface... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130320563 - Three dimensional memory structure: A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit... Agent:

20130320567 - Batch process for three-dimensional integration: A chip package is described which includes a first chip having a first surface and first sides having a first side-wall angle, and a second chip having a second surface and second sides having a second side-wall angle, which faces and is mechanically coupled to the first chip. The chip... Agent: Oracle International Corporation

20130320566 - Integrated circuit packaging system with substrate and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a base substrate; mounting a stack substrate over the base substrate with an inter-substrate connector directly on the stack substrate and the base substrate, the inter-substrate connector having an inter-substrate connector pitch; mounting an integrated circuit over the... Agent:

20130320565 - Interposer die for semiconductor packaging: According to one exemplary implementation, a method includes lithographically forming a plurality of reticle images on a semiconductor wafer. The method further includes singulating the semiconductor wafer into an interposer die such that the interposer die includes at least a portion of a first reticle image and at least a... Agent: Broadcom Corporation

20130320568 - Semiconductor package and stacked semiconductor package: A semiconductor package includes a printed wiring board and a semiconductor chip that has a first signal terminal and a second signal terminal and is mounted on the printed wiring board. The printed wiring board has a first land and a second land for solder joining, which are formed on... Agent: Canon Kabushiki Kaisha

20130320569 - Stacked semiconductor device: A first semiconductor package which is located on an upper side includes a first printed wiring board and an encapsulation resin for encapsulating a first semiconductor chip. A second semiconductor package which is located on a lower side includes a second printed wiring board. The first printed wiring board includes... Agent: Canon Kabushiki Kaisha

20130320570 - Electronic device for power applications: An electronic device for power applications and configured for being mounted on a printed circuit board is disclosed. The electronic device includes a semiconductor chip integrating a power component, and a package. The package comprises an insulating body embedding the semiconductor chip, and exposed electrodes for electrically connecting conductive terminals... Agent: Stmicroelectronics S.r.i.

20130320571 - Semiconductor device and manufacturing method thereof: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package... Agent: Renesas Electronics Corporation

20130320572 - Isolation rings for packages and the method of forming the same: A device includes a first package component, and a second package component underlying, and bonded to, the first package component. A molding material is disposed under the first package component and molded to the first and the second package components, wherein the molding material and the first package component form... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

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