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Active solid-state devices (e.g., transistors, solid-state diodes) December patent applications/inventions, industry category 12/10

20100327248 - Cell patterning with multiple hard masks: A method of making a memory cell or magnetic element by using two hard masks. The method includes first patterning a second hard mask to form a reduced second hard mask, with a first hard mask being an etch stop for the patterning process, and then patterning the first hard... Agent: Campbell Nelson Whipps, LLC

20100327247 - Method and system of using nanotube fabrics as joule heating elements for memories and other applications: Methods and systems of using nanotube elements as joule heating elements for memories and other applications. Under one aspect, a method includes providing an electrical stimulus, regulated by a drive circuit, through a nanotube element in order to heat an adjacent article. Further, a detection circuit electrically gauges the state... Agent: Wilmerhale/boston

20100327250 - Phase change memory device and method of manufacturing the same: A phase change memory device having a strain transistor and a method of making the same are presented. The phase change memory device includes a semiconductor substrate, a junction word line, switching diodes, and a strain transistor. The semiconductor substrate includes a cell area and a core/peri area. The junction... Agent: Ladas & Parry LLP

20100327249 - Phase change memory device having an improved word line resistance, and methods of making same: A phase change memory device having an improved word line resistance and a fabrication method of making the same are presented. The phase change memory device includes a semiconductor substrate, a word line, an interlayer insulation film, a strapping line, a plurality of current paths, a switching element, and a... Agent: Ladas & Parry LLP

20100327251 - Phase change memory device having partially confined heating electrodes capable of reducing heating disturbances between adjacent memory cells: A phase change memory device having partially confined heating electrodes capable of reducing thermal disturbances between adjacent memory cells is presented. The phase change memory device includes a plurality of active regions, a plurality of switching elements, a plurality of heating electrodes, and a plurality of phase change structure lines.... Agent: Ladas & Parry LLP

20100327252 - Phase change memory apparatus and fabrication method thereof: A phase change memory apparatus is provided that includes a first electrode of a bar type having a trench formed on an active region of a semiconductor substrate, a second electrode formed in a bottom portion of the trench, and a bottom electrode contact formed on the second electrode.... Agent: Ladas & Parry LLP

20100327253 - Nonvolatile semiconductor memory device: According to one embodiment, a variable resistance layer includes a mixture of a first compound and a second compound. The first compound includes carbon (C) as well as at least one element selected from a group of elements G1. The group of elements G1 consists of hydrogen (H), boron (B),... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100327254 - Methods to improve electrode diffusions in two-terminal non-volatile memory devices: A non-volatile memory device includes a plurality of pillars, where each of the plurality of pillars contains a non-volatile memory cell containing a steering element and a storage element and at least one of a top corner or a bottom corner of each of the plurality of pillars is rounded.... Agent: The Marbury Law Group, PLLC

20100327255 - Nanofludic field effect transistor based on surface charge modulated nanochannel: A field effect transistor device includes: a reservoir bifurcated by a membrane of three layers: two electrically insulating layers; and an electrically conductive gate between the two insulating layers. The gate has a surface charge polarity different from at least one of the insulating layers. A nanochannel runs through the... Agent: Michael Buchenhorner, P.A.

20100327256 - Controlling pit formation in a iii-nitride device: A device includes a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region and a plurality of layer pairs disposed within one of the n-type region and the p-type region. Each layer pair includes an InGaN layer and pit-filling layer in direct... Agent: Philips Intellectual Property & Standards

20100327257 - Optical semiconductor device and method for manufacturing the same: An optical semiconductor device is disclosed including an active region including an active layer and a diffraction grating having a λ/4 phase shift; passive waveguide regions each including a passive waveguide and a diffraction grating, disposed on the side of an emission facet and on the side of a rear... Agent: Kratz, Quintos & Hanson, LLP

20100327258 - Method for producing core-shell nanowires, nanowires produced by the method and nanowire device comprising the nanowires: Disclosed is a method for producing core-shell nanowires in which an insulating film is previously patterned to block the contacts between nanowire cores and nanowire shells. According to the method, core-shell nanowires whose density and position is controllable can be produced in a simple manner. Further disclosed are nanowires produced... Agent: Cantor Colburn LLP

20100327261 - High hole mobility p-channel ge transistor structure on si substrate: The present disclosure provides an apparatus and method for implementing a high hole mobility p-channel Germanium (“Ge”) transistor structure on a Silicon (“Si”) substrate. One exemplary apparatus may include a buffer layer including a GaAs nucleation layer, a first GaAs buffer layer, and a second GaAs buffer layer. The exemplary... Agent: Grossman, Tucker, Perreault & Pfleger, PLLC C/o Cpa Global

20100327260 - Single electron transistor operating at room temperature and manufacturing method for same: The present invention relates to a single electron transistor operating at room temperature and a manufacturing method for same. More particularly, the present invention relates to a single electron transistor operating at room temperature, in which a quantum dot or a silicide quantum dot using a nanostructure is formed and... Agent: Fenwick & West LLP

20100327259 - Ultra-sensitive detection techniques: Techniques for ultra-sensitive detection are provided. In one aspect, a detection device is provided. The detection device comprises a source; a drain; a nanowire comprising a semiconductor material having a first end clamped to the source and a second end clamped to the drain and suspended freely therebetween; and a... Agent: Michael J. Chang, LLC

20100327266 - monobenzochrysene derivative, a material for an organic electroluminescence device containing the same, and an organic electroluminescence device using the material: wherein R1 to R14 are independently a hydrogen atom or a substituent, and at least one of R1 to R14 is a substituted or unsubstituted aryl group having 6 to 50 ring carbon atoms which does not contain an anthracene skeleton and a benzo[g]chrysene skeleton or a substituted or unsubstituted... Agent: Foley And Lardner LLP Suite 500

20100327265 - Bipiridine derivative and organic electroluminescence element containing the same: (where A1, A2: represent an aromatic heterocyclic group (except for a carbazolyl group) and an aromatic hydrocarbon group and the aromatic heterocyclic group may be combined; a, b=1 or 2; Ar1, Ar2: represent a divalent or trivalent aromatic hydrocarbon group which may be substituted by hydrogen atom, an alkyl group,... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100327271 - Composition and organic photoelectric converter using the same: h

20100327273 - Dithienothiophene derivatives: An organic compound represented by the following general formula (I) wherein n is an integer from 1 to 500, inclusive, and R1 and R2 are each independently a moiety having an atom length of from about 8 atoms to about 20 atoms.... Agent: Dickstein Shapiro LLP

20100327264 - Electroluminescent device using azomethine-lithium-complex as electron injection layer:

20100327269 - Emissive triaryls: Disclosed herein are compounds represented by Formula 1. Compositions and light-emitting devices related thereto are also disclosed.... Agent: Knobbe Martens Olson & Bear LLP

20100327272 - Liquid crystal display device and method for fabricating the same: An LCD device and a method for fabricating the same is disclosed that improves a yield by decreasing processing time. The LCD device includes gate and data lines formed substantially perpendicular to each other on a substrate and defining a unit pixel region; a thin film transistor formed at a... Agent: Mckenna Long & Aldridge LLP

20100327270 - Novel materials for organic electroluminescent devices: The present invention relates to the compounds of the formula (1) and to organic electroluminescent devices, in particular blue-emitting devices, in which these compounds are used as host material in the emitting layer and/or as electron-transport material.... Agent: Connolly Bove Lodge & Hutz, LLP

20100327263 - Oled panel with broadended color spectral components: A method and device in which the light emitted from a color sub-pixel in an organic light emitted display panel can be the sum of two or more light beams of slightly different colors in the same wavelength range. The difference in color is the result of difference in the... Agent: Ware Fressola Van Der Sluys & Adolphson, LLP

20100327262 - Optoelectronic device and method of fabricating the same: An optoelectronic device is disclosed. The device comprises one or more modified photocatalytic units, and a semiconductor surface. The modified photocatalytic unit is attached to the semiconductor surface such that when light is absorbed by the photocatalytic unit, an electric field is generated at sufficient amount to induce charge carrier... Agent: Martin D. Moynihan D/b/a Prtsi, Inc.

20100327268 - Organic el device and manufacturing method thereof: According to one embodiment, an organic EL device includes a pixel electrode, an organic layer disposed above the pixel electrode, a counter-electrode disposed above the organic layer, and an oxide layer disposed between the pixel electrode and the organic layer, the oxide layer including a first region formed with a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100327275 - Organic el panel and its manufacturing method: An organic EL panel includes a light-emitting part including one or a plurality of organic EL elements on a substrate and having a sealing structure sealing the light-emitting part. The organic EL element includes a light-emitting layer, an organic layer formed on a first electrode formed directly, or via another... Agent: Osha Liang L.L.P.

20100327267 - Organic electroluminescence device and production method thereof: An organic electroluminescent device comprising an anode, a first layer disposed on the anode, a second layer containing a light emitting material, and a cathode, wherein the first layer is a layer formed on the anode by forming a non-treated layer containing a compound having a group reactive to a... Agent: Sughrue Mion, PLLC

20100327274 - Organic light-emitting device:

20100327276 - Method and system for passivation of defects in mercury cadmium telluride based optoelectric devices: Apparatus and method to improve the operating parameters of HgCdTe-based optoelectric devices by the addition of hydrogen to passivate dislocation defects. A chamber and a UV light source are provided. The UV light source is configured to provide UV radiation within the chamber. The optoelectric device, which may comprise a... Agent: Tomlinson & O'connell, P.C.

20100327277 - Semiconductor device with a bulk single crystal on a substrate: Device and method of forming a device in which a substrate (10) is fabricated with at least part of an electronic circuit for processing signals. A bulk single crystal material (14) is formed on the substrate, either directly on the substrate (10) or with an intervening thin film layer or... Agent: Popovich, Wiles & O'connell, Pa

20100327278 - Laminated structures: Laminated structures having improved optical gain are provided. In one embodiment, a laminated structure includes a first cladding layer having at least two barrier layers which have different energy band gaps, an active layer formed on the first cladding layer and having an active layer energy band gap, and a... Agent: Workman Nydegger 1000 Eagle Gate Tower

20100327279 - Micro vacuum gauge: A micro vacuum gauge includes a substrate, a floating structure that is held above the substrate by a supporting structure extending from the substrate in a state where the floating structure is thermally isolated from the substrate, a heat generator that is arranged in the floating structure to generate heat,... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100327280 - Scaling of bipolar transistors: Bipolar transistor structures, methods of designing and fabricating bipolar transistors, methods of designing circuits having bipolar transistors. The method of designing the bipolar transistor includes: selecting an initial design of a bipolar transistor; scaling the initial design of the bipolar transistor to generate a scaled design of the bipolar transistor;... Agent: Schmeiser, Olsen & Watts

20100327282 - Semiconductor device and electronic apparatus: A semiconductor device includes: a substrate; a p-type organic transistor including an organic semiconductor layer arranged on or above the substrate; and an n-type inorganic transistor including an inorganic semiconductor layer arranged on or above the organic transistor, wherein a channel region of the inorganic transistor overlaps a channel region... Agent: Advantedge Law Group, LLC

20100327281 - Thin film transistor and method for manufacturing the same: An object is to provide a thin film transistor with small off current, large on current, and high field-effect mobility. A silicon nitride layer and a silicon oxide layer which is formed by oxidizing the silicon nitride layer are stacked as a gate insulating layer, and crystals grow from an... Agent: Nixon Peabody, LLP

20100327283 - Thin film transistor substrate and fabricating method thereof: The present invention relates to a thin film transistor substrate. The thin film transistor according to one embodiment of the present invention comprises: a gate wire and a data wire formed to cross each other on an insulating substrate and define a pixel area; a thin film transistor formed on... Agent: Birch Stewart Kolasch & Birch

20100327284 - Active device array substrate: An active device array substrate including a first patterned conductive layer, a dielectric layer, a second patterned conductive layer, a passivation layer and pixel electrodes is provided. The first patterned conductive layer includes scan lines, common lines, gates and strip floating shielding patterns. The dielectric layer covering the first patterned... Agent: Jianq Chyun Intellectual Property Office

20100327287 - Display device and manufacturing method of the same: A display device includes a sequentially stacked body formed of a gate signal line, an insulation film, a semiconductor layer and a conductor layer on a substrate. The conductive layer forms a drain electrode and a source electrode of a thin film transistor which are arranged with a channel region... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100327286 - Light sensing circuit, backlight control apparatus having the same, and liquid crystal display device having the same: A light sensing circuit capable of enhancing a reliability by lowering a dependency on a temperature change without using a resistor, a backlight control apparatus having the same, and an LCD device having the same. The light sensing circuit includes a first MOS-transistor; and a second MOS-transistor serially connected to... Agent: Brinks Hofer Gilson & Lione

20100327285 - Semiconductor device and manufacturing method of semiconductor device and display device and manufacturing method of display device: Disclosed is a method of manufacturing a semiconductor device including: forming a photothermal conversion layer in a second area where a semiconductor layer is formed other than a first area where line is formed; and heating the semiconductor layer with the photothermal conversion layer by irradiating light on the first... Agent: Holtz, Holtz, Goodman & Chick PC

20100327288 - Trench schottky diode and method for manufacturing the same: A trench Schottky diode and its manufacturing method are provided. The trench Schottky diode includes a semiconductor substrate having therein a plurality of trenches, a gate oxide layer, a polysilicon structure, a guard ring and an electrode. At first, the trenches are formed in the semiconductor substrate by an etching... Agent: Wpat, PC Intellectual Property Attorneys

20100327289 - Flat display panel, uv sensor and fabrication method thereof: A UV sensor comprises a silicon-rich dielectric layer with a refractive index in a range of about 1.7 to about 2.5 for serving as the light sensing material of the UV sensor. The fabrication method of the UV sensor can be integrated with the fabrication process of semiconductor devices or... Agent: North America Intellectual Property Corporation

20100327290 - Manufacturing method of semiconductor device, manufacturing method of display device, semiconductor device, display device, and electronic device: A method for manufacturing a semiconductor device provided with a circuit capable of high speed operation while the manufacturing cost is reduced. A method for manufacturing a semiconductor device which includes forming an ion-doped layer at a predetermined depth from a surface of a single-crystal semiconductor substrate and forming a... Agent: Robinson Intellectual Property Law Office, P.C.

20100327293 - Field-effect transistor and method for fabricating the same: An AlN buffer layer, an undoped GaN layer, an undoped AlGaN layer, a p-type GaN layer and a heavily doped p-type GaN layer are formed in this order. A gate electrode forms an Ohmic contact with the heavily doped p-type GaN layer. A source electrode and a drain electrode are... Agent: Mcdermott Will & Emery LLP

20100327292 - Method of obtaining bulk mono-crystalline gallium-containing nitride, bulk mono-crystalline gallium-containing nitride, substrates manufactured thereof and devices manufactured on such substrates:

20100327291 - Single crystal group iii nitride articles and method of producing same by hvpe method incorporating a polycrystalline layer for yield enhancement: In a method for making a GaN article, an epitaxial nitride layer is deposited on a single-crystal substrate. A 3D nucleation GaN layer is grown on the epitaxial nitride layer by HVPE under a substantially 3D growth mode. A GaN transitional layer is grown on the 3D nucleation layer by... Agent: Goodwin Procter LLP Patent Administrator

20100327296 - Display apparatus: Provided is a display apparatus which can easily bond a drive panel and a sealing panel together. The drive panel includes organic electroluminescence devices on a substrate for drive and extracts light from the side of the organic electroluminescence devices. The sealing panel includes a color filter on a substrate... Agent: K&l Gates LLP

20100327294 - Led package structure for increasing light-emitting efficiency and controlling light-projecting angle and method for manufacturing the same: An LED package structure for increasing light-emitting efficiency and controlling light-projecting angle includes a substrate unit, a light-emitting unit, a light-reflecting unit and a package unit. The substrate unit has a substrate body and a chip-placing area disposed on a top surface of the substrate body. The light-emitting unit has... Agent: Kile Park Goekjian Reed & Mcmanus

20100327295 - Led package structure with external cutting chamfer and method for manufacturing the same: An LED package structure includes a substrate unit, a light-emitting unit, a light-reflecting unit and a package unit. The substrate unit has a substrate body and a chip-placing area, and the substrate body has a cutting chamfer formed on one side thereof. The light-emitting unit has a plurality of LED... Agent: Kile Park Goekjian Reed & Mcmanus

20100327297 - Organic el display panel: An organic EL display panel comprising a substrate and an organic light-emitting element R emitting red light, an organic light-emitting element G emitting green light and an organic light-emitting element B emitting blue light which are arranged on the substrate, wherein each of the organic light-emitting element has a concavely... Agent: Greenblum & Bernstein, P.L.C

20100327298 - Light-emitting element and method of making the same: A light-emitting element includes a semiconductor substrate, a light emitting portion including an active layer sandwiched between a first cladding layer of a first conductivity type and a second cladding layer of a second conductivity type different from the first conductivity type, a reflective portion provided between the semiconductor substrate... Agent: Scully Scott Murphy & Presser, PC

20100327299 - P-contact layer for a iii-p semiconductor light emitting device: A device includes a semiconductor structure with at least one III-P light emitting layer disposed between an n-type region and a p-type region. The semiconductor structure further includes a GaAsxP1-x p-contact layer, wherein x<0.45. A first metal contact is in direct contact with the GaAsxP1-x p-contact layer. A second metal... Agent: Philips Intellectual Property & Standards

20100327300 - Contact for a semiconductor light emitting device: Embodiments of the invention include a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region. A contact disposed on the p-type region includes a transparent conductive material in direct contact with the p-type region, a reflective metal layer, and a transparent insulating... Agent: Philips Intellectual Property & Standards

20100327306 - Led based light source for improved color saturation: There is provided a light emitting device comprising a light source comprising at least one light emitting diode emitting visible radiation. The light emitting device further comprises a wavelength converting body comprising a first wavelength converting material, which is arranged to receive light emitted by said light source and which... Agent: Philips Intellectual Property & Standards

20100327301 - Led lighting device: An LED lighting device includes a circuit board, a plurality of LED units, a waterproof layer and a middle layer. The LED units are disposed on the circuit board by surface mounted way. The light beam emitted from the LED units emits from the light-emitting surface. The waterproof layer wraps... Agent: Kile Park Goekjian Reed & Mcmanus

20100327302 - Led module: An LED module includes an LED and a lens located over and enclosing the LED. The lens includes a surface of incidence facing the LED for an incidence of light emitted from the LED and a surface of emission for an emission of the light out of the LED module.... Agent: Altis Law Group, Inc. Attn: Steven Reiss

20100327308 - Light emitting diode package and method of manufacturing the same: According to an embodiment, a light emitting apparatus includes a substrate; at least two distinct electrodes on the substrate, wherein the at least two distinct electrodes are spaced from each other; a light emitting device on one of the at least two distinct electrodes; lenses including a first lens and... Agent: Birch Stewart Kolasch & Birch

20100327303 - Light-emitting diode lamp with uniform resin coating: LED lamps with a conformally coated LED chip and methods of manufacturing the same provides for LEDs having predictable color temperature. A conformally coated LED chip includes an LED chip with a conformal resin layer disposed over a portion of the LED chip. The LED lamp may have the characteristics... Agent: Baker & Mckenzie LLP Patent Department

20100327307 - Optoelectronic component: An optoelectronic component having a basic housing or frame and at least one semiconductor chip, specifically a radiation-emitting or-receiving semiconductor chip, in a cavity of the basic housing. In order to increase the efficiency of the optoelectronic component, reflectors are provided in the cavity in the region around the semiconductor... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100327304 - Organic el device and design method thereof: An organic electroluminescence device including an organic electroluminescence display part which includes an anode, a cathode and at least a light-emitting layer disposed therebetween, and a lens which controls an optical path of light emitted from the light-emitting layer, wherein the organic electroluminescence device has a ratio of A to... Agent: Birch Stewart Kolasch & Birch

20100327305 - Photonic structures for efficient light extraction and conversion in multi-color light emitting devices: A high efficiency light emitting diode (LED) comprised of a substrate, a buffer layer grown on the substrate (if such a layer is needed), a first active region comprising primary emitting species (PES) that are electrically-injected, a second active region comprising secondary emitting species (SES) that are optically-pumped by the... Agent: Gates & Cooper LLP Howard Hughes Center

20100327310 - Semiconductor chip assembly with post/base/flange heat spreader and cavity in flange: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The heat spreader includes a post, a base and a flange. The conductive trace includes a pad and a terminal. The semiconductor device extends into a cavity in the flange, is electrically connected... Agent: David M. Sigmond

20100327309 - Voltage-operated layered arrangement: A voltage-operated layered arrangement comprising a substrate (1), a layered structure (2, 3, 4, 5) that is applied to the substrate and that comprises at least one electrically conductive functional layer (3) arranged between a first electrode (2) and a second electrode (4), and a field-degrading layer (5) that is... Agent: Philips Intellectual Property & Standards

20100327311 - Group iii nitride semiconductor light emitting device and production method thereof, and lamp: v

20100327312 - Group iii nitride semiconductor light-emitting device and method for producing the same: A group III nitride semiconductor light-emitting device includes: a conductive support; a p-electrode positioned on the support, a p-type layer containing a group III nitride semiconductor, an active layer and an n-type layer having a first surface, which are positioned in turn on the p-electrode; and an n-electrode positioned on... Agent: Mcginn Intellectual Property Law Group, PLLC

20100327313 - Semiconductor device: A semiconductor device includes a semiconductor substrate and a MOS transistor. The semiconductor substrate has the first main surface and the second main surface facing each other. The MOS transistor includes a gate electrode (5a) formed on the first main surface side, an emitter electrode (11) formed on the first... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100327314 - Insulated gate bipolar transistor (igbt) collector formed with ge/a1 and production method: This invention discloses an IGBT device with its collector formed with Ge/Al and associated method of fabrication. The collector is formed on the substrate layer, which is on the back of IGBT, and contains Ge and Al thin films. After thinning and etching the back side of IGBT substrate, Ge... Agent: Chein-hwa S. Tsao

20100327315 - Semiconductor device, semiconductor integrated circuit device for use of driving plasma display with using same, and plasma display apparatus: A horizontal-type IGBT having a large current density, which is formed on a SOI substrate, has an emitter region, which is made up with two (2) or more of base-layers of a second conductivity-type on an oxide film groove, wherein the base-layers of the second conductivity-type in the emitter region... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100327316 - Method for manufacturing an iii-v engineered substrate and the iii-v engineered substrate thereof: Manufacturing an III-V engineered substrate involves providing a base substrate comprising an upper layer made of a first III-V compound with a <110> or a <111> crystal orientation, forming an intermediate layer comprising at least a buffer layer of a second III-V compound, wherein the intermediate layer is overlying and... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20100327319 - Control of tunneling junction in a hetero tunnel field effect transistor: Embodiments of the present disclosure provide a method to fabricate a hetero-junction in a Tunnel Field Effect Transistor (TFET) device configuration (e.g. in a segmented nanowire TFET). Since in prior art devices the highly doped source is in direct contact with the lowly doped or undoped channel, some amount of... Agent: Knobbe Martens Olson & Bear LLP

20100327317 - Germanium on insulator using compound semiconductor barrier layers: Embodiments of an apparatus and methods for providing germanium on insulator using a large bandgap barrier layer are generally described herein. Other embodiments may be described and claimed.... Agent: Intel Corporation C/o Cpa Global

20100327320 - Nitride semiconductor device: A nitride semiconductor device includes: a first semiconductor layer made of first nitride semiconductor; a second semiconductor layer formed on a principal surface of the first semiconductor layer and made of second nitride semiconductor having a bandgap wider than that of the first nitride semiconductor; a control layer selectively formed... Agent: Mcdermott Will & Emery LLP

20100327318 - Semiconductor device and manufacturing method of the same: A semiconductor device capable of suppressing the occurrence of a punch-through phenomenon is provided. A first n-type conductive layer (2′) is formed on a substrate (1′). A p-type conductive layer (3′) is formed thereon. A second n-type conductive layer (4′) is formed thereon. On the under surface of the substrate... Agent: Mcginn Intellectual Property Law Group, PLLC

20100327321 - Tunnel field-effect transistor with narrow band-gap channel and strong gate coupling: A semiconductor device and the methods of forming the same are provided. The semiconductor device includes a low energy band-gap layer comprising a semiconductor material; a gate dielectric on the low energy band-gap layer; a gate electrode over the gate dielectric; a first source/drain region adjacent the gate dielectric, wherein... Agent: Slater & Matsil, L.L.P.

20100327322 - Transistor with enhanced channel charge inducing material layer and threshold voltage control: High electron mobility transistors and fabrication processes are presented in which a barrier material layer of uniform thickness is provided for threshold voltage control under an enhanced channel charge inducing material layer (ECCIML) in source and drain regions with the ECCIML layer removed in the gate region.... Agent: Naval Research Laboratory Associate Counsel (patents)

20100327323 - Three-dimensional nonvolatile memory device and method for fabricating the same: A three-dimensional nonvolatile memory device includes: a plurality of channel structures extending in parallel in a first direction and comprising a plurality of channel layers that are alternatively stacked with a plurality of interlayer insulating layers over a substrate; a plurality of memory cells stacked along sidewalls of the channel... Agent: Ip & T Group LLP

20100327324 - Semiconductor chip: In a semiconductor chip in which external connection pads are arranged in three or more rows in a staggered configuration at the peripheral portion thereof, a first pad which is arranged in the outermost row is used as a power supply pad or a ground pad for an internal core... Agent: Mcdermott Will & Emery LLP

20100327325 - Multidirectional two-phase charge-coupled device: A charge transfer device formed in a semiconductor substrate and including an array of electrodes distributed in rows and columns, wherein: each electrode is formed in a cavity with insulated walls formed of a groove which generally extends in the row direction, having a first end closer to an upper... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20100327327 - Photosensitive charge-coupled device comprising vertical electrodes: A charge transfer device formed in a semiconductor substrate and including an array of electrodes forming rows and columns, wherein: the electrodes extend, in rows, in successive grooves with insulated walls, disposed in the substrate thickness and parallel to the charge transfer direction.... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20100327328 - Solid-state imaging device and method for manufacturing same: A solid-state imaging device includes: a semiconductor substrate having a plurality of vertical transfer channel regions and a plurality of photoelectric conversion regions arranged in a matrix; a plurality of vertical transfer electrodes, each constructed of a gate electrode and a first metal light-shielding film, formed via a gate insulating... Agent: Mcdermott Will & Emery LLP

20100327326 - Two-phase charge-coupled device: A charge-coupled unit formed in a semiconductor substrate and including an array of identical electrodes forming rows and columns, wherein: each electrode extends in a cavity with insulated walls formed of a groove, oriented along a row, dug into the substrate thickness, and including, at one of its ends, a... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20100327329 - Semiconductor device and method of fabricating the same: According to one embodiment, a semiconductor device includes a transistor, an element isolation insulating film, and a metal silicide layer. The transistor contains a gate electrode and an epitaxial crystal layer. The epitaxial crystal layer is formed on at least one side of the gate electrode in the semiconductor substrate... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100327330 - Semiconductor device wherein a first insulated gate field effect transistor is connected in series with a second field effect transistor: A semiconductor device in which a first insulated gate field effect transistor (1) is connected in series with a second field effect transistor, FET, (2), wherein the second field effect transistor (2) has a heavily doped source region (19A) which is electrically connected to a heavily doped drain contact region... Agent: Young & Thompson

20100327331 - Semiconductor device: The present invention proposes a dummy metal fill structure which makes it possible to reduce variations in transistor characteristics as much as possible even if mask misalignment occurs, as well as to ensure the intended planarizing effect of the metal CMP process. The dummy metal fill formed above the gate... Agent: Mcdermott Will & Emery LLP

20100327332 - Solid state imaging device: A solid state imaging device having a pixel area in which a plurality of light receiving elements are arranged, and a peripheral circuit area adjacent to the pixel area includes: a semiconductor substrate 102 of a first conductivity type or a second conductivity type; a first semiconductor layer 103 of... Agent: Mcdermott Will & Emery LLP

20100327333 - Spin transport device: A spin transport device which comprises a channel, first and second insulating layers, a magnetization fixed layer, a magnetization free layer, first and second wirings, and satisfies at least one of following conditions A and B, Condition A: The first wiring includes a vertical portion which extends in a thickness... Agent: Oliff & Berridge, PLC

20100327334 - Floating body memory cell apparatus and methods: Some embodiments include apparatus and methods having a base; a memory cell including a body, a source, and a drain; and an insulation material electrically isolating the body, the source, and the drain from the base, where the body is configured to store information. The base and the body include... Agent: Schwegman, Lundberg & Woessner/micron

20100327335 - Method of building compensated isolated p-well devices: Electrical device structures constructed in an isolated p-well that is wholly contained within a core n-well. Methods of forming electrical devices within an isolated p-well that is wholly contained within a core n-well using a baseline CMOS process flow.... Agent: Texas Instruments Incorporated

20100327336 - Concentric or nested container capacitor structure for integrated circuits: Disclosed are embodiments for a container capacitor structure in which at least two container capacitors, e.g., an inner and outer container capacitor, are made concentric and nested with respect to one another. The nested capacitors are formed in one embodiment by defining a hole in a dielectric layer for the... Agent: Wong, Cabello, Lutsch, Rutherford & Brucculeri, L.L.P.

20100327337 - Semiconductor memory device and method for fabricating the same: A semiconductor memory device has an asymmetric buried gate structure with a stepped top surface and a method for fabricating the same. The method for fabricating the semiconductor memory device includes: etching a predetermined region of a semiconductor substrate to form an isolation layer defining an active region; forming a... Agent: Ampacc Law Group, PLLC Loading...

20100327338 - Semiconductor memory device including multi-layer gate structure: A semiconductor memory device includes a first select transistor, first stepped portion, and a first contact plug. The first select transistor is formed on a side of an upper surface of a substrate and has a first multi-layer gate. The first stepped portion is formed by etching the substrate adjacent... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100327340 - Nonvolatile semiconductor memory device: According to one embodiment, a nonvolatile semiconductor memory device includes a stacked structural unit, a semiconductor pillar, a memory layer, an inner insulating film, an outer insulating film and a cap insulating film. The unit includes a plurality of electrode films stacked alternately in a first direction with a plurality... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100327339 - Nonvolatile semiconductor memory device and method for manufacturing same: A semiconductor memory device provided with a cell array section and a peripheral circuit section, the device includes: a back gate electrode; a stacked body provided on the back gate electrode; a plurality of semiconductor pillars extending in a stacking direction; connection members, each of the connection members connecting one... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100327341 - Nonvolatile semiconductor memory device having charge storage layers and manufacturing method thereof: A nonvolatile semiconductor memory device includes first electrodes, a second and a third electrode, a first film, a first inter layer film, a second inter layer film, and a second film. The first electrodes each have a charge storage and a control electrode. The second and the third electrodes are... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100327343 - Bond pad with integrated transient over-voltage protection: In various embodiments, the invention relates to bond pad structures including planar transistor structures operable as over-voltage clamps.... Agent: Goodwin Procter LLP Patent Administrator

20100327342 - Transient over-voltage clamp: In various embodiments, the invention relates to semiconductor structures, such as planar MOS structures, suitable as voltage clamp devices. Additional doped regions formed in the structures may improve over-voltage protection characteristics.... Agent: Goodwin Procter LLP Patent Administrator

20100327344 - Power semiconductor devices and methods: The present inventors have realized that manufacturability plays into optimization of power semiconductor devices in some surprising new ways. If the process window is too narrow, the maximum breakdown voltage will not be achieved due to doping variations and the like normally seen in device fabrication. Thus, among other teachings,... Agent: Robert Groover

20100327345 - Semiconductor device: A semiconductor device includes a transistor with a substrate on which source and drain regions, both of a first conductivity type, and a channel region of a second conductivity type between the source and drain are formed, and a gate electrode formed in the channel region to bury a trench... Agent: Young & Thompson

20100327346 - Semiconductor device and method for forming the same: A semiconductor and a method for forming the same are disclosed. The method for forming the semiconductor device includes forming a buried gate on a semiconductor substrate including an active region, forming an insulating layer on the semiconductor substrate, selectively removing the insulating layer from at least an upper part... Agent: Ampacc Law Group, PLLC Loading...

20100327347 - Electronic device including a well region: An electronic device including an integrated circuit can include a buried conductive region and a semiconductor layer overlying the buried conductive region, and a vertical conductive structure extending through the semiconductor layer and electrically connected to the buried conductive region. The integrated circuit can further include a doped structure having... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100327348 - Semiconductor device, method of manufacturing the same and power-supply device using the same: In a lateral-type power MOSFET, high breakdown voltage is achieved with suppressing to increase a cell pitch, and a feedback capacity and an ON resistance are decreased. An n− type silicon region having a high resistance to be a region of maintaining a breakdown voltage is vertically provided with respect... Agent: Brundidge & Stanger, P.C.

20100327349 - Semiconductor device and method of manufacturing the same: In a semiconductor device having an LDMOSFET, a source electrode is at the back surface thereof. Therefore, to reduce electric resistance between a source contact region in the top surface and the source electrode at the back surface, a poly-silicon buried plug is provided which extends from the upper surface... Agent: Mattingly & Malur, P.C.

20100327350 - Electronic device including an integrated circuit with transistors coupled to each other: An electronic device, including an integrated circuit, can include a buried conductive region and a semiconductor layer overlying the buried conductive region, wherein the semiconductor layer has a primary surface and an opposing surface lying closer to the buried conductive region. The electronic device can also include a first doped... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100327355 - Front and backside processed thin film electronic devices: This invention provides thin film devices that have been processed on their front- and backside. The devices include an active layer that is sufficiently thin to be mechanically flexible. Examples of the devices include back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.... Agent: Bell & Manning, LLC

20100327351 - Semiconductor device and method for manufacturing the same: An object is to reduce the resistance of each member included in a transistor, to improve ON current of the transistor, and to improve performance of an integrated circuit. A semiconductor device including an n-channel FET and a p-channel FET which are provided over a single crystal semiconductor substrate with... Agent: Robinson Intellectual Property Law Office, P.C.

20100327352 - Semiconductor device and method for manufacturing the same: An object is to reduce the resistance of each member included in a transistor, to improve ON current of the transistor, and to improve performance of an integrated circuit. A semiconductor device including an n-channel FET and a p-channel FET which are provided over a single crystal semiconductor substrate with... Agent: Robinson Intellectual Property Law Office, P.C.

20100327353 - Semiconductor device and method for manufacturing the same: A gate electrode 14 of a thin film transistor 100 included in a semiconductor device of the present invention is constituted of a single conductive film. A semiconductor layer 10 includes a first lightly doped impurity region which is provided between the channel region 12 and the source region 15... Agent: Nixon & Vanderhye, PC

20100327354 - Thin film transistor having long lightly doped drain on soi substrate and process for making same: Methods and apparatus for producing a thin film transistor (TFT) result in: a glass or glass ceramic substrate; a single crystal semiconductor layer; a source structure disposed on the single crystal semiconductor layer; a drain structure disposed on the single crystal semiconductor layer; and a gate structure located with respect... Agent: Bruce P Watson Corning Incorporated

20100327356 - Semiconductor device and semiconductor integrated circuit using the same: In the LSI, an FD-SOI structure having an embedded oxide film layer is used and a lower semiconductor region of the embedded oxide film layer is used as a back gate. A voltage for back gates in the logic circuits. having a small load in the logic circuit block is... Agent: Miles & Stockbridge PC

20100327357 - Semiconductor device and method for fabricating the same: A semiconductor device and a method for fabricating the same. A plurality of gate patterns are formed over a first-conductivity type silicon layer of a silicon-on-insulator semiconductor substrate including a buried insulation layer, so as to be separated from each other. A plurality of silicon bodies are formed under the... Agent: Ip & T Group LLP

20100327358 - Semiconductor element formed in a crystalline substrate material and comprising an embedded in situ n-doped semiconductor material: The PN junction of a substrate diode in a sophisticated semiconductor device may be formed on the basis of an embedded in situ N-doped semiconductor material thereby providing superior diode characteristics. For example, a silicon/carbon semiconductor material may be formed in a cavity in the substrate material, wherein the size... Agent: Williams, Morgan & Amerson

20100327359 - Semiconductor device and manufacturing method of the same: In a power MISFET having a trench gate structure with a dummy gate electrode, a technique is provided for improving the performance of the power MISFET, while preventing electrostatic breakdown of a gate insulating film therein. A power MISFET having a trench gate structure with a dummy gate electrode, and... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100327360 - Fet with replacement gate structure and method of fabricating the same: A MUGFET and method of manufacturing a MUGFET is shown. The method of manufacturing the MUGFET includes forming temporary spacer gates about a plurality of active regions and depositing a dielectric material over the temporary spacer gates, including between the plurality of active regions. The method further includes etching portions... Agent: Roberts Mlotkowski Safran & Cole, P.C. Intellectual Property Department

20100327361 - Low cost symmetric transistors: An integrated circuit is disclosed containing two types of MOS transistors of the same polarity, oriented perpendicularly to each other, formed by concurrent halo ion, LDD ion and/or S/D ion implant processes using angled, rotated sub-implants which vary the tilt angle, dose and/or energy between rotations. Implanted halo, LDD and/or... Agent: Texas Instruments Incorporated

20100327362 - Non-insulating stressed material layers in a contact level of semiconductor devices: In sophisticated semiconductor devices, non-insulating materials with extremely high internal stress level may be used in the contact level in order to enhance performance of circuit elements, such as field effect transistors, wherein the non-insulating material may be appropriately “encapsulated” by dielectric material. Consequently, a desired high strain level may... Agent: Williams, Morgan & Amerson

20100327363 - Semiconductor device and method for fabricating the same: Sidewalls are formed on side surfaces of fin-shaped active regions, and then substrate regions surrounded by a device isolation groove are formed, where the widths of each substrate region in a channel length direction and in a channel width direction are respectively larger than those of the active region. Next,... Agent: Mcdermott Will & Emery LLP

20100327367 - Contact optimization for enhancing stress transfer in closely spaced transistors: By appropriately designing the geometric configuration of a contact level of a sophisticated semiconductor device, the tensile stress level of contact elements in N-channel transistors may be increased, while the tensile strain component of contact elements caused in the P-channel transistor may be reduced.... Agent: Williams, Morgan & Amerson

20100327368 - Enhancing selectivity during formation of a channel semiconductor alloy by a wet oxidation process: High-k metal gate electrode structures are formed on the basis of a threshold adjusting semiconductor alloy formed in the channel region of one type of transistor, which may be accomplished on the basis of selective epitaxial growth techniques using an oxide hard mask growth mask. The hard mask may be... Agent: Williams, Morgan & Amerson

20100327365 - Method of manufacturing semiconductor device and semiconductor device: A method of manufacturing a semiconductor device includes: forming a gate insulating film over a semiconductor substrate; forming a mask that has an opening at a position corresponding to the gate insulating film formed in an NMOSFET forming region and covers the gate insulating film; forming a first metal layer... Agent: Young & Thompson

20100327369 - Semiconductor constructions: Some embodiments include methods of recessing multiple materials to a common depth utilizing etchant comprising C4F6 and C4F3. The recessed materials may be within isolation regions, and the recessing may be utilized to form trenches for receiving gatelines. Some embodiments include structures having an island of semiconductor material laterally surrounded... Agent: Wells St. John P.s.

20100327366 - Semiconductor device: A first adjusting metal, capable of varying the threshold voltage of a first-conductivity-type transistor of a complementary transistor, is added to the first-conductivity-type transistor and a second-conductivity-type transistor at the same time, and a diffusion suppressive element, capable of suppressing diffusion of the first adjusting metal, is added from above... Agent: Young & Thompson

20100327364 - Semiconductor device with metal gate: A semiconductor device includes: a substrate and an n-channel MIS transistor. The n-channel MIS transistor includes a p-type semiconductor region formed on the substrate, wherein a first source/drain region is formed in the p-type semiconductor region and separated from each other. The n-channel MIS transistor includes a first gate insulating... Agent: Turocy & Watson, LLP

20100327370 - Non-planar embedded polysilicon resistor: The present invention discloses a method comprising: forming a sacrificial polysilicon gate (of a transistor) and a polysilicon resistor; and replacing said sacrificial polysilicon gate (of said transistor) with a metal gate while covering said polysilicon resistor.... Agent: Winkle, PLLC C/o Cpa Global

20100327371 - Memory device and method of fabricating the same: A nonvolatile memory including a plurality of memory transistors in series, wherein source/drain and channel regions therebetween are of a first type and a select transistor, at each end of the plurality of memory transistors in series, wherein channels regions of each of the select transistors is of the first... Agent: Harness, Dickey & Pierce, P.L.C

20100327372 - Semiconductor device and method of fabricating the same: A semiconductor substrate according to one embodiment includes: a first transistor having a first gate insulating film formed on a semiconductor substrate, a first gate electrode formed on the first gate insulating film and a first sidewall formed on a side face of the first gate electrode, the first gate... Agent: Turocy & Watson, LLP

20100327373 - Uniform high-k metal gate stacks by adjusting threshold voltage for sophisticated transistors by diffusing a metal species prior to gate patterning: Sophisticated gate electrode structures for N-channel transistors and P-channel transistors are patterned on the basis of substantially the same configuration while, nevertheless, the work function adjustment may be accomplished in an early manufacturing stage. For this purpose, diffusion layer and cap layer materials are removed after incorporating the desired work... Agent: Williams, Morgan & Amerson

20100327374 - Low cost transistors using gate orientation and optimized implants: An integrated circuit is disclosed having symmetric and asymmetric MOS transistors of the same polarity, oriented perpendicularly to each other, formed by concurrent halo ion, LDD ion and/or S/D ion implant processes using angled, rotated sub-implants which vary the tilt angle, dose and/or energy between rotations. Implanted halo, LDD and/or... Agent: Texas Instruments Incorporated

20100327375 - Shallow extension regions having abrupt extension junctions: A method of forming a semiconductor device is provided that includes forming a gate structure atop a substrate and implanting dopants into the substrate to a depth of 10 nm or less from an upper surface of the substrate. In a following step, an anneal is performed with a peak... Agent: Scully, Scott, Murphy & Presser, P.C.

20100327376 - Metal high-k transistor having silicon sidewall for reduced parasitic capacitance, and process to fabricate same: A method forms a metal high dielectric constant (MHK) transistor and includes: providing a MHK stack disposed on a substrate, the MHK stack including a first layer of high dielectric constant material, a second overlying layer, and a third overlying layer; selectively removing only the second and third layers, without... Agent: Harrington & Smith

20100327377 - Fermi-level unpinning structures for semiconductive devices, processes of forming same, and systems containing same: An interlayer is used to reduce Fermi-level pinning phenomena in a semiconductive device with a semiconductive substrate. The interlayer may be a rare-earth oxide. The interlayer may be an ionic semiconductor. A metallic barrier film may be disposed between the interlayer and a metallic coupling. The interlayer may be a... Agent: Intel Corporation C/o Cpa Global

20100327378 - Semiconductor structure and method of forming the same: A semiconductor structure and a method of forming the same are provided. The semiconductor structure includes a substrate, a resistor and a metal gate structure. The substrate has a first area and a second area. The resistor is disposed in the first area, wherein the resistor does not include any... Agent: J C Patents

20100327379 - Capped integrated device with protective cap, composite wafer incorporating integrated devices and process for bonding integrated devices with respective protective caps: A capped integrated device includes a semiconductor chip, incorporating an integrated device and a protective cap, bonded to the semiconductor chip for protection of the integrated device by means of a bonding layer made of a bonding material. The bonding material forms anchorage elements within recesses, formed in at least... Agent: Seed Intellectual Property Law Group PLLC

20100327380 - Method of manufacturing capacitive electromechanical transducer and capacitive electromechanical transducer: In a method of manufacturing a capacitive electromechanical transducer, a first electrode (8) is formed on a substrate (4), an insulating layer (9) which has an opening (6) leading to the first electrode is formed on the first electrode (8), and a sacrificial layer is formed on the insulating layer.... Agent: Fitzpatrick Cella Harper & Scinto

20100327382 - High bandwidth, monolithic traveling wave photodiode array: The monolithic application of a high speed TWPDA with impedance matching. Use of the high speed monolithic TWPDA will allow for more efficient transfer of optical signals within analog circuits and over distances.... Agent: University Of Virginia Patent Foundation

20100327383 - Semiconductor device including through-electrode and method of manufacturing the same: According to one embodiment, a semiconductor device includes the following structure. The first insulating film is formed on a first major surface of a semiconductor substrate. The electrode pad is formed in the first insulating film. The electrode pad includes a conductive film. At least a part of the conductive... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100327385 - Semiconductor light-receiving element: The Si waveguide 305 includes a first conductivity-type Si layer 301 and an intrinsic Si layer 302, and a second conductivity-type light-absorption layer 303 is partially formed on an area thereof. During operation, a reverse bias is applied between the first conductivity-type Si layer 301 and the light-absorption layer 303.... Agent: Mr. Jackson Chen

20100327381 - Sidewall photodetector: Sidewall photodetectors for integrated photonic devices and their method of manufacture. An embodiment includes a p-i-n film stack formed on a sidewall of a substrate semiconductor feature having sufficiently large area to accommodate the spot size of a multi-mode fiber. An embodiment includes a first sidewall photodetector coupled to a... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100327384 - Solid-state image device: Stacked filters are primary color filters and complementary color filters. Thus it is possible to suppress an increase in spectral characteristics and improve the color reproducibility of the primary color filters.... Agent: Hamre, Schumann, Mueller & Larson P.C.

20100327386 - Photodiode array, image pickup device, and manufacturing method: A photodiode array includes a substrate of a common read-out control circuit; and a plurality of photodiodes arrayed on the substrate and each including an absorption layer, and a pair of a first conductive-side electrode and a second conductive-side electrode. In this photodiode array, each of the photodiodes is isolated... Agent: Fish & Richardson P.C. (ny)

20100327387 - Avalanche photodiode: A photodiode may include a first region comprising substantially intrinsic semiconductor material, the region having a first side and a second side opposite to the first side. The photodiode may also include a second region comprising highly-doped p-type semiconductor material formed proximate to the first side of the first region.... Agent: Baker Botts LLP

20100327390 - Back-illuminated image sensor with electrically biased conductive material and backside well: Back-illuminated image sensors include one or more contact implant regions disposed adjacent to a backside of a sensor layer. An electrically conductive material, including, but not limited to, a conductive lightshield, is disposed over the backside of the sensor layer. A backside well is formed in the sensor layer adjacent... Agent: Pedro P. Hernandez Patent Legal Staff

20100327391 - Back-illuminated image sensor with electrically biased frontside and backside: A back-illuminated image sensor includes a sensor layer of a first conductivity type having a frontside and a backside opposite the frontside. One or more regions of a second conductivity type are formed in at least a portion of the sensor layer adjacent to the frontside. The one or more... Agent: Pedro P. Hernandez Patent Legal Staff

20100327388 - Back-illuminated image sensors having both frontside and a backside photodetectors: A back-illuminated image sensor includes a sensor layer of a first conductivity type having a frontside and a backside opposite the frontside. One or more frontside regions of a second conductivity type are formed in at least a portion of the frontside of the sensor layer. A backside region of... Agent: Pedro P. Hernandez Patent Legal Staff

20100327389 - Back-illuminated image sensors having both frontside and backside photodetectors: A back-illuminated image sensor includes a sensor layer of a first conductivity type having a frontside and a backside opposite the frontside. One or more frontside regions of the first conductivity type are formed in at least a portion of the frontside of the sensor layer. A backside region of... Agent: Pedro P. Hernandez Patent Legal Staff

20100327392 - Back-illuminated image sensors having both frontside and backside photodetectors: A back-illuminated image sensor includes a sensor layer of a first conductivity type having a frontside and a backside opposite the frontside. An insulating layer is disposed over the backside. A circuit layer is formed adjacent to the frontside such that the sensor layer is positioned between the circuit layer... Agent: Pedro P. Hernandez, Patent Legal Staff Eastman Kodak Company

20100327393 - Method and structures for etching cavity in silicon under dielectric membrane: A semiconductor device includes a semiconductor layer (2) and a dielectric stack (3) on the semiconductor layer. A plurality of etchant openings (24-1,2 . . . ) are formed through the dielectric stack (3) for passage of etchant for etching a plurality of overlapping sub-cavities (4-1,2 . . . ),... Agent: Texas Instruments Incorporated

20100327394 - Em rectifying antenna suitable for use in conjuction with a natural breakdown device: A rectenna capable of power conversion from electromagnetic (EM) waves of high frequencies is provided. In one embodiment, a rectenna element generates currents from two sources—based upon the power of the incident EM wave and from an n-type semiconductor, or another electron source attached to a maximum voltage point of... Agent: Haynes And Boone, LLPIPSection

20100327395 - Semiconductor device on direct silicon bonded substrate with different layer thickness: A Direct Silicon Bonded substrate can include a first substrate and a second substrate in which the second substrate can be rotated to an azimuthal twist angle of 45 degrees in comparison to the first substrate. Disclosed are a semiconductor device and a method for making a semiconductor device that... Agent: Turocy & Watson, LLP

20100327396 - Pattern structure and method of forming the same: A pattern structure for a semiconductor device includes a plurality of first patterns, each of the first patterns extending in a first direction in the shape of a line, neighboring first patterns being spaced apart from each other by a gap distance, the plurality of first patterns including a plurality... Agent: Lee & Morse, P.C.

20100327397 - Method for manufacturing simox wafer and simox wafer: This method for manufacturing a SIMOX wafer includes: forming a mask layer on one surface side of a silicon single crystal wafer, which has an opening on a region where a BOX layer is to be formed; implanting oxygen ions through the opening of the mask layer into the silicon... Agent: Greenblum & Bernstein, P.L.C

20100327398 - Design structure and method for buried inductors for ultra-high resistivity wafers for soi/rf sige applications: A design structure is embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes a high resistivity substrate and a buried inductor formed directly in the high resistivity substrate and devoid of an insulating layer therebetween.... Agent: Roberts Mlotkowski Safran & Cole, P.C. Intellectual Property Department

20100327399 - Electrically programmable fuse using anisometric contacts and fabrication method: An electrically programmable fuse that includes an anode contact region and a cathode contact region are formed of a polysilicon layer having a silicide layer formed thereon, and a fuse link conductively connecting the cathode contact region with the anode contact region, which is programmable by applying a programming current,... Agent: Cantor Colburn LLP - IBM Fishkill

20100327401 - Fuse of semiconductor device: The present invention relates to a fuse for a semiconductor device, and discloses the technique capable of preventing fuse damage, which might occur during a fuse blowing step, with reducing area of the fuse occupying the semiconductor device. The present invention includes a common source region, wherein a plurality of... Agent: Ampacc Law Group, PLLC Loading...

20100327400 - Fuse structure and fabrication method thereof: A semiconductor device includes a fuse box including a plurality of fuses and a plurality of common nodes, wherein paired fuses among the plurality of fuses are aligned in a first direction and the plurality of common nodes between fuses of each of the pairs at a different height is... Agent: Ampacc Law Group, PLLC Loading...

20100327402 - Fuse structure for high integrated semiconductor device: The present invention provides a technology capable of improving an operation reliability of a semiconductor device. Particularly, a fuse material which constitutes the copper can be prevented from migrating being locked in the recesses or the grooves after a blowing process. A semiconductor device includes an insulating layer including a... Agent: Ampacc Law Group, PLLC Loading...

20100327403 - Semiconductor chip, semiconductor wafer, method of manufacturing semiconductor chip: One exemplary embodiment includes a semiconductor chip that has a rectangle principal surface including a first and a second side that oppose each other. A first and a second semiconductor element, and a first and a second wire are formed on the principal surface. The first wire is formed from... Agent: Mcginn Intellectual Property Law Group, PLLC

20100327405 - Electrical property altering, planar member with solder element in ic chip package: A structure includes a solder element for electrically coupling a substrate of an integrated circuit (IC) chip package and a printed circuit board (PCB); and a first electrical property altering, substantially planar member positioned between the solder element and at least one of a landing pad of the substrate and... Agent: Hoffman Warnick LLC

20100327404 - Inductor structures for integrated circuit devices: An IC device (100) includes an IC body (106) having a base layer (108) and first and second upper layers (114, 116) on the base layer. The IC body includes a cavity region (104) extending through said base and first upper layers and at least a portion of said second... Agent: Harris Corporation C/o Fox Rothschild, LLP

20100327406 - Semiconductor device and method of forming inductor over insulating material filled trench in substrate: A semiconductor device has a trench formed in a substrate. The trench has tapered sidewalls and depth of 10-120 micrometers. A first insulating layer is conformally applied over the substrate and into the trench. An insulating material, such as polymer, is deposited over the first insulating layer in the trench.... Agent: Robert D. Atkins

20100327408 - Carbon/epoxy resin composition, and carbon-epoxy dielectric film produced by using the same: A carbon/epoxy composition includes a bisphenol-based epoxy, an amine-based curing agent, an imidazole-based curing catalyst, and carbon black. A carbon-epoxy dielectric layer is fabricated using a reaction product of the carbon/epoxy composition.... Agent: Cantor Colburn LLP

20100327407 - Interconnection wiring structure of a semiconductor device and method for manufacturing same: A method for manufacturing an interconnection wiring structure of a semiconductor device includes forming an isolation region, which arranges active regions in a diagonal direction, in a semiconductor substrate; forming first damascene trenches, which open upper portions of a bit line contacts, by selectively etching a second interlayer insulation layer;... Agent: Marshall, Gerstein & Borun LLP

20100327409 - Semiconductor device comprising capacitive element: A capacitive element formed within a semiconductor device comprises an upper electrode, a capacitive insulating film containing an oxide and/or silicate of a transition metal element, and a lower electrode having a polycrystalline conductive film composed of a material having higher oxidation resistance than the transition metal element and an... Agent: Mr. Jackson Chen

20100327410 - Semiconductor device having a high aspect cylindrical capacitor and method for fabricating the same: A semiconductor device having a high aspect cylindrical capacitor and a method for fabricating the same is presented. The high aspect cylindrical type capacitor is a stable structure which is not prone to causing bunker defects and losses in a guard ring. The semiconductor device includes the cylindrical type capacitor... Agent: Ladas & Parry LLP

20100327411 - Semiconductor device: According to one embodiment, a semiconductor device includes a semiconductor substrate, a semiconductor region, a first and second electrodes. The semiconductor region is provided on the semiconductor substrate via an insulating film. The semiconductor region includes a protection diode. An overvoltage causes breakdown of the protection diode. A PN junction... Agent: Patterson & Sheridan, L.L.P.

20100327413 - Hardmask open and etch profile control with hardmask open: A method for opening a carbon-based hardmask layer formed on an etch layer over a substrate is provided. The hardmask layer is disposed below a patterned mask. The substrate is placed in a plasma processing chamber. The hardmask layer is opened by flowing a hardmask opening gas including a COS... Agent: Beyer Law Group LLP

20100327416 - Laser beam machining method, laser beam machining apparatus, and laser beam machining product: It is an object to provide a laser beam machining method which can easily cut a machining target. The laser beam machining method irradiates laser light while positioning a focus point at the inside of a machining target to thereby form a treated area based on multiphoton absorption along a... Agent: Drinker Biddle & Reath (dc)

20100327414 - Method for producing a semiconductor wafer: c) polishing the frontside and backside of the wafer, the frontside being polished by chemical-mechanical polishing using a polishing pad which is free of abrasive fixed in the polishing pad; backside polishing being carried out in three steps, using a polishing pad containing fixed abrasive which is pressed onto the... Agent: Brooks Kushman P.C.

20100327412 - Method of semiconductor manufacturing for small features: Small feature patterning is accomplished using a multilayer hard mask (HM). Embodiments include sequentially forming a first HM layer and a multilayer HM layer over a substrate, the multilayer HM layer comprising sublayers, etching the multilayer HM layer to form a first opening having an upper first opening with sides... Agent: Ditthavong Mori & Steiner, P.C.

20100327415 - Silicon epitaxial wafer and manufacturing method thereof: Provided is a method for manufacturing a silicon epitaxial wafer by growing an epitaxial layer by placing a silicon substrate on a susceptor. The method includes at least a step of forming a silicon oxide film entirely on the rear surface of the silicon substrate; a step of removing the... Agent: Oliff & Berridge, PLC

20100327417 - Electronic device having a molding compound including a composite material: An electronic device includes a packaged integrated circuit having an integrated circuit die having an active surface, and a molding compound overlaying the active surface of the integrated circuit die. In a particular embodiment, the packaged integrated circuit includes at least approximately five weight percent (5 wt %) zinc relative... Agent: Larson Newman & Abel, LLP

20100327418 - Integrated circuit package system using heat slug: An integrated circuit package system includes a substrate having an integrated circuit die thereon; a heat slug having a tie bar, the tie bar having characteristics of singulation from an adjacent heat slug; and an encapsulant molded on the substrate, the heat slug, and the integrated circuit die includes the... Agent: Law Offices Of Mikio Ishimaru

20100327420 - Semiconductor device with embedded interconnect pad: A semiconductor device comprising: a lower semiconductor package that comprises a first set of one or more semiconductor dies, an upper semiconductor package that is stacked on the lower semiconductor package, the upper semiconductor package comprises a second set of one or more semiconductor dies, and a first interconnect pad... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100327419 - Stacked-chip packages in package-on-package apparatus, methods of assembling same, and systems containing same: A stacked-chip apparatus includes a package substrate and an interposer with a chip stack disposed with a standoff that matches the interposer. A package-on-package stacked-chip apparatus includes a top package disposed on the interposer.... Agent: John N. Greaves C/o Cpa Global

20100327421 - Ic package design with stress relief feature: A protective structure is provided on a substrate to which a semiconductor die is attached. The protective structure surrounds the die and reduces the thermo-mechanical stresses to which the die is subject. The die is protected against cracking, warping, and delamination.... Agent: Stmicroelectronics, Inc.

20100327422 - Semiconductor chip, method of fabricating the same, and stack module and memory card including the same: A semiconductor chip, a method of fabricating the same, and a stack module and a memory card including the semiconductor chip include a first surface and a second surface facing the first surface is provided. At least one via hole including a first portion extending in a direction from the... Agent: Stanzione & Kim, LLP

20100327423 - Semiconductor packaging structure and method for manufacturing the same: The present application provides a method and semiconductor packaging structure comprising a conductive substrate having a first surface, a first lateral surface and a second lateral surface adjacent to the first surface. A first electrode line with two ends are provided on the first surface and the first lateral surface,... Agent: Altis Law Group, Inc. Attn: Steven Reiss

20100327425 - Flat chip package and fabrication method thereof: A flat chip package comprises an encapsulation body, a plurality of connecting fingers, a plurality of conductive lines, a chip, a plurality of bond wires and an insulation layer. The conductive lines, the chip, and the bond wires are encapsulated in the encapsulation body. The connecting fingers comprise a ground... Agent: Altis Law Group, Inc. Attn: Steven Reiss

20100327424 - Multi-chip package and method of providing die-to-die interconnects in same: A multi-chip package includes a substrate (110) having a first side (111), an opposing second side (112), and a third side (213) that extends from the first side to the second side, a first die (120) attached to the first side of the substrate and a second die (130) attached... Agent: Intel Corporation C/o Cpa Global

20100327428 - Package manufacturing method and semiconductor device: A method for manufacturing a package comprises a first step of forming a metal pattern including a frame and a plurality of leads extending inward from the frame, a second step of molding a resin pattern including a first resin portion which holds the plurality of leads from an inner... Agent: Fitzpatrick Cella Harper & Scinto

20100327426 - Semiconductor chip package and method of manufacturing the same: Provided are a semiconductor chip package and a method of manufacturing the same. The semiconductor chip package includes a semiconductor chip including a first face having a chip pad, a second face facing the first face, and a side face connecting the first and second faces, a first lamination layer... Agent: Staas & Halsey LLP

20100327427 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a wiring layer, a semiconductor chip which is arranged on the wiring layer with a gap there between, the semiconductor chip being electrically connected to the wiring layer through a connecting portion, a first sealing member which is filled in a space between the wiring layer... Agent: Mcginn Intellectual Property Law Group, PLLC

20100327429 - Semiconductor package structure and package method thereof: A semiconductor package structure and a package method thereof are provided. The semiconductor package structure includes a substrate, a sensing chip, a first patterned conductive layer and a electrical connection portion. The substrate has an accommodating portion, a first surface and a second surface opposite to the first surface. The... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100327432 - Package with heat transfer: A semiconductor package includes an encapsulant, a semiconductor device within the encapsulant, and one or more terminals for electrically coupling the semiconductor device to a node exterior to the package. The package further includes bonding means coupling the semiconductor device to the one or more terminals. The semiconductor package is... Agent: Haverstock & Owens LLP

20100327431 - Semiconductor chip thermal interface structures: Various thermal interface structures and methods are disclosed. In one aspect, a method of manufacturing is provided. The method includes providing plural carbon nanotubes in a thermal interface structure. The thermal interface structure is soldered to a side of a semiconductor chip. In another aspect, an apparatus is provided. The... Agent: Timothy M Honeycutt Attorney At Law

20100327430 - Semiconductor device assembly having a stress-relieving buffer layer: Disclosed is a multilayer thermal interface material which includes a first layer of metallic thermal interface material, a buffer layer and preferably a second layer of thermal interface material which may be metallic or nonmetallic. The multilayer thermal interface material is used in conjunction with a semiconductor device assembly of... Agent: International Business Machines Corporation Dept. 18g

20100327433 - High density mim capacitor embedded in a substrate: An integrated circuit package includes a decoupling capacitor. The integrated circuit package also includes a packaging substrate. The decoupling capacitor is at least partially embedded in the packaging substrate. The integrated circuit package further includes a die mounted to the packaging substrate. The die is coupled to the decoupling capacitor.... Agent: Qualcomm Incorporated

20100327440 - 3-d semiconductor die structure with containing feature and method: A die-on-die assembly has a first die (10) and a second die (50). The first die (10) has a first contact extension (28,42) and a peg (32,44,45) extending a first height above the first die. The second die (50) has a second contact extension (68) connected to the first contact... Agent: Freescale Semiconductor, Inc. Law Department

20100327436 - Apparatus and method for stacking integrated circuits: A multi-chip stack module provides increased circuit density for a given surface chip footprint. Support structures are alternated with standard surface mount type chips to form a stack wherein the support structures electrically interconnect the chips. One aspect is a structure and method for interconnecting a plurality of generally planar... Agent: Mcdermott Will & Emery LLP

20100327435 - Electronic component and manufacture method thereof: An electronic component includes a package substrate, a plurality of conductive pads, an insulating material and a semiconductor device. The plurality of conductive pads is disposed on the package substrate. The insulating material is disposed between the plurality of conductive pads. The insulating material includes a top surface located on... Agent: Kratz, Quintos & Hanson, LLP

20100327438 - Near chip scale semiconductor packages: Flip chip ball grid array semiconductor devices and methods for fabricating the same. In one example, a near chip scale method of semiconductor die packaging may comprise adhering the die to a substrate in a flip chip configuration, coating the die with a first polymer layer, selectively removing the first... Agent: Lando & Anastasi, LLP S2059

20100327434 - Semiconductor device and method of manufacturing the same: A semiconductor device includes: a first semiconductor chip having a first active surface and a bonding surface forming an opposite side of the first active surface, the bonding surface being bonded to a mounting surface of a substrate; a second semiconductor chip having a second active surface facing the first... Agent: Harness, Dickey & Pierce, P.L.C

20100327439 - Semiconductor package and method of forming the same: A semiconductor package includes a first package substrate, a first semiconductor chip disposed on the first package substrate, the semiconductor chip including first through hole vias, and a chip package disposed on the first semiconductor chip, the chip package including a second package substrate and a second semiconductor chip disposed... Agent: Harness, Dickey & Pierce, P.L.C

20100327437 - Wiring board and semiconductor device using the wiring board: Provided is a wiring board wherein a circuit is not short-circuited when a IC chip is mounted on the wiring board. A wiring board (2) is provided with a substrate (4); wiring layers (5-8), which are formed on a surface of the substrate (4) and have prescribed wiring patterns; connecting... Agent: Birch Stewart Kolasch & Birch

20100327442 - Package and the method for making the same, and a stacked package: The present invention relates to a package and the method for making the same, and a stacked package. The method for making the package includes the following steps: (a) providing a carrier having a plurality of platforms; (b) providing a plurality of dice, and disposing the dice on the platforms;... Agent: Mccracken & Frank LLP

20100327441 - Semiconductor device, semiconductor package and wiring structure: A semiconductor device includes a semiconductor package, a circuit board, an interconnection electrically connecting the semiconductor package and the circuit board, and a wiring structure. The wiring structure includes a through hole, a contact disposed at the through hole and a lead pattern extending from the contact. The wiring structure... Agent: Fujitsu Patent Center Fujitsu Management Services Of America, Inc.

20100327443 - Joining structure and a substrate-joining method using the same: The present invention concerns a joining structure and a substrate-joining method using the same. The joining structure comprises a substrate, and comprises a plurality of joining patterns which are located on the said substrate and which are spaced apart from each other. The substrate-joining method using the joining structure can... Agent: Dr. Mark M. Friedman C/o Bill Polkinghorn - Discovery Dispatch

20100327444 - Sheet structure, semiconductor device and method of growing carbon structure: The sheet structure includes a plurality of linear structure bundles including a plurality of linear structures of carbon atoms arranged at a first gap, and arranged at a second gap larger than the first gap, a graphite layer formed in a region between the plurality of linear structure bundles and... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100327447 - Method of manufacturing semiconductor device and semiconductor device: A method of manufacturing a semiconductor device includes forming a barrier metal film including a high melting point metal in a concave portion formed in an insulating film formed over a substrate; forming a seed alloy film including copper and an impurity metal different from the copper over the barrier... Agent: Mcginn Intellectual Property Law Group, PLLC

20100327449 - Semiconductor device and manufacturing method of semiconductor device: To provide a semiconductor device having a structure in which a barrier metal film containing nitrogen is formed in a connection surface between a copper alloy wiring and a via, in which the electric resistance between the copper alloy wiring and the via can be prevented from rising, and the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100327448 - Semiconductor with bottom-side wrap-around flange contact: A packaging technique for electronic devices includes wafer fabrication of flexible contacts on the bottom surface of the substrate underneath the active circuit. Inherently reliable contacts suitable for a variety of devices can be formed via a simple fabrication process with good wafer packing density. For one embodiment, a trench... Agent: The Tpl Group C/o Alliacense Limited LLC

20100327445 - Structure of power grid for semiconductor devices and method of making the same: An embodiment of the invention provides a semiconductor structure, which may include a stud of a first conductive material formed inside a dielectric layer; a via of a second conductive material having a bottom and sidewalls with the bottom and the sidewalls being covered by a conductive liner, and the... Agent: International Business Machines Corporation Dept. 18g

20100327446 - Via gouged interconnect structure and method of fabricating same: An interconnect structure including a gouging feature at the bottom of a via opening and a method of forming the same are provided. The method of the present invention does not disrupt the coverage of the deposited trench diffusion barrier in a line opening that is located atop the via... Agent: Scully, Scott, Murphy & Presser, P.C.

20100327450 - Semiconductor device bonding wire and wire bonding method: It is an object of the present invention to provide a copper-based bonding wire whose material cost is low, having excellent ball bondability, reliability in a heat cycle test or reflow test, and storage life, enabling an application to thinning of a wire used for fine pitch connection. The bonding... Agent: Mcdermott Will & Emery LLP

20100327451 - Alignment mark: An alignment mark for defect inspection is disclosed. The alignment mark includes: a semiconductor substrate; a first type well disposed in the semiconductor substrate; a second type doping region disposed in the first type well; a dielectric layer disposed on the semiconductor substrate to cover the first type well and... Agent: North America Intellectual Property Corporation

20100327452 - Mounting structure and method of manufacturing the same: To provide a mounting structure having a substrate and a semiconductor package mounted thereon which enables suppression of unnecessary electromagnetic radiation and improvement of drop impact resistance, and a method of manufacturing the same. A substrate 1 includes, formed on the surface thereof, multiple electrode pads 12 for mounting a... Agent: Mcginn Intellectual Property Law Group, PLLC

20100327456 - Process for improving the reliability of interconnect structures and resulting structure: An interconnect structure of an integrated circuit having improved reliability and a method for forming the same are provided. The method includes providing a substrate, forming a dielectric layer overlying the substrate, performing a first shrinking process, wherein the dielectric layer shrinks and has a first shrinkage rate, forming a... Agent: Slater & Matsil, L.L.P.

20100327457 - Semiconductor chip and semiconductor device: For example, there is a cross-shaped connection bump disposition area which is formed by memory banks which face with each other with a certain distance. And in the area in the cross-shaped connection bump disposition area, signal input output connection bumps (the first electrodes) are disposed and form a group.... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100327453 - Semiconductor device and method of manufacturing the same: A semiconductor device comprises a first substrate in which a first memory cell array is formed, a second substrate in which a second memory cell array, a page buffer, and decoders are formed, and a coupling structure formed on the first and second substrates and configured to have the page... Agent: Marshall, Gerstein & Borun LLP

20100327455 - Semiconductor device including two heat sinks and method of manufacturing the same: A semiconductor device includes a semiconductor element, a first heat sink, a second heat sink, and a resin member. The semiconductor element has first and second surfaces. The first heat sink has a first heat radiation surface and a first end surface. The first end surface is coupled with the... Agent: Posz Law Group, PLC

20100327454 - Semiconductor device, and method of fabricating semiconductor device: There is provided a semiconductor device including: an insulating layer provided on a substrate and formed with plural cavities; wiring lines provided on the insulating layer; plural branched wiring lines that branch from the wiring lines so as to respectively overlap with the plural cavities when seen in plan view;... Agent: Volentine & Whitt PLLC

20100327458 - Semiconductor device: There is provided a semiconductor device including: a metal wiring line formed on a semiconductor substrate; an inside chamfer provided only at the inside of a bend in the metal wiring line, widening the wiring line width at the inside of the bend; and a protection film covering the metal... Agent: Rabin & Berdo, PC

20100327459 - Semiconductor device having plurality of wiring layers and designing method thereof: A semiconductor device includes first and second wirings formed in a first wiring layer and extending parallel to an X direction, third and fourth wirings formed in a third wiring layer and extending parallel to a Y direction; fifth and sixth wirings formed in a second wiring layer positioned between... Agent: Mcdermott Will & Emery LLP

20100327460 - Capactive connectors with enhanced capacitive coupling: A single-chip module (SCM) and a multi-chip module (MCM) that includes at least two instances of the SCM are described. The SCM includes a pad disposed on a substrate. This pad has a top surface that includes a pattern of features. A given feature in the pattern of features has... Agent: Pvf -- Oracle America, Inc. C/o Park, Vaughan & Fleming LLP

20100327461 - Electrical interconnect for die stacked in zig-zag configuration: A die (or of a stack of die) is mounted over and elevated above a support, and is electrically connected to circuitry in the support. Pillars of electrically conductive material are formed on a set of bond pads at a mount side of the support, and the elevated die (or... Agent: Haynes Beffel & Wolfeld LLP

20100327464 - Layered chip package: A layered chip package includes a main body including a plurality of layer portions, and wiring disposed on a side surface of the main body. Each layer portion includes a semiconductor chip, an insulating portion covering at least one side surface of the semiconductor chip, and a plurality of electrodes... Agent: Oliff & Berridge, PLC

20100327462 - Methods for wafer-level packaging of microfeature devices and microfeature devices formed using such methods: Methods for wafer-level packaging of microfeature devices and microfeature devices formed using such methods are disclosed herein. A method for packaging microfeature devices in accordance with an embodiment of the invention can include releasably attaching a plurality of first known good microelectronic dies to a carrier substrate in a desired... Agent: Perkins Coie LLP Patent-sea

20100327463 - Stacked structures and methods of fabricating stacked structures: A stacked structure includes a first substrate bonded to a second substrate such that a first pad structure of the first substrate contacts a second pad structure of the second substrate. A transistor gate is formed over the second substrate, and a first conductive structure extends through the second substrate... Agent: Duane Morris LLP (tsmc)IPDepartment

20100327465 - Package process and package structure: A package process is provided. First, a semiconductor substrate is disposed on a carrier, in which a surface of the carrier has an adhesive layer and the semiconductor substrate is bonded to the carrier by the adhesive layer. Next, a chip is bonded on the semiconductor substrate by flip chip... Agent: J C Patents

20100327466 - Technique for fabricating microsprings on non-planar surfaces: A processing technique facilitating the fabrication of the integrated circuit with microsprings at different vertical positions relative to a surface of a substrate is described. During the fabrication technique, microsprings are lithographically defined on surfaces of a first substrate and a second substrate. Then, a hole is created through a... Agent: Pvf -- Oracle America, Inc. C/o Park, Vaughan & Fleming LLP

20100327467 - Method of processing dummy pattern based on boundary length and density of wiring pattern, semiconductor design apparatus and semiconductor device: A semiconductor device, includes a first wiring pattern in a first region, a second wiring pattern in a second region, and at least one first dummy pattern formed in the first region and at least one second dummy pattern formed in the second region. A total area of the at... Agent: Mcginn Intellectual Property Law Group, PLLC

20100320433 - Variable resistance memory device and method of manufacturing the same: A variable resistance memory device includes a substrate, a plurality of active lines formed on the substrate, are uniformly separated, and extend in a first direction, a plurality of switching devices formed on the active lines and are separated from one another, a plurality of variable resistance devices respectively formed... Agent: F. Chau & Associates, LLC

20100320432 - Vertical mosfet transistor, in particular operating as a selector in nonvolatile memory devices: A vertical MOSFET transistor is formed in a body of semiconductor material having a surface. The transistor includes a buried conductive region of a first conductivity type; a channel region of a second conductivity type, arranged on top of the buried conductive region; a surface conductive region of the first... Agent: Gerbera/bstz Blakely Sokoloff Taylor & Zafman LLP

20100320434 - Method of manufacturing a variable resistance structure and method of manufacturing a phase-change memory device using the same: In methods of manufacturing a variable resistance structure and a phase-change memory device, after forming a first insulation layer on a substrate having a contact region, a contact hole exposing the contact region is formed through the first insulation layer. After forming a first conductive layer on the first insulation... Agent: Harness, Dickey & Pierce, P.L.C

20100320435 - Phase-change memory and method of making same: A phase-change memory cell structure includes a bottom diode on a substrate; a heating stem on the bottom diode; a first dielectric layer surrounding the heating stem, wherein the first dielectric layer forms a recess around the heating stem; a phase-change storage cap capping the heating stem and the first... Agent: North America Intellectual Property Corporation

20100320436 - Encapsulated phase change cell structures and methods: Methods and devices associated with phase change cell structures are described herein. In one or more embodiments, a method of forming a phase change cell structure includes forming a substrate protrusion that includes a bottom electrode, forming a phase change material on the substrate protrusion, forming a conductive material on... Agent: Brooks, Cameron & Huebsch , PLLC

20100320438 - Complexes of carbon nanotubes and fullerenes with molecular-clips and use thereof: Separation of carbon nanotubes or fullerenes according to diameter through non-covalent pi-pi interaction with molecular clips is provided. Molecular clips are prepared by Diels-Alder reaction of polyacenes with a variety of dienophiles. The pi-pi complexes of carbon nanotubes with molecular clips are also used for selective placement of carbon nanotubes... Agent: Connolly Bove Lodge & Hutz LLP (for IBM Yorktown)

20100320437 - Gas-phase functionalization of surfaces including carbon-based surfaces: The invention provides methods functionalizing a planar surface of a graphene layer, a graphite surface, or microelectronic structure. The graphene layer, graphite surface, or planar microelectronic structure surface is exposed to at least one vapor including at least one functionalization species that non-covalently bonds to the graphene layer, a graphite... Agent: Theresa A Lober T.a. Lober Patent Services

20100320439 - Carbon nanotube structure and method of vertically aligning carbon nanotubes: A Carbon NanoTube (CNT) structure includes a substrate, a CNT support layer, and a plurality of CNTs. The CNT support layer is stacked on the substrate and has pores therein. One end of each of the CNTs is attached to portions of the substrate exposed through the pores and each... Agent: Robert E. Bushnell & Law Firm

20100320440 - Deep ultraviolet light emitting device and method for fabricating same: An ultra-violet emitting light-emitting device and method for fabricating an ultraviolet light emitting device (LED) with an AlInGaN multiple-quantum-well active region exhibiting stable cw-powers. The LED includes a template with an ultraviolet light-emitting structure on it. The template includes a first buffer layer on a substrate, then a second buffer... Agent: Nexsen Pruet, LLC

20100320442 - Nanostructured electroluminescent device and display: An electroluminescent device contains (1) first and second electrodes, at least one of which is transparent to radiation; (2) a hole conducting layer containing first nanoparticles wherein the hole conducting layer is in contact with said first electrode; (3) an electron conducting layer containing second nanoparticles where the electron conducting... Agent: Morgan, Lewis & Bockius, LLP (sf)

20100320441 - Nitride semiconductor light emitting device and fabrication method thereof: A nitride semiconductor light emitting device comprises a first nitride semiconductor layer, an active layer of a single or multiple quantum well structure formed on the first nitride semiconductor layer and including an InGaN well layer and a multilayer barrier layer, and a second nitride semiconductor layer formed on the... Agent: Birch Stewart Kolasch & Birch

20100320443 - Er doped iii-nitride materials and devices synthesized by mocvd: This disclosure relates to the synthesis of Er doped GaN epilayers by in-situ doping by metal-organic chemical vapor deposition (MOCVD). In an embodiment, both above and below bandgap excitation results in a sharp PL emission peak at 1.54 μm. Contrary with other growth methods, MOCVD grown Er-doped GaN epilayers exhibit... Agent: Lathrop & Gage LLP

20100320444 - Integrated image sensor system on common substrate: It is highly desirable to design a monolithic image sensor (and array), which could offer high quantum efficiency over broad spectral ranges, and the possibility to rapidly and randomly address any element in the array. This invention utilizes the growth of semiconductor nanowires such as Si, Ge, Si:Ge, ZnO, or... Agent: Banpil Photonics, Inc.

20100320445 - Separation method of nitride semiconductor layer, semiconductor device, manufacturing method thereof, semiconductor wafer, and manufacturing method thereof: In a separation method of a nitride semiconductor layer, a graphene layer in the form of a single layer or two or more layers is formed on a surface of a first substrate. A nitride semiconductor layer is formed on the graphene layer so that the nitride semiconductor layer is... Agent: Rabin & Berdo, PC

20100320451 - Benzochrysene derivative and organic electroluminescence device using the same: wherein Ra and Rb are independently a hydrogen atom or a substituent, m and n are independently an integer of 1 to 13, and when m and n are two or more, Ras and Rbs may be independently the same or different, and L1 is a single bond or a... Agent: Foley And Lardner LLP Suite 500

20100320452 - Benzophenanthrene derivative and organic electroluminescent device employing the same: wherein Ra and Rb are independently a hydrogen atom or a substituent, p is an integer of 1 to 8 and q is an integer of 1 to 11, when p is 2 or more, plural Ras may be independently the same or different and adjacent Ras may form a... Agent: Foley And Lardner LLP Suite 500

20100320448 - Electronic component and a method of manufacturing an electronic component: An electronic component, notably one including, for example, a TFT, a storage capacitor, or a crossing between electrically conductive layers of a stack device is disclosed. The electronic component comprises a substrate whereon a first electrically conductive layer forming electrode is provided. A second electrode formed by a second electrically... Agent: Leydig Voit & Mayer, Ltd

20100320455 - Organic electroluminescence device, production process therefor, and use thereof: Organic electroluminescence devices of the invention have excellent luminous efficiency and durability. Uses of the devices are also disclosed. The organic electroluminescence device includes a pair of electrodes and one or more organic layers including an emitting layer between the pair of electrodes, wherein one of the organic layer(s) includes... Agent: Sughrue Mion, PLLC

20100320447 - Organic electroluminescence manufacturing method and image display system having the same: An organic electroluminescence device manufacturing method and an image display system having the organic electroluminescence device are provided. The manufacturing method includes the steps of providing a substrate, forming a first electrode on the substrate, forming an organic layer having a plurality of crystals on the first electrode, and forming... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20100320446 - Organic light-emitting device having improved light-emitting efficiency and method for fabricating the same: The present invention provides an organic light emitting device in which a layer having a refractive index in the range of 1.3 to 3 is further formed on an upper electrode of at least one region of regions through which rays having red, green, and blue colors are passed and... Agent: Mckenna Long & Aldridge LLP

20100320449 - Organic radiation-emitting component: An organic radiation-emitting component such as an organic light emitting diode (OLED), having at least two electrode layers and, between them, at least one organic self-emitting layer with a phosphorescence triplet emitter comprising as well as one phosphorescent metal complex. The radiation-emitting layer contains, embedded in a matrix, a metal... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100320450 - Semiconductor substrate, semiconductor device, light emitting device and electronic device: To provide a semiconductor substrate, a semiconductor device, a light emitting device and an electronic device which have a low price, a long lifetime, and a high luminescent efficiency, and moreover are capable of being bent. A graphite substrate having heat resistance and having flexibility with respect to external force,... Agent: Kenyon & Kenyon LLP

20100320453 - Thin-film transistor and method for producing the same: A thin-film transistor includes a gate electrode disposed on a substrate, a semiconductor layer formed of an organic semiconductor and constituting a channel region, a gate insulating film disposed between the gate electrode and the semiconductor layer, and a pair of source/drain electrodes electrically connected to the semiconductor layer. The... Agent: Snr Denton US LLP

20100320454 - White light emitting material: A white light emitting material comprising a polymer having an emitting polymer chain and at least one emitting end capping group.... Agent: Marshall, Gerstein & Borun LLP

20100320457 - Etching solution composition: Provided is an etching solution composition for selectively etching a metal film, which is composed of Al, Al alloy or the like and is arranged on an amorphous oxide film, from a laminated film including the metal film and an amorphous oxide film of various types. The etching solution composition... Agent: Wolf Greenfield & Sacks, P.C.

20100320458 - Igzo-based oxide material and method of producing igzo-based oxide material: The invention provides an IGZO-based oxide material and a method of producing the same, the IGZO-based oxide material being represented by a composition formula of In2-xGaxZnO4-δ, where 0.75<x<1.10 and 0<δ≦1.29161×exp(−x/0.11802)+0.00153, and being formed from a single phase of IGZO having a crystal structure of YbFe2O4.... Agent: Solaris Intellectual Property Group, PLLC

20100320456 - Method for fabricating a doped and/or alloyed semiconductor: The present invention is directed to methods for depositing doped and/or alloyed semiconductor layers, an apparatus suitable for the depositing, and products prepared therefrom.... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20100320459 - Thin film transistor and method of producing thin film transistor: The invention provides a thin film transistor comprising an active layer, the active layer comprising an IGZO-based oxide material, the IGZO-based oxide material being represented by a composition formula of In2-xGaxZnO4-δ, where 0.75<x<1.10 and 0<δ≦1.29161×exp(−x/0.11802)+0.00153 and being formed from a single phase of IGZO having a crystal structure of YbFe2O4,... Agent: Solaris Intellectual Property Group, PLLC

20100320461 - Integration of sense fet into discrete power mosfet: A semiconductor device includes a main field effect transistor (FET) and one or more sense FETs. A transistor portion of the sense FET is surrounded by transistors of the main FET. An electrical isolation structure that surrounds the main FET is configured to electrically isolate source and body regions of... Agent: Joshua D. Isenberg Jdi Patent

20100320460 - System for separation of an electrically conductive connection: An integrated component includes a semiconductor substrate; at least one interconnect applied on the semiconductor substrate; an insulating layer applied on the at least one interconnect; and at least one opening through the insulating layer which interrupts the at least one interconnect into a first section and a second section.... Agent: Brinks Hofer Gilson & Lione/infineon Infineon

20100320462 - N-type conductive aluminum nitride semiconductor crystal and manufacturing method thereof: The n-type conductive aluminum nitride semiconductor crystal, by which the selfsupporting substrate is made up, contains Si atom at a concentration of 1×1018 to 5×1020 cm−3, is substantially free from halogen atoms, and substantially does not absorb the light having the energy of not more than 5.9 eV. The selfsupporting... Agent: Birch Stewart Kolasch & Birch

20100320463 - Method of fabricating a semiconductor device: A method of fabricating an electrode structure for a multilayer semiconductor device comprising a semiconductor layer having a first electrode layer in contact therewith and a second electrode layer separated there-from by a dielectric layer (8), the method comprising the steps of; applying a patterning material (20) only to selected... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20100320465 - Semiconductor device with multi-functional dielectric layer: A composite dielectric layer including a tensile stressed nitride layer over an oxide layer serves the dual function of acting as an SMT (stress memorization technique) film while an annealing operation is carried out and then remains partially intact as it is patterned to further serve as an RPO film... Agent: Duane Morris LLP (tsmc)IPDepartment

20100320464 - Thin film transistor, photo mask for defining thin film transistor, and method of making thin film transistor: A photo-mask includes a first opaque pattern, a second opaque pattern, a transparent single slit, and a translucent pattern. The transparent single slit is disposed between the first opaque pattern and the second opaque pattern, and the width of the transparent single slit is substantially between 1.5 micrometers and 2.5... Agent: North America Intellectual Property Corporation

20100320469 - Organic electro-luminescence display device and method for fabricating the same: An organic electro-luminance display device includes a first substrate including a plurality of sub-pixels, a first electrode on the first substrate, a buffer layer on the first electrode of a region that partitions each of the sub-pixels, a spacer on the buffer layer, the buffer layer and the spacer being... Agent: Morgan Lewis & Bockius LLP

20100320472 - Pixel electrode structure with high display quality: A pixel electrode structure includes a transparent substrate, a data line, a common line, a first array pixel, and a second array pixel disposed on the transparent substrate. The first/second array pixels respectively include a thin film transistor, a pixel electrode, and a gate line, and the common line is... Agent: North America Intellectual Property Corporation

20100320470 - Thin film transistor array panel and method for manufacturing the same: A thin film transistor array panel includes a substrate; a first gate line disposed on the substrate and including a gate electrode; a storage electrode disposed in a layer which is the same layer as a layer of the first gate line; a gate insulating layer disposed on the first... Agent: Cantor Colburn LLP

20100320466 - Thin film transistor array substrate and manufacturing method thereof: A thin film transistor array substrate and a manufacturing method thereof are provided. In the manufacturing method, a first patterned conductive layer including a plurality of scan lines and a plurality of gates connected with the scan lines is formed on a substrate. A patterned gate insulating layer having a... Agent: Jianq Chyun Intellectual Property Office

20100320473 - Thin film transistor structure of pixel: A thin film transistor structure of a pixel is provided. In the present invention, a first metal layer serves as a gate electrode, and the gate electrode includes an extending gate electrode portion. A second metal layer includes a drain electrode partially and respectively overlapping the gate electrode and the... Agent: North America Intellectual Property Corporation

20100320468 - Thin film transistor substrate and method of manufacturing the same: In a portion of a gate signal line and a portion of a common signal line, cutouts which are arranged perpendicular to the extending direction of these lines and open to face each other in an opposed manner are formed. A cruciform shape in appearance is formed by combining a... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100320471 - Thin-film transistor array, method of fabricating the same, and liquid crystal display device including the same: A thin-film transistor array includes an electrically insulating substrate, a plurality of thin-film transistors arranged in a matrix on the substrate, and each including a channel, a source, and a drain each comprised of an oxide-semiconductor film, a pixel electrode integrally formed with the drain, a source signal line through... Agent: Scully Scott Murphy & Presser, PC

20100320467 - Thin-film transistor, manufacturing method therefor, and electronic device using a thin-film transistor: Disclosed is a method that includes: forming a gate electrode on a substrate, then forming an insulation layer so as to completely cover the gate electrode, thereafter forming a semiconductor layer on the insulation layer, and then forming a crystallization-inducing metal layer on the semiconductor layer; removing the part of... Agent: Greenblum & Bernstein, P.L.C

20100320475 - Etching technique for the fabrication of thin (al, in, ga)n layers: An etching technique for the fabrication of thin (Al, In, Ga)N layers. A suitable template or substrate is selected and implanted with foreign ions over a desired area to create ion implanted material. A regrowth of a device structure is then performed on the implanted template or substrate. The top... Agent: Gates & Cooper LLP Howard Hughes Center

20100320474 - Gallium nitride for liquid crystal electrodes: Described herein is a liquid crystal (LC) device having Gallium Nitride HEMT electrodes. The Gallium Nitride HEMT electrodes can be grown on a variety of substrates, including but not limited to sapphire, silicon carbide, silicon, fused silica (using a calcium fluoride buffer layer), and spinel. Also described is a structure... Agent: Raytheon Company C/o Daly, Crowley, Mofford & Durkee, LLP

20100320477 - Process for producing silicon carbide crystals having increased minority carrier lifetimes: A process is described for producing silicon carbide crystals having increased minority carrier lifetimes. The process includes the steps of heating and slowly cooling a silicon carbide crystal having a first concentration of minority carrier recombination centers such that the resultant concentration of minority carrier recombination centers is lower than... Agent: Moore & Van Allen PLLC

20100320476 - Vertical junction field effect transistors and diodes having graded doped regions and methods of making: Semiconductor devices and methods of making the devices are described. The devices can be junction field-effect transistors (JFETs) or diodes such as junction barrier Schottky (JBS) diodes or PiN diodes. The devices have graded p-type semiconductor layers and/or regions formed by epitaxial growth. The methods do not require ion implantation.... Agent: Morris Manning Martin LLP

20100320478 - Light-emitting diode device including a current blocking region and method of making the same: A light-emitting diode device includes: a substrate; a light-emitting layered structure disposed on the substrate and including a first cladding layer, an active layer, and a second cladding layer; a first electrode; a second electrode disposed on the light-emitting layered structure; and a current blocking region provided in the light-emitting... Agent: Marsh, Fischmann & Breyfogle LLP

20100320479 - Light emitting apparatus and method for producing the same: A light emitting apparatus and a production method of the apparatus are provided that can emit light with less color unevenness at high luminance. The apparatus includes a light emitting device, a transparent member receiving incident light emitted from the device, and a covering member. The transparent member is formed... Agent: Foley And Lardner LLP Suite 500

20100320482 - Light emitting device and manufacturing method thereof: A light emitting device comprises a substrate having a plurality of light emitting elements mounted thereon; a side wall structure having a partition wall portion separating a plurality of light emitting areas that each include at least one of the light emitting elements; and encapsulating resin filled in the light... Agent: Kenealy Vaidya LLP

20100320484 - Light emitting device, electronic appliance, and method for manufacturing light emitting device: To provide a light emitting device that has a structure in which a light emitting element is sandwiched by two substrates to prevent moisture from penetrating into the light emitting element, and a method for manufacturing thereof. In addition, a gap between the two substrates can be controlled precisely. In... Agent: Fish & Richardson P.C. (dc)

20100320483 - Light-emitting diode apparatus: An LED apparatus includes a base having thermal conductivity, an insulative substrate provided on one surface of the base and including electrodes provided on a surface of the substrate, at least one base-mounting area that is an exposed part of the base, exposed within a pass-through hole provided in the... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw

20100320485 - Multi-chip packaged led light source: A light source having a lead frame, a body, and a plurality of dies, each die having an LED thereon is disclosed. The body includes a top surface, a bottom surface and a plurality of side surfaces. The lead frame includes first, second, and third sections, the first section includes... Agent: Kathy Manke Avago Technologies Limited

20100320481 - Organic electroluminescence device, display unit including the same, and method of manufacturing an organic electroluminescence device: An organic electroluminescence device includes a first electrode, an organic layer formed on the first electrode and including a light-emitting layer, an intermediate layer formed on the organic layer; and a second electrode formed on the intermediate layer and having a thickness of 6 nm or less.... Agent: K&l Gates LLP

20100320480 - Phosphor converting ir leds: The production of light of various wavelengths using IR phosphor down conversion techniques using existing LED emissions to pump sensitizer-rare earth ions that emit at other wavelengths. A sensitizer absorbs an LED chip pump emission and then transfers that energy with high quantum efficiency to dopant ions that then emits... Agent: Honeywell/dla Piper Patent Services

20100320486 - Light-emitting device array with individual cells: A light-emitting device and a method for manufacturing the light-emitting device is disclosed. Such a light-emitting device comprises a substrate, a plurality of cells disposed on the substrate, and a plurality of semiconductor dice, wherein each of the plurality of cells accommodates at least one of the plurality of dice.... Agent: Bridgelux Incorporated Attention: Legal

20100320487 - Light-emitting device array with individual cells: A light-emitting device and a method for manufacturing the light-emitting device is disclosed. Such a light-emitting device comprises a substrate, a plurality of cells disposed in the substrate, and a plurality of semiconductor dice, wherein each of the plurality of cells accommodates at least one of the plurality of dice.... Agent: Bridgelux, Inc.

20100320488 - Integrated semiconductor light-emitting device and its manufacturing method: An integrated compound semiconductor light-emitting-device capable of emitting light as a large-area plane light source. The light-emitting-device includes plural light-emitting-units formed over a substrate, the light-emitting-units having a compound semiconductor thin-film crystal layer, first and second-conductivity-type-side electrodes, a main light-extraction direction is the side of the substrate, and the first... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100320490 - Light emitting diode packaging structure: A light emitting diode (LED) packaging structure includes a base, a transparent layer, and an LED chip. The transparent layer is provided between the LED chip and the base to increase a relative distance between the LED chip and the base. With an increased relative distance between the LED chip... Agent: Wpat, PC Intellectual Property Attorneys

20100320494 - Luminance-enhancing polarising plate for an organic light-emitting element: There is provided a polarizer for organic light emitting diodes (OLED) having improved brightness. The polarizer, which comprises a linear polarizer and a ¼ retardation plate, comprises a reflective polarizer film disposed between the linear polarizer and the ¼ retardation plate and transmitting a polarized light horizontal to the transmission... Agent: Mckenna Long & Aldridge LLP

20100320492 - Red emitting siaion-based material: The invention relates to a red emitting material of the composition a(MIIN2/3)*b(MIIIN)*c(MIVN4/3)*d1CeO3/2*d2EuO*xMIVO2*yMIIIO3/2 with Cerium and Europium present in the material. This material has been found to have an increased lumen equivalent and absorption efficiency of blue light.... Agent: Philips Intellectual Property & Standards

20100320496 - Semiconductor device: A semiconductor device comprises a semiconductor layer having a semiconductor integrated circuit, which is for processing an electrical signal, on a semiconductor substrate and an optical interconnect layer for transmitting an optical signal are joined. Control of modulation of the optical signal transmitted in the optical interconnect layer is performed... Agent: Mr. Jackson Chen

20100320493 - Semiconductor light emitting device: A semiconductor light emitting device comprises a substrate for mounting at least one light emitting element, a reflective film formed on the substrate, an edge of which rises perpendicularly to a surface of the substrate, and at least one light emitting element. A decrease in a reflected luminous flux from... Agent: Holtz, Holtz, Goodman & Chick PC

20100320491 - Semiconductor light emitting device and method of fabricating the same: A semiconductor light emitting device comprises a first electrode contacting layer, a first active layer on the first electrode contacting layer, a second electrode contacting layer on the first active layer, a second active layer on the second electrode contacting layer, and a third electrode contacting layer on the second... Agent: Birch Stewart Kolasch & Birch

20100320489 - Semiconductor light emitting device with a contact formed on a textured surface: A device includes a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region. The semiconductor structure includes an n-contact region and a p-contact region. A cross section of the n-contact region comprises a plurality of first regions wherein portions of the light emitting... Agent: Philips Intellectual Property & Standards

20100320495 - White light emitting device and vehicle lamp using the same: A white light emitting device includes a semiconductor light emitting element that has a peak of an emission spectrum in a range of 370 nm to 480 nm, and at least one kind of phosphor that is excited by light emitted from the semiconductor light emitting element to emit visible... Agent: Osha Liang L.L.P.

20100320497 - Led bracket structure: The present invention relates to a new LED bracket structure and in particular to a bracket that adopts the structure in which the upper section and lower section are made of different materials, the main improvements including: the bottom of the bracket is provided with a groove for embedding and... Agent: Lee, Han-ming

20100320499 - Light emitting diode replacement lamp: Thermal management and control techniques for light emitting diode and other incandescent replacement light technologies using a current controller are disclosed.... Agent: Goodwin Procter LLP Patent Administrator

20100320498 - Light-emitting diode device: A light-emitting diode device includes: a substrate; and a semiconductor layered structure including an n-type semiconductor layer that has an exposed region, and a p-type semiconductor layer that is disposed over the n-type semiconductor layer without extending over the exposed region. An electrode unit is electrically coupled to the semiconductor... Agent: Marsh, Fischmann & Breyfogle LLP

20100320500 - Method of manufacturing a semiconductor device having an even coating thickness using electro-less plating and related device: A method of manufacturing a semiconductor device includes forming a diffusion barrier layer on a substrate, and forming at least two features on the substrate such that the diffusion barrier layer is respectively disposed between each feature and the substrate and contacts the at least two features. A first impurity... Agent: Lee & Morse, P.C.

20100320501 - Non-snapback scr for electrostatic discharge protection: An electrostatic discharge (ESD) protection device (11, 60, 80) coupled across input-output (I/O) (22) and common (23) terminals of a core circuit (24), comprises, first (70, 90) and second (72, 92) merged bipolar transistors (70, 90; 72, 92). A base (62, 82) of the first (70, 90) transistor serves as... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20100320502 - Germanium/silicon avalanche photodetector with separate absorption and multiplication regions: A semiconductor waveguide based optical receiver is disclosed. An apparatus according to aspects of the present invention includes an absorption region including a first type of semiconductor region proximate to a second type of semiconductor region. The first type of semiconductor is to absorb light in a first range of... Agent: Intel Corporation C/o Cpa Global

20100320503 - Strained channel transistor and method of fabrication thereof: The present invention relates to semiconductor integrated circuits. More particularly, but not exclusively, the invention relates to strained channel complimentary metal oxide semiconductor (CMOS) transistor structures and fabrication methods thereof. A strained channel CMOS transistor structure comprises a source stressor region comprising a source extension stressor region; and a drain... Agent: Law Offices Of Mikio Ishimaru

20100320505 - Semiconductor device and method for manufacturing the same, and amplifier: A semiconductor device includes a nitride semiconductor layer having a (0001) face and a (000-1) face, formed above a common substrate; a (0001) face forming layer provided partially between the substrate and the nitride semiconductor layer; a source electrode, a drain electrode, and a gate electrode, provided on the nitride... Agent: Kratz, Quintos & Hanson, LLP

20100320504 - Semiconductor device comprising gate electrode surrounding entire circumference of channel region and method for manufacturing the same: Two first semiconductor layers are on a silicon substrate at a given distance from each other. Two second semiconductor layers are on the respective first semiconductor layers and includes a material different from a material of the first semiconductor layers. A first channel region is formed like a wire between... Agent: Knobbe Martens Olson & Bear LLP

20100320506 - Ultra-low dislocation density group iii - nitride semiconductor substrates grown via nano- or micro-particle film: A high quality Group III-Nitride semiconductor crystal with ultra-low dislocation density is grown epitaxially on a substrate via a particle film with multiple vertically-arranged layers of spheres with innumerable micro- and/or nano-voids formed among the spheres. The spheres can be composed of a variety of materials, and in particular silica... Agent: Fenwick & West LLP

20100320507 - Electronic device, method for manufacturing the same, and silicon substrate for electronic device: An electronic device is formed by epitaxially growing a Si substrate on a Si layer of an SOI substrate in which the Si layer is deposited on a front surface of a substrate with an insulating layer interposed therebetween; forming an element on a front-surface side of the Si substrate;... Agent: Birch Stewart Kolasch & Birch

20100320508 - Horizontally depleted metal semiconductor field effect transistor: The present invention provides a horizontally depleted Metal Semiconductor Field Effect Transistor (MESPET). A drain region, a source region, and a channel region are formed in the device layer such that the drain region and the source region are spaced apart from one another and the channel region extends between... Agent: Withrow & Terranova, P.l.l.c.

20100320510 - Interfacial barrier for work function modification of high performance cmos devices: A semiconductor structure may include a semiconductor bulk region with a gate stack on the semiconductor bulk region. The source region and the drain region in the semiconductor bulk region may be located on opposing sides of a channel region below the gate stack. An interfacial layer coupled to the... Agent: Fulbright & Jaworski L.L.P.

20100320509 - Method for forming and integrating metal gate transistors having self-aligned contacts and related structure: According to one exemplary embodiment, a method for forming at least one metal gate transistor with a self-aligned source/drain contact includes forming a metal gate over a substrate. The method further includes forming a source/drain region in the substrate adjacent to the metal gate. The method also includes forming a... Agent: Farjami & Farjami LLP

20100320513 - Semiconductor device and a method of manufacturing the same: A method of manufacturing a semiconductor device (1200), the method comprising forming a sacrificial pattern having a recess on a substrate (402), filling the recess and covering the substrate and the sacrificial pattern with a semiconductor structure, forming an annular trench in the semiconductor structure to expose a portion of... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100320511 - Semiconductor device and method for manufacturing the same: A semiconductor device is fabricated by forming a semiconductor substrate as a convex shape to increase a effective channel of a transistor and by stacking a first silicon germanium layer and a first silicon layer on the semiconductor substrate to form a first layer and stacking a second silicon germanium... Agent: Ampacc Law Group

20100320512 - Semiconductor device manufacturing method and semiconductor device: Disclosed is a semiconductor device manufacturing method in which a silicon nitride film is formed to cover an n-channel transistor formed on a semiconductor substrate and to apply a tensile stress in a channel length direction to a channel of the n-channel transistor, the method includes: forming a first-layer silicon... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100320514 - Digital radiography imager with buried interconnect layer in silicon-on-glass and method of fabricating same: A method of forming an imaging array includes providing a single crystal silicon substrate having an internal separation layer, forming a patterned conductive layer proximate a first side of the single crystal silicon substrate, forming an electrically conductive layer on the first side of the single crystal silicon substrate and... Agent: Carestream Health, Inc. Attn: Patent Legal Staff

20100320515 - High sensitivity image sensors and methods of operating the same: A high sensitivity image sensor including a pixel, the pixel including a single electron field effect transistor (SEFET), the SEFET including a first conductive type well in a second conductive type substrate, second conductive type source and drain regions in the well and a first conductive type gate region in... Agent: Harness, Dickey & Pierce, P.L.C

20100320516 - Image sensor having four-transistor or five-transistor pixels with reset noise reduction: The invention relates to image sensors produced with CMOS technology, whose individual pixels, arranged in an array of rows and columns, each consist of a photodiode associated with a charge storage region which receives the photogenerated charge before a charge readout phase. To eliminate the risk of introducing kTC-type noise... Agent: Lowe Hauptman Ham & Berner, LLP

20100320517 - Solid-state imaging apparatus and method for manufacturing the same: A solid-state imaging apparatus comprises: a plurality of photoelectric conversion elements for converting light into an electric charge, including a first photoelectric conversion element; a first semiconductor region from which the electric charge is transferred from a first photoelectric conversion element; an amplifying MOS transistor including a gate electrode connected... Agent: Fitzpatrick Cella Harper & Scinto

20100320519 - Ferroelectric memory and manufacturing method thereof, and manufacturing method of ferroelectric capacitor: Provided is a ferroelectric memory including a silicon substrate, a transistor formed on the silicon substrate, and a ferroelectric capacitor formed above the transistor. The ferroelectric capacitor includes a lower electrode, a ferroelectric film formed on the lower electrode, an upper electrode formed on the ferroelectric film, and a metal... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100320518 - Semiconductor device: According to an aspect of the present invention, there is provided a semiconductor device including: a transistor including: a source, a drain and a gate; first and second plugs on the source and the drain; a third plug on the gate to have a top face higher than that of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100320520 - Dielectric, capacitor using dielectric, semiconductor device using dielectric, and manufacturing method of dielectric: To make it possible to significantly suppress the leakage current in a semiconductor device having a capacitor structure using a dielectric film. There is provided a composite oxide dielectric which is mainly composed of Zr, Al and O, and which has a composition ratio of Zr and Al in a... Agent: Sughrue Mion, PLLC

20100320521 - Semiconductor device: A semiconductor device according to an exemplary embodiment of the present invention includes a memory cell including an information storage portion including a capacitor upper electrode of a DRAM cell and a capacitor lower electrode formed below the upper electrode and an access transistor for controlling access to the information... Agent: Mcginn Intellectual Property Law Group, PLLC

20100320523 - Finned memory cells: For an embodiment, a memory array has a plurality fins protruding from a substrate. A tunnel dielectric layer overlies the fins. A plurality floating gates overlie the tunnel dielectric layer, and the floating gates correspond one-to-one with the fins protruding from the substrate. An intergate dielectric layer overlies the floating... Agent: Leffert Jay & Polglaze, P.A. Attn: Thomas W. Leffert

20100320522 - Semiconductor device: A semiconductor device includes a tunnel insulation film formed on a semiconductor substrate, a floating gate electrode formed on the tunnel insulation film, an inter-electrode insulation film formed on the floating gate electrode, a control gate electrode formed on the inter-electrode insulation film, a pair of oxide films which are... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100320524 - Semiconductor integrated circuit device and a method of manufacturing the same: A semiconductor device having a nonvolatile memory cell which includes a semiconductor substrate, a first insulating film formed over the semiconductor substrate, a control electrode formed over the first insulating film, the first insulating film acting as a gate insulator for the control gate electrode, a second insulating film formed... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100320526 - Nonvolatile semiconductor memory device and method for manufacturing same: A nonvolatile semiconductor memory device includes: a semiconductor substrate; a memory unit; and a circuit unit provided between the semiconductor substrate and the memory unit. The memory unit includes: a stacked structural unit having electrode films alternately stacked with inter-electrode-film insulating films; a semiconductor pillar piercing the stacked structural unit;... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100320527 - Nonvolatile semiconductor memory device and method for manufacturing same: A nonvolatile semiconductor memory device according to embodiment includes: a semiconductor substrate having an upper portion being partitioned into a plurality of semiconductor portions extending in a first direction; a charge storage film provided on the semiconductor portion; a word-line electrode provided on the semiconductor substrate and extending in a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100320525 - Nonvolatile semiconductor memory device and method of manufacturing nonvolatile semiconductor memory device: A nonvolatile semiconductor memory device includes: fin-shaped control gate electrodes formed on an insulating layer; and a body layer having a channel region arranged to cross the control gate electrodes and embedded in the control gate electrodes sequentially via a first insulating layer, a charge storage layer, and a second... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100320528 - Three-dimensional semiconductor memory device: In a three-dimensional semiconductor memory device, the device includes a semiconductor substrate having a recessed region, an active pattern extending in a direction transverse to the recessed region, an insulating pillar being adjacent to the active pattern and extending in the direction transverse to the recessed region, and a lower... Agent: Mills & Onello LLP

20100320529 - Integrated circuit system with high voltage transistor and method of manufacture thereof: A method of manufacture of an integrated circuit system includes: providing a semiconductor substrate having an active region, implanted with impurities of a first type at a first concentration; forming an isolation region around the active region; forming a parasitic transistor by applying a gate electrode, implanted with impurities of... Agent: Law Offices Of Mikio Ishimaru

20100320530 - Methods of making vertical junction field effect transistors and bipolar junction transistors without ion implantation and devices made therewith: Methods of making semiconductor devices such as vertical junction field effect transistors (VJFETs) or bipolar junction transistors (BJTs) are described. The methods do not require ion implantation. The VJFET device has an epitaxially regrown n-type channel layer and an epitaxially regrown p-type gate layer as well as an epitaxially grown... Agent: Morris Manning Martin LLP

20100320531 - Standing chip scale package: A standing chip scale package is disclosed. The standing chip scale package provides electrical connection to bumped device contacts on both sides of the chip. The package is coupleable to a printed circuit board in a standing configuration such that front and back sides of the bumped chip are substantially... Agent: Schein & Cai LLP James Cai

20100320532 - Trench gate mosfet and method of manufacturing the same: A Trench gate MOS field-effect transistor having a narrow, lightly doped, region extending from a channel accommodating region (3) of same conductivity type immediately adjacent the trench sidewall. The narrow region may be self-aligned to the top of a lower polysilicon shield region in the trench or may extend the... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100320533 - Insulated gate type semiconductor device and method for fabricating the same: In an insulated-gate type semiconductor device in which a gate-purpose conductive layer is embedded into a trench which is formed in a semiconductor substrate, and a source-purpose conductive layer is provided on a major surface of the semiconductor substrate, a portion of a gate pillar which is constituted by both... Agent: Miles & Stockbridge PC

20100320534 - Structure and method for forming a thick bottom dielectric (tbd) for trench-gate devices: A semiconductor structure which includes a shielded gate FET is formed as follows. A plurality of trenches is formed in a semiconductor region using a mask. The mask includes (i) a first insulating layer over a surface of the semiconductor region, (ii) a first oxidation barrier layer over the first... Agent: Townsend And Townsend And Crew, LLP

20100320535 - Transistor component having an amorphous channel control layer: Disclosed is a semiconductor component, including: a drift zone arranged between a first and a second connection zone; a channel control layer of an amorphous semi-insulating material arranged adjacent to the drift zone.... Agent: Dicke, Billig & Czaja

20100320536 - Transistor component having an amorphous semi-isolating channel control layer: Disclosed is a transistor component having a control structure with a channel control layer of an amorphous semiconductor insulating material extending in a current flow direction along a channel zone.... Agent: Dicke, Billig & Czaja

20100320537 - Semiconductor device and method of fabricating the same: Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device using a DMOS device includes: a semiconductor substrate, in which a first conductive type well is formed; a first conductive type gate electrode formed on the semiconductor substrate with a gate insulating layer intervening... Agent: Hiscock & Barclay, LLP

20100320538 - Semiconductor device: The semiconductor device according to the present invention includes an SJMOSFET having a plurality of base regions formed at an interval from each other and an SBD (Schottky Barrier Diode) having a Schottky junction between the plurality of base regions. The SBD is provided in parallel with a parasitic diode... Agent: Rabin & Berdo, PC

20100320539 - Semiconductor device with electrostatic protection device: A semiconductor device has an SOI (Silicon On Insulator) structure and comprising a P-channel FET and an N-channel FET which are formed on an insulating film. The semiconductor device includes: at least two of first, second, third and fourth PN-junction elements. The first PN-junction element is formed from a P-type... Agent: Mcginn Intellectual Property Law Group, PLLC

20100320540 - Semiconductor device structure and fabricating method thereof: A semiconductor device structure including a substrate, a resistor, and a first gate structure is provided. The substrate includes a resistor region and a metal-oxide-semiconductor (MOS) transistor region. The resistor is disposed on the substrate within the resistor region. The resistor includes a first dielectric layer, a metal layer, a... Agent: North America Intellectual Property Corporation

20100320541 - Method for fabricating asymmetric double-gate transistors by which asymmetric and symmetric double-gate transistors can be made on the same substrate: A method for fabricating a microelectronic device with one or plural asymmetric double-gate transistors, including: a) forming one or plural structures on a substrate including at least a first semiconducting block configured to form a first gate of a double-gate transistor, and at least a second semiconducting block configured to... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100320542 - Semiconductor device and manufacturing method thereof: To improve the performance of a CMISFET having a high-k gate insulating film and a metal gate electrode. An n-channel MISFET has, over the surface of a p-type well of a semiconductor substrate, a gate electrode formed via a first Hf-containing insulating film serving as a gate insulating film, while... Agent: Mcdermott Will & Emery LLP

20100320543 - Semiconductor device and its manufacturing method: A semiconductor device manufacturing method includes, forming isolation region having an aspect ratio of 1 or more in a semiconductor substrate, forming a gate insulating film, forming a silicon gate electrode and a silicon resistive element, forming side wall spacers on the gate electrode, heavily doping a first active region... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100320544 - Metal gate transistor and resistor and method for fabricating the same: A method for fabricating metal gate transistor and resistor is disclosed. The method includes the steps of: providing a substrate having a transistor region and a resistor region; forming a shallow trench isolation in the substrate of the resistor region; forming a tank in the shallow trench isolation of the... Agent: North America Intellectual Property Corporation

20100320545 - Planar and non-planar cmos devices with multiple tuned threshold voltages: A semiconductor structure is provided that includes a first device region including a first threshold voltage adjusting layer located atop a semiconductor substrate, a gate dielectric located atop the first threshold voltage adjusting layer, and a gate conductor located atop the gate dielectric. The structure further includes a second device... Agent: Scully, Scott, Murphy & Presser, P.C.

20100320546 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a MOS transistor, a source electrode and a drain electrode on the MOS transistor each include a first carbon doped silicon layer including carbon at a first carbon concentration and phosphorus at a first phosphorus concentration and a second carbon doped silicon layer over the first... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100320547 - Scavanging metal stack for a high-k gate dielectric: A stack of a high-k gate dielectric and a metal gate structure includes a lower metal layer, a scavenging metal layer, and an upper metal layer. The scavenging metal layer meets the following two criteria 1) a metal (M) for which the Gibbs free energy change of the reaction Si+2/y... Agent: Scully, Scott, Murphy & Presser, P.C.

20100320548 - Silicon-rich nitride etch stop layer for vapor hf etching in mems device fabrication: A thin silicon-rich nitride film (e.g., having a thickness in the range of around 100A to 10000A) deposited using low-pressure chemical vapor deposition (LPCVD) is used for etch stop during vapor HF etching in various MEMS wafer fabrication processes and devices. The LPCVD silicon-rich nitride film may replace, or be... Agent: Sunstein Kann Murphy & Timbers LLP

20100320549 - Methods and apparatuses for integrated packaging of microelectromechanical devices: Microelectromechanical systems (MEMS) packages, packaged MEMS devices, and methods for making the same are disclosed. The method may include forming a chamber sacrificial layer above an insulating layer that is coupled to a wafer. The method further may include forming a packaging layer above the chamber sacrificial layer. The method... Agent: Fulbright & Jaworski L.L.P.

20100320551 - Magnetoresistive random access memory with improved layout design and process thereof: A MRAM memory and process thereof is described. A GMR magnetic layer is patterned to form a memory bit layer and an intermediate conductive layer. The intermediate conductive layer is disposed between two conductive layers such that shallow metal plugs can be utilized to interconnect the intermediate conductive layer and... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100320550 - Spin-torque magnetoresistive structures with bilayer free layer: Magnetoresistive structures, devices, memories, and methods for forming the same are presented. For example, a magnetoresistive structure includes a ferromagnetic layer, a ferrimagnetic layer coupled to the ferromagnetic layer, a pinned layer and a nonmagnetic spacer layer. A free side of the magnetoresistive structure comprises the ferromagnetic layer and the... Agent: Ryan, Mason & Lewis, LLP

20100320552 - Cmos image sensor: The present invention discloses a CMOS image sensor comprising: a substrate; a photo diode formed in the substrate; an interconnection formed on the substrate, wherein the portions of the interconnection are insulated from one another by a dielectric material; a light passage penetrating through at least part of the dielectric... Agent: Tung & Associates / Randy W. Tung, Esq.

20100320553 - Illuminated finger sensor assembly and related methods: A finger sensor assembly may include a circuit board and an integrated circuit (IC) finger sensor grid array package including a grid array on a lower end thereof mounted to the circuit board, and a finger sensing area on an upper end thereof. The finger sensor assembly may further include... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.

20100320554 - Method of manufacturing solid state imaging device, and solid state imaging device: Disclosed herein is a method of manufacturing a solid state imaging device, including the steps of: forming a light receiving portion in a light receiving area of a semiconductor substrate; forming a pad portion in a pad area of the semiconductor substrate; forming a microlens material layer over the light... Agent: Snr Denton US LLP

20100320555 - Controlling electromechanical behavior of structures within a microelectromechanical systems device: In one embodiment, the invention provides a method for fabricating a microelectromechanical systems device. The method comprises fabricating a first layer comprising a film having a characteristic electromechanical response, and a characteristic optical response, wherein the characteristic optical response is desirable and the characteristic electromechanical response is undesirable; and modifying... Agent: Knobbe, Martens, Olson & Bear, LLP

20100320556 - Continuous large area imaging and display arrays using readout arrays fabricated in silicon-on-glass substrates: A vertically-integrated image sensor is proposed with the performance characteristics of single crystal silicon but with the area coverage and cost of arrays fabricated on glass. The image sensor can include a backplane array having readout elements implemented in silicon-on-glass, a frontplane array of photosensitive elements vertically integrated above the... Agent: Carestream Health, Inc. Attn: Patent Legal Staff

20100320557 - Semiconductor device: Provided is a semiconductor device having an anode of a Si-FRD and a cathode of a Si-SBD which are serially connected. The Si-SBD has a junction capacitance whose amount of accumulable charge is equal to or more than an amount of charge occurring at the time of reverse recovery of... Agent: Morrison & Foerster LLP

20100320558 - Circuit layout structure and method to scale down ic layout: A circuit layout structure includes a substrate including a first region and a second region, and a set of conductive lines including a first conductive line and a second conductive line which respectively pass through the first region and the second region, wherein a variable spacing lies between the first... Agent: North America Intellectual Property Corporation

20100320560 - Metallic bump structure without under bump metallurgy and a manufacturing method thereof: The metallic bump is directly formed on a semiconductor wafer's I/O pad without UBM. First, a zinc layer is formed on the I/O pad or an anti-oxidation layer of the I/O pad is selectively etched off. Then, an isolative layer and a copper foil are arranged sequentially in this order... Agent: Lin & Associates Intellectual Property, Inc.

20100320559 - Semiconductor device including independent active layers and method for fabricating the same: A semiconductor device includes a semiconductor substrate of n-type silicon including, in an upper portion thereof, a first polarity inversion region and a second polarity inversion regions spaced from each other and doped with a p-type impurity. A first HFET including a first active layer and a second HFET including... Agent: Mcdermott Will & Emery LLP

20100320563 - Electronic fuses in semiconductor integrated circuits: A structure. The structure includes: a substrate; a first electrode in the substrate; a dielectric layer on top of the substrate and the electrode; a second dielectric layer on the first dielectric layer, said second dielectric layer comprising a second dielectric material; a fuse element buried in the first dielectric... Agent: Schmeiser, Olsen & Watts

20100320561 - Method for forming a one-time programmable metal fuse and related structure: According to one exemplary embodiment, a method for forming a one-time programmable metal fuse structure includes forming a metal fuse structure over a substrate, the metal fuse structure including a gate metal segment situated between a dielectric segment and a polysilicon segment, a gate metal fuse being formed in a... Agent: Farjami & Farjami LLP

20100320564 - Nanowire memory device and method of manufacturing the same: A nanowire memory device and a method of manufacturing the same are provided. A memory device includes: a substrate; a first electrode formed on the substrate; a first nanowire extending from an end of the first electrode; a second electrode formed over the first electrode to overlap the first electrode;... Agent: Sughrue Mion, PLLC

20100320562 - Semiconductor device: A plurality of projecting portions 10f are formed in the position shifted from the middle position of electric fuse part 10a, and, more concretely, are formed in the position distant from via 10e and near via 10d. A plurality of projecting portions 20f are formed in the position shifted from... Agent: Miles & Stockbridge PC

20100320565 - Wafer and method for improving yield rate of wafer: A wafer and a method for improving the yield rate of the wafer are provided. The wafer includes a first and a second circuit units, a first and a second through silicon vias (TSVs), and a first spare TSV. The first and the second circuit units are disposed inside the... Agent: Jianq Chyun Intellectual Property Office

20100320567 - Integrated circuit comprising a capacitor with metal electrodes and process for fabrcating such a capacitor: An integrated circuit (IC) includes at least one capacitor with metal electrodes. At least one of the electrodes (10 or 30) is formed from at least surface-silicided hemispherical grain silicon or silicon alloy. A fabrication process for obtaining such a capacitor with silicided metal electrodes is also provided.... Agent: Fleit Gibbons Gutman Bongini & Bianco P.l.

20100320566 - Semiconductor constructions: The invention includes semiconductor constructions, and also includes methods of forming pluralities of capacitor devices. An exemplary method of the invention includes forming conductive storage node material within openings in an insulative material to form conductive containers. A retaining structure lattice is formed in physical contact with at least some... Agent: Wells St. John P.s.

20100320568 - Semiconductor device, rf-ic and manufacturing method of the same: Provided is a technology capable of reducing parasitic capacitance of a capacitor while reducing the space occupied by the capacitor. A stacked structure is obtained by forming, over a capacitor composed of a lower electrode, a capacitor insulating film and an intermediate electrode, another capacitor composed of the intermediate electrode,... Agent: Mattingly & Malur, P.C.

20100320569 - Carbon nanotube resistor, semiconductor device, and manufacturing method thereof: A process for producing a carbon nanotube resistor that is capable of providing a highly reliable resistor or fuse. The process comprises the step of introducing a carbon nanotube in a volatile solvent to a first concentration and conducting ultrasonic treatment thereof to thereby obtain an initial solution; the dilution... Agent: Mr. Jackson Chen

20100320570 - Semiconductor device: The present invention includes a memory cell area that includes a plurality of transistors, and a core area that is arranged adjacent to the memory cell area. The memory cell area and the core area include a semiconductor layer, and an n-type well region and a first p-type well region... Agent: Foley And Lardner LLP Suite 500

20100320571 - Bipolar transistor structure and method including emitter-base interface impurity: A bipolar transistor structure and a method for fabricating the bipolar transistor structure include: (1) a collector structure located at least in-part within a semiconductor substrate; (2) a base structure contacting the collector structure; and (3) an emitter structure contacting the base structure. The interface of the emitter structure and... Agent: Scully, Scott, Murphy & Presser, P.C.

20100320572 - Thin-body bipolar device: A thin-body bipolar device includes: a semiconductor substrate, a semiconductor fin constructed over the semiconductor substrate, a first region of the semiconductor fin having a first conductivity type, the first region serving as a base of the thin-body bipolar device, and a second and third region of the semiconductor fin... Agent: K&l Gates LLPIPDocketing

20100320573 - Organosilane polymers, hardmask compositions including the same and methods of producing semiconductor devices using organosilane hardmask compositions: wherein R6, R7 and R8 may each independently an alkyl group or an aryl group; and R9 may be an alkyl group. Also provided are hardmask compositions including an organosilane compound according to an embodiment of the invention, or a hydrolysis product thereof. Methods of producing semiconductor devices using a... Agent: Myers Bigel Sibley & Sajovec

20100320574 - Semiconductor device and method of fabricating the same: A method of forming a semiconductor device includes forming a first chip region, a second chip region, and a scribe lane region between the first and second chip regions in a wafer, the wafer having a first surface and a second surface facing the first surface, and forming a penetrating... Agent: F. Chau & Associates, LLC

20100320575 - Thru silicon enabled die stacking scheme: A die to die bonding system and method includes an upper die having a front side, a back side, and a fully filled thru silicon via, a portion of the fully filled thru silicon via protruding from the back side of the upper die. A lower die includes a front... Agent: Texas Instruments Incorporated

20100320576 - Die-warpage compensation structures for thinned-die devices, and methods of assembling same: A back-side lamination (BSL) is applied after thinning a microelectronic die. The BSL is configured to be a thermal-expansion complementary structure to a metal wiring interconnect layout that is disposed on the active side of the microelectronic die.... Agent: Intel Corporation C/o Cpa Global

20100320577 - Semiconductor device and method of forming a shielding layer over a semiconductor die after forming a build-up interconnect structure: A semiconductor device is made by forming an interconnect structure over a substrate. A semiconductor die is mounted to the interconnect structure. The semiconductor die is electrically connected to the interconnect structure. A ground pad is formed over the interconnect structure. An encapsulant is formed over the semiconductor die and... Agent: Robert D. Atkins

20100320578 - Packaged ic device comprising an embedded flex circuit, and methods of making the same: A device is disclosed which includes a flexible material including at least one conductive wiring trace, a first die including at least an integrated circuit, the first die being positioned above a portion of the flexible material, and an encapsulant material that covers the first die and at least a... Agent: Perkins Coie LLP Patent-sea

20100320580 - Equipotential pad connection: A conduction member is used to connect in-chip equipotential pads 20 that have the same potential in a semiconductor device through PKG ball 10 arranged on the semiconductor device.... Agent: Foley And Lardner LLP Suite 500

20100320579 - Metallic leadframes having laser-treated surfaces for improved adhesion to polymeric compounds: A leadframe for the assembly of a semiconductor chip has regions (112) with an original smooth surface of glossy appearance and regions (113, 114, 210) of a frosty appearance with rough surface contours. The regions of rough surface contours include two-dimensional arrays of spots (401) comprising a central area (402)... Agent: Texas Instruments Incorporated

20100320581 - Semiconductor device: The invention provides a semiconductor device including a rectangular chip provided on a mounting region of a substrate, a liquid resin layer provided under the rectangular chip and on a side surface of the chip, and a plurality of dams formed on the substrate so as to extend along the... Agent: Rabin & Berdo, P.C.

20100320583 - Integrated circuit packaging system with a dual substrate package and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a base substrate having a base conductive material on opposite sides of the base substrate; connecting an internal interconnect having a substantially spherical shape on the base substrate; forming a top substrate having a top conductive material on... Agent: Law Offices Of Mikio Ishimaru

20100320582 - Integrated circuit packaging system with inward and outward interconnects and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a base circuit assembly having an integrated circuit device; mounting a pre-formed conductive frame having an outer interconnect and an inner interconnect shorter than the outer interconnect over the base circuit assembly, the inner interconnect over the integrated... Agent: Law Offices Of Mikio Ishimaru

20100320585 - Packaged integrated circuit devices with through-body conductive vias, and methods of making same: A device is disclosed which includes at least one integrated circuit die, at least a portion of which is positioned in a body of encapsulant material, and at least one conductive via extending through the body of encapsulant material.... Agent: Perkins Coie LLP Patent-sea

20100320584 - Semiconductor chip laminated body: A semiconductor chip laminated body includes a wiring board having a connecting terminal; a plurality of semiconductor chips laminated on the wiring board, each of the semiconductor chips having a pad; conductive connecting members having first end parts connected to the pads of the corresponding semiconductor chips and second end... Agent: Ipusa, P.l.l.c

20100320586 - Integrated circuit packaging system with stacked integrated circuit and method of manufacture thereof: A method of manufacture an integrated circuit packaging system includes: providing a substrate; attaching a base component to the substrate by a first interconnect; attaching a stack component connected by a second interconnect to the substrate and partially over the base component, the second interconnect different from the first interconnect;... Agent: Law Offices Of Mikio Ishimaru

20100320587 - Integrated circuit packaging system with underfill and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a device having a conductor with ends exposed on opposite sides of the device; forming a first surface depression on the device around the conductor; connecting a first component over the conductor and surrounded by the first surface... Agent: Law Offices Of Mikio Ishimaru

20100320588 - Semiconductor device and method of forming prefabricated heat spreader frame with embedded semiconductor die: A semiconductor device is made by mounting a prefabricated heat spreader frame over a temporary substrate. The heat spreader frame includes vertical bodies over a flat plate. A semiconductor die is mounted to the heat spreader frame for thermal dissipation. An encapsulant is deposited around the vertical bodies and semiconductor... Agent: Robert D. Atkins

20100320590 - Integrated circuit packaging system with a leadframe having radial-segments and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing inwardly converging leadfingers having continuously decreasing widths along lengths thereof to inward ends thereof; electrically connecting an integrated circuit device on the leadfingers only on portions of the continuously decreasing widths; and encapsulating the integrated circuit device and... Agent: Law Offices Of Mikio Ishimaru

20100320589 - Integrated circuit packaging system with bumps and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a base strip having a base top side; forming a terminal body with a substantially spherical shape partially in the base strip; attaching a device adjacent the terminal body and over the base top side, a device mount... Agent: Law Offices Of Mikio Ishimaru

20100320591 - Integrated circuit packaging system with contact pads and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: attaching contact pads to a base structure; connecting a base die to the base structure; connecting a supporting die over the base die by conductive balls to the contact pads on two sides of the base die; encapsulating the... Agent: Law Offices Of Mikio Ishimaru

20100320592 - Semiconductor device and method for manufacturing the same: A semiconductor device in which overall thickness is reduced by suppressing the rising of a metal thin line and connection reliability is enhanced at the joint of metal thin line and other member during resin sealing. A method for manufacturing such semiconductor device is also provided. The semiconductor device (10A)... Agent: Morrison & Foerster LLP

20100320593 - Chip package structure and manufacturing methods thereof: A chip package structure includes a chip module, a plurality of pre-patterned structures, a filling material layer, and a redistribution layer. The chip module includes a chip including an upper surface, a side surface, and an active surface. The pre-patterned structures are disposed around the chip. Each of the pre-patterned... Agent: Cooley LLP Attn: Patent Group

20100320594 - Semiconductor device with reinforcement plate and method of forming same: A semiconductor device includes a reinforcement plate having an accommodating hole and a through hole extending from a first surface to a second surface, a semiconductor chip including a chip core and a pad formed on a pad surface of the chip core, the semiconductor chip disposed in the accommodating... Agent: Ipusa, P.l.l.c

20100320595 - Hybrid hermetic interface chip: A hermetically sealed MEMS device package comprises a MEMS device platform, a hermetic interface chip, and an outer seal ring. The MEMS device platform includes a MEMS device surrounded by a continuous outer boundary wall with a top surface. The hermetic interface chip includes a glass substrate and at least... Agent: Honeywell/fogg Patent Services

20100320599 - Die stacking apparatus and method: Various stacked semiconductor devices and methods of making the same are provided. In one aspect, a method of manufacturing is provided that includes providing a first semiconductor die that has a first bulk semiconductor side and a first opposite side. A second semiconductor die is provided that has a second... Agent: Timothy M Honeycutt Attorney At Law

20100320596 - Method for fabricating semiconductor package and semiconductor package using the same: Provided is a method for fabricating semiconductor package and a semiconductor package fabricated using the same. The method for fabricating semiconductor package dopes a mixture including the polymer material and the solder particle on the substrate in which the terminal is formed and applies heat, and thus the solder particle... Agent: Rabin & Berdo, PC

20100320598 - Semiconductor device and fabrication method thereof: A semiconductor device includes a stacked chip structure provided on a board and made up of semiconductor chips that are stacked via insulators. Each semiconductor chip has an integrated circuit surface, pads provided on the integrated circuit surface, and conductive connecting members having a wave shape with first ends electrically... Agent: Ipusa, P.l.l.c

20100320600 - Surface depressions for die-to-die interconnects and associated systems and methods: Stacked microelectronic dies employing die-to-die interconnects and associated systems and methods are disclosed herein. In one embodiment, a stacked system of microelectronic dies includes a first microelectronic die, a second microelectronic die attached to the first die, and a die-to-die interconnect electrically coupling the first die with the second die.... Agent: Perkins Coie LLP Patent-sea

20100320597 - Wafer level stack structure for system-in-package and method thereof: A system-in-package, comprising a wafer level stack structure, including at least one first device chip including a first device region having a plurality of input/output(I/O) pads, and at least one second device chip including a second device region having a plurality of input/output(I/O) pads and a second peripheral region surrounding... Agent: Harness, Dickey & Pierce, P.L.C

20100320602 - High-speed memory package: The semiconductor package includes a dielectric layer, a trace layer, a conductive layer, a die and an underfill layer. The dielectric layer has first side and an opposing dielectric layer second side. Multiple vias extend through the dielectric layer from the dielectric layer first side to the dielectric layer second... Agent: Morgan Lewis & Bockius LLP/rambus Inc.

20100320603 - Integrated circuit package system with redistribution layer and method for manufacturing thereof: A method for manufacturing an integrated circuit package system includes: providing a base device; attaching a base interconnect to the base device; applying an encapsulant over the base device and the base interconnect; and forming a re-routing film over the encapsulant, the base device, and the base interconnect for connectivity... Agent: Law Offices Of Mikio Ishimaru

20100320601 - Integrated circuit packaging system with through via die having pedestal and recess and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a structure having a via filled with conductive material completely through the structure, a recess, and a pedestal portion bordering the recess; mounting a semiconductor device inside the recess in the structure; and encapsulating the structure and the... Agent: Law Offices Of Mikio Ishimaru

20100320604 - Application of mn for damage restoration after etchback: Back end of line interconnect structures and methods of making a back end of line interconnect structure are provided. The back end of line interconnect structure contains a first interconnect layer containing a first conductive feature and a first dielectric layer; a first cap layer over the first interconnect layer,... Agent: Turocy & Watson, LLP

20100320607 - Interconnect structures with a metal nitride diffusion barrier containing ruthenium: A method for forming an interconnect structure for copper metallization and an interconnect structure containing a metal nitride diffusion barrier are described. The method includes providing a substrate having a micro-feature opening formed within a dielectric material and forming a metal nitride diffusion barrier containing ruthenium, nitrogen, and a nitride-forming... Agent: Wood, Herron & Evans, LLP (tokyo Electron)

20100320606 - Method for forming mems devices having low contact resistance and devices obtained thereof: The present disclosure proposes a method for manufacturing in a MEMS device a low-resistance contact between a silicon-germanium layer and a layer contacted by this silicon-germanium layer, such as a CMOS metal layer or another silicon-germanium layer, through an opening in a dielectric layer stack separating both layers. An interlayer... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20100320605 - Semiconductor device and method of fabricating the same: Provided are a semiconductor device and a method of fabricating the semiconductor memory device. A contact plug is formed by wet etching. An aspect ratio of SAC is decreased and SAC fail is reduced so that a process margin is secured. The semiconductor device includes a semiconductor substrate comprising an... Agent: Ampacc Law Group

20100320608 - Semiconductor substrate contact via: Edges of a first conductive layer (104) and a silicate glass layer (106) extend adjacent one another along a via (164) extending to a semiconductor substrate (41). An electrical conductor (112/114) extends through the via (164) into contact with the semiconductor substrate (41).... Agent: Hewlett-packard Company Intellectual Property Administration

20100320613 - Integrated circuit arrangement with an auxiliary indentation, particularly with aligning marks: An integrated circuit arrangement is disclosed having a wiring indentation and an auxiliary indentation in a dielectric layer. The wiring indentation contains a metal through which current flows during operation of the circuit arrangement. The auxiliary indentation contains a metal through which an electric current does not flow during operation... Agent: Brinks Hofer Gilson & Lione/infineon Infineon

20100320611 - Method for manufacturing a semiconductor device, semiconductor chip and semiconductor wafer: A method for manufacturing a semiconductor device includes forming a semiconductor wafer including a plurality of interconnect layers, the semiconductor wafer including: a plurality of chip-composing portions; a dicing region separating the chip-composing portions from each other; and a plurality of inter-chip interconnects electrically connecting adjacent ones of the chip-composing... Agent: Mcginn Intellectual Property Law Group, PLLC

20100320612 - Method for manufacturing semiconductor device, semiconductor chip, and semiconductor wafer: A method for manufacturing a semiconductor device includes forming a semiconductor wafer including a plurality of interconnect layers, the semiconductor wafer including: a plurality of chip-composing portions; a dicing region separating the chip-composing portions from each other; and a plurality of inter-chip interconnects formed in the dicing region and electrically... Agent: Mcginn Intellectual Property Law Group, PLLC

20100320615 - Semiconductor device and method for manufacturing the same: A method for manufacturing a semiconductor device, includes: mounting a semiconductor chip having an electrode on a wiring substrate having a base substrate and a wiring formed on the base substrate; forming a eutectic alloy by contacting the wiring with the electrode and by heating and pressurizing, and; forming the... Agent: Harness, Dickey & Pierce, P.L.C

20100320614 - Semiconductor package and production method thereof, and semiconductor device: A semiconductor package production method includes the step of die-cutting part of a lead side portion of a seal formed by molding and dam bars using a pedestal and punch. The pedestal has an outer surface at a position retreating from a side surface of an upper seal portion as... Agent: Mcdermott Will & Emery LLP

20100320610 - Semiconductor package with substrate having single metal layer and manufacturing methods thereof: A semiconductor package includes a substrate, a die, and a package body. The substrate includes: (a) a core including a resin reinforced with fibers; (b) a plurality of openings extending through the core; (c) a dielectric layer; and (d) a single conductive layer disposed between the dielectric layer and the... Agent: Cooley LLP Attn: Patent Group

20100320609 - Wetting pretreatment for enhanced damascene metal filling: Disclosed are pre-wetting apparatus designs and methods. These apparatus designs and methods are used to pre-wet a wafer prior to plating a metal on the surface of the wafer. Disclosed compositions of the pre-wetting fluid prevent corrosion of a seed layer on the wafer and also improve the filling rates... Agent: Weaver Austin Villeneuve & Sampson LLP - Novl Attn.: Novellus Systems, Inc.

20100320618 - Interconnection substrate, semiconductor device, and production method of semiconductor device: s

20100320617 - Methods to mitigate plasma damage in organosilicate dielectrics using a protective sidewall spacer: Plasma damage in ultra low k dielectric materials during formation of a dual damascene metal interconnect structure is reduced by providing a protective spacer on sidewalls of a line trench. A densified trench bottom region may be additionally formed directly beneath an exposed horizontal surface of the line trench. The... Agent: Scully, Scott, Murphy & Presser, P.C.

20100320616 - Semiconductor device and method of manufacturing the same: A method of manufacturing a semiconductor device comprises forming an insulating layer on a semiconductor substrate, etching the insulating layer to form contact regions, forming a conductive layer on an entire surface including the contact regions, and spiking the conductive layer in the semiconductor substrate.... Agent: Ampacc Law Group

20100320620 - Adhesive film for semiconductor and semiconductor device using the adhesive film: m

20100320621 - Integrated circuit package-in-package system with side-by-side and offset stacking and method for manufacturing thereof: A method for manufacturing of an integrated circuit package-in-package system includes: mounting a first integrated circuit device over a substrate; mounting an integrated circuit package system having an inner encapsulation over the first integrated circuit device with a first offset; mounting a second integrated circuit device over the first integrated... Agent: Law Offices Of Mikio Ishimaru

20100320619 - Integrated circuit packaging system with interposer and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: attaching a lower integrated circuit, having a first through via, over a substrate with the first through via coupled to the substrate; mounting a pre-formed interposer, having an interposer through via and an integrated passive device, over the lower... Agent: Law Offices Of Mikio Ishimaru

20100320622 - Electronic component built-in wiring substrate and method of manufacturing the same: In an electronic component built-in wiring substrate, an electronic component is mounted on a first wiring substrate. A second wiring substrate is stacked on the first wiring substrate and is connected electrically to the first wiring substrate by connection terminals. The second wiring substrate has an opening portion of a... Agent: Rankin, Hill & Clark LLP

20100320623 - Semiconductor device and method for manufacturing the same: A multi-pin semiconductor device with improved reliability. In a multi-pin BGA, a plurality of wires for electrically coupling a semiconductor chip and a wiring substrate include a plurality of short and thin first wires located in an inner position and a plurality of second wires longer and thicker than the... Agent: Mcdermott Will & Emery LLP

20100320624 - Die package including encapsulated die and method of manufacturing the same: Disclosed herein is a die package including an encapsulated die, including: a die including pads on one side thereof; an encapsulation layer covering lateral sides of the die; a support layer covering the encapsulation layer and one side of the die; a passivation layer formed on the other side of... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100314599 - Chalcogenide film and method of manufacturing same: A chalcogenide film of the invention is formed by a sputtering within a contact hole formed in an insulating layer on a substrate, and is made of a chalcogen compound including a melting-point lowering material that lowers a melting point.... Agent: Grossman, Tucker, Perreault & Pfleger, PLLC

20100314600 - Memory units and related semiconductor devices including nanowires: Methods of fabricating a memory unit are provided including forming a plurality of first nanowire structures, each of which includes a first nanowire extending in a first direction parallel to the first substrate and a first electrode layer enclosing the first nanowire, on a first substrate. The first electrode layers... Agent: Myers Bigel Sibley & Sajovec

20100314598 - Phase change memory device having bit-line discharge block and method of fabricating the same: A phase change memory device capable of fully discharging bit lines, even while occupying a relatively small area, and a fabricating method thereof are presented. The phase change memory device includes a semiconductor substrate, a word line area, a discharge line area, a switching PN diode, a dummy PN diode,... Agent: Ladas & Parry LLP

20100314602 - Nonvolatile memory device and method for manufacturing same: A nonvolatile memory device includes: a first conductive layer; a second conductive layer; a first resistance change layer provided between the first conductive layer and the second conductive layer and having an electrical resistance changing with at least one of an applied electric field and a passed current; and a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100314601 - Phase change memory having stabilized microstructure and manufacturing method: A memory device having a phase change material element with a modified stoichiometry in the active region does not exhibit drift in set state resistance. A method for manufacturing the memory device includes first manufacturing an integrated circuit including an array of phase change memory cells with bodies of phase... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20100314603 - Electronic and optoelectronic devices with quantum dot films: Optical and optoelectronic devices and methods of making same. Under one aspect, an optical device includes an integrated circuit an array of conductive regions; and an optically sensitive material over at least a portion of the integrated circuit and in electrical communication with at least one conductive region of the... Agent: Schwegman, Lundberg & Woessner, P.A.

20100314604 - Gate-all-around type semiconductor device and method of manufacturing the same: The gate-all-around (GAA) type semiconductor device may include source/drain layers, a nanowire channel, a gate electrode and an insulation layer pattern. The source/drain layers may be disposed at a distance in a first direction on a semiconductor substrate. The nanowire channel may connect the source/drain layers. The gate electrode may... Agent: Harness, Dickey & Pierce, P.L.C

20100314607 - Diode having vertical structure and method of manufacturing the same: A light emitting diode includes a conductive layer, an n-GaN layer on the conductive layer, an active layer on the n-GaN layer, a p-GaN layer on the active layer, and a p-electrode on the p-GaN layer. The conductive layer is an n-electrode.... Agent: Mckenna Long & Aldridge LLP

20100314606 - Light-emitting device: A light-emitting device is disclosed, including a light-emitting element and a surface plasmon coupling element, having an intermediary layer connected to the light-emitting element and a metal structure on the intermediary layer, wherein the intermediary layer is conductive under low-frequency injection current and has the characteristics as dielectric material in... Agent: Quintero Law Office, PC

20100314605 - Vertical deep ultraviolet light emitting diodes: The invention is a vertical geometry light emitting diode capable of emitting light in the electromagnetic spectrum having a substrate, a lift-off layer, a strain relieved superlattice layer, a first doped layer, a multilayer quantum wells comprising alternating layers quantum wells and barrier layers, a second doped layer, a third... Agent: Nexsen Pruet, LLC

20100314608 - Photodetectors: Implementations of quantum well photodetectors are provided.... Agent: Knobbe Martens Olson & Bear LLP

20100314610 - Hemt with improved quantum confinement of electrons: A HEMT with improved electron confinement is formed by removing semiconductor cap material between the channel and the source and drain regions. The source and drain regions can be isolated from the gate region by an insulating layer. Significant noise reduction can be achieved as a result of these techniques.... Agent: Wolf Greenfield & Sacks, P.C.

20100314609 - Nanowire memory: Provided is a nanowire memory including a source and a drain corresponding to the source, and a nano channel formed to connect the source to the drain. Here, the nano channel includes a nanowire electrically connecting the source to the drain according to voltages of the source and drain, and... Agent: Rabin & Berdo, PC

20100314615 - Aromatic amine derivative and organic electroluminescent device using the same: Provided are: an aromatic amine derivative in which a terminal substituent such as a dibenzofuran ring or a dibenzothiophene ring is bonded to a nitrogen atom directly or through an arylene group or the like; an organic electroluminescence device including an organic thin film layer formed of one or more... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100314611 - Electrode covering material, electrode structure and semiconductor device: A semiconductor device is provided and includes a field effect transistor having a gate electrode, a gate insulating layer, a channel forming region composed of an organic semiconductor material layer and a source/drain electrode made of a metal. A portion of the source/drain electrode in contact with the organic semiconductor... Agent: K&l Gates LLP

20100314616 - Organic el display apparatus: A display apparatus comprises a display unit which has a plurality of organic EL elements two-dimensionally arranged to define pixels. Each organic EL element comprises a first electrode, an organic EL layer, and a second electrode laminated in order on an optically transparent substrate. One of the first electrode and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100314613 - Organic electroluminescence element: To provide an organic electroluminescence element, containing: at least one pair of electrodes; at least one organic light-emitting layer disposed between the electrodes, the organic light-emitting layer comprising two phosphorescent light-emitting materials and a charge-transporting material, wherein the organic light-emitting element is a white organic light-emitting element, and the charge-transporting... Agent: Sughrue Mion, PLLC

20100314614 - Organic thin film transistors, active matrix organic optical devices and methods of making the same: A method of manufacturing an organic thin film transistor, comprising: providing a substrate comprising source and drain electrodes defining a channel region; subjecting at least the channel region to a cleaning treatment step; and depositing organic semiconductive material from solution into the channel region by inkjet printing.... Agent: Marshall, Gerstein & Borun LLP

20100314612 - White organic light-emitting device: A white organic light-emitting device is provided by the present invention. The white organic light-emitting device includes an anode, a hole transport layer, a first light-emitting layer, a second light-emitting layer, a third light-emitting layer, an electron transport layer and a cathode, wherein the second light-emitting layer is formed between... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100314618 - Thin film transistor, method of producing the same, eletctrooptic apparatus, and sensor: A thin film transistor includes: a substrate; and, on the substrate, an oxide semiconductor film which serves as an active layer and contains In, Ga, and Zn, a gate electrode, a gate insulating film, a source electrode, and a drain electrode, wherein, when a molar ratio of In, Ga, and... Agent: Solaris Intellectual Property Group, PLLC

20100314617 - Vanadium dioxide nanowire, fabrication process thereof, and nanowire device using vanadium dioxide nanowire: A vanadium dioxide nanowire grown long and thin along a [110] direction is disclosed.... Agent: Snr Denton US LLP

20100314620 - Semiconductor device: To suppress or prevent the generation of a crack in an insulating film below an external terminal which could be caused by an external force added to the external terminal of a semiconductor device. A top wiring layer MH of wiring layers formed on a main surface of a silicon... Agent: Miles & Stockbridge PC

20100314619 - Test structures and methods for semiconductor devices: Test structures for semiconductor devices, methods of forming test structures, semiconductor devices, methods of manufacturing thereof, and testing methods for semiconductor devices are disclosed. In one embodiment, a test structure for a semiconductor device includes at least one first contact pad disposed in a first material layer in a scribe... Agent: Slater & Matsil, L.L.P.

20100314621 - Method of manufacturing electronic apparatus and electronic apparatus: An electronic apparatus having a substrate with a bottom gate p-channel type thin film transistor; a resist pattern over the substrate; and a light shielding film operative to block light having a wavelength shorter than 260 nm over at least a channel part of said thin film transistor.... Agent: Snr Denton US LLP

20100314622 - Pixel structure and method of making the same: A pixel structure uses a pixel electrode made of transparent conductive material to electrically connect a data line and a source electrode of a switching element of the adjacent sub-pixel region so that a plurality of sub-pixels can share the same data line. Consequently, the number of data lines can... Agent: North America Intellectual Property Corporation

20100314623 - Tft array substrate and method for fabricating the same: A four-mask process thin film transistor (TFT) array substrate and a method for fabricating the same is disclosed, which prevents a semiconductor tail from being formed. An open area is thus obtained and wavy noise is prevented from occurring. The method of fabricating a TFT array substrate comprises: forming a... Agent: Mckenna Long & Aldridge LLP

20100314624 - Nonvolatile semiconductor memory device: The invention relates to a nonvolatile semiconductor memory device including a semiconductor layer which has a source region, a drain region, and a channel forming region which is provided between the source region and the drain region; and a first insulating layer, a first gate electrode, a second insulating layer,... Agent: Nixon Peabody, LLP

20100314625 - Gan single-crystal mass and method of its manufacture, and semiconductor device and method of its manufacture: Affords a GaN single-crystal mass, a method of its manufacture, and a semiconductor device and method of its manufacture, whereby when the GaN single-crystal mass is being grown, and when the grown GaN single-crystal mass is being processed into a substrate or like form, as well as when an at... Agent: Judge Patent Associates

20100314627 - Diamond gan devices and associated methods: Semiconductor devices and methods of making thereof are provided. In one aspect, for example, a method for making a semiconductor device can include polishing a working surface of a diamond layer to a substantially flat surface, depositing a buffer layer on the working surface of the diamond layer, and depositing... Agent: Thorpe North & Western, LLP.

20100314628 - Process for transferring a layer of strained semiconductor material: Semiconductor wafers having a thin layer of strained semiconductor material. These structures include a substrate; an oxide layer upon the substrate; a silicon carbide (SiC) layer upon the oxide layer, and a strained layer of a semiconductor material in a strained state upon the silicon carbide layer, or a matching... Agent: Winston & Strawn LLP Patent Department

20100314629 - Silicon carbide semiconductor device: In order to obtain a silicon carbide semiconductor device that ensures both stability of withstand voltage and reliability in high-temperature operations in its termination end-portion provided for electric-field relaxation in the perimeter of a cell portion driven as a semiconductor element, the termination end-portion is provided with an inorganic protection... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100314626 - Silicon carbide semiconductor device and method of manufacturing the same: A silicon carbide semiconductor device having excellent performance characteristics and a method of manufacturing the same are obtained. An extended terrace surface is formed at a surface of an initial growth layer on a 4H—SiC substrate by annealing with the initial growth layer covered with an Si film, and then... Agent: Venable LLP

20100314630 - Light emitting diode systems: Light emitting diode systems are disclosed. An optical display system that includes a light emitting diode (LED) and a cooling system is disclosed. The cooling system is configured so that, during use, the cooling system regulates a temperature of the light emitting diode.... Agent: Luminus Devices , Inc. C/o Wolf, Greenfield & Sacks , P.C.

20100314631 - Display-pixel and photosensor-element device and method therefor: A display-pixel and photosensor-element device for use as a display and a camera, the device comprising a plurality of light-emitting diode (LED) display elements and a plurality of light-sensitive photosensor devices, together fabricated onto an essentially planar surface so as to create a device that can be used as a... Agent: Haynes And Boone, LLPIPSection

20100314632 - Integrated circuit package: A portion of a package in which a silicon chip (101) is incorporated or a portion of an outer periphery of the package includes a light emitting unit (103) and a light receiving unit (102), the package has such a basic shape that its outer periphery includes a convex portion... Agent: Mcdermott Will & Emery LLP

20100314635 - Chip arrangement, connection arrangement, led and method for producing a chip arrangement: A chip arrangement for an optoelectronic component includes at least one semiconductor chip which emits electromagnetic radiation, and a connection arrangement which includes planes that are electrically insulated from one another, at least one plane having a cavity and at least one plane being a heat dissipating plane, wherein at... Agent: Ip Group Of Dla Piper LLP (us)

20100314633 - Front end scribing of light emitting diode (led) wafers and resulting devices: A wafer of light emitting diodes (LEDs) is laser scribed to produce a laser scribing cut. Then, the wafer is cleaned, for example by wet etching, to reduce scribe damage. Then, electrical contact layers for the LEDs are formed on the wafer that has been cleaned. Alternatively, the scribing cut... Agent: Myers Bigel Sibley & Sajovec, P.A.

20100314637 - Heat releasing semiconductor package, method for manufacturing the same, and display apparatus including the same: A heat releasing semiconductor package, a method for manufacturing the same, and a display apparatus including the same. The heat releasing semiconductor package includes a film, an electrode pattern formed over the film, a semiconductor device mounted over the electrode pattern, and a first heat releasing layer formed over the... Agent: Sherr & Vaughn, PLLC

20100314636 - Organic light emitting device, display unit including the same, and illuminating device including the same: An organic light emitting device includes a first electrode and second electrode on a substrate. Light emitting units are positioned between the first and second electrodes. A first light emitting unit includes a first light emitting layer, and a second light emitting unit includes a second light emitting layer. The... Agent: Snr Denton US LLP

20100314634 - Pixel structure and manufacturing method thereof and display panel: A pixel structure and a manufacturing method thereof and a display panel are provided. An electrode material layer, a shielding material layer, an inter-layer dielectric material layer, a semiconductor material layer and a photoresist-layer are sequentially formed on a substrate. The semiconductor material layer, the inter-layer dielectric material layer, the... Agent: Jianq Chyun Intellectual Property Office

20100314638 - Display device, display apparatus and method of adjusting a color shift of white light in same: A display device includes: an optical cavity portion; and a light emitting layer, wherein a peak wavelength of an internal emission spectrum of the light emitting layer is identical to a peak wavelength of a multiple interference filter spectrum of the optical cavity portion, and wherein a color shift Δ... Agent: K&l Gates LLP

20100314639 - Light emitting device and display device using the same: The light emitting device (10) of the present invention is provided with a light emitting layer (13), and a pair of electrodes (12 and 14) for injecting electric current into the light emitting layer (13). The light emitting layer (13) includes GaN-based semiconductor particles (21). The light emitting device (10)... Agent: Hamre, Schumann, Mueller & Larson P.C.

20100314640 - Indium gallium nitride-based ohmic contact layers for gallium nitride-based devices: Light emitting devices include a gallium nitride-based epitaxial structure that includes an active light emitting region and a gallium nitride-based outer layer, for example gallium nitride. A indium nitride-based layer, such as indium gallium nitride, is provided directly on the outer layer. A reflective metal layer or a transparent conductive... Agent: Myers Bigel Sibley & Sajovec, P.A.

20100314646 - Compositions, optical component, system including an optical component, devices, and other products: The present inventions relate to optical components which include quantum confined semiconductor nanoparticles, wherein at least a portion of the nanoparticles include a ligand attached to a surface thereof, the ligand being represented by the formula: X-Sp-Z, wherein: X represents a primary amine group, a secondary amine group, a urea,... Agent: Qd Vision, Inc.

20100314648 - Device emitting radiation and method for the production thereof: A radiation-emitting device with a first electrode, a first emission layer, a second emission layer and a second electrode. The invention additionally relates to a method of producing a radiation-emitting device.... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100314645 - Light emitting device: An embodiment of this invention relates to a light emitting device. The light emitting device disclosed in the embodiment includes: a reflective layer, and a semiconductor layer which includes an emissive layer on said reflective layer, wherein the distance from the reflective layer to the center of the emissive layer... Agent: Birch Stewart Kolasch & Birch

20100314647 - Light emitting device and method of fabricating the same: A light emitting device package comprises: a substrate; first and second conduction members on the substrate; a light emitting diode on the substrate, the light emitting diode being electrically connected with the first and second conduction members; and a phosphor layer on the light emitting diode.... Agent: Birch Stewart Kolasch & Birch

20100314650 - Light emitting module and method of manufacturing the same: There is provided a light emitting module. The light emitting module includes: a semiconductor light emitting element that emits light; and a plate-like optical wavelength conversion member that converts a wavelength of light emitted from the semiconductor light emitting element and emits light having the converted wavelength. The semiconductor light... Agent: Sughrue-265550

20100314641 - Lighting device: A lighting device can include at least one optoelectronic semiconductor chip, which emits electromagnetic radiation and generates heat in operation, and a reflector. The reflector is suitable for deflecting the electromagnetic radiation and dissipating the heat generated by the optoelectronic semiconductor chip by means of a reflecting surface.... Agent: Slater & Matsil, L.L.P.

20100314642 - Nitride semiconductor light-emitting diode device: A nitride semiconductor light-emitting diode element 1 includes a nitride semiconductor layer 12 having a bottom surface and an upper surface and containing a light emitting layer 12b inside, and a supporting substrate 11 made from a metal is bonded to the bottom surface of the nitride semiconductor layer 12.... Agent: Leydig Voit & Mayer, Ltd

20100314644 - Organic electroluminescent device: An organic electroluminescence device including opposite anode and cathode, and a hole-transporting region, an emitting layer and an electron-transporting region in sequential order from the anode between the anode and the cathode, wherein the emitting layer is formed of a red emitting layer, a green emitting layer, and blue emitting... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100314652 - Package for light emitting device: The present invention discloses a light emitting device package, comprising: a metal base; an electrical circuit layer provided at an upper side of the metal base for providing a conductive path; a light emitting device mounted in a second region having a smaller thickness than a first region on the... Agent: Birch Stewart Kolasch & Birch

20100314653 - Semiconductor light-emitting element: A semiconductor light-emitting device includes a semiconductor multilayer (25) including a cavity structure having two facets facing each other, and a first protective film (23a) formed on at least one of the two facets and of metal nitride. The metal nitride contains aluminum and nitrogen as main components, and at... Agent: Mcdermott Will & Emery LLP

20100314649 - Thin-film led with p and n contacts electricall isolated from the substrate: A thin-film LED includes an insulating substrate, an electrode on the insulating substrate, and an epitaxial structure on the electrode.... Agent: Arent Fox LLP

20100314643 - Thin-film led with p and n contacts electrically isolated from the substrate: A thin-film LED includes an insulating substrate, an electrode on the insulating substrate, and an epitaxial structure on the electrode.... Agent: Arent Fox LLP

20100314651 - Thin-film led with p and n contacts electrically isolated from the substrate: A thin-film LED includes an insulating substrate, an electrode on the insulating substrate, and an epitaxial structure on the electrode.... Agent: Arent Fox LLP

20100314655 - Light emitting assemblies and portions thereof: Apparatus may be provided including a high power light emitting diode (LED) unit, at least one printed circuit board, and an interfacing portion of a heat sink structure. The high power LED unit includes at least one LED die, at least one first lead and at least one second lead,... Agent: Miele Law Group, PC

20100314658 - Light emitting device: A light emitting device includes a package equipped on a front face with a window for installing a light emitting element, and outer lead electrodes that protrude from a bottom face of the package. The package has, on the bottom face, two side face convex components provided on the side... Agent: GlobalIPCounselors, LLP

20100314654 - Light emitting device and method for manufacturing the same: A light emitting device, which can be efficiently manufactured and maintain a stable light emitting property for a long period, is provided. The light emitting device comprises a first resin forming body including a periphery that forms a recess to house a light emitting element and a bottom that forms... Agent: Squire, Sanders & Dempsey L.L.P.

20100314656 - Light emitting device, method of manufacturing the same, light emitting device package, and lighting system: Disclosed are a light emitting device, a method of manufacturing the same, a light emitting device package, and a lighting system. The light emitting device includes a conductive support member, a light emitting structure layer including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer... Agent: Ked & Associates, LLP

20100314657 - Optoelectronic device: A optoelectronic device comprises a semiconductor stack layer; a first transparent conductive oxide (abbreviate as “TCO” hereinafter) layer located on the semiconductor stack layer, wherein the first TCO layer has at least one opening; and a second TCO layer covering the first TCO layer, wherein the second TCO layer is... Agent: Patterson & Sheridan - Epistar

20100314659 - Nanotube semiconductor devices: A semiconductor device includes a first semiconductor layer and a second semiconductor layer of opposite conductivity type, a first epitaxial layer of the first conductivity type formed on sidewalls of the trenches, and a second epitaxial layer of the second conductivity type formed on the first epitaxial layer where the... Agent: Patent Law Group LLP

20100314660 - Two terminal multi-channel esd device and method therefor: In one embodiment, a two terminal multi-channel ESD device is configured to include a zener diode and a plurality of P-N diodes. In another embodiment, the ESD devices has an asymmetrical characteristic.... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100314661 - Semiconductor substrate, method of fabricating the same, semiconductor device, and method of fabricating the same: The present invention provides a fabrication method of a semiconductor substrate, by which a planar GaN substrate that is easily separated can be fabricated on a heterogeneous substrate, and a semiconductor device which is fabricated using the GaN substrate. The semiconductor substrate comprises a substrate, a first semiconductor layer arranged... Agent: H.c. Park & Associates, PLC

20100314662 - Semiconductor structure and method of manufacturing a semiconductor structure: A semiconductor structure is formed of nitrides of group III metals having wurtzite crystal structure and grown in vapor phase on a (0001) oriented semiconductor substrate. The structure comprises a bottom cladding layer, a top cladding layer, and a diffusion region positioned between the cladding layers for diffusing light propagating... Agent: Fay Sharpe LLP

20100314663 - Semiconductor device: One embodiment of a semiconductor device according to the present invention includes a substrate, a base compound semiconductor layer layered on the substrate to form a base, a channel defining compound semiconductor layer layered on the base compound semiconductor layer to define a channel, and an impact ionization control layer... Agent: Birch Stewart Kolasch & Birch

20100314665 - Hetero-junction bipolar transistor: A hetero-junction bipolar transistor includes a sub-collector layer formed on a substrate and having conductivity, a first collector layer formed on the sub-collector layer and a second collector layer formed on the first collector layer and having the same conductive type as a conductive type of the sub-collector layer. In... Agent: Mcdermott Will & Emery LLP

20100314664 - Silicided base structure for high frequency transistors: High frequency performance of (e.g., silicon) bipolar devices is improved by reducing the extrinsic base resistance Rbx. Emitter, base and collector regions are formed in or on a semiconductor substrate. The emitter contact has a portion that overhangs a portion of the extrinsic base contact, thereby forming a cave-like cavity... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20100314666 - Nitride semiconductor device: A nitride semiconductor device includes: a first layer made of a first nitride semiconductor; a second layer provided on the first layer and made of a second nitride semiconductor having a larger band gap than the first nitride semiconductor; a first electrode electrically connected to the second layer; a second... Agent: Patterson & Sheridan, L.L.P.

20100314667 - Cmos pixel with dual-element transfer gate: Embodiments of a pixel that includes a photosensitive region, a floating diffusion region, and a transistor transfer gate disposed between the photosensitive region and the floating diffusion region. The transfer gate includes first and second transfer gate elements, the first transfer gate element having a different doping than the second... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100314668 - Device with integrated circuit and encapsulated n/mems and method for production: A method for producing a device including at least one integrated circuit and at least one N/MEMS. The method produces the N/MEMS in at least one upper layer arranged at least above a first section of a substrate, produces the integrated circuit in a second section of the substrate and/or... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100314669 - Capacitive mems switch and method of fabricating the same: The present invention discloses a capacitive MEMS switch on top of a semiconductor substrate containing a CMOS driving circuitry. The capacitive MEMS switch disclosed includes: 1) a semiconductor substrate containing a driving circuitry inside, and first and second conductors as well as a bottom electrode on top; 2) a suspended... Agent: J C Patents

20100314671 - Semiconductor device and method of forming the same: A semiconductor device includes a semiconductor substrate, and an extending semiconductor portion that extends vertically from the semiconductor substrate. The extending semiconductor portion has a side surface which comprises four main surfaces of {100} face and four sub-surfaces of {110} face. The four sub-surfaces are smaller in area than the... Agent: Mcginn Intellectual Property Law Group, PLLC

20100314670 - Strained ldmos and demos: An integrated circuit on a (100) substrate containing an n-channel extended drain MOS transistor with drift region current flow oriented in the <100> direction with stressor RESURF trenches in the drift region. The stressor RESURF trenches have stressor elements with more than 100 MPa compressive stress. An integrated circuit on... Agent: Texas Instruments Incorporated

20100314672 - Semiconductor device, method for manufacturing same, and solid-state image sensing device: Disclosed herein is a semiconductor device including: a semiconductor substrate; a gate insulating film formed on surfaces of the semiconductor substrate including an internal surface of a hole formed in the semiconductor substrate and formed by radical oxidation or plasma oxidation; and a gate electrode formed as buried in the... Agent: Snr Denton US LLP

20100314673 - Memory device and memory: A memory device includes: a memory layer that retains information based on a magnetization state of a magnetic material, a first intermediate layer and a second intermediate layer that are provided to sandwich the memory layer and are each formed of an insulator, a first fixed magnetic layer disposed on... Agent: K&l Gates LLP

20100314674 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a semiconductor chip including an interlayer insulating film, a first area, and a first crack stopper. The first area includes a plurality of capacitors, each of which includes a lower electrode and a dielectric film sequentially formed on the inner wall of a first opening and... Agent: Young & Thompson

20100314675 - Power semiconductor device and method for manufacturing the same: Disclosed are a power semiconductor device and a method for manufacturing the same. The power semiconductor device has a PIP capacitor and an LDMOS transistor, the LDMOS transistor having second and third gate electrodes separate from a first gate electrode, which may be formed in the process of forming the... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20100314676 - Semiconductor device having plural dram memory cells and a logic circuit and method for manufacturing the same: A memory cell capacitor (C3) of a DRAM is formed by use of a MIM capacitor which uses as its electrode a metal wiring line of the same layer (M3) as metal wiring lines within a logic circuit (LOGIC), thereby enabling reduction of process costs. Higher integration is achievable by... Agent: Mattingly & Malur, P.C.

20100314677 - Semiconductor storage device and method of manufacturing the same: A non-volatile semiconductor storage device includes: a semiconductor substrate; a semiconductor layer formed on the semiconductor substrate; a first device isolation/insulation film formed in a trench, the trench formed in the semiconductor layer, with a first direction taken as a longitudinal direction; a device formation region formed by separating the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100314679 - Charge trapping nonvolatile memory devices with a high-k blocking insulation layer: Provided is a charge trapping nonvolatile memory device. The charge trapping nonvolatile memory device includes: an active pattern and a gate electrode, spaced apart from each other; a charge storage layer between the active pattern and the gate electrode; a tunnel insulation layer between the active pattern and the charge... Agent: Myers Bigel Sibley & Sajovec

20100314680 - Memory array: A memory array includes a charge storage structure and a plurality of conductive materials over the charge storage structure is provided. Each conductive material, serving as a word line, has a substantially arc-sidewall and a substantially straight sidewall.... Agent: J C Patents

20100314678 - Non-volatile memory device and method for fabricating the same: A method for fabricating a non-volatile memory device, the method includes alternately stacking inter-layer dielectric layers and sacrificial layers over a substrate, etching the inter-layer dielectric layers and the sacrificial layers to form trenches to expose a surface of the substrate, etching the inter-layer dielectric layers exposed by the trenches... Agent: Ip & T Group LLP

20100314682 - Configurations and methods for manufacturing devices with trench-oxide-nano-tube super-junctions: This invention discloses semiconductor power device disposed on a semiconductor substrate of a first conductivity type. The semiconductor substrate supports an epitaxial layer of a second conductivity type thereon wherein the semiconductor power device is supported on a super-junction structure. The super-junction structure comprises a plurality of trenches opened from... Agent: Bo-in Lin

20100314681 - Power semiconductor devices integrated with clamp diodes sharing same gate metal pad: A structure of power semiconductor device integrated with clamp diodes sharing same gate metal pad is disclosed. This improved structure can prevent the degradation of breakdown voltage due to electric field in termination region blocked by polysilicon.... Agent: Bacon & Thomas, PLLC

20100314683 - Semiconductor device: Provided is a semiconductor device which scarcely malfunctions even when the device is used as a high-side element, and can keep a high breakdown voltage. In a semiconductor substrate having a main surface, a first p− epitaxial region is formed. At the main surface side of the first p− epitaxial... Agent: Mcdermott Will & Emery LLP

20100314684 - Finfet with separate gates and method for fabricating a finfet with separate gates: The present invention relates to a FinFET with separate gates and to a method for fabricating the same. A dielectric gate-separation layer between first and second gate electrodes has an extension in a direction pointing from a first to a second gate layer that is smaller than a lateral extension... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100314685 - Charging protection device: Shallow trench isolation silicon-on-insulator (SOI) devices are formed with improved charge protection. Embodiments include an SOI film diode and a P+ substrate junction as a charging protection device. Embodiments also include a conductive path from the SOI transistor drain, through a conductive contact, a metal line, a second conductive contact,... Agent: Ditthavong Mori & Steiner, P.C.

20100314686 - Semiconductor device: A gate electrode is provided such that both ends thereof in a gate width direction are projected from an active region in plane view. Partial trench isolation insulation films are provided in a surface of an SOI substrate corresponding to lower parts of the both ends, and body contact regions... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100314688 - Differential nitride pullback to create differential nfet to pfet divots for improved performance versus leakage: Disclosed are embodiments of an integrated circuit structure with field effect transistors having differing divot features at the isolation region-semiconductor body interfaces so as to provide optimal performance versus stability (i.e., optimal drive current versus leakage current) for logic circuits, analog devices and/or memory devices. Also disclosed are embodiments of... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20100314687 - Metal gate transistor, integrated circuits, systems, and fabrication methods thereof: A gate-last method for forming a metal gate transistor is provided. The method includes forming an opening within a dielectric material over a substrate. A gate dielectric structure is formed within the opening and over the substrate. A work function metallic layer is formed within the opening and over the... Agent: Lowe Hauptman Ham & Berner, LLP (tsmc)

20100314689 - Local metallization and use thereof in semiconductor devices: An embodiment of the invention provides a method of creating local metallization in a semiconductor structure, and the use of local metallization so created in semiconductor structures. In one respect, the method includes forming an insulating layer on top of a semiconductor substrate; creating a plurality of voids inside the... Agent: International Business Machines Corporation Dept. 18g

20100314690 - Sidewall-free cesl for enlarging ild gap-fill window: An integrated circuit structure includes a first gate strip; a gate spacer on a sidewall of the first gate strip; and a contact etch stop layer (CESL) having a bottom portion lower than a top surface of the gate spacer, wherein a portion of a sidewall of the gate spacer... Agent: Slater & Matsil, L.L.P.

20100314691 - Method for selective gate halo implantation in a semiconductor die and related structure: According to one embodiment, a method for selective gate halo implantation includes forming at least one gate having a first orientation and at least one gate having a second orientation over a substrate. The method further includes performing a halo implant over the substrate. The first orientation allows a halo... Agent: Farjami & Farjami LLP

20100314692 - Structures of sram bit cells: A SRAM bit cell and an associated method of producing the SRAM bit cell with improved performance and stability is provided. In one configuration, channel mobility of the transistors within the SRAM bit cell may be adjusted to provide improved stability. In order to adjust the channel mobility, a stress... Agent: Banner & Witcoff, Ltd.

20100314693 - Integration of a sense fet into a discrete power mosfet: A semiconductor device includes a main field effect transistor (FET) and one or more sense FETs, and a common gate pad. The main FET and the one or more sense FETs are formed in a common substrate. The main FET and each of the sense FETs include a source terminal,... Agent: Joshua D. Isenberg Jdi Patent

20100314694 - Semiconductor device and manufacturing method thereof: A semiconductor device includes: a channel region formed in a semiconductor substrate; a source region formed on one side of the channel region; a drain region formed on the other side of the channel region; a gate electrode formed on the channel region via a gate insulating film; and a... Agent: Snr Denton US LLP

20100314695 - Self-aligned vertical group iii-v transistor and method for fabricated same: In one embodiment a self-aligned vertical group III-V transistor comprises a group III-V layer having a first conductivity type formed over a group III-V drift body having a second conductivity type opposite the first conductivity type, a pinch-off region formed by dopant implantation of the group III-V layer. The pinch-off... Agent: Farjami & Farjami LLP

20100314696 - Field-effect transistor and method of fabricating same: A field-effect transistor having a high-quality semiconductor/oxide interface and a method of fabricating the field-effect transistor are provided. The field-effect transistor includes a semiconductor substrate; a channel layer formed on the semiconductor substrate; a donor layer formed on the channel layer; a semiconductor layer formed in the donor layer and... Agent: Greenblum & Bernstein, P.L.C

20100314697 - Semiconductor transistors having high-k gate dielectric layers and metal gate electrodes: A semiconductor structure. The semiconductor structure includes (i) a semiconductor substrate which includes a channel region, (ii) first and second source/drain regions on the semiconductor substrate, (iii) a final gate dielectric region, (iv) a final gate electrode region, and (v) a first gate dielectric corner region. The final gate dielectric... Agent: Schmeiser, Olsen & Watts

20100314698 - Methods of manufacturing metal-silicide features: A method of manufacturing a microelectronic device including forming a dielectric layer surrounding a dummy feature located over a substrate, removing the dummy feature to form an opening in the dielectric layer, and forming a metal-silicide layer conforming to the opening. The metal-silicide layer may then be annealed.... Agent: Haynes And Boone, LLPIPSection

20100314699 - Electrochemical sensor device, method of manufacturing the same: An electrochemical sensor device (100) for analysing a sample, the device (100) comprising an electronic chip (101) comprising a sensor portion (102) being sensitive for particles of the sample, a carrier element (103, 104) bonded to the electronic chip (101) to define a fluidic path together with the electronic chip... Agent: Philips Intellectual Property & Standards

20100314700 - Fabricating method for micro gas sensor and the same: There are provided a micro gas sensor and a method for fabricating the same that comprises a micro heater formed inside a polysilicon membrane by doping impurities into a specific region of the polysilicon membrane positioned under a gas sensing substance, thereby improving thermal structural stability and making it easy... Agent: Dr. Mark M. Friedman C/o Bill Polkinghorn - Discovery Dispatch

20100314701 - Pressure sensor and manufacturing method thereof: A pressure sensor is provided with a sensor chip having a first semiconductor layer and a second semiconductor layer wherein a pressure-sensitive region is a diaphragm. In the pressure-sensitive region, an open section is formed on the first semiconductor layer, and a recessed section is formed on the second semiconductor... Agent: Mcdermott Will & Emery LLP

20100314702 - Spin transport device: A spin transport device is provided, which includes a channel comprised of a semiconductor material, a magnetization fixed layer arranged on the channel via a first insulating layer, a magnetization free layer arranged on the channel via a second insulating layer, and first and second electrodes arranged on the channel,... Agent: Oliff & Berridge, PLC

20100314703 - Image sensor package and image sensing module using same: An exemplary image sensor package includes a base substrate, an image sensor, and a number of wires. The base substrate contains carbon nanotubes and alumina, and includes a number of base pads. The image sensor is mounted on the base substrate, and includes a sensing portion and a number of... Agent: Altis Law Group, Inc. Attn: Steven Reiss

20100314704 - Solid-state imaging device and method for making the same, and imaging apparatus: A solid-state imaging device includes a light receiving unit formed in a semiconductor base and configured to perform photoelectric conversion; an insulating layer disposed on the semiconductor base; a film constituting a cladding of a waveguide together with the insulating layer and being formed in an outer part of an... Agent: Snr Denton US LLP

20100314705 - Semiconductor device module, method of manufacturing a semiconductor device module, semiconductor device module manufacturing device: A semiconductor device module is provided, including a number of n semiconductor devices formed on a substraten being an integer≧2; each semiconductor device having a stack of a first contact layer region, a semiconductor layer region, and a second contact layer region wherein the first contact layer region of each... Agent: Patterson & Sheridan, L.L.P.

20100314706 - Variable ring width sdd: A silicon drift detector (SDD) comprising electrically isolated rings. The rings can be individually biased doped rings. One embodiment includes an SDD with a single doped ring. Some of the doped rings may not require a bias voltage. Some of the rings can be field plate rings. The field plate... Agent: Thorpe North & Western, LLP.

20100314707 - Reduced process sensitivity of electrode-semiconductor rectifiers: Disclosed are semiconductor devices and methods of making semiconductor devices. An exemplary embodiment comprises a semiconductor layer of a first conductivity type having a first surface, a second surface, and a graded net doping concentration of the first conductivity type within a portion of the semiconductor layer. The graded portion... Agent: Townsend And Townsend And Crew, LLP

20100314708 - Junction barrier schottky diode: A junction barrier Schottky diode has an N-type well having a surface and a first peak impurity concentration; a P-type anode region in the surface of the well, and having a second peak impurity concentration; an N-type cathode contact region in the surface of the well and laterally spaced from... Agent: Barnes & Thornburg LLP

20100314709 - Latch-up prevention structure and method for ultra-small high voltage tolerant cell: A latch-up prevention structure and method for ultra-small high voltage tolerant cell is provided. In one embodiment, the integrated circuit includes an input and/or output pad, a floating high-voltage n-well (HVNW) connected to the input and/or output pad through a P+ in the floating HVNW and also connected to a... Agent: Lowe Hauptman Ham & Berner, LLP (tsmc)

20100314710 - High-voltage semiconductor device: Aspects of the present invention provide a high-voltage semiconductor device and a high voltage integrated circuit device while minimizing or eliminating the need for the addition of back surface steps. Aspects of the invention provide a high-voltage semiconductor device that achieves, low voltage driving and quick response by way of... Agent: Rossi, Kimms & Mcdowell LLP.

20100314711 - 3d integrated circuit device having lower-cost active circuitry layers stacked before higher-cost active circuitry layer: A method is provided for fabricating a 3D integrated circuit structure. According to the method, a first active circuitry layer wafer that includes active circuitry is provided, and a first portion of the first active circuitry layer wafer is removed such that a second portion of the first active circuitry... Agent: Fleit Gibbons Gutman Bongini & Bianco P.l.

20100314712 - Semiconductor device: A semiconductor device includes a lower substrate, a thin semiconductor layer and an insulating layer formed between the lower substrate and the semiconductor layer. An active transistor area is formed with a base formed along a surface of the semiconductor layer, an emitter region formed in the base, a buried... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100314714 - Integrated circuit device: An integrated circuit device includes a first substrate and a second substrate. The first substrate includes a semiconductor substrate. An active element portion is formed on one of the surfaces of the first substrate, and a first through electrode electrically connected to the active element is formed to extend through... Agent: Mcdermott Will & Emery LLP

20100314713 - Integrated circuit inductors with reduced magnetic coupling: An IC inductor structure is provided which includes a first inductor element formed on a semiconductor substrate and at least a second inductor element formed on the semiconductor substrate proximate the first inductor element. The first inductor element has a first effective magnetic field direction associated therewith, and the second... Agent: Ryan, Mason & Lewis, LLP

20100314715 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a memory cell area; and a peripheral circuit area separated by a groove from the memory cell area. The peripheral circuit area is positioned outside the memory cell area. The memory cell area includes a plurality of electrodes that stand; and a first insulating film that... Agent: Mcdermott Will & Emery LLP

20100314716 - Circuit configuration and manufacturing processes for vertical transient voltage suppressor (tvs) and emi filter: A vertical TVS (VTVS) circuit includes a semiconductor substrate for supporting the VTVS device thereon having a heavily doped layer extending to the bottom of substrate. Deep trenches are provided for isolation between multi-channel VTVS. Trench gates are also provided for increasing the capacitance of VTVS with integrated EMI filter.... Agent: Bo-in Lin

20100314717 - Semiconductor substrate, semiconductor device, and manufacturing methods thereof: The present invention provides a method of manufacturing a semiconductor substrate that includes a substrate, a first semiconductor layer arranged on the substrate, a metallic material layer arranged on the first semiconductor layer, a second semiconductor layer arranged on the first semiconductor layer and the metallic material layer, and a... Agent: H.c. Park & Associates, PLC

20100314720 - Electronic device and method for fabricating the same: An electronic device has an element formed in the chip region of a substrate, a plurality of interlayer insulating films formed on the substrate, a wire formed in the interlayer insulating films in the chip region, and a plug formed in the interlayer insulating films in the chip region and... Agent: Mcdermott Will & Emery LLP

20100314718 - Processes and structures for ic fabrication: The present invention discloses methods and apparatuses for the separations of IC fabrication and assembling of separated IC components to form complete IC structures. In an embodiment, the present fabrication separation of an IC structure into multiple discrete components can take advantages of dedicated IC fabrication facilities and achieve more... Agent: Jayna Sheats

20100314719 - Processes and structures for ic fabrication: The present invention discloses methods and apparatuses for the separations of IC fabrication and assembling of separated IC components to form complete IC structures. In an embodiment, the present fabrication separation of an IC structure into multiple discrete components can take advantages of dedicated IC fabrication facilities and achieve more... Agent: Jayna Sheats

20100314721 - Semiconductor package and method for producing the same: A semiconductor package includes a rewiring substrate and a semiconductor chip. The semiconductor chip includes: a first face with an active surface including integrated circuit devices and chip contact pads, a second face lying in a plane essentially parallel to the first face and side faces. Each side face of... Agent: Edell , Shapiro & Finnan , LLC

20100314722 - Soi wafer, semiconductor device, and method for manufacturing soi wafer: The present invention is an SOI wafer comprising at least: an SOI layer; a silicon oxide film; and a base wafer, wherein the SOI layer has a plane orientation of (100), and the base wafer has a resistivity of 100 Ω·cm or more and a plane orientation different from (100).... Agent: Oliff & Berridge, PLC

20100314723 - Manufacturing of optical structures by electrothermal focussing: This invention relates to methods and devices for the production of optical microstructures or domains in dielectric substrates based on electrothermal focussing. More specifically, the invention relates to a method of introducing a change of dielectric and/or optical properties in a region of an electrically insulating or electrically semiconducting substrate,... Agent: Pearl Cohen Zedek Latzer, LLP

20100314724 - Selective uv-ozone dry etching of anti-stiction coatings for mems device fabrication: Organic anti-stiction coatings such as, for example, hydrocarbon and fluorocarbon based self-assembled organosilanes and siloxanes applied either in solvent or via chemical vapor deposition, are selectively etched using a UV-Ozone (UVO) dry etching technique in which the portions of the organic anti-stiction coating to be etched are exposed simultaneously to... Agent: Sunstein Kann Murphy & Timbers LLP

20100314725 - Stress balance layer on semiconductor wafer backside: A semiconductor component (such as a semiconductor wafer or semiconductor die) includes a substrate having a front side and a back side. The semiconductor die/wafer also includes a stress balance layer on the back side of the substrate. An active layer deposited on the front side of the substrate creates... Agent: Qualcomm Incorporated

20100314726 - Faraday cage for circuitry using substrates: An apparatus and method uses a first Faraday cage portion and a second Faraday cage portion to provide a Faraday cage enclosure surrounding at least one circuit device.... Agent: Mueting, Raasch & Gebhardt, P.A.

20100314727 - Semiconductor device: A semiconductor device having a digital region and an analog region embedded therein has an annular seal ring which surrounds the outer circumference of the digital region and the analog region in a plan view; a guard ring which is provided in the area surrounded by the seal ring, between... Agent: Mcginn Intellectual Property Law Group, PLLC

20100314728 - Ic package having an inductor etched into a leadframe thereof: A leadless integrated circuit (IC) package comprising an IC chip mounted on a metal leadframe and a plurality of electrical contacts electrically coupled to the IC chip. The leadframe having a spiral inductor etched therein.... Agent: Winstead PC

20100314729 - Stacked chip package structure with leadframe having inner leads with transfer pad: The present invention provides a stacked chip package structure with leadframe having inner leads with transfer pad, comprising: a leadframe composed of a plurality of inner leads arranged in rows facing each other, a plurality of outer leads, and a die pad, wherein the die pad is provided between the... Agent: Sinorica, LLC

20100314732 - Enhanced integrated circuit package: A semiconductor including a selectively plated lead frame is disclosed. The lead frame contains a die pad and a plurality of lead fingers, where each lead finger is formed with a bonding pad on the center portion of the lead finger by selective plating. The surface area of the lead... Agent: EagleIPLimited

20100314731 - Integrated circuit packaging system with high lead count and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: forming a leadframe with a tiebar and an outer lead having an outer lead outer pad; forming an inner lead on a peel strip; attaching the leadframe to the peel strip around the inner lead; wire bonding a die... Agent: Law Offices Of Mikio Ishimaru

20100314730 - Stacked hybrid interposer through silicon via (tsv) package: An integrated circuit (IC) device is provided. The IC device includes a first die having a surface with a first pad formed thereon, a second die having a surface with a second pad formed thereon, and a substrate interposer that couples the first pad to the second pad. The substrate... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20100314733 - Apparatus for restricting moisture ingress: Apparatus and methods to protect circuitry from moisture ingress, e.g., using a metallic structure as part of a moisture ingress barrier.... Agent: Mueting, Raasch & Gebhardt, P.A.

20100314734 - Processes and structures for ic fabrication: The present invention discloses methods and apparatuses for the separations of IC fabrication and assembling of separated IC components to form complete IC structures. In an embodiment, the present fabrication separation of an IC structure into multiple discrete components can take advantages of dedicated IC fabrication facilities and achieve more... Agent: Jayna Sheats

20100314735 - Processes and structures for ic fabrication: The present invention discloses methods and apparatuses for the separations of IC fabrication and assembling of separated IC components to form complete IC structures. In an embodiment, the present fabrication separation of an IC structure into multiple discrete components can take advantages of dedicated IC fabrication facilities and achieve more... Agent: Jayna Sheats

20100314738 - Integrated circuit packaging system with a stack package and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a stack board; connecting a device over the stack board; forming a stack encapsulant having a cavity and a pedestal over the device and having a shaped perimeter side from a pedestal surface of the pedestal to the... Agent: Law Offices Of Mikio Ishimaru

20100314736 - Integrated circuit packaging system with package-on-package and method of manufacture thereof: A method of manufacture an integrated circuit packaging system includes: providing a base substrate; mounting a first base integrated circuit over the base substrate; mounting a second base integrated circuit over the first base integrated circuit; attaching a stacking interconnect to the base substrate and adjacent to the first base... Agent: Law Offices Of Mikio Ishimaru

20100314737 - Intra-die routing using back side redistribution layer and associated method: A semiconductor die includes: a body portion with a plurality of circuit components, a front side including electrical couplings to the plurality of circuit components, a back side having a redistribution layer with a first electrical terminal coupled to the plurality of circuit components by a first through-silicon via, and... Agent: Qualcomm Incorporated

20100314739 - Package-on-package technology for fan-out wafer-level packaging: Methods, systems, and apparatuses for wafer-level package-on-package structures are provided herein. A wafer-level integrated circuit package that includes at least one die is formed. The wafer-level integrated circuit package includes redistribution interconnects that redistribute terminals of the die over an area that is larger than an active-surface of the die.... Agent: Fiala & Weaver P.l.l.c. C/o Cpa Global

20100314740 - Semiconductor package, stack module, card, and electronic system: A multi-chip package device can include a plurality of integrated circuit device chips stacked on one another inside a multi-chip package including the device. The device can include an electrically isolated multi-chip support structure that is directly connected to first and second electrically active integrated circuit structures via respective first... Agent: Myers Bigel Sibley & Sajovec

20100314741 - Integrated circuit package stacking system with redistribution and method of manufacture thereof: A method of manufacture of an integrated circuit package stacking system including: forming a base frame includes: providing a support panel, and forming a coupling pad, a mounting pad, a base frame trace, a discrete component pad, or a combination thereof on the support panel; fabricating a package substrate; coupling... Agent: Law Offices Of Mikio Ishimaru

20100314743 - Integrated circuit package having a castellated heatspreader: In one aspect, an embodiment of an IC package includes an IC chip electrically connected to a substrate, a heatspreader disposed over the IC chip, wherein the heatspreader does not directly contact the IC chip, and an encapsulant material encapsulating at least a portion of the IC chip and a... Agent: EagleIPLimited

20100314742 - Semiconductor package: A semiconductor package includes a semiconductor chip having two or more regions that partially overlap so as to define an overlapping region. Through-holes are defined through the two or more partially overlapping regions. One or more first electrodes are disposed on inner surfaces of the semiconductor chip within the through-holes.... Agent: Ladas & Parry LLP

20100314744 - Substrate having single patterned metal layer exposing patterned dielectric layer, chip package structure including the substrate, and manufacturing methods thereof: A chip package structure includes a substrate, a die, and a package body. The substrate includes a single patterned, electrically conductive layer, and a patterned dielectric layer adjacent to an upper surface of the electrically conductive layer. A part of a lower surface of the electrically conductive layer forms first... Agent: Cooley LLP Attn: Patent Group

20100314745 - Copper pillar bonding for fine pitch flip chip devices: A semiconductor device assembly can include a semiconductor chip, a receiving substrate, and a spacer structure interposed between the semiconductor chip and the receiving substrate. The spacer provides an unoccupied space between a pillar and a bond finger for excess conductive material, which can otherwise flow from between the pillar... Agent: Texas Instruments Incorporated

20100314746 - Semiconductor package and manufacturing method thereof: A semiconductor package and a manufacturing method thereof are provided. A carrier having an adhesion layer is provided. A plurality of chips are disposed on the adhesion layer, wherein an active surface of each chip faces the adhesion layer. A molding compound is formed for encapsulating the chips to form... Agent: Cooley LLP Attn: Patent Group

20100314748 - Chip packaging method and structure thereof: The present invention relates to a chip packaging method and structure, in which bonding pads provided on the chip are connected by a plurality of metal wires via bonding, each of the metal wires is bending in the middle part to be higher than a predetermined height, and its ends... Agent: Bacon & Thomas, PLLC

20100314747 - Electronic device package and method of manufacture: A method of manufacturing an electronic device package. Coating a first side of a metallic layer with a first insulating layer and coating a second opposite side of the metallic layer with a second insulating layer. Patterning the first insulating layer to expose bonding locations on the first side of... Agent: Hitt Gaines, PC Lsi Corporation

20100314749 - Semiconductor device having a sealing resin and method of manufacturing the same: The semiconductor device 100 comprises a first semiconductor element 113 provided on a face on one side of a flat plate shaped interconnect component 101, an insulating resin 119 covering a face of a side where the first semiconductor element 113 of the interconnect component 101 is provided and a... Agent: Young & Thompson

20100314750 - Semiconductor device having a sealing resin and method of manufacturing the same: An integrated circuit package comprises a package substrate (210, 410), an electrically insulating material (220, 420) adjacent to the package substrate, and a mark (230, 420) on the electrically insulating material. The mark is such that a visual contrast between the mark and the electrically insulating material is maximized when... Agent: Intel Corporation C/o Cpa Global

20100314752 - Forming an etched planarised photonic crystal structure: A method of forming a photonic crystal (PhC) structure and a PhC structure formed by such method. The method comprises forming holes in a Si-based host layer; filling the holes with a high-density plasma (HDP) deposited Si-based oxide and such that a surface of the Si-based host layer is directly... Agent: Patterson Thuente Christensen Pedersen, P.A.

20100314751 - Processes and structures for ic fabrication: The present invention discloses methods and apparatuses for the separations of IC fabrication and assembling of separated IC components to form complete IC structures. In an embodiment, the present fabrication separation of an IC structure into multiple discrete components can take advantages of dedicated IC fabrication facilities and achieve more... Agent: Jayna Sheats

20100314753 - System and method for reducing process-induced charging: A semiconductor device includes a substrate, a memory cell formed on the substrate, and a contact to the substrate. The contact is formed in an area away from the memory cell and functions to raise the potential of the substrate.... Agent: Harrity & Harrity, LLP

20100314756 - Interconnect structures having lead-free solder bumps: An integrated circuit structure includes a semiconductor substrate, and a polyimide layer over the semiconductor substrate. An under-bump-metallurgy (UBM) has a first portion over the polyimide layer, and a second portion level with the polyimide layer. A first solder bump and a second solder bump are formed over the polyimide... Agent: Slater & Matsil, L.L.P.

20100314754 - Method of forming wire bonds in semiconductor devices: A method of forming a wire bond in a semiconductor device includes forming a first bump of a first composition proximate to a probe mark on a bond pad. A second bump of the first composition is formed adjacent to the first bump such that the first and second bumps... Agent: Freescale Semiconductor, Inc. Law Department

20100314755 - Printed circuit board, semiconductor device comprising the same, and method of manufacturing the same: Disclosed is a printed circuit board, which includes a first circuit layer embedded in one surface an insulating layer and including a bump pad and a wire bonding pad, thus realizing a high-density wire bonding pad. A semiconductor device including the printed circuit board and a method of manufacturing the... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100314759 - Semiconductor chip passivation structures and methods of making the same: Various semiconductor chip passivation structures and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes applying a polymeric passivation layer to a side of a semiconductor chip. The side of the semiconductor chip includes plural conductor pads. Plural openings are formed... Agent: Timothy M Honeycutt Attorney At Law

20100314757 - Semiconductor device and method of manufacturing the same: In a POP semiconductor device, a technology is provided which can increase the degree of freedom of semiconductor packages to be combined. A first metal conductive member is placed on a first wiring substrate which is a lower mounting substrate and a second metal conductive member is placed on a... Agent: Mattingly & Malur, P.C.

20100314758 - Through-silicon via structure and a process for forming the same: A through-silicon via (TSV) structure and process for forming the same are disclosed. A semiconductor substrate has a front surface and a back surface, and a TSV structure is formed to extend through the semiconductor substrate. The TSV structure includes a metal layer, a metal seed layer surrounding the metal... Agent: Lowe Hauptman Ham & Berner, LLP (tsmc)

20100314761 - Semiconductor device with reduced cross talk: Mutual inductance from an external output signal system to an external input signal system, in which parallel input/output operation is enabled, is reduced. A semiconductor integrated circuit has a plurality of external connection terminals facing a package substrate, and has an external input terminal and an external output terminal, in... Agent: Mattingly & Malur, P.C.

20100314760 - Semiconductor package and method of fabricating the same: A semiconductor package includes a base substrate, a semiconductor chip mounted on the base substrate and including bonding pads, first and second connection terminals disposed adjacent to the semiconductor chip on the base substrate and electrically connected to the bonding pads, a first ball land disposed on the base substrate... Agent: Lee & Morse, P.C.

20100314763 - Integrated circuit system employing low-k dielectrics and method of manufacture thereof: A method of manufacture of an integrated circuit system includes: fabricating a substrate having an integrated circuit; applying a low-K dielectric layer over the integrated circuit; forming a via and a trench, in the low-K dielectric layer, over the integrated circuit; forming a structure surface by a chemical-mechanical planarization (CMP)... Agent: Law Offices Of Mikio Ishimaru

20100314762 - Semiconductor substrate with through-contact and method for production thereof: The interlayer connection of the substrate is formed by a contact-hole filling (4) of a semiconductor layer (11) and metallization (17) of a recess (16) in a reverse-side semiconductor layer (13), wherein the semiconductor layers are separated from each other by a buried insulation layer (12), at whose layer position... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100314764 - Hybrid metallic wire and methods of fabricating same: A structure and methods of fabricating the structure. The structure comprising: a trench in a dielectric layer; an electrically conductive liner, an electrically conductive core conductor and an electrically conductive fill material filling voids between said liner and said core conductor.... Agent: Schmeiser, Olsen & Watts

20100314765 - Interconnection structure of semiconductor integrated circuit and method for making the same: An interconnection structure includes a lower layer metal wire in a first inter-metal dielectric layer on a substrate; a second inter-metal dielectric layer on the first inter-metal dielectric layer and covering the lower layer metal wire; an upper layer metal wire on the second inter-metal dielectric layer; and a via... Agent: North America Intellectual Property Corporation

20100314766 - Ulsi micro-interconnect member having ruthenium electroplating layer on barrier layer: An object of the present is to provide a ULSI micro-interconnect member having a seed layer which, particularly on the inner sidewalls of vias and trenches, is formed with a sufficient coverage and a film thickness uniform with that on surface portion, and which has a low level of impurities.... Agent: Flynn Thiel Boutell & Tanis, P.C.

20100314767 - Self-aligned dual damascene beol structures with patternable low- k material and methods of forming same: A self-aligned interconnect structure is provided that includes a first patterned and cured low-k material located on a surface of a substrate, wherein the first patterned and cured low-k material includes at least one first interconnect pattern (via or trench pattern) therein. A second patterned and cured low-k material having... Agent: Scully, Scott, Murphy & Presser, P.C.

20100314769 - For reducing electromigration effect in an integrated circuit: An integrated circuit comprising one or more dielectric layers the or each dielectric layer being provided with one or more interconnects wherein the interconnect comprises metallic atoms moving from a first region of the interconnect to a second region of the interconnect when a current flows, characterised in that the... Agent: Larson Newman & Abel, LLP

20100314768 - Interconnect structure fabricated without dry plasma etch processing: An interconnect structure within a microelectronic structure and a method for fabricating the interconnect structure within the microelectronic structure use a developable bottom anti-reflective coating layer and at least one imageable inter-level dielectric layer located thereupon over a substrate that includes a base dielectric layer and a first conductor layer... Agent: Scully, Scott, Murphy & Presser, P.C.

20100314770 - Mounting substrate and electronic apparatus: A mounting substrate having a structure allowing reduction of the cost and an electronic apparatus formed by surface-mounting a semiconductor device thereon are provided. The mounting substrate is a mounting substrate mounted with a semiconductor device having external terminals alignedly arrayed in the form of a matrix, and includes junctions... Agent: Rabin & Berdo, PC

20100314774 - Reliable interconnects: A method for forming a semiconductor device is presented. The method includes providing a substrate prepared with a dielectric layer formed thereon. The dielectric layer having a conductive line disposed in an upper portion of the dielectric layer. The substrate is processed to produce a top surface of the dielectric... Agent: HorizonIPPte Ltd

20100314773 - Semiconductor device: A semiconductor device has: a radiator plate that is maintained at a predetermined potential; an SOI (Silicon On Insulator) chip mounted on the radiator plate; and thermal grease applied to an interface between the radiator plate and the SOI chip. The SOI chip has: a first silicon substrate forming a... Agent: Mcginn Intellectual Property Law Group, PLLC

20100314771 - Semiconductor device including an improved lithographic margin: A semiconductor device includes first to third lines. The second line has a width equal to the first line. The second line is arranged with a space equal to the width from the first line, and partially has a gap. The third line is connected to one end of the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100314772 - Stacked layer type semiconductor device and semiconductor system including the same: A stacked layer type semiconductor device includes N memories each including at least one main via and (N−1) sub vias, the N memories being sequentially stacked on one-another so that central axes of the N memories face each other crosswise, and a plurality of connection units electrically connecting the N... Agent: F. Chau & Associates, LLC

20100314776 - Connection pad structure for an image sensor on a thinned substrate: The invention relates to the fabrication of electronic circuits on a thinned semiconductor substrate. To produce a connection pad on the back side of the thinned substrate, the procedure is as follows: an integrated circuit is produced on an unthinned substrate, in which a portion of a polycrystalline silicon layer... Agent: Lowe Hauptman Ham & Berner, LLP

20100314775 - Explosion-proof module structure for power components, particularly power semiconductor components, and production thereof: A power module having at least one electric power component, such as a power electronic semiconductor component. An electrical contact for a load current is formed on a lower surface and also on an upper surface of the power semiconductor component. To reduce an explosion pressure and accept power when... Agent: Lerner Greenberg Stemer LLP

20100314777 - Semiconductor device and method for manufacturing same: A semiconductor device includes: a semiconductor substrate; an interlayer insulating film provided on the semiconductor substrate; an interconnect (second interconnect trench) composed of a metallic film provided in an interconnect trench (second copper interconnect) and a plug composed of a metallic film provided in a connection hole (via hole) coupled... Agent: Mcginn Intellectual Property Law Group, PLLC

20100314778 - Semiconductor device and method for producing the same: In forming a semiconductor device, an insulation layer is formed on top of a semiconductor chip having a plurality of external terminals. A plurality of interconnections is formed on the insulating layer. External terminals are electrically connected to coordinated interconnections through a plurality of vias formed in the insulation layer.... Agent: Sughrue Mion, PLLC

20100314779 - Semiconductor device that suppresses malfunctions due to noise generated in internal circuit: A semiconductor device includes a first pad row and a second pad row, a first ground potential supply electrode which is connected to a first interconnect provided near the first pad row, and a second ground potential supply electrode which is connected to a second interconnect provided near the second... Agent: Foley And Lardner LLP Suite 500

20100314780 - Semiconductor device and method of forming vertical interconnect structure between non-linear portions of conductive layers: A semiconductor device is made by forming a first conductive layer over a first temporary carrier having rounded indentations. The first conductive layer has a non-linear portion due to the rounded indentations. A bump is formed over the non-linear portion of the first conductive layer. A semiconductor die is mounted... Agent: Robert D. Atkins

20100314781 - Dicing tape-integrated film for semiconductor back surface: The present invention provides a dicing tape-integrated film for semiconductor back surface, including: a dicing tape including a base material and a pressure-sensitive adhesive layer provided on the base material; and a film for flip chip type semiconductor back surface provided on the pressure-sensitive adhesive layer, in which the film... Agent: Sughrue-265550

20100314782 - Dicing tape-integrated film for semiconductor back surface: The present invention provides a dicing tape-integrated film for semiconductor back surface, including: a dicing tape including a base material and a pressure-sensitive adhesive layer provided on the base material; and a film for flip chip type semiconductor back surface provided on the pressure-sensitive adhesive layer, in which the film... Agent: Sughrue-265550

20100314783 - Photosensitive adhesive composition, and obtained using the same, adhesive film, adhesive sheet, semiconductor wafer with adhesive layer, semiconductor device and electronic part: A photosensitive adhesive composition comprising: (A) a polyimide having a carboxyl group as a side chain, whereof the acid value is 80 to 180 mg/KOH; (B) a photo-polymerizable compound; and (C) a photopolymerization initiator.... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100308295 - Deletable nanotube circuit: Carbon nanotube template arrays may be edited to form connections between proximate nanotubes and/or to delete undesired nanotubes or nanotube junctions.... Agent: Iv - Suiter Swantz PC Llo

20100308297 - Heterojunction diode, method of manufacturing the same, and electronic device including the heterojunction diode: Example embodiments relate to a heterojunction diode, a method of manufacturing the heterojunction diode, and an electronic device including the heterojunction diode. The heterojunction diode may include a first conductive type non-oxide layer and a second conductive type oxide layer bonded to the non-oxide layer. The non-oxide layer may be... Agent: Harness, Dickey & Pierce, P.L.C

20100308298 - Nonvolatile memory element and nonvolatile memory device incorporating nonvolatile memory element: A nonvolatile memory element includes a first electrode (103) formed on a substrate (101), a resistance variable layer (108) and a second electrode (107), wherein the resistance variable layer has a multi-layer structure including at least three layers which are a first transition metal oxide layer (104), a second transition... Agent: Mcdermott Will & Emery LLP

20100308296 - Phase change memory cell with self-aligned vertical heater: A self-aligned vertical heater element is deposited directly on the silicide of a selection device, and a phase change chalcogenide material is deposited directly on the vertical heater element. The fabrication process allows for self-alignment between the chalcogenide line and vertical heater element. In an embodiment, the vertical heater element... Agent: Gerbera/bstz Blakely Sokoloff Taylor & Zafman LLP

20100308299 - Electronic component, methods for the production thereof, and use thereof: An electronic component includes a first and a second electrode. A layer of nanoparticles is disposed between the first and second electrodes. The layer of nanoparticles includes an electrically conducting compound of a metal and an element of Main Group VI of the Periodic Table. A dimension of a majority... Agent: Leydig, Voit And Mayer

20100308300 - Integrated circuit light emission device, module and fabrication process: An integrated circuit device, which can be a light emission device such as a light emitting diode (LED), comprises a substrate, a plurality of device layers formed on a first surface of the substrate, including a first device layer and a second device layer, a first electrode formed on the... Agent: Fish & Richardson P.C. (sv)

20100308301 - Semiconductor light-emitting device: A light-emitting diode has: a substrate; a light-emitting layer having a first conductivity type cladding layer, an active layer, and a second conductivity type cladding layer stacked sequentially on a front side of the substrate; a first current-blocking portion partially formed in the middle on the light-emitting layer; a current-conducting... Agent: Mcginn Intellectual Property Law Group, PLLC

20100308302 - Quantum well device: An apparatus includes a primary planar quantum well and a planar distribution of dopant atoms. The primary planar quantum well is formed by a lower barrier layer, a central well layer on the lower barrier layer, and an upper barrier layer on the central well layer. Each of the layers... Agent: Docket Administrator - Room 3d-201e Alcatel-lucent Usa Inc.

20100308303 - Quantum dot memory: A method of making a quantum dot memory cell, the quantum dot memory cell including an array of quantum dots disposed between a first electrode and a second electrode, includes obtaining values for a tunneling current through the quantum dot memory cell as a function of a voltage applied to... Agent: Occhiuti Rohlicek & Tsao, LLP

20100308319 - Aromatic amine compound, and light emitting element, light emitting device, and electronic device using aromatic amine compound: An object is to provide an aromatic amine compound with excellent heat resistance. Another object is to provide a light emitting element, a light emitting device, and an electronic device with excellent heat resistance. An aromatic amine compound represented by General Formula (1) is provided. The aromatic amine compound represented... Agent: Robinson Intellectual Property Law Office, P.C.

20100308322 - Compound having pyridoindole ring structure bonded with substituted pyridyl group, and organic electroluminescent device: in which Ar represents a substituted or unsubstituted aromatic hydrocarbon group, a substituted or unsubstituted aromatic heterocyclic group, or a substituted or unsubstituted condensed polycyclic aromatic group; R1 to R3 may be the same or different and represent a hydrogen atom, a substituted or unsubstituted aromatic heterocyclic group, or a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100308316 - Electronic device having an electrode with enhanced injection properties: An electronic device having an electrode with enhanced injection properties comprising a first electrode and a first layer of cross-linked molecular charge transfer material on the first electrode. The cross-linked molecular charge transfer material may be an acceptor, which may consist of at least one of: TNF, TN9(CN)2F, TeNF, TeCIBQ,... Agent: International Business Machines Corporation Richard Lau

20100308304 - Electronic short channel device comprising an organic semiconductor formulation: The invention relates to an improved electronic device, like an organic field emission transistor (OFET), which has a short source to drain channel length and contains an organic semiconducting formulation comprising a semiconducting binder.... Agent: Millen, White, Zelano & Branigan, P.C.

20100308310 - Emissive aryl-heteroaryl acetylenes: Disclosed herein are compounds represented by a formula: R1—O-A-C≡C-D, where R1, A, and D are defined as described herein. Compositions and light-emitting devices related thereto are also disclosed.... Agent: Knobbe Martens Olson & Bear LLP

20100308321 - Laminated structure, method of manufacturing a laminated structure, electronic element, electronic element array, image displaying medium, and image displaying device: Disclosed is a laminated structure, including a substrate, a wettability changing layer on the substrate, the wettability changing layer including a material, a critical surface tension of the material being changed by providing energy thereto, and an electrically conductor layer on the substrate, the electrically conductor layer formed on a... Agent: Cooper & Dunham, LLP

20100308314 - Light emitting device and manufacturing method thereof: A light emitting device is provided, which uses alternating current drive as a method of driving the light emitting device, and in which light emission is always obtained when voltages having different polarities are alternately applied, and a method of manufacturing the light emitting device is also provided. A first... Agent: Robinson Intellectual Property Law Office, P.C.

20100308320 - Light emitting element, light emitting device, and electronic device: It is an object of the present invention to provide a functional layer for protecting a light emitting element from being deteriorated by a physical or chemical influence when the light emitting element is manufactured or driven, and to attain extension of lifetime of an element and improvement of element... Agent: Robinson Intellectual Property Law Office, P.C.

20100308307 - Method for production of an organic light emitting diode or of an organic solar cell and organic light emitting diodes or solar cells produced therewith: The electronic device comprises a cathode and an anode. One of the two electrodes is completely or partly transmissive to light. Between the two electrodes there are one or more organic semi-conducting layers and another organic buffer layer. The buffer layer can likewise be an organic, semi-conducting layer. For application... Agent: Dilworth & Barrese, LLP

20100308318 - Method of manufacturing semiconductor device, semiconductor device, display device, and electronic instrument: A method of manufacturing a semiconductor device includes: forming a plurality of regions extending in a predetermined direction on a substrate; and ejecting a liquid material on the plurality of regions to form an electrically conductive film, wherein the electrically conductive film extends in the same direction as the plurality... Agent: Oliff & Berridge, PLC

20100308315 - Organic electric-field light-emitting element: wherein A, B, and Ar1 to Ar6 are independently a C6-60 aromatic group which does not contain a styryl group nor an alkenyl group, at least one of A, Ar1, Ar2, or B, Ar3 to Ar6 contains at least three condensed aromatic rings, and p, q and r of a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100308305 - Organic luminescent material and organic light emitting device using the same: The present invention relates to novel organic electroluminescent materials and organic light emitting devices comprising the same. Since the organic electroluminescent materials according to the invention have good luminous efficiency and life property as an electroluminescent material, OLED's having very good operation lifetime can be produced.... Agent: Rohm And Haas Electronic Materials LLC

20100308313 - Organic material containing oligophenylene skeleton and light-emitting device using the same: [Solution] It has been found that a novel oligophenylene derivative, which is applicable as an organic electroluminescent material, can be produced efficiently using a cross-coupling reaction. It has also been found that a highly-efficient blue phosphorescent light-emitting device can be produced using this compound. The present invention is based on... Agent: Crowell & Moring LLP Intellectual Property Group

20100308309 - Patterning of organic semiconductor materials: Organic semiconductor material can be patterned from a solution onto a substrate by selectively wetting the substrate with the solution while applying a mechanical disturbance (such as stirring the solution while the substrate is immersed, or wiping the solution on the substrate). The organic semiconductor material can then be precipitated... Agent: Crawford Maunu PLLC

20100308311 - Photoelectric conversion device and imaging device: wherein each of R2 to R9 independently represents a hydrogen atom or a substituent, provided that each of at least two out of R3, R4, R7 and R8 independently represents an aryl group, a heterocyclic group or —N(Ra)(Rb), each of Ra and Rb independently represents a hydrogen atom or a... Agent: Studebaker & Brackett PC

20100308312 - Photoelectric conversion device, production method thereof and imaging device: Provided is a photoelectric conversion device comprising an electrically conductive film, a photoelectric conversion film, and a transparent electrically conductive film, wherein said photoelectric conversion film contains a crystallized fullerene or fullerene derivative, and said crystallized fullerene or fullerene derivative is oriented in the (111) direction perpendicularly to the film... Agent: Studebaker & Brackett PC

20100308317 - Thin film transistor, method of manufacturing the same and flat panel display having the thin film transistor: A thin film transistor includes: a gate electrode; source and drain electrodes insulated from the gate electrode; an organic semiconductor layer that is insulated from the gate electrode and electrically connected to the source and drain electrodes; an insulating layer that insulates the gate electrode from the source and drain... Agent: Stein Mcewen, LLP

20100308306 - Use of a metal complex as a p-dopant for an organic semiconductive matrix material, organic semiconductor material, and organic light-emitting diodes: A metal complex is used as p-dopant for an organic semiconducting matrix material, to an organic semiconductor material and to an organic light-emitting diode. Also disclosed is the use of metal complexes, which function as Lewis acids, as p-dopants in organic matrix materials.... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100308308 - Use of substituted tris(diphenylamino)triazine compounds in oleds: The present invention relates to an organic light-emitting diode comprising at least one tris(diphenylamino)triazine compound with at least one alkoxy or aryloxy radical, to a light-emitting layer comprising at least one tris(diphenylamino)triazine compound with at least one alkoxy or aryloxy radical, to the use of the aforementioned compounds as a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100308324 - Array substrate for display device and method of fabricating the same: An array substrate including a substrate having a pixel region, a gate line and a gate electrode on the substrate, the gate electrode being connected to the gate line, a gate insulating layer on the gate line and the gate electrode, an oxide semiconductor layer on the gate insulating layer,... Agent: Birch Stewart Kolasch & Birch

20100308323 - Method for improving light extraction efficiency of group-iii nitride-based light emitting device: A method for improving light extraction efficiency of a group-III nitride-based light emitting device is disclosed. The method includes the steps of: providing a group-III nitride-based light emitting device having a top surface; disposing a seed layer on the top surface for increasing adhesion of the group-III nitride-based light emitting... Agent: Bacon & Thomas, PLLC

20100308325 - Method of manufacturing field-effect transistor, field-effect transistor, display device and electromagnetic wave detector: There is provided a method of manufacturing a field-effect transistor, in which on a electroconductive layer including a source electrode, a drain electrode and pixel electrode formed by a conductive layer-forming, an inorganic insulating layer containing an inorganic material as a main component is formed so as to cover the... Agent: Solaris Intellectual Property Group, PLLC

20100308326 - Thin-film transistor array panel and method of fabricating the same: A thin-film transistor array panel includes: an insulating substrate; an oxide semiconductor layer that is formed on the insulating substrate and includes a metal inorganic salt and zinc acetate; a gate electrode overlapping with the oxide semiconductor layer; a gate insulating film that is interposed between the oxide semiconductor layer... Agent: H.c. Park & Associates, PLC

20100308327 - Zno-based substrate, method for processing zno-based substrate, and zno-based semiconductor device: Provided are a ZnO-based substrate having a high-quality surface suitable for crystal growth, a method for processing the ZnO-based substrate, and a ZnO-based semiconductor device. The ZnO-based substrate is formed such that any one of a carboxyl group and a carbonate group is substantially absent in a principal surface on... Agent: Rabin & Berdo, PC

20100308329 - Lithography robustness monitor: The present invention relates to a method and device for monitoring a lithographic process of an integrated circuit. In a first step a design for an integrated circuit is provided. The integrated circuit comprises at least an integrated circuit transistor pair having a gate of a first transistor connected to... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100308328 - Semiconductor device: A semiconductor device has a floating gate structure in which charge storage layers are stacked on a SiO2 layer formed on a substrate made of n-type Si. The charge storage layer has quantum dots made of undoped Si and an oxide layer that covers the quantum dots. The charge storage... Agent: Foley & Lardner LLP

20100308330 - Methods of manufacturing resistors and structures thereof: Methods of manufacturing resistors, methods of manufacturing semiconductor devices, and structures thereof are disclosed. In one embodiment, a method of fabricating a resistor includes forming a transistor material stack over a workpiece and patterning the transistor material stack, forming a gate of a transistor in a first region of the... Agent: Slater & Matsil, L.L.P.

20100308334 - Array substrate and method for manufacturing the array substrate: An array substrate including: a gate electrode and a gate insulation layer disposed on a base substrate, the gate insulation layer having a first thickness in a first region and a second thickness in a second region, the first thickness being greater than the second thickness; a semiconductor pattern disposed... Agent: Cantor Colburn LLP

20100308336 - Array substrate for liquid crystal display device and manufacturing method thereof: An array substrate for an LCD device and a manufacturing method thereof. The array substrate includes: a gate line, a gate electrode, a gate pad, and a pixel electrode formed on the substrate; a gate insulation layer formed on the substrate to expose the gate line and the pixel electrode;... Agent: Mckenna Long & Aldridge LLP

20100308332 - Display device: A display device is provided with a pair of a first electrode and a second electrode at least one of which is transparent or translucent and a phosphor layer formed so as to be sandwiched between the first electrode and the second electrode, and the phosphor layer has a polycrystal... Agent: Mcdermott Will & Emery LLP

20100308331 - Mother thin film transistor array substrate and thin film transistor array substrate fabricated therefrom: A mother thin film transistor (TFT) array substrate includes an insulating substrate, at least two TFT arrays and printed wirings. The TFT array includes TFTs formed on the insulating substrate. The printed wirings are connected to the TFT arrays. The printed wiring includes a discontinuous metal layer and at least... Agent: Wei Te Chung Foxconn International, Inc.

20100308335 - Organic light emitting diode display and method of manufacturing the same: An organic light emitting diode (OLED) display and a method of manufacturing the same, the OLED display including a flexible substrate, a driving circuit unit on the flexible substrate, the driving circuit unit including a thin film transistor (TFT), an organic light emission element on the flexible substrate, the organic... Agent: Lee & Morse, P.C.

20100308333 - Thin film transistor array substrate for a display panel and a method for manufacturing a thin film transistor array substrate for a display panel: A method of manufacturing a thin film transistor capable of simplifying a substrate structure and a manufacturing process is disclosed. The method of manufacturing a thin film transistor array substrate comprising a three mask process. The 3 mask process comprising, forming a gate pattern on a substrate, forming a gate... Agent: F. Chau & Associates, LLC

20100308337 - Schottky diodes including polysilicon having low barrier heights and methods of fabricating the same: Hybrid semiconductor devices including a PIN diode portion and a Schottky diode portion are provided. The PIN diode portion is provided on a semiconductor substrate and has an anode contact on a first surface of the semiconductor substrate. The Schottky diode portion is also provided on the semiconductor substrate and... Agent: Myers Bigel Sibley & Sajovec

20100308338 - Articles comprising crystalline layers on low temperature substrates: An article includes a polycrystalline semiconductor layer having a plurality of single crystal crystallites of semiconductor material and a substrate having a melting or softening point of <200° C. supporting the semiconductor layer. An average grain size of the plurality of single crystal crystallites is less at an interface proximate... Agent: Jetter & Associates, P.A.

20100308339 - Light emitting device, light emitting device package and lighting system including the same: Provided are a light emitting device (LED), a light emitting device package and a lighting system including the same. The LED includes a light emitting structure having a second semiconductor layer of a second conductivity type, an active layer on the second semiconductor layer, and a first semiconductor layer of... Agent: Ked & Associates, LLP

20100308342 - Electrical switching device and method of embedding catalytic material in a diamond substrate: An electrical device according to one embodiment includes a substrate including at least one diamond layer; at least one first electrode in contact with said substrate, wherein at least one said first electrode includes at least one electrically conductive protrusion extending into said substrate; and at least one second electrode... Agent: Zilka-kotab, PC

20100308344 - Method for growing p-type sic semiconductor single crystal and p-type sic semiconductor single crystal: In a method for growing a p-type SiC semiconductor single crystal on a SiC single crystal substrate, using a first solution in which C is dissolved in a melt of Si, a second solution is prepared by adding Al and N to the first solution such that an amount of... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100308340 - Semiconductor device having a buried channel: Provided is a device that includes a semiconductor body having a surface. Source and drain regions with effective dopant populations of a first polarity can be disposed adjacent to the surface and spaced apart from one another. A channel region with an effective dopant population of the first polarity can... Agent: General Electric Company Global Research

20100308341 - Semiconductor memory device: A switching resistance RAM that is highly integrated as well as reduced in a read-out time is realized. There is formed an NPN type bipolar transistor BT composed of a collector layer made of an N-well 11, a base layer made of a P+ type Si layer 12A formed in... Agent: Morrison & Foerster LLP

20100308343 - Silicon carbide semiconductor device: According to the embodiment, a semiconductor device includes an SiC substrate of a first or second conductivity type. An SiC layer of the first conductivity type is formed on a front surface of the substrate, a first SiC region of the second conductivity type is formed on the SiC layer,... Agent: Ohlandt, Greeley, Ruggiero & Perle, LLP

20100308345 - Light sensing system: A light sensing system comprises a first light sensor (21′), a second light sensor (21) and a first light shielding material (24) disposed over the first light sensor (21′) but not over the second light sensor (21) so as to block ambient light from being incident on the first light... Agent: Mark D. Saralino ( Sharp ) Renner, Otto, Boisselle & Sklar, LLP

20100308351 - Display device and method for manufacturing the same: A display device having a base substrate provided with light-emitting devices and terminal electrodes connected thereto; a sealing substrate disposed to face the base substrate; a first resin material between the base substrate and the sealing substrate so as to surround a first region in which the light-emitting devices are... Agent: Snr Denton US LLP

20100308350 - Led chip-based lighting products and methods of building: Light-emitting diode (LED) chip-based lighting products and methods of manufacture include patterning conductors on an inside surface of a panel, mounting a plurality of unpackaged LED chips directly on the conductors, and integrating the panel with support structure to form the lighting product such that an outside surface of the... Agent: Lathrop & Gage LLP

20100308347 - Light emitting device: A light emitting device includes a plurality of micro diodes, which are electrically connected to constitute a bridge rectifier circuit. Each branch of the bridge rectifier circuit includes a single micro diode or a plurality of micro diodes. The light emitting device is electrically connected to an AC power source,... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100308348 - Light-emitting device and the manufacturing method thereof: The disclosure provides a light-emitting device comprising a light-emitting epitaxy structure. The light-emitting epitaxy structure has a modulus of a critical reverse voltage not less than 50 volts while the light-emitting epitaxy structure is reverse-biased at a current density of −10 μA/mm2, and has a luminous efficiency not less than... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100308346 - Light-emitting diode and module thereof: A light-emitting diode module includes a transparent base, a support and a plurality of light-emitting chips. The base has a plurality of cavities separated from each other by a predetermined distance in order to respectively receive the light-emitting chips to form light-exiting areas. The base has a reflecting portion opposite... Agent: Rabin & Berdo, PC

20100308349 - Light-emitting diode, method for making light-emitting diode, integrated light-emitting diode and method for making integrated light-emitting diode, method for growing a nitride-based iii-v group compound semiconductor, light source cell unit, light-emitt: A light-emitting diode with (a) a substrate having at least one recessed portion on one main surface; (b) a sixth nitride-based III-V group compound semiconductor layer grown on the substrate without forming a space in the recessed portion; and (c) a third nitride-based III-V group compound semiconductor layer of a... Agent: Snr Denton US LLP

20100308352 - Carrier structure for mounting led chips: A carrier structure for mounting at least an LED chip includes at least a lead and a base. The LED chip housed inside the base is coupled parallel with an electronic element. The lead is connected electrically to the LED chip at one end, while another end is exposed to... Agent: Rosenberg, Klein & Lee

20100308353 - Double sided organic light emitting diode (oled): The invention relates to a double sided light emitting diode device (1) comprising a transparent substrate layer (2) with a layer system, featuring at least a first emitting layer (3) and at least a second emitting layer (4).... Agent: Philips Intellectual Property & Standards

20100308365 - Compound semiconductor light emitting diode: Disclosed is a compound semiconductor light emitting diode 101 including: a device structure portion 10 formed on a transparent base portion 25, the device structure portion 10 including a compound semiconductor layer having a first conductivity type, a light emitting layer 13 made of mixed crystals of aluminum phosphide gallium... Agent: Sughrue Mion, PLLC

20100308359 - High light extraction efficiency solid state light sources: A solid state light source includes a substrate having a top surface and a bottom surface, and at least one optically active layer on the top surface of the substrate. At least one of the top surface, the bottom surface, the optically active layer or an emission surface on the... Agent: Jetter & Associates, P.A.

20100308354 - Led with remote phosphor layer and reflective submount: A light emitting device comprises a flip-chip light emitting diode (LED) die mounted on a submount. The top surface of the submount has a reflective layer. Over the LED die is molded a hemispherical first transparent layer. A low index of refraction layer is then provided over the first transparent... Agent: Philips Intellectual Property & Standards

20100308363 - Light emitting device having light extraction structure and method for manufacturing the same: A light emitting device having a light extraction structure, which is capable of achieving an enhancement in light extraction efficiency and reliability, and a method for manufacturing the same. The light emitting device includes a semiconductor layer having a multi-layered structure including a light emission layer; and a light extraction... Agent: Birch Stewart Kolasch & Birch

20100308358 - Light emitting device, light emitting device package and lighting system having the same: Embodiments relate to a light emitting device and a light emitting device package having the same. The light emitting device a light emitting structure including a first conductive type semiconductor layer including a first semiconductor layer and a second semiconductor layer under the first semiconductor layer, an active layer under... Agent: Ked & Associates, LLP

20100308355 - Light-emitting device having a thinned structure and the manufacturing method thereof: A semiconductor light-emitting device having a thinned structure comprises a thinned structure formed between a semiconductor light-emitting structure and a carrier. The manufacturing method comprises the steps of forming a semiconductor light-emitting structure above a substrate; attaching the semiconductor light-emitting structure to a support; thinning the substrate to form a... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100308360 - Nitride semiconductor light emitting device: A nitride semiconductor light emitting device includes a first coat film of aluminum nitride or aluminum oxynitride formed at a light emitting portion and a second coat film of aluminum oxide formed on the first coat film. The thickness of the second coat film is at least 80 nm and... Agent: Harness, Dickey & Pierce, P.L.C

20100308356 - Optoelectronic component: An optoelectronic component comprising the following features is disclosed, at least one semiconductor body (1) provided for emitting electromagnetic radiation of a first wavelength range, an inner radiation-permeable shaped body (2), into which the semiconductor body (1) is embedded, a wavelength-converting layer (6) on an outer side (5) of the... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100308362 - Optoelectronic component: An optoelectronic component (10) comprising at least one metal body (15) and a layer sequence (17), which is applied on a base body (11) and which is embodied to emit an electromagnetic radiation and to which an insulation (12) is applied on at least one side area, wherein the at... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100308357 - Semiconductor light emitting element and method for manufacturing the same: A light-emitting element (10) is provided with a thin-film crystal layer which includes a buffer layer (22), a first-conductivity-type semiconductor layer, an active structure (25) and a second-conductivity-type semiconductor layer. In the thin-film crystal layer, at least a part of the second-conductivity-type semiconductor layer is covered with an insulating film.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100308364 - Side-view light emitting diode package having a reflector: Disclosed herein is a side-view light emitting diode package with a reflector. The side-view light emitting diode package of the present invention comprises first and second lead terminals spaced apart from each other. The package body supports the first and second lead terminals and has an elongated opening through which... Agent: H.c. Park & Associates, PLC

20100308361 - Wavelength conversion chip for use with light emitting diodes and method for making same: A wavelength conversion chip is formed by depositing a wavelength conversion material on a substrate to form a layer, removing the resulting wavelength conversion layer from the substrate and then segmenting the wavelength conversion layer into a plurality of wavelength conversion chips. The wavelength conversion material can be annealed by... Agent: William Propp, Esq. Goldeneye, Inc.

20100308368 - Method of fabricating vertical structure leds: A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal semiconductor processing techniques. Trenches that define the boundaries of the individual devices are then formed through the semiconductor layers and into the insulating substrate,... Agent: Mckenna Long & Aldridge LLP

20100308367 - Method of forming a dielectric layer on a semiconductor light emitting device: A semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region is formed. A first metal contact is formed on a portion of the n-type region and a second metal contact is formed on a portion of the p-type region. The first and second... Agent: Philips Intellectual Property & Standards

20100308366 - Nitride semiconductor light emitting device including electrodes of a multilayer structure: A nitride semiconductor LED comprises a substrate; an n-type nitride semiconductor layer formed on the substrate; an active layer formed on a predetermined region of the n-type nitride semiconductor layer; a p-type nitride semiconductor layer formed on the active layer; a p-electrode formed on the p-type nitride semiconductor layer; and... Agent: Mcdermott Will & Emery LLP

20100308369 - Light emitting device including semiconductor nanocrystals: A light emitting device can have a layered structure and include a plurality of semiconductor nanocrystals. The layers of the device can be covalently bonded to each other. The device can include continuous chain of covalent bonds extending from the first electrode to the second electrode.... Agent: Steptoe & Johnson LLP

20100308370 - Insulated gate bipolar transistor (igbt) with monolithic deep body clamp diode to prevent latch-up: A trench insulation gate bipolar transistor (IGBT) power device with a monolithic deep body clamp diode comprising a plurality of trench gates surrounded by emitter regions of a first conductivity type near a top surface of a semiconductor substrate of the first conductivity type encompassed in base regions of a... Agent: Bo-in Lin

20100308372 - Photoelectric conversion device, production method thereof and imaging device: wherein λL1, λL2, λM1 and λM2 are the wavelength at an absorption intensity of ½ of the maximum absorption intensity in the wavelength range of from 400 to 800 nm, each of λL1 and λL2 represents the wavelength in a chloroform solution spectrum when the photoelectric conversion material is dissolved... Agent: Studebaker & Brackett PC

20100308371 - Tetra-lateral position sensing detector: The present invention is directed to a position sensing detector made of a photodiode having a semi insulating substrate layer; a buffered layer that is formed directly atop the semi-insulating substrate layer, an absorption layer that is formed directly atop the buffered layer substrate layer, a cap layer that is... Agent: Novel Ip

20100308373 - Field-effect transistor: A field-effect transistor provided with a substrate, a channel layer, a carrier supply layer, a source electrode, a drain electrode, a gate electrode, a first insulating layer that is laminated on the carrier supply layer between the source electrode and the drain electrode, and suppresses current collapse, an opening that... Agent: Birch Stewart Kolasch & Birch

20100308374 - Strained channel transistor structure and method: A transistor device structure comprising: a substrate portion formed from a first material; and a source region, a drain region and a channel region formed in said substrate, the source and drain regions comprising a plurality of islands of a second material different from the first material, the islands being... Agent: HorizonIPPte Ltd

20100308375 - Rare earth enhanced high electron mobility transistor and method for fabricating same: According to one embodiment, a high electron mobility transistor (HEMT) comprises an insulator layer comprising a first group III-V intrinsic layer doped with a rare earth additive. The HEMT also comprises a second group III-V intrinsic layer formed over the insulator layer, and a group III-V semiconductor layer formed over... Agent: Farjami & Farjami LLP

20100308376 - Semiconductor wafer, semiconductor wafer manufacturing method, and electronic device: A high-quality GaAs-type crystal thin film using an inexpensive Si wafer with good thermal release characteristics is achieved. Provided is a semiconductor wafer comprising an Si wafer; an inhibiting layer that is formed on the wafer and that inhibits crystal growth, the inhibiting layer including a covering region that covers... Agent: Sughrue Mion, PLLC

20100308377 - Semiconductor integrated circuit: A semiconductor integrated circuit is provided which entails no increase in the correction time of OPC and in which non-uniformity in the gate lengths due to the optical proximity effects is surely suppressed. A plurality of standard cells (C1, C2, C3, . . . ), each including gates G extended... Agent: Mcdermott Will & Emery LLP

20100308378 - Insb-based switching device: The present invention provides an InSb-based switching device operating at room temperature by using a magnetic field controlled avalanche process for applying to magneto-logic elements. A switching device of one embodiment includes a p-type semiconductor layer; an n-type semiconductor layer; and contact layers disposed on one of the p-type and... Agent: Dugan & Dugan, P.C.

20100308380 - Dual damascene processing for gate conductor and active area to first metal level interconnect structures: A method of forming a semiconductor device includes forming a first interlevel dielectric (ILD) layer over one or more transistor structures formed on a substrate, the one or more transistor structures including an active area, source/drain contact and a gate conductor formed over the substrate; forming a first metal (M1)... Agent: Cantor Colburn LLP-ibm Yorktown

20100308381 - Finfet structures with stress-inducing source/drain-forming spacers and methods for fabricating the same: Methods for fabricating FinFET structures with stress-inducing source/drain-forming spacers and FinFET structures having such spacers are provided herein. In one embodiment, a method for fabricating a FinFET structure comprises fabricating a plurality of parallel fins overlying a semiconductor substrate. Each of the fins has sidewalls. A gate structure is fabricated... Agent: Ingrassia Fisher & Lorenz, P.C. (gf)

20100308379 - Methods for forming a transistor with a strained channel: A semiconductor device and method for fabricating a semiconductor device providing reduced short channel effects is disclosed. The method comprises providing a substrate comprising a first material; forming at least one gate stack over the substrate; forming one or more recesses in the substrate, wherein the one or more recesses... Agent: Haynes And Boone, LLPIPSection

20100308383 - Semiconductor device having a porous insulation layer with a permeation prevention layer coating the pores and method for manufacturing the same: A semiconductor device having a porous insulation layer with a permeation prevention layer coating the pores for use in protecting against hydrogen permeation into source and drain areas is presented. The semiconductor device includes a conductive pattern, an insulation layer, and a permeation prevention layer. The conductive pattern is formed... Agent: Ladas & Parry LLP

20100308382 - Semiconductor structures and methods for reducing silicon oxide undercuts in a semiconductor substrate: Methods are provided for fabricating semiconductor structures with an etch resistant layer that reduces undercuts in a silicon oxide layer of a semiconductor substrate. The semiconductor substrate is provided having the silicon oxide layer. The etch resistant layer is formed which uses at least a portion of the silicon oxide... Agent: Ingrassia Fisher & Lorenz, P.C. (gf)

20100308384 - Metal oxide semiconductor (mos) solid state imaging device that includes a surface layer formed by implanting a high concentration of impurity during creation of a photodiode, and manufacturing method thereof: A photodiode has a carrier accumulation layer of a second conductivity type and a surface area of a first conductivity type deposited in order from an inside towards a surface of a first conductivity type well region. A transfer transistor is formed so that a transfer gate electrode of the... Agent: Mcdermott Will & Emery LLP

20100308385 - Semiconductor device and a method of manufacturing the same, and solid-state image pickup element: Disclosed herein is a semiconductor device having a vertical MOS transistor having a channel of a first conductivity type and formed by burying a gate electrode in a semiconductor substrate, a planar MOS transistor having a channel of the first conductivity and having a gate electrode formed on the semiconductor... Agent: Snr Denton US LLP

20100308386 - Solid state image pickup device and method of producing solid state image pickup device: Forming a back-illuminated type CMOS image sensor, includes process for formation of a registration mark on the wiring side of a silicon substrate during formation of an active region or a gate electrode. A silicide film using an active region may also be used for the registration mark. Thereafter, the... Agent: Robert J. Depke Lewis T. Steadman

20100308387 - Solid state imaging device: A solid state imaging device having a light receiving region on a first surface side of a semiconductor substrate, incident light from an object to be imaged being illuminated on a second surface side of the semiconductor substrate, the solid state imaging device including an impurity diffusion layer formed on... Agent: Mcginn Intellectual Property Law Group, PLLC

20100308388 - Semiconductor device and method of manufacturing the same: Provided are a semiconductor device and a method of manufacturing the semiconductor device, for example, a semiconductor device using carbon nanotubes or nanowires as lower electrodes of a capacitor, and a method of manufacturing the semiconductor device. The semiconductor device may include a lower electrode including a plurality of tubes... Agent: Harness, Dickey & Pierce, P.L.C

20100308389 - Discrete trap non-volatile multi-functional memory device: A multiple layer tunnel insulator is fabricated between a substrate and a discrete trap layer. The properties of the multiple layers determines the volatility of the memory device. The composition of each layer and/or the quantity of layers is adjusted to fabricate either a DRAM device, a non-volatile memory device,... Agent: Leffert Jay & Polglaze, P.A. Attn: Thomas W. Leffert

20100308390 - Memory cell suitable for dram memory: The present invention relates to a memory cell with a memory capacitor (110) on an active semiconductor region (104), the memory capacitor having a first capacitor-electrode layer, which, in a cross-sectional view of the memory cell, has first (218.1) and second (218.2) electrode-layer sections that extend on the active semiconductor... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100308391 - Semiconductor device: Provided are a semiconductor device and a method of fabricating the same. At least one mold structure defining at least one first opening is formed on a substrate, wherein the mold structure comprises first mold patterns and second mold patterns that are sequentially and alternatingly stacked. Thereafter, side surfaces of... Agent: Myers Bigel Sibley & Sajovec

20100308392 - Nonvolatile semiconductor storage device: A control gate of a nonvolatile semiconductor storage device includes a first side surface on a side near a floating gate, a second side surface opposite to the first side surface, a silicide region formed in an upper portion of the control gate above the first side surface, and a... Agent: Young & Thompson

20100308395 - Nonvolatile memory device and method of manufacturing the same: A method of manufacturing a nonvolatile memory device comprises forming a gate insulating layer and a first conductive layer over a semiconductor substrate that defines a first area in which selection lines will be formed and a second area in which word lines will be formed, performing an etch process... Agent: Marshall, Gerstein & Borun LLP

20100308393 - Semiconductor device and method of manufacturing the same: A semiconductor device including a semiconductor substrate having an active region isolated by an element isolation insulating film; a floating gate electrode film formed on a gate insulating film residing on the active region; an interelectrode insulating film formed above an upper surface of the element isolation insulating film and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100308394 - Semiconductor storage device and manufacturing method: A semiconductor storage device includes a semiconductor substrate having a first region of a first conductivity type in between respective regions of an opposite conductivity type, at least the first region being covered by a first dielectric layer, a polysilicon floating gate placed on the first dielectric layer over the... Agent: Haynes And Boone, LLPIPSection

20100308396 - Gate patterns of nonvolatile memory device and method of forming the same: A method of forming gate patterns of a nonvolatile memory device comprises forming stack patterns each having an insulating layer and a conductive layer stacked over a semiconductor substrate, and forming an anti-oxidation layer on sidewalls of the insulating layer by selectively nitrifying the insulating layer.... Agent: Marshall, Gerstein & Borun LLP

20100308398 - Flash memory device with an array of gate columns penetrating through a cell stack: A flash memory device includes a substrate; a cell stack having a semiconductor layer for providing junction areas and channel areas and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked; an array of gate columns, the gate... Agent: Marshall, Gerstein & Borun LLP

20100308397 - Semiconductor device and method for manufacturing the same: A method for manufacturing a semiconductor device includes forming an insulating film on a semiconductor region of a semiconductor substrate on which a MOS transistor is to be formed and patterning the insulating film; implanting an impurity into the semiconductor region through the patterned insulating film using a step of... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100308399 - Power semiconductor device: A power semiconductor device includes: a first semiconductor layer of the first conduction type; second semiconductor layers of the first conduction type and third semiconductor layers of the second conduction type alternately provided transversely on the first semiconductor layer; fourth semiconductor layers of the second conduction type provided on the... Agent: Patterson & Sheridan, L.L.P.

20100308401 - Power semiconductor device: A semiconductor layer has a first layer of first conductive type, a second layer of second conductive type, and a third layer. The third layer has a first region of first conductive type, and a second region of second conductive type. A second electrode is in contact with each of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100308400 - Semiconductor power switches having trench gates: A method of fabricating a trench device includes forming a first trench and forming a hardmask layer on sidewalls of the trench. A second trench may be etched narrower than the first trench, into the bottom of the first trench. A dielectric material may be grown to substantially fill the... Agent: Groover & Associates

20100308402 - 3d channel architecture for semiconductor devices: Semiconductor devices and methods for making such devices that contain a 3D channel architecture are described. The 3D channel architecture is formed using a dual trench structure containing with a plurality of lower trenches extending in an x and y directional channels and separated by a mesa and an upper... Agent: Kenneth E. Horton Kirton & Mcconkle

20100308403 - Transistor having vertical channel: A semiconductor device including vertical channel transistor and a method for forming the transistor, which can significantly decrease the resistance of a word line is provided. A vertical channel transistor includes a substrate including pillars each of which has a lower portion corresponding to a channel region. A gate insulation... Agent: Townsend And Townsend And Crew, LLP

20100308404 - Field-effect transistor and method for producing a field-effect transistor: A semiconductor body (10) comprises a field-effect transistor (11). The field-effect transistor (11) comprises a drain region (12) of a first conduction type, a source region (13) of the first conduction type, a drift region (16) and a channel region (14) of a second conduction type which is opposite to... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100308405 - Mosfet on silicon-on-insulator with internal body contact: A semiconductor device is disclosed that includes a semiconductor-on-insulator substrate including a buried insulator layer and an overlying semiconductor layer. Source extension and drain extension regions are formed in the semiconductor layer. A deep drain region and a deep source region are formed in the semiconductor layer. A drain metal-semiconductor... Agent: Fleit Gibbons Gutman Bongini & Bianco P.l.

20100308406 - Thin film transistor: A thin film transistor is provided. The thin film transistor includes a gate, at least an inorganic material layer, at least one dielectric layer, a source, a drain, and an active layer. The active layer is located on the substrate. The source and the drain cover a part of the... Agent: Jianq Chyun Intellectual Property Office

20100308407 - Recessed gate dielectric antifuse: A recessed dielectric antifuse device includes a substrate and laterally spaced source and drain regions formed in the substrate. A recess is formed between the source and drain regions. A gate and gate oxide are formed in the recess and lightly doped source and drain extension regions contiguous with the... Agent: Wells St. John P.s.

20100308408 - Apparatus and method to fabricate an electronic device: An apparatus and method to fabricate an electronic device is disclosed. In a particular embodiment, an apparatus includes a template having an imprint surface. The imprint surface includes a first region having a first pattern adapted to fabricate a fin field effect transistor (FinFET) device and a second region having... Agent: Qualcomm Incorporated

20100308409 - Finfet structures with fins having stress-inducing caps and methods for fabricating the same: FinFET structures with fins having stress-inducing caps and methods for fabricating such FinFET structures are provided. In an exemplary embodiment, a method for forming stressed structures comprises forming a first stress-inducing material overlying a semiconductor material and forming spacers overlying the first stress-inducing material. The first stress-inducing material is etched... Agent: Ingrassia Fisher & Lorenz, P.C. (gf)

20100308411 - Method for forming an integrated circuit level by sequential tridimensional integration: A method for forming a level of a tridimensional structure on a first support in which components are formed, including the steps of forming, on a second semiconductor support, a single-crystal semiconductor substrate with an interposed thermal oxide layer; placing the free surface of the single-crystal semiconductor substrate on the... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20100308410 - Transistor level routing: System and method for transistor level routing is disclosed. A preferred embodiment comprises a semiconductor device including a first semiconductor device formed on a first active area in a substrate, the first semiconductor device having a first gate stack comprising a first high-k dielectric layer, a first metal layer and... Agent: Slater & Matsil, L.L.P.

20100308413 - 3-d single gate inverter: A 3-D (Three Dimensional) inverter having a single gate electrode. The single gate electrode has a first gate dielectric between the gate electrode and a body of a first FET (Field Effect transistor) of a first doping type, the first FET having first source/drain regions in a semiconductor substrate, or... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20100308415 - Analogue thin-oxide mosfet: A dual gate oxide CMOS technology providing three types of transistor; a thin oxide device, a thick oxide device, and a thin oxide device using the implant type of the thick oxide device for providing improved analogue performance.... Agent: C/o Greenberg Traurig, LLP

20100308414 - Cmos inverter device: A CMOS inverter formed with narrowly spaced fins structures including transistors formed on sidewalls of each fin structure. A high-k dielectric material is deposited on the fins to provide mechanical stability to the fins and serve as a gate dielectric material. A mid gap metal gate layer may be formed... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20100308412 - Control of flatband voltages and threshold voltages in high-k metal gate stacks and structures for cmos devices: A high-k metal gate stack and structures for CMOS devices and a method for forming the devices. The gate stack includes a high-k dielectric having a high dielectric constant greater than approximately 3.9, a germanium (Ge) material layer interfacing with the high-k dielectric, and a conductive electrode layer disposed above... Agent: Cantor Colburn LLP-ibm Yorktown

20100308416 - Method of fabricating an integrated circuit with gate self-protection, and an integrated circuit with gate self-protection: An integrated circuit with gate self-protection comprises a MOS device and a bipolar device, wherein the integrated circuit further comprises a semiconductor layer with electrically active regions in which and on which the MOS device and the bipolar device are formed and electrically inactive regions for isolating the electrically active... Agent: Texas Instruments Incorporated

20100308417 - Semiconductor memory device: In a full CMOS SRAM having a lateral type cell (memory cell having three partitioned wells arranged side by side in a word line extending direction and longer in the word line direction than in the bit line direction) including first and second driver MOS transistors, first and second load... Agent: Mcdermott Will & Emery LLP

20100308418 - Semiconductor devices and methods of manufacture thereof: Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes a first transistor having a gate dielectric and a cap layer disposed over the gate dielectric. The first transistor includes a gate including a metal layer disposed over the cap layer and a semiconductive... Agent: Slater & Matsil, L.L.P.

20100308419 - Sram cell with t-shaped contact: An integrated circuit containing an array of SRAM cells with T-shaped contacts in the inverters, in which drain connecting segments may extend beyond gate connecting segments by a distance greater than 10 percent of a separation distance between ends of opposite drain connecting segments. The drain connecting segments may also... Agent: Texas Instruments Incorporated

20100308421 - Semiconductor device: The size of a semiconductor device is reduced. A semiconductor chip in which a power MOSFET is placed above a semiconductor chip in which another power MOSFET is formed and they are sealed with an encapsulation resin portion. The semiconductor chips are so arranged that the upper semiconductor chip does... Agent: Mattingly & Malur, P.C.

20100308422 - Semiconductor device: The object to provide a highly-integrated SGT-based SRAM is achieved by forming an SRAM using an inverter which comprises a first island-shaped semiconductor layer, a first gate dielectric film in contact with a periphery of the first island-shaped semiconductor layer, a first gate electrode having one surface in contact with... Agent: Cantor Colburn LLP

20100308420 - Semiconductor device and manufacturing method of semiconductor device: A semiconductor device includes a memory transistor including a first side wall insulating film and a second side wall insulating film disposed on the outside; a high-voltage transistor including a third side wall insulating film having the same composition as that of the first side wall insulating film, and a... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100308423 - Mems device and manufacturing method thereof: A MEMS device includes: a movable element supported by a supporting member on a substrate; an encapsulation structure provided above the substrate so as to encapsulate the movable element; and a fin that is made of an insulation film, provided above the substrate, and provided inside of the encapsulation structure... Agent: Turocy & Watson, LLP

20100308424 - Triple-axis mems accelerometer having a bottom capacitor: An integrated circuit structure includes a substrate having a top surface; a first conductive layer over and contacting the top surface of the substrate; a dielectric layer over and contacting the first conductive layer, wherein the dielectric layer includes an opening exposing a portion of the first conductive layer; and... Agent: Slater & Matsil, L.L.P.

20100308425 - Mems device and process: A MEMS device comprises a back-plate (7) having an inner portion (7a) and an outer portion (7b), the inner portion (7a) connected to the outer portion (7b) by a sidewall (7c). A raised section or anchor ring (60) is formed in the outer portion (7b) the back-plate, in a region... Agent: Dickstein Shapiro LLP

20100308426 - Pressure measuring device: A pressure measuring device having a pedestal, an intermediate piece of semiconductor arranged on the pedestal and, connected with the pedestal and arranged on the intermediate piece and connected with the intermediate piece, a semiconductor pressure sensor having a support and a measuring membrane, or diaphragm. The pressure measuring device... Agent: Bacon & Thomas, PLLC

20100308427 - Image sensors with light guides: An image sensor may be formed from a planar semiconductor substrate. The image sensor may have an array of pixels. Each pixel may have a photosensitive element that is formed in the substrate and may have a light guide in a dielectric stack that guides light from a microlens and... Agent: Treyz Law Group

20100308428 - Semiconductor light receiving element and optical communication device: A semiconductor light receiving element comprises: a substrate, a semiconductor layer of a first conductivity type formed on the substrate, a non-doped semiconductor light absorbing layer formed on the semiconductor layer of the first conductivity type, a semiconductor layer of a second conductivity type formed on the non-doped semiconductor light... Agent: Mr. Jackson Chen

20100308429 - Flexible lateral pin diodes and three-dimensional arrays and imaging devices made therefrom: Flexible lateral p-i-n (“PIN”) diodes, arrays of flexible PIN diodes and imaging devices incorporating arrays of PIN diodes are provided. The flexible lateral PIN diodes are fabricated from thin, flexible layers of single-crystalline semiconductor. A plurality of the PIN diodes can be patterned into a single semiconductor layer to provide... Agent: Bell & Manning, LLC

20100308431 - Mechanical isolation for mems electrical contacts: In accordance with the disclosure, a MEMS substrate is provided that includes: a central planar portion configured to support a MEMS device; and a first electrical pad coplanar with the central planar portion, the first pad being connected to the central planar portion through a first flexure, wherein the first... Agent: Haynes And Boone, LLP

20100308430 - Semiconductor device and method of manufacturing the same: A semiconductor device comprises a semiconductor substrate, and a multilayer wiring structure arranged on the semiconductor substrate, the multilayer wiring structure including a plurality of first electrically conductive lines, an insulating film covering the plurality of first electrically conductive lines, and a second electrically conductive line arranged on the insulating... Agent: Fitzpatrick Cella Harper & Scinto

20100308432 - Semiconductor structure for the production of a carrier wafer contact in a trench-insulated soi disk: Disclosed is a semiconductor structure for producing a handle wafer contact in trench insulated SOI discs which may be used as a deep contact (7, 6, 30′) to the handle wafer (1) of a thick SOI disc as well as for a trench insulation (40). Therein, the same method steps... Agent: Hunton & Williams LLP Intellectual Property Department

20100308433 - Semiconductor device and method of manufacturing same: A semiconductor device includes an etching protection layer to protect a metal layer in a bonding pad area when a metal fuse is etched.... Agent: Volentine & Whitt PLLC

20100308434 - Semiconductor device and semiconductor device manufacturing method: A semiconductor device includes a pair of electromagnetically coupled inductors. Each of the inductors is comprised of a plurality of through electrodes which extend through a semiconductor substrate, and wires which connect the plurality of through electrodes in series.... Agent: Sughrue Mion, PLLC

20100308435 - Through silicon via with embedded decoupling capacitor: A semiconductor die, having a substrate, includes a through silicon via. The through silicon via includes a decoupling capacitor having a first co-axial conductor, a second co-axial conductor, and a co-axial dielectric separating the first co-axial conductor from the second co-axial conductor. The decoupling capacitor is configured to provide local... Agent: Qualcomm Incorporated

20100308436 - Semiconductor device and manufacturing method thereof: The present invention provides a semiconductor device including a resistor which achieves reduction of a chip size and variations in resistance value, and a manufacturing method thereof. The semiconductor device includes: a resistor which is linearly formed above the silicon substrate, and made mainly of silicon; contact forming areas each... Agent: Greenblum & Bernstein, P.L.C

20100308437 - Method for producing group iii nitride-based compound semiconductor, wafer including group iii nitride-based compound semiconductor, and group iii nitrided-based compound semiconductor device: A mesa having a side surface having an off-angle of 45° or less from c-plane is formed in a a-plane main surface of a sapphire substrate. Subsequently, trimethylaluminum is supplied at 300° C. to 420° C., to thereby form an aluminum layer having a thickness of 40 Å or less.... Agent: Mcginn Intellectual Property Law Group, PLLC

20100308439 - Dual wavelength exposure method and system for semiconductor device manufacturing: A dual wavelength exposure system provides for patterning a resist layer formed on a wafer for forming semiconductor devices, using two exposure operations, one including a first radiation having a first wavelength and the other including a second radiation including a second wavelength. Different or the same lithography tool may... Agent: Duane Morris LLP (tsmc)IPDepartment

20100308441 - Marking co2 laser-transparent materials by using absorption-material-assisted laser processing: The present invention relates to a CO2 laser-transparent material having a mark on the surface thereof and the method for making the same. The method includes the following steps: providing a first substrate, which has a top surface and a bottom surface; providing a second substrate which has a top... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100308438 - Non-conformal masks, semiconductor device structures including the same, and methods: A method for fabricating semiconductor device structures includes forming a non-conformal mask over a surface of a substrate. Non-conformal mask material with a planar or substantially planar upper surface is formed on the surface of the substrate. The planarity or substantial planarity of the non-conformal material eliminates or substantially eliminates... Agent: Trask Britt, P.C./ Micron Technology

20100308440 - Semiconductor structures and methods for stabilizing silicon-comprising structures on a silicon oxide layer of a semiconductor substrate: Methods are provided for substantially preventing and filling overetched regions in a silicon oxide layer of a semiconductor substrate. The overetched regions may be formed as a result of overetching of the silicon oxide layer during etching of an overlying silicon-comprising material layer to form a silicon-comprising structure. An etch... Agent: Ingrassia Fisher & Lorenz, P.C. (gf)

20100308442 - Semiconductor device, semiconductor wafer and manufacturing method of the same: In a state where an adhesive tape is attached onto a main surface of a semiconductor wafer, a trench is formed in a rear surface of the semiconductor wafer. For forming the trench in the rear surface of the semiconductor wafer, after coating a resist film on the rear surface... Agent: Brundidge & Stanger, P.C.

20100308443 - Semiconductor device and method of forming an interconnect structure with tsv using encapsulant for structural support: A semiconductor device has a conductive via formed through in a first side of the substrate. A first interconnect structure is formed over the first side of the substrate. A semiconductor die or component is mounted to the first interconnect structure. An encapsulant is deposited over the first interconnect structure... Agent: Robert D. Atkins

20100308444 - Method of manufacturing an electronic device: In order to protect IMD layers, particularly low-k dielectrics, a protection film is formed on the sidewall of an opening in the IMD layers prior to etching a trench in the underlying silicon substrate. After etching the trench, such as through a TMAH wet etch, at least part of the... Agent: Slater & Matsil, L.L.P.

20100308445 - Semiconductor device and method of manufacturing semiconductor device: A semiconductor device includes a semiconductor layer stacked on a substrate, a stripe-shaped ridge formed on a surface of the semiconductor layer, and electrode formed on an upper surface of the ridge and a protective film disposed on each side of the ridge. The electrode includes a flat portion having... Agent: GlobalIPCounselors, LLP

20100308446 - Semiconductor device: The first layer is located on the first electrode and has the first conductivity type. The second layer is located on the first layer and has the second conductivity type. The third layer is located on the second layer. The second electrode is located on the third layer. The fourth... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100308447 - Semiconductor device: A semiconductor device includes at least a die carried by a substrate, a plurality of bond pads disposed on the die, a plurality of conductive components, and a plurality of bond wires respectively connected between the plurality of bond pads and the plurality of conductive components. The plurality of bond... Agent: North America Intellectual Property Corporation

20100308448 - Semiconductor device and method of manufacturing the same: A semiconductor device has a tab having a semiconductor chip fixed thereto, a plurality of inner leads, a plurality of outer leads formed integrally with the inner leads, a plurality of wires coupling the electrode pads of the semiconductor chip to the inner leads, and a molded body having the... Agent: Womble Carlyle Sandridge & Rice, PLLC

20100308450 - Integrated package: A device substrate has a device major surface, a semiconductor element on the device major surface, and electrically conductive device connectors extending across the device major surface. An interconnection substrate has an interconnection substrate having an interconnection major surface, the interconnection substrate defining at least one sealing recess recessed from... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20100308449 - Semiconductor packages and manufacturing method thereof: A manufacturing method of semiconductor package is provided. A carrier is provided. The chips are disposed on the carrier. The chips are encapsulated by a molding compound, so that the molding compound and the chips form a chip-redistribution encapsulant. The carrier is removed, so that the chip-redistribution encapsulant exposes the... Agent: Cooley LLP Attn: Patent Group

20100308451 - Wiring substrate and method of manufacturing the same: There is provided a wiring substrate. The wiring substrate includes: an insulating layer; first electrode pads having first exposed surfaces, the first exposed surfaces being exposed from the insulating layer; and second electrode pads having second exposed surfaces, the second exposed surfaces being exposed from the insulating layer. There is... Agent: Rankin, Hill & Clark LLP

20100308452 - Electronic module with feed through conductor between wiring patterns: The electronic module comprises a dielectric 1031 substrate having a first surface and a second surface and an installation cavity extending through the dielectric substrate and having a perimetrical side wall. The electronic module further comprises a first wiring layer 1032 on the first surface, a second wiring layer 1033... Agent: Seppo Laine Oy Joshua P. Wert

20100308453 - Integrated circuit package including a thermally and electrically conductive package lid: An integrated circuit package includes a thermally and electrically conductive package lid. The package lid may be in electrical communication with an electrically conductive pad connected to a power plane, ground plane, or signal route in the integrated circuit. The electrically conductive package lid may provide an electrical connection for... Agent: Honeywell/s&s Patent Services

20100308454 - Power semiconductor device package and fabrication method: A power semiconductor device package includes a conductive assembly including a connecting structure and a semiconductor die having an aperture formed therethrough, the aperture being sized and configured to spacedly receive the connecting structure. In an alternative embodiment, a power semiconductor device package includes a conductive assembly including a connecting... Agent: Schein & Cai LLP James Cai

20100308455 - Method for manufacturing hetero-bonded wafer: A method for manufacturing a hetero-bonded wafer having a large mismatch of thermal expansion coefficient comprises forming a wafer bonding means and an electrical interconnection means on at least one bonding surface of two wafers to be bonded with each other, forming grooves in the bonding surface of one wafer... Agent: Drinker Biddle & Reath LLP Attn: Patent Docket Dept.

20100308456 - Wafer-level, polymer-based encapsulation for microstructure devices: A device includes a first device structure having a semiconductor platform, and a second device structure having a microstructure spaced from the semiconductor platform. The device further includes a cable having a plurality of beams to couple the microstructure to the first device structure. Each beam of the plurality of... Agent: Marshall, Gerstein & Borun LLP

20100308457 - Semiconductor apparatus and manufacturing method of the same: Provided is a semiconductor apparatus that reduces on-resistance in wiring between a first electrode terminal and a second electrode terminal. The semiconductor apparatus includes the first electrode terminal, the second electrode terminal, and at least two wires that connect the first and second electrode terminals. At least two wires are... Agent: Mcginn Intellectual Property Law Group, PLLC

20100308459 - Semiconductor device and method of forming through hole vias in die extension region around periphery of die: A semiconductor wafer contains a plurality of semiconductor die. The semiconductor wafer is diced to separate the semiconductor die. The semiconductor die are transferred onto a carrier. A die extension region is formed around a periphery of the semiconductor die on the carrier. The carrier is removed. A plurality of... Agent: Robert D. Atkins

20100308458 - Semiconductor integrated circuit device: Circuit elements and wirings constituting a circuit, and first electrodes electrically connected to such a circuit are provided on one main surface of a semiconductor substrate. An organic insulating film is formed on the circuit except for openings on the surfaces of the first electrodes. First and second external connecting... Agent: Stanley P. Fisher Reed Smith LLP

20100308460 - Method of ball grid array package construction with raised solder ball pads: The present invention provides for a BGA solder ball interconnection to an outer conductive layer of a laminated circuit assembly having an underlying circuit layer. The invention includes a raised BGA solder ball pad substantially co-planar with the outer conductive layer, the raised pad having a raised face and a... Agent: Ibm Corp. C/o Thomas E. Tyson

20100308461 - Multi-chip semiconductor package: Semiconductor packages that contain multiple stacked chips and methods for making such semiconductor packages are described. The semiconductor packages contain a full land pad array and multiple chips that are stacked vertically. Some of the chips are separated by routing leads which are connected to the land pad array. The... Agent: Kenneth E. Horton Kirton & Mcconkle

20100308462 - Glass compositions used in conductors for photovoltaic cells: The invention relates to glass compositions useful in conductive pastes for silicon semiconductor devices and photovoltaic cells. The thick film conductor compositions include one or more electrically functional powders and one or more glass frits dispersed in an organic medium. The thick film compositions may also include one or more... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20100308463 - Interfacial capping layers for interconnects: Adhesive layers residing at an interface between metal lines and dielectric diffusion barrier (or etch stop) layers are used to improve electromigration performance of interconnects. Adhesion layers are formed by depositing a precursor layer of metal-containing material (e.g., material containing Al, Ti, Ca, Mg, etc.) over an exposed copper line,... Agent: Weaver Austin Villeneuve & Sampson LLP - Novl Attn.: Novellus Systems, Inc.

20100308464 - Semiconductor device and method for fabricating the same: A seal ring structure is formed through a multilayer structure of a plurality of dielectric films in a peripheral part of a chip region to surround the chip region. A dual damascene interconnect in which an interconnect and a plug connected to the interconnect are integrated is formed in at... Agent: Mcdermott Will & Emery LLP

20100308465 - Semiconductor device and method of manufacturing the same: There is provided a semiconductor device including: a circuit board formed by bonding a first and a second metal plates to both surfaces of an insulating substrate respectively, at least one semiconductor element to be bonded to an external surface of the first metal plate through a first solder, and... Agent: Arent Fox LLP

20100308467 - Semiconductor device and method of forming through hole vias in die extension region around periphery of die: A semiconductor wafer contains a plurality of semiconductor die. The semiconductor wafer is diced to separate the semiconductor die. The semiconductor die are transferred onto a carrier. A die extension region is formed around a periphery of the semiconductor die on the carrier. The carrier is removed. A plurality of... Agent: Robert D. Atkins

20100308466 - Semiconductor device and method of manufacturing semiconductor device: A semiconductor device includes a substrate; first and second semiconductor pillars; a first insulator; and a first wiring layer. The first and second semiconductor pillars are disposed over the substrate. The first and second semiconductor pillars may be aligned in a first direction. The first insulator may eclectically isolate the... Agent: Young & Thompson

20100308468 - Semiconductor device and semiconductor device fabrication method: In a semiconductor device made of a plurality of materials, if the device is fabricated through a step of cutting the bonded plurality of materials, a boundary line of the plurality of materials is exposed on a cutting plane. Internal stress in the cutting remains at this boundary line to... Agent: Mcdermott Will & Emery LLP

20100308471 - Electronic device and method for manufacturing the same: An electronic device includes: a first substrate; and a second substrate on which the first substrate is mounted and which is electrically connected to the first substrate in at least one predetermined area. The predetermined area includes at least two through vias running through the first substrate, and an interconnect... Agent: Mcdermott Will & Emery LLP

20100308469 - Method and apparatus of forming a via: The present disclosure provides a semiconductor device that includes, a substrate; a first conductive line located over the substrate and extending along a first axis, the first conductive line having a first length and a first width, the first length being measured along the first axis; a second conductive line... Agent: Haynes And Boone, LLPIPSection

20100308470 - Semiconductor device and inductor: A semiconductor device and an inductor are provided. The semiconductor device includes a top level interconnect metal layer (Mtop) pattern. A below-to-top level interconnect metal layer (Mtop−1) pattern is disposed directly below the top level interconnect metal layer pattern. A first via plug pattern is vertically disposed between the top... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100308472 - Semiconductor chip having power supply line with minimized voltage drop: Disclosed is a power supply line in which a voltage drop generated in a resistance component of a metal line which delivers a power voltage is minimized so that the level of the power supply voltage delivered to a semiconductor chip becomes constant in the entire area of the semiconductor... Agent: Jae Y. Park

20100308473 - Method for making an electrically conducting mechanical interconnection member: A method of fabricating an electrically conductive mechanical interconnection element (12) comprises: a first stage of electrochemically depositing a structure comprising a plurality of metal wires (2a) of sub-micrometric diameter projecting from the likewise metallic surface of a substrate (2); and a second stage of controlled partial dissolution of said... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100308474 - Semiconductor device and method for manufacturing the same: A substrate (1) and a semiconductor chip (5) are connected by means of flip-chip interconnection. Around connecting pads (3) of the substrate (1) and input/output terminals (10) of the semiconductor chip (5), an underfill material (7) is injected. The underfill material (7) is a composite material of filler and resin... Agent: Mr. Jackson Chen

20100308475 - Composite of at least two semiconductor substrates and a production method: A composite, including a first semiconductor substrate that is secured by soldering material to at least one second semiconductor substrate, a eutectic being formed between the soldering material and the second semiconductor substrate and/or at least one layer possibly provided on the semiconductor substrate. It is provided that the eutectic... Agent: Kenyon & Kenyon LLP

20100308476 - Method for manufacturing semiconductor device: A semiconductor chip is temporarily fixed on a circuit board by having a thermosetting adhesive film in between. A sealing resin film is provided with a mold release film, and a thermosetting sealing resin layer, which is laminated on the mold release film and has a film thickness 0.5 to... Agent: Oliff & Berridge, PLC

20100308477 - Epoxy resin composition for semiconductor encapsulation and semiconductor device using the same: The present invention relates to an epoxy resin composition for semiconductor encapsulation, which includes the following components (A) to (E): (A) a bifunctional epoxy resin, (B) a curing agent, (C) an imidazole compound represented by the formula (1), in which R1 and R2 each independently represent an alkyl group or... Agent: Sughrue-265550

20100301299 - Material and device properties modification by electrochemical charge injection in the absence of contacting electrolyte for either local spatial or final states: In some embodiments, the present invention is directed to processes for the combination of injecting charge in a material electrochemically via non-faradaic (double-layer) charging, and retaining this charge and associated desirable properties changes when the electrolyte is removed. The present invention is also directed to compositions and applications using material... Agent: Matheson Keys Garsson & Kordzik PLLC

20100301301 - Semiconductor memory device: There is offered a switching resistance RAM that is very much reduced in an occupied area and is highly integrated. Memory cells CEL11-CEL14 are formed corresponding to four intersections of word lines WL0 and WL1 and bit lines BL0 and BL1. Each of the memory cells CEL11-CEL14 are composed of... Agent: Morrison & Foerster LLP

20100301300 - Three-terminal metal-insulator transition switch, switching system including the same, and method of controlling metal-insulator transition of the same: Provided are a 3-terminal MIT switch which can easily control a discontinuous MIT jump and does not need a conventipnal gate insulating layer, a switching system including the 3-terminal MIT switch, and a method of controlling an MIT of the 3-terminal MIT switch. The 3-terminal MIT switch includes a 2-terminal... Agent: Rabin & Berdo, PC

20100301302 - Phase change memory device having buried conduction lines directly underneath phase change memory cells and fabrication method thereof: A phase change memory device having buried conduction lines directly underneath phase change memory cells is presented. The phase change memory device includes buried conduction lines buried in a semiconductor substrate and phase change memory cells arranged on top of the buried conductive lines. By having the buried conduction lines... Agent: Ladas & Parry LLP

20100301303 - Forming phase-change memory using self-aligned contact/via scheme: An integrated circuit structure includes a dielectric layer having an upper portion and a lower portion. The dielectric layer is either an inter-layer dielectric (ILD) or an inter-metal dielectric (IMD). A phase change random access memory (PCRAM) cell includes a phase change strip, wherein the phase change strip is on... Agent: Slater & Matsil, L.L.P.

20100301304 - Buried silicide structure and method for making: Methods for manufacturing buried silicide lines are described herein, along with high density stacked memory structures. A method for manufacturing an integrated circuit as described herein includes forming a semiconductor body comprising silicon. A plurality of trenches are formed in the semiconductor body to define semiconductor lines comprising silicon between... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20100301305 - Phase change memory device with alternating adjacent conduction contacts and fabrication method thereof: A phase change memory device and an associated method of making same are presented. The phase change memory device, includes first wiring lines, second wiring lines, memory cells, and conduction contacts. The first wiring lines are arranged substantially in parallel to each other so that the first wiring lines are... Agent: Ladas & Parry LLP

20100301307 - Plasmon enhanced light-emitting diodes: Embodiments of the present invention are directed to light-emitting diodes. In one embodiment of the present invention, a light-emitting diode comprises at least one quantum well sandwiched between a first intrinsic semiconductor layer and a second semiconductor layer. An n-type heterostructure is disposed on a surface of the first intrinsic... Agent: Hewlett-packard Company Intellectual Property Administration

20100301306 - Strain-controlled atomic layer epitaxy, quantum wells and superlattices prepared thereby and uses thereof: Processes for forming quantum well structures which are characterized by controllable nitride content are provided, as well as superlattice structures, optical devices and optical communication systems based thereon.... Agent: Martin D. Moynihan D/b/a Prtsi, Inc.

20100301308 - Photodetectors: Implementations of quantum well photodetectors are provided. In one embodiment, a quantum structure includes a first barrier layer, a well layer located on the first barrier layer, and a second barrier layer located on the well layer. A metal layer is located adjacent to the quantum structure.... Agent: Workman Nydegger 1000 Eagle Gate Tower

20100301309 - Lateral collection architecture for sls detectors: Lateral collection architecture for a photodetector is achieved by depositing electrically conducting SLS layers onto a planar substrate and diffusing dopants of a carrier type opposite that of the layers through the layers at selected regions to disorder the superlattice and create diode junctions oriented transversely to the naturally enhanced... Agent: Snell & Wilmer L.L.P. (teledyne)

20100301313 - Benzanthracene compound and organic electroluminescence device using the same: t

20100301314 - Conjugated compound, nitrogenated condensed-ring compound, nitrogenated condensed-ring polymer, organic thin film, and organic thin film element:

20100301316 - Light-emitting element, light-emitting device, electronic device, and lighting device: An object is to provide a light-emitting element in which suppression of a drive voltage increase is achieved. Another object is to provide a light-emitting device that has reduced power consumption by including such a light-emitting element. In a light-emitting element having an EL layer between an anode and a... Agent: Robinson Intellectual Property Law Office, P.C.

20100301317 - Light-emitting element, light-emitting device, electronic device, and lighting device: An object is to provide a light-emitting element capable of emitting light with a high luminance even at a low voltage, and having a long lifetime. The light-emitting element includes n EL layers between an anode and a cathode (n is a natural number of two or more), and also... Agent: Robinson Intellectual Property Law Office, P.C.

20100301320 - Method for fabricating organic optoelectronic devices: An organic optoelectronic device and a method for manufacturing the same are disclosed. In one aspect, the device has a stack of layers. The stack includes a buffer layer and a first organic semiconductor layer adjacent to the buffer layer at a first side of the buffer layer. The buffer... Agent: Knobbe Martens Olson & Bear LLP

20100301324 - Organic electro-luminescent display and method of fabricating the same: An organic electro-luminescent display and a method of fabricating the same include an organic light emitting diode, a driving transistor which drives the organic light emitting diode, and a switching transistor which controls an operation of the driving transistor, wherein active layers of the switching and driving transistors are crystallized... Agent: Cantor Colburn LLP

20100301312 - Organic electroluminescence device: An organic electroluminescence device including: an anode (10), a cathode (70), an emitting layer (40) including an organic compound, which is between the anode (10) and the cathode (70), two or more layers arranged in a hole injection and transport region which is between the anode (10) and the emitting... Agent: Foley And Lardner LLP Suite 500

20100301315 - Organic electroluminescence element: where L1 to L3 are each a single bond or a bridging group; R1 to R8 are each a hydrogen atom or a substituent, and at least one of R1 to R8 is a phenyl group or a cyano group; Ra and Rb are each a substituent; and n and... Agent: Sughrue Mion, PLLC

20100301318 - Organic electroluminescent device: An organic electroluminescence device including at least an anode, an emitting layer, an electron-transporting region and a cathode in sequential order, wherein the emitting layer contains a host and a dopant which gives fluorescent emission of which the main peak wavelength is 550 nm or less; the affinity Ad of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100301319 - Organic electroluminescent device: An organic electroluminescence device including an anode, an emitting layer, a blocking layer, an electron-injecting layer and a cathode in sequential order; wherein the emitting layer contains a host and a dopant which gives fluorescent emission of which the main peak wavelength is 550 nm or less; the affinity Ad... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100301323 - Organic memory device using iridium organometallic compound and fabrication method thereof: Disclosed are a composition comprising a mixture of at least one iridium organometallic compound and an electrically conductive polymer, an organic active layer comprising the same, an organic memory device comprising the organic active layer and methods for fabricating the same. The organic memory device may include a first electrode,... Agent: Harness, Dickey & Pierce, P.L.C

20100301311 - Organic semiconductor device: The organic semiconductor device including an organic thin film transistor comprising: a substrate (10); a gate electrode (12) disposed on the substrate (10); a first gate insulating film (15) disposed on the gate electrode (12); a second gate insulating film (17) disposed on the first gate insulating film (15); a... Agent: Rabin & Berdo, PC

20100301310 - Polymer and polymeric luminescent element employing the same: A conjugated polymer having a phenoxazine structure and a phenothiazine structure as subsituents.... Agent: Sughrue Mion, PLLC

20100301322 - Stilbene derivatives, light-emitting element, display device, and electronic device: A novel stilbene derivative is provided with motivation of providing a blue emissive material showing excellent color purity. The use of the stilbene derivative of the present invention allows the fabrication of a blue-emissive light-emitting element with excellent color purity. The invention also includes an electronic device equipped with a... Agent: Husch Blackwell Sanders, LLP Husch Blackwell Sanders LLP Welsh & Katz

20100301321 - Tunable diode: Tunable diodes and methods of making.... Agent: Fulbright & Jaworski L.L.P.

20100301327 - Display device having oxide thin film transistor and fabrication method thereof: A display device including an oxide thin film transistor (TFT) is disclosed. A nitride-based gate insulating layer of a gate pad area is etched when an oxide semiconductor layer of a pixel area is etched by using a half-tone mask, a metal layer is formed at a contact hole of... Agent: Brinks Hofer Gilson & Lione

20100301330 - Memory devices having an embedded resistance memory with metal-oxygen compound: Memory devices based on tungsten-oxide memory regions are described, along with methods for manufacturing and methods for programming such devices. The tungsten-oxide memory region can be formed by oxidation of tungsten material using a non-critical mask, or even no mask at all in some embodiments. A memory device described herein... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20100301325 - Oxide thin film transistor and method of fabricating the same: A method for fabricating a liquid crystal display (LCD) device include: forming a gate electrode on a substrate; forming a gate insulating layer on the substrate; forming a primary active layer having a tapered portion to a side of a channel region of the primary active layer on the gate... Agent: Morgan Lewis & Bockius LLP

20100301326 - Semiconductor device and manufacturing method thereof: As a display device has higher definition, the number of pixels is increased and thus, the number of gate lines and signal lines is increased. When the number of gate lines and signal lines is increased, it is difficult to mount IC chips including driver circuits for driving the gate... Agent: Robinson Intellectual Property Law Office, P.C.

20100301329 - Semiconductor device and manufacturing method thereof: An object is to provide a thin film transistor using an oxide semiconductor layer, in which contact resistance between the oxide semiconductor layer and source and drain electrode layers is reduced and electric characteristics are stabilized. Another object is to provide a method for manufacturing the thin film transistor. A... Agent: Robinson Intellectual Property Law Office, P.C.

20100301328 - Semiconductor device and method for manufacturing the same: Homogeneity and stability of electric characteristics of a thin film transistor included in a circuit are critical for the performance of a display device including said circuit. An object of the invention is to provide an oxide semiconductor film with low hydrogen content and which is used in an inverted... Agent: Robinson Intellectual Property Law Office, P.C.

20100301331 - Body contact structure for in-line voltage contrast detection of pfet silicide encroachment: Test structures for in-line voltage contrast detection of PFET silicide encroachment defects are disclosed. Embodiments of the present invention provide for improved PFET test structures for detecting encroachment defects using VC imaging techniques. The test structures use body contacts, and the PFET components (source, drain, body, and gate) are either... Agent: International Business Machines Corporation Dept. 18g

20100301332 - Detecting a fault state of a semiconductor arrangement: Disclosed is a method for detecting a mechanical fault state of a semiconductor arrangement, using a temperature profile.... Agent: Slater & Matsil, L.L.P.

20100301333 - Semiconductor device and method of inspecting an electrical characteristic of a semiconductor device: A semiconductor device is provided with an electrode pad; and a lower layer arranged under the electrode pad. The electrode pad includes a slit section, penetrating a whole thickness of the electrode pad from a higher surface to a lower surface in contact with the lower layer; a contact start... Agent: Foley And Lardner LLP Suite 500

20100301334 - Semiconductor integrated circuit device and manufacture thereof: In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for probe inspection at which bump electrodes (208) are not provided. Similar testing pads may... Agent: Mattingly & Malur, P.C.

20100301335 - High voltage insulated gate bipolar transistors with minority carrier diverter: High power insulated gate bipolar junction transistors are provided that include a wide band gap semiconductor bipolar junction transistor (“BJT”) and a wide band gap semiconductor MOSFET that is configured to provide a current to the base of the BJT. These devices further include a minority carrier diversion semiconductor layer... Agent: Myers Bigel Sibley & Sajovec, P.A.

20100301337 - Electronic device with self-aligned electrodes fabricated using additive liquid deposition: The invention provides a multilayer electronic device having electrodes, formed on a laterally extending first layer, the lateral position of each of at least two adjacent electrodes being defined by a channel in the first layer. Each channel is adjacent a deposition region, the material which forms each electrode substantially... Agent: Eastman Kodak Company Patent Legal Staff

20100301339 - Method of producing thin film transistor and thin film transistor: [Solving Means] In a method of producing a thin-film transistor according to the present invention, a solid-state green laser is irradiated onto a channel portion of an amorphous silicon film using a source electrode film and a drain electrode film as masks, thereby improving mobility. Since the channel portion of... Agent: Harness, Dickey & Pierce, P.L.C

20100301336 - Method to improve nucleation of materials on graphene and carbon nanotubes: Techniques for forming a thin coating of a material on a carbon-based material are provided. In one aspect, a method for forming a thin coating on a surface of a carbon-based material is provided. The method includes the following steps. An ultra thin silicon nucleation layer is deposited to a... Agent: Michael J. Chang, LLC

20100301338 - Thin film device, flexible circuit board including thin film device, and method for manufacturing thin film device: A thin film device includes: a substrate; an electric field shielding plate formed above the substrate, the electric filed shielding plate having a conductive material; and a thin film element formed on the electric field shielding plate, the, the electric field shielding plate being connected to a potential of any... Agent: Oliff & Berridge, PLC

20100301342 - Increased grain size in metal wiring structures through flash tube irradiation: A method for forming a wiring structure includes forming a metal layer on a substrate, and annealing the metal layer by irradiating the metal layer with light emitted from at least one flash tube, thereby growing crystalline grains of the metal layer.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100301341 - Thin film transistor array panel and manufacturing method thereof: The present invention relates to an OLED display and a manufacturing method thereof, including a substrate, a control electrode formed on the substrate, a polysilicon semiconductor formed on the control electrode, a data line including an input electrode at least partially overlapping the polysilicon semiconductor and an output electrode facing... Agent: Cantor Colburn LLP

20100301340 - Thin film transistors and arrays: Thin film transistors and arrays having controlled threshold voltage and improved ION/IOFF ratio are provided in this invention. In one embodiment, a thin film transistor having a first gate insulator of high breakdown field with positive fixed charges and a second gate insulator with negative fixed charges is provided; said... Agent: Cindy X. Qiu

20100301344 - Dielectric layer for an electronic device: A dielectric layer for an electronic device, such as a thin-film transistor, is provided. The dielectric layer comprises a molecular glass. The resulting dielectric layer is very thin, pure, and stable. Processes and compositions for fabricating such a dielectric layer are also disclosed.... Agent: Fay Sharpe / Xerox - Rochester

20100301343 - Metal oxynitride thin film transistors and circuits: Thin film transistors and circuits having improved mobility and stability are disclosed in this invention to have metal oxynitrides as the active channel layers. In one embodiment, the charge carrier mobility in the thin film transistors is increased by using the metal oxynitrides as the active channel layers. In another... Agent: Cindy X. Qiu

20100301345 - Array substrate and method for manufacturing the same: An array substrate and method for manufacturing the same is provided, wherein a data line is composed of first and second segments connected by a contact pad. First and second insulation layers are disposed between the first segment of the data line and a shielding electrode. In addition, the first... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100301346 - Thin film transistor and manufacturing method thereof, display device and manufacturing method thereof, and electronic appliance: A thin film transistor in which an effect of photo current is small and an On/Off ratio is high is provided. In a bottom-gate bottom-contact (coplanar) thin film transistor, a channel formation region overlaps with a gate electrode, a first impurity semiconductor layer is provided between the channel formation region... Agent: Nixon Peabody, LLP

20100301348 - Nitride semiconductor wafer, nitride semiconductor chip, and method of manufacture of nitride semiconductor chip: A nitride semiconductor chip is provided that offers enhanced luminous efficacy as a result of an improved EL emission pattern. The nitride semiconductor laser chip (nitride semiconductor chip) has an n-type GaN substrate having as a principal growth plane a plane having an off-angle in the a-axis direction relative to... Agent: Harness, Dickey & Pierce, P.L.C

20100301347 - Wafer bonding technique in nitride semiconductors: A semiconductor arrangement is provided that includes one or more substrate structures. One or more nitride-based material structures are used in fabricating nitride-based devices. One or more intermediary layers are interposed between the one or more substrate structures and the one or more nitride-based material structures. The one or more... Agent: Gauthier & Connors LLP Suite 2300

20100301349 - Wafer level led package structure for increasing light-emitting efficiency and heat-dissipating effect and method for manufacturing the same: A wafer level LED package structure includes a light-emitting unit, a reflecting unit, a first conductive unit and a second conductive unit. The light-emitting unit has a substrate body, a light-emitting body disposed on the substrate body, a positive and a negative conductive layers formed on the light-emitting body, and... Agent: Rosenberg, Klein & Lee

20100301351 - High voltage switching devices and process for forming same: The present invention relates to various switching device structures including Schottky diode, P—N diode, and P—I—N diode, which are characterized by low defect density, low crack density, low pit density and sufficient thickness (>2.5 um) GaN layers of low dopant concentration (<1E16 cm−3) grown on a conductive GaN layer. The... Agent: Intellectual Property / Technology Law

20100301350 - Semiconductor device and manufacturing method thereof: Recesses are formed in a pMOS region 2, and a SiGe layer is then formed so as to cover a bottom surface and a side surface of each of the recesses. Next, a SiGe layer containing Ge at a lower content than that in the SiGe layer is formed on... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100301352 - Interferometric fiber optic gyroscope with silicon optical bench front-end: Method and apparatus are provided for a silicon substrate optical system for use in an interferometric fiber optic gyroscope (IFOG). A silicon substrate of the silicon substrate optical system is etched to receive optical components, including an input optical fiber, a pump source, a wavelength division multiplier, an isolator, a... Agent: Honeywell/fogg Patent Services

20100301353 - Led lighting device having a conversion reflector: An LED lighting device is provided which may include at least one light-emitting diode and at least one conversion reflector, wherein the conversion reflector is configured to emit at least a portion of light emitted from the light-emitting diode at a converted wavelength, and wherein the conversion reflector covers the... Agent: Viering, Jentschura & Partner - Osr

20100301354 - Light emission device and display device using the same: A light emission device includes: a substrate body having a plurality of concave portions recessed into the substrate body and extending along a first direction; a plurality of first electrodes in the plurality of concave portions and extending along the first direction; a plurality of electron emission units on the... Agent: Christie, Parker & Hale, LLP

20100301355 - Optoelectronic component and production method for an optoelectronic component: An optoelectronic component includes a carrier element. At least two elements are arranged in an adjacent fashion on a first side of the carrier element. Each element has at least one optically active region for generating the electromagnetic radiation. The optoelectronic component has an electrically insulating protective layer arranged at... Agent: Slater & Matsil, L.L.P.

20100301356 - Light source having light emitting cells arranged to produce a spherical emission pattern: A light source includes a mount having first and second opposite surfaces, a first light emitting element having one or more solid state light emitting cells arranged to emit light from the first surface of the mount, and a second light emitting element having one or more solid state light... Agent: Arent Fox LLP

20100301369 - High efficiency light emitting diode (led) with optimized photonic crystal extractor: A high efficiency, and possibly highly directional, light emitting diode (LED) with an optimized photonic crystal extractor. The LED is comprised of a substrate, a buffer layer grown on the substrate (if needed), an active layer including emitting species, one or more optical confinement layers that tailor the structure of... Agent: Gates & Cooper LLP Howard Hughes Center

20100301364 - Light emission device: A light emission device and a display device including the same. The light emission device includes: a substrate body having a concave portion recessed into the substrate body and extending along a first direction; a first electrode in the concave portion and extending along the first direction; a second electrode... Agent: Christie, Parker & Hale, LLP

20100301371 - Light emitting device: A light emitting device can be characterized as including a light emitting diode configured to emit light and a phosphor configured to change a wavelength of the light. The phosphor substantially covers at least a portion of the light emitting diode. The phosphor includes a compound having a host material.... Agent: H.c. Park & Associates, PLC

20100301361 - Light emitting diode: A light emitting diode of the present invention comprises a support frame, a shell, a light emitting diode chip and an encapsulating body. The shell is used to accommodate the support frame. The shell has a bowl-shaped structure and the bowl-shaped structure has two opposite first walls and two opposite... Agent: Rabin & Berdo, PC

20100301365 - Light emitting diode module and manufacture method thereof: A manufacture method of light emitting diode (LED) module includes: providing a carrier board including a carrying area and a shaping area; arranging at least one substrate having at least one circuit layer in the carrying area of the carrier board; arranging at least one LED in the carrying area... Agent: Rosenberg, Klein & Lee

20100301359 - Light emitting diode package structure: An LED package structure with good heat dissipation, includes a metal plate having at least one recess, a heat-conducting insulating layer directly formed on a surface of the metal plate, a conductor layer directly formed on a surface of the heat-conducting insulating layer, at least one LED chip disposed on... Agent: Hdls Ipr Services

20100301357 - Light emitting element: The present invention discloses a light emitting element including a carrier, at least one light emitting chip, an adhesive and a first encapsulated layer. The light emitting chip is fixed onto the carrier by the adhesive, and most of the carrier and adhesive are made of a light absorbing material,... Agent: Jackson Intellectual Property Group PLLC

20100301373 - Light-emitting device: A light-emitting device of the present invention includes: a LED chip 10; a chip mounting member 70 having a conductive plate (heat transfer plate) 71 one surface side of which the LED chip 10 is mounted on and a conductor patterns 73, 73 which is formed on the one surface... Agent: Cheng Law Group, PLLC

20100301367 - Light-emitting device comprising a dome-shaped ceramic phosphor: Some embodiments provide a light-emitting device comprising: a light-emitting diode; a substantially transparent encapsulating material having a refractive index in the range of about 1.3 to about 1.8; a layer of low refractive index material having a refractive index in the range of about 1 to about 1.2; and a... Agent: Knobbe Martens Olson & Bear LLP

20100301360 - Lighting devices with discrete lumiphor-bearing regions on remote surfaces thereof: A lighting device includes a semiconductor light emitting device (LED) configured to emit light having a first peak wavelength upon the application of a voltage thereto, an element in adjacent, spaced-apart relationship with the LED, and a pattern of discrete lumiphor-containing regions on a surface of, or within, the element.... Agent: Myers Bigel Sibley & Sajovec, P.A.

20100301366 - Organic electro-luminescence device: According to one embodiment, an organic EL device includes an insulating substrate, an organic EL element including a pixel electrode arranged in an active area above the insulating substrate, an organic layer arranged on the pixel electrode, and an opposed electrode arranged on the organic layer, a wiring arranged in... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100301368 - Organic light emitting diode: Provided is an organic light emitting diode (OLED) including a substrate, a first electrode, a second electrode, and an organic layer disposed between the first and second electrodes. The first electrode includes an aluminum (Al)-based reflective film and a transparent conductive film that contacts the Al-based reflective film. The Al-based... Agent: Robert E. Bushnell & Law Firm

20100301370 - Photoelectric semiconductor device capable of generating uniform compound lights: A transparent layer and a phosphor layer are covered on the LED chip for increasing light emission efficiency and evenness of the LED. Based on angle-dependent emission strength of the LED chip, the phosphor layer is designed with different thickness or contains different phosphor powder concentration in different section. The... Agent: Kile Park Goekjian Reed & Mcmanus

20100301372 - Power surface mount light emitting die package: A light emitting die package includes a substrate, a reflector plate, and a lens. The substrate has traces for connecting an external electrical power source to a light emitting diode (LED) at a mounting pad. The reflector plate is coupled to the substrate and substantially surrounds the mounting pad, and... Agent: Jenkins, Wilson, Taylor & Hunt, P. A.

20100301362 - Semiconductor light emitting element: A semiconductor light emitting element includes a group III-V compound semiconductor layer, a first main surface and a second main surface, a reflection metal film formed on the second main surface, a front surface electrode formed on the first main surface, and an ohmic contact joint part formed between the... Agent: Mcginn Intellectual Property Law Group, PLLC

20100301358 - Semiconductor substrate, electronic device, optical device, and production methods therefor: The present invention provides a method for producing a semiconductor substrate, the method including reacting nitrogen (N) with gallium (Ga), aluminum (Al), or indium (In), which are group III elements, in a flux mixture containing a plurality of metal elements selected from among alkali metals and alkaline earth metals, to... Agent: Mcginn Intellectual Property Law Group, PLLC

20100301363 - Vertical resonator type light emitting diode: A novel vertical resonator type light emitting diode of which has a simplified structure of the reflector layer of its light emitting side an which is resistant to declination of its emission output power towards a high temperature range, has an active layer 5, and a first reflector layer 3... Agent: Masao Yoshimura, Chen Yoshimura LLP

20100301375 - Formulation for improved electrodes for electronic devices: A conductive electrode paste or ink formulation including a getter removes or reduces the concentration of the unwanted impurities in an electronic device. These reductions may happen during or immediately after the fabrication or sealing of the device, or they may occur after some activation time or event. Water, oxygen,... Agent: Pillsbury Winthrop Shaw Pittman LLP

20100301374 - Led package structure: An LED package structure includes a lead frame, an LED chip disposed on the lead frame, a fuse disposed on the lead frame and electrically connected to the lead frame, and an encapsulation. The fuse is electrically connected to the LED chip in series.... Agent: North America Intellectual Property Corporation

20100301376 - Side view type led package: In a side view type light emitting diode (LED) package, a lead frame portion and lead frame electrical contact portions are exposed outside a package body to serve as an additional heat dissipation path. The side view type LED package includes an LED chip, a package body having a side... Agent: H.c. Park & Associates, PLC

20100301377 - Curable organopolysiloxane composition and semiconductor device: A curable organopolysiloxane composition comprising at least the following components: (A) a linear diorganopolysiloxane with a mass average molecular weight of at least 3,000, (B) a branched organopolysiloxane, (C) an organopolysiloxane having, on average, at least two silicon-bonded aryl groups and, on average, at least two silicon-bonded hydrogen atoms in... Agent: Howard & Howard Attorneys PLLC

20100301378 - Illumination device and method for the production thereof: A method for producing an illumination device is provided. The method may include providing a carrier, on which illumination means are applied, with filler material; applying an upper exterior layer on the filler material; reducing the arrangement formed by the carrier, filler material and upper exterior layer to a predetermined... Agent: Viering, Jentschura & Partner - Osr

20100301380 - Light-emitting diode and manufacturing method thereof: A method for manufacturing a light-emitting diode includes the steps of: growing a light-emitting diode structure-forming semiconductor layer of a compound semiconductor having a zincblende crystal structure on a first substrate formed of a compound semiconductor having a zincblende crystal structure and that has a principal surface tilted in a... Agent: K&l Gates LLP

20100301383 - Light-emitting element, light-emitting device, and method for manufacturing the same: An object is to provide a light-emitting element with high emission efficiency. Another object is to provide a light-emitting element with a long lifetime and high reliability. Another object is to provide a light-emitting element driven at low voltage. A first light-emitting layer whose one surface is in contact with... Agent: Husch Blackwell Sanders, LLP Husch Blackwell Sanders LLP Welsh & Katz

20100301382 - Light-emitting element, light-emitting device, lighting device, and electronic appliance: A light-emitting element whose lifetime is improved. In addition, a light-emitting device, a lighting device, and an electronic appliance in which the light-emitting element is used. A light-emitting element including, between an anode and a cathode, a hole-transport layer and a layer containing a light-emitting substance provided to be in... Agent: Husch Blackwell Sanders, LLP Husch Blackwell Sanders LLP Welsh & Katz

20100301379 - Method for manufacturing group iii nitride semiconductor, method for manufacturing group iii nitride semiconductor light-emitting device, group iii nitride semiconductor light-emitting device, and lamp: A method for manufacturing a Group III nitride semiconductor of the present invention includes a sputtering step of forming a single-crystalline Group III nitride semiconductor on a substrate by a reactive sputtering method in a chamber in which a substrate and a Ga element-containing target are disposed, wherein said sputtering... Agent: Sughrue Mion, PLLC

20100301381 - Nitride semiconductor light emitting element and manufacturing method thereof: Provided are a nitride semiconductor light emitting element, including an n-type nitride semiconductor substrate including a dislocation bundle concentration region, and a nitride semiconductor stacked body having an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer in this order on the n-type nitride semiconductor substrate,... Agent: Morrison & Foerster LLP

20100301384 - Diode: A diode for fast switching applications includes a base layer of a first conductivity type with a first main side and a second main side opposite the first main side, an anode layer of a second conductivity type, which is arranged on the second main side, a plurality of first... Agent: Buchanan, Ingersoll & Rooney PC

20100301385 - Electrostatic discharge protection device: An electrostatic discharge protection device including a substrate, a first doped region, a first gate electrode, a second doped region, a second gate electrode, and a third doped region is disclosed. The substrate has a first conductive type. The first doped region has a second conductive type and is formed... Agent: Quintero Law Office, PC

20100301386 - Integrated structure of igbt and diode and method of forming the same: An integrated structure of an IGBT and a diode includes a plurality of doped cathode regions, and a method of forming the same is provided. The doped cathode regions are stacked in a semiconductor substrate, overlapping and contacting with each other. As compared with other doped cathode regions, the higher... Agent: North America Intellectual Property Corporation

20100301387 - Semiconductor device and method for its production: A semiconductor system is described, which is made up of a highly n-doped silicon substrate and a first n-silicon epitaxial layer, which is directly contiguous to the highly n-doped silicon substrate, and having a p-doped SiGe layer, which is contiguous to a second n-doped silicon epitaxial layer and forms a... Agent: Kenyon & Kenyon LLP

20100301388 - Semiconductor device and lateral diffused metal-oxide-semiconductor transistor: The invention provides a semiconductor device and a lateral diffused metal-oxide-semiconductor transistor. The semiconductor device includes a substrate having a first conductive type. A gate is disposed on the substrate. A source doped region is formed in the substrate, neighboring with a first side of the gate, wherein the source... Agent: Quintero Law Office, PC

20100301389 - Esd protection structure: An electrostatic discharge protection structure includes a first vertical bipolar junction transistor; a second vertical bipolar junction transistor, wherein the second vertical bipolar junction transistor has a common collector with the first vertical bipolar junction transistor, and the common collector has a first conductivity; a horizontal bipolar junction transistor wherein... Agent: Freescale Semiconductor, Inc. Law Department

20100301390 - Gradient ternary or quaternary multiple-gate transistor: An integrated circuit structure includes a semiconductor substrate; insulation regions over the semiconductor substrate; and an epitaxy region over the semiconductor substrate and having at least a portion in a space between the insulation regions. The epitaxy region includes a III-V compound semiconductor material. The epitaxy region also includes a... Agent: Slater & Matsil, L.L.P.

20100301391 - Tri-gate field-effect transistors formed by aspect ratio trapping: Semiconductor structures include a trench formed proximate a substrate including a first semiconductor material. A crystalline material including a second semiconductor material lattice mismatched to the first semiconductor material is formed in the trench. Process embodiments include removing a portion of the dielectric layer to expose a side portion of... Agent: Slater & Matsil, L.L.P.

20100301393 - Field effect transistor and manufacturing method therefor: There is provided a field effect transistor of a normally-OFF operation having a low contact resistance and capable of avoiding increases in on-resistance and maintaining high channel mobility. In this field effect transistor, a thin-layer portion 6a of an AlGaN barrier layer 6, which is formed on V defects 13... Agent: Birch Stewart Kolasch & Birch

20100301394 - Semiconductor device and fabrication method thereof: A semiconductor device includes a gate electrode formed on a silicon substrate via a gate insulation film in correspondence to a channel region, source and drain regions of a p-type diffusion region formed in the silicon substrate at respective outer sides of sidewall insulation films of the gate electrode, and... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100301392 - Source/drain re-growth for manufacturing iii-v based transistors: A method of forming an integrated circuit structure includes providing a substrate, and epitaxially growing a first semiconductor layer over the substrate. The first semiconductor layer includes a first III-V compound semiconductor material formed of group III and group V elements. The method further includes forming a gate structure on... Agent: Slater & Matsil, L.L.P.

20100301395 - Asymmetrically recessed high-power and high-gain ultra-short gate hemt device: A high-power and high-gain ultra-short gate HEMT device has exceptional gain and an exceptionally high breakdown voltage provided by an increased width asymmetric recess for the gate electrode, by a composite channel layer including a thin indium arsenide layer embedded in the indium gallium arsenide channel layer and by double... Agent: Bae Systems

20100301396 - Asymmetrically recessed high-power and high-gain ultra-short gate hemt device: According to one disclosed embodiment, a monolithic vertically integrated composite device comprises a double sided semiconductor substrate having first and second sides, a group IV semiconductor layer formed over the first side and comprising at least one group IV semiconductor device, and a group III-V semiconductor body formed over the... Agent: Farjami & Farjami LLP

20100301397 - Power and ground shield mesh to remove both capacitive and inductive signal coupling effects of routing in integrated circuit device: A power and ground shield mesh to remove both capacitive and inductive signal coupling effects of routing in integrated circuit device. An embodiment describes the routing of a shield mesh of both power and ground lines to remove noise created by capacitive and inductive coupling. Relatively long signal lines are... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100301398 - Methods and apparatus for measuring analytes: Methods and apparatus relating to FET arrays including large FET arrays for monitoring chemical and/or biological reactions such as nucleic acid sequencing-by-synthesis reactions. Some methods provided herein relate to improving signal (and also signal to noise ratio) from released hydrogen ions during nucleic acid sequencing reactions.... Agent: Ion Torrent Systems Incorporated C/o Wolf, Greenfield & Sacks, P.C.

20100301399 - Sensitive field effect transistor apparatus: The invention discloses a sensitive field effect transistor apparatus, which uses the inorganic membrane to sense hydrogen ions. The invention adopts the membrane with high deformation stress. The sensitivity of sensitive membrane on hydrogen ion is adjusted through altering the membrane thickness and changing the substrate type and doped concentration.... Agent: Bacon & Thomas, PLLC

20100301400 - Schottky diode: Improved Schottky diodes (20, 20′) with reduced leakage current and improved breakdown voltage are provided by building a JFET with its current path (50, 50′) of a first conductivity type serially located between a first terminal (80, 80′, 32, 32′) comprising a Schottky contact (33, 33′) and a second (82,... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20100301402 - Semiconductor device: Provided is a semiconductor device which is capable of preventing an increase in power consumption of an SGT, i.e., a three-dimensional semiconductor transistor, due to an increase in off-leak current. The semiconductor device comprises: a first-conductive type first silicon pillar: a first dielectric surrounding a side surface of the first... Agent: Brinks Hofer Gilson & Lione

20100301401 - Semiconductor device and related fabrication methods that use compressive material with a replacement gate technique: A semiconductor device and related method of fabricating it are provided. An exemplary fabrication process begins by forming a gate structure overlying a layer of semiconductor material, the gate structure comprising a gate insulator overlying the layer of semiconductor material and comprising a temporary gate element overlying the gate insulator.... Agent: Ingrassia Fisher & Lorenz, P.C. (gf)

20100301404 - Semiconductor device and production method thereof: An object of the present invention is to provide a semiconductor device having a nonvolatile memory cell of a high operation speed and a high rewrite cycle and a nonvolatile memory cell of high reliability. In a split gate type nonvolatile memory in which memory gate electrodes are formed in... Agent: Miles & Stockbridge PC

20100301403 - Semiconductor device with multiple gates and doped regions and method of forming: A semiconductor device includes a source region within a semiconductor substrate, a drain region within the semiconductor substrate, a control gate over the semiconductor substrate and between the source region and the drain region, a first gate between the control gate and the drain region, and a first doped region... Agent: Freescale Semiconductor, Inc. Law Department

20100301405 - Nonvolatile semiconductor memory device and manufacturing method thereof: A nonvolatile semiconductor memory device including first laminated bodies each having a plurality of first gate electrodes of first memory cells, second laminated bodies each having a plurality of second gate electrodes of second memory cells, gate insulating film portions located on side surfaces of the first and second laminated... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100301406 - Zirconium-doped tantalum oxide films: Dielectric layers containing a zirconium-doped tantalum oxide layer, where the zirconium-doped tantalum oxide layer is formed of one or more monolayers of tantalum oxide doped with zirconium, provide an insulating layer in a variety of structures for use in a wide range of electronic devices.... Agent: Schwegman, Lundberg & Woessner/micron

20100301407 - Semiconductor device having vertical channel transistor and manufacturing method of the same: A semiconductor device having a vertical channel transistor and a method for manufacturing the same are provided. In the semiconductor device, a metal bit line is formed between vertical channel transistors, and the metal bit line is connected to only one of the vertical channel transistors through an asymmetric bit... Agent: Ampacc Law Group

20100301408 - Semiconductor device: A semiconductor device is disclosed. One embodiment includes a trench within a semiconductor body and a gate insulating structure at opposing sidewalls within the trench. A gate electrode structure adjoins the gate insulating structure within the trench and a dielectric structure adjoins the gate electrode structure within the trench. The... Agent: Dicke, Billig & Czaja

20100301409 - Vertical field effect transistor arrays and methods for fabrication thereof: Vertical field effect transistor semiconductor structures and methods for fabrication of the vertical field effect transistor semiconductor structures provide an array of semiconductor pillars. Each vertical portion of each semiconductor pillar in the array of semiconductor pillars has a linewidth greater than a separation distance to an adjacent semiconductor pillar.... Agent: Scully, Scott, Murphy & Presser, P.C.

20100301410 - Semiconductor device and manufacturing method therefor: A semiconductor device having a semiconductor body, a source metallization arranged on a first surface of the semiconductor body and a trench including a first trench portion and a second trench portion and extending from the first surface into the semiconductor body is provided. The semiconductor body further includes a... Agent: Dicke, Billig & Czaja

20100301411 - Semiconductor device: The invention prevents a source-drain breakdown voltage of a DMOS transistor from decreasing due to dielectric breakdown in a portion of a N type drift layer having high concentration formed in an active region near field oxide film corner portions surrounding an gate width end portion. The field oxide film... Agent: Morrison & Foerster LLP

20100301412 - Power integrated circuit device with incorporated sense fet: In one embodiment, a power integrated circuit device includes a main lateral high-voltage field-effect transistor (HVFET) and an adjacently-located lateral sense FET, both of which are formed on a high-resistivity substrate. A sense resistor is formed in a well region disposed in an area of the substrate between the HVFET... Agent: The Law Offices Of Bradley J. Bereznak

20100301413 - Fabrication of lateral double-diffused metal oxide semiconductor (ldmos) devices: Methods of making, structures, devices, and/or applications for lateral double-diffused metal oxide semiconductor (LDMOS) transistors are disclosed. In one embodiment, a method of fabricating an LDMOS transistor with source, drain, and gate regions on a substrate, can include: forming p-type and n-type buried layer (PBL, NBL) regions; growing an epitaxial... Agent: Michael C. Stephens, Jr.

20100301414 - High voltage nmos with low on resistance and associated methods of making: High voltage NMOS devices with low on resistance and associated methods of making are disclosed herein. In one embodiment, a method for making N typed MOSFET devices includes forming an N-well and a P-well with twin well process, forming field oxide, forming gate comprising an oxide layer and a conducting... Agent: Perkins Coie LLP Patent-sea

20100301415 - Method for manufacturing semiconductor substrate, and semiconductor device: It is an object to form single-crystalline semiconductor layers with high mobility over approximately the entire surface of a glass substrate even when the glass substrate is increased in size. A first single-crystalline semiconductor substrate is bonded to a substrate having an insulating surface, the first single-crystalline semiconductor substrate is... Agent: Robinson Intellectual Property Law Office, P.C.

20100301416 - Strain transformation in biaxially strained soi substrates for performance enhancement of p-channel and n-channel transistors: In advanced SOI devices, a high tensile strain component may be achieved on the basis of a globally strained semiconductor layer, while at the same time a certain compressive strain may be induced in P-channel transistors by appropriately selecting a height-to-length aspect ratio of the corresponding active regions. It has... Agent: Williams, Morgan & Amerson

20100301417 - Device including high-k metal gate finfet and resistive structure and method of forming thereof: A device is provided that in one embodiment includes a substrate having a first region and a second region, in which a semiconductor device is present on a dielectric layer in the first region of the substrate and a resistive structure is present on the dielectric layer in the second... Agent: Scully, Scott, Murphy & Presser, P.C.

20100301418 - Electrostatic discharge protection device: Disclosed is an electrostatic discharge protection device that overcomes problems of an LVTNR device by serially connecting a diode to the LVTNR device and coupling a gate of a MOSFET structure thereto. The electrostatic discharge protection device of the present invention includes a diode comprising N well/P+ diffusion regions; a... Agent: Schmeiser, Olsen & Watts

20100301419 - Integrated circuit device with deep trench isolation regions for all inter-well and intra-well isolation and with a shared contact to a junction between adjacent device diffusion regions andan underlying floating well section: Disclosed are embodiments of an improved integrated circuit device structure (e.g., a static random access memory array structure or other integrated circuit device structure incorporating both P-type and N-type devices) and a method of forming the structure that uses DTI regions for all inter-well and intra-well isolation and, thereby provides... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20100301420 - High-k heterostructure: A method for preparing a multilayer substrate includes the step of deposing an epitaxial γ-Al2O3 Miller index (001) layer on a Si Miller index (001) substrate.... Agent: Gardere Wynne Sewell LLP Intellectual Property Section

20100301422 - Semiconductor integrated circuit device: Prior known static random access memory (SRAM) cells required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to occurrence of a problem as... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100301421 - Strain enhancement in transistors comprising an embedded strain-inducing semiconductor alloy by creating a patterning non-uniformity at the bottom of the gate electrode: Performance of P-channel transistors may be enhanced on the basis of an embedded strain-inducing semiconductor alloy by forming a gate electrode structure on the basis of a high-k dielectric material in combination with a metal-containing cap layer in order to obtain an undercut configuration of the gate electrode structure. Consequently,... Agent: Williams, Morgan & Amerson

20100301423 - Semiconductor devices with improved local matching and end resistance of rx based resistors: Semiconductor devices are formed with reduced variability between close proximity resistors, improved end resistances, and reduced random dopant mismatch. Embodiments include ion implanting a dopant, such as B, at a relatively high dosage, e.g. about 4 to about 6 keV, and at a relatively low implant energy, e.g., about 1.5... Agent: Ditthavong Mori & Steiner, P.C.

20100301424 - Nested and isolated transistors with reduced impedance difference: A processing layer, such as silicon, is formed on a metal silicide contact followed by a metal layer. The silicon and metal layers are annealed to increase the thickness of the metal silicide contact. By selectively increasing the thickness of silicide contacts, Rs of transistors in iso and nested regions... Agent: HorizonIPPte Ltd

20100301425 - Semiconductor device having a gate contact structure capable of reducing interfacial resistance: A semiconductor device has a gate contact structure, including a semiconductor substrate, a polycrystalline silicon layer used as a gate electrode of a transistor, a middle conductive layer, a top metal layer having an opening exposing the polycrystalline silicon layer, and a contact plug directly contacting the polycrystalline silicon layer... Agent: Lee & Morse, P.C.

20100301426 - Depletion mos transistor and enhancement mos transistor: A semiconductor memory device includes a first transistor. The first transistor includes a gate electrode, a channel region, a source region, a source region, an overlapping region, a contact region, and an impurity diffusion region. The channel region has a first impurity concentration. The source and drain regions have a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100301427 - Work function adjustment in high-k metal gate electrode structures by selectively removing a barrier layer: In a replacement gate approach in sophisticated semiconductor devices, a tantalum nitride etch stop material may be efficiently removed on the basis of a wet chemical etch recipe using ammonium hydroxide. Consequently, a further work function adjusting material may be formed with superior uniformity, while the efficiency of the subsequent... Agent: Williams, Morgan & Amerson

20100301428 - Tantalum silicon oxynitride high-k dielectrics and metal gates: Electronic apparatus and methods of forming the electronic apparatus include a tantalum silicon oxynitride film on a substrate for use in a variety of electronic systems. The tantalum silicon oxynitride film may be structured as one or more monolayers. The tantalum silicon oxynitride film may be formed using a monolayer... Agent: Schwegman, Lundberg & Woessner/micron

20100301429 - Semiconductor device and method of manufacturing the same: In a p-channel-type field-effect transistor having a metal gate electrode, a technique capable of stably obtaining a desired threshold voltage is provided. On a gate insulating film composed of a HfSiON film and formed on a semiconductor substrate, there is formed a metal gate electrode partially having a conductive film... Agent: Miles & Stockbridge PC

20100301430 - Mems device and method of fabricating the same: A micro electrical-mechanical system (MEMS) device comprises a suspended thin film microstructure which includes an anchoring portion adhered to the top surface of the substrate and a suspended portion above the top surface of the substrate. Having a base plane configured in parallel to the substrate, the suspended portion further... Agent: J C Patents

20100301432 - Gap control for die or layer bonding using intermediate layers: A structure having a gap provided between a portion of two layers that are joined together is disclosed. The structure includes a first layer having an element formed within a first surface and a second layer having a second surface, adjacent to and in direct contact with at least a... Agent: Amy M. Salmela 4800 Ids Center

20100301431 - Thin semiconductor device having embedded die support and methods of making the same: Ultra-thin semiconductor devices, including piezoresistive sensing elements can be formed in a wafer stack that facilitates handling many thin device dice at a wafer level. Three embodiments are provided to form the thin dice in a wafer stack using three different fabrication techniques that include anodic bonding, adhesive bonding and... Agent: Continental Automotives Systems, Inc. Patents & Licenses

20100301434 - Mems devices and methods of manufacture thereof: Micro-electromechanical system (MEMS) devices and methods of manufacture thereof are disclosed. In one embodiment, a MEMS device includes a first semiconductive material and at least one trench disposed in the first semiconductive material, the at least one trench having a sidewall. An insulating material layer is disposed over an upper... Agent: Slater & Matsil, L.L.P.

20100301433 - Triple-axis mems accelerometer: An integrated circuit structure includes a triple-axis accelerometer, which further includes a proof-mass formed of a semiconductor material; a first spring formed of the semiconductor material and connected to the proof-mass, wherein the first spring is configured to allow the proof-mass to move in a first direction in a plane;... Agent: Slater & Matsil, L.L.P.

20100301435 - Sensor geometry for improved package stress isolation: The sensor geometry for improved package stress isolation is disclosed. A counterbore on the backing plate improves stress isolation properties of the sensor. The counterbore thins the wall of the backing plate maintaining the contact area with the package. The depth and diameter of the counterbore can be adjusted to... Agent: Honeywell/cst Patent Services

20100301436 - Semiconductor device and method for making semiconductor device: A semiconductor device with a functional element including an upper electrode composed of an electrically conductive metal oxide and being configured to store information; an interlayer insulating film covering the functional element; a contact hole formed in the interlayer insulating film, the contact hole including a side wall surface and... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100301437 - Anti-reflective coating for sensors suitable for high throughput inspection systems: A sensor for capturing light at the ultraviolet (UV) or the deep UV wavelength includes a multi-layer anti-reflective coating (ARC). In a two-layer ARC, the first layer is formed on either the substrate or the circuitry layer, and the second layer is formed on the first layer and receives the... Agent: Bever, Hoffman & Harms, LLP

20100301438 - Solid-state image pickup device, method of manufacturing the same and electronic apparatus: Disclosed herein is a solid-state image pickup device including: a trench formed in an insulating film above a light-receiving portion; a first waveguide core portion provided on an inner wall side of the trench; a second waveguide core portion filled in the trench via the first waveguide core portion; and... Agent: Snr Denton US LLP

20100301439 - Solid-state imaging device and method of manufacturing solid-state imaging device: A solid state imaging device having a back-illuminated type structure in which a lens is formed on the back side of a silicon layer with a light-receiving sensor portion being formed thereon. Insulating layers are buried into the silicon layer around an image pickup region, with the insulating layer being... Agent: Rader Fishman & Grauer PLLC

20100301440 - Mesa photodiode and method for manufacturing the same: A mesa photodiode which includes a mesa, the sidewall of the mesa is a surface that is inclined in the direction in which the bottom of the mesa becomes wider. At least the sidewall of the mesa is covered with a semiconductor layer of a first conductivity type, a second... Agent: Mcginn Intellectual Property Law Group, PLLC

20100301442 - Optical semiconductor device: An optical semiconductor device that performs photoelectric conversion, comprising: a semiconductor substrate that includes (i) a first conductivity-type semiconductor region, (ii) a second conductivity-type semiconductor region that is positioned on the first conductivity-type semiconductor region and has a light receiving surface, and (iii) a first conductivity-type contact region that penetrates,... Agent: Mcdermott Will & Emery LLP

20100301441 - Photodiode with high esd threshold: A photodetector with an improved electrostatic discharge damage threshold is disclosed, suitable for applications in telecommunication systems operating at elevated data rates. The photodetector may be a PIN or an APD fabricated in the InP compound semiconductor system. The increased ESD damage threshold is achieved by reducing the ESD induced... Agent: Pequignot + Myers LLC

20100301443 - Imaging array with dual height semiconductor and method of making same: A method of fabricating an imaging array includes providing a single crystal silicon substrate and bonding the single crystal silicon substrate to an insulating substrate. One or more portions of an exposed surface of the single-crystal silicon substrate are removed to form a pattern of first areas having a first... Agent: Carestream Health, Inc. Attn: Patent Legal Staff

20100301444 - Semiconductor imaging device with which semiconductor elements of pixel area and other areas has same characteristics: Photoelectric conversion elements are arranged in a pixel area. A circuit area is arranged around the pixel area. An interconnect including copper is arranged in the pixel area and circuit area. A cap layer is arranged on the interconnect. Wherein the cap layer except a part on the interconnect is... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100301445 - Trench sidewall contact schottky photodiode and related method of fabrication: A Schottky photodiode may include a monocrystalline semiconductor substrate having a front surface, a rear surface, and a first dopant concentration and configured to define a cathode of the Schottky photodiode, a doped epitaxial layer over the front surface of the monocrystalline semiconductor substrate having a second dopant concentration less... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.

20100301447 - Epitaxy silicon on insulator (esoi): Methods and structures for semiconductor devices with STI regions in SOI substrates is provided. A semiconductor structure comprises an SOI epitaxy island formed over a substrate. The structure further comprises an STI structure surrounding the SOI island. The STI structure comprises a second epitaxial layer on the substrate, and a... Agent: Slater & Matsil, L.L.P.

20100301446 - In-line stacking of transistors for soft error rate hardening: Each one of a pair of CMOS transistors is formed in its own island and a gate terminal for each transistor is formed by a single, in-line conductor connecting both gate terminals together. This type of “in-line” connection achieves nearly a five-time improvement in the reduction of the ability of... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20100301448 - Semiconductor device and method for forming the same: Provided is a semiconductor and a method for forming the same. The method includes forming a buried insulating layer locally in a substrate. The substrate is etched to form an opening exposing the buried insulating layer, and a silicon pattern spaced in at least one direction from the substrate is... Agent: Ampacc Law Group

20100301449 - Methods and apparatus for forming line and pillar structures for three dimensional memory arrays using a double subtractive process and imprint lithography: The present invention provides systems, apparatus, and methods for forming three dimensional memory arrays using a multi-depth imprint lithography mask and a double subtractive process. An imprint lithography mask for manufacturing a memory layer in a three dimensional memory is described. The mask includes a translucent material formed with features... Agent: Dugan & Dugan, PC

20100301450 - Semiconductor device and method of forming ipd structure using smooth conductive layer and bottom-side conductive layer: A semiconductor device is made by forming a smooth conductive layer over a substrate. A first insulating layer is formed over a first surface of the smooth conductive layer. A first conductive layer is formed over the first insulating layer. A second insulating layer is formed over the first insulating... Agent: Robert D. Atkins

20100301452 - Integrated nano-farad capacitors and method of formation: A high value capacitance per unit area capacitor is fabricated on a substrate 1 by converting a portion of a primary function anti-reflecting conducting layer 36 to a high value dielectric layer 37 by partially oxidizing the conducting layer to form the dielectric layer. The resultant combination is sandwiched between... Agent: James Jen-ho Wang

20100301451 - Semiconductor device, lower layer wiring designing device, method of designing lower layer wiring and computer program: A semiconductor device includes a lower layer wiring layer, an MIM capacitors and an upper layer wiring layer. The lower layer wiring layer includes a plurality of lower layer wirings. The MIM capacitor is formed above the lower layer wiring layer. The MIM capacitor includes a lower electrode, a capacity... Agent: Mcginn Intellectual Property Law Group, PLLC

20100301453 - High-voltage bjt formed using cmos hv processes: An integrated circuit device includes a semiconductor substrate having a top surface; at least one insulation region extending from the top surface into the semiconductor substrate; a plurality of base contacts of a first conductivity type electrically interconnected to each other; and a plurality of emitters and a plurality of... Agent: Slater & Matsil, L.L.P.

20100301454 - Lattice matched multi-junction photovoltaic and optoelectronic devices: The present invention provides semiconductor structures comprising a substrate and at least three III-V and/or II-VI multi junction building blocks, each comprising a p-n junction having at least two alloy layers, formed over the substrate, provided at least one multi-junction building block comprises II-VI alloy layers. Further described are methods... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20100301455 - Method for producing a bonded substrate: A method for producing a bonded substrate having a Si1-xGex (0<x≦1) film in which a larger than ever biaxial strain has been introduced. Specifically, the method involves at least the steps of: providing a donor wafer and a handle wafer having a thermal expansion coefficient lower than the donor wafer,... Agent: Roberts Mlotkowski Safran & Cole, P.C. Intellectual Property Department

20100301458 - Alignment target contrast in a lithographic double patterning process: A system and method of manufacturing a semiconductor device lithographically and an article of manufacture involving a lithographic double patterning process having a dye added to either the first or second lithographic pattern are provided. The dye is used to detect the location of the first lithographic pattern and to... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20100301457 - Lithography masks, systems, and manufacturing methods: Lithography masks, lithography systems, methods of manufacturing lithography masks, methods of altering material layers of semiconductor devices, and methods of manufacturing semiconductor devices are disclosed. In one embodiment, a lithography mask includes a first pattern for at least one material layer of at least one die, the first pattern being... Agent: Slater & Matsil, L.L.P.

20100301456 - Method for applying a structure to a semiconductor element: A method for applying a predetermined structure of a structural material to a semiconductor element. The method includes the following steps: A) partially covering a surface of the semiconductor element with a masking layer, B) applying a film of a structural material to the masking layer and to the surface... Agent: Volpe And Koenig, P.C.

20100301459 - Method for manufacturing a semiconductor device and a semiconductor device: The warpage of a semiconductor wafer or a semiconductor chip is inhibited. A method includes a step of successively forming, pads formed over the main surface of the semiconductor chip, an insulation layer formed by covering the main surface such that the pads are exposed, an insulation film formed over... Agent: Miles & Stockbridge PC

20100301460 - Semiconductor device having a filled trench structure and methods for fabricating the same: Methods are provided for packaging a semiconductor die having a first surface. In accordance with an exemplary embodiment, a method comprises the steps of forming a trench in the first surface of the die, electrically and physically coupling the die to a packaging substrate, forming a sealant layer on the... Agent: Ingrassia Fisher & Lorenz, P.C. (gf)

20100301462 - Method and apparatus providing air-gap insulation between adjacent conductors using nanoparticles: A semiconductor device and a method of forming it are disclosed in which at least two adjacent conductors have an air-gap insulator between them which is covered by nanoparticles of insulating material being a size which prevent the nanoparticles from substantially entering into the air-gap.... Agent: Thomas J. D,amico Dickstein Shapiro LLP

20100301461 - Reliable interconnection: Embodiments relate to a method for forming reliable interconnects by the use of a device layer that can serve as a barrier or an etch stop layer, among other applications. The device layer is UV resistant in that its dielectric constant and stress remain stable or relatively stable when subjected... Agent: HorizonIPPte Ltd

20100301463 - Reduced soft error rate through metal fill and placement: A method for reducing single event upsets in an integrated circuit includes the step of providing a plurality of levels within the integrated circuit, wherein the plurality of levels within the integrated circuit are in a stacked arrangement. The method also includes the step of providing a plurality of metal... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20100301464 - Asterisk pad: A method and structure for a semiconductor device can include a chip support having a one or more elongated structures formed in the chip support The elongated structures, which have a width and a length greater than the width, receive chip attach material such as epoxy during a chip attach... Agent: Texas Instruments Incorporated

20100301465 - Lead frame, lead frame fabrication, and semiconductor device: Lead frames and their fabricating method which reduce generation of defects in the process of fabricating semiconductor devices, in particular connection defects in wire bonding, thereby improving the product yield and reliability, and semiconductor devices using the lead frames and their fabricating method are provided. A method for fabricating a... Agent: Oliff & Berridge, PLC

20100301466 - Semiconductor device: The reliability of a semiconductor device is to be improved. A microcomputer chip (semiconductor chip) having a plurality of pads formed on a main surface thereof is mounted over an upper surface of a wiring substrate in an opposed state of the chip main surface to the substrate upper surface.... Agent: Miles & Stockbridge PC

20100301468 - Semiconductor device and method of manufacturing the same: A semiconductor device may include, but is not limited to a wiring board, a first insulator, a semiconductor chip, and a second insulator. The first insulator penetrates the wiring board. A top end of the first insulator is higher in level than an upper surface of the wiring board. The... Agent: Foley And Lardner LLP Suite 500

20100301467 - Wirebond structures: Embodiments of the present disclosure provide an apparatus comprising a semiconductor die, a bond pad formed on the semiconductor die, the bond pad comprising aluminum (Al), a bonding material comprising gold (Au) coupled to the bond pad, the bonding material covering at least a portion of the bond pad, and... Agent: Schwabe, Williamson & Wyatt, P.C.

20100301469 - Integrated circuit packaging system with interposer interconnections and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit; mounting a routing structure having a functional side above the integrated circuit; mounting a vertical interconnect to the functional side of the routing structure and the vertical interconnect extending vertically away from the routing structure;... Agent: Law Offices Of Mikio Ishimaru

20100301470 - Stud bumps as local heat sinks during transient power operations: A thermal management configuration for a flip chip semiconductor device is disclosed. The device includes a high power silicon based die having a metal bonding surface. A plurality of interconnects are formed on the metal surface and connected to a substrate. A plurality of thermal management stud bumps are formed... Agent: Texas Instruments Incorporated

20100301471 - Low-resistance electrode design: A solution for designing a semiconductor device, in which two or more attributes of a pair of electrodes are determined to, for example, minimize resistance between the electrodes, is provided. Each electrode can include a current feeding contact from which multiple fingers extend, which are interdigitated with the fingers of... Agent: Hoffman Warnick LLC

20100301473 - Component built-in wiring board and manufacturing method of component built-in wiring board: Disclosed is a component built-in wiring board, including a first insulating layer; a second insulating layer positioned in a laminated state on the first insulating layer; a semiconductor element buried in the second insulating layer, having a semiconductor chip with terminal pads and having surface mounting terminals arrayed in a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100301472 - Electronic component and manufacturing method thereof: An electronic component in which an element is formed on a chip includes: a pad that is made of a conductive material and that is formed in a first bump formation region that is two-dimensionally arranged in center of one principle face and in a second bump formation region that... Agent: Turocy & Watson, LLP

20100301474 - Semiconductor device package structure and method for the same: The present invention discloses a semiconductor device package and the method for the same. The method includes preparing a first substrate and a second substrate; opening a die opening window through the second substrate by using laser or punching; preparing an adhesion material; attaching the first substrate to the second... Agent: Chih Feng Yeh

20100301475 - Forming semiconductor chip connections: Systems and methods are disclosed that enable forming semiconductor chip connections. In one embodiment, the semiconductor chip includes a body having a polyhedron shape with a pair of opposing sides; and a solder member extending along a side that extends between the pair of opposing sides of the polyhedron shape.... Agent: Hoffman Warnick LLC

20100301477 - Silicon-based thin substrate and packaging schemes: A silicon-based thin package substrate is used for packaging semiconductor chips. The silicon-based thin package substrate preferably has a thickness of less than about 200 μm. A plurality of traces are formed in the silicon-based thin package substrate, connecting BGA balls and solder bumps. A semiconductor chip may be mounted... Agent: Slater & Matsil, L.L.P.

20100301476 - Stacked package and method for forming stacked package: A semiconductor chip module including a plurality of semiconductor chips, each provided on the side face thereof with a part of connection terminals coupled with a circuit pattern formed on the front face, the chips being stacked and bonded. The stacked element in the lowermost layer is a semiconductor chip... Agent: Bacon & Thomas, PLLC

20100301478 - Substrate having a coating comprising copper and method for the production thereof by means of atomic layer deposition: A method can be used for the production of a coated substrate. The coating contains copper. A copper precursor and a substrate are provided. The copper precursor is a copper(I) complex which contains no fluorine. A copper-containing layer is deposited by means of atomic layer deposition (ALD) at least on... Agent: Slater & Matsil, L.L.P.

20100301479 - Devices containing silver compositions deposited by micro-deposition direct writing silver conductor lines: Embodiments of the invention relate to a silicon semiconductor device, and a conductive thick film composition for use in a solar cell device.... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20100301481 - Joint structure and electronic component: A joint structure joins an electronic element 12 included in an electronic component to an electrode 14 included in that electronic component. The joint structure includes a solder layer, which contains 0.2 to 6% by weight of copper, 0.02 to 0.2% by weight of germanium and 93.8 to 99.78% by... Agent: Mcdermott Will & Emery LLP

20100301480 - Semiconductor device having a conductive structure: A semiconductor device includes an interlayer insulating layer disposed on a substrate, the interlayer insulating layer comprising an opening exposing the substrate, a barrier layer pattern disposed within the opening, and a conductive pattern disposed on the barrier layer pattern, the conductive pattern having an oxidized portion extending out of... Agent: F. Chau & Associates, LLC

20100301483 - Light-blocking layer sequence having one or more metal layers for an integrated circuit and method for the production of the layer sequence: In an integrated circuit, a light sensitive area is protected against radiation by arranging a light blocking layer sequence (504) on top of the light sensitive area. The light blocking layer sequence comprises one or several metal layers (504a) and a silicon layer (503b, 1) for the purpose of absorption.... Agent: Hunton & Williams LLP Intellectual Property Department

20100301482 - Sram bit cell with self-aligned bidirectional local interconnects: Improved SRAMs are formed with significantly reduced local interconnect to gate shorts, by a technique providing bidirectional, self-aligned local interconnects, employing a gate hard mask over portions of the gates not connected to the local interconnects. Embodiments include forming a gate hard mask over gates, forming bidirectional trenches overlying portions... Agent: Ditthavong Mori & Steiner, P.C.

20100301484 - Lga substrate and method of making same: An LGA substrate includes a core (110), having build-up dielectric material (150), at least one metal layer (125), and solder resist (155) formed thereon, an electrically conductive land grid array pad (120) electrically connected to the metal layer, a nickel layer (121) on the electrically conductive land grid array pad,... Agent: Intel Corporation C/o Cpa Global

20100301485 - Electronic device, conductive composition, metal filling apparatus, and electronic device manufacturing method: An electronic device includes a plurality of stacked substrates. Each of the substrates includes a semiconductor substrate, a columnar conductor, and a ring-shaped insulator. The columnar conductor extends along a thickness direction of the semiconductor substrate. The ring-shaped insulator includes an inorganic insulating layer mainly composed of a glass. The... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100301486 - High-aspect ratio contact element with superior shape in a semiconductor device for improving liner deposition: Contact elements of sophisticated semiconductor devices may be formed by lithographical patterning, providing a spacer element for defining the final critical width in combination with increasing a width of the contact opening prior to depositing the spacer material. The width may be increased, for instance by ion sputtering, thereby resulting... Agent: Williams, Morgan & Amerson

20100301491 - High yield and high throughput method for the manufacture of integrated circuit devices of improved integrity, performance and reliability: A method for forming a contact opening, such as a via hole, is provided. In the method, a sacrificial layer is deposited over a damascene feature prior to exposing a conductor formed in a substrate at a bottom of the opening. The sacrificial layer is provided to prevent damage or... Agent: Haynes And Boone, LLPIPSection

20100301487 - Improvements in or relating to integrated circuit reliability: A method of manufacturing an integrated circuit having minimized electromigration effect, wherein the integrated circuit comprises one or more interconnect, said the or each interconnect comprising a dielectric layer having an intrinsic parameter at a first defined value, characterized in that said method comprises: identifying one or more characteristics of... Agent: Larson Newman & Abel, LLP

20100301492 - Method of stiffening coreless package substrate: Embodiments of the present invention relate to a method of stiffening a semiconductor coreless package substrate to improve rigidity and resistance against warpage. An embodiment of the method comprises disposing a sacrificial mask on a plurality of contact pads on a second level interconnect (package-to-board interconnect) side of a coreless... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100301489 - Microstructure device including a metallization structure with self-aligned air gaps formed based on a sacrificial material: In a sophisticated metallization system of a semiconductor device, air gaps may be formed in a self-aligned manner on the basis of a sacrificial material, such as a carbon material, which is deposited after the patterning of a dielectric material for forming therein a via opening. Consequently, superior process conditions... Agent: Williams, Morgan & Amerson

20100301490 - Profiled contact for semiconductor device: A profiled contact for a device, such as a high power semiconductor device is provided. The contact is profiled in both a direction substantially parallel to a surface of a semiconductor structure of the device and a direction substantially perpendicular to the surface of the semiconductor structure. The profiling can... Agent: Hoffman Warnick LLC

20100301488 - Semiconductor device: In a semiconductor device, a lower multi-layered interconnect structure, an intermediate via-level insulating interlayer, and an upper multi-layered interconnect structure are stacked in this order in a region overlapped with a bonding pad in a plan view; upper interconnects and vias of the upper multi-layered interconnect structure are formed so... Agent: Mcginn Intellectual Property Law Group, PLLC

20100301493 - Packaged electronic devices havng die attach regions with selective thin dielectric layer: A packaged electronic device including a package substrate having a top substrate surface including a die attach region including at least one land pad thereon and a first dielectric layer positioned lateral to the land pad and a non-die attach region. The non-die attach region includes a second dielectric layer,... Agent: Texas Instruments Incorporated

20100301494 - Re-establishing a hydrophobic surface of sensitive low-k dielectrics in microstructure devices: Silicon oxide based low-k dielectric materials may be provided with a hydrophobic low-k surface area, even after exposure to a reactive process ambient, by performing a surface treatment on the basis of hexamethylcyclotrisilazane and/or octamethylcyclotetrasilazane. In addition to the surface treatment, a polymerization may be initiated on the basis of... Agent: Williams, Morgan & Amerson

20100301495 - Semiconductor device and method for manufacturing same: Provided is the method for manufacturing the semiconductor device including: providing a film (organic silicon polymer film) containing a silane compound and a porogen on a substrate; providing a hole (interconnect trench) in the organic silicon polymer film using a selective etching process and providing a metallic film (barrier film... Agent: Young & Thompson

20100301496 - Structure and method for power field effect transistor: A packaged semiconductor device has a metal plate (1200) with sawed sides (1200c), a flat first surface (1200a) and a parallel second surface (1200b); the plate is separated into a first section (1201) and a second section (1202) spaced apart by a gap (1230). The plate has on the second... Agent: Texas Instruments Incorporated

20100301497 - Dicing tape-integrated film for semiconductor back surface: The present invention provides a dicing tape-integrated film for semiconductor back surface, which includes: a dicing tape including a base material and a pressure-sensitive adhesive layer provided on the base material; and a film for flip chip type semiconductor back surface provided on the pressure-sensitive adhesive layer, in which the... Agent: Sughrue-265550