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Active solid-state devices (e.g., transistors, solid-state diodes) November recently filed with US Patent Office 11/10

20100295010 - electronic device comprising a convertible structure: An electronic device (100), comprises a first electrode (101), a second electrode (102) and a convertible structure (103) connected between the first electrode (101) and the second electrode (102), which convertible structure (103) is convertible between at least two states by heating, wherein the convertible structure (103) has different electrical... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100295011 - Enhanced memory density resistance variable memory cells, arrays, devices and systems including the same, and methods of fabrication: A resistance variable memory cell and method of forming the same. The memory cell includes a first electrode and at least one layer of resistance variable material in contact with the first electrode. A first, second electrode is in contact with a first portion of the at least one layer... Agent: Thomas J. D'amico Dickstein Shapiro Morin & Oshinsky LLP

20100295009 - Phase change memory cells having vertical channel access transistor and memory plane: Memory devices are described along with methods for manufacturing. A memory device as described herein comprises a plurality of word lines overlying a plurality of bit lines, and a plurality of field effect transistors. Field effect transistors in the plurality of field effect transistors comprises a first terminal electrically coupled... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20100295012 - Nonvolatile memory element, and nonvolatile memory device: A nonvolatile memory element comprises a resistance variable element 105 configured to reversibly change between a low-resistance state and a high-resistance state in response to electric signals with different polarities which are applied thereto; and a current controlling element 112 configured such that when a current flowing when a voltage... Agent: Mcdermott Will & Emery LLP

20100295013 - Semiconductor device and method for manufacturing same: A semiconductor device according to an embodiment includes: a semiconductor substrate; a resistance element of a first conductivity type formed in one region of the semiconductor substrate; a field effect transistor of a second conductivity type formed in another region of the semiconductor substrate; and a field effect transistor of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100295016 - Fluorescent fiber containing semiconductor nanoparticles: The present invention provides a luminescent fiber, which retains a certain shape with assembled nanoparticles, and a method for producing the luminescent fiber. Specifically, the present invention provides a luminescent fiber comprising silicon and semiconductor nanoparticles having a mean particle size of 2 to 12 nm, the luminescent fiber having... Agent: Kratz, Quintos & Hanson, LLP

20100295014 - Improvements in external light efficiency of light emitting diodes: A method to improve the external light efficiency of light emitting diodes, the method comprising etching an external surface of an n-type layer of the light emitting diode to form surface texturing, the surface texturing reducing internal light reflection to increase light output. A corresponding light emitting diode is also... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100295015 - Light emitting device and light emitting device package having the same: A light emitting device includes a plurality of clusters spread on a surface of a substrate and a first semiconductor layer provided over the plurality of clusters. The first semiconductor layer may includes air gaps above the plurality of clusters. In addition, light emitting structure may include a first conductive... Agent: Ked & Associates, LLP

20100295017 - Light emitting diode element and method for fabricating the same: The present invention discloses a light emitting diode (LED) element and a method for fabricating the same, which can promote light extraction efficiency of LED, wherein a substrate is etched to obtain basins with inclined natural crystal planes, and an LED epitaxial structure is selectively formed inside the basin. Thereby,... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100295018 - Nanostructures and methods of making the same: A nanostructure includes a highly conductive microcrystalline layer, a bipolar nanowire, and another layer (18, 30). The highly conductive microcrystalline layer includes a microcrystalline material and a metal. The bipolar nanowire has one end attached to the highly conductive microcrystalline layer and another end attached to the other layer.... Agent: Hewlett-packard Company Intellectual Property Administration

20100295019 - Nanowire photodetector and image sensor with internal gain: A practical ID nanowire photodetector with high gain that can be controlled by a radial electric field established in the ID nanowire. A ID nanowire photodetector device of the invention includes a nanowire that is individually contacted by electrodes for applying a longitudinal electric field which drives the photocurrent. An... Agent: Greer, Burns & Crain

20100295025 - Carbon nanotube based integrated semiconductor circuit: Gate electrodes are formed on a semiconducting carbon nanotube, followed by deposition and patterning of a hole-inducing material layer and an electron inducing material layer on the carbon nanotube according to the pattern of a one dimensional circuit layout. Electrical isolation may be provided by cutting a portion of the... Agent: Scully, Scott, Murphy & Presser, P.C.

20100295023 - Field effect transistor fabrication from carbon nanotubes: Methods and apparatus for an electronic device such as a field effect transistor. One embodiment includes fabrication of an FET utilizing single walled carbon nanotubes as the semiconducting material. In one embodiment, the FETs are vertical arrangements of SWCNTs, and in some embodiments prepared within porous anodic alumina (PAA). Various... Agent: Bingham Mchale LLP

20100295020 - Method for forming a robust top-down silicon nanowire structure using a conformal nitride and such structure: A nanowire product and process for fabricating it has a wafer with a buried oxide (BOX) upper layer in which a well is formed and the ends of a nanowire are on the BOX layer forming a beam that spans the well. A mask coating is formed on the upper... Agent: Harrington & Smith

20100295022 - Nanowire mesh fet with multiple threshold voltages: Nanowire-based field-effect transistors (FETs) and techniques for the fabrication thereof are provided. In one aspect, a FET is provided having a plurality of device layers oriented vertically in a stack, each device layer having a source region, a drain region and a plurality of nanowire channels connecting the source region... Agent: Michael J. Chang, LLC

20100295024 - Semiconductor structure and method for producing a semiconductor structure: A semiconductor structure includes a support and at least one block provided on the support. The block includes a stack including alternating layers based on a first semiconductor material and layers based on a second semiconductor material different from the first material, the layers presenting greater dimensions than layers such... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20100295021 - Single gate inverter nanowire mesh: Nanowire-based devices are provided. In one aspect, a field-effect transistor (FET) inverter is provided. The FET inverter includes a plurality of device layers oriented vertically in a stack, each device layer having a source region, a drain region and a plurality of nanowire channels connecting the source region and the... Agent: Michael J. Chang, LLC

20100295029 - Benzochrysene derivative and an organic electroluminescence device using the same: wherein Ra and Rb are independently a hydrogen atom or a substituent; p is an integer of 1 to 13; q is an integer of 1 to 8; when p is two or more, plural Ras may be the same or different, and adjacent Ras may form a saturated or... Agent: Foley And Lardner LLP Suite 500

20100295035 - Electro luminescence display device and method of testing the same: To increase the proportion of the perfects to the whole lot of final products and to reduce the cost for active matrix EL display devices by checking the operation of a TFT substrate before depositing an EL material. A capacitor for testing is connected to a drain terminal of a... Agent: Fish & Richardson P.C.

20100295030 - Fused aromatic derivative and organic electroluminescence device using the same: wherein Ra and Rb are independently a hydrogen atom or a substituent, p is an integer of 1 to 8 and q is an integer of 1 to 11, and when p and q are two or more, Ras and Rbs may be independently the same or different, and adjacent... Agent: Foley And Lardner LLP Suite 500

20100295032 - Metal complexes with boron-nitrogen heterocycle containing ligands: Novel organic compounds comprising ligands containing a boron-nitrogen heterocycle are provided. In particular, the compound is a metal complex comprising a ligand containing an azaborine. The compounds may be used in organic light emitting devices to provide devices having improved photophysical and electronic properties.... Agent: Townsend And Townsend And Crew, LLP

20100295028 - Method of fabricating an electronic device: A method of fabricating an electronic device comprises providing a layer structure (48) supported on a first substrate (34), providing a second, patterned substrate (28) and transferring selected areas (58) of the first layer structure onto the second substrate.... Agent: Mccarter & English, LLP Boston

20100295027 - Organic electroluminescence device: An organic electroluminescence device includes: an anode; a cathode; and an organic thin-film layer provided between the anode and the cathode and including at least three emitting layers. The organic thin-film layer includes: a first emitting layer adjacent to the anode; a second emitting layer adjacent to the cathode; and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100295033 - Organic electroluminescence element and method for manufacturing the same: An organic electroluminescence element includes: a substrate (111); a first electrode layer (121) provided above the surface of the substrate; an organic base layer (141) that is provided covering at least a part of the first electrode layer, and is made of a material insoluble in water; a bank (131B)... Agent: Sughrue Mion, PLLC

20100295026 - Organic electroluminescent element, display device and lighting device: Disclosed is an organic electroluminescent element containing organic layers sandwiched between an anode and a cathode, wherein the organic layers incorporates an emission layer A containing a host compound A and at least two types of emission dopants, and an emission layer B containing a host compound B and at... Agent: Cantor Colburn LLP

20100295031 - Organic light emitting device and method of manufacturing the same: An organic light emitting device and a method of manufacturing the same, the device including: a substrate; a barrier layer; a first electrode; a second electrode; and an organic layer interposed between the first electrode and the second electrode, wherein the barrier layer includes an SiO layer and an SiOxNy... Agent: Stein Mcewen, LLP

20100295034 - Semiconductor device: It is an object of the present invention to provide a semiconductor device in which data can be written except when manufacturing the semiconductor device and that counterfeits can be prevented. Moreover, it is another object of the invention to provide an inexpensive semiconductor device including a memory having a... Agent: Robinson Intellectual Property Law Office, P.C.

20100295036 - Structure for making solution processed electronic devices: There is provided a process for forming an organic electronic device wherein a TFT substrate having a non-planar surface has deposited over that substrate a planarization layer such that a substantially planar substrate, or planarized substrate, is formed. A multiplicity of thin first electrode structures having a first thickness and... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20100295041 - Display: An active matrix display comprising a light control device and a field effect transistor for driving the light control device. The active layer of the field effect transistor comprises an amorphous.... Agent: Fitzpatrick Cella Harper & Scinto

20100295042 - Field-effect transistor, method for manufacturing field-effect transistor, display device using field-effect transistor, and semiconductor device: A field effect transistor which includes an oxide film as a semiconductor layer, the oxide film has a channel part, a source part and a drain part, and the channel part, the source part and the drain part have substantially the same composition except oxygen and an inert gas.... Agent: Millen, White, Zelano & Branigan, P.C.

20100295039 - Method for growing zinc-oxide-based semiconductor device and method for manufacturing semiconductor light emitting device: A method which has a step of growing a thermostable-state ZnO-based single crystal on a ZnO single crystal substrate at a growth temperature that is equal to or greater than 600° C. and less than 900° C. by using a metalorganic compound containing no oxygen and water vapor based on... Agent: Holtz, Holtz, Goodman & Chick PC

20100295040 - Method for growing zinc-oxide-based semiconductor device and method for manufacturing semiconductor light emitting device: A method which has a low-temperature growth step of growing a buffer layer of a ZnO-based single crystal on the substrate at a growth temperature in the range of 250° C. to 450° C. using a polar oxygen material and a metalorganic compound containing no oxygen; performing a heat treatment... Agent: Holtz, Holtz, Goodman & Chick PC

20100295038 - Method of manufacturing field-effect transistor, field-effect transistor, and method of manufacturing display device: There is provided a method of manufacturing a top contact field-effect transistor including forming a protection layer on an active layer formed in a semiconductor layer forming process, forming a photoresist film on the protection layer and pattern exposing the same in an exposure process, and developing the photoresist film... Agent: Solaris Intellectual Property Group, PLLC

20100295037 - Thin film transistor, display, and electronic apparatus: Disclosed herein is a thin film transistor including: a semiconductor layer including an amorphous oxide, and a source electrode and a drain electrode which are provided in contact with the semiconductor layer. The source electrode and the drain electrode are formed by use of iridium or iridium oxide.... Agent: Rader Fishman & Grauer PLLC

20100295043 - Semiconductor device: A technique is provided that can prevent cracking of a protective film in the uppermost layer of a semiconductor device and improve the reliability of the semiconductor device. Bonding pads formed over a principal surface of a semiconductor chip are in a rectangular shape, and an opening is formed in... Agent: Miles & Stockbridge PC

20100295044 - Semiconductor device and method of manufacturing the same: To provide: a technique capable of suppressing a titanium nitride film that is exposed at the side surface of an opening from turning into a titanium oxide film even when water permeates the opening over a pad from outside a semiconductor device and thus improving the reliability of the semiconductor... Agent: Miles & Stockbridge PC

20100295045 - Tape carrier package, individual tape carrier package product, and method of manufacturing the same: A tape carrier package includes: a tape base; and interconnections formed on the tape base and extending to intersect a cutting line. At least a slit is formed along each of the interconnections, to intersect the cutting line and to divide the interconnection into a plurality of interconnection elements.... Agent: Mcginn Intellectual Property Law Group, PLLC

20100295047 - Semiconductor element and method for manufacturing the same: A semiconductor device of the present invention includes a glass substrate 1, an island-shaped semiconductor layer 4 which includes a first region 4c, a second region 4a, and a third region 4c, a source region 5a and a drain region 5b, a source electrode 6a, a drain electrode 6b, and... Agent: Birch Stewart Kolasch & Birch

20100295046 - Semiconductor thin film and semiconductor device: After an amorphous semiconductor thin film is crystallized by utilizing a catalyst element, the catalyst element is removed by performing a heat treatment in an atmosphere containing a halogen element. A resulting crystalline semiconductor thin film exhibits {110} orientation. Since individual crystal grains have approximately equal orientation, the crystalline semiconductor... Agent: Robinson Intellectual Property Law Office, P.C.

20100295051 - Electro-luminescence device including a thin film transistor and method of fabricating an electro-luminescence device: An electro-luminescence device including an electro-luminescence element and a thin film transistor electrically connected to the electro-luminescence element. The thin film transistor includes a gate electrode formed over a substrate, an insulating layer formed over the gate electrode, and a first semiconductor pattern formed over the insulating layer. An etch... Agent: F. Chau & Associates, LLC

20100295048 - Tft array substrate and method for forming the same: A TFT array substrate comprises an insulator base; a first metal layer on the insulator base, a first portion thereof forming a gate electrode of a TFT; a gate insulating layer overlying the first metal layer and the insulator base; an amorphous silicon layer and a first layer of conductive... Agent: Customer No. 70416 Perkins Coie LLP

20100295049 - Tft-lcd array substrate and manufacturing method thereof: The embodiment of the invention provides a manufacturing method for a thin film transistor liquid crystal display (TFT-LCD) array substrate, the manufacturing method comprises: step 1, depositing a transparent conductive film, a source/drain metal film and a doped semiconductor film on a transparent substrate sequentially, forming patterns of a doped... Agent: Ladas & Parry LLP

20100295050 - Thin film transistor array panel and methods for manufacturing the same: Disclosed is a simplified method for manufacturing a liquid crystal display. A gate wire including a gate line, a gate pad, and a gate electrode are formed on a substrate. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially deposited, and a photoresist layer is... Agent: Innovation Counsel LLP

20100295052 - Light emitting device, method of manufacturing the same, and manufacturing apparatus therefor: A light emitting device having high definition, a high aperture ratio, and high reliability is provided. The present invention achieves high definition and a high aperture ratio with a full color flat panel display using red, green, and blue color emission light by intentionally forming laminate portions, wherein portions of... Agent: Husch Blackwell Sanders, LLP Husch Blackwell Sanders LLP Welsh & Katz

20100295053 - Thin film transistor substrate and display device: The present invention provides a thin film transistor substrate and a display device in which a decrease in the dry etching rate of a source electrode and drain electrode is not caused; no etching residues are generated; and a barrier metal can be eliminated between a semiconductor layer and metal... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100295057 - Down-converted light source with uniform wavelength emission: An arrangement of light sources is attached to a semiconductor wavelength converter. Each light source emits light at a respective peak wavelength, and the arrangement of light sources is characterized by a first range of peak wavelengths. The semiconductor wavelength converter is characterized by a second range of peak wavelengths... Agent: 3m Innovative Properties Company

20100295056 - Iii-nitride materials including low dislocation densities and methods associated with the same: Semiconductor structures including one, or more, III-nitride material regions (e.g., gallium nitride material region) and methods associated with such structures are provided. The III-nitride material region(s) advantageously have a low dislocation density and, in particular, a low screw dislocation density. In some embodiments, the presence of screw dislocations in the... Agent: Wolf Greenfield & Sacks, P.C.

20100295055 - Nitride semiconductor substrate and manufacturing method of the same: To improve an adhesion to a substrate holder, and improve a device production yield by uniformizing a temperature distribution in a surface of a substrate and uniformizing characteristics such as a film thickness. When a concave warpage is set to be negative on a substrate front side, and a convex... Agent: Fleit Gibbons Gutman Bongini & Bianco Pl

20100295054 - Semiconductor light-emitting element and method for fabricating the same: The semiconductor light-emitting element includes a group III nitride semiconductor multilayer structure having an active layer containing In as well as a p-type layer and an n-type layer stacked to hold the active layer therebetween. The group III nitride semiconductor multilayer structure is made of a group III nitride semiconductor... Agent: Rabin & Berdo, PC

20100295061 - Recrystallization of semiconductor waters in a thin film capsule and related processes: An original wafer, typically silicon, has the form of a desired end PV wafer. The original may be made by rapid solidification or CVD. It has small grains. It is encapsulated in a clean thin film, which contains and protects the silicon when recrystallized to create a larger grain structure.... Agent: Steven J Weissburg

20100295060 - Semiconductor device and method for manufacturing the same: A semiconductor device 100 includes: a semiconductor substrate 10 of silicon carbide of a first conductivity type; a silicon carbide epitaxial layer 20 of the first conductivity type, which has been grown on the principal surface 10a of the substrate 10; well regions 22 of a second conductivity type, which... Agent: Mark D. Saralino (pan) Renner, Otto, Boisselle & Sklar, LLP

20100295062 - Semiconductor element and manufacturing method therefor: A semiconductor device includes: a semiconductor layer including silicon carbide, which has been formed on a substrate; a semiconductor region 15 of a first conductivity type defined on the surface of the semiconductor layer 10; a semiconductor region 14 of a second conductivity type, which is defined on the surface... Agent: Mark D. Saralino (pan) Renner, Otto, Boisselle & Sklar, LLP

20100295059 - Sic single-crystal substrate and method of producing sic single-crystal substrate: The invention provides a high-quality SiC single-crystal substrate, a seed crystal for producing the high-quality SiC single-crystal substrate, and a method of producing the high-quality SiC single-crystal substrate, which enable improvement of device yield and stability. Provided is an SiC single-crystal substrate wherein, when the SiC single-crystal substrate is divided... Agent: Birch Stewart Kolasch & Birch

20100295058 - Tunneling field effect transistor switch device: A tunneling field effect transistor (TFET) device includes a semiconductor substrate having a layer of relatively intermediate bandgap semiconductor material, a layer of relatively low bandgap semiconductor material overlying the layer of relatively intermediate bandgap semiconductor material, and a layer of relatively high bandgap semiconductor material overlying the layer of... Agent: Ingrassia Fisher & Lorenz, P.C. (gf)

20100295063 - Lens array and optical module having the same: A lens array can have monitor light reliably and can be manufactured easily. With this lens array (2), a reflecting/transmission surface (15) of a first concave part (14) branches laser lights L having been emitted from light emitting elements (7) and having been incident on first lens surfaces (11), toward... Agent: Kubotera & Associates, LLC

20100295065 - Light emitting and receiving device: A light emitting and receiving device having a first region and a second region adjacent to the first region in a plan view, includes: a light absorbing layer formed in the first and second regions; a first cladding layer formed above the light absorbing layer; an active layer formed above... Agent: Harness, Dickey & Pierce, P.L.C

20100295064 - Organic light emitting diode device: The invention relates to an organic light emitting diode device (1) comprising a substrate material (10) as a carrier, which is coated and/or superimposed by a lower electrode layer (11), at least one emitting material layer (12) for light emitting and an upper electrode layer (13), whereas the upper electrode... Agent: Philips Intellectual Property & Standards

20100295066 - Semiconductor substrate and methods for the production thereof: The invention relates to semiconductor substrates and methods for producing such semiconductor substrates. In this connection, it is the object of the invention to provide semiconductor substrates which can be produced more cost-effectively and with which a high arrangement density as well as good electrical conductivity and closed surfaces can... Agent: Millen, White, Zelano & Branigan, P.C.

20100295069 - High luminous flux warm white solid state lighting device: A high luminous flux warm white solid state lighting device with a high color rendering is disclosed. The device comprising two groups of semiconductor light emitting components to emit and excite four narrow-band spectrums of lights at high luminous efficacy, wherein the semiconductor light emitting components are directly mounted on... Agent: Harvey S. Kauget Phelps Dunbar, LLP

20100295068 - Light emitting device package and lighting apparatus using the same: In one embodiment, the light emitting device package includes a package body, electrodes attached to the package body, and at least two light emitting devices electrically connected to the electrodes. Each light emitting device emits light of a different color from the other light emitting devices. A protective layer is... Agent: Ked & Associates, LLP

20100295067 - Light emitting device with collimating structure: The present invention provides a light collimating structure (102) comprising a first collimator (131) collimating light of a first property and at least one second collimator (141) collimating light of a second property, where the receiving areas (132, 142) of the collimators at least partly overlap and where the output... Agent: Philips Intellectual Property & Standards

20100295070 - Light emitting device: A light emitting device comprises a plurality of LED chips (“lateral” or “vertical” conducting) operable to generate light of a first wavelength range and a package for housing the chips. The package comprises: a thermally conducting substrate (copper) on which the LED chips are mounted and a cover having a... Agent: Fliesler Meyer LLP

20100295071 - Light emitting device: A light emitting device includes a carrier, a light emitting element electrically connected to the carrier, a transparent plate having at least one through hole formed therein and including a flat-portion and a lens-portion and a permeable membrane structure disposed on a surface of the transparent plate. The lens-portion covers... Agent: Jianq Chyun Intellectual Property Office

20100295086 - Compound semiconductor light-emitting element and method of manufacturing the same, conductive translucent electrode for compound semiconductor light-emitting element, lamp, electronic device, and mechanical apparatus: The invention provides a compound semiconductor light-emitting element including: a substrate on which an n-type semiconductor layer (12), a light-emitting layer (13), and a p-type semiconductor layer (14) that are made of a compound semiconductor are stacked in this order; a positive electrode (15) made of a conductive translucent electrode;... Agent: Sughrue Mion, PLLC

20100295075 - Down-converted light emitting diode with simplified light extraction: A wavelength converted light emitting diode (LED) device has an LED having an output surface. A multilayer semiconductor wavelength converter is optically bonded to the LED. At least one of the LED and the wavelength converter is provided with light extraction features.... Agent: 3m Innovative Properties Company

20100295080 - Light emitting device and light emitting device package having the same: A light emitting device may comprise a first semiconductor layer having a first and second surfaces, the first and second surfaces being opposite surfaces, the first semiconductor layer having a plurality of semiconductor columns extending from the second surface, the plurality of semiconductor columns being separated from each other; a... Agent: Ked & Associates, LLP

20100295082 - Light emitting package and light emitting package array: Example embodiments may include a light emitting device package. The light emitting device package may include a light emitting device, a package body-including a cavity having a bottom surface on which the light emitting device is mounted and a side surface for reflecting light emitted from the light emitting device,... Agent: Harness, Dickey & Pierce, P.L.C

20100295074 - Light-emitting component having a wavelength converter and production method: A conversion layer (5) is vapour-deposited onto the light-emitting surface. The conversion layer (5) may comprise a vapour-depositable matrix material and a vapour-depositable converter material, which may in particular both comprise low molecular weight organic compounds. A multilayer structure (3), which contains the layers provided for generating radiation, may likewise... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100295072 - Light-emitting diode: Disclosed is an improved light-emitting diode, which can be a PLCC or SMD type light-emitting diode. The light-emitting diode includes a package body, at least one pair of conductive terminals, and an optic lens. The package body has an end surface, a circumferential surface extending from the end surface, and... Agent: Rosenberg, Klein & Lee

20100295077 - Manufacture of light emitting devices with phosphor wavelength conversion: A method of manufacturing a light emitting device: an LED wafer having an array of LEDs formed on a surface thereof, the method comprises: a) fabricating a sheet of phosphor/polymer material comprising a light transmissive polymer material having at least one phosphor material distributed throughout its volume and in which... Agent: Fliesler Meyer LLP

20100295078 - Manufacture of light emitting devices with phosphor wavelength conversion: A method of manufacturing a light emitting device comprises: a) depositing over substantially the entire surface of a LED diode wafer having an array of LEDs formed on a surface thereof a mixture of at least one phosphor material and a polymer material, wherein the polymer material is transmissive to... Agent: Fliesler Meyer LLP

20100295079 - Manufacture of light emitting devices with phosphor wavelength conversion: A method of manufacturing a light emitting device comprises: depositing over substantially the entire surface of a LED wafer having a array of LEDs formed on a surface thereof a mixture of at least one phosphor and a polymer material, wherein the polymer material is transmissive to light generated by... Agent: Fliesler Meyer LLP

20100295084 - Method of fabricating photoelectronic device of group iii nitride semiconductor and structure thereof: A method of fabricating a photoelectric device of Group III nitride semiconductor comprises the steps of: forming a first Group III nitride semiconductor layer on a surface of an original substrate; forming a patterned epitaxial-blocking layer on the first Group III nitride semiconductor layer; forming a second Group III nitride... Agent: Wpat, PC Intellectual Property Attorneys

20100295073 - Optoelectronic semiconductor chip: An optoelectronic semiconductor chip (1) comprises a radiation passage area (3), a contact metallization (2a) applied to the radiation passage area (3), and a first reflective layer sequence (2b) applied to that surface of the contact metallization (2a) which is remote from the radiation passage area (3). An optoelectronic component... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100295085 - Organic electroluminescent element, production method for the same, planar light source, lighting device, and display device:

20100295076 - Semiconductor component emitting polarized radiation: A semiconductor component emits polarized radiation with a first polarization direction. The semiconductor component includes a chip housing, a semiconductor chip and a chip-remote polarizing filter.... Agent: Slater & Matsil, L.L.P.

20100295081 - Single or multi-color high efficiency light emitting diode (led) by growth over a patterned substrate: A single or multi-color light emitting diode (LED) with high extraction efficiency is comprised of a substrate, a buffer layer formed on the substrate, one or more patterned layers deposited on top of the buffer layer, and one or more active layers formed on or between the patterned layers, for... Agent: Gates & Cooper LLP Howard Hughes Center

20100295083 - Substrates for monolithic optical circuits and electronic circuits: A multilayer wafer structure containing a silicon layer that contains at least one waveguide, an insulating layer and a layer that is lattice compatible with Group III-V compounds, with the lattice compatible layer in contact with one face of the insulating layer, and the face of the insulating layer opposite... Agent: Winston & Strawn LLP Patent Department

20100295089 - Light emitting device package and method for fabricating the same: Provided are a light emitting device package and a method for fabricating the same. The light emitting device package comprises a substrate; a light emitting device on the substrate; a zener diode comprising a first conductive type impurity region and two second conductive type impurity regions, the first conductive type... Agent: Birch Stewart Kolasch & Birch

20100295087 - Light emitting diode with high electrostatic discharge and fabrication method thereof: The present invention relates to a light emitting diode with high electrostatic discharge and a fabrication method thereof, and more specifically to a light emitting diode comprising a first electrode layer provided over a upper surface of a first semiconductor layer and a upper surface of a second semiconductor layer;... Agent: Baker & Hostetler LLP

20100295090 - Mount for a semiconductor light emitting device: A mount for a semiconductor device includes a carrier, at least two metal leads disposed on a bottom surface of the carrier, and a cavity extending through a thickness of the carrier to expose a portion of the top surfaces of the metal leads. A semiconductor light emitting device is... Agent: Philips Intellectual Property & Standards

20100295088 - Textured-surface light emitting diode and method of manufacture: A high efficiency textured-surface light emitting diode comprises a flip-chipped stack of AlxInyGa1-x-yN layers, where 0≦x, y, x+y≦1. Each layer has a high crystalline quality, with a dislocation density below about 105 cm−2. The backside of the stack, exposed by removal of the original substrate, has a textured surface for... Agent: Townsend And Townsend And Crew, LLP

20100295091 - Encapsulant compositions, methods of manufacture and uses thereof: An encapsulant composition containing about 15 to about 50 wt % of an ethylene/ethyl acrylate/maleic anhydride copolymer containing about 20 to about 40 wt % of an ethylene/glycidyl (meth)acrylate copolymer; about 2 to about 30 wt % of an ethylene/butyl acrylate/maleic anhydride copolymer; about 5 to about 50 wt %... Agent: Cantor Colburn LLP

20100295092 - Integrated pmos transistor and schottky diode: The present invention discloses an integrated PMOS transistor and Schottky diode, comprising a PMOS transistor which includes a gate, a source, a drain and a channel region between the source and drain, wherein the source, drain and channel region are formed in a substrate, and a parasitic diode is formed... Agent: Tung & Associates

20100295093 - Reverse-conducting semiconductor device and method for manufacturing such a reverse-conducting semiconductor device: A method for manufacturing a reverse-conducting semiconductor device (RC-IGBT) with a seventh layer formed as a gate electrode and a first electrical contact on a emitter side and a second electrical contact on a collector side, which is opposite the emitter side, a wafer of a first conductivity type with... Agent: Buchanan, Ingersoll & Rooney PC

20100295094 - Esd protection apparatus and electrical circuit including same: An ESD protection apparatus includes a substrate, a transistor structure arranged in the substrate, and a diode structure arranged in the substrate, a high-resistance electrical connection being provided between the transistor structure and the diode structure in the substrate.... Agent: Slater & Matsil, L.L.P.

20100295095 - Depletion-less photodiode with suppressed dark current and method for producing the same: The invention relates to a photo-detector with a reduced G-R noise, which comprises a sequence of a p-type contact layer, a middle barrier layer and an n-type photon absorbing layer, wherein the middle barrier layer has an energy bandgap significantly greater than that of the photon absorbing layer, and there... Agent: Frommer Lawrence & Haug

20100295096 - Integrated devices on a common compound semiconductor iii-v wafer: A method of fabricating an integrated circuit on a compound semiconductor III-V wafer including at least two different types of active devices by providing a substrate; growing a first epitaxial structure on the substrate; growing a second epitaxial structure on the first epitaxial structure; and processing the epitaxial structures to... Agent: Fish & Richardson P.C.

20100295097 - Field-effect transistor: A field-effect transistor according to the present invention includes a silicon substrate that has a resistivity of not more than 0.02 Ω•cm, a channel layer that is formed on the silicon substrate and has a thickness of at least 5 μm, a barrier layer that is formed on the channel... Agent: Young & Thompson

20100295098 - Iii-v hemt devices: A semiconductor device has a stacked structure in which a p-GaN layer, an SI-GaN layer, and an AlGaN layer are stacked, and has a gate electrode that is formed at a top surface side of the AlGaN layer. A band gap of the AlGaN layer is wider than a band... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100295099 - Image sensing device and packaging method thereof: An image sensing device and packaging method thereof is disclosed. The packaging method includes the steps of a) providing an image sensing module, having a light-receiving region exposed, on a first substrate; b) forming a plurality of first contacts around the light-receiving region on the image sensing module; c) providing... Agent: Bacon & Thomas, PLLC

20100295100 - Integrated circuit having a bulk acoustic wave device and a transistor: A bulk GaN layer is on a first surface of a substrate, wherein the bulk GaN layer has a GaN transistor region and a bulk acoustic wave (BAW) device region. A source/drain layer is over a first surface of the bulk GaN layer in the GaN transistor region. A gate... Agent: Freescale Semiconductor, Inc. Law Department

20100295101 - Integrated jfet and schottky diode: The present invention discloses an integrated junction field effect transistor (JFET) and Schottky diode, comprising a depletion mode JFET which includes a source, a drain and a gate, wherein the drain is not provided with an ohmic contact such that it forms a Schottky diode.... Agent: Tung & Associates / Randy W. Tung, Esq.

20100295102 - Normally-off integrated jfet power switches in wide bandgap semiconductors and methods of making: Wide bandgap semiconductor devices including normally-off VJFET integrated power switches are described. The power switches can be implemented monolithically or hybridly, and may be integrated with a control circuit built in a single- or multi-chip wide bandgap power semiconductor module. The devices can be used in high-power, temperature-tolerant and radiation-resistant... Agent: Morris Manning Martin LLP

20100295103 - Gate etch optimization through silicon dopant profile change: Improved semiconductor devices comprising metal gate electrodes are formed with reduced performance variability by reducing the initial high dopant concentration at the top portion of the silicon layer overlying the metal layer. Embodiments include reducing the dopant concentration in the upper portion of the silicon layer, by implanting a counter-dopant... Agent: Ditthavong Mori & Steiner, P.C.

20100295105 - Semiconductor device and method for manufacturing the same: A method for manufacturing a semiconductor device includes: an element portion formation step of forming an element portion on a base layer; a delaminating layer formation step of forming a delaminating layer in the base layer; a bonding step of bonding the base layer having the element portion to a... Agent: Sharp Kabushiki Kaisha C/o Keating & Bennett, LLP

20100295104 - Semiconductor structures having both elemental and compound semiconductor devices on a common substrate: A semiconductor structure comprising: a substrate; a seed layer supported by the substrate; an elemental semiconductor layer disposed over a first portion of the seed layer; and a compound semiconductor layer disposed on a second portion of the seed layer. The first portion of the seed layer is electrically insulated... Agent: Raytheon Company C/o Daly, Crowley, Mofford & Durkee, LLP

20100295106 - Transistor structure and dynamic random access memory structure including the same: A dynamic random access memory structure is disclosed, in which, the active area is a donut-type pillar at which a novel vertical transistor is disposed and has a gate filled in the central cavity of the pillar and upper and lower sources/drains located in the upper and the lower portions... Agent: North America Intellectual Property Corporation

20100295107 - Solid-state imaging device and method of manufacturing the same and electronic apparatus: A solid-state imaging device is provided. The solid-state imaging device includes a pixel section, a peripheral circuit section, a silicide blocking layer formed in the pixel section except for part or whole of an area above an isolation portion in the pixel section, and a metal-silicided transistor formed in the... Agent: Sonnenschein Nath & Rosenthal LLP

20100295108 - Ferroelectric memory device and fabrication process thereof, fabrication process of a semiconductor device: A method for fabricating a ferroelectric memory device, including terminating a surface of the interlayer insulation film and a surface of the contact plug with an OH group; forming a layer containing Si, oxygen and a CH group on the surface of the interlayer insulation film and the contact hole... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100295109 - Memory arrays, semiconductor constructions and electronic systems: Some embodiments include DRAM having transistor gates extending partially over SOI, and methods of forming such DRAM. Unit cells of the DRAM may be within active region pedestals, and in some embodiments the unit cells may comprise capacitors having storage nodes in direct contact with sidewalls of the active region... Agent: Wells St. John P.s.

20100295110 - Device and manufacturing method thereof: A device manufacturing method includes forming a first insulation film on a semiconductor substrate. A first mask is formed on the first insulation film to extend in a first direction and have a linear pattern. The first insulation film is etched using the first mask as mask to process the... Agent: Young & Thompson

20100295111 - Semiconductor device and method for fabricating the same: A semiconductor device includes a semiconductor element and a protection diode formed on a semiconductor substrate. Over the semiconductor substrate, a first interlayer dielectric layer is formed so as to cover the semiconductor element and the protection diode. In the first interlayer dielectric layer, a first plug electrically connected to... Agent: Mcdermott Will & Emery LLP

20100295114 - Semiconductor constructions: Some embodiments include formation of polymer spacers along sacrificial material, removal of the sacrificial material, and utilization of the polymer spacers as masks during fabrication of integrated circuitry. The polymer spacer masks may, for example, be utilized to pattern flash gates of a flash memory array. In some embodiments, the... Agent: Wells St. John P.s.

20100295113 - Semiconductor devices comprising a plurality of gate structures: Semiconductor devices including a plurality of gate structures disposed on a semiconductor substrate are provided. Each of the gate structures includes a tunnel dielectric layer, a floating gate, an inter-gate dielectric layer, a control gate, and a mask layer. Liners cover opposing sidewalls of adjacent floating gates. Spacers are disposed... Agent: Myers Bigel Sibley & Sajovec

20100295112 - Semiconductor storage device: A semiconductor storage device has a semiconductor substrate, a plurality of first insulating films formed on the semiconductor substrate with predetermined spacing therebetween, an element isolation region formed between the first insulating films in a first direction, a floating gate electrode comprising a first charge accumulation film formed on the... Agent: Turocy & Watson, LLP

20100295115 - Nonvolatile semiconductor memory device including nonvolatile memory cell: A nonvolatile semiconductor memory device includes the following structure. Element isolation films are formed at predetermined intervals in a first direction in a surface region of a semiconductor substrate. The element isolation films extend in a second direction and isolate the surface region of the semiconductor substrate to provide element... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100295116 - Semiconductor device and manufacturing method thereof: A semiconductor device having a first semiconductor region and second semiconductor region including impurities formed on an insulating layer formed on a semiconductor substrate, an insulator formed between the first semiconductor region and the second semiconductor region, a first impurity diffusion control film formed on the first semiconductor region and... Agent: Banner & Witcoff, Ltd. Attorneys For Client No. 000449, 001701

20100295117 - Junction-free nand flash memory and fabricating method thereof: A junction-free NAND flash memory is described, including a substrate, memory cells, source/drain inducing (SDI) gates electrically connected with each other, and a dielectric material layer. The memory cells are disposed on the substrate, wherein each memory cell includes a charge storage layer. Each SDI gate is disposed between two... Agent: Jianq Chyun Intellectual Property Office

20100295118 - Nanocrystal based universal memory cells, and memory cells: Some embodiments include memory cells that contain a dynamic random access memory (DRAM) element and a nonvolatile memory (NVM) element. The DRAM element contains two types of DRAM nanoparticles that differ in work function. The NVM contains two types of NVM nanoparticles that differ in trapping depth. The NVM nanoparticles... Agent: Wells St. John P.s.

20100295121 - Semiconductor device and manufacturing method thereof: To provide a semiconductor device including a first silicon pillar, an interlayer dielectric film provided on an upper surface of the first silicon pillar and having a through-hole filled with a conductive material, and a first-diffusion-layer contact plug provided on an upper-side opening of the through-hole. An area of a... Agent: Mcdermott Will & Emery LLP

20100295119 - Vertically-oriented semiconductor selection device for cross-point array memory: A vertical semiconductor material mesa upstanding from a semiconductor base that forms a conductive channel between first and second doped regions. The first doped region is electrically coupled to one or more first silicide layers on the surface of the base. The second doped region is electrically coupled to a... Agent: Dickstein Shapiro LLP

20100295120 - Vertically-oriented semiconductor selection device providing high drive current in cross-point array memory: A vertical semiconductor material mesa upstanding from a semiconductor base that forms a conductive channel between first and second doped regions. The first doped region is electrically coupled to one or more first silicide layers on the surface of the base. The second doped region is electrically coupled to one... Agent: Dickstein Shapiro LLP

20100295122 - Mosfet having recessed channel: A MOSFET having a recessed channel and a method of fabricating the same. The critical dimension (CD) of a recessed trench defining the recessed channel in a semiconductor substrate is greater than the CD of the gate electrode disposed on the semiconductor substrate. As a result, the misalignment margin for... Agent: Stanzione & Kim, LLP

20100295123 - Phase change memory cell having vertical channel access transistor: Memory devices are described along with methods for manufacturing. A device as described herein includes a substrate having a first region and a second region. The first region comprises a first field effect transistor comprising first and second doped regions separated by a horizontal channel region within the substrate, a... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20100295124 - Mos-power transistors with edge termination with small area requirement: It is the purpose of the invention to provide a MOS transistor (20) which guarantees a voltage as high as possible, has a required area as small as possible and which enables the integration into integrated smart power circuits. It results there from as an object of the invention to... Agent: Hunton & Williams LLP Intellectual Property Department

20100295125 - Split gate oxides for a laterally diffused metal oxide semiconductor (ldmos): An apparatus is disclosed to increase a breakdown voltage of a semiconductor device. The semiconductor device includes a first heavily doped region to represent a source region. A second heavily doped region represents a drain region of the semiconductor device. A third heavily doped region represents a gate region of... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20100295126 - High dielectric constant gate oxides for a laterally diffused metal oxide semiconductor (ldmos): An apparatus is disclosed to increase a breakdown voltage of a semiconductor device. The semiconductor device includes a first heavily doped region to represent a source region. A second heavily doped region represents a drain region of the semiconductor device. A metal region represents a gate region of the semiconductor... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20100295128 - Double insulating silicon on diamond device: A silicon-on-diamond (SOD) transistor includes a silicon-based substrate, a diamond insulating layer over the silicon-based substrate, a silicon-based insulating layer directly over and in contact with the diamond insulating layer, a body over the silicon-based insulating layer, and a gate over the body. The structure of the SOD transistor provides... Agent: InternationalIPGroup, LLC

20100295129 - Field effect transistor with narrow bandgap source and drain regions and method of fabrication: A transistor having a narrow bandgap semiconductor source/drain region is described. The transistor includes a gate electrode formed on a gate dielectric layer formed on a silicon layer. A pair of source/drain regions are formed on opposite sides of the gate electrode wherein said pair of source/drain regions comprise a... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100295127 - Method of forming a planar field effect transistor with embedded and faceted source/drain stressors on a silicon-on-insulator (soi) wafer, a planar field effect transistor structure and a design structure for the planar field effect transistor: Disclosed are embodiments of a method of forming, on an SOI wafer, a planar FET with embedded and faceted source/drain stressors. The method incorporates a directional ion implant process to create amorphous regions at the bottom surfaces of source/drain recesses in a single crystalline semiconductor layer of an SOI wafer.... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20100295131 - Semiconductor device and manufacturing method of semiconductor device: A buried insulating layer is buried at a position lower than a surface of a semiconductor substrate, and a cap insulating layer, which is made of a material different from the buried insulating layer, is formed on the buried insulating layer not to protrude into a shoulder portion of a... Agent: Turocy & Watson, LLP

20100295130 - Semiconductor device having bit line expanding islands: Provided is a semiconductor device having bit line expanding islands, which are formed underneath bit lines to reliably expand and connect the bit lines. The semiconductor device includes: a semiconductor layer in which an isolation region and an active region are defined; an insulating layer, which is formed on the... Agent: Myers Bigel Sibley & Sajovec

20100295132 - Programmable pn anti-fuse: Structure and method for providing a programmable anti-fuse in a FET structure. A method of forming the programmable anti-fuse includes: providing a p− substrate with an n+ gate stack; implanting an n+ source region and an n+ drain region in the p− substrate; forming a resist mask over the n+... Agent: Hoffman Warnick LLC

20100295133 - Resistor of semiconductor device and method of forming the same: The resistor of a semiconductor device comprises a semiconductor substrate comprising isolation layers and active regions, a gate insulating layer and a first polysilicon layer formed over the active region, a second polysilicon layer separated into a first pattern formed on the isolation layer, and a second pattern formed over... Agent: Marshall, Gerstein & Borun LLP

20100295136 - Method for fabrication of a semiconductor device and structure: A method for fabrication of 3D semiconductor devices utilizing a layer transfer and steps for forming transistors on top of a pre-fabricated semiconductor device comprising transistors formed on crystallized semiconductor base layer and metal layer for the transistors interconnections and insulation layer. The advantage of this approach is reduction of... Agent: Venable LLP

20100295134 - Semiconductor memory device and method of fabricating the same: A semiconductor memory device according to one embodiment includes: a semiconductor substrate having an active region divided by an element isolation region; a plurality of stacked-gate type memory cell transistors connected in series on the active region; select transistors connected to both ends of the plurality of memory cell transistors... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100295135 - Semiconductor memory device and production method therefor: In a static memory cell comprising six MOS transistors, the MOS transistors have a structure in which the drain, gate and source formed on the substrate are arranged in the vertical direction and the gate surrounds the columnar semiconductor layer, the substrate comprises a first active region having a first... Agent: Cantor Colburn LLP

20100295137 - Method and apparatus providing different gate oxides for different transitors in an integrated circuit: An integrated circuit and gate oxide forming process are disclosed which provide a gate structure that is simple to integrate with conventional fabrication processes while providing different gate oxide thicknesses for different transistors within the integrated circuit. For a flash memory, which may utilize the invention, the different gate oxide... Agent: Dickstein Shapiro LLP

20100295138 - Methods and systems for fabrication of mems cmos devices: A MEMS integrated circuit including a plurality of layers where a portion includes one or more electronic elements on a semiconductor material substrate. The circuit includes a structure of interconnection layers having a bottom layer of conductor material and a top layer of conductor material where the layers are separated... Agent: Ropes & Gray LLP

20100295139 - mems package: An apparatus and method for manufacturing a micro-electrical mechanical system (MEMS) package comprising a first molded body having a first acoustic port, a second molded body connected to the first molded body, a leadframe at least partially integral with at least one of the first and second molded bodies, a... Agent: Kenyon & Kenyon LLP

20100295140 - Semiconductor device: A semiconductor device includes a housing defining a cavity, a magnetic sensor chip disposed in the cavity, and mold material covering the magnetic sensor chip and substantially filling the cavity. One of the housing or the mold material is ferromagnetic, and the other one of the housing or the mold... Agent: Dicke, Billig & Czaja

20100295142 - Optical element manufacturing method, optical element, electronic apparatus manufacturing method, and electronic apparatus: An optical element manufacturing method wherein change in optical characteristics before and after the reflow process is suppressed, while maintaining excellent transmittance as an optical element. The method is applicable to reflow process wherein an optical apparatus, including an electronic component such as a CCD image sensor (11), is mounted... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100295141 - Two colour photon detector: A two-color radiation detector includes a mesa-type multi-layered mercury-cadmium-telluride detector structure monolithically integrated on a substrate. The detector is responsive to two discrete wavelength ranges separated by a wavelength range to which the detector is not responsive. The detector further includes two contact points deposited on the layer disposed furthest... Agent: Buchanan, Ingersoll & Rooney PC

20100295143 - Two-dimensional solid-state imaging device: A two-dimensional solid-state imaging device includes: pixel regions arranged in a two-dimensional matrix, wherein each pixel region has a plurality of subpixel regions, a metal layer with an opening of an opening size smaller than the wavelength of an incoming electromagnetic wave and a photoelectric conversion element are arranged with... Agent: Sonnenschein Nath & Rosenthal LLP

20100295144 - Tiled light sensing array: A method is provided of forming a light sensing arrangement for use in a light sensor. The method comprises tiling a plurality of individual light sensing elements on a carrier, each element having a notch formed in an edge thereof, the notch being adapted to provide space, when the elements... Agent: Goodwin Procter LLP Patent Administrator

20100295145 - Photodiode and method of fabricating photodiode: A light-absorbing layer is composed of a compound-semiconductor film of charcopyrite structure, a surface layer is disposed on the light-absorbing layer, the surface layer having a higher band gap energy than the compound-semiconductor film, an upper electrode layer is disposed on the surface layer, and a lower electrode layer is... Agent: Fish & Richardson P.C.

20100295146 - Seal ring structure for integrated circuits: A seal ring structure for an integrated circuit includes a seal ring being disposed along a periphery of the integrated circuit and being divided into at least a first portion and a second portion, wherein the second portion is positioned facing an analog and/or RF circuit block and is different... Agent: North America Intellectual Property Corporation

20100295147 - Isolation structure and formation method thereof: An isolation structure comprising a substrate is provided. A trench is in the substrate. A sidewall of the trench has a first inclined surface and a second inclined surface. The first inclined surface is located on the second inclined surface. The slope of the first inclined surface is different from... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100295148 - Methods of uniformly removing silicon oxide and an intermediate semiconductor device: A method of substantially uniformly removing silicon oxide is disclosed. The silicon oxide to be removed includes at least one cavity therein or more than one density or strain therein. The silicon oxide having at least one cavity or more than one density or strain is exposed to a gaseous... Agent: Trask Britt, P.C./ Micron Technology

20100295149 - Integrated circuit structure with capacitor and resistor and method for forming: An integrated circuit structure with a metal-to-metal capacitor and a metallic device such as a resistor, effuse, or local interconnect where the bottom plate of the capacitor and the metallic device are formed with the same material layers. A process for forming a metallic device along with a metal-to-metal capacitor... Agent: Texas Instruments Incorporated

20100295151 - Semiconductor device: A semiconductor device includes a first substrate having a first surface on which a passive element is formed and a second surface on which a shield layer is formed, and a second substrate having a first surface on which an active element is formed. The first substrate is mounted on... Agent: Mcdermott Will & Emery LLP

20100295150 - Semiconductor device with oxide define dummy feature: A semiconductor device includes a substrate, an inductor wiring pattern on the substrate, and at least one oxide define (OD) dummy feature disposed in the substrate under the inductor wiring pattern.... Agent: North America Intellectual Property Corporation

20100295154 - Capacitor structure: One or more embodiments are related to a semiconductor chip comprising a capacitor, the capacitor comprising: a plurality of conductive plates, each of the plates including a first conductive strip and a second conductive strip disposed over or under the first conductive strip, the second conductive strip of each plate... Agent: Infineon Technologies Ag Patent Department

20100295153 - Integrated circuit system with hierarchical capacitor and method of manufacture thereof: A method of manufacture of an integrated circuit system includes: providing a substrate including front-end-of-line circuitry; forming a first group of metal layers including a first finger and a second finger over the substrate utilizing a first design rule, the first group of metal layers being formed without a finger... Agent: Law Offices Of Mikio Ishimaru

20100295152 - Precision high-frequency capacitor formed on semiconductor substrate: A precision high-frequency capacitor includes a dielectric layer formed on the front side surface of a semiconductor substrate and a first electrode on top of the dielectric layer. The semiconductor substrate is heavily doped and therefore has a low resistivity. A second electrode, insulated from the first electrode, is also... Agent: Wagner, Murabito & Hao LLP Third Floor

20100295156 - Structure for symmetrical capacitor: Capacitance circuits are provided disposing a lower vertical-native capacitor metal layer above a planar front-end-of-line semiconductor base substrate, planar metal bottom plates spaced a bottom plate distance from the base and top plates above the bottom plates spaced a top plate distance from the base defining metal-insulator-metal capacitors, top plate... Agent: Driggs, Hogg, Daugherty & Del Zoppo Co., L.p.a.

20100295155 - Techniques for capacitively coupling signals with an integrated circuit: System and apparatus for capacitively coupling signals with an integrated circuit (IC) are described. Capacitive elements disposed with a transmitting IC effectively function as AC coupling capacitors for a PCIe, DisplayPort™ or other interconnect linking the transmitting IC with a receiver disposed remote there from. Integrating the coupling capacitors allows... Agent: Nvidia C/o Murabito, Hao & Barnes LLP

20100295157 - Esd protection device: An ESD protection device is described, which includes a first P-type doped region, a second P-type doped region, a first N-type doped region, a second N-type doped region and an isolation structure. The first P-type doped region is configured in a substrate. The second P-type doped region is configured in... Agent: J C Patents

20100295158 - Semiconductor constructions: In some embodiments, an opening is formed through a first material, and sidewall topography of the opening is utilized to form a pair of separate anistropically etched spacers. The spacers are utilized to pattern lines in material underlying the spacers. Some embodiments include constructions having one or more openings which... Agent: Wells St. John P.s.

20100295159 - Method for formation of tips: The present invention provides a method (80) for manufacturing a semiconductor tip. The method comprises obtaining (81) a substrate provided with a layer of tip material, providing (82) a doping profile in the layer of tip material, the doping profile comprising a tapered-shaped region of a first dopant concentration, undoped... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20100295160 - Quad flat package structure having exposed heat sink, electronic assembly and manufacturing methods thereof: A quad flat package (QDP) structure having an exposed heat sink is provided. The QDP structure includes a leadframe, a chip, a heat sink, an insulating layer and a molding compound. The leadframe includes a die pad and multiple leads surrounding the die pad. The chip is disposed on the... Agent: J C Patents

20100295161 - Method for semiconductor leadframes in low volume and rapid turnaround: A method for fabricating a leadframe for a QFN/SON semiconductor device by selecting (301) a strip of a first metal as the leadframe core, then plating (302) a layer of a second metal over both surfaces of the strip, then cutting (304) a pattern from the pre-plated strip and further... Agent: Texas Instruments Incorporated

20100295162 - Semiconductor device: Portions of a wiring layer extending like cantilevers from an inner peripheral edge of an opening in a substrate are joined to respective terminals of a semiconductor chip mounted on the substrate. A junction portion between each portion of the wiring layer and the corresponding terminal is sealed with resin.... Agent: Mcginn Intellectual Property Law Group, PLLC

20100295163 - Stacked semiconductor package assembly: A stacked package assembly includes N (where N≧2) package bodies stacked together. Each package body is made up of a substrate which comprises a top surface and a bottom surface, and a chip packaged in the substrate. The top surface of the substrate of each package body includes (N−1) pads,... Agent: Altis Law Group, Inc. Attn: Steven Reiss

20100295164 - Airgap micro-spring interconnect with bonded underfill seal: A package includes a pad chip having contact pads, a spring chip having micro-springs in contact with the contact pads to form interconnects, the area in which the micro-springs contact the contact pads forming an interconnect area, an assembly material between the pad chip and the spring chip arranged to... Agent: Marger Johnson & Mccollom/parc

20100295166 - Semiconductor package: The semiconductor package includes a printed circuit board, a first semiconductor chip, and a second semiconductor chip. The printed circuit board includes a slot. The first semiconductor chip is mounted on the printed circuit board to cover a first part of the slot. The second semiconductor chip is mounted on... Agent: Harness, Dickey & Pierce, P.L.C

20100295165 - Stress-engineered interconnect packages with activator-assisted molds: A package has a pad chip having contact pads, a spring chip having micro-springs in contact with the contact pads to form interconnects, the area in which the micro-springs contact the contact pads forming an interconnect area, a chemical activator in the interconnect area, and an adhesive responsive to the... Agent: Marger Johnson & Mccollom/parc

20100295167 - Semiconductor device and method of forming the same: A semiconductor device includes an insulating substrate, a semiconductor chip, an insulating layer, and a sealing layer. The insulating substrate has an opening. A semiconductor chip is disposed in the opening. An insulating layer is disposed on a first surface of the insulating substrate. The insulating layer covers the opening.... Agent: Foley And Lardner LLP Suite 500

20100295168 - Semiconductor package using conductive plug to replace solder ball: Exemplary embodiments provide a semiconductor package and methods for its formation. The disclosed semiconductor package can use conductive plug(s) to replace solder ball(s) of a conventional BGA semiconductor package. In one embodiment, the semiconductor package can include a conductive pad disposed over a first dielectric layer having a conductive plug... Agent: Texas Instruments Incorporated

20100295169 - Semiconductor substrate and method of connecting semiconductor die to substrate: A semiconductor substrate includes a substrate layer and a circuit film formed over the substrate layer. One or more openings are formed in the circuit film and the substrate layer. Conductive plates are formed over the circuit film at the peripheries of the openings. A semiconductor die is attached to... Agent: Onda Techno Intl. Patent Attys.

20100295171 - Electronic device and method: An electronic device and method is disclosed. In one embodiment, a method includes providing an electrically insulating substrate. A first electrically conductive layer is applied over the electrically insulating substrate. A first semiconductor chip is placed over the first electrically conductive layer. An electrically insulating layer is applied over the... Agent: Dicke, Billig & Czaja

20100295170 - Semiconductor device: A semiconductor device includes a multilayer wiring substrate and a double-sided multi-electrode chip. The double-sided multi-electrode chip includes a semiconductor chip and has multiple electrodes on both sides of the semiconductor chip. The double-sided multi-electrode chip is embedded in the multilayer wiring substrate in such a manner that the double-sided... Agent: Posz Law Group, PLC

20100295172 - Power semiconductor module: Disclosed is a power semiconductor module having improved heat dissipation performance, including an anodized metal substrate including a metal plate, an anodized layer formed on a surface of the metal plate, and a circuit layer formed on the anodized layer on the metal plate, a power device connected to the... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100295173 - Composite underfill and semiconductor package: Embodiments of the invention exploit physical properties of nanostructures by using nanostructures in a composite underfill. An embodiment is a composite underfill comprising an epoxy matrix applied between a substrate and a semiconductor chip and a suspension of nanostructures distributed within the epoxy matrix. Another embodiment is a semiconductor package... Agent: Slater & Matsil, L.L.P.

20100295177 - Electronic component mounting structure, electronic component mounting method, and electronic component mounting board: In an electronic component mounting structure, a semiconductor element (an electronic component) provided with an electrode pad and a board provide with an electrode pad corresponding to the electrode pad are connected via a conductive material portion. On a surface of the board, there is formed solder resist having an... Agent: Mr. Jackson Chen

20100295178 - Semiconductor chip package and manufacturing method thereof: A first wiring pattern is formed on a surface of a first support plate; a semiconductor chip is disposed on the first wiring pattern; and electrode terminals of the semiconductor chip are electrically connected to the first wiring pattern at required positions. Post electrodes connected to a second wiring pattern... Agent: Mcglew & Tuttle, PC

20100295176 - Semiconductor device, method for manufacturing the same, circuit substrate, electro-optical apparatus, and electronic equipment: A semiconductor device is provided with a plurality of protrusions which are made of a resin and which protrude higher than electrodes, and conductive layers which are electrically connected to the electrodes and which cover the top surfaces of the protrusions. A method for manufacturing the semiconductor device includes a... Agent: Harness, Dickey & Pierce, P.L.C

20100295175 - Wafer level chip scale package: A semiconductor device of the invention includes a semiconductor substrate having a first insulating section formed on one surface thereof. A first conductive section is disposed on the one surface of the semiconductor substrate. A second insulating section is superimposed over the first insulating section and covers the first conductive... Agent: Sughrue Mion, PLLC

20100295174 - Wiring substrate and semiconductor device: A wiring substrate includes: a semiconductor chip on which a plurality of bumps are mounted, and a plurality of connection pads which are joined to the bumps mounted on the semiconductor chip in a flip chip method, wherein the connection pads of a peripheral portion of the wiring substrate are... Agent: Drinker Biddle & Reath (dc)

20100295179 - Bga semiconductor device having a dummy bump: A BGA semiconductor device includes a semiconductor package and a mounting board mounting thereon the semiconductor package, wherein an array of signal electrodes of the semiconductor package and an array of signal electrodes of the mounting board are coupled together via signal bumps. The BGA semiconductor device also includes a... Agent: Sughrue Mion, PLLC

20100295180 - Wire bonding structure and manufacturing method thereof: The present invention relates to a wire bonding structure, and more particularly to a manufacturing method for said wire bonding structure. The wire bonding structure comprises a die that connects with a lead via a bonding wire. At least one bond pad is positioned on an active surface of the... Agent: Rosenberg, Klein & Lee

20100295181 - Redundant metal barrier structure for interconnect applications: A redundant metal diffusion barrier is provided for an interconnect structure which improves the reliability and extendibility of the interconnect structure. The redundant metal diffusion barrier layer is located within an opening that is located within a dielectric material and it is between a diffusion barrier layer and a conductive... Agent: Scully, Scott, Murphy & Presser, P.C.

20100295182 - Semiconductor device and method for manufacturing the same: Provided is a method for forming a Cu wiring that does not cause Cu elution during CMP when a Ru material is used as a barrier metal film for the Cu wiring. The method has a step (d) of removing a second barrier metal film (Ru film) formed on a... Agent: Mcdermott Will & Emery LLP

20100295183 - Method for providing electrical connections to spaced conductive lines: An integrated circuit and a method of formation provide a contact area formed at an angled end of at least one linearly extending conductive line. In an embodiment, conductive lines with contact landing pads are formed by patterning lines in a mask material, cutting at least one of the material... Agent: Dickstein Shapiro LLP

20100295184 - Method of manufacturing semiconductor device including wiring layout and semiconductor device: A method of manufacturing a semiconductor device having a first wiring layer, a first interlayer insulating film, a second interlayer insulating film, a third interlayer insulating film, and a second wiring layer, in which the method includes depositing the second wiring layer on the third interlayer insulating film and, where... Agent: Cooper & Dunham, LLP

20100295185 - Nonvolatile memory device and method of manufacturing the same: A nonvolatile memory device comprises a semiconductor substrate comprising alternating, parallel active regions and isolation regions; first and second selection lines intersecting the active regions and the isolation regions; first junctions formed in the active regions between the first and second selection lines; spacers formed on sidewalls of the first... Agent: Marshall, Gerstein & Borun LLP

20100295187 - Semiconductor device and method for fabricating the same: A semiconductor device which can prevent a deterioration in the electrical properties by preventing sputters generated by laser welding from adhering to a circuit pattern or a semiconductor chip and a method for fabricating such a semiconductor device are provided. A connection conductor is bonded to a copper foil formed... Agent: Staas & Halsey LLP

20100295186 - Semiconductor module for stacking and stacked semiconductor module: A pad (15) is provided on a surface connecting a first substrate (11) of a lower layer module with an upper layer module, the pad is partially covered by an insulating film (20) to form an opening section (3) exposing the pad (15), a first connection terminal (2) is formed... Agent: Hamre, Schumann, Mueller & Larson P.C.

20100295188 - Semiconductor device having deep contact structure and method of manufacturing the same: A semiconductor device having a deep contact structure having an improved contact resistance is presented. The semiconductor device includes a semiconductor substrate, a first interlayer insulating layer, a contact plug, a second interlayer insulating layer, and a copper contact pad. The contact plug is formed in the first interlayer insulating... Agent: Ladas & Parry LLP

20100295189 - Method for repairing chip and stacked structure of chips: A method for repairing a chip with a stacked structure of chips is provided. First, a first chip is provided, which includes a first circuit block with a first function, a second circuit block with a second function, and a signal path electrically connected to the first and the second... Agent: Jianq Chyun Intellectual Property Office

20100295190 - Photosensitive adhesive composition, film-like adhesive, adhesive sheet, method for forming adhesive pattern, semiconductor wafer with adhesive layer, semiconductor device and method for manufacturing semiconductor device: A photosensitive adhesive composition comprising (A) an alkali-soluble polymer, (B) a thermosetting resin, (C) one or more radiation-polymerizable compounds and (D) a photoinitiator, wherein the 5% weight reduction temperature of the mixture of all of the radiation-polymerizable compounds in the composition is 200° C. or higher.... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100295191 - Wiring board, semiconductor device, and method for manufacturing wiring board and semiconductor device: In the wiring board, insulating layers and wiring layers are alternately laminated, and the wiring layers are electrically connected by the vias. The wiring board includes first terminals arranged in a first surface and embedded in an insulating layer, second terminals arranged in a second surface opposite to the first... Agent: Mr. Jackson Chen

20100288993 - Phase change random access memory for actively removing residual heat and method of manufacturing the same: A phase change random access memory for actively removing residual heat and a method of manufacturing the same are presented. The phase change random access memory includes a semiconductor substrate, a phase change pattern, a heating electrode and a cooling electrode. The phase change pattern is on the semiconductor substrate.... Agent: Ladas & Parry LLP

20100288994 - Method of forming memory cell using gas cluster ion beams: A variable resistance memory cell structure and a method of forming it. The method includes forming a first electrode, forming an insulating material over the first electrode, forming a via in the insulating material to expose a surface of the first electrode, forming a heater material within the via using... Agent: Thomas J. D'amico Dickstein Shapiro LLP

20100288995 - Semiconductor memory device and method of manufacturing the same: A semiconductor memory device includes: a lower electrode including a plurality of projections formed on a top surface thereof; an oxide film covering the top surface and made of an oxide of a same metal as a metal contained in the lower electrode; and a resistance variable film provided on... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100288996 - Memory arrays including memory levels that share conductors, and methods of forming such memory arrays: A memory array is provided that includes a first memory level, a second memory level and a conductor shared between the first and second memory levels. The first memory level includes a first diode and a first resistivity-switching material layer coupled in series with the first diode. The second memory... Agent: Dugan & Dugan, PC

20100289001 - Device containing non-blinking quantum dots: An optoelectronic device including two spaced apart electrodes; and at least one layer containing ternary core/shell nanocrystals disposed between the spaced electrodes and having ternary semiconductor cores containing a gradient in alloy composition and wherein the ternary core/shell nanocrystals exhibit single molecule non-blinking behavior characterized by on times greater than... Agent: Raymond L. Owens Patent Legal Staff

20100288998 - Group iii nitride semiconductor light-emitting device: A Group III nitride semiconductor light-emitting device comprises a substrate (1) and a light-emitting layer (5) having the multiple quantum well structure that comprises barrier layers (5a) and well layers (5b) formed of a gallium-containing Group III nitride semiconductor material provided on the substrate. Each of the well layers constituting... Agent: Sughrue Mion, PLLC

20100288999 - Group iii nitride semiconductor light-emitting device: In a Group III nitride semiconductor light-emitting device which comprises a substrate (1) and a light-emitting layer (10) having a multiple quantum well structure comprising a barrier layer (11b, 12b), which is provided on a surface of the substrate and formed of a Group III nitride semiconductor, and a well... Agent: Sughrue Mion, PLLC

20100289000 - Light-emitting diode and manufacturing method of the same: A manufacturing method of a light-emitting diode, includes the steps of: successively growing a first clad layer, an active layer and a second clad layer on a substrate; and patterning the first clad layer, the active layer and the second clad layer into a specified plane shape, and causing at... Agent: K&l Gates LLP

20100289002 - Nitride semiconductor light emitting device and fabrication method thereof: Provided is a nitride semiconductor light emitting device including: a first nitride semiconductor layer; an active layer formed above the first nitride semiconductor layer; and a delta doped second nitride semiconductor layer formed above the active layer. According to the present invention, the optical power of the nitride semiconductor light... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100288997 - Semiconductor electroluminescent device: Provided is a semiconductor electroluminescent device with an InGaAlAs-based well layer having tensile strain, or a semiconductor electroluminescent device with an InGaAsP-based well layer having tensile strain and with an InGaAlAs-based barrier layer which is high-performance and highly reliable in a wide temperature range. In a multiple-quantum well layer of... Agent: Foley And Lardner LLP Suite 500

20100289003 - Making colloidal ternary nanocrystals: A method of making a colloidal solution of ternary semiconductor nanocrystals, includes providing binary semiconductor cores; forming first shells on the binary semiconductor cores containing one of the components of the binary semiconductor cores and another component which when combined with the binary semiconductor will form a ternary semiconductor, thereby... Agent: Patent Legal Staff Eastman Kodak Company

20100289004 - Zno-based thin film and zno-based semiconductor element: Provided are a ZnO-based thin film and a ZnO-based semiconductor device which allow: reduction in a burden on a manufacturing apparatus; improvement of controllability and reproducibility of doping; and obtaining p-type conduction without changing a crystalline structure. In order to be formed into a p-type ZnO-based thin film, a ZnO-based... Agent: Rabin & Berdo, PC

20100289005 - Amorphous multi-component metallic thin films for electronic devices: An electronic structure comprising: (a) a first metal layer; (b) a second metal layer; (c) and at least one insulator layer located between the first metal layer and the second metal layer, wherein at least one of the metal layers comprises an amorphous multi-component metallic film. In certain embodiments, the... Agent: Klarquist Sparkman, LLP

20100289013 - Benzanthracene compound and organic electroluminescent device using the same:

20100289009 - Cathode coating: Embodiments of electroluminescent devices of the invention are preferably formed of a transparent anode; a layer of a hole transporting material; a layer of an electroluminescent material; a layer of an electron transporting material; a layer of lithium quinolate or of a substituted lithium quinolate e.g. of thickness less than... Agent: David Silverstein Andover-ip-law

20100289018 - Cyclopentaphenanthrene-based compound and organic electroluminescent device using the same: Provided are a cyclopentaphenanthrene-based compound and an organic EL device using the same. The cyclopentaphenanthrene-based compound is easy to prepare and excellent in solubility, color purity, and color stability. The cyclopentaphenanthrene-based compound is useful as a material for forming an organic layer, in particular, a light-emitting layer in an organic... Agent: Robert E. Bushnell & Law Firm

20100289006 - Novel blue organic compound and organic electroluminescent device using the same: wherein R1, R2, R3, and R4 represent a substituted or unsubstituted aryl group from 6 to 20 carbon atoms, in which R1, R2, R3, and R4 may be identical with or different from each other, or R1-R2 and R3-R4 may be bridged to 5 to 7-membered carbocyclic ring. R5 to... Agent: Jackson Intellectual Property Group PLLC

20100289010 - Organic electroluminescent device and preparation method thereof: The present invention relates to a method capable of considerably improving the characteristics of an organic electroluminescent device. The present invention provides a method capable of reducing operating voltage and improving efficiency by inserting an inorganic oxide interlayer configured of at least one layer between light-emitting layers.... Agent: Cantor Colburn LLP

20100289015 - Organic field-effect transistor: An organic field-effect transistor includes: source and drain electrodes; a semiconductor layer made of an organic semiconductor material placed at least between said source and drain electrodes; a gate electrode suitable for creating an electric field that increases the density of mobile charge carriers in the semiconductor layer in order... Agent: Daly, Crowley, Mofford & Durkee, LLP

20100289016 - Organic light emitting diode and manufacturing method thereof: Disclosed is an organic light emitting diode, in which the light transmittance of a transparent cathode is improved, and which includes a substrate, a first electrode formed on the substrate, an organic layer formed on the first electrode, a second electrode formed on the organic layer, and a transparent layer... Agent: Osha Liang L.L.P.

20100289017 - Organic light emitting diode and manufacturing method thereof: Disclosed is an organic light emitting diode, which has improved light transmittance and which includes a first substrate and a second substrate, a first electrode formed on the first substrate, an organic layer formed on the first electrode, a second electrode formed between the organic layer and the second substrate,... Agent: Osha Liang L.L.P.

20100289008 - Organic light emitting diode having high efficiency and process for fabricating the same: The present invention provides an organic light emitting device comprising a first electrode, a second electrode, and at least two organic material layers interposed therebetween, including a light emitting layer, wherein the organic material layers comprise at least one layer of a hole injecting layer, a hole transporting layer and... Agent: Mckenna Long & Aldridge LLP

20100289007 - Organic optoelectronic component: The invention relates to an organic optoelectronic component comprising a base electrode, a top electrode that is provided with passages and an arrangement of organic layers, which is formed between the base electrode and the top electrode and makes electrical contact with said electrodes. In said component, light can be... Agent: Sutherland Asbill & Brennan LLP

20100289012 - Organic switching element and method for producing the same: There is provided a switching element including two electrodes and an organic bistable material sandwiched between the electrodes, which is expected to be applied to an organic memory element or the like. A switching element which includes: two electrodes; and an organic thin film containing a metal fine particle and... Agent: Oliff & Berridge, PLC

20100289019 - Patterning devices using fluorinated compounds: A method for producing a spatially patterned structure includes forming a layer of a material on at least a portion of a substructure of the spatially patterned structure, forming a barrier layer of a fluorinated material on the layer of material to provide an intermediate structure, and exposing the intermediate... Agent: Venable LLP

20100289011 - Polymer compound and method for producing the same, and light-emitting material, liquid composition, thin film, polymer light-emitting device, surface light source, display device, organic transistor and solar cell, each using the polymer compound: m

20100289014 - Polymeric compound and organic electroluminescence element comprising the same: wherein Ar1 to Ar4 are each independently a substituted or unsubstituted aryl group having 6 to 40 ring-forming carbon atoms, a substituted or unsubstituted heterocyclic group having 3 to 40 ring-forming atoms, a substituted or unsubstituted alkyl group having 1 to 50 carbon atoms; X is a substituted or unsubstituted... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100289020 - Field effect transistor using oxide semicondutor and method for manufacturing the same: e

20100289021 - Scribe line structure and method for dicing a wafer: A scribe line structure is disclosed. The scribe line structure includes a semiconductor substrate having a die region, a die seal ring region, disposed outside the die region, a scribe line region disposed outside the die seal ring region and a dicing path formed on the scribe line region. Preferably,... Agent: North America Intellectual Property Corporation

20100289022 - Method of manufacturing a semiconductor device and semiconductor device obtained with such a method: The invention relates to a method of manufacturing a semiconductor device (10) with a substrate (11) and a semiconductor body (12) which is provided with at least one bipolar transistor having an emitter region (1), a base region (2) and a collector region (3), wherein in the semiconductor body (12)... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100289023 - Array substrate for dislay device and method of fabricating the same: A method of fabricating an array substrate for a display device includes: forming a buffer layer on a substrate having a pixel region; sequentially forming a gate electrode of impurity-doped polycrystalline silicon, a gate insulating layer and an active layer of intrinsic polycrystalline silicon on the buffer layer in the... Agent: Mckenna Long & Aldridge LLP

20100289027 - Electronic device, display device, interface circuit and differential amplification device, which are constituted by using thin-film transistors: An integrated circuit, which is configured such that a MOS transistor and a bipolar transistor are integrated at the same time, is formed on an insulating substrate which includes a display device. An electronic device or a display includes a plurality of semiconductor devices which are formed by using a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100289024 - Insulating thin film, formation solution for insulating thin film, field-effect transistor, method for manufacturing the same and image display unit: One embodiment of the present invention is an insulating thin film having a polymer compound, a metallic atom bonded to the polymer compound through an oxide atom and selected from a group 4 element, a group 5 element, a group 6 element, a group 13 element, zinc or tin, and... Agent: Squire, Sanders & Dempsey L.L.P.

20100289026 - Method for manufacturing display device: When a conductive layer is formed, a first liquid composition containing a conductive material is applied on an outer side of a pattern that is desired to be formed (corresponding to a contour or an edge portion of a pattern), and a first conductive layer (insulating layer) having a frame-shape... Agent: Husch Blackwell Sanders, LLP Husch Blackwell Sanders LLP Welsh & Katz

20100289025 - Thin film transistor array substrate, display panel comprising the same, and method for manufacturing thin film transistor array substrate: A TFT (5) includes: a gate electrode (12a); a first semiconductor portion (14a) that overlaps the gate electrode (12a) having the gate insulating film (13) interposed therebetween; a source electrode (15a) and a drain electrode (15b) that overlap the gate electrode (12a) having the gate insulating film (13) and the... Agent: Birch Stewart Kolasch & Birch

20100289028 - Electronic device, display device, interface circuit and differential amplification device, which are constituted by using thin-film transistors: An integrated circuit, which is configured such that a MOS transistor and a bipolar transistor are integrated at the same time, is formed on an insulating substrate which includes a display device. An electronic device or a display includes a plurality of semiconductor devices which are formed by using a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100289029 - Epitaxial substrate for semiconductor device, semiconductor device, and method of manufacturing epitaxial substrate for semiconductor device: An epitaxial substrate having preferable two dimensional electron gas characteristic and contact characteristic is provided in the present invention. A channel layer is formed on a base substrate with GaN. A spacer layer is formed on the channel layer with AlN. A barrier layer is formed on the spacer layer... Agent: Burr & Brown

20100289031 - Diamond semiconductor device: The diamond semiconductor device is a diamond semiconductor device where a pair of electrodes are fixed on a diamond substrate, and wherein at least one interface to the electrode on the surface of the diamond substrate has a hydrogen termination and at least the surface of the substrate between the... Agent: Wenderoth, Lind & Ponack, L.L.P.

20100289030 - Diamond semiconductor element and process for producing the same: In a conventional diamond semiconductor element, because of high density of crystal defects, it is impossible to reflect the natural physical properties peculiar to a diamond, such as high thermal conductivity, high breakdown field strength, high-frequency characteristics and the like, in the transistor characteristics. By slightly shifting surface orientation of... Agent: Workman Nydegger 1000 Eagle Gate Tower

20100289032 - Diffused junction termination structures for silicon carbide devices and methods of fabricating silicon carbide devices incorporating same: An electronic device includes a silicon carbide layer having a first conductivity type and a main junction adjacent a surface of the silicon carbide layer, and a junction termination region at the surface of the silicon carbide layer adjacent the main junction. Charge in the junction termination region decreases with... Agent: Myers Bigel Sibley & Sajovec, P.A.

20100289033 - Single-crystal silicon carbide ingot, and substrate and epitaxial wafer obtained therefrom: It is a single-crystal silicon carbide ingot comprising single-crystal silicon carbide which contains donor-type impurity at a concentration of 2×1018 cm−3 to 6×1020 cm3 and acceptor-type impurity at a concentration of 1×1018 cm−3 to 5.99×1020 cm−3 and wherein the concentration of the donor-type impurity is greater than the concentration of... Agent: Kenyon & Kenyon LLP

20100289034 - Method for forming lens, method for manufacturing semiconductor apparatus, and electronic information device: A lens forming method according to the present invention for forming lenses capable of focusing light on a plurality of respective photoelectric conversion sections constituting of a semiconductor apparatus is described. The method includes a lens forming step of processing a lens forming material, in which an average gradient of... Agent: Edwards Angell Palmer & Dodge LLP

20100289035 - Optoelectronic device and image recording device: An optoelectronic device includes an optical element and an optoelectronic semiconductor chip that generates electromagnetic radiation, wherein the optical element is of one-piece construction, includes two mutually facing radiation passage faces, comprises a lens arrangement with a plurality of mutually delimited lens regions, wherein the lens arrangement is formed in... Agent: Ip Group Of Dla Piper LLP (us)

20100289036 - Iii-nitride semiconductor light emitting device and method for manufacturing the same: The present invention provides a Ill-nitride semiconductor light emitting device and a method for manufacturing the same including: a substrate; a plurality of Ill-nitride semiconductor layers formed on the substrate, and provided with an active layer generating light by recombination of electrons and holes; a boundary surface defined between the... Agent: Husch Blackwell LLP

20100289037 - Semiconductor device, manufacturing method thereof and display device: The present invention provides a semiconductor device having a plurality of MOS transistors with controllable threshold values in the same face and easy to manufacture, a manufacturing method thereof and a display device. The invention is a semiconductor device having a plurality of MOS transistors in the same face each... Agent: Nixon & Vanderhye, PC

20100289038 - Display apparatus: A display apparatus includes a light emitting device emitting red light, a light emitting device emitting green light, and a light emitting device emitting blue light. The display apparatus includes a circular polarizer provided on the light extraction side of the light emitting devices. Each light emitting device includes a... Agent: Canon U.s.a. Inc. Intellectual Property Division

20100289039 - Collimating light emitting appratus and method: Proposed is a light emitting apparatus (1) comprising a light source (5) for emitting light and a collimator (40) for arranging the light emitted in an application specific distribution. The light source comprises (i) a semiconductor device (10) capable of emitting light, (ii) a body (20) having a bottom surface... Agent: Philips Intellectual Property & Standards

20100289040 - Light emitting diode and method of fabricating the same: Disclosed herein is a light emitting diode. The light emitting diode includes a support substrate, semiconductor layers formed on the support substrate, and a metal pattern located between the support substrate and the lower semiconductor layer. The semiconductor layers include an upper semiconductor layer of a first conductive type, an... Agent: H.c. Park & Associates, PLC

20100289041 - Semiconductor light emitting device: Provided is a semiconductor light emitting device which includes a number of hexagon-shaped semiconductor light emitting elements formed two-dimensionally, and in which the positive electrodes and the negative electrodes are formed on its light outputting surface side lest the light outputting efficiency should decrease. A mask 11 for selective growth... Agent: Rabin & Berdo, PC

20100289042 - Semiconductor light emitting device and method for manufacturing the same: A semiconductor light emitting device includes a first cladding layer, a second cladding layer, and an active layer formed between the first and second cladding layers. A diffusion control layer includes an intermediate layer and a first transparent conductive layer provided on the second cladding layer in this order. The... Agent: Holtz, Holtz, Goodman & Chick PC

20100289051 - Chip coated light emitting diode package and manufacturing method thereof: A chip coated LED package and a manufacturing method thereof. The chip coated LED package includes a light emitting chip composed of a chip die-attached on a submount and a resin layer uniformly covering an outer surface of the chip die. The chip coated LED package also includes an electrode... Agent: Mcdermott Will & Emery LLP

20100289043 - High light extraction efficiency light emitting diode (led) through multiple extractors: An (Al,In,Ga)N and ZnO direct wafer bonded light emitting diode (LED), combined with a second light extractor acting as an additional light extraction method. This second light extraction method aims at extracting the light which has not been extracted by the ZnO structure, and more specifically the light which is... Agent: Gates & Cooper LLP Howard Hughes Center

20100289048 - Light emitter: The invention relates to a light emitter, such as an LED sealed with a resin, in particular, an LED wherein irregularities in a surface of a sealing resin can be formed through a simpler process in order to improve the light output efficiency of the LED. The LED is an... Agent: Buchanan, Ingersoll & Rooney PC

20100289049 - Light emitting device: A light emitting device including a first area and a second area adjacent to the first area in a plan view includes: a substrate formed in the first and second areas; a first cladding layer formed above the substrate in the first area; an active layer formed above the first... Agent: Harness, Dickey & Pierce, P.L.C

20100289046 - Light emitting device and method for manufacturing same: A light emitting device includes: a multilayer body including a light emitting layer made of a semiconductor; a first bonding metal layer attached to the multilayer body; a substrate; and a second bonding metal layer attached to the substrate and bonded to the first bonding metal layer at a bonding... Agent: Turocy & Watson, LLP

20100289047 - Light emitting element and illumination device: Provided is a light emitting element capable of improving light extraction efficiency and suppressing the nonuniformity of emission intensity distribution over the entire surface of a light extraction surface. The light emitting element is provided with a semiconductor multilayer body having an n-type semiconductor layer and an emission layer and... Agent: Hogan Lovells US LLP

20100289050 - Light-emitting element: Disclosed are a light emitting device and a method of manufacturing the same. The light emitting device includes a second electrode layer, a light emitting semiconductor layer including a second conductive semiconductor layer, an active layer, and a first conductive semiconductor layer on the second electrode layer, a reflective member... Agent: Mckenna Long & Aldridge LLP

20100289045 - Luminescent particles, methods and light emitting devices including the same: A luminescent particle includes an interior portion of the luminescent particle comprising a luminescent compound that reacts with atmospherically present components and a passivating layer on an outer surface of the luminescent particle that is operable to inhibit the reaction between the luminescent compound and the atmospherically present components.... Agent: Myers Bigel Sibley & Sajovec, P.A.

20100289052 - Semiconductor light emitting device and method for manufacturing the same: Disclosed are a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises a substrate, in which concave-convex patterns are in at least a portion of a backside of the substrate, and a light emitting structure on the substrate and comprising a first... Agent: Birch Stewart Kolasch & Birch

20100289044 - Wavelength conversion for producing white light from high power blue led: A white light LED is described that uses an LED die that emits visible blue light in a wavelength range of about 450-470 nm. A red phosphor or quantum dot material converts some of the blue light to a visible red light having a peak wavelength between about 605-625 nm... Agent: Philips Intellectual Property & Standards

20100289054 - Semiconductor chip assembly with post/base heat spreader and adhesive between base and terminal: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The heat spreader includes a thermal post and a base. The thermal post extends upwardly from... Agent: David M. Sigmond

20100289053 - Semiconductor light emitting element and method of manufacturing the same, and semiconductor element and method of manufacturing the same: Disclosed herein is a method of manufacturing a semiconductor light emitting element, including the steps of: forming a nickel thin film having a thickness of one atomic layer to 10 nm so as to contact a semiconductor layer forming a light emitting element structure; and forming a silver electrode on... Agent: K&l Gates LLP

20100289055 - Silicone leaded chip carrier: In an embodiment, the invention provides a SLCC package comprising first and second electrically conductive terminals, a polysiloxane and glass fiber structural body, a light source and a polysiloxane encapsulant. The first and second electrically conductive terminals are attached to the polysiloxane and glass fiber structural body. The light source... Agent: Kathy Manke Avago Technologies Limited

20100289056 - Semiconductor light-emitting devices: A semiconductor laser device comprises an n-type cladding layer, a p-type cladding layer, and an active layer which is sandwiched between the n-type cladding layer and the p-type cladding layer. The p-type cladding layer contains magnesium as a dopant impurity. Further, an n-type diffusion blocking layer of a nitride compound... Agent: Leydig Voit & Mayer, Ltd

20100289057 - Integrated circuits using guard rings for esd, systems, and methods for forming the integrated circuits: An integrated circuit includes at least one transistor over a substrate. A first guard ring is disposed around the at least one transistor. The first guard ring has a first type dopant. A second guard ring is disposed around the first guard ring. The second guard ring has a second... Agent: Lowe Hauptman Ham & Berner, LLP (tsmc)

20100289058 - Lateral bipolar junction transistor: A lateral bipolar junction transistor includes an emitter region; a base region surrounding the emitter region; a gate disposed at least over a portion of the base region; a collector region surrounding the base region with an offset between an edge of the gate and the collector region; a lightly... Agent: North America Intellectual Property Corporation

20100289059 - Power semiconductor devices integrated with clamp diodes having separated gate metal pads to avoid breakdown voltage degradation: A structure of power semiconductor device integrated with clamp diodes having separated gate metal pad is disclosed. The separated gate metal pads are wire bonded together on the gate lead frame. This improved structure can prevent the degradation of breakdown voltage due to electric field in termination region blocked by... Agent: Bacon & Thomas, PLLC

20100289060 - Method of fabricating free-form, high-aspect ratio components for high-current, high-speed microelectronics: Microelectronic structures and devices, and method of fabricating a three-dimensional microelectronic structure is provided, comprising passing a first precursor material for a selected three-dimensional microelectronic structure into a reaction chamber at temperatures sufficient to maintain said precursor material in a predominantly gaseous state; maintaining said reaction chamber under sufficient pressures... Agent: Los Alamos National Security, LLC

20100289061 - Infrared photodetector: The infrared photodetector includes a contact layer formed over a semiconductor substrate 10, a quantum dot stack 24 formed on the contact layer 12 and including intermediate layers 22 and quantum dots 20 which are alternately stacked, and a contact layer 26 formed on the quantum dot stack 24. One... Agent: Kratz, Quintos & Hanson, LLP

20100289062 - Carrier mobility in surface-channel transistors, apparatus made therewith, and systems containing same: A surface channel transistor is provided in a semiconductive device. The surface channel transistor is either a PMOS or an NMOS device. Epitaxial layers are disposed above the surface channel transistor to cause an increased bandgap phenomenon nearer the surface of the device. A process of forming the surface channel... Agent: Intel Corporation C/o Cpa Global

20100289063 - Epitaxial solid-state semiconducting heterostructures and method for making same: (iv) a monocrystalline semiconducting layer is formed, by epitaxial growth, on the bonding layer so formed. The solid-state semiconducting heterostructures so obtained are also described.... Agent: Young & Thompson

20100289064 - Method for fabrication of a semiconductor device and structure: A semiconductor device comprising: a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single crystal silicon layer, wherein the at least one metal layer comprises copper or aluminum more than other materials; and a second single crystal silicon... Agent: Venable LLP

20100289065 - Mems integrated chip with cross-area interconnection: The present invention discloses a MEMS (Micro-Electro-Mechanical System) integrated chip with cross-area interconnection, comprising: a substrate; a MEMS device area on the substrate; a microelectronic device area on the substrate; a guard ring separating the MEMS device area and the microelectronic device area; and a conductive layer on the surface... Agent: Tung & Associates

20100289066 - Semiconductor device and method of fabricating the same: A semiconductor device is disclosed. The semiconductor device includes: a first electrode, disposed over a first region of a substrate; and a conductive layer, disposed over the substrate, including a second electrode disposed above the first electrode, wherein the second electrode comprises a mesh main part having a plurality of... Agent: North America Intellectual Property Corporation

20100289067 - High voltage iii-nitride semiconductor devices: A III-N device is described has a buffer layer, a first III-N material layer on the buffer layer, a second III-N material layer on the first III-N material layer on an opposite side from the buffer layer and a dispersion blocking layer between the buffer layer and the channel layer.... Agent: Fish & Richardson P.C.

20100289068 - Thin film transistor structure: A thin film transistor structure is provided. The thin film transistor structure includes a source and a drain. The corresponding opposite surfaces of the source and the drain are at least partially complementary and continuous convex-concave surfaces so that the charging ability of the thin film transistor would be increased... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100289069 - Semiconductor integrated-circuit device: A semiconductor integrated-circuit device is disclosed. The semiconductor integrated-circuit device uses a filter, which includes a standard capacitor, as a standard cell connecting a memory cell with a logic cell. As such, the semiconductor integrated-circuit device can minimize a glitch phenomenon of power/ground voltages and provide stability of power/ground voltages.... Agent: Brinks Hofer Gilson & Lione

20100289070 - Methods for isolating portions of a loop of pitch-multiplied material and related structures: Different portions of a continuous loop of semiconductor material are electrically isolated from one another. In some embodiments, the end of the loop is electrically isolated from mid-portions of the loop. In some embodiments, loops of semiconductor material, having two legs connected together at their ends, are formed by a... Agent: Knobbe Martens Olson & Bear LLP

20100289071 - Non-volatile memory device, methods of fabricating and operating the same: A non-volatile memory device includes a floating gate formed on a substrate with a gate insulation layer interposed therebetween, a tunnel insulation layer formed on the floating gate, a select gate electrode inducing charge introduction through the gate insulation layer, and a control gate electrode inducing charge tunneling occurring through... Agent: F. Chau & Associates, LLC

20100289072 - Electronic device including a gate electrode having portions with different conductivity types: An electronic device can include a gate electrode having different portions with different conductivity types. In an embodiment, a process of forming the electronic device can include forming a semiconductor layer over a substrate, wherein the semiconductor layer has a particular conductivity type. The process can also include selectively doping... Agent: Larson Newman & Abel, LLP

20100289073 - Trench mosfets with esd zener diode: A semiconductor power device with Zener diode for providing an electrostatic discharge (ESD) protection and a thick insulation layer to insulate the Zener diode from a doped body region. The semiconductor power device further includes a Nitride layer underneath the thick oxide layer working as a stopper layer for protecting... Agent: Bacon & Thomas, PLLC

20100289074 - Semiconductor device and method of fabricating the same: A semiconductor device is provided. The semiconductor device includes a semiconductor substrate, at least a doped region, an electrical contact layer and a metal oxide semiconductor cell. The semiconductor substrate includes opposing first and second surfaces and at least a trench extending from the second surface into interior portion thereof.... Agent: Jianq Chyun Intellectual Property Office

20100289077 - Dual gate of semiconductor device capable of forming a layer doped in high concentration over a recessed portion of substrate for forming dual gate with recess channel structure and method for manufacturing the same: A dual gate of a semiconductor device includes a semiconductor substrate divided into a cell region with a recessed gate forming area and a peripheral region with PMOS and NMOS forming areas; first and second conductive type SiGe layers, the first conductive type SiGe layer being formed over the cell... Agent: Ladas & Parry LLP

20100289076 - Semiconductor device: A semiconductor substrate 20 of a semiconductor device 10 comprises a channel section 10A and a non-channel section 10B. An emitter region 26 is formed in the channel section 10A, this emitter region 26 making contact with a side surface of a trench gate 30 and being electrically connected to... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100289075 - Semiconductor device having integrated mosfet and schottky diode and manufacturing method thereof: A semiconductor device having integrated MOSFET and Schottky diode includes a substrate having a MOSFET region and a Schottky diode region defined thereon; a plurality of first trenches formed in the MOSFET region; and a plurality of second trenches formed in the Schottky diode region. The first trenches respectively including... Agent: North America Intellectual Property Corporation

20100289078 - Semiconductor device and method for manufacturing the same: In order to further improve a driving performance without increasing an element area in a lateral MOS having a high driving performance, in which a gate width is increased per unit area by forming a plurality of trenches horizontally with respect to a gate length direction, the semiconductor device includes:... Agent: Bruce L. Adams Adam & Wilks

20100289079 - High-voltage soi mos device structure and method of fabrication: Structures and methods for integrating a thick oxide high-voltage metal-oxide-semiconductor (MOS) device into a thin oxide silicon-on-insulator (SOI). A method of forming a semiconductor structure includes forming first source and drain regions of a first device below a buried oxide layer of a silicon-on-insulator (SOI) wafer, forming a gate of... Agent: Roberts Mlotkowski Safran & Cole, P.C. Intellectual Property Department

20100289080 - Semiconductor device comprising metal gates and a silicon containing resistor formed on an isolation structure: In a semiconductor device comprising sophisticated high-k metal gate structures formed in accordance with a replacement gate approach, semiconductor-based resistors may be formed above isolation structures substantially without being influenced by the replacement gate approach. Consequently, enhanced area efficiency may be achieved compared to conventional strategies, in which the resistive... Agent: Williams, Morgan & Amerson

20100289081 - Reduced silicon thickness of n-channel transistors in soi cmos devices: In sophisticated SOI devices, the thickness of the active semiconductor layer in the N-channel transistor may be reduced compared to the P-channel transistor for a given transistor configuration, thereby obtaining a significant increase in performance of the N-channel transistor without negatively affecting performance of the P-channel transistor.... Agent: Williams, Morgan & Amerson

20100289082 - Isolation with offset deep well implants: A method implants impurities into well regions of transistors. The method prepares a first mask over a substrate and performs a first shallow well implant through the first mask to implant first-type impurities to a first depth of the substrate. The first mask is removed and a second mask is... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20100289083 - Multi-step deposition of a spacer material for reducing void formation in a dielectric material of a contact level of a semiconductor device: In advanced semiconductor devices, spacer elements may be formed on the basis of a multi-station deposition technique, wherein a certain degree of variability of the various sub-layers of the spacer materials, such as a different thickness, may be applied in order to enhance etch conditions during the subsequent anisotropic etch... Agent: Williams, Morgan & Amerson

20100289084 - Semiconductor memory device: Provided is a semiconductor memory device. The semiconductor memory device may include a local bitline extending in a direction substantially vertical to an upper surface of a semiconductor substrate and a local wordline intersecting the local bitline. The local bitline is electrically connected to a bitline channel pillar penetrating a... Agent: F. Chau & Associates, LLC

20100289085 - Asymmetric semiconductor devices and method of fabricating: A semiconductor structure is provided that includes an asymmetric gate stack located on a surface of high k gate dielectric. The asymmetric gate stack includes a first portion and a second portion, wherein the first portion has a different threshold voltage than the second portion. The first portion of the... Agent: Scully, Scott, Murphy & Presser, P.C.

20100289086 - Source/drain strained layers: A semiconductor device and method of manufacture thereof wherein a PMOS source/drain region of a transistor within the substrate includes a first strained layer in the PMOS source/drain region and a first capping layer in contact with the first strained layer. Further, the semiconductor device and method provide for an... Agent: Slater & Matsil, L.L.P.

20100289087 - Semiconductor device and method of manufacturing a semiconductor device: A semiconductor substrate with an active element formed in the semiconductor substrate, an element isolating insulating film formed around the active element and semiconductor substrate, a polysilicon resistance element formed over the element isolating insulating film with terminal areas and a resistance portion formed between the terminal areas, the polysilicon... Agent: Turocy & Watson, LLP

20100289089 - Adjusting threshold voltage for sophisticated transistors by diffusing a gate dielectric cap layer material prior to gate dielectric stabilization: Sophisticated gate electrode structures may be formed by providing a cap layer including a desired species that may diffuse into the gate dielectric material prior to performing a treatment for stabilizing the sensitive gate dielectric material. In this manner, complex high-k metal gate electrode structures may be formed on the... Agent: Williams, Morgan & Amerson

20100289090 - Enhancing uniformity of a channel semiconductor alloy by forming sti structures after the growth process: When forming sophisticated gate electrode structures of transistor elements of different type, the threshold adjusting channel semiconductor alloy may be provided prior to forming isolation structures, thereby achieving superior uniformity of the threshold adjusting material. Consequently, threshold variability on a local and global scale of P-channel transistors may be significantly... Agent: Williams, Morgan & Amerson

20100289088 - Threshold voltage improvement employing fluorine implantation and adjustment oxide layer: An epitaxial semiconductor layer may be formed in a first area reserved for p-type field effect transistors. An ion implantation mask layer is formed and patterned to provide an opening in the first area, while blocking at least a second area reserved for n-type field effect transistors. Fluorine is implanted... Agent: Scully, Scott, Murphy & Presser, P.C.

20100289091 - Semiconductor device and method of manufacturing the same: A semiconductor device is provided with an SRAM cell unit. The SRAM cell unit is provided with a data storing section composed of a pair of drive transistors and a pair of load transistors; a data write section composed of a pair of access transistors; and a data read section... Agent: Sughrue Mion, PLLC

20100289092 - Power mosfet package: A power MOSFET package includes a semiconductor substrate having opposite first and second surfaces, having a first conductivity type, and forming a drain region, a doped region extending downward from the first surface and having a second conductivity type, a source region in the doped region and having the first... Agent: Liu & Liu

20100289093 - Semiconductor device and method for fabricating the same: A semiconductor device is described, which includes a substrate, a gate structure, doped regions and lightly doped regions. The substrate has a stepped upper surface, which includes a first surface, a second surface and a third surface. The second surface is lower than the first surface. The third surface connects... Agent: J C Patents

20100289094 - Enhancing deposition uniformity of a channel semiconductor alloy by an in situ etch process: When forming sophisticated gate electrode structures requiring a threshold adjusting semiconductor alloy for one type of transistor, a recess is formed in the corresponding active region, thereby providing superior process uniformity during the deposition of the semiconductor material. Due to the recess, any exposed sidewall surface areas of the active... Agent: Williams, Morgan & Amerson

20100289095 - Semiconductor device: The semiconductor device comprises a semiconductor chip defining a first face and a second face opposite to the first face, the semiconductor chip comprising at least one contact element on the first face of the semiconductor chip, an encapsulating body encapsulating the semiconductor chip, the encapsulating body having a first... Agent: Dicke, Billig & Czaja

20100289096 - Vibrating nano-scale or micro-scale electromechanical component with enhanced detection level: A vibrating nano-scale or micro-scale electromechanical component including a vibrating mechanical element that cooperates with at least one detection electrode. The detection electrode is flexible and is configured to vibrate in phase opposition relative to the vibrating mechanical element. Such a component may find, for example, application to resonators or... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100289097 - Integrated microphone: A method of forming a microphone having a variable capacitance first deposits high temperature deposition material on a die. The high temperature material ultimately forms structure that contributes to the variable capacitance. The method then forms circuitry on the die after depositing the deposition material. The circuitry is configured to... Agent: Sunstein Kann Murphy & Timbers LLP

20100289098 - Magnetic tunnel junction device and fabrication: A magnetic tunnel junction (MTJ) device and fabrication method is disclosed. In a particular embodiment, a method is disclosed that includes forming a magnetic tunnel junction (MTJ) device on a structure that includes a bottom cap layer and a bottom metal-filled trench having a normal axis, the magnetic tunnel junction... Agent: Qualcomm Incorporated

20100289099 - Integration of vacuum microelectronic device with integrated circuit: A device includes an integrated circuit (IC) and at least one ultra-small resonant structure formed on said IC. At least the ultra-small resonant structure portion of the device is vacuum packaged. The ultra-small resonant structure portion of the device may be grounded or connected to a known electrical potential. The... Agent: Davidson Berquist Jackson & Gowdey LLP

20100289101 - Image sensor: An image sensor including an array of pixels, wherein each pixel includes, in a vertical stack: a central photosensitive area; a stack of interconnects on top of the periphery of the photosensitive area, extending upwards up to a first height; a filtering layer on top of the photosensitive area, extending... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20100289100 - Solid-state image pickup device, method of manufacturing solid-state image pickup device, and electronic apparatus: Disclosed herein is a solid-state image pickup device including a solid-state image pickup element operable to produce an electric charge according to the amount of light received, a lens disposed on the upper side of a pixel of the solid-state image pickup element, a protective film which covers the upper... Agent: Sonnenschein Nath & Rosenthal LLP

20100289102 - Method of making deep junction for electrical crosstalk reduction of an image sensor: The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a substrate having a front surface and a back surface; a plurality of sensor elements formed on the front surface of the substrate, each of the plurality of sensor elements configured to receive light directed towards the... Agent: Haynes And Boone, LLPIPSection

20100289103 - Pin photodiode and light reception device: Among photodiodes used in an optical system for applying light to the entire chip, the conventional PIN photodiode has a problem that light should be applied only to a light reception surface in order to prevent degradation of light response and that positioning of the optical system is difficult. Moreover,... Agent: Rabin & Berdo, PC

20100289104 - Photosensor package: Since the passive device is disposed on the substrate assembly of the photosensor package, it is possible to reduce the size of the printed circuit board compared to the convention technology where the passive device is disposed on the print circuit board. Furthermore, since it is possible to reduce a... Agent: Hosoon Lee

20100289105 - Edge illuminated photodiodes: This invention comprises plurality of edge illuminated photodiodes. More specifically, the photodiodes of the present invention comprise novel structures designed to minimize reductions in responsivity due to edge surface recombination and improve quantum efficiency. The novel structures include, but are not limited to, angled facets, textured surface regions, and appropriately... Agent: Patentmetrix

20100289106 - Photodiode with interfacial charge control and associated process: A photodiode includes a first doped layer and a second doped layer that share a common face. A deep isolation trench has a face contiguous with the first and second doped layers. A conducting layer is in contact with a free face of the second doped layer. A protective layer... Agent: Gardere Wynne Sewell LLP Intellectual Property Section

20100289107 - Photodiode with interfacial charge control by implantation and associated process: A photodiode includes a first doped layer and a second doped layer adjacent to the first doped layer and sharing a common face. A deep isolation trench is provided adjacent the photodiode having a face contiguous with the first doped layer and the second doped layer. A free face of... Agent: Gardere Wynne Sewell LLP Intellectual Property Section

20100289108 - Silicon dioxide cantilever support and method for silicon etched structures: A semiconductor device includes a semiconductor layer (2) having therein a cavity (4). A dielectric layer (3) is formed on the semiconductor layer. A plurality of etchant openings (24) extend through the dielectric layer for passage of etchant for etching the cavity. An SiO2 pillar (25) extends from a bottom... Agent: Texas Instruments Incorporated

20100289109 - Schottky diodes containing high barrier metal islands in a low barrier metal layer and methods of forming the same: Fabrication of a Schottky diodes may include providing a Schottky contact layer containing a low barrier metal layer with spaced apart high barrier metal islands therein on a first surface of a substrate. A diode contact is formed on a second surface of the substrate that is opposite to the... Agent: Myers Bigel Sibley & Sajovec, P.A.

20100289110 - Semiconductor device: A semiconductor device using one or more guard rings includes a p-type guard ring region surrounding a pn junction region, an insulating film covering the p-type guard ring region, one or more conductive films electrically connected with the p-type guard ring region through one or more contact holes made in... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100289112 - Method and apparatus of core timing prediction of core logic in the chip-level implementation process through an over-core window on a chip-level routing layer: A method and/or an apparatus of core timing prediction is disclosed. In one embodiment, a method may include generating a core timing model of a core logic that is accurately transferable to any chip-level integration process. The method may reduce performance degradation and/or performance variation of the core logic caused... Agent: Raj Abhyanker, P.C.

20100289111 - System and method for designing cell rows: A system and method for designing integrated circuits is disclosed. An embodiment comprises placing a standard cell with a first cell height into a cell row with a different height. The standard cell may have a height smaller than the cell row or else may have a height that is... Agent: Slater & Matsil, L.L.P.

20100289113 - Fabrication process of a hybrid semiconductor substrate: The present invention relates to a method for manufacturing a hybrid semiconductor substrate comprising the steps of (a) providing a hybrid semiconductor substrate comprising a semiconductor-on-insulator (SeOI) region, that comprises an insulating layer over a base substrate and a SeOI layer over the insulating layer, and a bulk semiconductor region,... Agent: Traskbritt, P.C.

20100289114 - Semiconductor element formed in a crystalline substrate material and comprising an embedded in situ doped semiconductor material: The PN junction of a substrate diode in a sophisticated SOI device may be formed on the basis of an embedded in situ doped semiconductor material, thereby providing superior diode characteristics. For example, a silicon/germanium semiconductor material may be formed in a cavity in the substrate material, wherein the size... Agent: Williams, Morgan & Amerson

20100289115 - Soi substrate and method for manufacturing soi substrate: An oxide film having a thickness “tox” of not less than 0.2 μm is provided on the bonding surface of a single-crystal silicon substrate. In a method for manufacturing an SOI substrate according to the present invention, a low-temperature process is employed to suppress the occurrence of thermal strain attributable... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100289116 - Selective epitaxial growth of semiconductor materials with reduced defects: A semiconductor device includes a substrate formed of a first semiconductor material; two insulators on the substrate; and a semiconductor region having a portion between the two insulators and over the substrate. The semiconductor region has a bottom surface contacting the substrate and having sloped sidewalls. The semiconductor region is... Agent: Slater & Matsil, L.L.P.

20100289117 - Shallow trench isolation structure including second liner covering corner of trench and first liner: A STI structure disposed in a trench of a substrate is provided. The STI structure includes a first liner, a second liner and an insulation layer. The first liner is disposed on sidewalls of the trench, and a top of the first liner is lower than a surface of the... Agent: J C Patents

20100289118 - Semiconductor device: A semiconductor device has an inductor. The inductor has a first metal interconnection layer formed in the insulation film to extend in a first direction which is parallel to a substrate face of the semiconductor substrate, and connected electrically at a first end part thereof to the first terminal; a... Agent: Turocy & Watson, LLP

20100289119 - Integrated capacitor: According to the preferred embodiment, an integrated capacitor having a key-shaped structure is provided. The integrated capacitor comprises a first pair of key-shaped metal patterns and a second pair of key-shaped metal patterns. The first pair of key-shaped metal patterns engages with the second pair of key-shaped metal patterns, and... Agent: North America Intellectual Property Corporation

20100289120 - Semiconductor device and a method of manufacturing the same: In a semiconductor device comprising a capacitive element, an area of the capacitive element is reduced without impairing performance, and further, without addition of an extra step in a manufacturing process. A first capacitor is formed between an active region of a semiconductor substrate provided through a first capacitive insulating... Agent: Miles & Stockbridge PC

20100289121 - Chip-level access control via radioisotope doping: A mechanism for changing the doping profile of semiconductor devices over time using radioisotope dopants is disclosed. This mechanism can be used to activate or deactivate a device based on the change in doping profile over time. The disclosure contains several possible dopants for common semiconductor substrates and discusses several... Agent: Eric Hansen

20100289122 - Iii-v nitride substrate boule and method of making and using the same: A boule formed by high rate vapor phase growth of Group III-V nitride boules (ingots) on native nitride seeds, from which wafers may be derived for fabrication of microelectronic device structures. The boule is of microelectronic device quality, e.g., having a transverse dimension greater than 1 centimeter, a length greater... Agent: Intellectual Property / Technology Law

20100289123 - Method for making a semi-conducting substrate located on an insulation layer: A method for making a silicon layer extending on an insulation layer, including the steps of forming a silicon-germanium layer on at least a portion of a silicon wafer; transforming portions of the silicon-germanium layer into porous silicon pads; growing a monocrystalline silicon layer on the silicon-germanium layer and on... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20100289124 - Printable semiconductor structures and related methods of making and assembling: The present invention provides a high yield pathway for the fabrication, transfer and assembly of high quality printable semiconductor elements having selected physical dimensions, shapes, compositions and spatial orientations. The compositions and methods of the present invention provide high precision registered transfer and integration of arrays of microsized and/or nanosized... Agent: Greenlee Sullivan P.C.

20100289125 - Enhanced electromigration performance of copper lines in metallization systems of semiconductor devices by surface alloying: In sophisticated semiconductor devices, the electromigration performance of copper metal lines at the top interface thereof may be enhanced by forming a copper alloy that is locally restricted to the interface. To this end, an appropriate alloy-forming species, such as aluminum, may be provided on the basis of a non-masked... Agent: Williams, Morgan & Amerson

20100289126 - Semiconductor device and method of forming a 3d inductor from prefabricated pillar frame: A semiconductor device is made by mounting a semiconductor die over a carrier. A ferromagnetic inductor core is formed over the carrier. A prefabricated pillar frame is formed over the carrier, semiconductor die, and inductor core. An encapsulant is deposited over the semiconductor die and inductor core. A portion of... Agent: Robert D. Atkins

20100289127 - Semiconductor device: A semiconductor device in which the wiring resistance and parasitic inductance of a semiconductor package configuring a power semiconductor module is reduced. In the semiconductor device, a semiconductor chip with an IGBT formed therein and a diode chip are mounted over the upper surface of a die pad. An emitter... Agent: Miles & Stockbridge PC

20100289128 - Integrated circuit packaging system with leads and transposer and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: conductively bonding a first surface of a transposer to an inner end of a lead separate from the transposer; conductively bonding a die to the first surface of the transposer; and encapsulating the inner end with a mold compound... Agent: Law Offices Of Mikio Ishimaru

20100289129 - Copper plate bonding for high performance semiconductor packaging: A bonding plate forms high-performance, low-resistance interconnections between integrated circuit die and an electronic package lead frame. The bonding plate is made from copper, aluminum, or metalized silicon and is processed using standard semiconductor fabrication techniques to apply solder bumps and, optionally, copper pillars. The bonding plates are singulated from... Agent: O''melveny & Myers LLP Ip&t Calendar Department La-13-a7

20100289130 - Method and apparatus for vertical stacking of integrated circuit chips: A method and apparatus for constructing a packaged integrated circuit stack 40 having at least two packaged integrated circuits 44 and 45 with an interposer 42 between the packaged integrated circuits 44 and 45. Interposer 42 is provided with apertures 47 which allow adhesive 50 to flow through interposer 42... Agent: Tpl/interconnect Portfolio, LLC C/o Alliacense Limited LLC

20100289131 - Semiconductor device and method of forming overlapping semiconductor die with coplanar vertical interconnect structure: A semiconductor device is made by forming first and interconnect structures over a first semiconductor die. A third interconnect structure is formed in proximity to the first die. A second semiconductor die is mounted over the second and third interconnect structures. An encapsulant is deposited over the first and second... Agent: Robert D. Atkins

20100289132 - Substrate having embedded single patterned metal layer, and package applied with the same, and methods of manufacturing of the substrate and package: A substrate having single patterned metal layer applied in a package is provided. The substrate includes a first patterned dielectric layer, a patterned metal layer and a second patterned dielectric layer, wherein the patterned metal layer is embedded in the first patterned dielectric layer. Also, the top surfaces of the... Agent: Cooley LLP Attn: Patent Group

20100289134 - Integrated circuit packaging system with reinforced encapsulant having embedded interconnect and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: fabricating a base package substrate having a component side and a system side; coupling stacking interconnects on the component side; and forming an integrated circuit receptacle, for receiving an integrated circuit device, by molding a reinforced encapsulant on the... Agent: Law Offices Of Mikio Ishimaru

20100289133 - Stackable package having embedded interposer and method for making the same: The present invention relates to a stackable package having an embedded interposer and a method for making the same. The package includes a substrate, a chip, a first embedded interposer, a circuit layer and a solder mask. The substrate has an upper surface, a bottom surface and at least one... Agent: Mccracken & Frank LLP

20100289135 - Semiconductor chip package: A semiconductor chip package is disclosed. One embodiment provides at least one semiconductor chip including contact elements on a first surface of the chip. An encapsulation layer covers the semiconductor chip. A metallization layer is applied above the first surface of the chip and the encapsulation layer. The metallization layer... Agent: Dicke, Billig & Czaja

20100289137 - Heat sink package: The heat sink package includes a heat sink having a cavity on an upper surface thereof; a metal layer formed on the bottom surface of the cavity; a solder paste layer formed on the metal layer; a substrate on the solder paste layer; and a lead and a semiconductor chip... Agent: Hiscock & Barclay, LLP

20100289136 - Semiconductor package: A semiconductor package comprises a semiconductor chip, through electrodes and cooling parts. The semiconductor chip has bonding pads on an upper surface thereof. The through-electrodes are formed in the semiconductor chip. The cooling parts are formed in the semiconductor chip and on the upper surface of the semiconductor chip in... Agent: Ladas & Parry LLP

20100289139 - Hardwired switch of die stack and operating method of hardwired switch: A hardwired switch of a die stack including eight landing pads is provided. A first, a second, a third, and a fourth landing pads are disposed on a first surface of a die. The second and the fourth landing pads are electrically connected to the first and the third landing... Agent: Jianq Chyun Intellectual Property Office

20100289140 - Semiconductor package and manufacturing method of the semiconductor package: A semiconductor package includes a semiconductor device, and a wiring board where the semiconductor device is mounted. The semiconductor device includes a semiconductor substrate, a piercing electrode configured to pierce the semiconductor substrate and electrically connect the wiring board and the semiconductor device, and a ring-shaped concave part provided so... Agent: Ipusa, P.l.l.c

20100289138 - Substrate structure for flip-chip interconnect device: An integrated circuit (IC) and a method of forming the device are provided. The device includes a substrate and a metal trace formed on the substrate, the metal trace including a bond area and a routing area. The routing area includes a rough surface for promoting adhesion to underfill of... Agent: Texas Instruments Incorporated

20100289142 - Integrated circuit packaging system with coin bonded interconnects and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; attaching an interconnect to the substrate; encapsulating the interconnect with an encapsulation leaving a portion of the interconnect not encapsulated; attaching a joint to the interconnect and simultaneously creating a coined-surface of the interconnect contacting the... Agent: Law Offices Of Mikio Ishimaru

20100289141 - Semiconductor device: Provided is a semiconductor device with a semiconductor chip mounted on a small-sized package substrate that has a large number of external connection terminals. The package substrate includes a slot, the external connection terminals, and bonding fingers. The bonding fingers are connected to the external connection terminals. The bonding fingers... Agent: Morrison & Foerster LLP

20100289143 - Method for producing low-k film, semiconductor device, and method for manufacturing the same: Hydrophobicity of a low dielectric constant film comprising a porous silica film is improved by applying a raw material for forming a porous silica film onto a substrate, and performing vapor-phase transport treatment to expose the substrate to an atmosphere of organic amine vapor to which no water is added.... Agent: Morrison & Foerster LLP

20100289144 - 3d integration structure and method using bonded metal planes: A method of making 3D integrated circuits and a 3D integrated circuit structure. There is a first semiconductor structure joined to a second semiconductor structure. Each semiconductor structure includes a semiconductor wafer, a front end of the line (FEOL) wiring on the semiconductor wafer, a back end of the line... Agent: International Business Machines Corporation Dept. 18g

20100289145 - Wafer chip scale package with center conductive mass: A method and structure for an unencapsulated wafer section such as a wafer chip scale package (WCSP) includes a plurality of interconnect terminals and a pad metallization structure on an active surface of a WCSP chip. An area of the pad metallization structure is larger than an area of one... Agent: Texas Instruments Incorporated

20100289146 - Electronic system and method for manufacturing a three-dimensional electronic system: A method for manufacturing a three-dimensional, electronic system includes: providing a first integrated circuit structure in a first substrate, wherein the first integrated circuit structure has a contact pad at a first main side of the first substrate; providing a second substrate with a main side; forming a vertical contact... Agent: Glenn Patent Group

20100289147 - Semiconductor die having a redistribution layer: A semiconductor device having a redistribution layer, and methods of forming same, are disclosed. After fabrication of semiconductor die on a wafer, a tape assembly is applied onto a surface of the wafer, in contact with the surfaces of each semiconductor die on the wafer. The tape assembly includes a... Agent: Vierra Magen/sandisk Corporation

20100289148 - Semiconductor power module: Use of Pb-free solder has become essential due to the environmental problem. A power module is formed by soldering substrates with large areas. It is known that in Sn-3Ag-0.5Cu which hardly creeps and deforms with respect to large deformation followed by warpage of the substrate, life is significantly shortened with... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100289153 - Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device: A semiconductor chip is provided comprising a semiconductor substrate on which an integrated circuit is formed. The semiconductor chip, which is provided on the semiconductor substrate in an area array, further comprises a plurality of electrodes electrically coupled with the inside of the semiconductor substrate, wherein the electrodes are arranged... Agent: Harness, Dickey & Pierce, P.L.C

20100289149 - Semiconductor component and assumbly with projecting electrode: A semiconductor component has a substrate and a projecting electrode on the substrate. The projecting electrode is configured suitably for electrically and mechanically connecting the semiconductor component to an external substrate. Furthermore, the projecting electrode is formed by a one-dimensional or two-dimensional array of projecting sub-electrodes, which are separated from... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100289151 - Semiconductor device: A semiconductor device includes a lower-layer wire, an upper-layer wire including a wire portion and a first wide portion whose wire width is greater than the wire portion, and a contact formation portion in which a contact portion for connecting the lower-layer wire and the first wide portion with each... Agent: Mcdermott Will & Emery LLP

20100289150 - Semiconductor device, designing method for semiconductor device, computer-readable medium, and manufacturing method for semiconductor device: A designing method for a semiconductor device includes: determining a placement of metal wirings to be connected to contact holes and a placement of through-holes for preparing the contact holes. The determining step includes: specifying areas in one of the metal wirings to be exposed by the through-holes, specifying a... Agent: Mcginn Intellectual Property Law Group, PLLC

20100289152 - Strip conductor structure for minimizing thermomechanocal loads: A semiconductor chip device including a surface on which at least one electrical contact surface is provided. A foil from an electrically insulating material is applied, especially by vacuum, to the surface and rests closely to the surface and adheres to the surface. The foil, in the area of the... Agent: Harness, Dickey & Pierce, P.L.C

20100289154 - Method and core materials for semiconductor packaging: A semiconductor package comprises a semiconductor substrate that may comprise a core. The core may comprise one or more materials selected from a group comprising ceramics and glass dielectrics. The package further comprises a set of one or more inner conductive elements that is provided on the core, a set... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100289155 - Semiconductor package: A semiconductor package includes a wiring board and a semiconductor device mounted on the wiring board. The semiconductor device includes a semiconductor substrate and a penetration electrode penetrating the semiconductor substrate. A cavity part is formed in the semiconductor substrate to isolate the penetration electrode from the semiconductor substrate. A... Agent: Ipusa, P.l.l.c

20100289156 - Semiconductor device: According to an aspect of the invention, a semiconductor device includes a substrate having an opening area, a first semiconductor chip, and a second semiconductor chip. The first semiconductor chip has a first electrode for high-speed communication and that is disposed around the opening area on the substrate. The second... Agent: Sughrue-265550

20100289157 - Circuit board having bypass pad: An electronic device having a printed circuit board is provided. In one embodiment, the printed circuit board includes a plurality of external pads to be coupled with an external device and a plurality of bypass pads for testing an electric circuit. The external pads are exposed and at least one... Agent: Muir Patent Consulting, PLLC

20100289158 - Adhesive film, dicing die bonding film and semiconductor device using the same: The present invention relates to an adhesive film, a dicing die bonding film and a semiconductor device. More specifically, the adhesive film of the present invention is characterized by comprising a base film and an adhesive layer and having a yield strength of 20 to 50 gf and a slope... Agent: Mckenna Long & Aldridge LLP

20100289159 - Semiconductor die collet and method: Semiconductor device assembly die attach apparatus and methods are disclosed for improvements in attaching a semiconductor die to a die pad. Preferred methods of the invention include steps for positioning a semiconductor die on a bearing surface of a collet and retaining the die on the bearing surface of the... Agent: Texas Instruments Incorporated

20100289160 - Lens support and wirebond protector: A wirebond protector has an elongated shape that corresponds to the elongated array of wirebonds along the edge of a microelectronic device that connect a semiconductor die to electrical conductors on a substrate. In making the microelectronic device with wirebond protection, wirebonds are first formed in the conventional manner The... Agent: Kathy Manke Avago Technologies Limited

20100283024 - Memory element and method for manufacturing the same, and semiconductor device: The memory element has a structure at least including a first conductive layer, a second conductive layer, and a memory layer disposed between the first conductive layer and the second conductive layer. The memory layer is formed by a droplet discharge method using nanoparticles of a conductive material each of... Agent: Cook, Alex, Mcfarron, Manzo Cummings & Mehler, Ltd.

20100283027 - Multi-value recording phase-change memory device, multi-value recording phase-change channel transistor, and memory cell array: A multi-value recording phase-change memory device that can stably record multi-value information, and that can reproduce information with high reliability, comprises a first electrode layer 26, a second electrode layer 28, and a memory layer 30 provided between the first and second electrode layers 26 and 28 and containing a... Agent: Staas & Halsey LLP

20100283028 - Non-volatile resistance switching memories and methods of making same: An integrated circuit memory cell including: a semiconductor having a first active area, a second active area, and a channel between the active areas; and a layer of a variable resistance material (VRM) directly above the channel. In one embodiment, there is a first conductive layer between the VRM and... Agent: Patton Boggs LLP

20100283026 - Nonvolatile semiconductor memory device and manufacturing method thereof: A first wire layer (19) including first memory wires (12) is connected to a second wire layer (20) including second memory wires (17) via first contacts (21) penetrating a first interlayer insulating layer (13). The first wire layer (13) is connected to and led out to upper wires (22) via... Agent: Mcdermott Will & Emery LLP

20100283025 - Phase change devices: A phase change device includes a native oxide grown on the surface of a first phase change alloy layer. The native oxide is punched through during the first electrical pulse applied between the device electrodes. An aperture created in the native oxide limit a region of localized heating during the... Agent: Daniel R. Shepard Contour Semiconductor, Inc.

20100283029 - Programmable resistance memory and method of making same: A memory includes multiple layers of deposited memory material. An etch is performed on at least one layer of deposited memory material prior to the deposition of a subsequent layer of memory material.... Agent: Ovonyx, Inc

20100283030 - Memory devices and methods of forming the same: Memory devices having a plurality of memory cells, with each memory cell including a phase change material having a laterally constricted portion thereof. The laterally constricted portions of adjacent memory cells are vertically offset and positioned on opposite sides of the memory device. Also disclosed are memory devices having a... Agent: Trask Britt, P.C./ Micron Technology

20100283031 - Biosensor using nanodot and method of manufacturing the same: A biosensor using a nanodot and a method of manufacturing the same are provided. A silicon nanowire can be formed by a CMOS process to reduce manufacturing costs. In addition, an electrically charged nanodot is coupled to a target molecule to be detected, in order to readily change conductivity of... Agent: Ampacc Law Group

20100283032 - Method for forming a semidconductor structure: Method for Forming a Semiconductor Structure A method and apparatus for applying a carrier fluid (101,602,1101) to a substrate (102), the carrier fluid carrying nanoparticles (201,202), manipulating the positions of a plurality of the nanoparticles (201,202) in the carrier fluid by applying an electric field, removing the carrier fluid from... Agent: Nokia, Inc.

20100283033 - Carbide nanostructures and methods for making same: A structure includes a substrate and a metallized carbon nano-structure extending from a portion of the substrate. In a method of making a metallized carbon nanostructure, at least one carbon structure formed on a substrate is placed in a furnace. A metallic vapor is applied to the carbon nanostructure at... Agent: General Electric Company Global Research

20100283034 - Concentration - gradient alloyed semiconductor quantum dots, led and white light applications: The present invention involves concentration-gradients alloyed quantum dots that have shell modifications and ligands that lower the barrier for electronic quantum dot activation, and electronic and photonic applications of such quantum dots. The present invention also describes emissive layers using such quantum dots in electronic applications.... Agent: Pepper Hamilton LLP

20100283037 - Core-shell quantum dot fluorescent fine particles: Disclosed is an ultraviolet fluorescent material having high light emission efficiency, wherein the peak wavelength of ultraviolet light to be emitted can be controlled by having a quantum dot structure wherein a fine crystal of zinc oxide having an average diameter of 1-10 nm serves as a core, and the... Agent: Birch Stewart Kolasch & Birch

20100283035 - Light emitting device: A light emitting device includes: an active layer including a multi-quantum well having a well layer and a barrier layer, the active layer including a non-emitting region and an emitting region formed around the non-emitting region; a first cladding layer provided on a first major surface of the active layer;... Agent: Turocy & Watson, LLP

20100283036 - Quantum dot light enhancement substrate and lighting device including same: A component including a substrate, at least one layer including a color conversion material comprising quantum dots disposed over the substrate, and a layer comprising a conductive material (e.g., indium-tin-oxide) disposed over the at least one layer. (Embodiments of such component are also referred to herein as a QD light-enhancement... Agent: Martha Ann Finnegan Qd Vision, Inc.

20100283042 - Devices having high dielectric constant, ionically-polarizable materials: An electronic or electro-optic device has a first electrode, a second electrode spaced apart from the first electrode, and a dielectric layer disposed between the first and second electrodes. The dielectric layer has electrically insulating planar layers with intercalated ions therebetween such that the electrically insulating planar layers provide a... Agent: Venable LLP

20100283043 - Organic el element: An organic electroluminescence device includes an anode, a cathode, and an organic thin-film layer interposed between the anode and the cathode. The organic thin-film layer includes a phosphorescent-emitting layer containing a host and a phosphorescent dopant, and an electron transporting layer that is provided closer to the cathode than the... Agent: Foley And Lardner LLP Suite 500

20100283045 - Organic electroluminescent element: The present invention provides an organic electroluminescent element having extended life. The present invention is an organic electroluminescent element having a pair of electrodes, and an organic light-emitting layer that contains a polymer light-emitting material and is sandwiched by the pair of electrodes, the organic electroluminescent element comprising: a first... Agent: Nixon & Vanderhye, PC

20100283046 - Organic electroluminescent element: The present invention provides an organic electroluminescent element having excellent electron injection properties and high resistance to external environmental factors, and providing buffer effects in transparent electrode formation. The present invention is an organic electroluminescent element having an anode, a cathode, and a light-emitting layer sandwiched between the anode and... Agent: Nixon & Vanderhye, PC

20100283039 - Organic photosensitive optoelectronic device: An organic photosensitive optoelectronic device includes an anode, an organic photosensitive layer formed on the anode and having a donor portion and an acceptor portion, a hole blocking layer formed on the organic photosensitive layer so as for the organic photosensitive layer to be sandwiched between the anode and the... Agent: Edwards Angell Palmer & Dodge LLP

20100283041 - Organic thin film transistor: An organic thin film transistor including a substrate having thereon at least three terminals of a gate electrode, a source electrode and a drain electrode, an insulator layer and an organic semiconductor layer, with a current between a source and a drain being controlled upon applying a voltage to the... Agent: Millen, White, Zelano & Branigan, P.C.

20100283044 - Organic transistor, method for producing organic transistor, electro-optical device, and electronic equipment: An organic transistor includes: a source electrode, a drain electrode, an organic semiconductor film provided between the source electrode and the drain electrode, a gate electrode, and a gate dielectric film provided between the organic semiconductor film and the gate electrode, the gate dielectric film including a first gate dielectric... Agent: Oliff & Berridge, PLC

20100283047 - Perylene-imide semiconductor polymers: Disclosed are new semiconductor materials prepared from perylene-imide copolymers. Such polymers can exhibit high n-type carrier mobility and/or good current modulation characteristics. In addition, the compounds of the present teachings can possess certain processing advantages such as solution-processability and/or good stability at ambient conditions.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100283038 - Polymer material and device using the same: (wherein, ESA 0 represents energy of the fluorescent conjugated polymer (A) at the ground state, ETA represents energy of the fluorescent conjugated polymer (A) at the lowest excited triplet state, ESB 0 represents energy of the phosphorescent compound (B) at the ground state, and ETB represents energy of the phosphorescent... Agent: Sughrue Mion, PLLC

20100283040 - Selenophenes and selenophene-based polymers, their preparation and uses thereof: This invention is directed to selenophene compounds, selenophene-based polymers (polyselenophene), processes for the preparation of the same and uses thereof. The polyselenophenes of this invention have high conductivity and can be used as electrodes in various devices such as in electrochromic devices, batteries, solar cells, optical amplifiers, organic light emitting... Agent: Pearl Cohen Zedek Latzer, LLP

20100283048 - Cmos image sensor and method of manufacturing the same: Provided is a complementary metal oxide semiconductor (CMOS) image sensor having a structure capable of increasing areas of photodiodes in unit pixels and expanding light receiving areas of the photodiodes. In the CMOS image sensor, transfer transistors may be formed on the photodiode, and reset transistors, source follower transistors, and... Agent: Harness, Dickey & Pierce, P.L.C

20100283050 - Flat panel displays comprising a thin-film transistor having a semiconductive oxide in its channel and methods of fabricating the same for use in flat panel displays: Provided is a method of fabricating a semiconductive oxide thin-film transistor (TFT) substrate. The method includes forming gate wiring on an insulation substrate; and forming a structure in which a semiconductive oxide film pattern and data wiring are stacked on the gate wiring, wherein the semiconductive oxide film pattern is... Agent: Innovation Counsel LLP

20100283049 - Oxide semiconductor device including insulating layer and display apparatus using the same: Provided is an oxide semiconductor device including an oxide semiconductor layer and an insulating layer coming into contact with the oxide semiconductor layer in which the insulating layer includes: a first insulating layer coming into contact with an oxide semiconductor, having a thickness of 50 nm or more, and including... Agent: Fitzpatrick Cella Harper & Scinto

20100283052 - Metrology systems and methods for lithography processes: Metrology systems and methods for lithography processes are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a mask having a plurality of corner rounding test patterns formed thereon. A first semiconductor device is provided, and a layer of photosensitive material of the first semiconductor device... Agent: Slater & Matsil, L.L.P.

20100283051 - Monitor cell and monitor cell placement method: The present invention relates to a monitor cell (200) for monitoring local variations in a process parameter of an integrated circuit. The monitor cell (200) comprises a first delay path (220) located in a first area (100, 110, 120) of the integrated circuit and a second delay path (230) located... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100283053 - Nonvolatile memory array comprising silicon-based diodes fabricated at low temperature: In embodiments of the invention, a method of forming a monolithic three-dimensional memory array is provided, the method including forming a first memory level that includes a plurality of memory cells, each memory cell comprising a plurality of conductors comprising aluminum or copper, and forming a silicon diode in each... Agent: Dugan & Dugan, PC

20100283054 - Flexible semiconductor device and method for manufacturing same: There is provided a method for manufacturing a flexible semiconductor device characterized by comprising (i) a step of forming an insulating film on the upper surface of metal foil, (ii) a step of forming an extraction electrode pattern on the upper surface of the metal foil, (iii) a step of... Agent: Wenderoth, Lind & Ponack L.L.P.

20100283058 - Array substrate for a liquid crystal display device with thin film transistor having two drain electrode patterns and manufacturing method of the same: An array substrate for a liquid crystal display device includes gate and data lines crossing on a substrate, common lines parallel to and between the gate lines, thin film transistors at crossing portions of the gate and data lines, and a pixel electrode. The common lines define pixel regions, which... Agent: Brinks Hofer Gilson & Lione

20100283056 - Display apparatus, liquid crystal display apparatus, organic el display apparatus, thin-film substrate, and method for manufacturing display apparatus: A liquid crystal display apparatus (10) includes a first substrate (20) including a base layer (71) and a display element layer formed on the base layer (71). The base layer (71) of the first substrate (20) is constituted by a transparent and colorless resin film formed by vapor deposition at... Agent: Birch Stewart Kolasch & Birch

20100283057 - Pixel structure: A pixel structure is provided. A data line and a scan line are disposed over a substrate. A first, a second, and a third thin film transistors (TFT) are electrically connected with the data line and the scan line respectively. A first width-to-length ratio, a second width-to-length ratio and a... Agent: Jianq Chyun Intellectual Property Office

20100283055 - Tft substrate and tft substrate manufacturing method: An object of the invention is to provide a TFT substrate and a method for producing a TFT substrate which is capable of drastically reducing the production cost by decreasing the number of steps in the production process and improving production yield. A TFT substrate comprises: a substrate; a first... Agent: Millen, White, Zelano & Branigan, P.C.

20100283059 - Semiconductor device and method for manufacturing same: A semiconductor device includes: an insulating substrate; a stepwise layer arranged on the insulating substrate and having an end portion whose inclination angle is equal to or greater than 60°; an insulating layer formed on the insulating substrate and the stepwise layer so as to be elevated on the stepwise... Agent: Birch Stewart Kolasch & Birch

20100283060 - Field effect transistor: A material of a gate electrode is a conductive oxide having a higher work function than that of conventionally used Pd and so on, thereby achieving a normally-off transistor without reducing the sheet carrier concentration of a heterojunction. It is thus possible to achieve a normally-off operation while reducing an... Agent: Steptoe & Johnson LLP

20100283061 - High temperature gate drivers for wide bandgap semiconductor power jfets and integrated circuits including the same: Gate drivers for wide bandgap (e.g., >2 eV) semiconductor junction field effect transistors (JFETs) capable of operating in high ambient temperature environments are described. The wide bandgap (WBG) semiconductor devices include silicon carbide (SiC) and gallium nitride (GaN) devices. The driver can be a non-inverting gate driver which has an... Agent: Morris Manning Martin LLP

20100283062 - Optoelectronic system: An embodiment of the invention discloses an optoelectronics system and a method of making the same. The method includes steps of providing a temporary substrate; providing un-packaged optoelectronic elements on the temporary substrate; forming a trench between two of the un-packaged optoelectronic elements; providing an adhesive material to fill the... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100283063 - Light receiving and emitting device: A light receiving and emitting device includes: a light emitting unit and a light receiving unit which are provided on a same substrate, wherein the light emitting unit includes an active layer sandwiched between a first clad layer and a second clad layer, a first electrode electrically connected to the... Agent: Harness, Dickey & Pierce, P.L.C

20100283065 - Led device with a light extracting rough structure and manufacturing methods thereof: The invention relates to a light emitting diode device having a light extracting rough structure. The device includes a leadframe, one or more light emitting diode chips provided on and electrically connected to the leadframe, and a lens configured to encapsulate the one or more light emitting diode chips, the... Agent: Martine Penilla & Gencarella, LLP

20100283066 - Light emitting device and display device using the same: A light emitting device (10) of the present invention includes luminescent particles (14) and a pair of electrodes (12, 16) for injecting an electric current into the luminescent particles (14). An inorganic hole transport material (15) is disposed between the electrodes (12, 16). The luminescent particles (14) are dispersed in... Agent: Hamre, Schumann, Mueller & Larson P.C.

20100283064 - Nanostructured led array with collimating reflectors: The present invention relates to nanostructured light emitting diodes, LEDs. The nanostructured LED device according to the invention comprises an array of a plurality of individual nanostructured LEDs. Each of the nanostructured LEDs has an active region wherein light is produced. The nanostructured device further comprise a plurality of reflectors,... Agent: The Marbury Law Group, PLLC

20100283067 - Semiconductor element and display device using the same: Provided is a semiconductor element including: a semiconductor having an active layer; a gate insulating film which is in contact with the semiconductor; a gate electrode opposite to the active layer through the gate insulating film; a first nitride insulating film formed over the active layer; a photosensitive organic resin... Agent: Nixon Peabody, LLP

20100283068 - Colour optoelectronic device: An organic light emitting diode microdisplay device comprises a substrate including active circuitry (16) for addressing sub-pixels (10, 12, 14) of the device formed on the substrate, a metal anode layer (18), organic layers (22) at least including a light-emitting layer, a cathode layer (26) and encapsulation layers (28). The... Agent: Howson & Howson LLP

20100283076 - Coated phosphor particles with refractive index adaption: The invention relates to coated phosphor particles comprising luminescent particles and at least one, preferably substantially transparent, metal, transition-metal or semimetal oxide coating, and to a process for the production thereof.... Agent: Millen, White, Zelano & Branigan, P.C.

20100283075 - Led with enhanced light extraction: A light emitting device having a plurality of light extracting elements defined on an upper surface of a semiconductor layer of the device, wherein the light extracting elements are adapted to couple light out of the device and to modify the far field emission profile of the device. Each element... Agent: Renner Otto Boisselle & Sklar, LLP

20100283074 - Light emitting diode with bonded semiconductor wavelength converter: A light emitting diode (LED) has various LED layers provided on a substrate. A multilayer semiconductor wavelength converter, capable of converting the wavelength of light generated in the LED to light at a longer wavelength, is attached to the upper surface of the LED by a bonding layer. One or... Agent: 3m Innovative Properties Company

20100283077 - Light emitting diodes including optically matched substrates: Light emitting diodes include a diode region comprising a gallium nitride-based n-type layer, an active region and a gallium nitride-based p-type layer. A substrate is provided on the gallium nitride-based n-type layer and optically matched to the diode region. The substrate has a first face remote from the gallium nitride-based... Agent: Myers Bigel Sibley & Sajovec, P.A.

20100283070 - Nitride semiconductor light emitting device and method of manufacturing the same: There are provided a nitride semiconductor light emitting device having improved light extraction efficiency and a method of manufacturing the same. A nitride semiconductor light emitting device according to an aspect of the invention includes a light emitting lamination including first and second conductivity type nitride semiconductors and an active... Agent: Mcdermott Will & Emery LLP

20100283069 - Optical systems fabricated by printing-based assembly: The present invention provides optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic... Agent: Greenlee Sullivan P.C.

20100283071 - Organic electroluminescent display device and method of manufacturing the same: A method of manufacturing an organic electroluminescent display device may comprise forming transistors on a substrate, forming a lower electrode over an insulating layer, forming an insulating layer on the transistors, the lower electrode being coupled to a source or a drain of each of the transistors, forming a bank... Agent: Birch Stewart Kolasch & Birch

20100283072 - Quantum dot-based light sheets useful for solid-state lighting: A quantum dot-based light sheet or film is disclosed. In certain embodiments, a quantum dot-based light sheet includes one or more films or layers comprising quantum dots (QD) disposed on at least a portion of a surface of a waveguide and one or more with LEDs optically coupled to the... Agent: Qd Vision, Inc.

20100283079 - Semiconductor light emitting device package: A semiconductor light emitting device package including a main body including a supporting member and an outside member on the supporting member; at least one semiconductor light emitting device disposed on the supporting member in which the outside member at least partially surrounds the at least one semiconductor light emitting... Agent: Birch Stewart Kolasch & Birch

20100283073 - Thin-film led having a mirror layer and method for the production thereof: A thin-film LED comprising a barrier layer (3), a first mirror layer (2) succeeding the barrier layer (3), a layer stack (5) succeeding the first mirror layer (2), and at least one contact structure (6) succeeding the layer stack (5). The layer stack (5) has at least one active layer... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100283078 - Transparent mirrorless light emitting diode: An (Al, Ga, In)N light emitting diode (LED) in which multi-directional light can be extracted from one or more surfaces of the LED before entering a shaped optical element and subsequently being extracted to air. In particular, the (Al, Ga, In)N and transparent contact layers (such as ITO or ZnO)... Agent: Gates & Cooper LLP Howard Hughes Center

20100283080 - Extension of contact pads to the die edge via electrical isolation: Light emitting diode (LED) dies are fabricated by forming LED layers including a first conductivity type layer, a light-emitting layer, and a second conductivity type layer. Trenches are formed in the LED layers that reach at least partially into the first conductivity type layer. Electrically insulation regions are formed in... Agent: Philips Intellectual Property & Standards

20100283081 - Light-emitting device: A light-emitting device comprising a semiconductor light-emitting stack, comprising a light emitting area; an electrode formed on the semiconductor light-emitting stack, wherein the electrode comprises a current injected portion and an extension portion; a current blocking structure formed between the current injected portion and the semiconductor light-emitting stack, and formed... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100283082 - Bipolar transistor with depleted emitter: This invention discloses a novel apparatus of fully depleted emitter so that the built-in potential between emitter and the base becomes lower and the charge storage between the emitter and base becomes small. This concept also applies to the diodes or rectifiers. With depleted junction, this results in very fast... Agent: Cheng Intellectual Property Group

20100283083 - Normally-off field effect transistor using iii-nitride semiconductor and method for manufacturing such transistor: Provided is a normally-off field effect transistor using a III-nitride semiconductor. The transistor is provided with a III-nitride semiconductor layer grown on a substrate by including an acceptor and a donor; a gate insulating film which is formed on the III-nitride semiconductor layer to have a thickness to be at... Agent: Kubotera & Associates, LLC

20100283084 - Bipolar transistor and method for fabricating the same: The bipolar transistor includes a heterojunction intrinsic base layer epitaxially grown on a collector layer. The intrinsic base layer is disposed on the collector layer surrounded by an isolation layer, and an N-type impurity layer is formed in a surface portion of the collector layer. The impurity concentration of the... Agent: Mcdermott Will & Emery LLP

20100283085 - Massively parallel interconnect fabric for complex semiconductor devices: An embodiment of this invention uses a massive parallel interconnect fabric (MPIF) at the flipped interface of a core die substrate (having the core logic blocks) and a context die (used for in circuit programming/context/customization of the core die substrate), to produce ASIC-like density and FPGA-like flexibility/programmability, while reducing the... Agent: Maxvalueip Consulting

20100283086 - Metal optical filter capable of photo lithography process and image sensor including the same: Disclosed is a metal optical filter capable of a photo-lithography process and an image sensor including the same, and more particularly, a metal optical filter capable of a photo-lithography process, which can quite freely adjust the transmission band and transmittance thereof, even with a small number of metal layers, and... Agent: Jae Y. Park

20100283087 - Electric component: An electric component comprising a sensor and/or actuator chip with a substrate on which a passivating layer and a sensor and/or actuator structure consisting of an active surface area is arranged. The chip is surrounded by an encapsulation having an opening which forms an access to the at least one... Agent: The Webb Law Firm, P.C.

20100283088 - Substrate-level interconnection and micro-electro-mechanical system: A micro-electro mechanical system (MEMS) is disclosed, which comprises a substrate; at least one transistor formed on the substrate and electrically connected with a contact plug; at least one MEMS device; and a local interconnection line at the same level of the contact plug, through which the MEMS device is... Agent: Tung & Associates / Randy W. Tung, Esq.

20100283089 - Method of reducing stacking faults through annealing: Accordingly, in one embodiment of the invention, a method is provided for reducing stacking faults in an epitaxial semiconductor layer. In accordance with such method, a substrate is provided which includes a first single-crystal semiconductor region including a first semiconductor material, the first semiconductor region having a <110> crystal orientation.... Agent: International Business Machines Corporation Dept. 18g

20100283090 - Magnetic nanotransistor: The present invention discloses methods and processes for producing magnetic nanotransistors containing carbon nanotubes. The nanotube is attached to at least one magnetic particle, the nanotube is then placed in between the two fixed magnetic moments, and subjected to an external magnetic field. The current passing through the nanotube can... Agent: Honda/fenwick

20100283092 - Semiconductor device: The semiconductor device includes a first conductor formed over a semiconductor substrate; a first insulator formed over the first conductor; a second insulator formed over the first insulator, the second insulator having an etching characteristic different from an etching characteristic of the first insulator; a second conductor formed on the... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100283091 - Semiconductor device having a reduced bit line parasitic capacitance and method for manufacturing the same: A semiconductor device having a reduced bit line parasitic capacitance and a method of making same is presented. The semiconductor device includes a first, second, third, and fourth interlayer dielectric layers, first and second bit lines, first and second landing plug and first and second storage node contacts. An optional... Agent: Ladas & Parry LLP

20100283093 - Structure and method to form edram on soi substrate: A memory device is provided that in one embodiment includes a trench capacitor located in a semiconductor substrate including an outer electrode provided by the semiconductor substrate, an inner electrode provided by a conductive fill material, and a node dielectric layer located between the outer electrode and the inner electrode;... Agent: Scully, Scott, Murphy & Presser, P.C.

20100283094 - Semiconductor device having vertical transistor and method of fabricating the same: There are provided a semiconductor device having a vertical transistor and a method of fabricating the same. The method includes preparing a semiconductor substrate having a cell region and a peripheral circuit region. Island-shaped vertical gate structures two-dimensionally aligned along a row direction and a column direction are formed on... Agent: Mills & Onello LLP

20100283095 - Flash memory device: A method of manufacturing a flash memory device is disclosed. The method includes the steps of providing a semiconductor substrate in which a cell region and a select transistor region are defined, etching the semiconductor substrate in the select transistor region so that there is a first step between the... Agent: Marshall, Gerstein & Borun LLP

20100283097 - Mos semiconductor memory device: The invention provides a MOS semiconductor memory device that achieves excellent data retention characteristics while also achieving high-speed data write performance, low-power operation performance, and high reliability. A MOS semiconductor memory device 601 includes a first insulating film 111 and fifth insulating film 115 having large bandgaps 111a and 115a,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100283099 - Non-volatile semiconductor memory device and manufacturing method thereof: A non-volatile semiconductor device includes an n type well formed in a semiconductor substrate having a surface, the surface having a plurality of stripe shaped grooves and a plurality of stripe shaped ribs, a plurality of stripe shaped p type diffusion regions formed in upper parts of each of the... Agent: The Marbury Law Group, PLLC

20100283098 - Nonvolatile semiconductor memory device and a method of manufacturing the same: A nonvolatile semiconductor memory device includes a plurality of bit line diffusion layers formed in a semiconductor region, and extending in a row direction; a plurality of first insulating films, each being formed on the semiconductor region and between adjacent two of the bit line diffusion layers, and including a... Agent: Mcdermott Will & Emery LLP

20100283096 - Semiconductor device and method for fabricating the same: A semiconductor device including a conductive layer, a diffusion barrier layer formed over the conductive layer, including a refractory metal compound, and acquired after a surface treatment, and a metal silicide layer formed over the diffusion barrier layer. The adhesion between a diffusion barrier layer and a metal silicide layer... Agent: Ip & T Law Firm PLC

20100283100 - Semiconductor memory comprising dual charge storage nodes and methods for its fabrication: A dual charge storage node memory device and methods for its fabrication are provided. In one embodiment a dielectric plug is formed comprising a first portion recessed into a semiconductor substrate and a second portion extending above the substrate. A layer of semiconductor material is formed overlying the second portion.... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20100283101 - Patterning nanocrystal layers: A method for forming a semiconductor device is presented. The method includes providing a substrate prepared with first and second regions with a first device layer. A second device layer including nanocrystals is also formed. A cover layer is provided over the second device layer. The cover layer is patterned... Agent: HorizonIPPte Ltd

20100283102 - Vertical channel transistor in semiconductor device and method of fabricating the same: A method of fabricating a vertical channel transistor for a semiconductor device includes forming, on a substrate, a plurality of active pillars each having a gate electrode formed on and surrounding a lower portion thereof; forming a first insulation layer over the active pillars to fill a gap region between... Agent: Lowe Hauptman Ham & Berner, LLP

20100283104 - Semiconductor device and method for manufacturing the same: An element portion forming step includes an insulating film forming step of forming an insulating film on a surface of a base layer, a conductive layer forming step of uniformly forming a conductive layer on a surface of the insulating film, and an electrode forming step of patterning the conductive... Agent: Sharp Kabushiki Kaisha C/o Keating & Bennett, LLP

20100283105 - Semiconductor device and method for manufacturing the same: A technique of manufacturing a semiconductor device in which etching in formation of a contact hole can be easily controlled is proposed. A semiconductor device includes at least a semiconductor layer formed over an insulating surface; a first insulating layer formed over the semiconductor layer; a gate electrode formed over... Agent: Nixon Peabody, LLP

20100283106 - Semiconductor device having semiconductor layer on insulating structure and method of manufacturing the same: A semiconductor device in which a semiconductor layer is formed on an insulating substrate with a front-end insulating layer interposed between the semiconductor layer and the insulating substrate is provided which is capable of preventing action of an impurity contained in the insulating substrate on the semiconductor layer and of... Agent: Young & Thompson

20100283103 - Semiconductor device manufacturing method, semiconductor device and display apparatus: A method for manufacturing a semiconductor device includes: a first step of forming a base layer, which includes an element portion having a gate electrode and a flat interlayer insulating film formed so as to cover the gate electrode; a second step of ion implanting a delamination material into the... Agent: Birch Stewart Kolasch & Birch

20100283107 - Mos transistor with better short channel effect control and corresponding manufacturing method: The integrated circuit comprises at least one MOS transistor (T) including a gate (GR) having a bottom part in contact with the gate oxide. Said bottom part has an inhomogeneous work function (WFB, WFA) along the length of the gate between the source and drain regions, the value of the... Agent: Docket Clerk

20100283108 - Semiconductor device and method of manufacturing the same: To provide a semiconductor device provided with an element isolation structure capable of hindering an adverse effect on electric characteristics of a semiconductor element, and a method of manufacturing the same. The thickness of a first silicon oxide film left in a shallow trench isolation having a relatively narrow width... Agent: Mcdermott Will & Emery LLP

20100283109 - Mosfet having a channel mechanically stressed by an epitaxially grown, high k strain layer: A transistor, such a MOSFET, having an epitaxially grown strain layer disposed over a channel region of a substrate for stressing the channel region to increase the carrier mobility in the channel, and method for making same. The strain layer is composed of a high dielectric constant material.... Agent: Duane Morris LLP - PhiladelphiaIPDepartment

20100283110 - Integrated sensor chip unit: An integrated sensor chip unit and fabrication method includes a measured-value pickup for determining measurement data and a circuit arrangement for enabling a wireless power supply and interrogation of the measurement data. The measured-value pickup is formed as an integratable sensor, and the circuit arrangement is formed as an integrated... Agent: Brinks Hofer Gilson & Lione/infineon Infineon

20100283112 - Light guide array for an image sensor: An image sensor pixel that includes a photoelectric conversion unit (102) supported by a substrate (106) and an insulator (110) adjacent to the substrate. The pixel includes a cascaded light guide (116,130) that is located within an opening of the insulator and extends above the insulator such that a portion... Agent: Hiok Nam Tay

20100283111 - Photo detector: Disclosed is an improved photo detector, which includes a substrate, a light reception chip, and a coating layer. The substrate includes a first electrode member and a second electrode member. The light reception chip is set on the substrate and is electrically connected to the first and second electrode members... Agent: Rosenberg, Klein & Lee

20100283113 - Wafer scale array of optical package and method for fabricating the same: A wafer-scale array of optical packages and a method for fabricating the same. The wafer-scale array of optical packages includes at least one wafer-scale array of lens structures, including a wafer-scale array of first barrel structures and a wafer-scale array of lenses directly formed on the wafer-scale array of first... Agent: Lerner, David, Littenberg, Krumholz & Mentlik

20100283114 - Chip-type semiconductor ceramic electronic component: A chip-type semiconductor ceramic electronic component including a ceramic body made of a semiconductor ceramic, first external electrodes formed on opposite end surfaces of the ceramic body, and second external electrodes extending to cover surfaces of the first external electrodes and part of side surfaces of the ceramic body. A... Agent: Dickstein Shapiro LLP

20100283115 - Schottky diode with improved high current behavior and method for its production: In the diffusion region (3) of the second conductivity mode, a more highly doped region of the same conductivity mode (5) is introduced in such a manner that the region of the first conductivity mode (2) which is covered by the metal silicide (9) and of the second conductivity mode... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20100283116 - Semiconductor device driving bridge-connected power transistor: A semiconductor device includes a low-side circuit, high-side circuit, a virtual ground potential pad, a common ground potential pad and a diode, formed on a semiconductor substrate. The low-side circuit drives a low-side power transistor. The high-side circuit is provided at a high potential region, and drives a high-side power... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100283117 - Fuse box guard rings including protrusions and methods of forming same: A structure included in a semiconductor device can include a fuse box guard ring that defines an interior region of the fuse box inside the fuse box guard ring and that defines an exterior region of the fuse box outside the fuse box guard ring. The fuse box guard ring... Agent: Myers Bigel Sibley & Sajovec

20100283118 - Oxidation after oxide dissolution: A method for manufacturing a SeOI substrate that includes a thin working layer made from one or more semiconductor material(s); a support layer; and a thin buried oxide layer between the working layer and the support layer. The method includes a manufacturing step of an intermediate SeOI substrate having a... Agent: Winston & Strawn LLP Patent Department

20100283119 - Semiconductor device including a deep contact and a method of manufacturing such a device: A semiconductor device includes a buried layer and a deep contact for providing a low resistive connection to the buried layer. The deep contact is formed by doped polycrystalline silicon. A method of manufacturing a semiconductor device and a deep contact for providing a low resistive connection to the buried... Agent: Texas Instruments Incorporated

20100283121 - Electrical fuses and resistors having sublithographic dimensions: Electrical fuses and resistors having a sublithographic lateral or vertical dimension are provided. A conductive structure comprising a conductor or a semiconductor is formed on a semiconductor substrate. At least one insulator layer is formed on the conductive structure. A recessed area is formed in the at least one insulator... Agent: Scully, Scott, Murphy & Presser, P.C.

20100283120 - Fuse chambers on a substrate: Embodiments of a system with first means for forming a chamber adjacent to a component formed on a substrate and a single orifice between the chamber and a first surface of the first means that is opposite a second surface of the first means adjacent to the substrate and second... Agent: Hewlett-packard Company Intellectual Property Administration

20100283123 - Bipolar junction transistor integrated with pip capacitor and method for making the same: A bipolar junction transistor (BJT) integrated with a PIP capacitor includes a substrate including a bipolarjunction transistor region and a PIP capacitor region, a bipolar junction transistor disposed in the bipolar junction transistor region and extending an isolation layer to the PIP capacitor region and a base poly layer disposed... Agent: North America Intellectual Property Corporation

20100283124 - Semiconductor device: Provided is a semiconductor device in which impedances of power-supply wiring/GND wiring are matched with each other inside the semiconductor device to reduce a noise current without depending on a mounting layout of a circuit board. In a semiconductor device according to a typical embodiment of the present invention including:... Agent: Miles & Stockbridge PC

20100283125 - Semiconductor device and method of manufacturing the same: The semiconductor device according to the present invention includes a lower electrode made of a metallic material, a capacitance film made of an insulating material and laminated on the lower electrode, an upper electrode made of a metallic material, opposed to the lower electrode through the capacitance film, and having... Agent: Rabin & Berdo, PC

20100283122 - Systems and methods for providing high-density capacitors: The present invention describes systems and methods for providing high-density capacitors. An exemplary embodiment of the present invention provides a high-density capacitor system comprising a substrate and a porous conductive layer formed on the substrate, wherein the porous conductive layer is formed in accordance with a predetermined pattern. Furthermore, the... Agent: Troutman Sanders LLP 5200 Bank Of America Plaza

20100283126 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a semiconductor substrate that is made of either of silicon carbide (SiC) and gallium nitride (GaN), and has a defect region containing a crystal defect; a first insulating film that coats the defect region and is arranged on the semiconductor substrate; and a conductor film that... Agent: Fish & Richardson P.C.

20100283128 - Dicing structures for semiconductor substrates and methods of fabrication thereof: Dicing structures for semiconductor substrates and methods of fabrication thereof are described. In one embodiment, a semiconductor wafer includes a first chip disposed in a substrate, a second chip disposed adjacent the first chip and disposed in the substrate, and a dicing street disposed between the first and the second... Agent: Slater & Matsil, L.L.P.

20100283127 - Method for packing semiconductor components and product produced according to the method: A method for packing semiconductor components is provided, in which a first side of a first wafer is connected to at least one further wafer, wherein at least one of the wafers has a plurality a semiconductor circuits and wherein trenches are made in the second side of the first... Agent: Ohlandt, Greeley, Ruggiero & Perle, LLP

20100283129 - Semiconductor device and method for fabricating the same: An upper surface of a semiconductor substrate includes a first portion where a dielectric film is provided, and a second portion where the dielectric film is not provided, wherein the second portion is located in the periphery of the first portion. The upper surface of the semiconductor substrate is covered... Agent: Mcdermott Will & Emery LLP

20100283130 - Semiconductor device and manufacturing method thereof: A semiconductor device includes: a semiconductor substrate having a first surface as a surface on which an element is formed, and a second surface opposite to the first surface; a through hole formed so as to extend through the semiconductor substrate from the first surface to the second surface; an... Agent: Mcdermott Will & Emery LLP

20100283131 - Discontinuous thin semiconductor wafer surface features: A semiconductor wafer has a semiconductor substrate and films on the substrate. The substrate and/or the films have at least one etch line creating a discontinuous surface that reduces residual stress in the wafer. Reducing residual stress in the semiconductor wafer reduces warpage of the wafer when the wafer is... Agent: Qualcomm Incorporated

20100283132 - Ecr-plasma source and methods for treatment of semiconductor structures: The invention relates to microelectronics, more particularly, to methods of manufacturing solid-state devices and integrated circuits utilizing microwave plasma enhancement under conditions of electron cyclotron resonance (ECR), as well as to use of plasma treatment technology in manufacturing of different semiconductor structures. Also proposed are semiconductor device and integrated circuit... Agent: Houston Eliseeva

20100283133 - Film-forming composition, insulating film with low dielectric constant, formation method thereof, and semiconductor device: In the invention, a silica sol prepared by hydrolyzing and condensing a silane compound represented by the following formula: Si(OR1)4 or R2nSi(OR3)4-n wherein R1s, R2(s) and R3(s) may be the same or different when a plurality of them are contained in the molecule and each independently represents a linear or... Agent: Myers Bigel Sibley & Sajovec

20100283134 - High power ceramic on copper package: According to an embodiment of a high power package, the package includes a copper heat sink, a ceramic lead frame and a semiconductor chip. The copper heat sink has a thermal conductivity of at least 350 W/m K. The ceramic lead frame is attached to the copper heat sink with... Agent: Coats & Bennett/infineon Technologies

20100283135 - Lead frame for semiconductor device: A lead frame including a lead frame structure having a die support area and a plurality of electrical contact areas has shallow recesses formed on a surface of the lead frame structure.... Agent: Onda Techno Intl. Patent Attys.

20100283136 - Qfn semiconductor package: A QFN semiconductor package includes a die attach pad; a semiconductor die mounted on the die attach pad; an inner terminal lead disposed adjacent to the die attach pad; a first wire bonding the inner terminal lead to the semiconductor die; an extended, outer terminal lead disposed along periphery of... Agent: North America Intellectual Property Corporation

20100283137 - Qfn semiconductor package: A QFN semiconductor package includes a die attach pad; a semiconductor die mounted on the die attach pad; an inner terminal lead disposed adjacent to the die attach pad; a first wire bonding the inner terminal lead to the semiconductor die; an extended, outer terminal lead disposed along periphery of... Agent: North America Intellectual Property Corporation

20100283138 - Nickel-based bonding of semiconductor wafers: A nickel-based material is used on one or both wafers to be bonded, and the two wafers are bonded at low temperature and pressure through interdiffusion of the nickel-based material with either another nickel-based material or aluminum. In various embodiments, nickel-based walls are formed on one wafer, and corresponding walls... Agent: Sunstein Kann Murphy & Timbers LLP

20100283139 - Semiconductor device package having chip with conductive layer: n

20100283140 - Package on package to prevent circuit pattern lift defect and method of fabricating the same: A package on package includes a lower semiconductor package including a plurality of stacked semiconductor chips, a connection portion including an electrically-conductive lead having a height lower than that of an encapsulation member, and an upper semiconductor package connected to the connection portion of the lower semiconductor package via a... Agent: Stanzione & Kim, LLP

20100283141 - Semiconductor chip package: A semiconductor chip package includes a chip; first and second connection pads arranged in a matrix and disposed about the chip, and the first and second connection pads have different bottom surface shapes when viewed from a bottom of the QFN package; bonding pads provided on an active surface of... Agent: North America Intellectual Property Corporation

20100283142 - Mold lock on heat spreader: A mold lock and a method of forming the mold lock are provided. The mold lock is used in an encapsulated semiconductor device and includes a neck and a shaped head integral with the neck. The mold lock can be formed to project above a support component, such as a... Agent: Texas Instruments Incorporated

20100283143 - Die exposed chip package: This disclosure describes a chip package. In one embodiment, a semiconductor chip package includes a thermal dissipater placed on top of an integrated-circuit die, the thermal dissipater having a same or similar coefficient of thermal expansion as that of the integrated-circuit die.... Agent: Sadler, Breen, Morasch & Colby, Ps

20100283147 - method for producing a plurality of chips and a chip produced accordingly: A production method for chips, in which as many method steps as possible are carried out in the wafer composite, that is, in parallel for a plurality of chips disposed on a wafer. This is a method for producing a plurality of chips whose functionality is implemented on the basis... Agent: Kenyon & Kenyon LLP

20100283148 - Bump pad structure: An embodiment is a bump bond pad structure that comprises a substrate comprising a top layer, a reinforcement pad disposed on the top layer, an intermediate layer above the top layer, an intermediate connection pad disposed on the intermediate layer, an outer layer above the intermediate layer, and an under... Agent: Slater & Matsil, L.L.P.

20100283144 - In-situ cavity circuit package: A flip chip semiconductor packaging device and method that incorporates in situ formation of cavities underneath selected portions of a die during a flip chip die bonding process. A method of flip chip semiconductor component packaging includes providing a die having a first surface, forming a barrier on first surface... Agent: Lando & Anastasi, LLP

20100283150 - Semiconductor device: The present invention provides a method for forming a semiconductor device, which comprises the steps of preparing a semiconductor wafer including an electrode pad, an insulating film formed with a through hole and a bedding metal layer which are formed in a semiconductor substrate, forming a first resist mask which... Agent: Rabin & Berdo, PC

20100283146 - Semiconductor structure and method of fabricating the same: A semiconductor structure including a substrate, an insulating layer, a composite pad structure, a passivation layer, and a bump is provided. A circuit structure is disposed on the substrate. The insulating layer covers the substrate and has a first opening exposing the circuit structure. The composite pad structure includes a... Agent: J C Patents

20100283145 - Stack structure with copper bumps: A stack structure with copper bumps on an integrated circuit board is disclosed. The stack structure includes a plurality of insulating layers and a plurality of conductive layers which are stacked alternately. The uppermost conductive layer has copper bumps as copper pillar pins for soldering the chip pins of an... Agent: Lin & Associates Intellectual Property, Inc.

20100283149 - Structure and method of forming a pad structure having enhanced reliability: A semiconductor substrate is provided having a first metal layer formed over a first insulating layer. A second insulating layer is formed having a first damascene opening, the first opening having a second insulating layer portion formed therein. A resist layer is deposited to fill the first opening and the... Agent: Lowe Hauptman Ham & Berner, LLP (tsmc)

20100283151 - Techniques for packaging multiple device components: Techniques for fabricating multiple device components. Specifically, techniques for fabricating a stacked package comprising at least one I/C module and a multi-chip package. The multi-chip package includes a plurality of integrated circuit dices coupled to a carrier. The dice are encapsulated such that conductive elements are exposed through the encapsulant.... Agent: Fletcher Yoder (micron Technology, Inc.)

20100283152 - Integrated circuits including ild structure, systems, and fabrication methods thereof: An integrated circuit includes a gate of a transistor disposed over a substrate. A connecting line is disposed over the substrate. The connecting line is coupled with an active area of the transistor. A level difference between a top surface of the connecting line and a top surface of the... Agent: Lowe Hauptman Ham & Berner, LLP (tsmc)

20100283153 - Ohmic contact having silver material: An ohmic contact is fabricated. The ohmic contact has low electric resistivity and high thermal conductivity. The materials for fabricating the ohmic contact include silver. Thus, equipments for fabricating the ohmic contact are compatible to modern generally used equipments.... Agent: Jackson Intellectual Property Group PLLC

20100283154 - Sputtering target and semiconductor device manufactured using the same: A sputtering target includes a tungsten (W)-nickel (Ni) alloy, wherein the nickel (Ni) is present in an amount of between about 0.01 weight % and about 1 weight %.... Agent: F. Chau & Associates, LLC

20100283157 - Interconnect structures with patternable low-k dielectrics and method of fabricating same: The present invention provides an interconnect structure in which a patternable low-k material is employed as an interconnect dielectric material. Specifically, this invention relates to single-damascene and dual-damascene low-k interconnect structures with at least one patternable low-k dielectric. In general terms, the interconnect structure includes at least one patterned and... Agent: Scully, Scott, Murphy & Presser, P.C.

20100283155 - Methods of forming a plurality of conductive lines in the fabrication of integrated circuitry, methods of forming an array of conductive lines, and integrated circuitry: A method of forming a pair of conductive lines in the fabrication of integrated circuitry includes forming a trench into a damascene material received over a substrate. Conductive material is deposited over the damascene material and to within the trench to overfill the trench. The conductive material is removed back... Agent: Wells St. John P.s.

20100283156 - Semiconductor device: A semiconductor device in which size reduction is possible without functional devices below pads being damaged by stress. The semiconductor device has a plurality of pads above a semiconductor substrate as terminals for external connection. A plurality of dual use pads which are used in both a probing test and... Agent: Mcdermott Will & Emery LLP

20100283158 - Structure and method for forming a capacitively coupled chip-to-chip signaling interface: A system and method for providing capacitively-coupled signaling in a system-in-package (SiP) device is disclosed. In one embodiment, the system includes a first semiconductor device and an opposing second semiconductor device spaced apart from the first device, a dielectric layer interposed between the first device and the second device, a... Agent: Dorsey & Whitney LLP Intellectual Property Department

20100283159 - Circuit substrate and method for utilizing packaging of the circuit substrate: A circuit substrate and the method for fabricating a packaging of the circuit substrate are provided. A plurality of electrodes are formed on the surface of the circuit substrate, the electrodes are formed with fork structures over an connection section of the circuit substrate, so that when the circuit substrate... Agent: Wpat, PC Intellectual Property Attorneys

20100283160 - Panelized backside processing for thin semiconductors: A semiconductor manufacturing method includes attaching a first die to a substrate panel. The method also includes applying a mold compound after attaching the first die to the substrate panel to the first die and the substrate panel. The method further includes thinning the first die and the mold compound... Agent: Qualcomm Incorporated

20100276654 - Low operational current phase change memory structures: Memory cells described herein have an increased current density at lateral edges of the active region compared to that of conventional mushroom-type memory cells, resulting in improved operational current efficiency.... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20100276655 - Voltage excited piezoelectric resistance memory cell system: The present invention discloses a memory system comprising a plurality of crystals, and at least two conductors. The at least two conductors being orthogonal to each other. Wherein at least one of the plurality of crystals are bounded by the orthogonal intersection of the at least two conductors.... Agent: Sawyer Law Group, P.C.

20100276656 - Devices comprising carbon nanotubes, and methods of forming devices comprising carbon nanotubes: Some embodiments include devices that contain bundles of CNTs. An undulating topography extends over the CNTs and within spaces between the CNTs. A global maximum lateral width is defined as the greatest lateral width of any of the spaces. A material is directly over the CNTs, with the material being... Agent: Wells St. John P.s.

20100276657 - Multilayer structure comprising a phase change material layer and method of producing the same: A method of producing a multilayer structure is provided, wherein the method comprises forming a phase change material layer onto a substrate, forming a protective layer, forming a further layer on the protective layer, patterning the further layer in an first 5 patterning step, patterning the protective layer and the... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100276658 - Resistive memory structure with buffer layer: A memory device comprises first and second electrodes with a memory element and a buffer layer located between and electrically coupled to them. The memory element comprises one or more metal oxygen compounds. The buffer layer comprises at least one of an oxide and a nitride. Another memory device comprises... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20100276660 - Memory with high dielectric constant antifuses adapted for use at low voltage: A memory cell is provided that includes a diode and a resistance-switching material layer coupled in series with the diode. The resistance-switching material layer: (a) has a dielectric constant in the range of about 5 to about 27, and (b) includes a material from the family consisting of XvOw, wherein... Agent: Dugan & Dugan, PC

20100276659 - Three-dimensional phase-change memory array: A three-dimensional phase-change memory array. In one embodiment of the invention, the memory array includes a first plurality of diodes, a second plurality of diodes disposed above the first plurality of diodes, a first plurality phase-change memory elements disposed above the first and second plurality of diodes and a second... Agent: Philip H. Schlazer Energy Conversion Devices, Inc.

20100276662 - Junctionless metal-oxide-semiconductor transistor: A junctionless metal-oxide-semiconductor transistor is described. In one aspect, a transistor device comprises a semiconductor material. The semiconductor material comprises first, second, and third portions. The second portion is located between the first and third portions. The first, second, and third portions are doped with dopants of the same polarity... Agent: Knobbe Martens Olson & Bear LLP

20100276661 - Polariton mode optical switch: Devices, methods, and techniques for frequency-dependent optical switching are provided. In one embodiment, a device includes a substrate, a first and a second optical-field confining structures located on the substrate, and a quantum structure disposed between the first and the second optical-field confining structures. The first optical-field confining structure may... Agent: Workman Nydegger 1000 Eagle Gate Tower

20100276663 - Gan semiconductor optical element, method for manufacturing gan semiconductor optical element, epitaxial wafer and method for growing gan semiconductor film: In a GaN based semiconductor optical device 11a, the primary surface 13a of the substrate 13 tilts at a tilting angle toward an m-axis direction of the first GaN based semiconductor with respect to a reference axis “Cx” extending in a direction of a c-axis of the first GaN based... Agent: Venable LLP

20100276666 - Controlled quantum dot growth: The present disclosure generally relates to techniques for controlled quantum dot growth as well as a quantum dot structures. In some examples, a method is described that includes one or more of providing a substrate, forming a defect on the substrate, depositing a layer on the substrate and forming quantum... Agent: Dorsey & Whitney LLP Intellectual Property Department

20100276665 - Production of semiconductor devices: A method of producing a layered semiconductor device comprises the steps of: (a) providing a base comprising a plurality of semiconductor nano-structures, (b) growing a semiconductor material onto the nano-structures using an epitaxial 5 growth process, and (c) growing a layer of the semiconductor material using an epitaxial growth process.... Agent: Christie, Parker & Hale, LLP

20100276664 - Thin-walled structures: Various embodiments provide thin-walled structures and methodologies for their formation. In one embodiment, the thin-walled structure can be formed by disposing a semiconductor material in a patterned aperture using a selective growth mask that includes a plurality of patterned apertures, followed by a continuous growth of the semiconductor material using... Agent: Mh2 Technology Law Group, LLP

20100276669 - Electric nanodevice and method of manufacturing same: A nanodevice is disclosed. The nanodevice comprises: a drain region, a source region opposite to the drain region and being separated therefrom at least with a trench, and a gate region, isolated from the drain and the source regions and from the trench. The trench has a height which is... Agent: Martin D. Moynihan D/b/a Prtsi, Inc.

20100276667 - Nonvolatile memory electronic device including nanowire channel and nanoparticle-floating gate nodes and a method for fabricating the same: A nonvolatile memory electronic device including nanowire channel and nanoparticle-floating gate nodes, in which the nonvolatile memory electronic device, which comprises a semiconductor nanowire used as a charge transport channel and nanoparticles used as a charge trapping layer, is configured by allowing the nanoparticles to be adsorbed on a tunneling... Agent: Lrk Patent Law Firm

20100276668 - Reducing source/drain resistance of iii-v based transistors: An integrated circuit structure includes a substrate; a channel layer over the substrate, wherein the channel layer is formed of a first III-V compound semiconductor material; a highly doped semiconductor layer over the channel layer; a gate dielectric penetrating through and contacting a sidewall of the highly doped semiconductor layer;... Agent: Slater & Matsil, L.L.P.

20100276681 - Display device and method for manufacturing the same: A display device includes an insulating substrate; a plurality of gate wires formed on the insulating substrate, the plurality of gate wires including a gate electrode; a gate insulating layer covering the plurality of gate wires; a transparent electrode layer formed on the gate insulating layer, the transparent electrode layer... Agent: Innovation Counsel LLP

20100276676 - Image display panel and image display apparatus: An image display panel includes a gate electrode; a gate insulating film over the gate electrode; a source electrode, a drain electrode, and a first adhesive on the gate insulating film; an organic semiconductor layer on the source and drain electrodes including a space; an interlayer insulating film covering the... Agent: Cooper & Dunham, LLP

20100276675 - Light-emitting device: Disclosed is a light emitting device including a pair of electrodes at least one of which is transparent or semi-transparent, and a phosphor layer arranged between the pair of electrodes. The phosphor layer contains phosphor particles dispersed therein, and conductive nano particles are interposed at the interface between the phosphor... Agent: Mcdermott Will & Emery LLP

20100276674 - Light-emitting device and materials therefor: An organic light-emitting device comprising an anode; a hole transport layer; a light-emitting layer; and a cathode, characterised in that the hole transport layer comprises a polymer having a repeat unit comprising a 9,9 biphenyl fluorene unit wherein the 9-phenyl rings are independently and optionally substituted and the fluorene unit... Agent: Marshall, Gerstein & Borun LLP

20100276671 - Oled display with a common anode and method for forming the same: A pixel for an organic light emitting diode (OLED) display and a method for forming such a pixel is provided. The pixel includes a substrate, a transistor formed over the substrate, and an OLED formed over the substrate. The transistor includes a gate, a source, and a drain. The OLED... Agent: Honeywell/ifl Patent Services

20100276673 - Organic compound, and organic photoelectric device including the same: In the above Chemical Formula 1, X1 to X24, Ar1 to Ar3, and Ar′ to Ar′″, and Chemical Formulae 2 to 5, are as described in the specification. The organic compound easily dissolves in an organic solvent, and is applicable as a host material of an emission layer of an... Agent: Lee & Morse, P.C.

20100276672 - Organic electroluminescent device and display medium: in formula (I), R1s each independently representing a linear alkyl, linear alkoxy, branched alkyl, or branched alkoxy group having from 3 to 20 carbon atoms; and R2s each independently representing a hydrogen atom, a linear alkyl group having from 1 to 20 carbon atoms, a linear alkoxy group having from... Agent: Oliff & Berridge, PLC

20100276680 - Organic light emitting display having a gas vent groove to derease edge open failures: An Organic Light Emitting Display (OLED) and its fabrication method has a pixel defining layer provided on a first electrode which is formed with a gas vent groove to allow gas to vent when the pixel defining layer is being formed, so that gas is not left in a pixel... Agent: R. E. Bushnell & Law Firm

20100276677 - Organic light-emitting device: Disclosed is an organic light-emitting device (OLED), wherein a lower electrode, an organic emitting unit, an upper electrode, and a light enhance layer are subsequently formed between a bottom substrate and a top substrate. The light enhance layer has higher refractive index, between 2 and 3, than that of the... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100276678 - Organic light-emitting device: There are provided an organic electroluminescent transfer medium, an organic electroluminescent transfer object, and a production process of an organic electroluminescent device using the organic electroluminescent transfer medium or the organic electroluminescent transfer object, in which a pattern can be transferred from an organic electroluminescent transfer medium onto an organic... Agent: Oliff & Berridge, PLC

20100276679 - Organic thin film transistor and method of manufacturing the organic thin film transistor, and display apparatus using the same: Provided are an organic semiconductor structure and a method of manufacturing the same, an organic thin film transistor (OTFT) using the organic semiconductor structure and a method of manufacturing the OTFT, and a display apparatus using the same. The OTFT includes: an oxide layer formed on a base substrate; a... Agent: Mckenna Long & Aldridge LLP

20100276670 - Photoelectric device, imaging device, and photosensor: o

20100276685 - Amorphous oxide and field effect transistor: An amorphous oxide at least includes: at least one element selected from the group consisting of In, Zn, and Sn; and Mo. An atomic composition ratio of Mo to a number of all metallic atoms in the amorphous oxide is 0.1 atom % or higher and 5 atom % or... Agent: Fitzpatrick Cella Harper & Scinto

20100276689 - Field effect transistor using amorphous oxide film as channel layer, manufacturing method of field effect transistor using amorphous oxide film as channel layer, and manufacturing method of amorphous oxide film: An amorphous oxide containing hydrogen (or deuterium) is applied to a channel layer of a transistor. Accordingly, a thin film transistor having superior TFT properties can be realized, the superior TFT properties including a small hysteresis, normally OFF operation, a high ON/OFF ratio, a high saturated current, and the like.... Agent: Fitzpatrick Cella Harper & Scinto

20100276687 - Organic electroluminescent display device: To provide an organic electroluminescent display device including an organic electroluminescent layer that can be easily fabricated under an atmosphere containing oxygen and which can achieve high efficiency. An organic electroluminescent display device includes a substrate, an organic electroluminescent layer, an upper electrode and a lower electrode sandwiching therein the... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100276683 - Oxide semiconductor and thin film transistor including the same: Provided are an oxide semiconductor and an oxide thin film transistor including the oxide semiconductor. The oxide semiconductor may be formed of an indium (In)-zinc (Zn) oxide in which hafnium (Hf) is contained, wherein In, Zn, and Hf are contained in predetermined or given composition ratios.... Agent: Harness, Dickey & Pierce, P.L.C

20100276688 - Oxide semiconductor field effect transistor and method for manufacturing the same: o

20100276682 - Oxide semiconductor thin-film transistor: An oxide semiconductor thin-film transistor, comprising: a source electrode and a drain electrode formed on a substrate; a composite semiconductor active layer formed between the source electrode and the drain electrode; a gate dielectric layer formed on the source electrode, the composite semiconductor active layer and the drain electrode; and... Agent: Morris Manning Martin LLP

20100276684 - Rectifier and process for producing the rectifier: The present invention provides a rectifier element that has a titanium oxide layer interposed between first and second electrodes containing a transition metal with an electronegativity larger than that of Ti, wherein, in the titanium oxide layer, only the interface on the side facing any one of the electrodes has... Agent: Cooley LLP Attn: Patent Group

20100276686 - Thin film transistor substrate and method of fabricating the same: A thin film transistor (TFT) substrate and a method of fabricating the same are provided. The thin film transistor substrate may have low resistance characteristics and may have reduced mutual diffusion and contact resistance between an active layer pattern and data wiring. The thin film transistor substrate may include gate... Agent: H.c. Park & Associates, PLC

20100276690 - Silicon wafer having testing pad(s) and method for testing the same: The present invention relates to a silicon wafer having testing pad(s) and a method for testing the same. The silicon wafer includes a silicon substrate, an insulation layer, at least one testing pad and a dielectric layer. The testing pad includes a first metal layer, a second metal layer and... Agent: Mccracken & Frank LLP

20100276691 - Method for fabricating flexible semiconductor device and layered film used therefore: A method for fabricating a flexible semiconductor device includes: preparing a layered film 80 including a first metal layer 10, an inorganic insulating layer 20, a semiconductor layer 30, and a second metal layer 40 which are sequentially formed; etching the first metal layer 10 to form a gate electrode... Agent: Mcdermott Will & Emery LLP

20100276692 - Thin film transistor, method for manufacturing the same and display using the same: One embodiment of the present invention is a thin film transistor having a gate electrode formed on an insulating substrate, a gate wire connected to the gate electrode, a capacitor electrode, a capacitor wire connected to the capacitor electrode, a gate insulator formed on the gate electrode, an oxide semiconductor... Agent: Squire, Sanders & Dempsey LLP

20100276693 - Finfet field effect transistor insulated from the substrate: A finFET field effect transistor is produced by the formation of an electrical junction between the thin fin portion of semiconductor material which forms the channel of the transistor and the circuit substrate. Doping particles are implanted in the substrate through a mask which is then subsequently used to form... Agent: Gardere Wynne Sewell LLP Intellectual Property Section

20100276695 - Display device and manufacturing method thereof: In the present invention, a wiring including Cu is provided as an electrode or a wiring used for the display device represented by the EL display device and the liquid crystal display device. Besides, sputtering is performed with a mask to form the wiring including Cu. With such structure, it... Agent: Robinson Intellectual Property Law Office, P.C.

20100276694 - Display device, method for manufacturing the same, and electronic device having the same: In a case where a p-channel thin film transistor is used as a thin film transistor that is electrically connected to a light-emitting element and drives the light-emitting element, a value of cutoff current of the p-channel thin film transistor is made lower than that of a p-channel thin film... Agent: Nixon Peabody, LLP

20100276696 - Semiconductor device and method of fabricating the same: An active matrix display device having a pixel structure in which pixel electrodes, gate wirings and source wirings are suitably arranged in the pixel portions to realize a high numerical aperture without increasing the number of masks or the number of steps. The device comprises a gate electrode and a... Agent: Fish & Richardson P.C.

20100276700 - external extraction light emitting diode based upon crystallographic faceted surfaces: A light emitting diode is disclosed that includes a support structure and a Group III nitride light emitting active structure mesa on the support structure. The mesa has its sidewalls along an indexed crystal plane of the Group III nitride. A method of forming the diode is also disclosed that... Agent: Koppel, Patrick, Heybl & Dawson

20100276698 - Gate electrodes for millimeter-wave operation and methods of fabrication: A transistor device having a tiered gate electrode fabricated with methods using a triple layer resist structure. The triple layer resist stack is deposited on a semiconductor structure. An exposure pattern is written onto the resist stack using an e-beam writer, for example. The exposure dose is non-uniform across the... Agent: Koppel, Patrick, Heybl & Dawson

20100276697 - Semiconductor device: Semiconductor devices having strong excitonic binding are disclosed. In some embodiments, a semiconductor device includes at least one active layer composed of a first compound, and at least one barrier layer composed of a second compound and disposed on at least one surface of the at least one active layer.... Agent: Workman Nydegger 1000 Eagle Gate Tower

20100276699 - Silicon carbide and related wide bandgap semiconductor based optically-controlled power switching devices: An optically-controlled power switch for use as an electrical switch is generally provided. The device can include a wide bandgap semiconducting material defining a stack having a p-n junction, a metal mask overlying the top surface of the stack and defining at least one opening to allow light to pass... Agent: Dority & Manning, P.A.

20100276702 - Doped diamond led devices and associated methods: LED devices and methods for making such devices are provided. One such method may include forming epitaxially a substantially single crystal SiC layer on a substantially single crystal Si wafer, forming epitaxially a substantially single crystal diamond layer on the SiC layer, doping the diamond layer to form a conductive... Agent: Thorpe North & Western, LLP.

20100276701 - Low thermal resistance and robust chip-scale-package (csp), structure and method: A chip scale package (CSP) semiconductor device can include a semiconductor layer, circuitry on an active surface of the semiconductor layer, and a diamond layer on a back side of the semiconductor layer. The diamond layer can provide an efficient heat sink for the semiconductor layer, with a thermal conductivity... Agent: Mh2 Technology Law Group, LLP

20100276703 - Silicon carbide semiconductor device: A MOS type SiC semiconductor device having high reliability and a longer lifespan against TDDB of a gate oxide film is disclosed. The semiconductor device includes a MOS (metal-oxide-semiconductor) structure having a silicon carbide (SiC) substrate, a polycrystalline Si gate electrode, a gate oxide film interposed between the SiC substrate... Agent: Young Basile

20100276704 - Organic light emitting device and method of fabricating the same: An organic light emitting device and a method for fabricating the same are discussed. According to an embodiment, the method includes forming a mother substrate structure including organic light emitting devices including TFTs and first electrodes, each first electrode electrically connected to the corresponding TFT and being a part of... Agent: Birch Stewart Kolasch & Birch

20100276705 - Solid state lighting device with an integrated fan: A solid state lighting device includes a light source having one or more solid state light emitting cells. The solid state lighting device also includes a fan to cool the light emitting cells.... Agent: Arent Fox LLP

20100276707 - Display apparatus and method thereof: A display apparatus includes pixel electrodes disposed on a first base substrate, a second base substrate which faces the first base substrate, color pixels disposed on the second base substrate, the color pixels correspond to the pixel electrodes in a one-to-one correspondence, each color pixel partially covers the corresponding pixel... Agent: Cantor Colburn, LLP

20100276706 - Method for the production of a plurality of optoelectronic components, and optoelectronic component: A method for producing a plurality of optoelectronic devices is specified, comprising the following steps: providing a connection carrier assemblage having a plurality of device regions, wherein at least one electrical connection region is provided in each of the device regions, providing a semiconductor body carrier, on which a plurality... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100276708 - Semiconductor light emitting device substrate strips and packaged semiconductor light emitting devices: Semiconductor light emitting device packaging methods include fabricating a substrate configured to mount a semiconductor light emitting device thereon. The substrate may include a cavity configured to mount the semiconductor light emitting device therein. The semiconductor light emitting device is mounted on the substrate and electrically connected to a contact... Agent: Myers Bigel Sibley & Sajovec, P.A.

20100276709 - Method for manufacturing compound semiconductor substrate, compound semiconductor substrate and light emitting device: A method for manufacturing a compound semiconductor substrate includes at least the processes of epitaxially growing a quaternary light emitting layer composed of AlGaInP on a GaAs substrate; vapor-phase growing a p-type GaP window layer on a first main surface of the quaternary light emitting layer, the first main surface... Agent: Oliff & Berridge, PLC

20100276710 - Ultraviolet light emitting algan composition and ultraviolet light emitting device containing same: An AlGaN composition is provided comprising a group III-Nitride active region layer, for use in an active region of a UV light emitting device, wherein light-generation occurs through radiative recombination of carriers in nanometer scale size, compositionally inhomogeneous regions having band-gap energy less than the surrounding material. Further, a semiconductor... Agent: U S Army Research Laboratory Attn: Rdrl-loc-i

20100276714 - Conversion led: A conversion LED is provided. The conversion LED may include a primary light source which emits in the short-wave radiation range below 420 nm, and a luminophore placed in front of it consisting of the BAM system as a host lattice for at least partial conversion of the light source's... Agent: Viering, Jentschura & Partner - Osr

20100276713 - Led device and packaging method thereof: A LED device includes a base structure having a receiving space, a light-emitting chip, an encapsulating structure, and a phosphor layer. The receiving space is defined by an inner bottom surface of the base structure and an inner side wall surrounding the inner bottom surface. The light-emitting chip is mounted... Agent: Rabin & Berdo, PC

20100276718 - Light emitting apparatus and method for the same: A light emitting apparatus includes a patterned conductive layer, a light emitting device on the patterned conductive layer, and a first light diffusion layer. The light emitting device and the patterned conductive layer are embedded in the first light diffusion layer. A method of forming such a light emitting apparatus... Agent: Snell & Wilmer L.L.P. (main)

20100276720 - Light emitting device structure and process for fabrication thereof: A light emitting device structure, wherein the emitter layer structure comprises one or more device wells defined by thick field oxide regions, and a method of fabrication thereof are provided. Preferably, by defining device well regions after depositing the emitter layer structure, emitter layer structures with reduced topography may be... Agent: Teitelbaum & Maclean

20100276715 - Light emitting device, light emitting device package and lighting system including the same: A light emitting device including a second conductive type semiconductor layer; an active layer over the second conductive type semiconductor layer; a first conductive type semiconductor layer over the active layer; a second electrode in a first region under the second conductive type semiconductor layer; a current blocking layer including... Agent: Birch Stewart Kolasch & Birch

20100276711 - Light emitting diode arrangement for high safety requirements: In a light emitting diode arrangement for lighting purposes, comprising a circuit board with at least one light generating semiconductor element disposed on the circuit board and conductors extending on the circuit board to the semiconductor element and being electrically connected to terminals of the semiconductor element, a light transmissive... Agent: John S. Pratt, Esq Kilpatrick Stockton, LLP

20100276716 - Light emitting diode coating method: The LED coating method includes (a) preparing a substrate and a plurality of LEDs arranged on the substrate; (b) applying a photoresist onto the substrate and the plurality of LEDs; and (c) selectively exposing the photoresist to light to form a first coating on surfaces of the plurality of LEDs.... Agent: Sherr & Vaughn, PLLC

20100276712 - Light emitting diode with thin multilayer phosphor film: A multiple layer film and a method of manufacturing the same, the film having a phosphor bearing layer including phosphor and a carrier, and a rigid protective layer. In some embodiments a mixture including phosphor and an uncurable fluid are dispensed onto a surface, and the mixture is at least... Agent: Arent Fox LLP

20100276717 - Light scattering by controlled porosity in optical ceramics for leds: The present invention relates to a light emitting device (100) comprising at least one light emitting diode (101) and at least one porous ceramic element (102), which ceramic element (102) is arranged to receive light from the light emitting diode(s) (101). The present invention also relates to methods for the... Agent: Philips Intellectual Property & Standards

20100276719 - Optoelectronic device: An optoelectronic device such as a light-emitting diode chip is disclosed. It includes a substrate, a multi-layer epitaxial structure, a first metal electrode layer, a second metal electrode layer, a first bonding pad and a second bonding pad. The multi-layer epitaxial structure on the transparent substrate comprises a semiconductor layer... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100276723 - Device and device manufacture method: A device is provided with: a first substrate mainly containing silicon dioxide; a second substrate mainly containing silicon, compound semiconductor, silicon dioxide or fluoride; and a bonding functional intermediate layer arranged between the first substrate and the second substrate. The first substrate is bonded to the second substrate thorough room... Agent: Birch Stewart Kolasch & Birch

20100276721 - Light emitting device encapsulated with silicones and curable silicone compositions for preparing the silicones: A composition includes: (I) an alkenyl functional, phenyl-containing polyorganosiloxane, an Si—H functional phenyl-containing polyorganosiloxane, or a combination thereof; (II) a hydrogendiorganosiloxy terminated oligodiphenylsiloxane having specific molecular weight, an alkenyl-functional, diorganosiloxy-terminated oligodiphenylsiloxane having specific molecular weight, or a combination thereof; and (III) a hydrosilylation catalyst. A light emitting device is made... Agent: Dow Corning Corporation Co1232

20100276724 - Light-emitting device: The application illustrates a light-emitting device including a contact layer and a current spreading layer on the contact layer. A part of the contact layer is a rough structure and a part of the contact layer is a flat structure. A part of the current spreading layer is a rough... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100276725 - Nitride semiconductor light emitting device: The invention relates to a high-output nitride light emitting device. The light emitting device includes a first conductivity type nitride semiconductor layer, an active layer and a second conductivity type nitride semiconductor layer deposited in their order on a substrate. The light emitting device also includes first and second insulation... Agent: Mcdermott Will & Emery LLP

20100276722 - Optoelectronic semiconductor chip, optoelectronic component and a method for producing an optoelectronic component: A semiconductor chip is specified that has a contact layer that is not optimum for many common applications. For example, the contact layer is too thin to tolerate an operating current intended for the semiconductor chip without considerable degradation. Also specified is an optoelectronic component in which the semiconductor chip... Agent: Slater & Matsil, L.L.P.

20100276726 - Light emitting device, package, and system: A light emitting device includes a first semiconductor layer of a first conductivity type, an active layer adjacent to the first semiconductor layer, a second semiconductor layer of a second conductivity type and provided adjacent to the active layer, and a passivation layer provided on a side surface of the... Agent: Ked & Associates, LLP

20100276727 - Reverse-conducting semiconductor device: A reverse-conducting semiconductor device is disclosed with an electrically active region, which includes a freewheeling diode and an insulated gate bipolar transistor on a common wafer. Part of the wafer forms a base layer with a base layer thickness. A first layer of a first conductivity type with at least... Agent: Buchanan, Ingersoll & Rooney PC

20100276728 - Avalanche capability improvement in power semiconductor devices having dummy cells around edge of active area: A structure of power semiconductor device having dummy cells around edge of active area is disclosed. The UIS test result of said improved structure shows that failed site after UIS test randomly located in active area which means avalanche capability of the semiconductor power device is enhanced by implementation of... Agent: Bacon & Thomas, PLLC

20100276729 - Semiconductor device, manufacturing method thereof, and manufacturing method of trench gate: IGBT 10 comprises an n+-type emitter region, an n−-type drift region, a p-type body region disposed between the emitter region and the drift region, a trench gate extending in the body region from the emitter region toward the drift region, and a projecting portion of an insulating material being in... Agent: Oliff & Berridge, PLC

20100276730 - Semiconductor device: Semiconductor devices having at least one barrier layer are disclosed. In some embodiments, a semiconductor device includes an active layer and one or more barrier layers disposed on either one side or both sides of the active layer. The active layer may be composed of a first compound semiconductor material,... Agent: Workman Nydegger 1000 Eagle Gate Tower

20100276731 - Inorganic nanocrystal bulk heterojunctions: A bulk heterojunction comprising an intermixed blend of fully inorganic n- and p-type particles and its method of manufacture are described. The particles are preferably nanometer-scale, spherical-shaped particles known as nanocrystals which are assembled into a densely packed three-dimensional array. The nanocrystals are preferably fabricated from a photo-active material which,... Agent: Brookhaven Science Associates/ Brookhaven National Laboratory

20100276732 - Semiconductor device: A semiconductor device includes a lower barrier layer 12 composed of a layer of AlxGa1-xN (0≦x≦1) in a state of strain relaxation, and a channel layer 13, which is composed of a layer of InyGa1-yN (0≦y≦1) disposed on the lower barrier layer 12, has band gap that is smaller than... Agent: Mr. Jackson Chen

20100276733 - Solid-state circuit device: A commercially mass-produced ultra-miniaturized solid state system for using an ultraminiaturized atomic or molecular integrated circuit with gigabit memory and picosecond speed to automatically perform self-optimizing tasks selected from the group consisting of searching, tracking, teletraining, telelearning, telemedical diagnosis or treatment, and implanting knowledge or skill... Agent: Chou H. Li

20100276734 - Electrochemical biosensor arrays and systems and methods of making same: Electrochemical biosensor arrays and systems, as well as methods of making the electrochemical biosensor arrays and systems, are described herein. The electrochemical biosensor systems can be used with CMOS detection circuits that have a plurality of chemical detection and/or actuation channels or sites. The biosensor systems generally include a first... Agent: Troutman Sanders LLP 5200 Bank Of America Plaza

20100276735 - Semiconductor device with photonics: A method for forming a semiconductor structure having a transistor region and an optical device region includes forming a transistor in and on a first semiconductor layer of the semiconductor structure, wherein the first semiconductor layer is over a first insulating layer, the first insulating layer is over a second... Agent: Freescale Semiconductor, Inc. Law Department

20100276736 - Cmos image sensor on stacked semiconductor-on-insulator substrate and process for making same: Methods and apparatus for producing a CMOS image sensor result in a plurality of photo sensitive layers, each layer including: a glass or glass ceramic substrate having first and second spaced-apart surfaces; a semiconductor layer disposed on the first surface of the glass or glass ceramic substrate; and a plurality... Agent: Corning Incorporated

20100276737 - Pixel of image sensor and method for fabricating the same: A pixel of an image sensor includes a polysilicon layer, and an active region which needs to be electrically coupled with the polysilicon layer, wherein the polysilicon layer extends over a portion of the active region, such that the polysilicon layer and the active region are partially overlapped, and the... Agent: Mcandrews Held & Malloy, Ltd

20100276738 - Solid-state imaging device and fabrication method thereof: There are steps of having circuitry (30) formed on a substrate (10), forming a lower electrode layer (25) on the circuitry (30), patterning the lower electrode layer (25) to separate pixel-wise into a set of segments, forming a compound-semiconductor thin film of charcopyrite structure (24) over a whole area of... Agent: Fish & Richardson P.C.

20100276739 - Semiconductor device and method for fabricating the same: The semiconductor device includes a device isolation structure formed in a semiconductor substrate to define an active region, a bridge type channel structure formed in the active region, and a coaxial type gate electrode surrounding the bridge type channel structure of a gate region. The bridge type channel structure is... Agent: Townsend And Townsend And Crew, LLP

20100276740 - Method for fabricating higher quality thicker gate oxide in a non-volatile memory cell and associated circuits: A non-volatile memory cell includes a program transistor and a control capacitor. A portion of a substrate associated with the program transistor is exposed to multiple implantations (such as DNW, HiNWell, HiPWell, and P-well implantations). Similarly, a portion of the substrate associated with the control capacitor is exposed to multiple... Agent: Munck Carter/nsc

20100276741 - Integrated circuit with buried digit line: A method of forming a buried digit line is disclosed. Sacrificial spacers are formed along the sidewalls of an isolation trench, which is then filled with a sacrificial material. One spacer is masked while the other spacer is removed and an etch step into the substrate beneath the removed spacer... Agent: Knobbe Martens Olson & Bear LLP

20100276742 - Random access memory device utilizing a vertically oriented select transistor: A memory structure has a vertically oriented access transistor with an annular gate region. A transistor is fabricated such that the channel of the transistor extends outward with respect to the surface of the substrate. An annular gate is fabricated around the vertical channel such that it partially or completely... Agent: Dickstein Shapiro LLP

20100276743 - Semiconductor memory device and method for manufacturing same: A laminated body is formed by alternately laminating a plurality of dielectric films and electrode films on a silicon substrate. Next, a through hole extending in the lamination direction is formed in the laminated body. Next, a selective nitridation process is performed to selectively form a charge layer made of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100276744 - Non-volatile memory device and method for fabricating the same: A non-volatile memory device includes a peripheral circuit region and a cell region. A method for fabricating the non-volatile memory device includes forming gate patterns over a substrate, the gate pattern including a tunnel insulation layer, a floating gate electrode, a charge blocking layer and a control gate electrode, and... Agent: Ip & T Law Firm PLC

20100276745 - Electrically programmable device with embedded eeprom and method for making thereof: A semiconductor device includes a substrate and a first gate oxide layer overlying a first device region and a second device region in the substrate, a first gate in the first device region, and a second gate and a third gate in the second device region. The device also has... Agent: Townsend And Townsend And Crew, LLP

20100276746 - Sonos memory cells having non-uniform tunnel oxide and methods for fabricating same: Methods for forming a memory cell are disclosed. A method includes forming a source-drain structure in a semiconductor substrate where the source-drain structure includes a rounded top surface and sidewall surfaces. An oxide layer is formed on the top and sidewall surfaces of the source-drain structure. The thickness of the... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20100276747 - Charge trapping layer, method of forming the charge trapping layer, non-volatile memory device using the same and method of fabricating the non-volatile memory device: Provided is a charge trapping layer which has excellent memory characteristics, a method of forming the charge trapping layer, a nonvolatile memory device using the charge trapping layer, and a method of fabricating the nonvolatile memory device, in which a hybrid nanoparticle which is obtained by mixing a nanoparticle having... Agent: Rosenberg, Klein & Lee

20100276748 - Method of forming lutetium and lanthanum dielectric structures: Methods of forming dielectric structures are shown. Methods of forming dielectric structures are shown that include lutetium oxide and lanthanum aluminum oxide crystals embedded within the lutetium oxide. Specific methods shown include monolayer deposition which yields process improvements such as chemistry control, step coverage, crystallinity/microstructure control.... Agent: Schwegman, Lundberg & Woessner/micron

20100276749 - Vertical transistors: The invention includes a semiconductor structure having U-shaped transistors formed by etching a semiconductor substrate. In an embodiment, the source/drain regions of the transistors are provided at the tops of pairs of pillars defined by crossing trenches in the substrate. One pillar is connected to the other pillar in the... Agent: Knobbe Martens Olson & Bear LLP

20100276750 - Metal oxide semiconductor (mos) structure and manufacturing method thereof: The manufacturing method includes the steps of: providing a semiconductor base of a first conduction type; forming a first epitaxial layer with a plurality of epitaxial pillars of therein on a first surface of the semiconductor base, wherein the epitaxial pillars have a conduction type opposite to the first epitaxial... Agent: Schmeiser Olsen & Watts

20100276751 - Integrated circuit utilizing trench-type power mos transistor: An integrated circuit includes a power MOS transistor which comprises a drain region, a trench gate, a source region, a well region, a deep well region and a substrate region. The drain region has a doping region of a first conductivity type connected to a drain electrode. The trench gate... Agent: Wpat, PC Intellectual Property Attorneys

20100276752 - Monolithic output stage with verticle high-side pmos and verticle low-side nmos interconnected using buried metal, structure and method: A voltage converter can include an output circuit having a vertical high-side device and a vertical low-side device which can be formed on a single die (i.e. a “PowerDie”). The high side device can be a PMOS transistor, while the low side device can be an NMOS transistor. The source... Agent: Mh2 Technology Law Group, LLP

20100276754 - Thin-film semiconductor device and field-effect transistor: A semiconductor thin film (1) that is laminated on a gate electrode (13) with a gate insulation film (15) therebetween is included. The semiconductor thin film (1) has a layered structure and includes at least two semiconductor layers (a, a′). In the semiconductor thin film (1), for example, an intermediate... Agent: Wolf Greenfield & Sacks, P.C.

20100276753 - Threshold voltage adjustment through gate dielectric stack modification: Multiple types of gate stacks are formed on a doped semiconductor well. A high dielectric constant (high-k) gate dielectric is formed on the doped semiconductor well. A metal gate layer is formed in one device area, while the high-k gate dielectric is exposed in other device areas. Threshold voltage adjustment... Agent: Scully, Scott, Murphy & Presser, P.C.

20100276755 - Electrostatic discharge protection device and method for fabricating the same: An electrostatic discharge protection device includes a substrate where an active region is defined by an isolation layer, a gate electrode simultaneously crossing both the isolation layer and the active region, and a junction region formed in the active region at both sides of the gate electrode and separated from... Agent: Ip & T Law Firm PLC

20100276756 - Substrate fins with different heights: A device includes a number of fins. Some of the fins have greater heights than other fins. This allows the selection of different drive currents and/or transistor areas.... Agent: Intel Corporation C/o Cpa Global

20100276759 - Integrated circuits and methods of design and manufacture thereof: Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes using a first mask to pattern a gate material forming a plurality of first and second features. The first features form gate electrodes of the semiconductor devices, whereas the second features are... Agent: Slater & Matsil, L.L.P.

20100276757 - Recessed channel array transistor (rcat) in replacement metal gate (rmg) logic flow: Embodiments of the invention relate to a method of fabricating logic transistors using replacement metal gate (RMG) logic flow with modified process to form recessed channel array transistors (RCAT) on a common semiconductor substrate. An embodiment comprises forming an interlayer dielectric (ILD) layer on a semiconductor substrate, forming a first... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100276758 - Stressed semiconductor using carbon and method for producing the same: A stressed semiconductor using carbon is provided. At least one carbon layer containing diamond is formed either below a semiconductor layer or above a semiconductor device. The carbon layer induces stress in the semiconductor layer, thereby increasing carrier mobility in the device channel region. The carbon layer may be selectively... Agent: Intel Corporation C/o Cpa Global

20100276760 - Semiconductor device with metal gate: Gate electrode structures having a thin layer of ReO3 formed with high effective work function and high heat resistance are disclosed. The thin layer of ReO3 is formed by providing a semiconductor structure having an oxygen-containing metal alloy layer and a rhenium layer. A heat annealing step diffuses Re from... Agent: Turocy & Watson, LLP

20100276761 - Non-planar transistors and methods of fabrication thereof: Non-planar transistors and methods of fabrication thereof are described. In an embodiment, a method of forming a non-planar transistor includes forming a channel region on a first portion of a semiconductor fin, the semiconductor fin having a top surface and sidewalls. A gate electrode is formed over the channel region... Agent: Slater & Matsil, L.L.P.

20100276762 - Semiconductor device: A semiconductor device including: a semiconductor layer; a gate insulating layer; a gate electrode; a channel region; a source region and a drain region; a guard ring region; an offset insulating layer; a first interlayer dielectric; a first shield layer formed above the first interlayer dielectric and the guard ring... Agent: Harness, Dickey & Pierce, P.L.C

20100276763 - Lga substrate and method of making same: A transistor comprises a gate (110) comprising a gate electrode (111) and a gate dielectric (112), an electrically insulating cap (120, 720) over the gate, and a source/drain contact (130) adjacent to the gate. The electrically insulating cap prevents electrical contact between the gate and the source/drain contact. In one... Agent: Intel Corporation C/o Cpa Global

20100276764 - Semiconductor structure with selectively deposited tungsten film and method for making the same: A semiconductor structure is provided. The semiconductor structure includes a substrate; a dielectric layer overlying the substrate; a conductor pattern on a main surface of the dielectric layer, the conductor pattern having a top surface and sidewalls; and a conformal metal layer selectively deposited on the top surface and sidewalls,... Agent: North America Intellectual Property Corporation

20100276765 - Semiconductor device and method of manufacturing the same: A method of manufacturing a semiconductor device includes: a bonding step of bonding a first substrate with optical transparency and a second substrate having a surface on which a functional element is provided to each other such that the functional element faces the first substrate; a thinning step of thinning... Agent: Sughrue Mion, PLLC

20100276767 - Mems microphone with cavity and method therefor: A device comprises a substrate, a micro electro-mechanical systems (MEMS) structure, and a dielectric film. The substrate has a first side and a second side, the second side opposite the first side. The MEMS structure is formed on the first side of the substrate. The cavity is formed in the... Agent: Freescale Semiconductor, Inc. Law Department

20100276766 - Shielding for a micro electro-mechanical device and method therefor: A device comprises a conductive substrate, a micro electromechanical systems (MEMS) structure, and a plurality of bond pads. The conductive substrate has a first side and a second side, the second side opposite the first side. The MEMS structure is formed over the first side of the conductive substrate. The... Agent: Freescale Semiconductor, Inc. Law Department

20100276771 - Magnetoresistance device including layered ferromagnetic structure, and method of manufacturing the same: A layered ferromagnetic structure is composed of a first ferromagnetic layer positioned over a substrate; a second ferromagnetic layer positioned over the first ferromagnetic layer; and a first non-magnetic layer placed between the first and second ferromagnetic layers. The top surface of the first ferromagnetic layer is in contact with... Agent: Sughrue Mion, PLLC

20100276769 - Semiconductor device: A semiconductor device includes a magnetic sensor chip, an electrically conducting layer wafer-level patterned in contact with the magnetic sensor chip, encapsulation material disposed on the magnetic sensor chip, and an array of external contact elements electrically coupled with the magnetic sensor chip through the electrically conducting layer.... Agent: Dicke, Billig & Czaja

20100276768 - Sidewall coating for non-uniform spin momentum-transfer magnetic tunnel junction current flow: A magnetic tunnel junction device comprises a substrate including a patterned wiring layer. A magnetic tunnel junction (MTJ) stack is formed over the wiring layer. A low-conductivity layer is formed over the MTJ stack and a conductive hard mask is formed thereon. A spacer material is then deposited that includes... Agent: Fleit Gibbons Gutman Bongini & Bianco P.l.

20100276770 - Spin current thermal conversion device and thermoelectric conversion device: m

20100276772 - Photoelectric conversion device and method of manufacturing photoelectric conversion device: Provided are a photoelectric conversion device (10) having a first conductivity type semiconductor (1), a first main surface (1a) of the first conductivity type semiconductor (1) being provided with a concave portion (26, 27) formed therein, the photoelectric conversion device (10) including: a second conductivity type semiconductor (3) formed in... Agent: Nixon & Vanderhye, PC

20100276773 - Photoelectric conversion element and manufacturing method of photoelectric conversion element: An object is to provide a photoelectric conversion element having a side surface with different taper angles by conducting etching of a photoelectric conversion layer step-by-step. A pin photodiode has a high response speed compared with a pn photodiode but has a disadvantage of large dark current. One cause of... Agent: Fish & Richardson P.C.

20100276774 - Integrated circuit package and method for fabrication thereof: The invention provides an integrated circuit package and method of fabrication thereof. The integrated circuit package comprises an integrated circuit chip having a photosensitive device thereon; a bonding pad formed on an upper surface of the integrated circuit chip and electrically connected to the photosensitive device; a barrier formed between... Agent: Birch Stewart Kolasch & Birch

20100276775 - Semiconductor light receiving element: The semiconductor light receiving element 1 includes a semiconductor substrate 101, and a semiconductor layer having a photo-absorption layer 105 disposed on the top of the semiconductor substrate 101. The semiconductor layer of the semiconductor light receiving element 1 containing at least the photo-absorption layer 105 has a mesa structure,... Agent: Mr. Jackson Chen

20100276776 - Germanium film optical device fabricated on a glass substrate: A germanium (Ge) photodiode array on a glass substrate is provided with a corresponding fabrication method. A Ge substrate is provided that is either not doped or lightly doped with a first dopant. The first dopant can be either an n or p type dopant. A first surface of the... Agent: Sharp Laboratories Of America, Inc. C/o Law Office Of Gerald Maliszewski

20100276777 - Low capacitance photodiode element and computed tomography detector: A photodiode element includes a first layer of a first diffusion type and a second layer. The second layer defines a charge-collecting area. The charge-collecting area includes an active region of a second diffusion type and an inactive region. The active region surrounds the inactive region. The photodiode element also... Agent: Ge Healthcare,IPDepartment

20100276778 - Image sensor: A buried oxide is provided in a substrate of a photodiode so as to be opposed to a cathode and is in contact with a lower end of a depletion layer. The buried oxide is polarized owing to charges forming the depletion layer and thus works as a capacitor. A... Agent: Bruce L. Adams, Esq. Adams & Wilks

20100276779 - Transient voltage suppressor having symmetrical breakdown voltages: A vertical transient voltage suppressing (TVS) device includes a semiconductor substrate of a first conductivity type where the substrate is heavily doped, an epitaxial layer of the first conductivity type formed on the substrate where the epitaxial layer has a first thickness, and a base region of a second conductivity... Agent: Patent Law Group LLP

20100276780 - Memory arrays: The invention includes semiconductor constructions having trenched isolation regions. The trenches of the trenched isolation regions can include narrow bottom portions and upper wide portions over the bottom portions. Electrically insulative material can fill the upper wide portions while leaving voids within the narrow bottom portions. The trenched isolation regions... Agent: Wells St. John P.s.

20100276781 - Semiconductor constructions: The invention includes methods of forming oxide structures under corners of transistor gate stacks and adjacent trenched isolation regions. Such methods can include exposure of a semiconductor material to steam and H2, with the H2 being present to a concentration of from about 2% to about 40%, by volume. An... Agent: Wells St. John P.s.

20100276782 - Semiconductor device mounted with fuse memory: A fuse element utilizing a reaction between two layers by feeding current is manufactured. A fuse element including a first layer formed of an oxide or a nitride and a second layer that becomes high resistant by nitridation or oxidation, in which the first layer and the second layer are... Agent: Robinson Intellectual Property Law Office, P.C.

20100276784 - Electronic components on trenched substrates and method of forming same: An electronic module including a substrate having at least one structure that reduces stress flow through the substrate, wherein the structure comprises at least one trench in a surface of the substrate.... Agent: Mcginn Intellectual Property Law Group, PLLC

20100276783 - Selective plasma etch of top electrodes for metal-insulator-metal (mim) capacitors: A method of forming integrated circuits (IC) having at least one metal insulator metal (MIM) capacitor. A bottom electrode is formed on a predetermined region of a semiconductor surface of a substrate. At least one dielectric layer including silicon is formed on the bottom electrode, wherein a thickness of the... Agent: Texas Instruments Incorporated

20100276785 - Doping of semiconductor layer for improved efficiency of semiconductor structures: A system and method for variable doping within a semiconductor structure for improved efficiency is described. One embodiment includes a semiconductor structure comprising a first semiconductor layer comprising a first semiconductor material, and a second semiconductor layer comprising a second semiconductor material, wherein the second semiconductor material is an oppositely-typed... Agent: Cooley LLP Attn: Patent Group

20100276786 - Through substrate vias: Methods and apparatus for forming through-vias are presented, for example, a method for forming a via in a portion of a semiconductor wafer comprising a substrate. The method comprises forming a trench surrounding a first part of the substrate such that the first part is separated from a second part... Agent: Ryan, Mason & Lewis, LLP

20100276787 - Wafer backside structures having copper pillars: An integrated circuit structure includes a semiconductor substrate having a front side and a backside, and a conductive via penetrating the semiconductor substrate. The conductive via includes a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is on the backside of the semiconductor substrate... Agent: Slater & Matsil, L.L.P.

20100276788 - Method and device of preventing delamination of semiconductor layers: Embodiments of the present invention describe a method and device of preventing delamination of semiconductor layers in a semiconductor device. The semiconductor device comprises a substrate with an interlayer dielectric (ILD). A protection layer is deposited on the ILD. Next, a getter layer is formed on the protection layer to... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100276789 - Semiconductor device having multiple-layer hard mask with opposite stresses and method for fabricating the same: A semiconductor device includes a hard mask including a first layer and a second layer in contact with each other and having opposite stress types, wherein a difference between initial stresses of the first layer and the second layer is increased so that after a thermal process, the difference between... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100276790 - Interlayer dielectric material in a semiconductor device comprising stressed layers with an intermediate buffer material: A highly stressed dielectric material, such as a tensile stressed material, may be deposited in a conformal manner so as to respect any deposition constraints caused by pronounced surface topography of highly scaled semiconductor devices, followed by the deposition of a buffer material having enhanced gap-filling capabilities. Thereafter, a further... Agent: Williams, Morgan & Amerson

20100276791 - Semiconductor device: A semiconductor device includes: a semiconductor substrate; a semiconductor element formed on a principal surface of the semiconductor substrate and having a multiple-layered interconnect layer; and a heterostructure magnetic shield covering the semiconductor element. The heterostructure magnetic shield includes a first magnetic shield layered structure and a second magnetic shield... Agent: Young & Thompson

20100276792 - Semiconductor device and method of forming shielding layer after encapsulation and grounded through interconnect structure: A semiconductor device has a substrate containing a conductive layer. An interconnect structure is formed over the substrate and electrically connected to the conductive layer. A semiconductor component is mounted to the substrate. An encapsulant is deposited over the semiconductor component and interconnect structure. A channel is formed in the... Agent: Robert D. Atkins

20100276793 - High pin density semiconductor system-in-a-package: Semiconductor packages that contain multiple stacked chips and methods for making such semiconductor packages are described. The packages also contain multiple chips that are stacked vertically. The chips are connected through stud bumps, printed interconnect structures, and conductive pillars formed with the package. The packages also contain two different moldings... Agent: Kenneth E. Horton Kirton & Mcconkle

20100276795 - Semiconductor package and method for manufacturing the same: A semiconductor package capable of being efficiently stacked and a method of manufacturing the same is presented. The semiconductor package includes a semiconductor chip, an insulation layer, and a through-electrode. The semiconductor chip has a first surface and a second surface, a circuit section in the semiconductor chip, an internal... Agent: Ladas & Parry LLP

20100276794 - System and method for multi-chip module die extraction and replacement: A system and method are provided in which a first chip in a stacked multi-chip module configuration is affixed via one or more adhesion layers to a first portion of a partitioned interposer unit. Planar partitions of the interposer are physically bonded via multiple solder “bumps,” which possess high tensile... Agent: Bae Systems

20100276796 - Reworkable electronic device assembly and method: An electronic device assembly is provided which includes a substrate, an interposer and an integrated circuit chip. The substrate is fabricated of a first material having a first thermal expansivity, and the interposer and integrated circuit chip are fabricated of a second material having a second thermal expansivity. The second... Agent: Heslin Rothenberg Farley & Mesiti P.C.

20100276797 - Semiconductor device: A semiconductor device includes a substrate having a chip island, a chip attached to the chip island, and encapsulation material deposited on the chip and part of the chip island. The chip island includes a first main face to which the chip is attached opposite a second main face, with... Agent: Dicke, Billig & Czaja

20100276798 - Semiconductor device: A semiconductor device includes a header, a semiconductor chip fixed to the header constituting a MOSFET, and a sealing body of insulating resin which covers the semiconductor chip, the header and the like, and further includes a drain lead contiguously formed with the header and projects from one side surface... Agent: Stanley P. Fisher Reed Smith LLP

20100276799 - Semiconductor chip package with stiffener frame and configured lid: Various semiconductor chip packages and methods of assembling and making the same are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a stiffener frame to a first side of a substrate. The stiffener frame has a central opening to accommodate a semiconductor chip and an... Agent: Timothy M Honeycutt Attorney At Law

20100276801 - Semiconductor device and method to manufacture thereof: A semiconductor device 100 includes a semiconductor substrate 14, a connection electrode 12 disposed on an upper surface of the semiconductor substrate 14 and connected to an integrated circuit thereon, a through electrode 20 which penetrates the semiconductor substrate 14 and the connection electrode 20, and an insulation portion 30... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20100276800 - Semiconductor module: A first circuit element and a second element are mounted with their electrode forming surfaces facing a wiring layer. A first bump electrode formed integrally with the wiring layer on one face substantially penetrates a first insulating resin layer. A gold plating layer covering an element electrode of the first... Agent: Mcdermott Will & Emery LLP

20100276803 - Semiconductor device and method of manufacturing the same: A semiconductor element (101) includes an electrode section (102) and a bump (105), a circuit board (103) includes an electrode section (104) and a bump (106), and a conductive filler (108) having a lower melting point than the melting points of the bumps (105, 106) electrically bonds the bumps (105,... Agent: Hamre, Schumann, Mueller & Larson P.C.

20100276802 - Semiconductor device and method of manufacturing the semiconductor device: Provided is a semiconductor device and a method of manufacturing the semiconductor device, in which the semiconductor device has a semiconductor element having a plurality of wires bonded to the semiconductor element with sufficient bonding reliability and has a good heat dissipation property. A semiconductor device in which a first... Agent: Birch Stewart Kolasch & Birch

20100276804 - Semiconductor device including ruthenium electrode and method for fabricating the same: A semiconductor device includes a semiconductor substrate, an insulation pattern on the semiconductor substrate, and an etch stop layer on the insulating pattern, the insulation pattern and the etch stop layer defining a contact hole that exposes the substrate, a first plug filled in a portion of the contact hole,... Agent: Ip & T Law Firm PLC

20100276805 - Integrated circuit chip with reduced ir drop: An integrated circuit chip includes a semiconductor substrate; a first interconnection wire having a first portion and a second portion on the semiconductor substrate, wherein the second portion is separated from the first portion; a second interconnection wire situated under the first interconnection wire; a first conductive via electrically coupling... Agent: North America Intellectual Property Corporation

20100276806 - Plastic package and method of fabricating the same: A plastic package includes a plurality of terminal members each having an outer terminal, an inner terminal, and a connecting part connecting the outer and the inner terminal; a semiconductor device provided with terminal pads connected to the inner terminals with bond wires; and a resin molding sealing the terminal... Agent: Oliff & Berridge, PLC

20100276807 - Fabrication of metal film stacks having improved bottom critical dimension: A method of fabricating metal film stacks is described that reduces or eliminates adverse effects of photolithographic misalignments. A bottom critical dimension is increased by removal of a bottom titanium nitride barrier.... Agent: Kenton R. Mullins Stout, Uxa, Buyan & Mullins, LLP

20100276808 - Surface mounting electronic component and manufacturing method thereof: The electric component includes at least a set of electrode terminals 2, 3, a semiconductor element 4 electrically connected with the set of electrode terminals, and a package 6 made of synthetic resin and sealing the electrode terminals and the semiconductor element with part of a lower surface of each... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20100276812 - Epitaxial wafer and manufacturing method thereof: A semiconductor device comprises a substrate, a conductive layer deposited on a substrate and an epitaxial layer deposited on the conductive layer. The conductive layer is patterned to include a first pattern. The first pattern includes a major surface and a plurality of grids defined in the major surface. The... Agent: Alston & Bird LLP

20100276813 - Injection molded soldering process and arrangement for three-dimensional structures: A method of implementing an injection molded soldering process for three-dimensional structures, particularly, such as directed to three-dimensional semiconductor chip stacking. Also provide is an arrangement for implementing the injection molded soldering (IMS) process. Pursuant to an embodiment of the invention, the joining of the semiconductor chip layers with a... Agent: Scully, Scott, Murphy & Presser, P.C.

20100276811 - Semiconductor component with terminal contact surface: At least one terminal contact surface (1) is formed on a topmost metal plane (2). Under it, in a secondmost metal plane (3), is a reinforcement region (8), in which the secondmost metal plane (3) is structured within its two-dimensional extent such that a part of the area of the... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100276810 - Semiconductor device and fabrication method thereof: A semiconductor device is provided. A substrate is provided. A buried layer is formed in the substrate. The buried layer comprises an insulating region. A deep trench contact structure is formed in the substrate. The deep trench contact structure comprises a conductive material and a liner layer formed on a... Agent: Quintero Law Office, PC

20100276809 - T-connections, methodology for designing t-connections, and compact modeling of t-connections: T-connections, methodology for designing T-connections, and compact modeling of T-connections. The T-connections include an electrically conductive T-junction comprising a body and first, second and third integral arms projecting from mutually perpendicular sides of the body, each arm of the three integral arms having a same first width abutting the body... Agent: Schmeiser, Olsen & Watts

20100276814 - Methods for packaging microelectronic devices and microelectronic devices formed using such methods: Methods for packaging microelectronic devices and microelectronic devices formed using such methods are disclosed herein. One aspect of the invention is directed toward a method for packaging a microelectronic device that includes coupling an active side of a microelectronic die to a surface of a support member. The microelectronic die... Agent: Perkins Coie LLP Patent-sea

20100276815 - Integrated circuit communication system with differential signal and method of manufacture thereof: A method of manufacture of an integrated circuit communication system including providing a semiconductor wafer; and fabricating a cross-over current mirror driver on the semiconductor wafer for generating a crossing point at a reference voltage.... Agent: Law Offices Of Mikio Ishimaru

20100276816 - Separate probe and bond regions of an integrated circuit: Disclosed are a system and method of separate probe and bond regions of an integrated circuit (IC). An IC, an I/O region adjacent to the core region to enable the core region, and a die metal interconnect separating a bond pad area in the I/O region from a probe pad... Agent: Raj Abhyanker, P.C.

20100276817 - Semiconductor device: A protective coating is formed on the surface of a semiconductor device. The surface is located on the side to which an extension portion of a wire connected to a pad of the semiconductor device is pulled. The protective coating is formed such that its height decreases toward the pad.... Agent: Kenyon & Kenyon LLP

20100276818 - Device comprising an organic component and an encapsulation layer with a moisture-reactive material: The device includes at least one optoelectronic component positioned on a substrate and at least one transparent face. The component is covered by a packaging layer which includes at least one barrier layer and a moisture-reactive layer. The reactive layer includes a moisture-reactive material chosen from alkaline-earth metals, alkali metals... Agent: Oliff & Berridge, PLC