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Active solid-state devices (e.g., transistors, solid-state diodes) September class, title,number 09/10

20100243980 - Nonvolatile memory device and method for manufacturing nonvolatile memory device: A nonvolatile memory device includes: a first interconnection extending in a first direction; a second interconnection extending in a second direction nonparallel to the first direction; and a memory layer placed between the first interconnection and the second interconnection and reversibly transitioning between a first state and a second state... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100243981 - Phase-change random access memory device: A phase-change random access memory device includes an isolation layer structure, an insulating interlayer, a spacer, a switching element and a phase-change material (PCM) layer. The isolation layer structure is in a trench on a substrate, defines an active region in the substrate, and has a recess at an upper... Agent: F. Chau & Associates, LLC

20100243982 - Variable resistance non-volatile memory cells and methods of fabricating same: Methods of fabricating integrated circuit memory cells and integrated circuit memory cells are disclosed. An integrated circuit memory cell can be fabricated by forming an ohmic layer on an upper surface of a conductive structure and extending away from the structure along at least a portion of a sidewall of... Agent: Myers Bigel Sibley & Sajovec

20100243983 - Controlled localized defect paths for resistive memories: Controlled localized defect paths for resistive memories are described, including a method for forming controlled localized defect paths including forming a first electrode forming a metal oxide layer on the first electrode, masking the metal oxide to create exposed regions and concealed regions of a surface of the metal oxide,... Agent: Legal Department

20100243984 - Live bioelectronic cell gated nanodevice: This invention is directed toward a bioelectronic cell gated nanodevice. The bioelectronic cell gated nanodevice comprises a plurality of bioelectric cells deposited on a fiber of a nanodevice. The bioelectronic cells of the nanodevice act as a gate, allowing current to be transmitted when the bioelectronic cells are exposed to... Agent: Fish & Richardson P.C.

20100243987 - Device of light-emitting diode and method for fabricating the same: A device of a light-emitting diode and a method for fabricating the same are provided. The LED device is made by forming a patterned epitaxial layer, a light-emitting structure, etc., on a substrate. In a subsequent process, the patterned epitaxial layer serves as a weakened structure, and can be automatically... Agent: Jianq Chyun Intellectual Property Office

20100243985 - High light-extraction efficiency light-emitting diode structure: The present invention discloses a high light-extraction efficiency LED structure, wherein metallic pads and metallic mesh wires made of an aluminum-silver alloy are formed on an LED, whereby the high-reflectivity aluminum-silver alloy makes the light incident on the metallic pads and metallic mesh wires reflected once more or repeatedly and... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100243986 - Hybrid vertical cavity light emitting sources and processes for forming the same: Vertical cavity light emitting sources that utilize patterned membranes as reflectors are provided. The vertical cavity light emitting sources have a stacked structure that includes an active region disposed between an upper reflector and a lower reflector. The active region, upper reflector and lower reflector can be fabricated from single... Agent: Whyte Hirschboeck Dudek S.c./warf Intellectual Property Department

20100243988 - Nitride semiconductor light-emitting chip, method of manufacture thereof, and semiconductor optical device: A nitride semiconductor light-emitting chip offers enhanced luminous efficacy as a result of an improved EL emission pattern. The nitride semiconductor laser chip (nitride semiconductor light-emitting chip) has a nitride semiconductor substrate having a principal growth plane, and nitride semiconductor layers grown on the principal growth plane of the nitride... Agent: Harness, Dickey & Pierce, P.L.C

20100243989 - Semiconductor device: A semiconductor device includes a substrate, a superlattice buffer layer that is formed on the substrate and is composed of first AlxGa1-xN layers and second AlxGa1-xN layers having an Al composition greater than that of the first AlxGa1-xN layers, the first and second AlxGa1-xN layers being alternately stacked one by... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100243990 - Nanosensors: Electrical devices comprised of nanowires are described, along with methods of their manufacture and use. The nanowires can be nanotubes and nanowires. The surface of the nanowires may be selectively functionalized. Nanodetector devices are described.... Agent: Harvard University & Medical School C/o Wolf, Greenfield & Sacks, P.C.

20100244008 - compound and organic light emitting device using the same: The present invention provides a novel compound that is capable of largely improving lifespan, efficiency, electrochemical stability and thermal stability of the organic light emitting device, and an organic light emitting device in which the compound is included in an organic compound layer.... Agent: Mckenna Long & Aldridge LLP

20100244013 - Compound for organic electroluminescent device and organic electroluminescent device using the same: Disclosed is an organic electroluminescent device (organic EL device) which is improved in luminous efficiency, fully secured of driving stability, and of simple constitution. Also disclosed is a compound useful for the fabrication of said organic electroluminescent device. This compound for organic electroluminescent device is a bipyrimidyl compound which has... Agent: Birch Stewart Kolasch & Birch

20100244016 - Display substrate and method of manufacturing the same: In a manufacturing method of a display substrate according to one or more embodiments, a plurality of thin films are patterned by using a photoresist film pattern having different thicknesses in each area on a substrate as etch masks. The photoresist film pattern may be etch-backed at least twice during... Agent: Innovation Counsel LLP

20100244014 - Electroluminescent metal complexes with triazoles and benzotriazoles:

20100244004 - Heteroleptic iridium complex: Novel compounds comprising heteroleptic iridium complexes are provided. The compounds have a particular combination of ligands which includes a single pyridyl dibenzo-substituted ligand. The compounds may be used in organic light emitting devices, particularly as emitting dopants, to provide devices having improved efficiency, lifetime, and manufacturing.... Agent: Townsend And Townsend And Crew, LLP

20100243991 - Light emitting system and methods for controlling nanocrystal distribution therein: A light emitting system includes a polymer mixture, and a plurality of nanocrystals occupying a predetermined portion of the polymer mixture. The polymer mixture includes at least two polymers that phase-segregate. Method(s) for controlling nanocrystal distribution within the light emitting device are also disclosed.... Agent: Hewlett-packard Company Intellectual Property Administration

20100244001 - Megahertz organic/polymer diodes and methods related thereto: Featured is an organic/polymer diode having a first layer composed essentially of one of an organic semiconductor material or a polymeric semiconductor material and a second layer formed on the first layer and being electrically coupled to the first layer such that current flows through the layers in one direction... Agent: Edwards Angell Palmer & Dodge LLP

20100244012 - Naphthyl-substituted anthracene derivatives and their use in organic light-emitting diodes: or a pharmaceutically acceptable salt thereof, with R1, R2, R3, R4, L, X, a, b, and c defined herein. The compounds of the present invention, having a substituted silicon atom introduced in anthracene, advantageously improve the solubility of anthracene without any adverse effects, thereby allowing solvent-processing. Also disclosed are light... Agent: Solvay C/o B. Ortego - Iam-nafta

20100243996 - Optical device having solvate and manufacturing method thereof: The present invention discloses a manufacturing method for an optical device having a solvate, comprising the following steps: providing a substrate, depositing a solute on the substrate, and placing the substrate in the vapor environment of a solvent such that the solvent and the solute on the substrate form a... Agent: Hudak, Shunk & Farine, Co., L.p.a.

20100244005 - Organic el apparatus, method of manufacturing organic el apparatus, electronic apparatus: Provided is an organic EL apparatus including: an organic EL panel including organic EL devices; a heat releasing member; and a pair of film sheets of which at least one is transparent, wherein the organic EL panel and the heat releasing member overlap and are interposed and encapsulated by the... Agent: Oliff & Berridge, PLC

20100244010 - Organic el device, color filter, and organic el display: An organic EL device includes an organic EL emitter (2) that emits blue light and a blue color filter (8B) through which the light emitted from the organic EL emitter passes. The blue color filter contains a coloring material selected from the group consisting of a methine dye, a copper-phthalocyanine... Agent: Burr & Brown

20100244011 - Organic el device, color filter, and organic el display: An organic EL device includes an organic EL emitter (2) that emits blue light and a blue color filter (8B) through which the light emitted from the organic EL emitter passes. The blue color filter contains a coloring material selected from the group consisting of a triarylmethane dye, a lake... Agent: Burr & Brown

20100243992 - Organic electroluminescence device:

20100243997 - Organic electroluminescence device and its manufacturing method: An organic electroluminescence device includes: a first electrode layer; an insulating film arranged on the first electrode layer; an organic layer that is arranged on the insulating film, and is in contact with the first electrode layer at an opening portion provided in the insulating film; a second electrode layer... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20100244006 - Organic electroluminescent device:

20100244009 - Organic electroluminescent devices comprising azomethine-metal complexes: The present invention relates to phosphorescent organic electroluminescent devices which contain as a matrix material of emitting layer, metal complexes of the formula (I)... Agent: Connolly Bove Lodge & Hutz, LLP

20100244007 - Organic electroluminescent element: The present invention provides a white organic electroluminescent element which can emits white light and is free from deviation of chromaticity. This organic electroluminescent element comprises a substrate and, provided on the substrate, at least an anode, a cathode, and a light emitting layer held between the anode and the... Agent: Cantor Colburn, LLP

20100243999 - Organic electronic device, organic electronic device manufacturing method, organic electronic device manufacturing apparatus, substrate processing system, protection film structure and storage medium with control program stored therein: An organic element is protected by a protection film which has high sealing performance while relaxing a stress and does not change the characteristics of the organic element. In a substrate processing system Sys, a substrate processing apparatus 10, which includes a deposition apparatus PM1, a first microwave plasma processing... Agent: Cantor Colburn, LLP

20100244002 - Organic light-emitting diode: An organic light-emitting diode includes an anode and a cathode separately arranged from each other, and an emission layer between the anode and the cathode, the emission layer including a single host material and a light-emitting material, the emission layer including, when the host material has a hole transport property,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244015 - Organic semiconductor device, manufacturing method of same, organic transistor array, and display: A major object of the present invention is to provide an organic semiconductor device which is provided with an organic semiconductor transistor having good transistor performance and is producible with high productivity. To achieve the object, the present invention provides an organic semiconductor device comprising: a substrate; a source electrode... Agent: Ladas & Parry LLP

20100243995 - Organic semiconductor transistor, method of producing the same, and electronic device: An organic semiconductor transistor has plural electrodes and an organic semiconductor layer containing at least one compound represented by the following Formula (I). In Formula (I), each R1 independently represents a straight-chain alkyl group having from 3 to 20 carbon atoms, a straight-chain alkoxy group having from 3 to 20... Agent: Oliff & Berridge, PLC

20100243993 - Organic thin film transistor and organic thin film light-emitting transistor: An organic thin film transistor including a substrate having thereon at least three terminals of a gate electrode, a source electrode and a drain electrode, an insulator layer and an organic semiconductor layer, with a current between a source and a drain being controlled upon application of a voltage to... Agent: Millen, White, Zelano & Branigan, P.C.

20100244000 - Organic thin film transistor and organic thin film light-emitting transistor: The present invention aims to provide an organic thin film transistor that is superior in stability in the atmosphere and that has a high operation speed. The organic thin film transistor according to the present invention includes three kinds of terminals consisting of a gate electrode, a source electrode, and... Agent: Millen, White, Zelano & Branigan, P.C.

20100244003 - Semiconductor device and light-emitting device: The present invention provides a semiconductor device by which a light-emitting device that is unlikely to cause defects such as a short circuit, can be manufactured. One feature of a semiconductor device of the present invention is to include an electrode that serves as an electrode of a light-emitting element.... Agent: Husch Blackwell Sanders, LLP Husch Blackwell Sanders LLP Welsh & Katz

20100243998 - Semiconductor material and organic rectifier diode: A semiconductor material and an organic rectifier diode can be used for organic-based RFID (Radio Frequency Identification) tags. The semiconducting material for an organic diode has a metal complex as a p-dopant for doping a hole-conducting organic matrix material, wherein the metal complex is a metal complex with Lewis acid... Agent: King & Spalding LLP

20100243994 - Transparent nonvolatile memory thin film transistor and method of manufacturing the same: Provided are a transparent nonvolatile memory thin film transistor (TFT) and a method of manufacturing the same. The memory TFT includes source and drain electrodes disposed on a transparent substrate. A transparent semiconductor thin layer is disposed on the source and drain electrodes and the transparent substrate interposed between the... Agent: Ampacc Law Group

20100244019 - Metal oxide semiconductor films, structures and methods: Materials and structures for improving the performance of semiconductor devices include ZnBeO alloy materials, ZnCdOSe alloy materials, ZnBeO alloy materials that may contain Mg for lattice matching purposes, and BeO material. The atomic fraction x of Be in the ZnBeO alloy system, namely, Zn1-xBexO, can be varied to increase the... Agent: Jacobs & Kim LLP

20100244018 - Semiconductor device and method for manufacturing the same: t

20100244020 - Semiconductor device and method for manufacturing the same: An object of an embodiment of the present invention is to provide a semiconductor device provided with a thin film transistor which includes an oxide semiconductor layer and has high electric characteristics. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor layer including silicon oxide,... Agent: Robinson Intellectual Property Law Office, P.C.

20100244021 - Semiconductor device, display device, and electronic appliance: To reduce adverse effects on actual operation and to reduce adverse effects of noise. A structure including an electrode, a wiring electrically connected to the electrode, an oxide semiconductor layer overlapping with the electrode in a plane view, an insulating layer provided between the electrode and the oxide semiconductor layer... Agent: Robinson Intellectual Property Law Office, P.C.

20100244022 - Thin film transistor and method of producing same: A first gate electrode (2) is formed on a substrate (1); a first gate insulating layer (3) is formed so as to cover the first gate electrode (2); a semiconductor layer (4) including an oxide semiconductor is formed on the first gate insulating layer (3); a second gate insulating layer... Agent: Fitzpatrick Cella Harper & Scinto

20100244017 - Thin-film transistor (tft) with an extended oxide channel: In at least some embodiments, a thin-film transistor (TFT) includes a gate electrode and a gate dielectric adjacent the gate electrode. The TFT also includes a source electrode at least partially aligned with the gate electrode and separated from the gate electrode by the gate dielectric. The TFT also includes... Agent: Hewlett-packard Company Intellectual Property Administration

20100244026 - Active device array substrate: An active device array substrate is provided. The active device array substrate includes an active matrix device, first bonding pads electrically connected to the active matrix device, second bonding pads electrically insulated from the first bonding pads, test bonding pads disposed between the first and the second bonding pads and... Agent: Jianq Chyun Intellectual Property Office

20100244025 - Active device array substrate and liquid crystal display panel: An active device array substrate, having at least a substrate, a first metal layer, an insulator layer, a second metal layer, a plurality of pixel electrodes and a plurality of active devices, is provided. The substrate has a display area and a narrow frame area. The first metal layer disposed... Agent: Jianq Chyun Intellectual Property Office

20100244024 - Integrated circuit packaging system with interposer and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing an interposer having device contacts, interconnect contacts, and test pads including the interconnect contacts along an interconnect perimeter region of the interposer, the device contacts at a device perimeter region of the interposer with the device perimeter region... Agent: Law Offices Of Mikio Ishimaru

20100244023 - Programmable resistance memory: A rewritable nonvolatile memory includes a test cell that is dedicated to testing the storage characteristics of other, similar, storage cells formed within the same integrated circuit memory. The test cell may be share the same structure and composition as storage cells and may be positioned proximate storage cells.... Agent: Ovonyx, Inc

20100244027 - Semiconductor device and method of controlling the same: A semiconductor device includes a capacitor element that stores charge to perform as a memory that stores information. The capacitor may include, but is not limited to, an insulating layer, a first electrode, and a second electrode. The insulating layer includes metal oxide. The insulating layer has a high dielectric... Agent: Mcginn Intellectual Property Law Group, PLLC

20100244028 - Test system and method of reducing damage in seed layers in metallization systems of semiconductor devices: During the formation of a complex metallization system, the influence of a manufacturing environment on sensitive barrier/seed material systems may be monitored or controlled by using an appropriate test pattern and applying an appropriate test strategy. For example, actual probe and reference substrates may be prepared and may be processed... Agent: Williams, Morgan & Amerson

20100244029 - Semiconductor device: The threshold voltage is shifted in a negative or positive direction in some cases by an unspecified factor in a manufacturing process of the thin film transistor. If the amount of shift from 0 V is large, driving voltage is increased, which results in an increase in power consumption of... Agent: Robinson Intellectual Property Law Office, P.C.

20100244030 - Photoelectric conversion element and imaging device: A photoelectric conversion element includes, in the following order: a substrate; a lower electrode; a photoelectric conversion layer; and an upper electrode comprising a transparent electrode material, the photoelectric conversion element further includes a stress relieving layer provided between the upper electrode and the photoelectric conversion layer, and the stress... Agent: Sughrue-265550

20100244032 - Aluminum-nickel alloy wiring material, device for a thin film transistor and a thin film transistor substrate using the same, and method of manufacturing the thin film transistor substrate: An Aluminum-Nickel alloy wiring material includes Aluminum, Nickel, Cerium, and Boron. A thin film transistor includes the Aluminum-Nickel alloy wiring material. A sputtering target comprises Aluminum, Nickel, Cerium and Boron. A method of manufacturing a thin film transistor substrate comprises disposing a thin film transistor on a substrate, wherein the... Agent: Cantor Colburn, LLP

20100244031 - Semiconductor device and method for manufacturing the same: The drain voltage of a transistor is determined depending on the driving voltage of an element connected to the transistor. With downsizing of a transistor, intensity of the electric field concentrated in the drain region is increased, and hot carriers are easily generated. An object is to provide a transistor... Agent: Robinson Intellectual Property Law Office, P.C.

20100244035 - Display panel and method of forming thereof: A panel a gate line on a first substrate, a gate insulating layer covering the gate line, a semiconductor layer on the gate insulating layer, a data line intersecting the gate line and including a source electrode and a drain electrode facing the source electrode on the semiconductor layer, a... Agent: Cantor Colburn, LLP

20100244033 - Optical sensor, method of making the same, and display panel having optical sensor: An optical sensor, method of making the same, and a display panel having an optical sensor. The optical sensor includes a first electrode, a second electrode, a photosensitive silicon-rich dielectric layer, and a first interfacial silicon-rich dielectric layer. The photosensitive silicon-rich dielectric layer is disposed between the first and second... Agent: North America Intellectual Property Corporation

20100244034 - Thin film transistor: A thin film transistor includes a gate electrode; a gate insulating layer which is provided to cover the gate electrode; a semiconductor layer which is provided over the gate insulating layer to overlap with the gate electrode; an impurity semiconductor layer which is partly provided over the semiconductor layer and... Agent: Nixon Peabody, LLP

20100244039 - Pixel structure: A pixel structure includes a patterned semiconductor layer disposed on a transistor region of the substrate, a first capacitor electrode disposed on a capacitor region of the substrate, a gate dielectric layer disposed on the first capacitor electrode, a gate disposed on a channel region of the patterned semiconductor layer,... Agent: North America Intellectual Property Corporation

20100244038 - Thin film transistor and fabricating method of the same: Provided are thin film transistor, a method of fabricating the same, a flat panel display device including the same, and a method of fabricating the flat panel display device, that are capable of applying an electric field to a gate line to form a channel region of a semiconductor layer... Agent: Cantor Colburn, LLP

20100244037 - Thin film transistor, its manufacturing method, and liquid crystal display panel and electronic device using same: A thin film transistor (TFT) is provided which is capable of reducing leakage currents in a polycrystalline silicon TFT without causing an increase in manufacturing processes. Source/drain regions of an activated layer of the TFT to be formed in a circuit region and pixel region formed on a glass substrate... Agent: Young & Thompson

20100244036 - Thin film transistor, method of fabricating the same and organic light emitting diode display device including the same: A thin film transistor, a method of fabricating the same, and an organic light emitting diode (OLED) display device including the same. The thin film transistor includes a substrate; a semiconductor layer disposed on the substrate and including a channel region; source/drain regions including ions and an offset region; a... Agent: Stein Mcewen, LLP

20100244043 - Electrical devices having improved transfer characteristics and method for tailoring the transfer characteristics of an electrical device: The invention concerns about electrical devices having improved transfer characteristics and a corresponding method of tailoring the transfer characteristics of such electrical devices. According to one aspect of the invention, there is provided an electrical device including at least two transistor segments or at least two transistors connected in parallel... Agent: Sughrue Mion, PLLC

20100244044 - Gan-based field effect transistor: The invention provides a GaN-based compound semiconductor device that is operable with low ON-resistance and high withstanding voltage. The GaN-based field effect transistor includes a buffer layer formed on a substrate, a channel layer, a drift layer formed on the channel layer, source and drain electrodes formed on the drift... Agent: Turocy & Watson, LLP

20100244042 - Group iii nitride compound semiconductor light emitting element and manufacturing method thereof: A group III nitride compound semiconductor light emitting element comprising: a first layer which is a single crystal layer of a group III nitride compound semiconductor, the first layer formed on the buffer layer and including a threading dislocation; a second layer of a group III nitride compound semiconductor formed... Agent: Mcginn Intellectual Property Law Group, PLLC

20100244040 - Group-iii nitride compound semiconductor light-emitting device, method of manufacturing group-iii nitride compound semiconductor light-emitting device, and lamp: A group-III nitride compound semiconductor light-emitting device, a method of manufacturing the group-III nitride compound semiconductor light-emitting device, and a lamp. The method includes the steps of: forming an intermediate layer (12) made of a group-III nitride compound on a substrate (11) by activating and reacting gas including a group-V... Agent: Sughrue Mion, PLLC

20100244046 - Nitride semiconductor device: On a processed substrate having an engraved region as a depressed portion formed thereon, a nitride semiconductor thin film is laid. The sectional area occupied by the nitride semiconductor thin film filling the depressed portion is 0.8 times the sectional area of the depressed portion or less.... Agent: Morrison & Foerster LLP

20100244041 - Semiconductor device and manufacturing method thereof: An isolation layer for suppressing a leakage current is provided at least between a channel layer and a buffer layer formed under the channel layer in the buffer layer.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244045 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a first semiconductor layer which is formed above a substrate, a Schottky electrode and an ohmic electrode which are formed on the first semiconductor layer to be spaced from each other and a second semiconductor layer which is formed to cover the first semiconductor layer with... Agent: Mcdermott Will & Emery LLP

20100244052 - High output group iii nitride light emitting diodes: A light emitting diode is disclosed that includes a silicon carbide substrate and a light emitting structure formed from the Group III nitride material system on the substrate. The diode has an area greater than 100,000 square microns and has a radiant flux at 20 milliamps current of at least... Agent: Myers Bigel Sibley & Sajovec, P.A.

20100244047 - Methods of forming semiconductor devices including epitaxial layers and related structures: A method of forming a semiconductor device may include forming a terminal region of a first conductivity type within a semiconductor layer of the first conductivity type. A well region of a second conductivity type may be formed within the semiconductor layer wherein the well region is adjacent at least... Agent: Myers Bigel Sibley & Sajovec, P.A.

20100244050 - Semiconductor device: A semiconductor device which is capable of operating at an operation frequency “f”, includes a substrate, a first element unit and a second element unit. The substrate has a thermal diffusion coefficient “D”. The first element unit is formed on the substrate. The first element includes a first active element.... Agent: Turocy & Watson, LLP

20100244051 - Semiconductor device and manufacturing method thereof: An object is to realize an integrated circuit included in a semiconductor device which has multiple functions, or to increase the size of an integrated circuit even when the integrated circuit is formed using a silicon carbide substrate. The integrated circuit includes a first transistor including an island-shaped silicon carbide... Agent: Fish & Richardson P.C.

20100244048 - Semiconductor device and method for manufacturing the same: A semiconductor device according to the present invention comprises a silicon carbide semiconductor substrate (1) including a silicon carbide layer (2); a high-concentration impurity region (4) provided in the silicon carbide layer (2); an ohmic electrode (9) electrically connected with the high-concentration impurity region (4); a channel region electrically connected... Agent: Mark D. Saralino (pan) Renner, Otto, Boisselle & Sklar, LLP

20100244049 - Silicon carbide semiconductor device with schottky barrier diode and method of manufacturing the same: A silicon carbide semiconductor device with a Schottky barrier diode includes a first conductivity type silicon carbide substrate, a first conductivity type silicon carbide drift layer on a first surface of the substrate, a Schottky electrode forming a Schottky contact with the drift layer, and an ohmic electrode on a... Agent: Posz Law Group, PLC

20100244053 - Light emitting device having pillar structure with hollow structure and the forming method thereof: A light emitting device, includes a substrate; a first semiconductor layer on the substrate; an active layer on the first semiconductor layer; a second semiconductor layer on the active layer; a transparent conductive layer on the second semiconductor layer; and a plurality of pillar structures with a hollow structure in... Agent: Sinorica, LLC

20100244054 - Method of manufacturing semiconductor device, semiconductor device and semiconductor composite device: A method for manufacturing a semiconductor device, includes: a step of etching a Si (111) substrate along a (111) plane of the Si (111) substrate to separate a Si (111) thin-film device having a separated surface along the (111) plane.... Agent: Mots Law, PLLC

20100244056 - Addressable or static light emitting, power generating or other electronic apparatus: The present invention provides an addressable or static electronic apparatus, such as a light emitting display or a power generating apparatus. An exemplary apparatus comprises a substrate having a plurality of cavities; a plurality of first conductors coupled to the substrate and at least partially within the cavities, with the... Agent: Gamburd Law Group LLC

20100244060 - Light emitting device having a plurality of light emitting cells and package mounting the same: Disclosed is a light emitting device having a plurality of light emitting cells and a package having the same mounted thereon. The light emitting device includes a plurality of light emitting cells which are formed on a substrate and each of which has an N-type semiconductor layer and a P-type... Agent: H.c. Park & Associates, PLC

20100244058 - Light emitting diode package: A light emitting diode package includes a substrate, a plurality of light emitting diode chips, a fluorescence layer, and a plurality of reflecting layers. The light emitting diode chips, the fluorescence layer, and the reflecting layers are disposed on the substrate. The fluorescence layer covers the light emitting diode chips,... Agent: Bacon & Thomas, PLLC

20100244057 - Organic light emitting display device: An organic light emitting display device, including: a first substrate on which a plurality of light emitting elements are formed; a second substrate that is disposed to be opposed to the first substrate; a primary dam member that is provided between the first substrate and the second substrate in order... Agent: Christie, Parker & Hale, LLP

20100244059 - Semiconductor device and manufacturing method thereof: An aspect of the present invention provides a semiconductor device, in which densely packaging and high performance of optical elements are realized by a simple manufacturing process. The semiconductor device includes: a first chip module, a second chip module and a bonding layer. The first chip module includes a plurality... Agent: Turocy & Watson, LLP

20100244055 - Semiconductor-based sub-mounts for optoelectronic devices with conductive paths to facilitate testing and binning: The disclosure facilitates testing and binning of multiple LED chip or other optoelectronic chip packages fabricated on a single semiconductor wafer. The testing can take place prior to dicing. For example, in one aspect, metallization on the front-side of a semiconductor wafer electrically connects together cathode pads (or anode pads)... Agent: Fish & Richardson P.C.

20100244061 - Led illumination device: An LED illumination device includes: a substrate; one or more red LED chips arranged on the substrate; a plurality of blue LED chips arranged on the substrate; and a plurality of third-color LED chips arranged on the substrate. Respective centers of the red LED chips are arranged on a circumference... Agent: Bacon & Thomas, PLLC

20100244062 - White light emitting element: This invention provides a white light emitting element having a prolonged lifetime that can emit white light having high color purity. The white light emitting element comprises: opposed electrodes 3, 4; a luminescent layer A comprising an organic material and/or inorganic nanoparticles that emit light by EL; a luminescent layer... Agent: Burr & Brown

20100244063 - Nitride-based semiconductor light-emitting device and method for fabricating the same: A nitride-based semiconductor light-emitting device according to the present invention has a nitride-based semiconductor multilayer structure 50. The nitride-based semiconductor multilayer structure 50 includes: an active layer 32 including an AlaInbGacN crystal layer (where a+b+c=1, a≧0, b≧0 and c≧0); an AldGaeN overflow suppressing layer 36 (where d+e=1, d>0, and e≧0);... Agent: Mark D. Saralino (pan) Renner, Otto, Boisselle & Sklar, LLP

20100244076 - Light emitting device comprising a green emitting sialon-based material: The invention relates to a light emitting device, especially a LED comprising a green emitting material of the composition Sr5−y−z−aMySi23−xAl3+xOx+2aN37−x−2a:Euz:Cez1. This material has been found to have a narrow emission in the green wavelight range together with a good producibility and stability.... Agent: Philips Intellectual Property & Standards

20100244078 - Light emitting device package: A light emitting device package including a light emitting device and a magnetic ring is provided. The magnetic ring surrounds the light emitting device for forming a magnetic source for applying a magnetic field to the light emitting device.... Agent: Jianq Chyun Intellectual Property Office

20100244080 - Light emitting diode package: A light emitting diode package including a substrate; a plurality of electrodes on the substrate; a light emitting diode on the substrate; at least one wire connecting the light emitting diode and at least a first electrode of the plurality of electrodes; a reflecting member formed around the light emitting... Agent: Birch Stewart Kolasch & Birch

20100244064 - Light source: A light source is described herein. An embodiment of the light source comprises a reflector cup having a cavity; a light emitter located in the cavity; a first encapsulant encompassing the light emitter; and a film located adjacent the first encapsulant, the film comprising phosphor.... Agent: Kathy Manke Avago Technologies Limited

20100244072 - Light-emitting devices and methods of fabricating the same: A light-emitting device includes: a substrate; a light-emitting element is mounted on a first surface of the substrate; at least one uneven heat dissipation pattern is formed on at least one surface of the substrate; and an electrode covers at least a portion of the at least one uneven heat... Agent: Harness, Dickey & Pierce, P.L.C

20100244068 - Method for applying a thin-film encapsulation layer assembly to an organic device, and an organic device provided with a thin-film encapsulation layer assembly preferably applied with such a method: A method for applying a thin-film encapsulation layer assembly to an organic device, which comprises a substrate which is provided with an active stack and is then provided with the thin-film encapsulation layer assembly for screening the active stack substantially from oxygen and moisture, wherein the thin-film encapsulation layer assembly... Agent: Leydig Voit & Mayer, Ltd

20100244071 - Method of manufacturing led lamp: A method of manufacturing a LED lamp that is formed by sealing a LED element mounted on a substrate with glass, includes a mounting process for mounting the LED element on the substrate, a sealing member preparation process for preparing a glass sealing member that includes a concave portion being... Agent: Mcginn Intellectual Property Law Group, PLLC

20100244069 - Novel oled display architecture: A device is provided. The device includes first, second and third subpixels. The first sub-pixel includes an emissive layer having a first emitting material but not a second emitting material. The second sub-pixel includes an emissive layer having the second emitting material but not the first emitting material. The third... Agent: Townsend And Townsend And Crew, LLP

20100244073 - Organic electroluminescent device and method for manufacturing the same: An object of the present invention is to obtain an organic EL device having excellent light resistance and a method for manufacturing the same. An organic EL device comprises: a first substrate as a supporting substrate; a first electrode provided on the first substrate; an organic layer that is provided... Agent: Sughrue Mion, PLLC

20100244070 - Organic light emitting display device and method for fabricating the same: A method of fabricating an organic light emitting display device includes forming a first electrode in both a luminescent region and a part of a non-luminescent region, forming a buffer layer in the non-luminescent region, forming an insulation pattern on the buffer layer in the non-luminescent region, forming an auxiliary... Agent: Morgan Lewis & Bockius LLP

20100244075 - Performance optically coated semiconductor devices and related methods of manufacture: The present application disclosed various embodiments of improved performance optically coated semiconductor devices and various methods for the manufacture thereof and includes depositing a first layer of a low density, low index of refraction material on a surface of a semiconductor device, depositing a multi-layer optical coating comprising alternating layers... Agent: Newport Corporation

20100244067 - Phosphor plates for leds from structured films: The invention relates to a phosphor element which is based on natural and/or synthetic flake-form substrates, such as mica, corundum, silica, glass, ZrO2 or TiO2, and at least one phosphor, to the production thereof, and to the use thereof as LED conversion phosphor for white LEDs or so-called colour-on-demand applications.... Agent: Millen, White, Zelano & Branigan, P.C.

20100244077 - Photoelectronic element and the manufacturing method thereof: A photoelectronic element includes a composite substrate including an electrically insulative substrate having a chamber; an intermediate layer; and an electrically conductive substrate; a bonding layer including an electrically conductive region and an electrically insulative region; a first current spreading layer; a first semiconductor stacked layer including a first semiconductor... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100244066 - Red light fluorescent material and manufacturing method thereof, and white light luminescent device: wherein, A represents Li, Na, K, Rb, Cs or Ag; B represents Mg, Ca, Sr or Ba; C represents Y, Gd or La; M represents Mo, W or combination of Mo and W (MoxW(1-x)). The red-light-emitting fluorescent material has high luminance and good color purity. In addition, since the composition... Agent: Jianq Chyun Intellectual Property Office

20100244065 - Semiconductor light emitting device grown on an etchable substrate: A III-nitride structure comprising a light emitting layer disposed between an n-type region and a p-type region is grown on a silicon substrate. The III-nitride structure is attached to a host, then a portion of the silicon substrate is etched away to reveal a top surface of the III-nitride structure.... Agent: Philips Intellectual Property & Standards

20100244079 - Semiconductor light emitting element and method for fabricating the same: Projections/depressions forming a two-dimensional periodic structure are formed in a surface of a semiconductor multilayer film opposing the principal surface thereof, while a metal electrode with a high reflectivity is formed on the other surface. By using the diffracting effect of the two-dimensional periodic structure, the efficiency of light extraction... Agent: Mcdermott Will & Emery LLP

20100244074 - Semiconductor light-emitting device and method of manufacturing the same: A semiconductor light-emitting device and a manufacturing method are provided, in which a metal film is deposited with positional differences between edges of an insulating film and the metal film, opposite a ridge waveguide top face, utilizing an overhanging-shaped resist pattern. An opening through the insulating film is extended in... Agent: Leydig Voit & Mayer, Ltd

20100244085 - Light emitting device: A light emitting device including a light emitting chip and a magnetic material is provided. The light emitting chip includes a first doped semiconductor layer, a second doped semiconductor layer, and a light emitting semiconductor layer disposed between the first doped semiconductor layer and the second doped semiconductor layer. The... Agent: Jianq Chyun Intellectual Property Office

20100244084 - Light emitting device, light emitting device package and lighting system including the same: A light emitting device (LED), an LED package, and a lighting system including the LED package are provided. The light emitting device (LED) may include a light emitting structure, a carrier injection layer, and an electrode layer. The light emitting structure may include a first conductive semiconductor layer, an active... Agent: Ked & Associates, LLP

20100244083 - Light-emitting devices: Light-emitting devices are provided, the light-emitting devices include a light-emitting structure layer having a first conductive layer, a light-emitting layer and a second conductive layer sequentially stacked on a first of a substrate, a plurality of seed layer patterns formed apart each other in the first conductive layer; and a... Agent: Harness, Dickey & Pierce, P.L.C

20100244081 - Lighting device using high power led with multiple lead: The lighting device mainly contains a first material, a second material, at a light generation chip, and multiple metallic leads. The metallic leads are sandwiched between the first and second materials, and arranged in a radial manner around the indentation or the raised stand. The center of the first material... Agent: Leong C Lei

20100244082 - Quasi-vertical light emitting diode: A quasi-vertical light emitting device is provided. According to one embodiment of the present invention, the quasi-vertical light emitting diode includes a sapphire substrate; a plurality of semiconductor layers grown on the sapphire substrate, the plurality of semiconductor layers including an n-GaN layer, an active layer, and a p-GaN layer;... Agent: Brooks Kushman P.C.

20100244086 - Method for manufacturing group iii nitride semiconductor, method for manufacturing group iii nitride semiconductor light-emitting device, group iii nitride semiconductor light-emitting device, and lamp: A method for manufacturing a Group III nitride semiconductor of the present invention, comprising a sputtering step for disposing a substrate and a target in a chamber and forming a Mg-doped Group III nitride semiconductor on the substrate by a reactive sputtering method, wherein the sputtering step includes respective substeps... Agent: Sughrue Mion, PLLC

20100244087 - Nitride semiconductor, nitride semiconductor crystal growth method, and nitride semiconductor light emitting element: During the growth of a nitride semiconductor crystal on a nonpolar face nitride substrate, such as an m-face, the gas that constitutes the main flow in the process of heating up to a relatively high temperature range, before growth of the nitride semiconductor layer, (the atmosphere to which the main... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244088 - Zener triggered esd protection: Electrostatic discharge (ESD) protection clamps (61, 95) for I/O terminals (22, 23) of integrated circuit (IC) cores (24) comprise a bipolar transistor (25) with an integrated Zener diode (30) coupled between the base (28) and collector (27) of the transistor (25). Prior art variations (311, 312, 313, 314) in clamp... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20100244089 - Lateral schottky diode: e

20100244090 - Tvs with low capacitance & forward voltage drop with depleted scr as steering diode: A transient-voltage suppressing (TVS) device disposed on a semiconductor substrate of a first conductivity type. The TVS includes a buried dopant region of a second conductivity type disposed and encompassed in an epitaxial layer of the first conductivity type wherein the buried dopant region extends laterally and has an extended... Agent: Bo-in Lin

20100244091 - Insulated gate bipolar transistor: In some embodiments, an insulated gate bipolar transistor includes a drift layer, insulation gates formed at a principle surface portion of the drift layer, base regions formed in a between-gate region, an emitter region formed in the base region so as to be adjacent to the insulation gate, an emitter... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100244092 - Power semiconductor apparatus: A power semiconductor apparatus which is provided with a first power semiconductor device using Si as a base substance and a second power semiconductor device using a semiconductor having an energy bandgap wider than the energy bandgap of Si as a base substance, and includes a first insulated metal substrate... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100244093 - Semiconductor module: A controlled-punch-through semiconductor device with a four-layer structure is disclosed which includes layers of different conductivity types, a collector on a collector side, and an emitter on an emitter side which lies opposite the collector side. The semiconductor device can be produced by a method performed in the following order:... Agent: Buchanan, Ingersoll & Rooney PC

20100244094 - Dual triggered silicon controlled rectifier: A dual triggered silicon controlled rectifier (DTSCR) comprises: a semiconductor substrate; a well region, a first N+ diffusion region, a first P+ diffusion region, a second N+ diffusion region, a second P+ diffusion region, a third P+ diffusion region, positioned in one side of the DTSCR and across the well... Agent: North America Intellectual Property Corporation

20100244095 - Dual triggered silicon controlled rectifier: A dual triggered silicon controlled rectifier (DTSCR) comprises: a semiconductor substrate; an N-well, a P-well, a first N+ diffusion region and a first P+ diffusion region, a second N+ diffusion region and a second P+ diffusion region, a third P+ diffusion region, positioned in one side of the DTSCR and... Agent: North America Intellectual Property Corporation

20100244096 - Semiconductor device: A device includes a substrate; a buffer layer; and a device formation layer, wherein the buffer layer is formed by sequentially stacking, a plurality of times, a first nitride-based semiconductor layer made of a material having a lattice constant lower than a lattice constant of a material of the substrate;... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244097 - Field effect transistor: Provided is a GaN based field effect transistor that is capable of normally-off operation, high breakdown voltage and large current. A body electrode 8 is provided on the bottom surface or the top surface of the field effect transistor. When the body electrode 8 is provided on the bottom surface,... Agent: Turocy & Watson, LLP

20100244098 - Semiconductor device: A semiconductor device includes: a semiconductor layer made of Fe-doped GaN; a first buffer layer that is provided on the semiconductor layer so as to contact an upper surface of the semiconductor layer and is made of AlN or AlxGa1-xN (0.4<x<1); and an operating layer that is provided on the... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100244099 - Double heterojunction bipolar transistor having graded base region: A semiconductor device comprises: a heterojunction, comprises a first region comprising a first III-V semiconductor; a second region adjacent to the first region and comprising a second III-V semiconductor material, wherein the second III-V semiconductor material comprises a material of graded concentration over a width of the second region; and... Agent: Agilent Technologies Inc.

20100244100 - Compound semiconductor substrate: The present invention provides a compound semiconductor substrate, including: a single-crystal silicon substrate having a crystal face with (111) orientation; a first buffer layer which is formed on the single-crystal silicon substrate and is constituted of an AlxGa1-xN single crystal (0<x≦1); a second buffer layer which is formed on the... Agent: Mcginn Intellectual Property Law Group, PLLC

20100244101 - Semiconductor device and method for manufacturing the same: There is provided a method for fabricating a semiconductor device capable of setting carbon concentration within crystal to a desirable value while improving electron mobility. The carbon concentration within a buffer layer is controlled by introducing material gas of hydrocarbon or organic compounds containing carbon such as propane as a... Agent: Turocy & Watson, LLP

20100244102 - Integrated circuit device and method for forming the same: In an integrated circuit device, element power supply lines connected to a circuit containing a plurality of cells, element ground lines connected thereto, a trunk power supply line connected to each of the element power supply lines, and a trunk ground line connected to each of the element ground lines... Agent: Mcdermott Will & Emery LLP

20100244103 - Structure and method of fabricating finfet: A CMOS FinFET device and a method of manufacturing the same using a three dimensional doping process is provided. The method of forming the CMOS FinFET includes forming fins on a first side and a second side of a structure and forming spacers of a dopant material having a first... Agent: Roberts Mlotkowski Safran & Cole, P.c Intellectual Property Department

20100244104 - Compound semiconductor device and manufacturing method thereof: A compound semiconductor device includes a compound semiconductor laminated structure; a source electrode, a drain electrode, and a gate electrode formed over the compound semiconductor laminated structure; a first protective film formed over the compound semiconductor laminated structure between the source electrode and the gate electrode and including silicon; and... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100244105 - Transistors having temperature stable schottky contact metals: A semiconductor structure having: a semiconductor comprising a indium gallium phosphide and molybdenum metal in Schottky contact with the semiconductor.... Agent: Raytheon Company C/o Daly, Crowley, Mofford & Durkee, LLP

20100244106 - Fabrication and structure of asymmetric field-effect transistors using l-shaped spacers: Fabrication of an asymmetric field-effect transistor (100) entails defining a gate electrode (262) above, and vertically separated by a gate dielectric layer (260) from, a channel-zone portion (244) of body material of a semiconductor body. Semiconductor dopant is introduced into the body material to define a more heavily doped pocket... Agent: Ronald J. Meetin, Attorney At Law

20100244107 - Reducing silicide resistance in silicon/germanium-containing drain/source regions of transistors: In sophisticated P-channel transistors, a high germanium concentration may be used in a silicon/germanium alloy, wherein an additional semiconductor cap layer may provide enhanced process conditions during the formation of a metal silicide. For example, a silicon layer may be formed on the silicon/germanium alloy, possibly including a further strain-inducing... Agent: Williams, Morgan & Amerson

20100244108 - Cmos image sensor on a semiconductor-on-insulator substrate and process for making same: Methods and apparatus for producing a CMOS image sensor result in: a glass or glass ceramic substrate having first and second spaced-apart surfaces; a semiconductor layer disposed on the first surface of the glass or glass ceramic substrate; and a plurality of pixel structures formed in the semiconductor layer, each... Agent: Corning Incorporated

20100244110 - Semiconductor device: A semiconductor device includes a first transistor, a second transistor, an insulation interlayer pattern and a capacitor. The first transistor is formed in a first region of a substrate. The first transistor has a pillar protruding upwardly from the substrate and an impurity region provided in an upper portion of... Agent: F. Chau & Associates, LLC

20100244111 - Semiconductor structure of a display device and method for fabricating the same: A semiconductor structure of a display device and the method for fabricating the same are provided. The semiconductor structure is formed on a substrate having a TFT region and a pixel capacitor region thereon. A TFT, including a gate electrode, a source electrode, a drain electrode, a channel layer, and... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100244109 - Trenched metal-oxide-semiconductor device and fabrication thereof: A fabrication method of a trenched metal-oxide-semiconductor device is provided. After the formation of the gate dielectric layer, a first poly-silicon layer is deposited along the profile of the gate trench. Then, impurities of first conductivity type are implanted to the first poly-silicon layer at the bottom of the gate... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100244112 - Integrated circuit structures with silicon germanium film incorporated as local interconnect and/or contact: Disclosed are integrated circuit structures each having a silicon germanium film incorporated as a local interconnect and/or an electrical contact. These integrated circuit structures provide improved local interconnects between devices and/or increased capacitance to devices without significantly increasing structure surface area or power requirements. Specifically, disclosed are integrated circuit structures... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20100244113 - Mos varactor and fabricating method of the same: The present invention provides a MOS varactor for use in circuits and elements of a millimeter-wave frequency band, which is capable of reducing series resistance and enhancing a Q-factor by using a plurality of island-like gates seated in a well region of a substrate and gate contacts directly over the... Agent: Rabin & Berdo, PC

20100244115 - Anti-fuse memory cell: An anti-fuse memory cell having a variable thickness gate oxide. The variable thickness gate oxide has a thick gate oxide portion and a thin gate oxide portion, where the thing gate oxide portion has at least one dimension less than a minimum feature size of a process technology. The thin... Agent: Borden Ladner Gervais LLP Anne Kinsman

20100244114 - Nonvolatile memory device and method for manufacturing same: A nonvolatile memory device includes: at least one first interconnection extending in a first direction; at least one second interconnection disposed above the first interconnection and extending in a second direction nonparallel to the first direction; a memory cell disposed between the first interconnection and the second interconnection at an... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244116 - Method of forming an eeprom device and structure therefor: In one embodiment, an EEPROM device is formed to include a metal layer having an opening therethrough. The opening overlies a portion of a floating gate of the EEPROM device.... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100244117 - Nrom memory cell, memory array, related devices and methods: An array of memory cells configured to store at least one bit per one F2 includes substantially vertical structures providing an electronic memory function spaced apart a distance equal to one half of a minimum pitch of the array. The structures providing the electronic memory function are configured to store... Agent: Leffert Jay & Polglaze, P.A.

20100244118 - Nonvolatile memory device and method of manufacturing the same: A nonvolatile memory device comprises floating gates formed over an active region of a semiconductor substrate, isolation layers formed within respective isolation regions of the semiconductor substrate, first nitridation patterns formed on sidewalls of the floating gates, a first insulating layer, a second nitride layer, a second insulating layer, and... Agent: Marshall, Gerstein & Borun LLP

20100244119 - Nonvolatile semiconductor memory device and method for manufacturing same: A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction; a selection gate electrode stacked on the stacked structural unit in the first direction; an insulating layer stacked on the selection gate... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244120 - Nonvolatile split gate memory cell having oxide growth: A split gate nonvolatile memory cell on a semiconductor layer is made by forming a gate dielectric over the semiconductor layer. A first layer of gate material is deposited over the gate dielectric. The first layer of gate material is etched to remove a portion of the first layer of... Agent: Freescale Semiconductor, Inc. Law Department

20100244121 - Stressed semiconductor device and method for making: A method of making a semiconductor device on a semiconductor layer includes forming a gate dielectric and a first layer of gate material over the gate dielectric. The first layer is etched to remove a portion of the first layer of gate material over a first portion of the semiconductor... Agent: Freescale Semiconductor, Inc. Law Department

20100244122 - Memory utilizing oxide nanolaminates: Structures, systems and methods for transistors utilizing oxide nanolaminates are provided. One transistor embodiment includes a first source/drain region, a second source/drain region, and a channel region therebetween. A gate is separated from the channel region by a gate insulator. The gate insulator includes oxide insulator nanolaminate layers with charge... Agent: Schwegman, Lundberg & Woessner/micron

20100244123 - Field-effect transistor with self-limited current: A field-effect transistor is integrated in a chip of semiconductor material of a first type of conductivity, which has a first main surface and a second main surface, opposite to each other. The transistor includes a plurality of body regions of a second type of conductivity, each one extending from... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20100244124 - Semiconductor devices having a vertical channel transistor: Embodiments according to the inventive concept can provide semiconductor devices including a substrate and a plurality of active pillars arranged in a matrix on the substrate. Each of the pillars includes a channel part that includes a channel dopant region disposed in a surface of the channel part. A gate... Agent: Myers Bigel Sibley & Sajovec

20100244127 - Bandgap engineered mos-gated power transistors: Devices, methods, and processes that improve immunity to transient voltages and reduce parasitic impedances. Immunity to unclamped inductive switching events is improved. For example, a trench-gated power MOSFET device having a SiGe source is provided, where the SiGe source reduces parasitic npn transistor gain by reducing hole current in the... Agent: Townsend And Townsend And Crew, LLP

20100244125 - Power semiconductor device structure for integrated circuit and method of fabrication thereof: A power semiconductor device comprises a conductive gate, provided in an upper part of a trench (11) formed in a semiconductor substrate (1), and a conductive field plate, extending in the trench, parallel to the conductive gate, to a depth greater that the conductive gate. The field plate is insulated... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100244126 - Structure and method for forming a salicide on the gate electrode of a trench-gate fet: A method for forming a trench-gate FET includes the following steps. A plurality of trenches is formed extending into a semiconductor region. A gate dielectric is formed extending along opposing sidewalls of each trench and over mesa surfaces of the semiconductor region between adjacent trenches. A gate electrode is formed... Agent: Townsend And Townsend And Crew, LLP

20100244128 - Configuration and fabrication of semiconductor structure using empty and filled wells: A semiconductor structure, which serves as the core of a semiconductor fabrication platform, has a combination of empty-well regions and filled-well regions variously used by electronic elements, particularly insulated-gate field-effect transistors (“IGFETs”), to achieve desired electronic characteristics. A relatively small amount of semiconductor well dopant is near the top of... Agent: Ronald J. Meetin, Attorney At Law

20100244129 - Semiconductor device and method of manufacturing semiconductor device: Second-conductivity-type high dose impurity layers are formed in a device forming region, and function as the source and drain; a second-conductivity-type low dose impurity layer is provided around each of the second-conductivity-type high dose impurity layers so as to expand each second-conductivity-type high dose impurity layer in the depth-wise direction... Agent: Mcginn Intellectual Property Law Group, PLLC

20100244131 - Structure and fabrication of asymmetric field-effect transistor having asymmetric channel zone and differently configured source/drain extensions: An asymmetric insulated-gate field-effect transistor (100 or 102) has a source (240 or 280) and a drain (242 or 282) laterally separated by a channel zone (244 or 284) of body material (180 or 182) of a semiconductor body. A gate electrode (262 or 302) overlies a gate dielectric layer... Agent: Ronald J. Meetin, Attorney At Law

20100244130 - Structure and fabrication of field-effect transistor using empty well in combination with source/drain extensions or/and halo pocket: Insulated-gate field-effect transistors (“IGFETs”), both symmetric and asymmetric, suitable for a semiconductor fabrication platform that provides IGFETs for analog and digital applications, including mixed-signal applications, utilize empty-well regions in achieving high performance. A relatively small amount of semiconductor well dopant is near the top of each empty well. Each IGFET... Agent: Ronald J. Meetin, Attorney At Law

20100244132 - Methods for normalizing strain in semiconductor devices and strain normalized semiconductor devices: A method of normalizing strain in semiconductor devices and normalized strain semiconductor devices. The method includes: forming first and second field effect transistors of an integrated circuit; forming a stress layer over the first and second field effect transistors, the stress layer inducing strain in channel regions of the first... Agent: Schmeiser, Olsen & Watts

20100244133 - Printed dopant layers: A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20100244134 - Semiconductor device and manufacturing method thereof: A semiconductor device includes: an insulating layer; a semiconductor layer formed on the insulating layer; a first partially depleted transistor formed in the semiconductor layer; and a first diode formed in the semiconductor layer, wherein the first transistor has a first gate electrode formed above the semiconductor layer via an... Agent: Harness, Dickey & Pierce, P.L.C

20100244135 - Semiconductor device: In a semiconductor device of a silicon on insulator (SOI) structure having uniform transistor properties, a first distance between a gate electrode forming position of an N type transistor and an end of a P type semiconductor region is greater than a second distance between a gate electrode forming position... Agent: Rabin & Berdo, PC

20100244136 - Semiconductor device, single-crystal semiconductor thin film-including substrate, and production methods thereof:

20100244137 - Semiconductor device and a method of manufacturing the same: A semiconductor device which, in spite of the existence of a dummy active region, eliminates the need for a larger chip area and improves the surface flatness of the semiconductor substrate. In the process of manufacturing it, a thick gate insulating film for a high voltage MISFET is formed over... Agent: Miles & Stockbridge PC

20100244138 - Semiconductor varactor with reduced parasitic resistance: A semiconductor varactor with reduced parasitic resistance is disclosed. A contact isolation structure (32) is formed in a well region (20). The gate contact structures (70) are formed above the contact isolation structure (32) reducing the parasitic resistance. In addition, contact structures are formed on the gate layer (50) over... Agent: Texas Instruments Incorporated

20100244139 - Strained-silicon cmos device and method: The present invention provides a semiconductor device and a method of forming thereof, in which a uniaxial strain is produced in the device channel of the semiconductor device. The uniaxial strain may be in tension or in compression and is in a direction parallel to the device channel. The uniaxial... Agent: Scully, Scott, Murphy & Presser, P.C.

20100244142 - Semiconductor device: A semiconductor device in a continuous diffusion region formed on a semiconductor substrate and having either a P-type or N-type polarity includes: a first transistor formed within the continuous diffusion region; a second transistor formed within the continuous diffusion region and in an area that is different from an area... Agent: Staas & Halsey LLP

20100244140 - Semiconductor device and production method therefor: It is an object to allow an inverter to be made up using a single island-shaped semiconductor, so as to provide a semiconductor device comprising a highly-integrated SGT-based CMOS inverter circuit. The object is achieved by a semiconductor device which comprises an island-shaped semiconductor layer, a first gate dielectric film... Agent: Brinks Hofer Gilson & Lione

20100244141 - Threshold adjustment of transistors including high-k metal gate electrode structures comprising an intermediate etch stop layer: During the formation of sophisticated gate electrode structures, a replacement gate approach may be applied in which plasma assisted etch processes may be avoided. To this end, one of the gate electrode structures may receive an intermediate etch stop liner, which may allow the replacement of the placeholder material and... Agent: Williams, Morgan & Amerson

20100244143 - Configuration and fabrication of semiconductor structure having bipolar junction transistor in which non-monocrystalline semiconductor spacing portion controls base-link length: A semiconductor structure contains a bipolar transistor (101) and a spacing structure (265-1 or 265-2). The transistor has an emitter (241), a base (243), and a collector (245). The base is formed with an intrinsic base portion (243I), a base link portion (243L), and a base contact portion (245C). The... Agent: Ronald J. Meetin National Semiconductor Corp.

20100244144 - Electrical fuse and related applications: In various embodiments, the fuse is formed from silicide and on top of a fin of a fin structure. Because the fuse is formed on top of a fin, its width takes the width of the fin, which is very thin. Depending on implementations, the fuse is also formed using... Agent: Lowe Hauptman Ham & Berner, LLP

20100244145 - Semiconductor memory device using hot electron injection: A semiconductor memory device has a low-resistivity semiconductor substrate on which a higher-resistivity semiconductor layer of the same conductivity type is formed. Memory cell transistors are formed in the semiconductor layer. A diffusion region, also of the same conductivity type, is formed below the memory cell transistors. The resistivity of... Agent: Rabin & Berdo, PC

20100244146 - Semiconductor device and method of manufacturing the same: Provided are a semiconductor device capable of reducing a difference in wiring resistance between paths from a gate pad to a gate electrode and capable of applying a gate voltage to the gate electrode more uniformly, and a method of manufacturing the semiconductor device. The semiconductor device according to an... Agent: Young & Thompson

20100244152 - Configuration and fabrication of semiconductor structure having extended-drain field-effect transistor: An extended-drain insulated-gate field-effect transistor (104 or 106) contains first and second source/drain zones 324 and 184B or 364 and 186B) laterally separated by a channel (322 or 362) zone constituted by part of a first well region (184A or 186A). A gate dielectric layer (344 or 384) overlies the... Agent: Ronald J. Meetin, Attorney At Law

20100244150 - Configuration and fabrication of semiconductor structure in which source and drain extensions of field-effect transistor are defined with different dopants: An insulated-gate field-effect transistor (100) provided along an upper surface of a semiconductor body contains a pair of source/drain zones (240 and 242) laterally separated by a channel zone (244). A gate electrode (262) overlies a gate dielectric layer (260) above the channel zone. Each source/drain zone includes a main... Agent: Ronald J. Meetin, Attorney At Law

20100244153 - Method of fabricating spacers in a strained semiconductor device: The present disclosure provides a method for fabricating a semiconductor device that includes forming a gate stack over a silicon substrate, forming dummy spacers on sidewalls of the gate stack, isotropically etching the silicon substrate to form recess regions on either side of the gate stack, forming a semiconductor material... Agent: Haynes And Boone, LLPIPSection

20100244147 - Semiconductor device and method of manufacturing the same: An asymmetric insulated-gate field effect transistor (100U or 102U) provided along an upper surface of a semiconductor body contains first and second source/drain zones (240 and 242 or 280 and 282) laterally separated by a channel zone (244 or 284) of the transistor's body material. A gate electrode (262 or... Agent: Ronald J. Meetin, Attorney At Law

20100244154 - Semiconductor device including misfet: A semiconductor device includes a semiconductor substrate, a gate insulating film, a gate electrode, a source/drain layer, and a germanide layer. The gate insulating film is formed on the semiconductor substrate. The gate electrode is formed on the gate insulating film. The source/drain layer is formed on both sides of... Agent: Foley And Lardner LLP Suite 500

20100244148 - Structure and fabrication of field-effect transistor having nitrided gate dielectric layer with tailored vertical nitrogen concentration profile: A gate dielectric layer (500, 566, or 700) of an insulated-gate field-effect transistor (110, 114, or 122) contains nitrogen having a vertical concentration profile specially tailored to prevent boron in the overlying gate electrode (502, 568, or 702) from significantly penetrating through the gate dielectric layer into the underlying channel... Agent: Ronald J. Meetin National Semiconductor Corp.

20100244151 - Structure and fabrication of field-effect transistor having source/drain extension defined by multiple local concentration maxima: An insulated-gate field-effect transistor (100W) has a source (980) and a drain (242) laterally separated by a channel zone (244) of body material (180) of a semiconductor body. A gate electrode (262) overlies a gate dielectric layer (260) above the channel zone. A more heavily doped pocket portion (250) of... Agent: Ronald J. Meetin National Semiconductor Corp.

20100244149 - Structure and fabrication of like-polarity field-effect transistors having different configurations of source/drain extensions, halo pockets, and gate dielectric thicknesses: A group of high-performance like-polarity insulated-gate field-effect transistors (100, 108, 112, 116, 120, and 124 or 102, 110, 114, 118, 122, and 126) have selectably different configurations of lateral source/drain extensions, halo pockets, and gate dielectric thicknesses suitable for a semiconductor fabrication platform that provides a wide variety of transistors... Agent: Ronald J. Meetin, Attorney At Law

20100244155 - Maintaining integrity of a high-k gate stack by an offset spacer used to determine an offset of a strain-inducing semiconductor alloy: In sophisticated transistor elements including a high-k gate metal stack, the integrity of the sensitive gate materials may be ensured by a spacer element that may be concurrently used as an offset spacer for defining a lateral offset of a strain-inducing semiconductor alloy. The cap material of the sophisticated gate... Agent: Williams, Morgan & Amerson

20100244156 - Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods: Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods are provided. In an embodiment, a method for fabricating a semiconductor device comprises forming a gate stack comprising a first gate stack-forming layer overlying a semiconductor substrate and forming first sidewall spacers about... Agent: Ingrassia Fisher & Lorenz, P.C. (gf)

20100244157 - Semiconductor device: A semiconductor device includes a MISFET comprising: a semiconductor layer including a semiconductor region formed therein; a gate insulating film formed above the semiconductor region, and including a metal oxide layer containing a metal and oxygen, the metal contained in the metal oxide layer being at least one selected from... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244158 - Semiconductor structures resulting from selective oxidation: Methods for selectively oxidizing a semiconductor structure include generating a gas cluster ion beam comprising an oxidizing source gas, directing the gas cluster ion beam to a region of a substrate adjacent a conductive line and exposing the region to the gas cluster ion beam including an oxidizing matter. Utilizing... Agent: Trask Britt, P.C./ Micron Technology

20100244159 - Eutectic flow containment in a semiconductor fabrication process: Eutectic Flow Containment in a Semiconductor Fabrication Process A disclosed semiconductor fabrication process includes forming a first bonding structure on a first surface of a cap wafer, forming a second bonding structure on a first surface of a device wafer, and forming a device structure on the device wafer. One... Agent: Fsi C/o Jackson Walker, L.L.P.

20100244160 - Mems sensor, mems sensor manufacturing method, and electronic device: A MEMS sensor formed by processing a multi-layer wiring structure, includes: a movable weight portion coupled to a fixed frame portion with an elastic deformable portion and having a hollow portion formed at the periphery; a capacitance electrode portion including a fixed electrode portion fixed to the fixed frame portion... Agent: Harness, Dickey & Pierce, P.L.C

20100244161 - Wafer level packaging using flip chip mounting: A semiconductor packaged device, and method of packaging that incorporates the formation of cavities about electronic devices during the packaging process. In one example, the device package includes a first substrate having a first recess formed therein, a second substrate having a second recess formed therein, and an electronic device... Agent: Lando & Anastasi, LLP S2059

20100244162 - Mems device with reduced stress in the membrane and manufacturing method: A MEMS device comprises a membrane layer and a back-plate layer formed over the membrane layer. The membrane layer comprises an outer portion and an inner portion raised relative to the outer portion and a sidewall for connecting the inner portion and the outer portion. The sidewall is non-orthogonal to... Agent: Dickstein Shapiro LLP

20100244163 - Magnetoresistive element and magnetic memory: A magnetoresistive element includes a stabilization layer, a nonmagnetic layer, a spin-polarization layer provided between the stabilization layer and the nonmagnetic layer, the spin-polarization layer having magnetic anisotropy in a perpendicular direction, and a magnetic layer provided on a side of the nonmagnetic layer opposite to a side on which... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244164 - Using pole pieces to guide magnetic flux through a mems device and method of making: Two opposing substrate layers each having one or more recesses filled with magnetic material guide the flow of flux through a coil in a MEMS device layer to provide for closed-loop operation. Flux flows from one pole piece through the coil to a second pole piece. A method of making... Agent: Honeywell/blg Patent Services

20100244165 - Method and apparatus providing combined spacer and optical lens element: A method and apparatus used for forming a lens and spacer combination, and imager module employing the spacer and lens combination. The apparatus includes a mold having a base, spacer section, and mold feature. The method includes using the mold with a blank to create a spacer that includes an... Agent: Dickstein Shapiro LLP

20100244166 - Multilayer wiring substrate, stack structure sensor package, and method of manufacturing stack structure sensor package: A multilayer wiring substrate has a through hole that passes from a first surface through to a second surface. The multilayer wiring substrate includes an electrical connection terminal formed in at least one of an inner edge portion which is a periphery of the through hole, an outer edge portion... Agent: Rader Fishman & Grauer PLLC

20100244170 - Photo detector and optically interconnected lsi: A photo detector having an electrically conductive thin film and a light-receiving unit. A coupling periodic structure is provided on a surface of the film and converts incidence light to surface plasmon. The coupling periodic structure has an opening that penetrates the obverse and reverse surfaces of the thin film.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244168 - Solid-state imaging device: A solid-state imaging device includes: a substrate including a plurality of light receiving sections; and a color filter including a guided-mode resonant grating provided immediately above each of the plurality of light receiving sections, at least one of an upper surface and a lower surface of the guided-mode resonant grating... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244167 - Solid-state imaging device and method for manufacturing same: A solid-state imaging device includes: a substrate including a plurality of light receiving sections; an optical waveguide provided above each of the plurality of light receiving sections and surrounded by a cladding layer; a color filter provided above each of the optical waveguides; and a lens provided above the color... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244169 - Solid-state imaging device, fabrication method thereof, imaging apparatus, and fabrication method of anti-reflection structure: A fabrication method of an anti-reflection structure includes the steps of: forming a resin film having micro-particles dispersed therein on a surface of a substrate; forming a protrusion dummy pattern on the resin film by etching the resin film using the micro-particles in the resin film as a mask while... Agent: Sonnenschein Nath & Rosenthal LLP

20100244171 - Semiconductor module and camera module mounting said semiconductor module: A semiconductor module includes a lower wiring substrate having a semiconductor device mounted and an upper wiring substrate having an opening in a position corresponding to the semiconductor device and having a packaging-component mountable region around the opening. The lower wiring substrate and the upper wiring substrate are electrically connected... Agent: Mcdermott Will & Emery LLP

20100244173 - Image sensor and method of fabricating same: Provided is a method of fabricating an image sensor device. The method includes providing a device substrate having a front side and a back side. The method includes forming first and second radiation-sensing regions in the device substrate, the first and second radiation-sensing regions being separated by an isolation structure.... Agent: Haynes And Boone, LLPIPSection

20100244172 - Semiconductor devices and methods for forming patterned radiation blocking on a semiconductor device: Several embodiments for semiconductor devices and methods for forming semiconductor devices are disclosed herein. One embodiment is directed to a method for manufacturing a microelectronic imager having a die including an image sensor, an integrated circuit electrically coupled to the image sensor, and electrical connectors electrically coupled to the integrated... Agent: Perkins Coie LLP Patent-sea

20100244174 - Highly-depleted laser doped semiconductor volume: A device with increased photo-sensitivity using laser treated semiconductor as detection material is disclosed. In some embodiments, the laser treated semiconductor may be placed between and an n-type and a p-type contact or two Schottky metals. The field within the p-n junction or the Schottky metal junction may aid in... Agent: Pepper Hamilton LLP

20100244175 - Image sensor and method of fabricating the same: The image sensor includes a substrate; a wiring structure formed on a front side of the substrate and including a plurality of wiring layers and a plurality of insulating films; a first well formed within the substrate and having a first conductivity type; and a first metal wiring layer directly... Agent: Harness, Dickey & Pierce, P.L.C

20100244176 - Integrated circuit having wiring structure, solid image pickup element having the wiring structure, and imaging device having the solid image pickup element: e

20100244177 - Photodiode cell structure of photodiode integrated circuit for optical pickup and method of manufacturing the same: Disclosed herein is a photodiode cell, including: a first-type substrate; a second-type epitaxial layer disposed on the first-type substrate; heavily-doped second-type layers, each having a small depth, formed on the second-type epitaxial layer; and heavily-doped first-type layers, each having a narrow and shallow section, disposed on the second-type epitaxial layer... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100244178 - Field effect transistor gate process and structure: A Schottky gate (27′, 27″) of a metal-semiconductor FET (20′, 20″) is formed on a semiconductor comprising substrate (21) by, etching a gate recess (36) so as to expose a slightly depressed surface (362) of the substrate (21), the etching step also producing surface undercut cavities (363) extending laterally under... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20100244179 - Structure and method for latchup improvement using through wafer via latchup guard ring: A method and structure for preventing latchup. The structure includes a latchup sensitive structure and a through wafer via structure bounding the latch-up sensitive structure to prevent parasitic carriers from being injected into the latch-up sensitive structure.... Agent: Roberts Mlotkowski Safran & Cole, P.C. Intellectual Property Department

20100244181 - Filling gaps in integrated circuit fabrication: A gap may be filled using deposition and sputtering by forming a liner and a gap fill material in the same deposition chamber in some embodiments. The liner may be made harder than the gap fill so that the liner protects the underlying substrate when sputtering is used during the... Agent: Trop, Pruner & Hu, P.C.

20100244183 - Integrated semiconductor device and method of manufacturing the same: An integrated semiconductor device and method of manufacturing the same includes leaving one part of a semiconductor layer so that an inclined surface is formed on a trench when forming the trench on a SOI wafer. A thick silicon oxide film (second insulation film) is formed along this incline surface.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244180 - Method for fabricating device isolation structure: A method of a fabricating a semiconductor device includes providing a substrate having a first region and a second region. A pad layer is formed overlying the substrate in both the first region and the second region. A mask layer is then formed overlying the pad layer. Thereafter, the mask... Agent: J C Patents

20100244184 - Method of forming an electrical contact between a support wafer and the surface of a top silicon layer of a silicon-on-insulator wafer and an electrical device including such an electrical contact: Method of forming an electrical contact between a support wafer and a surface of a top silicon layer of a silicon-on-insulator wafer. The method comprises etching a cavity into the top silicon layer and the insulator layer. A selective epitaxial step is performed for growing an epitaxial layer of silicon... Agent: Texas Instruments Incorporated

20100244182 - Method of manufacturing laminated wafer by high temperature laminating method: To provide a method of manufacturing a laminated wafer by which a strong coupling is achieved between wafers made of different materials having a large difference in thermal expansion coefficient without lowering a maximum heat treatment temperature as well as in which cracks or chips of the wafer does not... Agent: Myers Bigel Sibley & Sajovec

20100244185 - Semiconductor device, single-crystal semiconductor thin film-including substrate, and production methods thereof:

20100244186 - Nonvolatile semiconductor memory device and method for manufacturing same: A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of stacked component units stacked in a first direction, each of the stacked component units including a first conducting film made of a semiconductor of a first conductivity type provided perpendicular to the first direction and a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244187 - Esd network circuit with a through wafer via structure and a method of manufacture: The present invention generally relates to a circuit structure and a method of manufacturing a circuit, and more specifically to an electrostatic discharge (ESD) circuit with a through wafer via structure and a method of manufacture. An ESD structure includes an ESD active device and at least one through wafer... Agent: Roberts Mlotkowski Safran & Cole, P.C. Intellectual Property Department

20100244188 - Semiconductor device and manufacturing method thereof: Disclosed is a semiconductor device comprising: a semiconductor substrate in which an integrated circuit is formed; a first resin film provided over the semiconductor substrate; a second resin film provided over an upper surface of the first resin film except at least a peripheral portion of the first resin film;... Agent: Frishauf, Holtz, Goodman & Chick, PC

20100244192 - Dielectric film and semiconductor device using dielectric film: The present invention provides a dielectric film having a high permittivity and a high heat resistance. An embodiment of the present invention is a dielectric film (103) including a composite oxynitride containing an element A made of Hf, an element B made of Al or Si, and N and O,... Agent: Fitzpatrick Cella Harper & Scinto

20100244189 - Integration substrate with a ultra-high-density capacitor and a through-substrate via: An integration substrate for a system in package comprises a through-substrate via and a trench capacitor wherein with a trench filling that includes at least four electrically conductive capacitor-electrode layers in an alternating arrangement with dielectric layers. —The capacitor-electrode layers are alternatingly connected to a respective one of two capacitor... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20100244191 - Semiconductor device: A semiconductor device includes an insulation interlayer and an etch stop layer sequentially stacked on a substrate wherein a lower structure including a first contact pad is formed. A second contact pad penetrates the insulation interlayer and the etch stop layer and is connected to the first contact pad. The... Agent: F. Chau & Associates, LLC

20100244190 - Semiconductor device and manufacturing method: A semiconductor device, include a capacitor of a MIM (Metal-Insulator-Metal) structure; and at least one pair of shield parts which sandwich said MIM structure capacitor sandwiched by an insulating film.... Agent: Mr. Jackson Chen

20100244193 - System-in-package having integrated passive devices and method therefor: A semiconductor device has a substrate, first passivation layer formed over the substrate, and integrated passive device formed over the substrate. The integrated passive device can include an inductor, capacitor, and resistor. A second passivation layer is formed over the integrated passive device. System components are mounted to the second... Agent: Robert D. Atkins

20100244194 - Semiconductor device and manufacturing method thereof: A semiconductor device comprising: a semiconductor substrate having a first conductive type layer; a first diffusion region which has the first conductive type and is formed in the first conductive type layer; a second diffusion region which has a second conductive type and an area larger than an area of... Agent: Mcdermott Will & Emery LLP

20100244197 - Epitaxial methods and structures for reducing surface dislocation density in semiconductor materials: The invention provides methods and structures for reducing surface dislocations of a semiconductor layer, and can be employed during the epitaxial growth of semiconductor structures and layers comprising III-nitride materials. Embodiments involve the formation of a plurality of dislocation pit plugs to prevent propagation of dislocations from an underlying layer... Agent: Traskbritt, P.C.

20100244196 - Group iii nitride semiconductor composite substrate, group iii nitride semiconductor substrate, and group iii nitride semiconductor composite substrate manufacturing method: A group III nitride semiconductor composite substrate includes a substrate composed of a conductive material having a melting point of not less than 100° C., a group III nitride layer provided on the substrate, and a group III nitride single crystal film provided on the group III nitride layer. The... Agent: Mcginn Intellectual Property Law Group, PLLC

20100244195 - Host substrate for nitride based light emitting devices: A host substrate and method of making a host substrate for nitride based thin-film semiconductor devices are provided. According to one embodiment, the method includes the steps of providing a silicon layer; etching a pattern of holes in the silicon layer; plating the silicon layer with copper to fill the... Agent: Brooks Kushman P.C.

20100244198 - Cmos sige channel pfet and si channel nfet devices with minimal sti recess: Silicon germanium (SiGe) is epitaxially grown on a silicon channel above nFET and pFET regions of a substrate. SiGe is removed above the nFET regions. A device includes a silicon channel above the nFET regions and a SiGe channel above the pFET regions.... Agent: International Business Machines Corporation Dept. 18g

20100244199 - Semiconductor device and method for manufacturing semiconductor device: A semiconductor device includes a first moisture-resistant ring disposed in a peripheral region surrounding a circuit region on a semiconductor substrate in such a way as to surround the circuit region and a second moisture-resistant ring disposed in the peripheral region in such a way as to surround the first... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100244200 - Integrated circuit connecting structure having flexible layout: A wafer has a cutting part filled with a connecting medium. After the wafer is cut into chips along the cutting part, two contacts on two surfaces of the chip can be connected through corresponding leading wires and the connecting medium. Thus, the chip can have a flexible layout.... Agent: Jackson Intellectual Property Group PLLC

20100244201 - Semiconductor device: A semiconductor device includes a first semiconductor substrate including a first integrated circuit, a second semiconductor substrate mounted over the first semiconductor substrate, the second semiconductor substrate including a second integrated circuit, a post made of an inorganic substance and formed over the first semiconductor substrate, an adhesive layer made... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100244202 - Semiconductor device and fabrication method of the semiconductor device: A semiconductor device and its manufacturing method, the semiconductor device comprising: a semi-insulating substrate 11 in which an electrode (12) is formed on a surface (11a) of one side and in which an aperture (11c) passed through from the surface 11a of one side to a surface (11b) of another... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244203 - Semiconductor structure having a protective layer: A semiconductor structure includes a substrate having a first nitride-based semiconductor layer. A pseudomorphic protective layer is formed on the first nitride-based semiconductor layer and a second nitride-based semiconductor layer is formed on the pseudomorphic protective layer. The pseudomorphic protective layer has a thickness that is less than a critical... Agent: Traskbritt, P.C.

20100244204 - Film forming method, film forming apparatus, storage medium and semiconductor device: Provided is a technology capable of obtaining a fluorine-containing carbon film having a good leakage property, coefficient of thermal expansion and mechanical strength. The fluorine-containing carbon film is formed by using active species obtained by activating a C5F8 gas and a hydrogen gas. Fluorine in the fluorine-containing carbon film comes... Agent: Pearne & Gordon LLP

20100244205 - Glass frits: Glass frits, conductive inks and articles having conductive inks applied thereto are described. According to one or more embodiments, glass frits with no intentionally added lead comprise TeO2 and one or more of Bi2O3, SiO2 and combinations thereof. One embodiment of the glass frit includes B2O3, and can further include... Agent: Basf Catalysts LLC

20100244206 - Method and structure for threshold voltage control and drive current improvement for high-k metal gate transistors: A method of forming a device includes providing a substrate, forming an interfacial layer on the substrate, depositing a high-k dielectric layer on the interfacial layer, depositing an oxygen scavenging layer on the high-k dielectric layer and performing an anneal. A high-k metal gate transistor includes a substrate, an interfacial... Agent: International Business Machines Corporation Dept. 18g

20100244207 - Multiple thickness and/or composition high-k gate dielectrics and methods of making thereof: Disclosed are methods of making an integrated circuit with multiple thickness and/or multiple composition high-K gate dielectric layers and integrated circuits containing multiple thickness and/or multiple composition high-K gate dielectrics. The methods involve forming a layer of high-K atoms over a conventional gate dielectric and heating the layer of high-K... Agent: Turocy & Watson, LLP

20100244208 - Semiconductor device and method of forming a shielding layer between stacked semiconductor die: A semiconductor device has a first semiconductor die with a shielding layer formed over its back surface. The first semiconductor die is mounted to a carrier. A first insulating layer is formed over the shielding layer. A second semiconductor die is mounted over the first semiconductor die separated by the... Agent: Robert D. Atkins

20100244209 - Circuit device and method for manufacturing the same: Provided are: a circuit device demonstrating an improved connection reliability while being mounted; and a method for manufacturing the same. The circuit device of the present invention includes: an island; leads arranged around the island, each lead having a lower surface and a side surface exposed to the outside; and... Agent: Morrison & Foerster LLP

20100244210 - Lead frame and method for manufacturing circuit device using the same: Provided are: a lead frame enabling efficient manufacturing of multiple circuit devices; and a method for manufacturing a circuit device using the same. In the lead frame of the present invention, units are arranged and frame-shaped first and second supporters are provided around the units to mechanically support the units.... Agent: Morrison & Foerster LLP

20100244211 - Multichip discrete package: A multichip discrete package with a leadframe having a plurality of leads and a first die attach pad (DAP), the first DAP having side portions that extend above the first DAP, a first discrete die bonded to the first DAP, at least a first wirebond which forms an electrical connections... Agent: Hiscock & Barclay, LLP

20100244212 - Integrated circuit packaging system with post type interconnector and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a bottom package including a first device over a first substrate and a second substrate over the first device; forming an encapsulation material over the bottom package with an opening over the second substrate; and forming a conductive... Agent: Law Offices Of Mikio Ishimaru

20100244213 - Semiconductor device and manufacturing method therefor: A semiconductor device includes a lead frame 1 having a first lead 6, a second lead 7 and a third lead 8. A power transistor 2 is placed on the first lead 6, and the power transistor 2 is connected to the first lead 6. The power transistor 2 has... Agent: Birch Stewart Kolasch & Birch

20100244214 - Semiconductor device and method of manufacturing same: The semiconductor device has a die pad, a heat dissipating plate in the form of a frame arranged between the die pad and a plurality of leads so as to surround the die pad, a plurality of members that connect the die pad and the inner edge of the heat... Agent: Miles & Stockbridge PC

20100244215 - Wireless ic device: A wireless IC device includes a radiating plate, a wireless IC chip, and a feeder circuit board, on which the wireless IC chip is mounted. The feeder circuit board includes a resonant circuit with an inductance element, and the resonant circuit is electromagnetically coupled with the radiating plate. The wireless... Agent: Murata Manufacturing Company, Ltd. C/o Keating & Bennett, LLP

20100244218 - Integrated circuit packaging system with multi-stacked flip chips and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a base substrate; depositing a through-conductor on the base substrate; depositing a semiconducting layer on the base substrate and around the through-conductor; forming a metal trace connected to the through-conductor; depositing a dielectric surrounding the metal trace; and... Agent: Law Offices Of Mikio Ishimaru

20100244219 - Integrated circuit packaging system with package stacking and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: forming an encapsulation surrounding an integrated circuit having an inactive side and an active side exposed; forming a hole through the encapsulation with the hole not exposing the integrated circuit; forming a through conductor in the hole; and mounting... Agent: Law Offices Of Mikio Ishimaru

20100244217 - Integrated circuit packaging system with stacked configuration and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a first stack layer including a first device over a first substrate, the first device including a through silicon via; configuring a second stack layer over the first stack layer, the second stack layer including an analog device;... Agent: Law Offices Of Mikio Ishimaru

20100244220 - Layout structure and method of die: A layout structure and layout method are provided. The layout structure includes a first conductive via, a second conductive via, a die and eight pads. The first conductive via and the second conductive via pass through the die. The first conductive via has a first pad and a second pad,... Agent: Jianq Chyun Intellectual Property Office

20100244216 - Semiconductor device and method of forming no-flow underfill material around vertical interconnect structure: A semiconductor device is made by forming a conductive layer over a first sacrificial carrier. A solder bump is formed over the conductive layer. A no-flow underfill material is deposited over the first carrier, conductive layer, and solder bump. A semiconductor die or component is compressed into the no-flow underfill... Agent: Robert D. Atkins

20100244221 - Integrated circuit packaging system having dual sided connection and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: mounting an integrated circuit, having a device through via and a device interconnect, over a substrate with the device through via traversing the integrated circuit and the device interconnect attached to the device through via; attaching a conductive support... Agent: Law Offices Of Mikio Ishimaru

20100244222 - Integrated circuit packaging system with an integral-interposer-structure and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a substrate having a substrate-interconnect; mounting an internal-interconnect to the substrate-interconnect; mounting a structure having an integral-interposer-structure over the substrate with the integral-interposer-structure connected to the internal-interconnect; mounting an integrated circuit to the substrate and under the integral-interposer-structure;... Agent: Law Offices Of Mikio Ishimaru

20100244223 - Integrated circuit packaging system with an integral-interposer-structure and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a substrate having a shielding channel through a substrate first side and a substrate second side; mounting a first shielding interconnect to the shielding channel; mounting an integrated circuit over the substrate and adjacent to the first shielding... Agent: Law Offices Of Mikio Ishimaru

20100244224 - Semiconductor chip mounting body, method of manufacturing semiconductor chip mounting body and electronic device: According to one embodiment, a semiconductor chip mounting body, with an enhanced shock-resistance at portions of the bonding member corresponding to the corners of a semiconductor chip, is provided. The semiconductor chip mounting body includes a circuit board having a circuit pattern formed on a mounting surface thereof, a semiconductor... Agent: Knobbe Martens Olson & Bear LLP

20100244231 - Semiconductor device: A semiconductor device comprises: a semiconductor element; a support substrate arranged on a surface of the semiconductor element opposite to a surface thereof provided with a pad, the support substrate being wider in area than the semiconductor element; a burying insulating layer on the support substrate for burying the semiconductor... Agent: Mr. Jackson Chen

20100244228 - Semiconductor device and method of manufacturing the same: The extent of a bow of a semiconductor device is suppressed in a case where the fillet width of an underfill resin is asymmetrical. The center position 12 of a chip 1 is caused to deviate from the center position 13 of a wiring substrate 2 in a direction (the... Agent: Mcginn Intellectual Property Law Group, PLLC

20100244230 - Semiconductor device, electronic device, and manufacturing method of semiconductor device: A semiconductor device includes: a wiring board which includes a first face and a second face and in which a conductor pattern and a through part are provided; an electronic component which includes an electrode pad forming face where an electrode pad is formed and which is housed in the... Agent: Drinker Biddle & Reath (dc)

20100244229 - Semiconductor package fabrication process and semiconductor package: A substrate is provided with electrical connection pads on a front face and on a rear face, the front pads and rear pads being selectively connected via a network passing through the substrate. A peripheral edge of the substrate is mounted on a rigid annular frame and the rearm face... Agent: Gardere Wynne Sewell LLP Intellectual Property Section

20100244227 - Semiconductor packages and electronic systems including the same: Provided are semiconductor packages and electronic systems including the same. A first memory chip may be stacked on a first portion of a substrate. A controller chip may be stacked on a second portion of the substrate, which is different from the first portion. At least one first bonding wire... Agent: Harness, Dickey & Pierce, P.L.C

20100244226 - Stackable electronic package and method of fabricating same: An electronic package includes a first layer having a first surface, the first layer includes a first device having a first electrical node, and a first contact pad in electrical communication with the first electrical node and positioned within the first surface. The package includes a second layer having a... Agent: Ge Trading & Licensing

20100244225 - Stackable electronic pagkage and method of fabricating same: An electronic package includes a first layer having a first surface, the first layer includes a first device having a first electrical node, and a first contact pad in electrical communication with the first electrical node and positioned within the first surface. The package includes a second layer having a... Agent: Ge Trading & Licensing

20100244233 - Chip stack package and method of fabricating the same: Provided is a chip stack package and a method of manufacturing the same. A chip stack package may include a base chip including a base substrate, a base through via electrode penetrating the base substrate, a base chip pad connected to the base through via electrode, and a base encapsulant.... Agent: Harness, Dickey & Pierce, P.L.C

20100244232 - Integrated circuit packaging system with z-interconnects having traces and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a carrier; mounting an integrated circuit on the carrier; mounting a z-interconnect on the carrier, the z-interconnect for supporting a trace cantilevered over the integrated circuit; encapsulating the integrated circuit with an encapsulation; removing the carrier; and depositing... Agent: Law Offices Of Mikio Ishimaru

20100244234 - Semiconductor device and method of manufacturing same: The present invention provides a semiconductor device which includes a semiconductor chip formed with an electrode pad on one surface thereof, a wiring board having a wiring pattern, with its one surface opposing the other surface of the semiconductor chip, a wire for electrically connecting the electrode pad of the... Agent: Foley And Lardner LLP Suite 500

20100244235 - Integrated circuit package and method of making same: An integrated circuit package includes a first dielectric layer comprising a dielectric film having a first side and a second side. The package also includes a die having an active surface affixed to a contact location of the first side of the dielectric film absent a layer of adhesive therebetween... Agent: Ge Trading & Licensing

20100244236 - Integrated circuit packaging system with heat spreader and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a package substrate; mounting an integrated circuit die on the package substrate; and attaching a heat spreader assembly, having a thermal adhesive layer formed therein, to the package substrate and the integrated circuit die.... Agent: Law Offices Of Mikio Ishimaru

20100244237 - Semiconductor device and method for manufacturing the same: A semiconductor device comprising a semiconductor module that has a joint surface, a first fitting portion and a second fitting portion provided on the joint surface, the second fitting portion having a shape different from the first fitting portion; and a radiating fin that has a joint surface, a third... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244238 - Semiconductor device: There is provided a semiconductor device which makes equalization of wirings between address system chips easy and reduce the influence of crosstalk noise and capacitive coupling noise among data system wirings for connecting the chips. There are mounted, on a module board, a plurality of stacked memory chips which a... Agent: Miles & Stockbridge PC

20100244244 - Chip having a bump and package having the same: The present invention relates to a chip having a bump and a package having the same. The chip includes a chip body, at least one via, a passivation layer, an under ball metal layer and at least one bump. The via penetrates the chip body, and is exposed to a... Agent: Mccracken & Frank LLP

20100244245 - Filp chip interconnection structure with bump on partial pad and method thereof: A semiconductor package includes a semiconductor die with a plurality of solder bumps formed on bump pads. A substrate has a plurality of contact pads each with an exposed sidewall. A solder resist is disposed opening over at least a portion of each contact pad. The solder bumps are reflowed... Agent: Robert D. Atkins

20100244242 - Semiconductor device: A semiconductor device including a first substrate having first and second surfaces, multiple first mounting pads formed on the first surface of the first substrate and for mounting a first semiconductor element on the first surface of the first substrate, multiple first connection pads formed on the first surface of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244243 - Semiconductor device: A semiconductor device has a flexible substrate which can be folded U-shape, and an outer surface of the flexible substrate being provided concave-convex portions for heat radiation. The semiconductor device also has a semiconductor chip which is mounted on an inner surface of the flexible substrate, and the chip being... Agent: Turocy & Watson, LLP

20100244241 - Semiconductor device and method of forming a thin wafer without a carrier: A semiconductor device has a conductive via in a first surface of a substrate. A first interconnect structure is formed over the first surface of the substrate. A first bump is formed over the first interconnect structure. The first bump is formed over or offset from the conductive via. An... Agent: Robert D. Atkins

20100244239 - Semiconductor device and method of forming enhanced ubm structure for improving solder joint reliability: A semiconductor device has a first conductive layer formed over a substrate. A first insulating layer is formed over the first conductive layer. A second conductive layer is formed over first insulating layer and first conductive layer. A third insulating layer is formed over the second insulating layer and second... Agent: Robert D. Atkins

20100244240 - Stackable electronic package and method of making same: An apparatus comprises a first chip layer comprising a first component coupled to a first side of a first flex layer, the first component comprising a plurality of electrical pads. The first chip layer also comprises a first plurality of feed-thru pads coupled to the first side of the first... Agent: Ge Trading & Licensing

20100244246 - Electronic component with mechanically decoupled ball connections: An electronic component including at least one chip and/or one support, the chip configured to be transferred onto the support and linked, at a level of at least one connection site of the chip, formed by at least one portion of a layer of the chip, to at least one... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244248 - Nonvolatile memory device and method for manufacturing same: A nonvolatile memory device, includes: a lower side electrode aligned in a first direction; an upper side electrode positioned above the lower side electrode and aligned in a second direction intersecting the first direction; and a memory unit provided between the lower side electrode and the upper side electrode. At... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244251 - Semiconductor device and method for fabricating the same: A semiconductor device includes a first semiconductor chip, an electrode pad formed in an upper surface portion of the first semiconductor chip, a second semiconductor chip formed on the first semiconductor chip, and a through-via formed in the second semiconductor chip. A hollowed portion is formed in the electrode pad,... Agent: Mcdermott Will & Emery LLP

20100244250 - Semiconductor integrated circuit, manufacturing method thereof, and semiconductor device using semiconductor integrated circuit: A step of forming a through hole in a semiconductor substrate, or a step of polishing the semiconductor substrate from its back surface requires a very long time and causes decrease of productivity. In addition, when semiconductor substrates are stacked, a semiconductor integrated circuit which is formed of the stack... Agent: Robinson Intellectual Property Law Office, P.C.

20100244249 - Semiconductor package: A semiconductor package includes a semiconductor die attached to a support having electrically conductive paths, the semiconductor die having a bond-pad electrically connected to the electrically a conductive path on the support by a wire-bond of a first metallic composition, the wire-bond and the bond-pad being coated with a protection... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20100244247 - Via structure and via etching process of forming the same: A via etching process forms a through-substrate via having a round corner and a tapered sidewall profile. A method includes providing a semiconductor substrate; forming a hard mask layer and a patterned photoresist layer on the semiconductor substrate; forming an opening in the hard mask and exposing a portion of... Agent: Lowe Hauptman Ham & Berner, LLP

20100244253 - Copper line having self-assembled monolayer for ulsi semiconductor devices, and a method of forming same: A copper line having self assembled monolayer for use in ULSI semiconductor devices and methods of making the same are presented. The copper line includes an interlayer dielectric, a self-assembled monolayer, catalytic particles on the monolayer, and a copper layer on the monolayer with the catalytic particles. The method includes... Agent: Ladas & Parry LLP

20100244257 - Method of fabricating semiconductor device and the semiconductor device: A method of fabricating a semiconductor device includes forming a plurality of mask patterns by anisotropically etching a mask-forming film until upper surfaces of core patterns are exposed. A facing pair includes a pair of the mask patterns facing the core pattern located between the paired mask patterns. The mask... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100244252 - Self forming metal fluoride barriers for fluorinated low-k dielectrics: A device and method of forming fluoride metal barriers at an interface of a fluorinated low-K dielectric and Cu or Cu alloy interconnects is disclosed. The fluoride metal barriers may prevent interconnects from reacting with the fluorinated low-K dielectric. The method may include depositing a thin film of metal or... Agent: Cool Patent, P.C. C/o Cpa Global

20100244254 - Semiconductor device: A semiconductor device is disclosed, which includes a first interlayer insulating film, a lower-layer interconnection in a first groove in the first film, a second interlayer insulating film over the first film, having a normal via hole opening to the lower-layer interconnection, a normal plug in the normal hole, a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100244256 - Semiconductor device and manufacturing method thereof: A semiconductor device includes an interlayer insulating film formed above a semiconductor substrate. The interlayer insulating film has a concave portion. A barrier metal layer is formed along a bottom and a sidewall of the concave portion. The barrier metal layer has a first portion provided along the sidewall of... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100244260 - Semiconductor device and method for fabricating the same: A semiconductor device includes: a first insulting film formed on a semiconductor substrate; a contact including a conductive film buried in the first insulating film to reach the semiconductor substrate; and a first barrier layer including a high melting point metal, formed between the semiconductor substrate and the conductive film... Agent: Mcdermott Will & Emery LLP

20100244258 - Substrate and manufacturing method therefor: A substrate having, on a base material, a barrier film for preventing copper diffusion comprising one or more metal elements selected from tungsten, molybdenum and niobium, a metal element having a catalytic function in electroless plating such as platinum, gold, silver and palladium, and nitrogen contained in the form of... Agent: Flynn Thiel Boutell & Tanis, P.C.

20100244259 - Substrate and manufacturing method therefor: A substrate having, on a base material, a barrier film for preventing copper diffusion comprising one or more metal elements selected from tungsten, molybdenum and niobium, a metal element having a catalytic function in electroless plating such as ruthenium, rhodium, and iridium, and nitrogen contained in the form of a... Agent: Flynn Thiel Boutell & Tanis, P.C.

20100244261 - Through-hole contacts in a semiconductor device: Devices with conductive through-waver vias. In one embodiment, the device is formed by a method comprising providing a layer of semiconducting material, forming a layer of metal on a first side of the layer of semiconducting material, forming an opening in the layer of semiconducting material to thereby expose a... Agent: Round Lerner, David, Littenberg, Krumholz & Mentlik, LLP

20100244255 - Wiring structures: A wiring structure includes a conductive pattern on a substrate, a first insulation layer pattern between adjacent conductive patterns and a second insulation layer pattern on the first insulation layer pattern. The first insulation layer pattern is separated from the conductive pattern by a first distance to provide a first... Agent: Mills & Onello LLP

20100244263 - Chip packages: Chip assemblies are disclosed that include a semiconductor substrate, multiple devices in and on the semiconductor substrate, a first metallization structure over the semiconductor substrate, and a passivation layer over the first metallization structure. First and second openings in the passivation layer expose first and second contact pads of the... Agent: Mcdermott Will & Emery LLP

20100244262 - Deposition method and a deposition apparatus of fine particles, a forming method and a forming apparatus of carbon nanotubes, and a semiconductor device and a manufacturing method of the same: A deposition method of fine particles, includes the steps of irradiating a fine particle beam formed by size-classified fine particles to an irradiated subject under a vacuum state, and depositing the fine particles on a bottom part of a groove structure formed at the irradiated subject.... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100244264 - Semiconductor device: A semiconductor device including a first wire made of a material mainly composed of Cu, two second wires made of a material mainly composed of Cu, an interlayer dielectric film formed between the first wire and the two second wires, two vias made of a material mainly composed of Cu... Agent: Rabin & Berdo, PC

20100244265 - Semiconductor device and method for manufacturing the same: Wiring grooves are formed on a first interlayer insulating film 2 on a semiconductor substrate 1; first Cu wires 5 are formed by stacking first Cu films 4 in the wiring grooves; a first liner film 6 is formed on the first Cu wires 5 and the first interlayer insulating... Agent: Hamre, Schumann, Mueller & Larson P.C.

20100244267 - Interconnect structure for a semiconductor device and related method of manufacture: A semiconductor device having a device substrate is provided. The semiconductor device comprises an electrically-conductive pad formed overlying the device substrate, an electrically-conductive platform formed overlying the electrically-conductive pad and enclosing a cavity, the electrically-conductive platform having a perimeter portion extending away from the electrically-conductive pad and a capping portion... Agent: Ingrassia Fisher & Lorenz, P.C. (gf)

20100244266 - Metallic bonding structure for copper and solder: The present invention discloses a metallic bonding structure for copper and solder, which applies to connect at least one electronic element. The metallic bonding structure comprises at least one copper-based member and at least one zinc bonding member. The copper-based members are arranged on the electronic element through at least... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100244268 - Apparatus, system, and method for wireless connection in integrated circuit packages: Some embodiments of the invention include a connecting structure between a support and at least one die attached to the support. The die includes a number of die bond pads on a surface of the die. The connecting structure includes a plurality of via and groove combinations. Conductive material is... Agent: Schwegman, Lundberg & Woessner, P.A.

20100244273 - Integrated circuit package system with multiple device units and method for manufacturing thereof: A method for manufacturing an integrated circuit package system includes: forming a first device unit, having first external interconnects arranged along a perimeter of the first device unit, and a second device unit, having second external interconnects arranged along a perimeter of the second device unit, in an array configuration;... Agent: Law Offices Of Mikio Ishimaru

20100244270 - Manufacturing method of semiconductor device and semiconductor device: A semiconductor device includes: a component substrate of a semiconductor device; electrode pads provided on one surface of the component substrate; a support plate material reinforcing the component substrate; via holes made in the support plate material; a conducting material filled in the via holes; and a joining member interposed... Agent: Sonnenschein Nath & Rosenthal LLP

20100244272 - Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices: Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a packaged microelectronic device can include a support member, a first die attached to the support member, and a second die attached to the first die in a stacked configuration. The device can also... Agent: Perkins Coie LLP Patent-sea

20100244271 - Semiconductor device and manufacturing method thereof: A semiconductor device has a first insulation film defining a plurality of contact holes arranged along a predetermined direction. A plurality of first contact plugs is respectively formed in the contact holes. A second insulation film is formed on the first insulation film and defining an opening to expose a... Agent: Young & Thompson

20100244269 - Semiconductor device having integral structure of contact pad and conductive line: Provided are a semiconductor device and a method of forming a semiconductor device in which a plurality of patterns are simultaneously formed to have different widths and the pattern densities of some regions are increased using a double patterning. The semiconductor device includes a plurality of conductive lines each including... Agent: Mills & Onello LLP

20100244275 - Contact structure for an electronic circuit substrate and electronic circuit comprising said contact structure: A substrate for an electronic circuit is provided wherein the substrate comprises a plurality of contact areas (304), a plurality of dielectric areas (307), and a conductor path (301), wherein each of the plurality of contact areas is surrounded by a respective one of the dielectric areas, and wherein at... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100244274 - Wiring board: A wiring board includes a first conductor constituting a signal line, a second conductor constituting a ground conductor or a power conductor, a dielectric layer disposed between and separately the first and second conductors, and a third conductor arranged between the first and second conductor, the third conductor being connected... Agent: Kratz, Quintos & Hanson, LLP

20100244276 - Three-dimensional electronics package: An electronics package 100 comprising a substrate 105 having a planar surface 107, a memory die 110 and a logic die 120. Memory circuit components 112 interconnected to memory die contacts 114 located on an outer surface 116 of a face 118 of the memory die. Logic circuit components 122... Agent: Hitt Gaines, PC Lsi Corporation

20100244277 - Integrated circuit packaging system with package underfill and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a sacrificial carrier assembly having a stack interconnector thereover; mounting an integrated circuit having a connector over the sacrificial carrier assembly with the connector over the stack interconnector; dispensing an underfill material between the sacrificial carrier assembly and... Agent: Law Offices Of Mikio Ishimaru

20100244279 - Liquid resin composition for underfill, flip-chip mounted body and method for manufacturing the same: The invention relates to a liquid resin composition for underfill comprising (A) an epoxy resin, (B) an amine-based curing agent, and (C) an inorganic filler, a viscosity at a temperature of 25° C. being 1 to 150 Pa·s, and a time required for the viscosity to become 1 Pa·s at... Agent: Frishauf, Holtz, Goodman & Chick, PC

20100244278 - Stacked multichip package: A stacked multichip package comprises a first chip having a first active surface and a first rear surface, a first chip carrier having a first opening and being configured to carrier the first active surface, a plurality of first conductive leads passing through the first opening and being configured to... Agent: Wpat, PC Intellectual Property Attorneys

20100244282 - Assembly of electronic components: An electronic component assembly that has a supporting structure, an integrated circuit die with a plurality of contacts pads, a printed circuit board with a plurality of conductors, the integrated circuit die and the PCB being mounted to the supporting structure by a die attach film such that they are... Agent: Silverbrook Research Pty Ltd

20100244281 - Flexible printed wiring board and semiconductor device employing the same: Objects of the present invention is to provide a flexible printed wiring board which has a simple structure, which can be produced at low cost, and which can effectively dissipate heat generated by semiconductor chips, and to provide a semiconductor device employing the flexible printed wiring board. The flexible printed... Agent: Sughrue Mion, PLLC

20100244280 - Method of manufacturing semiconductor package and semiconductor package: A board on which a wiring having an electrode pad is formed is prepared. A resist film is formed on the board in order to cover the wiring and then the resist film is left on the electrode pad through patterning. An inorganic insulating film is formed on the board... Agent: Drinker Biddle & Reath (dc)

20100244284 - Method for ultra thin wafer handling and processing: A method for thin wafer handling and processing is provided. In one embodiment, the method comprises providing a wafer having a plurality of semiconductor chips, the wafer having a first side and a second side. A plurality of dies are attached to the first side of the wafer, at least... Agent: Lowe Hauptman Ham & Berner, LLP

20100244283 - Method of joining electronic component and the electronic component: Dummy electrodes (15) are disposed on wiring connected to first electrodes (2) of the substrate (1), outside a junction region containing all of the first electrodes (2) and second electrodes (6) and in bonding resin (4), the dummy electrodes (15) not being involved in electrical connection between the substrate (1)... Agent: Hamre, Schumann, Mueller & Larson P.C.

20100244285 - Semiconductor device and method of manufacturing the same: In a semiconductor device, corner portions of a inner insulating film are chamfered, and hence a damage is less likely to reach the corner portion of the inner insulating film, though the corner portion of an outer insulating film is damaged. Therefore, a hermeticity of a semiconductor element can be... Agent: Mcginn Intellectual Property Law Group, PLLC

20100244286 - Nanocomposites for optoelectronic devices: Nanoparticles (<100 nm) and submicron particles (<400 nm) can be used as filler material to form a nanocomposite that can be used as an encapsulant for optoelectronic devices. These nanocomposites can function to reduce light scattering and increase thermal, mechanical and dimensional stability of the optoelectronic device. Such nanocomposites can... Agent: Stallman C/o Mofo

20100244288 - Method and apparatus for fabricating semiconductor chips using varying areas of precision: A system that fabricates a semiconductor chip. The system places patterns for components which require fine line-widths within a high resolution region of a reticle, wherein the high resolution region provides sharp focus for a given wavelength of light used by the lithography system. At the same time, the system... Agent: Pvf -- Oracle International Corporation C/o Park, Vaughan & Fleming LLP

20100244287 - Method of measurement in semiconductor fabrication: Provided is a method of fabricating a semiconductor device. The method includes providing a device substrate having a front side and a back side, the device substrate having a first refractive index, forming an embedded target over the front side of the device substrate, forming a reflective layer over the... Agent: David M. O'dell Haynes And Boone, LLP

20100237312 - Nonvolatile memory device: The nonvolatile memory device includes at least one pair of first electrode lines, at least one device structure disposed between the at least one pair of first electrode lines and a dielectric layer disposed between the at least one device structure and the at least one pair of first electrode... Agent: Harness, Dickey & Pierce, P.L.C

20100237311 - Nonvolatile memory device and method of manufacturing the same: A nonvolatile memory device according to an embodiment of the present invention includes: a first wire embedded in a first wiring groove extending in an X direction formed in a first interlayer insulating film; a second interlayer insulating film formed above the first interlayer insulating film; a second wire embedded... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237313 - Nonvolatile semiconductor memory device and manufacturing method thereof: A nonvolatile semiconductor memory device of the present invention includes a substrate (1), first wires (2), memory cells each including a resistance variable element (5) and a portion of a diode element (6), second wires (11) which respectively cross the first wires (2) to be perpendicular to the first wires... Agent: Mcdermott Will & Emery LLP

20100237315 - Diode structures and resistive random access memory devices having the same: A diode structure includes: a lower electrode and an insulating layer disposed on the lower electrode. The insulating layer includes aperture exposing a portion of the lower electrode. The diode structure further includes: a first layer and a second layer. The first layer is disposed in the aperture and having... Agent: Harness, Dickey & Pierce, P.L.C

20100237314 - Resistance change type memory: A resistance change type memory of an aspect of the present invention including a first wiring configured to extend in a first direction, a second wiring configured to extend in a second direction crossing the first direction, a series circuit configured to connect to the first and second wirings, the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237316 - 4f2 self align side wall active phase change memory: Arrays of memory cells are described along with devices thereof and method for manufacturing. Memory cells described herein include self-aligned side wall memory members comprising an active programmable resistive material. In preferred embodiments the area of the memory cell is 4F2, F being the feature size for a lithographic process... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20100237318 - Phase change memory device using carbon nanotube: Provided are a phase change memory device that can operate at low power and improve the scale of integration by reducing a contact area between a phase change material and a bottom electrode, and a method for fabricating the same. The phase change memory comprises a current source electrode, a... Agent: Foley And Lardner LLP Suite 500

20100237317 - Resistive random access memory, nonvolatile memory, and method of manufacturing resistive random access memory: A resistive random access memory includes a lower electrode; a metal oxide film formed on the lower electrode and having a variable resistance, the metal oxide film having a first portion containing a metal element forming the metal oxide film and a second portion richer in oxygen than the first... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100237319 - Nonvolatile semiconductor memory device: This nonvolatile semiconductor memory device comprises a memory cell array including memory cells arranged therein. Each of the memory cells is located at respective intersections between first wirings and second wirings and includes a variable resistance element. The variable resistance element comprises a thin film including carbon (C). The thin... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237320 - Nonvolatile semiconductor memory device and method for manufacturing the same: A nonvolatile semiconductor memory device includes a memory cell array where a plurality of memory cell layers having a plurality of first and second wires which cross each other and a memory cell provided at each intersection of these first and second wires are laminated on top of each other,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237321 - Semiconductor memory device: A semiconductor memory device includes the first transistor having first and second source/drain diffusion regions positioned below a second bit line to sandwich the first word line therebetween, and the second source/drain diffusion region positioned between the first and second word lines and connected to a first bit line, a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237323 - Electroluminescent device: An electroluminescent device comprising a pair of electrodes, and an electroluminescent layer containing at least a luminescent layer, situated between the electrodes. The luminescent layer has a matrix material containing at least one organic compound, and quantum dots whose surfaces are protected by a protective material and that are dispersed... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237322 - Light emitting device: A QD protecting material having high compatibility with a binder component in a luminescent layer. The luminescent layer contains, as a part of its chemical structure, a compound containing a moiety A having a sum atomic weight MA of 100 or more and quantum dots protected by a protecting material,... Agent: Burr & Brown

20100237324 - Semiconductor switching circuit employing quantum dot structures: A semiconductor circuit includes a plurality of semiconductor devices, each including a semiconductor islands having at least one electrical dopant atom and located on an insulator layer. Each semiconductor island is encapsulated by dielectric materials including at least one dielectric material portion. Conductive material portions, at least one of which... Agent: Scully, Scott, Murphy & Presser, P.C.

20100237325 - Highly resolved, low noise, room-temperature coulomb-staircase and blockade up to 2.2v in isolated 50 micron long one dimensional necklace of 10 nm au particles: Coulomb blockade in metal nanoparticles isolated by a tunneling barrier is considered to be a potential solution to low power, robust, high-speed electronic switching device operating at single-electron transport. However, the switching voltage equal to the threshold voltage to overcome coulomb blockade for these devices is typically in the 10... Agent: Fish & Richardson P.C.

20100237331 - Anode for an organic electronic device: There is provided an anode for an organic electronic device. The anode is a conducting inorganic material having an oxidized surface layer. The surface layer is non-conductive and hole-transporting.... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20100237334 - Benzo-fused thiophene or bezon-fused furan compounds comprising a triphenylene group: Triphenylene containing benzo-fused thiophene compounds are provided. Additionally, triphenylene containing benzo-fused furan compounds are provided. The compounds may be useful in organic light emitting devices, particularly as hosts in the emissive layer of such devices, or as materials for enhancement layers in such devices, or both.... Agent: Townsend And Townsend And Crew, LLP

20100237328 - Benzo[a]fluoranthene compound and organic light emitting device using the same: wherein: Ar1 represents any one of the following groups (i-a) to (i-c): (i-a) a substituted or unsubstituted phenylene group, (i-b) a substituted or unsubstituted monocyclic heterocyclic group, and (i-c) a composite substituent formed of two substituents selected from substituents corresponding to the groups (i-a) and (i-b); and X1 represents a... Agent: Fitzpatrick Cella Harper & Scinto

20100237339 - Carbazole derivative with heteroaromatic ring, and light-emitting element, light-emitting device, and electronic device using carbazole derivative with heteroaromatic ring: Disclosed is a carbazole derivative and a light-emitting element, a light-emitting device, and an electronic device using thereof. The carbazole derivative possesses an oxadiazole moiety or a quinoxaline moiety as a heteroaromatic ring having an electron-transporting property and a carbazole moiety having a hole-transporting property. The ability of the carbazole... Agent: Husch Blackwell Sanders, LLP Husch Blackwell Sanders LLP Welsh & Katz

20100237340 - Diode employing with carbon nanotube: A diode includes an organic composite plate, a first electrode and a second electrode. The organic composite plate includes a first portion, a second portion and a plurality of carbon nanotubes distributed therein. The carbon nanotubes in the first portion have a first band gap and the carbon nanotubes in... Agent: Altis Law Group, Inc. Attn: Steven Reiss

20100237342 - Light emitting device: A triplet light emitting device which has high efficiency and improved stability and which can be fabricated by a simpler process is provided by simplifying the device structure and avoiding use of an unstable material. In a multilayer device structure using no hole blocking layer conventionally used in a triplet... Agent: Robinson Intellectual Property Law Office, P.C.

20100237338 - Light-emitting element, light-emitting device, display, and electronic apparatus: A light-emitting element includes a cathode; an anode; and a light-emitting section which is disposed between the cathode and the anode and which includes a first light-emitting layer, second light-emitting layer, and third light-emitting layer each containing a corresponding one of luminescent materials emitting light of different colors and host... Agent: Oliff & Berridge, PLC

20100237335 - Multicolor display apparatus: In a multicolor display apparatus in which each of light emitting devices of three colors R, G and B has the same thickness from a reflection position of a reflection electrode to an organic emission layer, an organic emission layer of the R device and an organic emission layer of... Agent: Fitzpatrick Cella Harper & Scinto

20100237336 - Nanotube enabled, gate-voltage controlled light emitting diodes: Embodiments of the invention relate to vertical field effect transistor that is a light emitting transistor. The light emitting transistor incorporates a gate electrode for providing a gate field, a first electrode comprising a dilute nanotube network for injecting a charge, a second electrode for injecting a complementary charge, and... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100237333 - Organic component vertically emitting white light: The invention relates to an organic component emitting white light upward having an electrode (1), a counter electrode (2) constructed in a transparent manner and as a cover electrode and an arrangement of organic layers (3) which is disposed in contact with and between the electrode (1) and the counter... Agent: Schmeiser, Olsen & Watts

20100237341 - Organic electroluminescence element: An organic electroluminescence element having a cathode as a top electrode, and excelling in luminance efficiency, drive voltage, and operational life is provided. The organic electroluminescence element includes an anode over a substrate and a luminescent layer over the anode. The luminescent layer comprises an organic material. An electron injection... Agent: Greenblum & Bernstein, P.L.C

20100237330 - Organic electroluminescent compound and organic ligth emitting diode using the same: The present invention relates to novel organic electroluminescent compounds and organic light emitting diodes comprising the same. Since the organic electrolumescent compounds according to the invention have good luminous efficiency and life property as an electroluminescent material, OLED's having very good operation lifetime can be produced.... Agent: Rohm And Haas Electronic Materials LLC

20100237332 - Organic semiconductor transistor: An organic semiconductor transistor has plural electrodes and an organic semiconductor layer including at least one compound represented by the following Formula (I). In Formula (I), each R is independently a hydrogen atom or an alkyl group; and n and m are each independently an integer of from 1 to... Agent: Oliff & Berridge, PLC

20100237326 - Organic transistor and manufacturing method thereof: An organic transistor including a substrate 1, a pair of a source electrode 4 and a drain electrode 5, an organic semiconductor layer 6 provided between the source electrode 4 and the drain electrode 5, and a gate electrode 2 provided in association with the organic semiconductor 6 with a... Agent: Wenderoth, Lind & Ponack, L.L.P.

20100237337 - Organic transistor and method for producing the same:

20100237327 - Smectic liquid crystal compound: wherein R1 represents a straight-chain alkyl group having 1 to 8 carbon atoms, R2 represents an alkyl or alkoxy group having 1 to 8 carbon atoms, and “n” is an integer of 0 to 3; an ambipolar charge-transporting material comprising the smectic liquid crystal compound; an organic semiconductor thin film... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237329 - Vinyl-based polymer with silicon or/and tin and organic light emission diode using: Disclosed herein is a vinyl-based polymer with silicon and/or tin for an organic layer of an OLED. The polymer is soluble in an organic solvent and can emit fluorescent and phosphorescent light from red to blue wavelengths so as to be used for a host material of an organic light... Agent: Lee & Morse, P.C.

20100237344 - Cubic semiconductor alloys for deep uv applications: A cubic epitaxial article and electronic devices therefrom includes a single crystal cubic oxide substrate having a substrate band gap and a top surface. An epitaxial cubic oxide alloy layer that includes at least one transition metal or group IIA metal disposed on the top surface of the substrate. The... Agent: Jetter & Associates, P.A.

20100237343 - Zno-based thin film and semiconductor device: Provided are a ZnO-based thin film which is inhibited from being doped with an unintentional impurity, and a semiconductor device. The ZnO-based thin film has a main surface: which is formed of MgxZn1-xO (0≦x<1) containing a p-type impurity; and which satisfies at least any one of the following conditions when... Agent: Rabin & Berdo, PC

20100237345 - Wafer and manufacturing method of electronic component: The present invention relates to a wafer formed with an evaluation element and capable of improving productivity and a manufacturing method of an electronic component using the same. In a wafer according to the present invention, a plurality of elements connected to electrode films through lead-out conductive films are arranged... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237346 - Nonvolatile semiconductor memory device and method of manufacturing the same: The semiconductor layer and the third electrode layer are formed as follows. First, a first layer made from amorphous silicon and including a p-type first semiconductor region and an n-type second semiconductor region is deposited. Next, a second layer made from a metal is deposited on an upper or lower... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237347 - Electronic device having electrodes and organic active regions and processes of forming the same: An electronic device can include an electrode and an organic active region. In one aspect, the electronic device can include the electrode having a corresponding pitch and an organic active region adjacent to the electrode, wherein the organic active region has a width greater than the corresponding pitch. In another... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20100237349 - Liquid crystal display device and fabricating method thereof: Disclosed is a thin film transistor substrate for a fringe filed switching type liquid crystal display device, and a fabrication method thereof, that reduces the number of required mask processes, and thus improves fabrication efficiency. The fabrication method involves three mask processes, wherein the masks are partial transmitting masks, and... Agent: Mckenna Long & Aldridge LLP

20100237350 - Pixel structure: A pixel structure suitable for being disposed on a substrate includes a thin film transistor (TFT), a first pixel electrode, a second pixel electrode, a scan line and a data line. The TFT disposed on the substrate includes a gate, a source, a first drain and a second drain. A... Agent: Jianq Chyun Intellectual Property Office

20100237348 - Thin film transistor array substrate: A thin film transistor (TFT) array substrate includes a stack structure disposed to raise an extended electrode of a drain electrode of a thin film transistor. Therefore, a contact hole does need to be very deep to expose the extended electrode of the drain electrode.... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100237352 - electronic device and a method of manufacturing an electronic device: The invention relates to an electronic device comprising a sequence of a first thin film transistor (TFT) and a second TFT, the first TFT comprising a first set of electrodes separated by a first insulator, the second TFT comprising a second set of electrodes separated by a second insulator, wherein... Agent: Leydig Voit & Mayer, Ltd

20100237351 - Method of manufacturing a double gate transistor: A planar double-gate transistor is manufactured wherein crystallisation inhibitors are implanted into the channel region (16) of a semiconductor wafer (10), said wafer having a laminate structure comprising an initial crystalline semiconductor layer (14) adjacent an amorphous semiconductor layer (12). Upon heating, partial re-growth of the amorphous semiconductor layer is... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100237354 - Semiconductor device and method for manufacturing the same: It is an object of the present invention to provide a method of separating a thin film transistor, and circuit or a semiconductor device including the thin film transistor from a substrate by a method different from that disclosed in the patent document 1 and transposing the thin film transistor,... Agent: Robinson Intellectual Property Law Office, P.C.

20100237353 - Thin film transistor, method of fabricating the same, and method of fabricating liquid crystal display device having the same: A thin film transistor includes a gate electrode, a gate insulation layer on the gate electrode, source and drain electrodes formed on the gate insulation layer, a polysilicon channel layer overlapping the ohmic contact layers and on the gate insulation layer between the source and drain electrodes, ohmic contact regions... Agent: Morgan Lewis & Bockius LLP

20100237355 - Thin film transistor, method for manufacturing thin film transistor, and display device: A thin film transistor of the present invention includes a gate electrode; and a microcrystalline silicon layer containing a microcrystalline silicon, the microcrystalline silicon layer having an upper surface and a lower surface which are parallel to a substrate surface and an end surface which extends between the upper surface... Agent: Nixon & Vanderhye, PC

20100237356 - Bidirectional silicon carbide transient voltage suppression devices: An electronic device includes a silicon carbide layer having a first conductivity type and having a first surface and a second surface opposite the first surface, and first and second silicon carbide Zener diodes on the silicon carbide layer. Each of the first and second silicon carbide Zener diodes may... Agent: Myers Bigel Sibley & Sajovec, P.A.

20100237357 - Light emitting device having pillar structure with roughness surface and the forming method thereof: A light emitting device is provided which includes a substrate, a first semiconductor layer having a first region and a second region on the substrate; ac active layer is formed on the first region of the first semiconductor layer; a second semiconductor layer is formed on the active surface layer... Agent: Sinorica, LLC

20100237358 - Light-emitting device and light-emitting module: A light-emitting device includes: a substrate sectioned into a first region and a second region; a first clad layer provided over the substrate in the first region; an active layer provided over the first clad layer and having an emission surface on at least one side surface; a second clad... Agent: Harness, Dickey & Pierce, P.L.C

20100237363 - Apparatus for dissipating thermal energy generated by current flow in semiconductor circuits: A thermal energy dissipating arrangement includes a semiconductor device and a thermally conductive medium. The semiconductor device includes a semiconductor circuit defining a semiconductor junction and encapsulating material in physical contact with and surrounding the semiconductor circuit. The thermally conductive medium defines an opening sized to receive the semiconductor device... Agent: Barnes & Thornburg LLP

20100237362 - Display device and production method thereof: t

20100237359 - Flat and thin led-based luminary providing collimated light: The light from the plurality of LEDs will be transmitted in to the light guide plate and will be distributed therein before exiting the light guide plate via the front side thereof. Thus, the present invention provides a light-emitting device that provides well-distributed and collimated light from a plurality of... Agent: Philips Intellectual Property And Standards

20100237360 - Light emitting diode and back light module thereof: A light emitting diode (LED) includes an LED chip, a substrate structure, a fluorescence layer, and a lens. The substrate structure includes a cavity. The fluorescence layer covers on the LED chip and is configured in the cavity and covering the LED chip. The lens is installed on the substrate... Agent: Kile Goekjian Reed & Mcmanus

20100237364 - Thermal energy dissipating and light emitting diode mounting arrangement: A thermal energy dissipating and LED mounting arrangement includes a plurality of LEDs and a thermally conductive sheet. The thermally conductive sheet has a length, a width and a thickness, and defines a plurality of openings through the thickness. Each of the plurality of openings is sized to receive and... Agent: Barnes & Thornburg LLP

20100237361 - White light-emitting lamp for illumination and illuminating device using the same: A white light emitting lamp 1 includes a phosphor layer 5 which emits white light by being excited by light emitted from a semiconductor light emitting element 2. A transparent resin layer 4 is interposed between the semiconductor light emitting element 2 and the phosphor layer 5. The phosphor layer... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237365 - Led-array system: A LED-array system comprises at least one LED package 104 arranged on a substrate 106 provided with means for supplying the LED package 104 with a drive voltage. The LED package 104 is immersed in a supporting layer 112, and the system is characterized in that the at least one... Agent: Philips Intellectual Property & Standards

20100237366 - Method for manufacturing light emitting device and light emitting device: A method for manufacturing a light emitting device, includes: preparing a first substrate by slicing a single crystal ingot pulled in a pulling direction tilted with respect to a first plane orientation, the slicing being in a direction substantially perpendicular to the pulling direction; preparing a second substrate including a... Agent: Turocy & Watson, LLP

20100237372 - Light emitting device: A light emitting device including a light emitting structure including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer; a first photonic crystal structure on the light emitting structure; a lower encapsulant on the first photonic crystal structure; and a second photonic crystal... Agent: Birch Stewart Kolasch & Birch

20100237375 - Light emitting device: A light emitting device (1) includes a LED chip (10) as well as a mounting substrate (20) on which the LED chip (10) is mounted. Further, the light emitting device (1) includes a cover member (60) and a color conversion layer (70). The cover member (60) is formed to have... Agent: Edwards Angell Palmer & Dodge LLP

20100237371 - Light emitting device and method for fabricating the same: Disclosed is a light emitting device. The light emitting device comprises a light emitting semiconductor layer comprising a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer, a second electrode layer supporting the light emitting semiconductor layer while surrounding the light emitting semiconductor layer, and a... Agent: Birch Stewart Kolasch & Birch

20100237370 - Light emitting device package: Embodiments relate to a light emitting device package. The light emitting device package comprises: a body comprising a multilayer cavity; a light emitting device in the cavity; a first phosphor layer sealing the light emitting device and comprising a first phosphor; and a second phosphor layer comprising a second phosphor... Agent: Birch Stewart Kolasch & Birch

20100237376 - Light emitting device package and manufacturing method thereof: Provided is a light emitting device package. The light emitting device package comprises a base substrate, a frame, and a light emitting device. The base substrate comprises a plurality of electrode pads. The frame is formed of silicon, attached on the base substrate, and has an opening. The light emitting... Agent: Birch Stewart Kolasch & Birch

20100237367 - Light emitting diode package: A light emitting diode (LED) package includes a carrier, an LED chip, an encapsulant, a plurality of phosphor particles, and a plurality of anti-humidity particles. The LED chip is disposed on and electrically connected to the carrier. The encapsulant encapsulates the LED chip. The phosphor particles and the anti-humidity particles... Agent: Jianq Chyun Intellectual Property Office

20100237377 - Light emitting diode package and method of manufacturing the same: A light emitting diode (LED) package is provided. According to an embodiment, a light emitting apparatus includes a substrate; at least two distinct electrodes on the substrate; a light emitting device on one of the at least two distinct electrodes, wherein the at least two distinct electrodes are electrically separated... Agent: Birch Stewart Kolasch & Birch

20100237369 - Light-emitting device: A light-emitting device includes a substrate, a light-emitting element mounted on a first flat surface of the substrate, and a glass sealing member for sealing the light-emitting element, wherein the sealing member is in contact with the first flat surface and a side surface of the substrate and a second... Agent: Mcginn Intellectual Property Law Group, PLLC

20100237373 - Lighting device: An object of the present invention is to reduce the thickness of a lighting device using an electroluminescent material. Another object of the present invention is to simplify the structure of a lighting device using an electroluminescent material to reduce cost. A light-emitting element having a stacked structure of a... Agent: Husch Blackwell Sanders, LLP Husch Blackwell Sanders LLP Welsh & Katz

20100237368 - Semiconductor light emitting device and method for manufacturing same: A semiconductor light emitting device, includes: a substrate including a first major surface and a second major surface, the first major surface including a recess and a protrusion, the second major surface being formed on a side opposite to the first major surface; a first electrode provided on the first... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237374 - Transparent organic light emitting diode lighting device: Provided is a transparent organic light emitting diode (OLED) lighting device in which opaque metal reflectors are formed to adjust light emitting directions. The transparent OLED lighting device includes a transparent substrate, a transparent anode formed on a predetermined region of the transparent substrate, a reflective anode formed adjacent to... Agent: Rabin & Berdo, PC

20100237379 - Light emitting device: An embodiment of the invention provides a light emitting device, which includes: a first substrate made of a semiconductor material or a ceramic material; a first hole having extending direction from a first side toward an opposite second side and from a first surface toward an opposite second surface of... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100237378 - Light emitting diode package structure and fabrication thereof: An ultraviolet light emitting diode package structure is disclosed, comprising a substrate with a through-silicon via (TSV) disposed therein, a first electrode disposed on a top side of the substrate, and a second electrode disposed on a bottom side of the substrate, wherein the first electrode and the second electrode... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100237380 - Method of manufacturing electronic device and display: A method of manufacturing an electronic device includes the steps of: forming a sacrifice layer made of at least one of an alkali metal oxide and an alkali earth metal oxide in a part of a first substrate; forming a supporting layer covering the sacrifice layer; forming an electronic device... Agent: Rader Fishman & Grauer PLLC

20100237383 - Photoelectric transmitting or receiving device and manufacturing method thereof: A photoelectric transmitting or receiving device and the manufacturing method thereof are provided. The photoelectric transmitting device comprises a substrate, a first conductive layer, a second conductive layer and a photoelectric transducing chip. The substrate has an upper surface and a recess and is made of a composite material. The... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100237381 - Semiconductor light emitting element: A semiconductor light emitting element includes a semiconductor laminated body comprising a first conductivity type layer, a light emitting layer and a second conductivity type layer in this order from a lower side, a first electrode formed on the first conductivity type layer, and a second electrode comprising a transparent... Agent: Mcginn Intellectual Property Law Group, PLLC

20100237382 - Semiconductor light emitting element, semiconductor light emitting device using the element, and method for manufacturing the device: A semiconductor light emitting element 1 includes a compound semiconductor layer 3 stacked on a single crystal substrate, and is formed by separating the single crystal substrate into individual rectangular pieces. An individual piece 2, which is the separated single crystal substrate, is oriented at a predetermined angle with respect... Agent: Mcdermott Will & Emery LLP

20100237384 - Light device and fabrication method thereof: The present invention discloses a light device and a fabrication method thereof. An object of the present invention is to provide the light device and the fabrication method thereof an electric/thermal/structural stability is obtained, and a P-type electrode and an N-type electrode can be simultaneously formed. In order to achieve... Agent: Birch Stewart Kolasch & Birch

20100237385 - Semiconductor device and method of fabricating the same: A semiconductor device includes a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, a third semiconductor layer on the second semiconductor layer and being in the shape of an island on the second semiconductor layer, a dielectric film on the second and third semiconductor layers, a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237386 - Electrostatic discharge structure for 3-dimensional integrated circuit through-silicon via device: An electrostatic discharge (ESD) structure for a 3-dimensional (3D) integrated circuit (IC) through-silicon via (TSV) device is provided. The ESD structure includes a substrate, a TSV device which is formed through the substrate and is equivalent to a resistance-inductance-capacitance (RLC) device, and at least one ESD device which is disposed... Agent: Jianq Chyun Intellectual Property Office

20100237387 - Semiconductor wafer, semiconductor element and manufacturing method thereof: A semiconductor wafer includes a substrate, a buffer region formed on one main surface of the substrate and formed from a compound semiconductor, and a main semiconductor region formed in the buffer region and formed from a compound semiconductor, wherein the buffer region includes a first multi-layer structured buffer region... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237388 - High on-state breakdown heterojunction bipolar transistor: A heterojunction bipolar transistor (HBT) is provided with an improved on-state breakdown voltage VCE. The improvement of the on-state breakdown voltage for the HBT improves the output power characteristics of the HBT and the ability of the HBT to withstand large impedance mismatch (large VSWR). The improvement in the on-state... Agent: Mccarter & English, LLP Boston

20100237389 - Design structure for heavy ion tolerant device, method of manufacturing the same and structure thereof: The invention relates to a design structure, and more particularly, to a design structure for a heavy ion tolerant device, method of manufacturing the same and a structure thereof. The structure includes a first device having a diffusion comprising a drain region and source region and a second device having... Agent: Roberts Mlotkowski Safran & Cole, P.C. Intellectual Property Department

20100237390 - Solid-state image capturing element and electronic information device: A solid-state image capturing element according to the present invention includes a one conductivity type semiconductor substrate; an opposite conductivity type well region formed on the one conductivity type semiconductor substrate; a photodiode section formed on the opposite conductivity type well region, constituted of a plurality of one conductivity type... Agent: Nixon & Vanderhye, P.C.

20100237391 - Process for manufacturing a large-scale integration mos device and corresponding mos device: A process for manufacturing a MOS device and the MOS device manufactured thereby are disclosed. The process includes in a semiconductor layer forming a gate structure above the semiconductor layer; forming a first doped region within a first surface portion of the semiconductor layer; and irradiating the first doped region... Agent: Graybeal Jackson LLP

20100237392 - Depfet transistor having a large dynamic range: The invention relates to a DEPFET transistor (1) for detecting a radio-generated signal charge (2) and for generating an electronic output signal in a manner dependent on the detected signal charge (2) according to a predetermined characteristic curve. The invention provides for the characteristic curve to have a degressive characteristic... Agent: Caesar, Rivise, Bernstein, Cohen & Pokotilow, Ltd.

20100237393 - Solid-state image pick-up device and imaging system using the same: The present invention provides a solid-state image pick-up device without shading in the dark state, and capable of making a dynamic range and a S/N high. Reference numeral 505 denotes an N-type cathode of a photodiode, 506 denoting a surface P-type region for forming the photodiode into an embedded structure,... Agent: Fitzpatrick Cella Harper & Scinto

20100237394 - Semiconductor memory device: A semiconductor memory device includes unit active regions, word lines extending in a first direction over the unit active region, bit lines extending on the word lines in a second direction substantially perpendicularly to the first direction, first pad contacts in contact with central portions of the unit active regions,... Agent: Lee & Morse, P.C.

20100237395 - Semiconductor device with gate dielectric containing mixed rare earth elements: A semiconductor device, such as a transistor or capacitor, is provided. The device includes a substrate, a gate dielectric over the substrate, and a conductive gate electrode film over the gate dielectric. The gate dielectric includes a mixed rare earth nitride or oxynitride film containing at least two different rare... Agent: Wood, Herron & Evans, LLP (tokyo Electron)

20100237396 - Dram unit cells, capacitors, methods of forming dram unit cells, and methods of forming capacitors: Some embodiments include methods of forming capacitors. A first capacitor storage node may be formed within a first opening in a first sacrificial material. A second sacrificial material may be formed over the first capacitor storage node and over the first sacrificial material, and a retaining structure may be formed... Agent: Wells St. John P.s.

20100237397 - Semiconductor memory device and manufacturing method thereof: To provide an active region having first and second diffusion layers positioned at both sides of a gate trench and a third diffusion layer formed on a bottom surface of the gate trench, first and second memory elements connected to the first and second diffusion layers, respectively, a bit line... Agent: Mcginn Intellectual Property Law Group, PLLC

20100237398 - Semiconductor storage device and method for manufacturing the same: A semiconductor storage device includes a semiconductor substrate, a first insulator, a laminated insulator including a second insulator having fixed charges more than those of the first insulator, a single-layer insulator, memory cells between the semiconductor substrate and the first insulator, each memory cells separated from an adjacent memory cell... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237401 - Gate structures of semiconductor devices: Gate structures of semiconductor devices and methods of forming gate structures of semiconductor devices are provided. A first insulating pattern may be disposed on an active region of a semiconductor substrate. A data storage pattern may be disposed on the first insulating pattern. A second insulating pattern may be disposed... Agent: Myers Bigel Sibley & Sajovec

20100237400 - Nonvolatile semiconductor memory device: A nonvolatile semiconductor memory device includes: a multilayer body with a plurality of insulating films and electrode films alternately stacked therein; a plurality of select gate electrodes provided on the multilayer body, extending in one direction orthogonal to a stacking direction of the multilayer body, and spaced from each other;... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237399 - Nonvolatile semiconductor storage device and method for manufacturing the same: A semiconductor memory device includes: a semiconductor substrate; a plurality of device isolation regions being disposed in an upper-layer portion of the semiconductor substrate, and dividing the upper-layer portion into a plurality of semiconductor portions extending in a first direction; a plurality of charge storage films which are disposed on... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237402 - Semiconductor memory device having three-dimensionally arranged memory cells, and manufacturing method thereof: A first select transistor is formed on a semiconductor substrate. Memory cell transistors are stacked on the first select transistor and connected in series. A second select transistor is formed on the memory cell transistors. The memory cell transistors include a tapered semiconductor pillar which increases in diameter from the... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100237403 - Zralon films: Atomic layer deposition (ALD) can be used to form a dielectric layer of zirconium aluminum oxynitride (ZrAlON) for use in a variety of electronic devices. Forming the dielectric layer may include depositing zirconium oxide using atomic layer deposition and precursor chemicals, followed by depositing aluminum nitride using precursor chemicals, and... Agent: Schwegman, Lundberg & Woessner/micron

20100237404 - Semiconductor device and a method of manufacturing the same: A semiconductor device having a non-volatile memory is disclosed, whose disturb defect can be diminished or prevented. A memory cell of the non-volatile memory has a memory gate electrode formed over a main surface of a semiconductor substrate through an insulating film for charge storage. A first side wall is... Agent: Miles & Stockbridge PC

20100237405 - Semiconductor device with vertical transistor and method for fabricating the same: A semiconductor device with a vertical transistor includes a plurality of active pillars, a plurality of vertical gates surrounding sidewalls of the active pillars; a plurality of word lines having exposed sidewalls whose surfaces are higher than the active pillars and connecting the adjacent vertical gates together, and a plurality... Agent: Ip & T Law Firm PLC

20100237406 - Semiconductor memory device and manufacturing method thereof: A semiconductor memory device includes a silicon pillar that is provided with a first channel formed in a first area on one side among two sides that are perpendicular to an extension direction of a bit line, a second channel formed in a second area on the other side among... Agent: Young & Thompson

20100237407 - Semiconductor memory device and manufacturing method thereof: To provide a semiconductor memory device comprising a plurality of silicon pillars arranged in a matrix, whose sidewalls are provided with gate electrodes with gate insulating films interposed between the silicon pillars and the gate electrodes and whose top ends are electrically connected to memory elements, and a bit line... Agent: Morrison & Foerster LLP

20100237408 - Recessed channel transistor: A recessed channel transistor includes an isolation layer provided in a semiconductor substrate to define an active region. A trench is provided in the semiconductor substrate to extend across the active region. A gate insulation layer covers a sidewall and a bottom face of the trench and an upper face... Agent: Mills & Onello LLP

20100237409 - Semiconductor component: A semiconductor component resistant to the formation of a parasitic bipolar transistor and a method for manufacturing the semiconductor component using a reduced number of masking steps. A semiconductor material of N-type conductivity having a region of P-type conductivity is provided. A doped region of N-type conductivity is formed in... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100237410 - Ultra-thin semiconductor on insulator metal gate complementary field effect transistor with metal gate and method of forming thereof: A method of forming a semiconductor device is provided that may include providing a semiconductor layer including a raised source and raised drain region that are separated by a recessed channel having a thickness of less than 20 nm, and forming a spacer on a sidewall of the raised source... Agent: Scully, Scott, Murphy & Presser, P.C.

20100237411 - Ldmos with double ldd and trenched drain: A LDMOS with double LDD and trenched drain is disclosed. According to some preferred embodiment of the present invention, the structure contains a double LDD region, including a high energy implantation to form lightly doped region and a low energy implantation thereon to provide a low resistance path for current... Agent: Bacon & Thomas, PLLC

20100237413 - Semiconductor device and method for manufacturing semiconductor device: A semiconductor device has a LOCOS film formed on at least one of a drain side and a source side of a semiconductor substrate surface. A gate oxide film connected to the LOCOS film is formed on the semiconductor substrate surface. A conductive film is formed to cover the gate... Agent: Rabin & Berdo, PC

20100237412 - Semiconductor devices and methods for manufacturing a semiconductor device: In various embodiments, a semiconductor device is provided. The semiconductor device may include a first source/drain region, a second source/drain region, an active region electrically coupled between the first source/drain region and the second source/drain region, a trench disposed between the second source/drain region and at least a portion of... Agent: Viering, Jentschura & Partner

20100237414 - Msd integrated circuits with shallow trench: A trench MOSFET device with embedded Schottky rectifier, gate-drain and gate-source diodes on single chip is formed with shallow trench structure to achieve device shrinkage and performance improvement. The present semiconductor devices achieve low Vf and reverse leakage current for embedded Schottky rectifier, have overvoltage protection for GS clamp diodes... Agent: Bacon & Thomas, PLLC

20100237415 - Semiconductor power device having a top-side drain using a sinker trench: A semiconductor power device includes a plurality of groups of stripe-shaped trenches extending in a silicon region over a substrate, and a contiguous sinker trench completely surrounding each group of the plurality of stripe-shaped trenches so as to isolate the plurality of groups of stripe-shaped trenches from one another. The... Agent: Townsend And Townsend And Crew, LLP

20100237416 - Bottom-drain ldmos power mosfet structure having a top drain strap: Lateral DMOS devices having improved drain contact structures and methods for making the devices are disclosed. A semiconductor device comprises a semiconductor substrate; an epitaxial layer on top of the substrate; a drift region at a top surface of the epitaxial layer; a source region at a top surface of... Agent: Joshua D. Isenberg Jdi Patent

20100237418 - Semiconductor device and method for fabricating the same: It is an object of the present invention to manufacture a thin film transistor having a required property without complicating steps and devices. It is another object of the present invention to provide a technique for manufacturing a semiconductor device having high reliability and better electrical characteristics with a higher... Agent: Robinson Intellectual Property Law Office, P.C.

20100237417 - Through-gate implant for body dopant: The present invention, provides a semiconductor device including a substrate including a semiconductor layer overlying an insulating layer, wherein a back gate structure is present underlying the insulating layer and a front gate structure on the semiconductor layer; a channel dopant region underlying the front gate structure of the substrate,... Agent: Scully, Scott, Murphy & Presser, P.C.

20100237422 - Apparatus and method for controlling diffusion: A method and device for reducing a dopant diffusion rate in a doped semiconductor region is provided. The methods and devices include selecting a plurality of dopant elements. Selection of a plurality of dopant elements includes selecting a first dopant element with a first atomic radius larger than a host... Agent: Schwegman, Lundberg & Woessner/micron

20100237421 - Gated diode structure and method including relaxed liner: A gated diode structure and a method for fabricating the gated diode structure use a relaxed liner that is derived from a stressed liner that is typically used within the context of a field effect transistor formed simultaneously with the gated diode structure. The relaxed liner is formed incident to... Agent: Scully, Scott, Murphy & Presser, P.C.

20100237420 - Semiconductor device: A semiconductor device includes an active region formed in a substrate; an isolation structure formed to surround the active region; and one or more dummy regions formed between the active region and the isolation structure to extend integrally from the active region.... Agent: Ip & T Law Firm PLC

20100237423 - Semiconductor devices including buried bit lines: A semiconductor device includes a plurality of channel structures on a semiconductor substrate. A bit line groove having opposing sidewalls is defined between sidewalls of adjacent ones of the plurality of channel structures. A plurality of bit lines are formed on corresponding ones of the opposing sidewalls, and the plurality... Agent: Myers Bigel Sibley & Sajovec

20100237419 - Static random access memory (sram) cell and method for forming same: In accordance with an embodiment of the present invention, a static random access memory (SRAM) cell comprises a first pull-down transistor, a first pull-up transistor, a first pass-gate transistor, a second pull-down transistor, a second pull-up transistor, a second pass-gate transistor, a first linear intra-cell connection, and a second linear... Agent: Slater & Matsil, L.L.P.

20100237427 - Channelized gate level cross-coupled transistor device with contiguous p-type diffusion regions and contiguous n-type diffusion regions: A semiconductor device includes a substrate having a plurality of diffusion regions defined therein to form first and second p-type diffusion regions, and first and second n-type diffusion regions, with each of these diffusion regions electrically connected to a common node. The first p-type active area and the second p-type... Agent: Martine Penilla & Gencarella, LLP

20100237430 - Channelized gate level cross-coupled transistor device with equal width pmos transistors and equal width nmos transistors: A semiconductor device includes first and second p-type diffusion regions, and first and second n-type diffusion regions that are each electrically connected to a common node. Gate electrodes are formed from conductive features that are each defined within any one gate level channel that is uniquely associated with and defined... Agent: Martine Penilla & Gencarella, LLP

20100237429 - Channelized gate level cross-coupled transistor device with non-overlapping pmos transistors and non-overlapping nmos transistors relative to direction of gate electrodes: First and second PMOS transistors are defined over first and second p-type diffusion regions. First and second NMOS transistors are defined over first and second n-type diffusion regions. Each diffusion region is electrically connected to a common node. Gate electrodes are formed from conductive features that are each defined within... Agent: Martine Penilla & Gencarella, LLP

20100237428 - Channelized gate level cross-coupled transistor device with non-overlapping pmos transistors and overlapping nmos transistors relative to direction of gate electrodes: First and second p-type diffusion regions, and first and second n-type diffusion regions are formed in a semiconductor device. Each diffusion region is electrically connected to a common node. Gate electrodes are formed from conductive features that are each defined within any one gate level channel that is uniquely associated... Agent: Martine Penilla & Gencarella, LLP

20100237425 - High threshold voltage nmos transistors for low power ic technology: Transistors exhibiting different electrical characteristics such as different switching threshold voltage or different leakage characteristics are formed on the same chip or wafer by selectively removing a film or layer which can serve as an out-diffusion sink for an impurity region such as a halo implant and out-diffusing an impurity... Agent: Whitham, Curtis & Christofferson, P.C.

20100237426 - Linear gate level cross-coupled transistor device with cross-coupled transistor gate electrode connections made using linear first interconnect level above gate electrode level: A semiconductor device includes first and second p-type diffusion regions, and first and second n-type diffusion regions that are each electrically connected to a common node. Each of a number of conductive features within a gate electrode level region is fabricated from a respective originating rectangular-shaped layout feature having a... Agent: Martine Penilla & Gencarella, LLP

20100237431 - Reducing transistor junction capacitance by recessing drain and source regions: By recessing portions of the drain and source areas on the basis of a spacer structure, the subsequent implantation process for forming the deep drain and source regions may result in a moderately high dopant concentration extending down to the buried insulating layer of an SOI transistor. Furthermore, the spacer... Agent: Advanced Mirco Devices, Inc. C/o Williams, Morgan & Amerson, P.C.

20100237424 - Replacement gate cmos: A CMOS structure and a method for fabricating the CMOS structure include within a semiconductor substrate a first gate located over a first active region of a first polarity and a second gate located over a second active region of a second polarity different than the first polarity. The first... Agent: Scully, Scott, Murphy & Presser, P.C.

20100237432 - Semiconductor device and method for fabricating the same: A semiconductor device includes a MIS transistor formed in a FET formation region of a semiconductor substrate, a silicon dioxide film formed in a trench provided in the semiconductor substrate to define the FET formation region, a gate insulating film formed over the FET formation region and the silicon dioxide... Agent: Mcdermott Will & Emery LLP

20100237433 - Bipolar/dual fet structure having fets with isolated channels: According to an exemplary embodiment, a bipolar/dual FET structure includes a bipolar transistor situated over a substrate. The bipolar/dual FET structure further includes an enhancement-mode FET and a depletion-mode FET situated over the substrate. In the bipolar/dual FET structure, the channel of the enhancement-mode FET is situated above the base... Agent: Smith Frohwein Tempel Greenlee Blaha LLC

20100237434 - Semiconductor device and method of manufacturing such a device: The invention relates to a semiconductor device (10) with a substrate (11) and a semiconductor body (12) of silicon which comprises an active region (A) with a transistor (T) and a passive region (P) surrounding the active region (A) and which is provided with a buried conducting region (1) of... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100237435 - Method and structure for gate height scaling with high-k/metal gate technology: A method and structure to scale metal gate height in high-k/metal gate transistors. A method includes forming a dummy gate and at least one polysilicon feature, all of which are formed from a same polysilicon layer and wherein the dummy gate is formed over a gate metal layer associated with... Agent: Roberts Mlotkowski Safran & Cole, P.c Intellectual Property Department

20100237436 - Semiconductor device: A semiconductor device includes a circuit comprising a first transistor in a first Fin; a power supply circuit in a second Fin, the power supply circuit comprising a second transistor connected between the circuit and a power supply line; and a substrate contact electrically connected to the semiconductor substrate and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237437 - Semiconductor device: It includes: source finger electrodes (3) disposed by predetermined direction on the main substrate 1; drain finger electrodes (4) placed and disposed a predetermined interval to each of the source finger electrodes (3); gate finger electrodes (2) disposed between the source finger electrodes (3) and the drain finger electrodes (4),... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237438 - Semiconductor device: A semiconductor device has a circuit element region formed on a semiconductor substrate, and a protective pattern formed so as to surround the circuit element region. The protective pattern comprises a first element separation region formed on the semiconductor substrate, a second element separation region formed on the semiconductor substrate... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237439 - High-voltage metal-dielectric-semiconductor device and method of the same: A high-voltage metal-dielectric-semiconductor transistor includes a semiconductor substrate; a trench isolation region in the semiconductor substrate surrounding an active area; a gate overlying the active area; a drain doping region of a first conductivity type in the active area; a source doping region of the first conductivity type in a... Agent: North America Intellectual Property Corporation

20100237440 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a gate insulating film formed on a semiconductor region of a first conductivity type, a gate electrode formed on the gate insulating film and including a polysilicon film of a second conductivity type and a first silicon mixed crystal layer formed on the polysilicon film, a... Agent: Mcdermott Will & Emery LLP

20100237441 - Gated diode with non-planar source region: A gated-diode semiconductor device or similar component and a method of fabricating the device. The device features a gate structure disposed on a substrate over a channel and adjacent a source and a drain. The top of the source or drain region, or both, are formed so as to be... Agent: Slater & Matsil, L.L.P.

20100237444 - Germanium field effect transistors and fabrication thereof: Germanium field effect transistors and methods of fabricating them are described. In one embodiment, the method includes forming a germanium oxide layer over a substrate and forming a metal oxide layer over the germanium oxide layer. The germanium oxide layer and the metal oxide layer are converted into a first... Agent: Slater & Matsil, L.L.P.

20100237443 - Organic thin film transistors and methods of forming the same: Provided is an organic thin film transistor, method of forming the same, and a memory device employing the same. The organic thin film transistor includes a substrate, a source electrode and a drain electrode on the substrate, an active layer on the substrate between the source electrode and the drain... Agent: Rabin & Berdo, PC

20100237442 - Selectively self-assembling oxygen diffusion barrier: A shallow trench isolation structure is formed in a semiconductor substrate adjacent to an active semiconductor region. A selective self-assembling oxygen barrier layer is formed on the surface of the shallow trench isolation structure that includes a dielectric oxide material. The formation of the selective self-assembling oxygen barrier layer is... Agent: Scully, Scott, Murphy & Presser, P.C.

20100237445 - Misfet, semiconductor device having the misfet and method for manufacturing the same: To solve the problem, a MISFET covered with an insulating film which generates stress is provided. The MISFET including a gate insulating film; a gate electrode disposed on the gate insulating film, the gate electrode including a polysilicon portion and a silicide portion; and a source/drain disposed adjacent to the... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100237447 - Mems device and process: A MEMS transducer comprises a substrate (124). A membrane layer (120) is supported by the substrate (124). A back-plate layer (110) is supported by the membrane layer (120), said back-plate layer comprising a respective sidewall portion and a respective raised portion. One or more columns (116) are provided separate from... Agent: Dickstein Shapiro LLP

20100237446 - Thin film encapsulation of mems devices: A method of manufacturing a miniature electromechanical system (MEMS) device includes the steps of forming a moving member on a first substrate such that a first sacrificial layer is disposed between the moving member and the substrate, encapsulating the moving member, including the first sacrificial layer, with a second sacrificial... Agent: Rothwell, Figg, Ernst & Manbeck, P.C.

20100237449 - Magnetoresistive element, and magnetic random access memory: A magnetoresistive element is provided with a first magnetization free layer; a second magnetization free layer; a non-magnetic layer disposed adjacent to the second magnetization free layer; and a first magnetization fixed layer disposed adjacent to the second magnetization free layer on an opposite side of the second magnetization free... Agent: Mr. Jackson Chen

20100237448 - Semiconductor memory device including magnetic tunnel junction element and fabrication method therefor: A method for fabricating a semiconductor memory device. An interlayer dielectric layer is formed over a semiconductor substrate including a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) as a cell transistor and a plurality of contact plugs in contact with source and drain regions of the cell transistor. A plurality of openings exposing... Agent: Ip & T Law Firm PLC

20100237450 - Arrangements for an integrated sensor: An integrated circuit can have a first substrate supporting a magnetic field sensing element and a second substrate supporting another magnetic field sensing element. The first and second substrates can be arranged in a variety of configurations. Another integrated circuit can have a first magnetic field sensing element and second... Agent: Daly, Crowley, Mofford & Durkee, LLP

20100237453 - Optoelectronic device: The invention is an optoelectronic device comprising an active portion which converts light to electricity or converts electricity to light, the active portion having a front side for the transmittal of the light and a back side opposite from the front side, at least two electrical leads to the active... Agent: The Dow Chemical Company

20100237452 - Semiconductor device and backside illumination solid-state imaging device: A semiconductor substrate has a first principal face and a second principal face opposite thereto. A pixel unit, an analog circuit and a digital circuit are formed in a first, second and third region of the semiconductor substrate. An interconnect is formed on each of the first and second principal... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237451 - Solid-state imaging device and method for manufacturing same: In a back-illuminated solid-state imaging device, a multilayer interconnect layer, a semiconductor substrate, a plurality of color filters, and a plurality of microlenses are provided in this order. A p-type region is formed so as to partition a lower portion of the semiconductor substrate into a plurality of regions, and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237454 - Light-receiving device and method for manufacturing light-receiving device: A light-receiving device includes a light-receiving part 11 that is formed in a semiconductor substrate 10 of a first conductivity type and has a first region 21 of a second conductivity type opposite to the first conductivity type, and a second region 22 of the second conductivity type that is... Agent: Sonnenschein Nath & Rosenthal LLP

20100237455 - Phototransistor having a buried collector: A phototransistor used for an image sensor is provided. The phototransistor can reduce a dark current that occurs in the phototransistor and improve sensitivity at low luminance without crosstalk with a neighboring pixel or an image lag by including a buried collector. In the phototransistor including the buried collector, since... Agent: Jae Y. Park

20100237456 - Semiconductor device and method for its manufacture: A semiconductor system having a trench MOS barrier Schottky diode, having an integrated substrate PN diode as a clamping element (TMBS-ub-PN), suitable in particular as a Zener diode having a breakdown voltage of approximately 20V for use in a vehicle generator system, the TMBS-sub-PN being made up of a combination... Agent: Kenyon & Kenyon LLP

20100237457 - Semiconductor device: A semiconductor device includes: a semiconductor layer having a first end portion and a second end portion; a first main electrode provided on the first end portion and electrically connected to the semiconductor layer; a second main electrode provided on the second end portion and electrically connected to the semiconductor... Agent: Patterson & Sheridan, L.L.P.

20100237458 - Semiconductor substrate and method for manufacturing the same: A semiconductor device and a method for manufacturing thereof are provided. The method includes a step of forming a first insulating film containing silicon and oxygen as its composition over a single-crystal semiconductor substrate, a step of forming a second insulating film containing silicon and nitrogen as its composition over... Agent: Robinson Intellectual Property Law Office, P.C.

20100237459 - Process for manufacturing a wafer by annealing of buried channels: A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.... Agent: Graybeal Jackson LLP

20100237460 - Methods and systems involving electrically programmable fuses: An electrically programmable fuse comprising a cathode member, an anode member, and a link member, wherein the cathode member, the anode member, and the link member each comprise one of a plurality of materials operative to localize induced electromigration in the programmable fuse.... Agent: Cantor Colburn LLP - IBM Fishkill

20100237461 - Semiconductor package substrate including fuses, semiconductor device package, semiconductor module and electronic apparatus including the same: A semiconductor device package, and a semiconductor module and an electronic apparatus including the semiconductor device package are provided. The semiconductor device package includes a package substrate, first pads and second pads disposed on a first surface of the package substrate and fuses corresponding to the second pads, the fuses... Agent: Sughrue Mion, PLLC

20100237462 - Package level tuning techniques for propagation channels of high-speed signals: Various semiconductor chip carrier substrate circuit tuning apparatus and methods are disclosed. In one aspect, a method of manufacturing is provided that includes assembling a semiconductor chip carrier substrate with a first input/output site adapted to electrically connect to an external component and a second input/output site adapted to electrically... Agent: Timothy M Honeycutt Attorney At Law

20100237465 - Capacitor and a method of manufacturing a capacitor: The second plate of the second MiM capacitor is substantially co-extensive with the second plate of the first MiM capacitor, and is disposed substantially directly over the second plate of the first MiM capacitor. The same mask may be used to pattern the second plate of the second MiM capacitor... Agent: Snell & Wilmer L.L.P. (main)

20100237464 - Chip inductor with frequency dependent inductance: A set of metal line structures including a signal transmission metal line and a capacitively-grounded inductively-signal-coupled metal line is embedded in a dielectric material layer. A capacitor is serially connected between the capacitively-grounded inductively-signal-coupled metal line and a local electrical ground, which may be on the input side or on... Agent: Scully, Scott, Murphy & Presser, P.C.

20100237463 - Selective fabrication of high-capacitance insulator for a metal-oxide-metal capacitor: Methods and devices of a capacitor in a semiconductor device having an increased capacitance are disclosed. In a particular embodiment, a method of forming a capacitor is disclosed. A section of a first insulating material between a first metal contact element and a second metal contact element is removed to... Agent: Qualcomm Incorporated

20100237466 - Semiconductor devices: A semiconductor device includes a lower electrode, a supporting member enclosing at least an upper portion of the lower electrode, a dielectric layer on the lower electrode and the supporting member, and an upper electrode disposed on the dielectric layer. The supporting member may have a first portion that extends... Agent: Volentine & Whitt PLLC

20100237467 - Interconnect structures, methods for fabricating interconnect structures, and design structures for a radiofrequency integrated circuit: Interconnect structures that include a passive element, such as a thin film resistor or a metal-insulator-metal (MIM) capacitor, methods for fabricating an interconnect structure that includes a passive element, and design structures embodied in a machine readable medium for designing, manufacturing, or testing an integrated circuit, such as a radiofrequency... Agent: Wood, Herron & Evans, LLP (ibm-bur)

20100237468 - On-chip capacitors with a variable capacitance for a radiofrequency integrated circuit: On-chip capacitors with a variable capacitance, as well as design structures for a radio frequency integrated circuit, and method of fabricating and method of tuning on-chip capacitors. The on-chip capacitor includes first and second ports powered with opposite polarities, first and second electrodes, and first and second voltage-controlled units. Each... Agent: Wood, Herron & Evans, LLP (ibm-bur)

20100237470 - Epitaxial wafer: An epitaxial wafer is provided capable of eliminating particles in a device process, particles being generated from scratches in a boundary area between a rear surface and a chamfered surface of a wafer. The number of scratches in the boundary area between the rear surface and the chamfered surface is... Agent: Greenblum & Bernstein, P.L.C

20100237469 - Photomask, semiconductor device, and charged beam writing apparatus: A photomask has a pattern formed by writing of a charged beam on basis of a charged beam control data. The charged beam control data is produced by: setting a plurality of correction points in a writing area on pattern data; performing a simulation of writing with a charged beam... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100237472 - Chip guard ring including a through-substrate via: At least one through-substrate via is formed around the periphery of a semiconductor chip or a semiconductor chiplet included in a semiconductor chip. The at least one through-substrate via may be a single through-substrate via that laterally surrounds the semiconductor chip or the semiconductor chiplet, or may comprise a plurality... Agent: Scully, Scott, Murphy & Presser, P.C.

20100237471 - Semiconductor die and method of forming through organic vias having varying width in peripheral region of the die: A plurality of semiconductor die is mounted to a carrier separated by a peripheral region. An insulating material is deposited in the peripheral region. A first opening is formed in the insulating material of the peripheral region to a first depth. A second opening is formed in the insulating material... Agent: Robert D. Atkins

20100237473 - Semiconductor device and semiconductor package having the same: A semiconductor device having no voids and a semiconductor package using the same is described. The semiconductor device includes a semiconductor chip having a circuit section which is formed in a first area and a peripheral section which is formed in a second area defined around the first area, and... Agent: Ladas & Parry LLP

20100237474 - Unpolished semiconductor wafer and method for producing an unpolished semiconductor wafer: Unpolished semiconductor wafers are produced by: (a) pulling a single crystal of a semiconductor material, (b) grinding the single crystal round, (c) separating a semiconductor wafer from this crystal, (d) rounding the edge of the semiconductor wafer, (e) surface-grinding at least one side of the semiconductor wafer, (f) treating the... Agent: Brooks Kushman P.C.

20100237475 - Neutralization of trapped charge in a charge accumulation layer of a semiconductor structure: A semiconductor structure. The semiconductor structure includes a semiconductor layer, a charge accumulation layer on top of the semiconductor layer, a doped region in direct physical contact with the semiconductor layer; and a device layer on and in direct physical contact with the charge accumulation layer. The charge accumulation layer... Agent: Schmeiser, Olsen & Watts

20100237476 - Low dielectric constant films and manufacturing method thereof, as well as electronic parts using the same: While a fine porous diamond particle film has been known as a high heat resistant and low dielectric constant film and also has high mechanical strength and heat conductivity, and is expected as an insulating film for multi-layered wirings in semiconductor integrated circuit devices, it is insufficient in current-voltage characteristic... Agent: Oliff & Berridge, PLC

20100237477 - Semiconductor device and method of mounting pre-fabricated shielding frame over semiconductor die: A semiconductor device includes a pre-fabricated shielding frame mounted over a sacrificial substrate and semiconductor die. An encapsulant is deposited through an opening in the shielding frame around the semiconductor die. A first portion of the shielding frame to expose the encapsulant. Removing the first portion also leaves a second... Agent: Robert D. Atkins

20100237478 - Lead frame and semiconductor package having the same: Provided is a lead frame that may include a frame, a lead structure, and a dam bar. The frame may include a plurality of openings configured to receive semiconductor chips. The lead structure may be in the openings. The lead structure may also include inner leads and outer leads. The... Agent: Harness, Dickey & Pierce, P.L.C

20100237479 - Lead frame based, over-molded semiconductor package with integrated through hole technology (tht) heat spreader pin(s) and associated method of manufacturing: A method and apparatus are provided for manufacturing a lead frame based, over-molded semiconductor package (7) with an exposed pad or power die flag (70) having multiple integrated THT heat spreader pins (71) configured for insertion into one or more vias (77) formed in a printed circuit board (78). The... Agent: Hamilton & Terrile, LLP - Freescale

20100237480 - Semiconductor device and wire bonding method: A semiconductor device has a first layer pressing portion that is formed by crushing a ball neck formed by bonding an initial ball onto a first layer pad of a first layer semiconductor die and pressing the side of a wire folded onto the crushed ball neck, a first wire... Agent: Katten Muchin Rosenman LLP

20100237481 - Integrated circuit packaging system with dual sided connection and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: attaching an integrated circuit having a through via over a substrate with the through via coupled to the substrate; attaching a conductive support over the substrate and adjacent to the integrated circuit; forming an encapsulation over the substrate with... Agent: Law Offices Of Mikio Ishimaru

20100237483 - Integrated circuit packaging system with an interposer and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: mounting a device over an integrated circuit having a through via; attaching an interposer, having an opening, and the integrated circuit with the device within the opening; and forming an encapsulation at least partially covering the integrated circuit and... Agent: Law Offices Of Mikio Ishimaru

20100237482 - Integrated circuit packaging system with layered packaging and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: forming a base package having a base interposer; forming an intermediate package having an intermediate interposer and an intermediate package embedded link trace, the intermediate package embedded link trace being encapsulated in an intermediate package mold compound; forming a... Agent: Law Offices Of Mikio Ishimaru

20100237484 - Semiconductor package: Provided is a semiconductor package including a first package and a second package. The first package includes a first substrate having a first front side and a first back side opposing the first front side. The first package further includes a first semiconductor chip on the first front side and... Agent: Harness, Dickey & Pierce, P.L.C

20100237485 - Stack type semiconductor package apparatus: A semiconductor device includes a first semiconductor package having at least one first semiconductor chip and a first sealing member covering the at least one first semiconductor chip, a second semiconductor package stacked on the first semiconductor package, the second semiconductor package having at least one second semiconductor chip, leads... Agent: F. Chau & Associates, LLC

20100237488 - Integrated circuit package system including honeycomb molding: A method of manufacture of an integrated circuit package system includes: providing a substrate with a top surface; configuring the top surface to include electrical contacts; attaching an integrated circuit to the top surface; and depositing a material to prevent warpage of the substrate on the top surface of the... Agent: Law Offices Of Mikio Ishimaru

20100237487 - Methods and systems for packaging integrated circuits: Panel level methods and systems for packaging integrated circuits are described. In a method aspect of the invention, a substrate formed from a sacrificial semiconductor wafer is provided having a plurality of metallized device areas patterned thereon. Each device area includes an array of metallized contacts. Dice are mounted onto... Agent: Beyer Law Group LLP/ Nsc

20100237486 - Semiconductor device: A semiconductor device including: a base substrate; a frame body mounted on the base substrate and formed with a recessed portion in each of both side faces thereof opposing to each other; a semiconductor chip mounted on the base substrate within an area of the frame body; a dielectric block... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237490 - Package structure and manufacturing method thereof: A package structure and a manufacturing method thereof are provided. The package structure includes a packaging substrate, a chip, an interposer substrate, a wire and an adhesive layer. The packaging substrate has an upper packaging surface. The chip is disposed on the upper packaging surface. The wire connects the packaging... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100237494 - Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices: Microelectronic devices and method of forming a plurality of microelectronic devices on a semiconductor workpiece are disclosed herein. One such method includes placing a plurality of first interconnect elements on a side of a semiconductor workpiece, forming a layer on the side of the workpiece, reshaping the first interconnect elements... Agent: Perkins Coie LLP Patent-sea

20100237493 - Printed circuit board and electronic apparatus having a printed circuit board: A printed circuit board including: a semiconductor package including a main body including a substantially rectangular parallelepiped shape, and a plurality of solder balls on one face of the main body; a board including a first face, a second face, and a hole portion, the first face including a mounting... Agent: Knobbe Martens Olson & Bear LLP

20100237492 - Semiconductor device and method for designing the same: The semiconductor device comprises a semiconductor chip and a printed wiring board having a recess in which the semiconductor chip is housed face-down, wherein the printed wiring board comprises multiple wiring layers below a circuit surface of the semiconductor chip on which connection terminals are formed, and the multiple wiring... Agent: Mr. Jackson Chen

20100237491 - Semiconductor package with reduced internal stress: A semiconductor package may include a semiconductor chip having a plurality of chip pads arranged apart from each other on a substrate body and an insulation layer having chip pad-exposing portions for exposing chip pads. The insulation layer may be separated by underlying layer-exposing portions between the chip pads, and... Agent: Lee & Morse, P.C.

20100237489 - Structure and method for sealing cavity of micro-electro-mechanical device: A cavity package (100) for micrometer-scale MEMS devices surrounding the cavity (210) with the MEMS device (220) with a rim (232) of solder-wettable metal, and then covering the cavity with a roof (240) of solder spanning from rim to rim. A solder body, placed over the cavity to rest on... Agent: Texas Instruments Incorporated

20100237495 - Semiconductor device and method of providing z-interconnect conductive pillars with inner polymer core: A semiconductor device is made by providing a sacrificial substrate and depositing an adhesive layer over the sacrificial substrate. A first conductive layer is formed over the adhesive layer. A polymer pillar is formed over the first conductive layer. A second conductive layer is formed over the polymer pillar to... Agent: Robert D. Atkins

20100237496 - Thermal interface material with support structure: Various semiconductor chip thermal interface material methods and apparatus are disclosed. In one aspect, a method of establishing thermal contact between a first semiconductor chip and a heat spreader is provided. The method includes placing a thermal interface material layer containing a support structure on the first semiconductor chip. The... Agent: Timothy M Honeycutt Attorney At Law

20100237497 - Semiconductor device and method of manufacturing the same: There are included a semiconductor substrate provided with a desirable element region, an electrode pad formed to come in contact with a surface of the semiconductor substrate or a wiring layer provided on the surface of the semiconductor substrate, a bonding pad formed on a surface of the electrode pad... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20100237498 - Package for semiconductor device and packaging method thereof: A semiconductor device package and a method thereof are able to reliably package a semiconductor device on a substrate without using flux. The semiconductor device package includes a semiconductor device and a substrate reciprocally disposed with respect to the semiconductor device, wherein the substrate includes a side reciprocal to the... Agent: Hosoon Lee

20100237499 - Semiconductor device, and stacked structure, package, module, and electronic apparatus including the same, and method of fabricating the same: Semiconductor devices, as well as stacked structures, packages, modules, and electronic apparatus including the semiconductor device, and methods of fabricating the same. The semiconductor device includes a circuit layer on a substrate, a metal interconnection layer on the circuit layer, the metal interconnection layer having a copper interconnection and a... Agent: Stanzione & Kim, LLP

20100237501 - Semiconductor device and method for manufacturing the same: A method for manufacturing a semiconductor device includes forming an insulating film including silicon, oxygen, carbon and hydrogen above a semiconductor substrate, forming a wiring trench in the insulating film, forming a metal film to be a metal wiring on the insulating film such that the metal film is provided... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237500 - Semiconductor substrate and method of forming conformal solder wet-enhancement layer on bump-on-lead site: A semiconductor substrate includes a first conductive layer formed over the semiconductor substrate. The first conductive layer has first and second portions which are electrically isolated during formation of the first conductive layer. A solder resist layer is formed over the first conductive layer and semiconductor substrate. An opening is... Agent: Robert D. Atkins

20100237502 - Barrier for through-silicon via: A system and a method for protecting through-silicon vias (TSVs) is disclosed. An embodiment comprises forming an opening in a substrate. A liner is formed in the opening and a barrier layer comprising carbon or fluorine is formed along the sidewalls and bottom of the opening. A seed layer is... Agent: Slater & Matsil, L.L.P.

20100237503 - Electromigration resistant aluminum-based metal interconnect structure: A vertical metallic stack, from bottom to top, of an elemental metal liner, a metal nitride liner, a Ti liner, an aluminum portion, and a metal nitride cap, is formed on an underlying metal interconnect structure. The vertical metallic stack is annealed at an elevated temperature to induce formation of... Agent: Scully, Scott, Murphy & Presser, P.C.

20100237504 - Methods of fabricating semiconductor devices having conductive wirings and related flash memory devices: A conductive wiring for a semiconductor device is provided including a semiconductor substrate and a plurality of lower conductive structures on the semiconductor substrate. An insulating layer is provided that electrically insulates the plurality of lower conductive structures from one another. A first insulation interlayer pattern is provided on the... Agent: Myers Bigel Sibley & Sajovec

20100237505 - Metal-metal bonding of compliant interconnect: Embodiments of the invention provide a first component with a compliant interconnect bonded to a second component with a land pad by a metal to metal bond. In some embodiments, the first component may be a microprocessor die and the second component a package substrate.... Agent: Intel Corporation C/o Cpa Global

20100237507 - Power module: A power module includes a pair of power devices that are stacked with a plate-shaped output electrode arranged therebetween, and an N-electrode and a P-electrode that are stacked with the pair of power devices arranged therebetween. The output electrode is anisotropic such that the thermal conductivity in a direction orthogonal... Agent: Oliff & Berridge, PLC

20100237506 - Semiconductor device and manufacturing method thereof: A semiconductor device and manufacturing method. One embodiment provides a device including a semiconductor chip. A first conductor line is placed over the semiconductor chip. An external contact pad is placed over the first conductor line. At least a portion of the first conductor line lies within a projection of... Agent: Dicke, Billig & Czaja

20100237508 - Power-supply wiring structure for multilayer wiring and method of manufacturing multilayer wiring: A power-supply wiring structure for a multilayer wiring according to an embodiment of the present invention includes one intermediate wiring layer with a first direction set as a priority wiring direction including a position converting and connecting wire, which has crossing-position forming sections formed in crossing positions of upper-layer power... Agent: Turocy & Watson, LLP

20100237509 - Io cell with multiple io ports and related techniques for layout area saving: An IO cell with multiple IO ports and related techniques are provided. The IO cell has a plurality of IO ports for transmitting signal of a same IO pin, and each IO port corresponds to a predetermined region for containing an IO pad, wherein at least one of the plural... Agent: Wpat, PC Intellectual Property Attorneys

20100237510 - Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices: Packaged microelectronic devices and methods of manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a method of manufacturing a microelectronic device includes forming a stand-off layer over a plurality of microelectronic dies on a semiconductor workpiece, and removing selected portions of the stand-off layer to form a plurality... Agent: Perkins Coie LLP Patent-sea

20100237511 - Structure and method for thin single or multichip semiconductor qfn packages: A semiconductor device has one or more semiconductor chips with active and passive surfaces, wherein the active surfaces include contact pads. The device further has a plurality of metal segments separated from the chip by gaps; the segments have first and second surfaces, wherein the second surfaces are coplanar with... Agent: Texas Instruments Incorporated

20100237512 - Semiconductor memory device: A semiconductor memory device includes a cell array layer including a first and a second wiring, which cross each other; a third wiring formed on a first wiring layer below the cell array layer; a fourth wiring formed on a second wiring layer above the cell array layer; and a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100237513 - Applications of smart polymer composites to integrated circuit packaging: Applications of smart polymer composites to integrated circuit packaging.... Agent: Intel Corporation C/o Cpa Global

20100237514 - Ingot marking for solar cell determination: The invention relates to a method for marking wafers, in particular wafers for solar cell production: The method comprises the steps of manufacturing a position line (21a, 21b, 21c) on a peripheral surface of a silicon ingot or column, the ingot or column extending in an axial direction and having... Agent: Townsend And Townsend And Crew, LLP

20100230653 - Phase-change memory element and method for fabricating the same: A phase-change memory element is provided. The phase-change memory element includes: a first electrode formed on a substrate; a first dielectric layer, with an opening, formed on the first electrode, wherein the opening exposes a top surface of the first electrode; a pillar structure formed directly on the first electrode... Agent: Quintero Law Office, PC

20100230654 - Resistive memory cell fabrication methods and devices: A phase change memory cell and methods of fabricating the same are presented. The memory cell includes a variable resistance region and a top and bottom electrode. The shapes of the variable resistance region and the top electrode are configured to evenly distribute a current with a generally hemispherical current... Agent: Thomas J. D'amico Dickstein Shapiro LLP

20100230655 - Variable resistance device, method for manufacturing variable resistance device, and semiconductor storage device using variable resistance device: A variable resistance device includes a first electrode including a transition metal nitride film, a second electrode including a precious metal or a precious metal oxide, and a transition metal oxide film interposed between the first and second electrodes.... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100230656 - Light emitting structure and method of manufacture thereof: A semiconductor structure having an electrically conducting silicon substrate and a GaN semiconductor device separated from the substrate by a buffer layer is provided. The buffer layer electrically connects the silicon substrate with the GaN semiconductor device. In addition, a GaN LED arranged in a flip chip orientation on the... Agent: Withrow & Terranova, P.l.l.c.

20100230657 - Nitride semiconductor light emitting device: The invention provides a highly reliable nitride semiconductor light emitting device improved in electrostatic discharge withstand voltage. In the light emitting device, an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer are sequentially formed on a substrate. The active layer features a multiple quantum well... Agent: Mcdermott Will & Emery LLP

20100230658 - Apparatus and methods for improving parallel conduction in a quantum well device: Embodiments of an apparatus and methods of providing a quantum well device for improved parallel conduction are generally described herein. Other embodiments may be described and claimed.... Agent: Intel Corporation C/o Cpa Global

20100230666 - Amine-type polymeric compound, and light-emitting element comprising the same: Disclased is a polymeric compound having a constitutional unit represented by formula (1a), wherein ring A and ring B independently represent an aromatic hydrocarbon ring which may have a substituent; R1 represents a group represented by formula (2); and R2 represents an aryl group or a monovalent aromatic heterocyclic group... Agent: Sughrue Mion, PLLC

20100230661 - Charge generation layer doped with dihalogen ether: The presently disclosed embodiments relate generally to layers that are useful in imaging apparatus members and components, for use in electrostatographic, including digital, apparatuses. More particularly, the embodiments pertain to an improved electrostatographic imaging member incorporating dihalogen ether into the charge generating layer which results in increased photosensitivity of the... Agent: Pillsbury Winthrop Shaw Pittman, LLP Xerox Corporation

20100230660 - Compound having pyridoindole ring structure having substituted pyridyl group attached thereto, and organic electroluminescence element: wherein Ar represents a substituted or unsubstituted aromatic hydrocarbon group, a substituted or unsubstituted aromatic heterocyclic group, or a substituted or unsubstituted condensed polycyclic aromatic group; R1 to R10 may be the same or different from one another and each independently represents a hydrogen atom, a fluorine atom, a cyano... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100230670 - Device containing compound having indolocarbazole moiety and divalent linkage: An electronic device including a compound comprising at least one type of an optionally substituted indolocarbazole moiety and at least one divalent linkage.... Agent: Fay Sharpe / Xerox - Rochester

20100230665 - Device, method and system for lighting: It is presented an organic LED device 101 with, when in use, a predetermined pattern on its light emitting parts. The organic LED device 101 comprises an anode 105, a cathode 103, and an organic light emitting layer 107. The organic light emitting layer 107 is configured to emit light,... Agent: Philips Intellectual Property & Standards

20100230669 - Display device and method for manufacturing thereof: It is a problem to provide an electric apparatus less in consumption power and long in life by the manufacture using the display device. An insulating bank is provided in a form surrounding the pixel portions on first electrodes over a substrate. The entire surface is applied, by a wet... Agent: Husch Blackwell Sanders, LLP Husch Blackwell Sanders LLP Welsh & Katz

20100230664 - Light emitting device and method of manufacturing the same: To provide a light emitting device high in reliability with a pixel portion having high definition with a large screen. According to a light emitting device of the present invention, on an insulator (24) provided between pixel electrodes, an auxiliary electrode (21) made of a metal film is formed, whereby... Agent: Fish & Richardson P.C.

20100230667 - Light transmitting substrate, method for manufacturing light transmitting substrate, organic led element and method for manufacturing organic led element: The present invention is intended to provide an organic LED element in which the extraction efficiency is improved up to 80% of emitted light, and provides a translucent substrate comprising a translucent glass substrate; a scattering layer formed on the glass substrate and comprising a glass which contains a base... Agent: Foley And Lardner LLP Suite 500

20100230659 - Optical devices and their manufacture: wherein each R is the same or different and is independently H or a substituent group; n is O or an integer from 1 to 100; Ar and Ar′ are the same or different and are each aromatic or heteroaromatic groups which are substituted or unsubstituted; Y is a direct... Agent: Marshall, Gerstein & Borun LLP

20100230668 - Organic light-emitting device with field-effect enhanced mobility: A two-terminal organic light-emitting device structure is presented with low absorption losses and high current densities. Light generation and emission occur at a predetermined distance from any metallic contact, thereby reducing optical absorption losses. High current densities and thus high emitted light intensity are achieved by combining two types of... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20100230662 - Organic thin film transistor, method of fabricating the same, and gate insulating layer used in the same: An organic thin film transistor is disclosed, which comprises an azole-metal complex compound used as the gate insulating layer. The method of making the self-assembled gate insulating layer is a water-based processing method that enables the azole-metal complex compound to be self-formed on the patterned gate electrode in a water-based... Agent: Bacon & Thomas, PLLC

20100230663 - Star-shaped oligothiophene-arylene derivatives and organic thin film transistors using the same: A star-shaped oligothiophene-arylene derivative in which an oligothiophene having p-type semiconductor characteristics is bonded to an arylene having n-type semiconductor characteristics positioned in the central moiety of the molecule and forms a star shape with the arylene, thereby simultaneously exhibiting both p-type and n-type semiconductor characteristics. Further, an organic thin... Agent: Harness, Dickey & Pierce, P.L.C

20100230671 - Zno-based semiconductor and zno-based semiconductor device: Provided are a ZnO-based semiconductor capable of alleviating the self-compensation effect and of achieving easier conversion into p-type, and a ZnO-based semiconductor device. The ZnO-based semiconductor includes a nitrogen-doped MgXZn1-XO (0<X<1) crystalline material. The ZnO-based semiconductor is subjected to a photoluminescence measurement performed at an absolute temperature of 12 Kelvin,... Agent: Rabin & Berdo, PC

20100230672 - Production of integrated circuits comprising different components: It is described a method for producing an integrated circuit element comprising a first electric component of a first type and a second electric component of a second type, wherein the two components require different measurement conditions for testing the components as to be defective or as to be defect... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100230673 - semiconductor fuse structure and a method of manufacturing a semiconductor fuse structure: The invention relates to a semiconductor fuse structure comprising a substrate (1) having a surface, the substrate (1) having a field oxide region (3) at the surface, the fuse structure further comprising a fuse body (FB), the fuse body (FB) comprising polysilicon (PLY), the fuse body (FB) lying over the... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100230674 - Method for forming non-aligned microcavities of different depths: The invention relates to a method for forming microcavities (118) of different depths in a layer (102) based on at least an amorphous or monocrystalline material, comprising at least the following steps in which: at least one shaft and/or trench is formed in the layer (102) so as to extend... Agent: Nixon Peabody LLP

20100230675 - Display device: A display device having a photosensor which exhibits excellent photoelectric conversion efficiency is provided. In a display device which forms photosensors on a substrate thereof, the photosensor is formed by sequentially stacking a gate electrode, a gate insulation film and a semiconductor layer in such an order or in an... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100230678 - Semiconductor device and manufacturing method thereof: A space is provided under part of a semiconductor layer. Specifically, a structure in which an eaves portion (a projecting portion, an overhang portion) is formed in the semiconductor layer. The eaves portion is formed as follows: a stacked-layer structure in which a conductive layer, an insulating layer, and a... Agent: Robinson Intellectual Property Law Office, P.C.

20100230676 - Tft array substrate and method for manufacturing the same: A TFT array substrate includes a substrate, at least one gate line and gate electrode, a gate insulating layer, and at least one channel component, source electrode, drain electrode and data line. The gate line and gate electrode are disposed on the substrate, wherein both of the gate line and... Agent: Lowe Hauptman Ham & Berner, LLP

20100230677 - Thin film transistor and manufacturing method thereof: A thin film transistor in which deterioration at initial operation is not likely to be caused and a manufacturing method thereof. A transistor which includes a gate insulating layer at least whose uppermost surface is a silicon nitride layer, a semiconductor layer over the gate insulating layer, and a buffer... Agent: Nixon Peabody, LLP

20100230682 - Array substrate and method of manufacturing the same: The present invention provides an array substrate comprising: a substrate, having a thin film transistor (TFT) formed thereupon, the TFT having a gate electrode, a source electrode and a drain electrode; a first metal layer, formed on the substrate, and comprising a gate line and the gate electrode of the... Agent: Ladas & Parry LLP

20100230679 - Contact portion of wire and manufacturing method thereof: A contact portion of wiring and a method of manufacturing the same are disclosed. A contact portion of wiring according to an embodiment includes: a substrate; a conductive layer disposed on the substrate; an interlayer insulating layer disposed on the conductive layer and having a contact hole; a metal layer... Agent: Haynes And Boone, LLPIPSection

20100230681 - Display unit: A display unit with which lowering of long-term reliability of a transistor is decreased is provided. The display unit includes a display section having a plurality of organic EL devices with light emitting color different from each other and a plurality of pixel circuits that are singly provided for every... Agent: Lerner, David, Littenberg, Krumholz & Mentlik

20100230680 - Liquid crystal display device including common electrode and reference electrode: A liquid crystal display includes; a first substrate, a gate line disposed on the first substrate, a data line intersecting the gate line, a thin film transistor connected to the gate line and the data line, a pixel electrode connected to the thin film transistor, an interlayer insulating layer disposed... Agent: Cantor Colburn, LLP

20100230683 - Thin film transistor, manufacturing method thereof, display device, and manufacturing method thereof: Disclosed is a manufacturing method of a thin film transistor, which enables the formation of a thin film transistor by using only one photomask. The method includes: over a substrate sequentially forming a first insulating film, a first conductive film, a second insulating film, a semiconductor film, an impurity semiconductor... Agent: Fish & Richardson P.C.

20100230687 - Iii nitride electronic device and iii nitride semiconductor epitaxial substrate: In a group III nitride hetero junction transistor 11a, a second AlY1InY2Ga1-Y1-Y2N layer 15 forms a hetero junction 21 with a first AlX1InX2Ga1-X1-X2N layer 13a. A first electrode 17 forms a Schottky junction with the first AlX1InX2Ga1-X1-X2N layer 13a. The first AlX1InX2Ga1-X1-X2N layer 13a and the second AlY1InY2Ga1-Y1-Y2N layer 15... Agent: Venable LLP

20100230686 - Light emitting device: Disclosed are a light emitting device and a method of manufacturing the same. The light emitting device includes a plurality of compound semiconductor layers that includes a first conductive semiconductor layer, an active layer under the first conductive semiconductor layer, and a second conductive semiconductor layer under the active layer.... Agent: Ked & Associates, LLP

20100230685 - Light emitting device, light emitting device package and lighting system including the same: Provided are a light emitting device, a light emitting device package and a lighting system including the same. The light emitting device (LED) comprises a light emitting structure comprising a second conductive type semiconductor layer, an active layer, and a first conductive type semiconductor layer and a first electrode over... Agent: Ked & Associates, LLP

20100230684 - Semiconductor device: A semiconductor device includes a channel layer, an electron-supplying layer provided on the channel layer, a cap layer provided on the electron-supplying layer and creating lattice match with the channel layer, and ohmic electrodes provided on the cap layer. The cap layer has a composition of (InyAl1-y)zGa1-zN (0≦y≦1, 0≦z≦1). The... Agent: Young & Thompson

20100230688 - Light-emitting element, light-emitting device, display, and electronic equipment: Provided is a light-emitting element including a cathode; an anode; a first light-emitting layer that is disposed between the cathode and the anode and emits in a first color; a second light-emitting layer that is disposed between the first light-emitting layer and the cathode and emits in a second color... Agent: Oliff & Berridge, PLC

20100230689 - Novel metal core multi-led smd package and method of producing the same: A new SMD (surface mount devices) package design for efficiently removing heat from LED Chip(s) is involved in this invention. Different from the regular SMD package, which electrical isolated materials like Alumina or AlN are used, the substrate material here is metal like Copper, Aluminum and so on. Also, different... Agent: Daxi Xiong

20100230690 - Group iii nitride semiconductor device, epitaxial substrate, and method of fabricating group iii nitride semiconductor device: A group III nitride semiconductor device having a gallium nitride based semiconductor film with an excellent surface morphology is provided. A group III nitride optical semiconductor device 11a includes a group III nitride semiconductor supporting base 13, a GaN based semiconductor region 15, an active layer active layer 17, and... Agent: Venable LLP

20100230691 - Ferrous-metal-alkaline-earth-metal silicate mixed crystal phosphor and light emitting device using the same: A ferrous-metal-alkaline-earth-metal mixed silicate based phosphor is used in form of a single component or a mixture as a light converter for a primarily visible and/or ultraviolet light emitting device. The phosphor has a rare earth element as an activator. The rare earth element is europium (Eu). Alternatively, the phosphor... Agent: Mcginn Intellectual Property Law Group, PLLC

20100230692 - Lamp and production method of lamp: The present invention provides a lamp comprising a substrate composed of a base substrate and a covering member which are made of an inorganic insulator and are joined through a joining metal layer; and a semiconductor light emitting device mounted on said substrate, wherein a concave portion is provided in... Agent: Sughrue Mion, PLLC

20100230695 - Led package structure: An LED package structure includes an LED chip, an internal transparent colloidal layer, a fluorescent colloidal layer, and an external transparent colloidal layer. The internal transparent colloidal layer is interposed between the LED chip (such as a blue-light LED chip) and the fluorescent colloidal layer (such as a yellow fluorescent... Agent: Bacon & Thomas, PLLC

20100230704 - Light emitting apparatus, and method for manufacturing the same, and lighting system: A light emitting apparatus includes: a substrate including a first conductive type impurity; a first heatsink and a second heatsink on a first region and a second region of the substrate; second conductive type impurity regions on the substrate and electrically connected to the first heatsink and the second heatsink,... Agent: Birch Stewart Kolasch & Birch

20100230699 - Light emitting device: A light emitting device including a light emitting structure having a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; a first electrode on the light emitting structure; and a photon escape layer on the light emitting structure. Further, the photon escape layer has a refractive... Agent: Birch Stewart Kolasch & Birch

20100230703 - Light emitting device fabrication method thereof, and light emitting apparatus: A light emitting device is provided. The light emitting device comprises a conductive substrate, a reflection layer, a support layer, an ohmic contact layer, and a light emitting semiconductor layer. The reflection layer is disposed on the conductive substrate. The support layer is disposed partially on the reflection layer. The... Agent: Birch Stewart Kolasch & Birch

20100230700 - Light emitting device package: A light emitting device package is provided. The light emitting device package may include a package body having a cavity formed therein, a lead frame, and a light emitting device positioned in the cavity and electrically connected to the lead frame. The lead frame may penetrate the package body such... Agent: Ked & Associates, LLP

20100230701 - Light emitting device, light emitting device package and lighting system including the same: A light emitting device, a light emitting device package and a lighting system including the same are provided. The light emitting device may include a light emitting structure, a dielectric pattern, a second electrode layer, and a resonator structure. The light emitting structure may include a first conductive type semiconductor... Agent: Ked & Associates, LLP

20100230705 - Light emitting device, method for manufacturing light emitting device, and light emitting apparatus: A light emitting device according to the embodiment includes a reflecting layer; an adhesion layer including an oxide-based material on the reflecting layer; an ohmic contact layer on the adhesion layer; and a light emitting structure layer on the ohmic contact layer.... Agent: Birch Stewart Kolasch & Birch

20100230702 - Light emitting device, method of manufacturing the same, light emitting apparatus, and lighting system: Disclosed is a light emitting device including a conductive substrate; a reflective layer on the conductive substrate; an etching protective layer on a peripheral portion of a top surface of the conductive substrate; and a light emitting structure, which is formed on the reflective layer and the etching protective layer... Agent: Birch Stewart Kolasch & Birch

20100230707 - Light-emitting diode package and manufacturing method thereof: An LED package is provided. The LED package comprises a metal plate, circuit patterns, and an LED. The metal plate comprises grooves. The insulating layer is formed on the metal plate. The circuit patterns are formed on the insulating layer. The LED is electrically connected with the circuit pattern on... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100230697 - Opto-electronic semiconductor module and method for the production thereof: An optoelectronic semiconductor module includes a chip carrier, a light emitting semiconductor chip mounted on the chip carrier and a cover element with an at least partly light transmissive cover plate, which is arranged on the side of the semiconductor chip facing away from the chip carrier, and has a... Agent: Ip Group Of Dla Piper LLP (us)

20100230698 - Optoelectronic semiconductor body: An optoelectronic semiconductor body includes a substrate with a front side for emitting electromagnetic radiation. The optoelectronic semiconductor body has a semiconductor layer sequence that is arranged on a rear side of the substrate and has an active layer suitable for generating the electromagnetic radiation. The optoelectronic semiconductor body also... Agent: Slater & Matsil, L.L.P.

20100230694 - Optoelectronical component emitting electromagnetic radiation and method for producing an optoelectronical component: An optoelectronic component is specified that emits a useful radiation. It comprises a housing having a housing base body with a housing cavity, and a light-emitting diode chip arranged in the housing cavity. At least one base body material of the housing base body has radiation-absorbing particles admixed in a... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100230706 - Semiconductor light-emitting device: The invention discloses a semiconductor light-emitting device, which includes a substrate, a first conductive type semiconductor material layer, a second conductive type semiconductor material layer, a light-emitting layer, a first electrode, a second electrode, and a plurality of bump structures. The first conductive type semiconductor material layer is formed on... Agent: Jianq Chyun Intellectual Property Office

20100230693 - White light emitting diode package and method of making the same: A white light emitting diode (LED) package with multilayered encapsulation structure and the packaging methods are disclosed. The white LED package structure includes metal electrodes, a heat dissipation base, a PPA plastic for fixing the electrodes and the heat dissipation base together, at least one LED die, a die attaching... Agent: Jason Y. Pahng And Associates, LLC

20100230696 - Wiring member, metal component with resin and resin sealed semiconductor device, and processes for producing them: There is provided a semiconductor device that suppresses the occurrence of resin burrs to ensure favorable electrical connectivity and bond strength, and a manufacturing method for such semiconductor device. Also provided is an LED device which ensures stronger adhesion between a silicone resin and a wiring lead and thus achieves... Agent: Snell & Wilmer L.L.P. (panasonic)

20100230711 - Flip-chip semiconductor optoelectronic device and method for fabricating the same: A method for fabricating flip-chip semiconductor optoelectronic devices initially flip-chip bonds a semiconductor optoelectronic chip attached to an epitaxial substrate to a packaging substrate. The epitaxial substrate is then separated using lift-off technology.... Agent: Wpat, PC Intellectual Property Attorneys

20100230708 - Leadframe package for light emitting diode device: An LED leadframe package with surface tension function to enable the production of LED package with convex lens shape by using dispensing method is disclosed. The LED leadframe package of the invention is a PPA supported package house for LED packaging with metal base, four identical metal electrodes, and PPA... Agent: Jason Y. Pahng And Associates, LLC

20100230712 - Light emitting device and method of fabricating the same: Provided are a light emitting device and a method of fabricating the same. The light emitting device comprises a first conductive type substrate, first to fourth metal electrodes, and a light emitting diode. The first conductive type substrate comprises P-N junction first to fourth diodes. The first metal electrode is... Agent: Birch Stewart Kolasch & Birch

20100230710 - Light emitting device package: Embodiments include a light emitting device package. The light emitting device package comprises a housing including a cavity; a light emitting device positioned in the cavity; a lead frame including a first section electrically connected to the light emitting device in the cavity, a second section, which penetrates the housing,... Agent: Ked & Associates, LLP

20100230709 - Optical semiconductor device, socket, and optical semiconductor unit: An optical semiconductor unit of the present invention has an LED device provided with an LED (Light Emitting Diode) and a socket to which the LED device is mounted, the LED device has a main body to which the LED is mounted, the main body has a first surface to... Agent: Collard & Roe, P.C.

20100230714 - Method for producing gallium nitride based compound semiconductor light emitting device, gallium nitride based compound semiconductor light emitting device, and lamp using the same: A method for producing a gallium nitride based compound semiconductor light emitting device that is excellent in terms of light emission efficiency and is also capable of operating at a low driving voltage, a gallium nitride based compound semiconductor light emitting device, and a lamp using the device are provided,... Agent: Sughrue Mion, PLLC

20100230713 - Semiconductor light emitting element, group iii nitride semiconductor substrate and method for manufacturing such group iii nitride semiconductor substrate: An object of the present invention is to obtain, with respect to a semiconductor light-emitting element using a group III nitride semiconductor substrate, a semiconductor light-emitting element having an excellent light extraction property by selecting a specific substrate dopant and controlling the concentration thereof. The semiconductor light-emitting element comprises a... Agent: Hamre, Schumann, Mueller & Larson P.C.

20100230716 - Semiconductor device: A semiconductor device includes: a drift layer of a first conductivity type; a base layer of a second conductivity type provided on the drift layer; an emitter layer of the first conductivity type provided in part of an upper portion of the base layer; a buffer layer of the first... Agent: Patterson & Sheridan, L.L.P.

20100230715 - Semiconductor device and method for producing a semiconductor device: A semiconductor device has a semiconductor body with a semiconductor device structure including at least a first electrode and a second electrode. Between the two electrodes, a drift region is arranged, the drift region including charge compensation zones and drift zones arranged substantially parallel to one another. At least one... Agent: Dicke, Billig & Czaja

20100230717 - Semiconductor device: A semiconductor device includes: a first semiconductor layer of non-doped AlXGa1-XN (0≦X<1); a second semiconductor layer of non-doped or n-type AlYGa1-YN (0<Y≦1, X<Y) on the first semiconductor layer; a first electrode on the second semiconductor layer; a second electrode on the second semiconductor layer that is separated from the first... Agent: Patterson & Sheridan, L.L.P.

20100230718 - Semiconductor device and method for producing a semiconductor device: A semiconductor device has a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type complementary to the first conductivity type arranged in or on the first semiconductor layer. Further, the semiconductor device has a region of the first conductivity type arranged... Agent: Mark L. Gleason Dicke,billig & Czaja, PLLC

20100230719 - Esd protection element: In an aspect of the present invention, an ESD (Electrostatic Discharge) protection element includes a bipolar transistor comprising a collector diffusion layer connected with a first terminal and an emitter diffusion layer; and current control resistances provided for a plurality of current paths from a second terminal to the collector... Agent: Sughrue Mion, PLLC

20100230720 - Semiconductor device and method: The present invention is directed to a semiconductor device that includes at least one p-n junction including a p-type material, an n-type material, and a depletion region. The at least one p-n junction is configured to generate bulk photocurrent in response to incident light. The at least one p-n junction... Agent: Bond, Schoeneck & King, PLLC

20100230721 - Semiconductor device and manufacturing method of semiconductor device: In one aspect of the present invention, a semiconductor device may include a gate electrode formed on a gate insulation film on a main surface of a semiconductor substrate of a first conductivity type; source/drain regions formed to sandwich a channel region formed below the gate electrode, the source/drain regions... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100230722 - High electron mobility field effect transistor (hemt) device: A High Electron Mobility Transistor (HEMT) device, which is formed by connecting a plurality of low power flip-chip type High Electron Mobility Transistor (HEMT) elements in parallel, or connected them in parallel and in series in combination into a tree-shaped structure, and then connecting said structure to an input terminal... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100230723 - High electron mobility transistor, field-effect transistor, and epitaxial substrate: Affords high electron mobility transistors having a high-purity channel layer and a high-resistance buffer layer. A high electron mobility transistor (11) is provided with a supporting substrate (13) composed of gallium nitride, a buffer layer (15) composed of a first gallium nitride semiconductor, a channel layer (17) composed of a... Agent: Judge Patent Associates

20100230724 - Methods for forming three-dimensional memory devices, and related structures: Methods of forming semiconductor devices that include one or more arrays of memory devices in a three-dimensional arrangement, such as those that include forming a conductive contact in a dielectric material overlying a memory array, wherein a wafer bonding and cleaving process may be utilized to provide a foundation material... Agent: Trask Britt, P.C./ Micron Technology

20100230725 - Semiconductor integrated circuit: In a semiconductor integrated circuit device, a plurality of electrode pads for external connection are arranged in a zigzag pattern. Some electrode pads of the electrode pads of the plurality of I/O cells which are closer to a side of the semiconductor chip, each have an end portion closer to... Agent: Mcdermott Will & Emery LLP

20100230726 - Power line layout techniques for integrated circuits having modular cells: An integrated circuit (IC) chip includes a first memory cell array block having a first metal layer containing at least two power lines, and a second memory cell array block containing at least two power lines independent of each other, wherein all the power lines on the first metal layer... Agent: K&l Gates LLPIPDocketing

20100230727 - Electric circuit with vertical contacts: An electrical circuit includes at least two unit cells configured on a planar substrate which extends in one plane. The unit cells respectively have at least two contact points with a different function and include at least one dielectric layer disposed on the substrate and/or on the unit cells and... Agent: Fay Kaplun & Marcin, LLP

20100230728 - Manufacturing method of photoelectric conversion device: A noise generated by a constitution of widening an incident aperture of light of a photoelectric conversion element is reduced. In a manufacturing method of a photoelectric conversion device, first electroconductor arranged in a first hole arranged in the first interlayer insulation layer electrically connects a first semiconductor region to... Agent: Fitzpatrick Cella Harper & Scinto

20100230729 - Pixel sensor cell including light shield: CMOS image sensor pixel sensor cells, methods for fabricating the pixel sensor cells and design structures for fabricating the pixel sensor cells are designed to allow for back side illumination in global shutter mode by providing light shielding from back side illumination of at least one transistor within the pixel... Agent: Scully, Scott, Murphy & Presser, P.C.

20100230730 - Solid-state imaging device and imaging apparatus: A solid-state imaging device includes: an imaging region including a plurality of light-receiving parts; a first transfer section provided on the imaging region and transferring, in a first direction, signals generated by the light-receiving parts; a second transfer section provided at a first side of the imaging region and transferring,... Agent: Mcdermott Will & Emery LLP

20100230731 - Circuitry and method: s

20100230732 - Field effect transistor with air gap dielectric: A field effect transistor (FET) that includes a drain formed in a first plane, a source formed in the first plane, a channel formed in the first plane and between the drain and the source and a gate formed in the first plane. The gate is separated from at least... Agent: Cantor Colburn LLP-ibm Burlington

20100230733 - Vertical gated access transistor: According to one embodiment of the present invention, a method of forming an apparatus comprises forming a plurality of deep trenches and a plurality of shallow trenches in a first region of a substrate. At least one of the shallow trenches is positioned between two deep trenches. The plurality of... Agent: Knobbe Martens Olson & Bear LLP

20100230734 - Semiconductor device and arrangement method of compensation capacitor of semiconductor device: A semiconductor device comprises a circuit cell and a basic end cell. The circuit cell includes a plurality of elements aligned in a first direction, and the basic end cell is arranged adjacent to the circuit cell in the first direction and has a compensation capacitor capable of being connected... Agent: Foley And Lardner LLP Suite 500

20100230735 - Deep trench capacitor on backside of a semiconductor substrate: A pair of through substrate vias is formed through a stack including a lightly doped semiconductor and a bottom semiconductor layer in a semiconductor substrate. The top semiconductor layer includes semiconductor devices such as field effect transistors. At least one deep trench is formed on the backside of the semiconductor... Agent: Scully, Scott, Murphy & Presser, P.C.

20100230736 - High voltage deep trench capacitor: A semiconductor process and apparatus provide a high voltage deep trench capacitor structure (10) that is integrated in an integrated circuit, alone or in alignment with a fringe capacitor (5). The deep trench capacitor structure is constructed from a first capacitor plate (4) that is formed from a doped n-type... Agent: Hamilton & Terrile, LLP - Freescale

20100230737 - Semiconductor device and method for manufacturing the same: A method for manufacturing a semiconductor device comprises forming a first layer on an impurity diffusion region in a semiconductor substrate by a selective epitaxial growth method, forming a second layer on the first layer by the selective epitaxial growth method, forming a contact hole penetrating an interlayer insulating film... Agent: Morrison & Foerster LLP

20100230738 - Nor flash memory structure with highly-doped drain region and method of manufacturing the same: In a method of manufacturing a NOR flash memory structure, a highly-doped ion implantation process is performed to form a highly-doped drain region to overlap with a lightly-doped drain region. Therefore, the flash memory structure can have a reduced drain junction depth to improve the short channel effect while protecting... Agent: Schmeiser, Olsen & Watts

20100230739 - Non-volatile semiconductor memory device and process of manufacturing the same: In device isolation trenches, a first device-isolation insulator film is formed to have recesses thereon and a second device-isolation insulator film is formed in the recesses. The uppermost portions at both ends of the first device-isolation insulator film are located higher than the uppermost portions at both ends of the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100230742 - Non-volatile semiconductor memory device: A non-volatile semiconductor memory device includes a plurality of memory cell regions including a plurality of bit lines, a plurality of word lines intersecting the plurality of bit lines, and a first insulating film formed in a region between any two adjacent bit lines, a bit line contact region including... Agent: Mcdermott Will & Emery LLP

20100230740 - Nonvolatile semiconductor memory device and manufacturing method thereof: First and second memory cells have first and second channels, first and second tunnel insulating films, first and second charge storage layers formed of an insulating film, first and second block insulating films, and first and second gate electrodes. A first select transistor has a third channel, a first gate... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100230743 - Self-aligned patterning method by using non-conformal film and etch for flash memory and other semiconductor applications: A method for fabricating a memory device with a self-aligned trap layer which is optimized for scaling is disclosed. In the present invention, a non-conformal film is deposited over the charge trapping layer to form a thick film on top of the core source/drain region and a pinch off and... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20100230741 - Semiconductor devices with an air gap in trench isolation dielectric: A tunnel insulating layer and a charge storage layer are sequentially stacked on a substrate. A recess region penetrates the charge storage layer, the tunnel insulating layer and a portion of the substrate. The recess region is defined by a bottom surface and a side surface extending from the bottom... Agent: Myers Bigel Sibley & Sajovec

20100230744 - Reliable memory cell: A method of forming a semiconductor device is presented. A substrate prepared with a second gate is provided. The second gate is processed to form a second gate with a rounded corner and a first gate is formed on the substrate. The first gate is adjacent to and overlaps a... Agent: HorizonIPPte Ltd

20100230745 - Power semiconductor device: A power semiconductor device according to an embodiment of the present invention includes a first semiconductor layer of a first or second conductivity type, a second semiconductor layer of the first conductivity type formed on the first semiconductor layer, a third semiconductor layer of the second conductivity type selectively formed... Agent: Patterson & Sheridan, L.L.P.

20100230746 - Semiconductor device and manufacturing method thereof: A semiconductor device includes an epitaxial layer having a first conduction type, a base layer formed adjacent and on the epitaxial layer and having an opposite second conduction type to the first conduction type, a source layer formed selectively on the base layer and having the first conduction type, a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100230747 - Process for manufacturing a power device with a trench-gate structure and corresponding device: An embodiment for realizing a power device with trench-gate structure integrated on a semiconductor substrate, and including etching the semiconductor substrate to make a first trench having first side walls and a first bottom; and further etching said semiconductor substrate to make a second trench inside the first trench, realized... Agent: Graybeal Jackson LLP

20100230748 - Semiconductor device and method of manufacturing the same: A high breakdown voltage MOS transistor capable of reducing a leakage current while reducing an element size as compared with conventional ones is realized. On a P type well, with a channel area ch in between, an N type first impurity diffusion area including a drain area and drain side... Agent: Harness, Dickey & Pierce, P.L.C

20100230749 - Semiconductor devices and formation methods thereof: A semiconductor device is provided and includes a substrate of a first conductivity type, a deep well of a second conductivity type, and a first high-side device. The deep well is formed on the substrate. The first high-side device is disposed within the deep well and includes an insulation layer... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100230750 - Power semiconductor device: A power semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type and a third semiconductor layer of a second conductivity type formed on the first semiconductor layer and alternately arranged along at least one direction parallel to a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100230753 - Lateral hyperabrupt junction varactor diode in an soi substrate: A varactor diode includes a portion of a top semiconductor layer of a semiconductor-on-insulator (SOI) substrate and a gate electrode located thereupon. A first electrode having a doping of a first conductivity type laterally abuts a doped semiconductor region having the first conductivity type, which laterally abuts a second electrode... Agent: Scully, Scott, Murphy & Presser, P.C.

20100230755 - Process for producing an mos transistor and corresponding integrated circuit: A silicon substrate (SOI) is placed on a buried oxide layer (BOX). An MOS transistor is produced in an active zone of the substrate which is defined by an isolating region. A gate region and source and drain regions, which between them define a channel, are produced so that the... Agent: Gardere Wynne Sewell LLP Intellectual Property Section

20100230751 - Self-aligned schottky diode: A Schottky barrier diode comprises a doped guard ring having a doping of a second conductivity type in a semiconductor-on-insulator (SOI) substrate. The Schottky barrier diode further comprises a first-conductivity-type-doped semiconductor region having a doping of a first conductivity type, which is the opposite of the second conductivity type, on... Agent: Scully, Scott, Murphy & Presser, P.C.

20100230754 - Semiconductor device and manufacturing method thereof: An object is to provide a semiconductor device which solves a problem that can occur when a substrate having an insulating surface is used. The semiconductor device includes a base substrate having an insulating surface; a conductive layer over the insulating surface; an insulating layer over the conductive layer; a... Agent: Fish & Richardson P.C.

20100230752 - Soi (silicon on insulator) substrate improvements: A structure, and a method for forming the same. The structure includes a semiconductor substrate which includes a top substrate surface, a buried dielectric layer on the top substrate surface, N active semiconductor regions on the buried dielectric layer, N active devices on the N active semiconductor regions, a plurality... Agent: Schmeiser, Olsen & Watts

20100230756 - Semiconductor device with selectively modulated gate work function: A semiconductor device is provided which comprises a semiconductor layer (109), a dielectric layer (111), first and second gate electrodes (129, 131) having first and second respective work functions associated therewith, and a layer of hafnium oxide (113) disposed between said dielectric layer and said first and second gate electrodes.... Agent: Fortkort & Houston P.C.

20100230757 - Hybrid sti gap-filling approach: A method of forming an integrated circuit structure includes providing a semiconductor substrate including a top surface; forming an opening extending from the top surface into the semiconductor substrate; and performing a first deposition step to fill a first dielectric material into the opening. The first dielectric material is then... Agent: Slater & Matsil, L.L.P.

20100230758 - Semiconductor device with improved stressor shape: A formation method and resulting strained semiconductor device are provided, the formation method including forming transistors on a substrate, each transistor having a gate disposed over a channel region, etching or annealing an elongated trench between adjacent channel regions, where the trench has a lower boundary that is deeper towards... Agent: F. Chau & Associates, LLC

20100230762 - integrated circuit using finfets and having a static random access memory (sram): An integrated circuit includes a logic circuit and a memory cell. The logic circuit includes a P-channel transistor, and the memory cell includes a P-channel transistor. The P-channel transistor of the logic circuit includes a channel region. The channel region has a portion located along a sidewall of a semiconductor... Agent: Larson Newman & Abel, LLP

20100230761 - Semiconductor device and method of manufacturing same: To improve the performance of semiconductor devices. Over an n+-type semiconductor region for source/drain of an n-channel type MISFET and a first gate electrode, and over a p+-type semiconductor region for source/drain of a p-channel type MISFET and a second gate electrode, which are formed over a semiconductor substrate, a... Agent: Mcdermott Will & Emery LLP

20100230759 - Silicon chip having through via and method for making the same: The present invention relates to a silicon chip having a through via and a method for making the same. The silicon chip includes a silicon substrate, a passivation layer, at least one electrical device and at least one through via. The passivation layer is disposed on a first surface of... Agent: Mccracken & Frank LLP

20100230760 - Silicon wafer having interconnection metal: The present invention relates to a silicon wafer having interconnection metal. The silicon wafer includes a silicon substrate, at least one electrical device, a barrier layer, a metal layer, at least one first interconnection metal and at least one second interconnection metal. The electrical device is disposed in the silicon... Agent: Mccracken & Frank LLP

20100230763 - Active device array substrate and method for fabricating the same: A method for fabricating an active device array substrate is provided. A first patterned semiconductor layer, a gate insulator, a first patterned conductive layer and a first dielectric layer is sequentially formed on a substrate. First contact holes exposing the first patterned semiconductor layer are formed in the first dielectric... Agent: Jianq Chyun Intellectual Property Office

20100230764 - Integrated circuit having field effect transistors and manufacturing method: An integrated circuit having field effect transistors and manufacturing method. One embodiment provides an integrated circuit including a first FET and a second FET. At least one of source, drain, gate of the first FET is electrically connected to the corresponding one of source, drain, gate of the second FET.... Agent: Dicke, Billig & Czaja

20100230765 - Integrated circuit system employing stress memorization transfer: An integrated circuit system that includes: a substrate including a source/drain region defined by a spacer; a gate over the substrate; a gate dielectric between the gate and the substrate; a recrystallized region within the gate and the source/drain region; and a channel exhibiting the characteristics of stress memorization.... Agent: Law Offices Of Mikio Ishimaru

20100230766 - Sensor device and method: A sensor device and method. One embodiment provides a first semiconductor chip having a sensing region. A porous structure element is attached to the first semiconductor chip. A first region of the porous structure element faces the sensing region of the first semiconductor chip. An encapsulation material partially encapsulates the... Agent: Dicke, Billig & Czaja

20100230767 - Mems sensor, mems sensor manufacturing method, and electronic device: An MEMS sensor includes: a movable weight which is connected with a fixed frame via an elastic deformation portion and has a cavity portion around the movable weight, wherein the movable weight has a laminated layer structure including a plurality of conductive layers, a plurality of between-layers insulation layers each... Agent: Harness, Dickey & Pierce, P.L.C

20100230768 - Semiconductor device with integrated piezoelectric elements and support circuitry: A semiconductor device suitable for use in a pressure sensor is disclosed. A uniformly thin die is provided by chemically etching a backside of a wafer. Piezoelectric elements formed integrally within the die generate electrical signals in response to flexing the die. Conductive leads formed integrally within the die electrically... Agent: Texas Instruments Incorporated

20100230770 - Magnetoresistive element and magnetoresistive random access memory including the same: The present invention provides a low-resistance magnetoresistive element of a spin-injection write type. A crystallization promoting layer that promotes crystallization is formed in contact with an interfacial magnetic layer having an amorphous structure, so that crystallization is promoted from the side of a tunnel barrier layer, and the interface between... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100230769 - Magnetoresistive element, magnetic random access memory and method of manufacturing the same: A magnetoresistive element includes: a lower magnetic layer; a barrier layer; and an upper magnetic layer. The barrier layer is provided on the lower magnetic layer. The upper magnetic layer is provided on the barrier layer. One of magnetization directions of the lower magnetic layer and the upper magnetic layer... Agent: Mcginn Intellectual Property Law Group, PLLC

20100230771 - Methods and arrangement for diffusing dopants into silicon: A method for diffusing two dissimilar dopant materials onto a semiconductor cell wafer in a single thermal processing step. The method includes placing a first dopant source on a semiconductor cell wafer, placing said cell wafer into a thermal processing chamber comprising one or more cell wafer slots, subjecting said... Agent: Fay Sharpe LLP / Xerox - Parc

20100230772 - Array of alpha particle sensors: An array of radiation sensors or detectors is integrated within a three-dimensional semiconductor IC. The sensor array is located relatively close to the device layer of a circuit (e.g., a microprocessor) to be protected from the adverse effects of the ionizing radiation particles. As such, the location where the radiation... Agent: Cantor Colburn LLP-ibm Burlington

20100230773 - Solid-state image pickup device and a method of manufacturing the same: A solid-state image pickup device includes: a silicon layer; a pixel portion formed in the silicon layer for processing and outputting signal charges obtained by carrying out photoelectric conversion for incident lights; an alignment mark formed in a periphery of the pixel portion and in the silicon layer; and a... Agent: Robert J. Depke Lewis T. Steadman

20100230774 - Diode having high breakdown voltage and low on-resistance: A Schottky or PN diode is formed where a first cathode portion is an N epitaxial layer that is relatively lightly doped. An N+ buried layer is formed beneath the cathode for conducting the cathode current to a cathode contact. A more highly doped N-well is formed, as a second... Agent: Patent Law Group LLP

20100230775 - Termination for a superjunction device: A superjunction device that includes a termination region having a transition region adjacent the active region thereof, the transition region including a plurality of spaced columns.... Agent: Vishay/siliconix C/o Murabito, Hao & Barnes LLP

20100230777 - Selective sti stress relaxation through ion implantation: A first example embodiment comprises the following steps and the structure formed therefrom. A trench having opposing sidewalls is formed within a substrate. A stress layer having an inherent stress is formed over the opposing trench sidewalls. The stress layer having stress layer sidewalls over the trench sidewalls. Ions are... Agent: HorizonIPPte Ltd

20100230776 - Semiconductor structure and method of manufacture: Briefly, in accordance with one or more embodiments, a semiconductor structure and method for forming the semiconductor structure are disclosed. The semiconductor structure may comprise a dielectric structure and one or more active areas or one or more field areas, for example, disposed proximate to the dielectric structure along a... Agent: Hvvi Semiconductors, Inc.

20100230778 - Method of fabricating a flash memory and an isolating structure applied to a flash memory: A method of fabricating a flash memory and an isolating structure applied to a flash memory is provided. The feature of the method lies in a T-shaped shallow trench isolation (STI). The T-shaped STI has a widened cap covering on a substrate and a tapered bottom embedded in the substrate.... Agent: North America Intellectual Property Corporation

20100230779 - Trench generated device structures and design structures for radiofrequency and bicmos integrated circuits: Trench-generated device structures fabricated using a semiconductor-on-insulator (SOI) wafer, design structures embodied in a machine readable medium for designing, manufacturing, or testing an integrated circuit, as well as methods for fabricating trench-generated device structures. The device structure includes a trench extending through the semiconductor and insulator layers of the SOI... Agent: Wood, Herron & Evans, LLP (ibm-bur)

20100230780 - Semiconductor device: The present invention provides a semiconductor device realizing reliable cutting of a fuse without enlarging layout area of a fuse element and the reduced number of wiring layers of a preventing wall that prevents diffusion of fuse copper atoms. A fuse is formed by using a wire in a metal... Agent: Mcdermott Will & Emery LLP

20100230781 - Trench anti-fuse structures for a programmable integrated circuit: Trench anti-fuse structures, design structures embodied in a machine readable medium for designing, manufacturing, or testing a programmable integrated circuit. The anti-fuse structure includes a trench having a plurality of sidewalls that extend into a substrate, a doped region in the semiconductor material of the substrate proximate to the sidewalls... Agent: Wood, Herron & Evans, LLP (ibm-bur)

20100230785 - Inductively coupled integrated circuit and methods for use therewith: A circuit includes a first integrated circuit or die having a first circuit and a first inductive interface. A second integrated circuit or die has a second circuit and a second inductive interface. The first inductive interface and the second inductive interface are aligned to magnetically communicate signals between the... Agent: Garlick Harrison & Markison

20100230782 - Semiconductor device: A first semiconductor chip includes a first inductor and a second inductor, and a second semiconductor chip includes a third inductor and a fourth inductor. The first inductor is connected to a first receiving circuit of the first semiconductor chip, and the second inductor is connected to a second transmitting... Agent: Young & Thompson

20100230783 - Semiconductor device: A semiconductor device sends and receives electrical signals. The semiconductor device includes a first substrate provided with a first circuit region containing a first circuit; a multi-level interconnect structure provided on the first substrate; a first inductor provided in the multi-level interconnect structure so as to include the first circuit... Agent: Young & Thompson

20100230784 - Semiconductor packaging with integrated passive componentry: The invention provides advances in the arts with useful and novel integrated packaging having passive components included within packages also containing one or more ICs. The integrated passive components may include inductors, transformers, and capacitors, and are preferably constructed of leadframe materials. Typically, one or more magnetic field storage body... Agent: Michael T. Konczal, Patent Attorney

20100230787 - Electric device comprising an improved electrode: The invention relates to an electric device including an electric element, the electric element comprising a first electrode (104) having a first surface (106) and a pillar (108), the pillar extending from the first surface in a first direction (110), the pillar having a length measured from the first surface... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100230786 - Production of integrated circuits comprising semiconductor incompatible materials: It is described a procedure for the integration of semiconductor incompatible materials in a process family created for the production of passive electric components and active electric components formed within integrated circuits. The procedure is applicable in known techniques like bipolar, MOS or BIMOS processes for semiconductor production. The modular... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100230788 - Chip structure, wafer structure and process of faabricating chip: A chip structure includes a substrate and a stress buffer layer. The substrate has a first surface and a second surface opposite to the first surface. The stress buffer layer is disposed on the periphery of the substrate and located in at least one of the first surface and the... Agent: J C Patents

20100230789 - Semiconductor device and manufacturing method thereof: A technology is provided which allows a reduction in the size of a semiconductor device without degrading an electromagnetic shielding effect and reliability against reflow heating. After a plurality of components are mounted over a component mounting surface of a module substrate, a resin is formed so as to cover... Agent: Miles & Stockbridge PC

20100230790 - Semiconductor carrier for multi-chip packaging: A power semiconductor product includes a carrier attached to a leadframe. An insulating layer is formed on the carrier and two or more conductive plates are patterned on the insulating layer. A control IC is attached to one of these conductive plates and a power transistor is attached to the... Agent: Advanced Analogic Technologies

20100230791 - Leadframe package for light emitting diode device: An LED leadframe package with surface tension function to enable the production of LED package with convex lens shape by using dispensing method is disclosed. The LED leadframe package of the invention is a PPA supported package house for LED packaging with metal base, four identical metal electrodes, and PPA... Agent: Jason Y. Pahng And Associates, LLC

20100230792 - Premolded substrates with apertures for semiconductor die packages with stacked dice, said packages, and methods of making the same: Disclosed are premolded substrates for semiconductor die packages and methods of making such substrates. An exemplary premolded substrate comprises a leadframe having a first surface, a second surface, a central portion disposed between the first and second surfaces, and a plurality of electrically conductive leads disposed about the central portion;... Agent: Townsend And Townsend And Crew, LLP

20100230793 - Semiconductor apparatus packaging structure, semiconductor apparatus packaging method, and embossed tape: A TAB tape (100) packaging structure in which (i) the TAB tape (100) including a plurality of semiconductor chips (103) which are fixed, on a film (101) on which wiring patterns are repeatedly provided and (ii) an embossed tape (200) which is electroconductive and has embossed parts (202) which are... Agent: Harness, Dickey & Pierce, P.L.C

20100230796 - Integrated circuit package-in-package system and method for making thereof: A method for making an integrated circuit package-in-package system includes: forming a first integrated circuit package including a first device and a first substrate and having a first interface; stacking a second integrated circuit package including a second device and a second substrate and having a second interface above the... Agent: Law Offices Of Mikio Ishimaru

20100230794 - Method for fabricating semiconductor components using maskless back side alignment to conductive vias: A method for fabricating semiconductor components includes the steps of: providing a semiconductor substrate having a circuit side, a back side and conductive vias; removing portions of the substrate from the back side to expose terminal portions of the conductive vias; depositing a polymer layer on the back side encapsulating... Agent: Stephen A Gratton The Law Office Of Steve Gratton

20100230795 - Stacked microelectronic assemblies having vias extending through bond pads: A stacked microelectronic assembly is provided which includes first and second stacked microelectronic elements. Each of the first and second microelectronic elements can include a conductive layer extending along a face of such microelectronic element. At least one of the first and second microelectronic elements can include a recess extending... Agent: Tessera Lerner David Et Al.

20100230797 - Warp-suppressed semiconductor device: A semiconductor device includes: a semiconductor chip mounted on a mounting substrate; a first resin filling a gap between the chip and the substrate; a frame-shaped stiffener surrounding the chip; a first adhesive for bonding the stiffener to the substrate; a lid for covering the stiffener and an area surrounded... Agent: Hayes Soloway P.C.

20100230799 - Semiconductor device: A semiconductor device includes a carrier, a chip attached to the carrier, and an encapsulation body disposed over the chip and the carrier. An exterior surface of the semiconductor device includes an exposed peripheral edge of at least two of the carrier, the chip, and the encapsulation body.... Agent: Dicke, Billig & Czaja

20100230798 - Semiconductor device including spacer element: A semiconductor device includes a metal carrier and a spacer element attached to the metal carrier. The semiconductor device includes a first sintered metal layer on the spacer element and a semiconductor chip on the first sintered metal layer.... Agent: Dicke, Billig & Czaja

20100230800 - Double side cooled power module with power overlay: A power module includes one or more semiconductor power devices having a power overlay (POL) bonded thereto. A first heat sink is bonded to the semiconductor power devices on a side opposite the POL. A second heat sink is bonded to the POL opposite the side of the POL bonded... Agent: General Electric Company Global Research

20100230801 - Semiconductor device: A semiconductor device includes: a first semiconductor device including an interconnect substrate having a cavity structure and a semiconductor element mounted on a bottom part of the cavity structure; and a second semiconductor device provided on and connected to the first semiconductor device via connection terminals. A sealing material is... Agent: Mcdermott Will & Emery LLP

20100230803 - Electronic device package and method for forming the same: An embodiment of the invention provides a method for forming an electronic device package, which includes providing a carrier substrate having an upper surface and an opposite lower surface; forming a cavity from the upper surface of the carrier substrate; disposing an electronic device having a conducting electrode in the... Agent: Liu & Liu

20100230802 - Metallic solderability preservation coating on metal part of semiconductor package to prevent oxide: Embodiments of the present invention are directed to metallic solderability preservation coating on connectors of semiconductor package to prevent oxide. Singulated semiconductor packages can have contaminants, such as oxides, on exposed metal areas of the connectors. Oxidation typically occurs on the exposed metal areas when the semiconductor packages are not... Agent: Haverstock & Owens LLP

20100230805 - Multi-die semiconductor package with heat spreader: A semiconductor device includes first and second stacked semiconductor dies on a substrate. A lid having a plurality of fins extending downwardly into the cavity is mounted on the substrate to encapsulate the semiconductor dies. At least some of the fins are longer than other ones of said fins. The... Agent: Advanced Micro Devices, Inc. C/o Vedder Price P.C.

20100230804 - Thermal resistor, semiconductor device using the same, and electric device: A thermal resistor is a metal body having a contact surface to be partially in contact to form a void and is electrically conductive as a whole. The thermal body may be a layered body having a plurality of metal bodies layered so as to be partially in contact with... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100230806 - Semiconductor device and method of forming three-dimensional vertically oriented integrated capacitors: A semiconductor device is made by forming a plurality of conductive pillars vertically over a temporary carrier. A conformal insulating layer is formed over the conductive pillars. A conformal conductive layer is formed over the conformal insulating layer. A first conductive pillar, conformal insulating layer, and conformal conductive layer constitute... Agent: Robert D. Atkins

20100230807 - Method and apparatus to repair defects in nonvolatile semiconductor memory devices: A method of repairing a nonvolatile semiconductor memory device to eliminate defects includes monitoring a memory endurance indicator for a nonvolatile semiconductor memory device contained in a semiconductor package. It is determined whether that the memory endurance indicator exceeds a predefined limit. Finally, in response to determining that the memory... Agent: Morgan Lewis & Bockius LLP/rambus Inc.

20100230808 - Reducing stress between a substrate and a projecting electrode on the substrate: The present invention relates to a semiconductor component that has a substrate and a projecting electrode. The projecting electrode has a substrate face, which faces the substrate and which comprises a first substrate-face section separated from the substrate by a gap. The gap allows a stress-compensating deformation of the projecting... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100230810 - Flip chip semiconductor package and fabrication method thereof: There is provide a flip chip semiconductor package comprising: an electrode pad formed a semiconductor substrate; a lower metal bonding layer formed on the electrode pad; an upper metal bonding layer formed on the lower metal bonding layer and having a post shape of a predetermined height; and a conductive... Agent: Hosoon Lee

20100230812 - Microelectronic assemblies having compliancy and methods therefor: A microelectronic assembly is disclosed that includes a semiconductor wafer with contacts, compliant bumps of dielectric material overlying the first surface of the semiconductor wafer, and a dielectric layer overlying the first surface of the semiconductor wafer and edges of the compliant bumps. The compliant bumps have planar top surfaces... Agent: Tessera Lerner David Et Al.

20100230811 - Semiconductor device having a conductive bump: In one embodiment, a semiconductor device includes a semiconductor substrate and a bonding pad disposed thereon. The semiconductor device also includes a passivation layer, a buffer layer, and an insulating layer sequentially stacked on the semiconductor substrate. According to one aspect, a first recess is defined within the passivation layer,... Agent: F. Chau & Associates, LLC

20100230809 - Wire loop and method of forming the wire loop: A method of forming a wire loop is provided. The method includes: (1) forming a first fold of wire; (2) bonding the first fold of wire to a first bonding location to form a first bond; (3) extending a length of wire, continuous with the first bond, between (a) the... Agent: Kulicke And Soffa Industries, Inc.

20100230813 - Semiconductor constructions and methods of forming layers: The invention includes methods of forming layers conformally over undulating surface topographies associated with semiconductor substrates. The undulating surface topographies can first be exposed to one or more of titanium oxide, neodymium oxide, yttrium oxide, zirconium oxide and vanadium oxide to treat the surfaces, and can be subsequently exposed to... Agent: Wells St. John P.s.

20100230814 - Nanoscale, spatially-controlled ga doping of undoped transparent conducting oxide films: An article of manufacture comprising a nanowire and methods of making the same. In one embodiment, the nanowire includes a Ga-doped trace formed on a surface of an indium oxide layer having a thickness in nano-scale, and wherein the Ga-doped trace is formed with a dimension that has a depth... Agent: Morris Manning Martin LLP

20100230815 - Semiconductor device: Semiconductor devices and methods for fabricating the same. An exemplary device includes a substrate, a dielectric layer, a protection layer, and a conformal barrier layer. The dielectric layer overlies the substrate and comprises an opening. The opening comprises a lower portion and a wider upper portion, exposing parts of the... Agent: Thomas, Kayden, Horstemeyer & Risley LLP

20100230816 - Semiconductor device and method for forming the same: Semiconductor devices and methods for forming the same in which damages to a low-k dielectric layer therein can be reduced or even prevented are provided. A semiconductor device is provided, comprising a substrate. A dielectric layer with at least one conductive feature therein overlies the substrate. An insulating cap layer... Agent: Thomas, Kayden, Horstemeyer & Risley LLP

20100230818 - Through substrate via semiconductor components: A structure and method of forming through substrate vias in forming semiconductor components are described. In one embodiment, the invention describes a method of forming a through substrate via by partially filling an opening with a fill material, and forming a first insulating layer over the first fill material thereby... Agent: Slater & Matsil, L.L.P.

20100230817 - Using unstable nitrides to form semiconductor structures: Incompatible materials, such as copper and nitrided barrier layers, may be adhered more effectively to one another. In one embodiment, a precursor of copper is deposited on the nitrided barrier. The precursor is then converted, through the application of energy, to copper which could not have been as effectively adhered... Agent: Trop, Pruner & Hu, P.C.

20100230819 - Semiconductor constructions: Some embodiments include semiconductor processing methods in which a copper barrier is formed to be laterally offset from a copper component, and in which nickel is formed to extend across both the barrier and the component. The barrier may extend around an entire lateral periphery of the component, and may... Agent: Wells St. John P.s.

20100230820 - Method for fabricating semiconductor device and semiconductor device: A method for fabricating a semiconductor device includes the steps of: forming a plurality of lower interconnections at intervals in a first insulating film; removing a portion of the first insulating film located between the lower interconnections, thereby forming an interconnection-to-interconnection gap; forming a second insulating film over the first... Agent: Mcdermott Will & Emery LLP

20100230821 - Method of manufacturing a semiconductor device and semiconductor device obtained with such a method: The invention relates to a method of manufacturing a semiconductor device (10) with a semiconductor body (1) which is provided with at least one semiconductor element, wherein on the surface of the semiconductor body (1) a mesa-shaped semiconductor region (2) is formed, a masking layer (3) is deposited over the... Agent: Philips Intellectual Property & Standards

20100230823 - Semiconductor device, electronic device and method of manufacturing semiconductor device: A semiconductor device includes: an electronic component including an electrode pad forming face on which electrode pads are formed, a back face opposite to the electrode pad forming face; a sealing resin including a first face provided on the electrode pad forming face side and a second face provided on... Agent: Drinker Biddle & Reath (dc)

20100230822 - Semiconductor die and method of forming noise absorbing regions between thvs in peripheral region of the die: A semiconductor wafer has a plurality of semiconductor die. A peripheral region is formed around the die. An insulating material is formed in the peripheral region. A portion of the insulating material is removed to form a through hole via (THV). A conductive material is deposited in the THV to... Agent: Robert D. Atkins

20100230824 - Metal interconnect of semiconductor device: Provided are a metal interconnect of a semiconductor device and a method of fabricating the metal interconnect. The metal interconnect includes a metal line having a first end and a second end disposed on an opposite side to the first end, a via electrically connected to the metal line, and... Agent: Myers Bigel Sibley & Sajovec

20100230825 - Flexible packaging for chip-on-chip and package-on-package technologies: In one embodiment, a packaging solution for an application integrated circuit (IC) and one or more other ICs is provided. The packaging solution may support both chip-on-chip packaging of the application IC (in flip-chip connection to a package substrate) and other ICs (in non-flip chip orientation), and package-on-package packaging of... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20100230826 - Integrated circuit package assembly and packaging method thereof: An integrated circuit (IC) package assembly includes a substrate including a plurality of golden fingers, a bonding pad integrally formed with the substrate, an IC fixed on the bonding pad, and a plurality of bonding wires. The IC includes a plurality of connecting pads. A width and a length of... Agent: Altis Law Group, Inc. Attn: Steven Reiss

20100230827 - Semiconductor device and method for manufacturing semiconductor device: A semiconductor device includes a first semiconductor chip that is mounted face-down on a substrate, a second semiconductor chip that is mounted face-up on the first semiconductor chip, and a dummy chip that is interposed between the first semiconductor chip and the second semiconductor chip. The dummy chip is made... Agent: Harness, Dickey & Pierce, P.L.C

20100230828 - Microelectronic assembly with impedance controlled wirebond and conductive reference element: A microelectronic assembly can include a microelectronic device having device contacts exposed at a surface thereof and an interconnection element having element contacts and having a face adjacent to the microelectronic device. Conductive elements, e.g., wirebonds connect the device contacts with the element contacts and have portions extending in runs... Agent: Tessera Lerner David Et Al.

20100224850 - Non-volatile memory cells employing a transition metal oxide layer as a data storage material layer and methods of manufacturing the same: Non-volatile memory cells employing a transition metal oxide layer as a data storage material layer are provided. The non-volatile memory cells include a lower and upper electrodes overlapped with each other. A transition metal oxide layer pattern is provided between the lower and upper electrodes. The transition metal oxide layer... Agent: Myers Bigel Sibley & Sajovec

20100224849 - Oxide diode, method of manufacturing the same, and electronic device and resistive memory device including the same: Provided are an oxide diode, a method of fabricating the oxide diode, and an electronic device including the oxide diode. The oxide diode may include an n-type oxide layer treated with plasma, and a p-type oxide layer on the n-type oxide layer. The plasma may include nitrogen.... Agent: Harness, Dickey & Pierce, P.L.C

20100224851 - Synthesizing graphene from metal-carbon solutions using ion implantation: A method and semiconductor device for synthesizing graphene using ion implantation of carbon. Carbon is implanted in a metal using ion implantation. After the carbon is distributed in the metal, the metal is annealed and cooled in order to precipitate the carbon from the metal to form a layer of... Agent: Winstead, P.C.

20100224856 - Electroluminescent device: Provided is an electroluminescent device which has a luminescent layer including quantum dots and which are excellent in life characteristics. An electroluminescent device (1) comprises a first electrode layer (3), a luminescent layer (4) formed on the first electrode layer, and a second electrode layer (5) formed on the luminescent... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100224857 - Fabrication of phosphor free red and white nitride-based leds: A multiple quantum well (MQW) structure for a light emitting diode and a method for fabricating a MQW structure for a light emitting diode are provided. The MQW structure comprises a plurality of quantum well structures, each quantum well structure comprising: a barrier layer; and a well layer having quantum... Agent: Townsend And Townsend And Crew, LLP

20100224860 - High efficiency leds with tunnel junctions: An LED made from a wide band gap semiconductor material and having a low resistance p-type confinement layer with a tunnel junction in a wide band gap semiconductor device is disclosed. A dissimilar material is placed at the tunnel junction where the material generates a natural dipole. This natural dipole... Agent: Koppel, Patrick, Heybl & Dawson

20100224852 - Iii-nitride light emitting device incorporating boron: Embodiments of the invention include a III-nitride semiconductor structure comprising a light emitting region disposed between an n-type region and a p-type region. At least one layer in the light emitting region is Bx(InyGa1-y)1-xN. In some embodiments, x is less than 14%. In some embodiments, the BN composition is selected... Agent: Philips Intellectual Property & Standards

20100224858 - Lateral thermal dissipation led and fabrication method thereof: A lateral thermal dissipation LED and a fabrication method thereof are provided. The lateral thermal dissipation LED utilizes a patterned metal layer and a lateral heat spreading layer to transfer heat out of the LED. The thermal dissipation efficiency of the LED is increased, and the lighting emitting efficiency is... Agent: Wpat, PC Intellectual Property Attorneys

20100224854 - Light emitting device: A light emitting device (LED) is provided. The LED comprises a light emitting structure and a mixed-period photonic crystal structure. The light emitting structure comprises a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer. The mixed-period photonic crystal structure is on the light... Agent: Birch Stewart Kolasch & Birch

20100224855 - Light-emitting device epitaxial wafer and light-emitting device: A light-emitting device epitaxial wafer includes an n-type substrate, an n-type cladding layer stacked on the n-type substrate, a light-emitting layer including a quantum well structure stacked on the n-type cladding layer, and a p-type cladding layer stacked on the light-emitting layer. The n-type cladding layer includes an epitaxial layer... Agent: Mcginn Intellectual Property Law Group, PLLC

20100224859 - Organic light-emitting diodes with electrophosphorescent-coated emissive quantum dots: The present invention provides a composition comprising quantum dots and a coating material that comprises an electro-phosphorescent moiety, and methods for producing and using the same. In particular, compositions of the invention are used in organic light emitting diodes (OLEDs), and electronic devices that utilize OLEDs.... Agent: Arnold & Knobloch, L.L.P.

20100224853 - Semiconductor nanocrystal probes for biological applications and process for making and using such probes: A semiconductor nanocrystal compound and probe are described. The compound is capable of linking to one or more affinity molecules. The compound comprises (1) one or more semiconductor nanocrystals capable of, in response to exposure to a first energy, providing a second energy, and (2) one or more linking agents,... Agent: Bozicevic, Field & Francis LLP

20100224861 - Twin-drain spatial wavefunction switched field-effect transistors: A field-effect transistor is provided and includes source, gate and drain regions, where the gate region controls charge carrier location in the transport channel, the transport channel includes a asymmetric coupled quantum well layer, the asymmetric quantum well layer includes at least two quantum wells separated by a barrier layer... Agent: The Law Offices Of Steven Mchugh, LLC

20100224862 - Carbon nanotube structure and thin film transistor: When an electronic element using a carbon nanotube (CNT) is fabricated, particularly when a carbon nanotube thin film is formed on a previously formed electrode, a CNT film is manufactured on the previously formed electrode, and the CNT film on the electrode is used as an electronic element, as it... Agent: Mr. Jackson Chen

20100224867 - Electronic devices comprising structured organic films: An electronic device comprising a structured organic film with an added functionality comprising a plurality of segments and a plurality of linkers arranged as a covalent organic framework, wherein the structured organic film may be a multi-segment thick structured organic film.... Agent: Oliff & Berridge, PLC.

20100224868 - Light emitting device: The present invention provides a TFT that has a channel length particularly longer than that of an existing one, specifically, several tens to several hundreds times longer than that of the existing one, and thereby allowing turning to an on-state at a gate voltage particularly higher than the existing one... Agent: Fish & Richardson P.C.

20100224863 - Organic el element: To provide an organic EL element in which the hue of display light can be restrained from varying according to a change of the viewing angle. The organic EL element includes: a first electrode (anode) 4 having translucency; an organic layer 7 at least including a charge injection transport layer... Agent: Mcdermott Will & Emery LLP

20100224864 - Organic light emitting diode and method for manufacturing the same: An organic light emitting diode (OLED) and a method for manufacturing the same are disclosed, wherein the method comprises following steps: (a) providing a substrate having a first conductive layer; (b) providing a precursor and polymerizing the precursor by plasma to form a fluorocarbon polymer layer or a fluorocarbon copolymer... Agent: Bacon & Thomas, PLLC

20100224869 - Organic semiconductor material, organic semiconductor structure and organic semiconductor apparatus: The present invention is directed to the provision of a liquid crystalline organic semiconductor material, which is highly stable under a film forming environment and, at the same time, can easily form a film, for example, by coating. The liquid crystalline organic semiconductor material comprises: a thiophene skeleton comprising 3... Agent: Burr & Brown

20100224865 - Organic transistor, organic transistor array and display apparatus: A disclosed organic transistor includes a substrate; a gate electrode; a gate insulating film; source-drain electrodes; and an organic semiconductor layer. The gate electrode and the gate insulating film are disposed on the substrate in the stated order, and the source-drain electrodes and the organic semiconductor layer are disposed at... Agent: Cooper & Dunham, LLP

20100224866 - Ternary emissive layers for luminescent applications: There is provided an organic light emitting diode having an anode, a hole transport layer containing a material having an ionization potential IPHTL, an emissive layer, an electron transport layer, and a cathode. The emissive layer contains: (a) a fluorinated hexacoordinate iridium complex emitter having an ionization potential IPemt; (b)... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20100224870 - Field effect transistor: A field effect transistor includes at least a channel layer, a gate insulation layer, a source electrode, a drain electrode, and a gate electrode. The channel layer is formed from an amorphous oxide material that contains at least In and Mg, and an element ratio, expressed by Mg/(In+Mg), of the... Agent: Fitzpatrick Cella Harper & Scinto

20100224872 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a substrate having an insulating surface; a light-transmitting first electrode provided over the substrate; a light-transmitting second electrode provided over the substrate; a light-transmitting semiconductor layer provided so as to be electrically connected to the first electrode and the second electrode; a first wiring electrically connected... Agent: Robinson Intellectual Property Law Office, P.C.

20100224873 - Semiconductor device and method for manufacturing the same: It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The... Agent: Robinson Intellectual Property Law Office, P.C.

20100224871 - Thin film transistor, method of manufacturing the same, and display device: The present application provides a thin film transistor and a method of manufacturing same capable of suppressing diffusion of aluminum to oxide semiconductor and selectively etching oxide semiconductor and aluminum oxide. The thin film transistor includes: a gate electrode; a channel layer whose main component is oxide semiconductor; a gate... Agent: K&l Gates LLP

20100224875 - Substrate with test circuit: The present invention relates to a substrate with a substrate test circuit. In an embodiment, by making the length of the wiring from a first data-line-test input terminal to a first panel equal to that of the wiring from a second data-line-test input terminal to the first panel, the input... Agent: Ladas & Parry LLP

20100224874 - Tcp-type semiconductor device: A TCP-type semiconductor device has: a base film; a semiconductor chip mounted on the base film; and a plurality of leads formed on the base film and electrically connected to the semiconductor chip. Each of the plurality of leads has a test pad section at a position other than both... Agent: Mcginn Intellectual Property Law Group, PLLC

20100224876 - Two-sided semiconductor structure: Deep via trenches and deep marker trenches are formed in a bulk substrate and filled with a conductive material to form deep conductive vias and deep marker vias. At least one first semiconductor device is formed on the first surface of the bulk substrate. A disposable dielectric capping layer and... Agent: Scully, Scott, Murphy & Presser, P.C.

20100224877 - Electronic photosensitive body and manufacturing method for same, as well as image forming apparatus: Disclosed is an electrophotographic photoreceptor which comprises a base material and a photoconductive layer. The photoconductive layer is formed on the base material, and comprises a non-single-crystal material mainly composed of silicon. In the photoconductive layer, with regard to a characteristic energy E (eV) which has the relationship with a... Agent: Hogan Lovells US LLP

20100224878 - Semiconductor device: A semiconductor device includes a semiconductor layer over a substrate; a gate insulating film covering the semiconductor layer; a gate wiring including a gate electrode, which is provided over the gate insulating film and is formed by stacking a first conductive layer and a second conductive layer; an insulating film... Agent: Robinson Intellectual Property Law Office, P.C.

20100224879 - Thin film transistor: A thin film transistor includes a gate insulating layer covering a gate electrode, a semiconductor layer in contact with the gate insulating layer, and impurity semiconductor layers which are in contact with part of the semiconductor layer and which form a source region and a drain region. The semiconductor layer... Agent: Nixon Peabody, LLP

20100224880 - Semiconductor device: It is an object to provide a semiconductor device with low wiring resistance, high transmittance, or a high aperture ratio. A gate electrode, a semiconductor layer, and a source electrode and a drain electrode are formed using a material having a light-transmitting property and a wiring such as a gate... Agent: Robinson Intellectual Property Law Office, P.C.

20100224881 - Organic light emitting diode display device and method of fabricating the same: An organic light emitting diode (OLED) display device and a method of fabricating the same are provided. The OLED display device includes a substrate having a thin film transistor region and a capacitor region, a buffer layer disposed on the substrate, a gate insulating layer disposed on the substrate, a... Agent: Stein Mcewen, LLP

20100224882 - Thin film transistor, method of fabricating the same, and organic light emitting diode display device having the same: A thin film transistor, a method of fabricating the same, and an organic light emitting diode display device having the same, the thin film transistor including: a substrate; a silicon layer formed on the substrate; a diffusion layer formed on the silicon layer; a semiconductor layer that is crystallized using... Agent: Stein Mcewen, LLP

20100224883 - Thin film transistor, method of fabricating the same, and organic light emitting diode display device including the same: A thin film transistor (TFT) and an organic light emitting diode (OLED) display device. The TFT and the OLED display device include a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate electrode insulated from the semiconductor layer, a gate insulating... Agent: Stein Mcewen, LLP

20100224886 - P-channel silicon carbide mosfet: A second trench in each source electrode portion (Schottky diode portion) is formed to have a depth equal to or larger than the depth of a first trench in each gate electrode portion. The distance between the first and second trenches is set to be not longer than 10 μm.... Agent: Rossi, Kimms & Mcdowell LLP.

20100224885 - Semiconductor device: A semiconductor device having a junction FET having improved characteristics is provided. The semiconductor device has a junction FET as a main transistor and has a MISFET as a transistor for control. The junction FET has a first gate electrode, a first source electrode, and a first drain electrode. The... Agent: Miles & Stockbridge PC

20100224884 - Silicon carbide semiconductor device and method for manufacturing the same: A channel layer (40) for forming a portion of a carrier path between a source electrode (100) and a drain electrode (110) is formed on a drift layer (30). The channel layer (40) includes Ge granular crystals formed on the drift layer (30), and a cap layer covering the Ge... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100224887 - Semiconductor light emitting device: A semiconductor light emitting device includes: a semiconductor multilayer structure including a first semiconductor layer, a second semiconductor layer, and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer; a first electrode connected to the first semiconductor layer of the semiconductor multilayer structure; a... Agent: Turocy & Watson, LLP

20100224888 - Monolithic cell array display: There is described a display comprising: a monolithic array of cells; and optical direct outputs located within the monolithic array of cells and adapted for collectively forming a human-readable display upon using a first portion of available light, wherein a second portion of the available light is used concurrently to... Agent: Ogilvy Renault LLP

20100224889 - Polychromatic led's and related semiconductor devices: A semiconductor device is provided comprising a first potential well located within a pn junction and a second potential well not located within a pn junction. The potential wells may be quantum wells. The semiconductor device is typically an LED, and may be a white or near-white light LED. The... Agent: 3m Innovative Properties Company

20100224890 - Light emitting diode chip with electrical insulation element: A light emitting diode chip comprising a light emitting diode and a thermally conductive substrate. The light emitting diode is on the substrate with the substrate providing a thermal path from the light emitting diode through the substrate. A mounting pad is also on a substrate and an electrically insulating... Agent: Koppel, Patrick, Heybl & Dawson

20100224891 - Vertically structured led by integrating nitride semiconductors with zn(mg,cd,be)o(s,se) and method for making same: A light emitting diode (LED) with a vertical structure, including electrical contacts on opposing sides, provides increased brightness. In some embodiments an LED includes a nitride semiconductor light emitting component grown on a sapphire substrate, a Zn(Mg,Cd,Be)O(S,Se) assembly formed on the nitride semiconductor component, and a further Zn(Mg Cd,Be)O(S,Se) assembly... Agent: Klein, O''neill & Singh, LLP

20100224894 - Iii-nitride semiconductor light emitting device and method for fabricating the same: The present disclosure relates to a III-nitride semiconductor light emitting device, including: a substrate; a plurality of III-nitride semiconductor layers grown over the substrate and including an active layer generating light by recombination of electrons and holes; a scattering surface provided on the substrate to scatter the light generated in... Agent: Husch Blackwell Sanders LLP

20100224895 - Light emitting device: The light emitting device comprises, a light emitting element, a red phosphor formed from a nitride phosphor that emits light when excited by the light from the light emitting element, a green phosphor formed from a halosilicate that emits light when excited by the light from the light emitting element... Agent: Birch Stewart Kolasch & Birch

20100224896 - Light emitting device comprising a composite sialon-based ceramic material: The invention relates to a light emitting device, especially a LED with a ceramic composite material essentially of the composition M1−yA2−xBxO2−2xN2+X:Euy, where M is selected out of the group comprising Sr, Ca, Ba, Mg or mixtures thereof, A is selected out of the group comprising Si, Ge or mixtures thereof,... Agent: Philips Intellectual Property & Standards

20100224899 - Light emitting device, light emitting device package and lighting system including the same: e

20100224893 - Method for arranging a powder layer on a substrate and layer structure with at least one powder layer on a substrate: A process for arranging a powder layer comprising a powder on a substrate surface of a substrate. A substrate having a substrate surface is provided, and a mixture comprising the powder and an adhesion promoter is applied on the substrate surface. The adhesion promoter is removed and the powder layer... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100224892 - Nitride semiconductor light emitting element: Provided is a nitride semiconductor light emitting element that has improved light extraction efficiency and a wide irradiation angle of outgoing light irrespective of the reflectance of a metal used for an electrode. An n side anti-reflection layer 2 and a p side Bragg reflection layer 4 are formed so... Agent: Rabin & Berdo, PC

20100224898 - Optical semiconductor device having air gap forming reflective mirror and its manufacturing method: In an optical semiconductor device including an epitaxially-grown light emitting semiconductor layer and a reflective electrode layer provided at a counter face of the light emitting semiconductor layer opposing a light extracting face thereof, a support electrode layer is provided between the reflective electrode layer and the counter face of... Agent: Frishauf, Holtz, Goodman & Chick, PC

20100224901 - Semiconductor light-emitting device: A semiconductor light-emitting device includes an n-type semiconductor layer formed on a substrate, a light-emitting layer formed on the n-type semiconductor layer, a p-type semiconductor layer formed on the light-emitting layer, and an electrode layer formed on the p-type semiconductor layer. A through hole is formed in the electrode layer... Agent: Beyer Law Group LLP

20100224897 - Semiconductor optoelectronic device and method for forming the same: A semiconductor optoelectronic device with enhanced light extraction efficiency includes at least one protrusion structure, which can be formed around a light-emitting region of the device. The at least one protrusion structure can include a plurality of protrusion structures in one embodiment. In addition, a fabricating method for forming a... Agent: Wpat, PC Intellectual Property Attorneys

20100224900 - Semiconductor optoelectronic device and method for making the same: A semiconductor optoelectronic device with enhanced light extraction efficiency includes a major luminescent area and a secondary luminescent area, wherein the major luminescent area is surrounded by a secondary luminescent area. The secondary luminescent area not only can improve the light extraction efficiency of the major luminescent area, but per... Agent: Wpat, PC Intellectual Property Attorneys

20100224902 - Compliant bonding structures for semiconductor devices: A compliant bonding structure is disposed between a semiconductor light emitting device and a mount. When the semiconductor light emitting device is attached to the mount, for example by providing pressure, heat, and/or ultrasonic energy to the semiconductor light emitting device, the compliant bonding structure collapses to partially fill a... Agent: Philips Intellectual Property & Standards

20100224904 - Led package having an array of light emitting cells coupled in series: Disclosed is a light emitting diode (LED) package having an array of light emitting cells coupled in series. The LED package comprises a package body and an LED chip mounted on the package body. The LED chip has an array of light emitting cells coupled in series. Since the LED... Agent: H.c. Park & Associates, PLC

20100224903 - Light emitting device package and method of manufacturing the same: A light emitting device package is provided. The light emitting device package comprises a substrate comprising a plurality of protrusions, an insulating layer on the substrate, a metal layer on the insulating layer, and a light emitting device on the substrate electrically connected to the metal layer.... Agent: Birch Stewart Kolasch & Birch

20100224905 - Semiconductor light source: A semiconductor light source for illuminating physical spaces includes a lead frame with multiple facets, each facet having one or more semiconductor light emitting devices mounted thereon.... Agent: Cao Group, Inc.

20100224906 - Composition encapsulating optical semiconductor and optical semiconductor device using same: A composition for encapsulating optical semiconductors. The composition comprises (A) a mixture of a linear alkenyl group-containing organopolysiloxane and an alkenyl group-containing organopolysiloxane resin containing at least one SiO2 unit, (B) a mixture of a linear organohydrogenpolysiloxane containing two or more SiH groups and a branched organohydrogenpolysiloxane that is liquid... Agent: Birch Stewart Kolasch & Birch

20100224907 - Semiconductor device: To provide a semiconductor device in which dielectric breakdown strength in a peripheral region is increased without increasing on-resistance. An IGBT comprises a body region, guard ring, and collector layer. The body region is formed within an active region in a surface layer of a drift layer. The guard ring... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100224908 - Semiconductor device: A semiconductor device according to the present invention includes a substrate; a nitride semiconductor layer formed above the substrate and having a laminated structure including at least three layers; a heterojunction bipolar transistor formed in a region of the nitride semiconductor layer; and a field-effect transistor formed in a region... Agent: Greenblum & Bernstein, P.L.C

20100224909 - Semiconductor device and method for fabricating the same: A first well region of a second conductivity type is formed in the portion of the semiconductor layer of the first conductivity type located in an element portion in which a vertical element is disposed, while a second well region of the second conductivity type is formed in the portion... Agent: Mcdermott Will & Emery LLP

20100224910 - Field effect transistor: Disclosed is an HJFET 110 which comprises: a channel layer 12 composed of InyGa1-yN (0≦y≦1); a carrier supply layer 13 composed of AlxGa1-xN (0≦x≦1), the carrier supply layer 13 being provided over the channel layer 12 and including at least one p-type layer; and a source electrode 15S, a drain... Agent: Young & Thompson

20100224911 - Gallium nitride high electron mobility transistor: There is provided a gallium nitride high electron mobility transistor including: a channel layer that lets a carrier travel at high velocity; a carrier supply layer that generates the carrier; and a cap layer, disposed on the carrier supply layer and functioning to prevent oxidation of the carrier supply layer,... Agent: Rabin & Berdo, PC

20100224912 - Chromium doped diamond-like carbon: A heterojunction is provided for spin electronics applications. The heterojunction includes an n-type silicon semiconductor and a hydrogenated diamond-like carbon film deposited on the n-type silicon semiconductor. The hydrogenated diamond-like carbon film is doped with chromium. The concentration of the chromium dopant in the chromium doped diamond-like carbon film may... Agent: Adams And Reese LLP

20100224913 - One-dimensional fet-based corrosion sensor and method of making same: A field effect transistor corrosion sensor (10) comprises a doped silicon-on-insulator chip layer (14) and nanostructured channels (16) developed on the chip layer (14). A nafion receptive or sensor layer (30) is developed over the nanostructured channels (16). The sensor (10) includes source (24) and drain electrodes (22) attached to... Agent: Navarro Law Office, PC

20100224914 - Semiconductor device: Provided is a semiconductor device including: a first n-channel fin-type field effect transistor formed on a first crystal plane; and a second n-channel fin-type field effect transistor formed on the first crystal plane and having a gate length longer than that of the first n-channel fin-type field effect transistor. A... Agent: Young & Thompson

20100224915 - Method for producing semiconductor chip, and field effect transistor and method for manufacturing same: According to a method of the present invention for manufacturing a semiconductor piece, at least two semiconductor layers (12) are first formed on a substrate (10) by stacking a sacrificial layer (11) and the semiconductor layer (12) on the substrate (10) in this order and repeating this stacking. Next, the... Agent: Hamre, Schumann, Mueller & Larson P.C.

20100224916 - Semiconductor device: It is made possible to optimize the effective work function of the metal for a junction and suppress the resistance as far as possible at the interface between a semiconductor or a dielectric material and a metal. A semiconductor device includes: a semiconductor film; a Ti oxide film formed on... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100224917 - Solid-state image pickup apparatus and method of manufacturing the same: Disclosed is a solid-state image pickup apparatus including a semiconductor substrate, a photoelectric converter, a transfer gate, an insulating layer, a first silicon layer, and a pixel transistor portion. The photoelectric converter converts light energy of incident light into electrical energy and obtains a signal charge. The photoelectric converter is... Agent: Lerner, David, Littenberg, Krumholz & Mentlik

20100224918 - Semiconductor devices and cmos image sensors having a shielding wall, electronic apparatuses having the same and methods of fabricating the same: Semiconductor devices, CMOS image sensors, electronic apparatuses and methods of fabricating the same are provided, the semiconductor devices include a semiconductor substrate having stopper layers and interlayer insulating layers which are alternately stacked, wherein interfaces between the stopper layers and the interlayer insulating layers are formed in a horizontal direction.... Agent: Harness, Dickey & Pierce, P.L.C

20100224919 - Ferroic component: A ferroic component is described, comprising a ferroic layer (10) arranged between two electrodes (12,13), a thin-film field-effect transistor (4) whose gate electrode (3) forms one of the two electrodes (12, 13) of the ferroic layer (10) which is joined to the gate electrode (3) via an intermediate layer (11)... Agent: Collard & Roe, P.C.

20100224920 - Magnetoresistive memory cell and method of manufacturing memory device including the same: A magnetoresistive memory cell includes a magnetic tunnel junction element; and a selection transistor, wherein the selection transistor includes a first conductive type semiconductor layer, a gate electrode formed on the first conductive type semiconductor layer with a gate insulation film interposed between the first conductive type semiconductor layer and... Agent: Ip & T Law Firm PLC

20100224921 - Semiconductor device including ferroelectric capacitor: A semiconductor device includes a ferroelectric capacitor formed above the lower interlevel insulating film covering a MOS transistor formed on a semiconductor substrate, including lamination of a lower electrode, an oxide ferroelectric film, a first upper electrode made of conductive oxide having a stoichiometric composition AOx1 and an actual composition... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100224922 - Semiconductor device and method of manufacturing the same: A semiconductor device includes: a first multi-layered structure; a first insulating film over the first multi-layered structure, the first insulating film containing fluorine; and a second insulating film over the first insulating film.... Agent: Young & Thompson

20100224923 - Semiconductor memory device and method of manufacturing the same: Provided are a semiconductor memory device and a method of manufacturing the same. The semiconductor memory device may include a plurality of active pillars projecting from a semiconductor substrate, a gate pattern disposed on at least a portion of each of the active pillars with a gate insulator interposed therebetween,... Agent: Lee & Morse, P.C.

20100224924 - Techniques for forming a contact to a buried diffusion layer in a semiconductor memory device: Techniques for forming a contact to a buried diffusion layer in a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a semiconductor memory device. The semiconductor memory device may comprise a substrate comprising an upper layer. The semiconductor memory device may also... Agent: Hunton & Williams LLP Intellectual Property Department

20100224925 - Metal-insulator-metal structure for system-on-chip technology: The present disclosure provides a semiconductor device that includes a semiconductor substrate, an isolation structure formed in the semiconductor substrate, a conductive layer formed over the isolation structure, and a metal-insulator-metal (MIM) capacitor formed over the isolation structure. The MIM capacitor has a crown shape that includes a top electrode,... Agent: Haynes And Boone, LLPIPSection

20100224926 - Non-volatile semiconductor memory device: A plurality of NAND cells are arranged in a cell array. In each of the NAND cells, a pair of selection gate transistors is connected in series to a plurality of memory cell transistors. An inter-gate connection trench is formed in an insulating film between layers of stacked gates of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100224928 - Method for manufacturing nonvolatile semiconductor memory device and nonvolatile semiconductor memory device: A method for manufacturing a nonvolatile semiconductor memory device, the device including a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction and a semiconductor pillar piercing the stacked structural unit in the first direction, the method includes:... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100224929 - Nonvolatile memory device: A vertical NAND string nonvolatile memory device can include an upper dopant region disposed at an upper portion of an active pattern and can have a lower surface located a level higher than an upper surface of an upper selection gate pattern. A lower dopant region can be disposed at... Agent: Myers Bigel Sibley & Sajovec

20100224927 - Nonvolatile semiconductor memory device: A NAND-type nonvolatile semiconductor memory device which suppresses write error caused by hot carriers and has improved reliability is provided. On a main plane of a semiconductor substrate, a plurality of memory cell transistors connected in series with each other, and a select gate transistor connected to an end of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100224930 - Memory cells: Some embodiments include methods of forming memory cells. Dopant is implanted into a semiconductor substrate to form a pair of source/drain regions that are spaced from one another by a channel region. The dopant is annealed within the source/drain regions, and then a plurality of charge trapping units are formed... Agent: Wells St. John P.s.

20100224931 - Trench moseft with trench gates underneath contact areas of esd diode for prevention of gate and source shortage: A trench DMOS transistor employing trench contacts has overvoltage protection for prevention of shortage between gate and source, comprising a plurality of first-type function trenched gates, at least one second-type function trenched gate and at least two third-type function trenched gates extending through body regions and into an epitaxial layer.... Agent: Bayshore Patent Group, LLC

20100224932 - Insulated gate-type semiconductor device and manufacturing method thereof: A semiconductor 100 has a P− body region and an N− drift region in the order from an upper surface side thereof. A gate trench and a terminal trench passing through the P− body region are formed. The respective trenches are surrounded with P diffusion regions at the bottom thereof.... Agent: Kenyon & Kenyon LLP

20100224933 - Semiconductor device: Provided is a semiconductor device including an N-channel high-voltage MOS transistor, in which wiring metal connected to a drain region is laid above a boundary portion between an oxide film formed by LOCOS process or the like on a low impurity concentration region and a high impurity concentration region forming... Agent: Bruce L. Adams, Esq Adams & Wilks

20100224934 - Display device: The invention provides an active matrix EL display device which can perform a clear multi-gray scale color display. In particular, the invention provides a large active matrix EL display device at low cost by a manufacturing method which can selectively form a pattern. Power supply lines in a pixel portion... Agent: Nixon Peabody, LLP

20100224935 - Semiconductor component and semiconductor device: A semiconductor component includes a mixed crystal layer of silicon and germanium having a first main surface, containing a III-group impurity, and having a first face orientation alone represented as a face (11N) by using N satisfying 1.2<N<10 or a face crystallographically equivalent to the face (11N) in the first... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100224936 - Semiconductor device and method of fabricating the same: A semiconductor device according to one embodiment includes: adjacent first and second transistors each formed on a semiconductor substrate, the first and second transistors respectively having first and second gate electrodes and sharing a source/drain region therebetween; a first insulating film formed on the first gate electrode; a second insulating... Agent: Turocy & Watson, LLP

20100224938 - Cmos transistors with silicon germanium channel and dual embedded stressors: A p-type MOSFET of a CMOS structure has a silicon-germanium alloy channel to which a longitudinal compressive stress is applied by embedded epitaxial silicon-germanium alloy source and drain regions comprising a silicon-germanium alloy having a higher concentration of germanium than the channel of the p-type MOSFET. An n-type MOSFET of... Agent: Scully, Scott, Murphy & Presser, P.C.

20100224937 - Method for integrating silicon germanium and carbon doped silicon within a strained cmos flow: The disclosure provides a semiconductor device and method of manufacture therefore. The method for manufacturing the semiconductor device, in one embodiment, includes providing a substrate (210) having a PMOS device region (220) and NMOS device region (260). Thereafter, a first gate structure (240) and a second gate structure (280) are... Agent: Texas Instruments Incorporated

20100224940 - Partially and fully silicided gate stacks: Metal-oxide semiconductor (MOS) devices and techniques for the fabrication thereof are provided. In one aspect, a metal-oxide semiconductor device is provided comprising a substrate; and at least one n-channel field effect transistor (NFET) having a gate stack over the substrate. The NFET gate stack comprises an NFET gate stack metal... Agent: Michael J. Chang, LLC

20100224939 - Semiconductor device: Provided is a metal-oxide semiconductor (MOS) transistor containing a metal gate pattern. The semiconductor device includes a p-channel metal-oxide semiconductor (PMOS) transistor including a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a first metal gate conductive film formed on the first insulating film, and a nitrogen... Agent: F. Chau & Associates, LLC

20100224941 - Semiconductor device: A semiconductor device includes a MISFET. The semiconductor device also includes a silicon nitride film 12 and a silicon nitride film 10 arranged on the silicon nitride film 12. The silicon nitride film 12 covers at least a portion of an upper part of a source/drain 8 of the MISFET... Agent: Young & Thompson

20100224942 - Semiconductor device and method of fabricating the same: Provided are a semiconductor device and a method of fabricating the same. According to the semiconductor device, a silicide layer is formed on at least a part of both sidewalls of a gate pattern on a device isolation layer, thereby reducing resistance of the gate pattern. This makes an operation... Agent: Mills & Onello LLP

20100224943 - Semiconductor device and manufacturing methods with using non-planar type of transistors: Static random access memory cells and methods of making static random access memory cells are provided. The static random access memory cells contain two non-planar pass-gate transistors, two non-planar pull-up transistors, two non-planar pull-down transistors. A portion of a fin of the non-planar pull-up transistor is electrically connected to a... Agent: Turocy & Watson, LLP

20100224944 - Ruthenium for a dielectric containing a lanthanide: A gate containing ruthenium for a dielectric having an oxide containing a lanthanide and a method of fabricating such a combination gate and dielectric produce a reliable structure for use in a variety of electronic devices. A ruthenium or a conductive ruthenium oxide gate may be formed on a lanthanide... Agent: Schwegman, Lundberg & Woessner/micron

20100224945 - Sensor device and manufacturing method thereof: In manufacturing a sensor device, a sensor chip having a sensing portion on a surface thereof is mounted on one surface of a substrate, and a resin having a volatile property is arranged on the surface of the sensor chip, thereby covering the surface of the sensor chip. Then, the... Agent: Posz Law Group, PLC

20100224946 - Solid-state image pickup element, method of manufacturing the same, and image pickup apparatus including the same: An embodiment of the invention provides a solid-state image pickup element, including: a semiconductor layer having a photodiode, photoelectric conversion being carried out in the photodiode; a silicon oxide film formed on the semiconductor layer in a region having at least the photodiode by using plasma; and a film formed... Agent: Robert J. Depke Lewis T. Steadman

20100224948 - Solid-state imaging element, method for fabricating the same, and solid-state imaging device: A solid-state imaging element includes a semiconductor substrate formed with a valid pixel section including a plurality of photodetector sections, spacers formed on the valid pixel section, a transparent adhesive filling gaps among the spacers, and a transparent substrate which is bonded onto the spacers using the transparent adhesive and... Agent: Mcdermott Will & Emery LLP

20100224947 - Stacked pixel for high resolution cmos image sensor: Provided is a solid-state CMOS image sensor, specifically a CMOS image sensor pixel that has stacked photo-sites, high sensitivity, and low dark current. In an image sensor including an array of pixels, each pixel includes: a standard photo-sensing and charge storage region formed in a first region under a surface... Agent: Mcandrews Held & Malloy, Ltd

20100224949 - Epoxy resin composition for optical semiconductor light-receiving element encapsulation and process for producing the same, and optical semiconductor device: The present invention relates to an epoxy resin composition for optical semiconductor light-receiving element encapsulation, the epoxy resin composition including the following components (A) to (D): (A) an epoxy resin; (B) a curing agent; (C) a curing accelerator; and (D) a yellow colorant, in which the component (D) is contained... Agent: Sughrue-265550

20100224950 - Apparatus and method using patterned array with separated islands: Aspects of the disclosure are directed to an apparatus that is used to provide a circuit layer via a supportive substrate or material layer having an upper surface and having edge surfaces configured and arranged to define patterned aperture channels. The material layer includes an array of patterned islands which... Agent: Crawford Maunu PLLC

20100224951 - Solid-state imaging device, method for producing the same, and electronic apparatus: A solid-state imaging device includes: a peripheral circuit element formed on a semiconductor substrate having an image sensing area where an image sensing element that captures an image of an object is provided and a peripheral area located on the periphery of the image sensing area, the peripheral circuit element... Agent: Lerner, David, Littenberg, Krumholz & Mentlik

20100224952 - Schottky barrier diode and method of producing the same: A Schottky barrier diode includes an epitaxial growth layer disposed on a substrate and having a mesa portion, and a Schottky electrode disposed on the mesa portion, wherein a distance between an edge of the Schottky electrode and a top surface edge of the mesa portion is 2 μm or... Agent: Venable LLP

20100224953 - Rectifier applicable in high temperature condition: A rectifier for high temperature application includes a conductive semiconductor layer, a conductive epitaxial layer, and a plurality of conductive doped regions within the conductive epitaxial layer. A fringe conductive doped region is formed surrounding the conductive doped region, and an outer fringe conductive doped region is formed further surrounding... Agent: Rosenberg, Klein & Lee

20100224954 - Substrate compositions and methods for forming semiconductor on insulator devices: Methods and apparatus for producing a semiconductor on insulator structure include: subjecting an implantation surface of a donor single crystal semiconductor wafer to an ion implantation process to create an exfoliation layer of the donor semiconductor wafer; bonding the implantation surface of the exfoliation layer to a glass substrate using... Agent: Corning Incorporated

20100224956 - E-fuse structure of semiconductor device: An e-fuse structure includes an anode, a cathode, a fuse part connecting the anode and the cathode to each other, and a dielectric contacting the fuse part. The dielectric is configured to apply a stress to the fuse part, where the stress constructively acting on a migration effect of atoms... Agent: Volentine & Whitt PLLC

20100224955 - Fuses of semiconductor device and method of forming the same: Devices and methods are disclosed a dielectric interlayer made of materials capable of forming tensile force is formed over a semiconductor substrate, and a fuse metal having stronger tensile force than the first dielectric interlayer is formed over the first dielectric interlayer. Accordingly, formation of fuse residues when blowing a... Agent: Ampacc Law Group

20100224957 - Microscopic electro-mechanical systems, radio frequency devices utilizing nanocoils and sprial pitch control techniques for fabricating the same: Novel applications of nanocoil technology and novel methods of fabricating nanocoils for use in such applications and others. Such applications include microscopic electro-mechanical systems (MEMS) devices including nanocoil mirrors, nanocoil actuators and nanocoil antenna arrays. Inductors or traveling wave tubes fabricated from nanocoils are also included. A method for fabricating... Agent: Andrews Kurth LLP

20100224958 - Rf-ic packaging method and circuits obtained thereby: Typically, chips nowadays comprise a number of circuits as well as a number of inductors, often RF-inductors. These IC inductors are essential to realize the voltage controlled oscillators needed in the many fully integrated transceiver chips, serving a multitude of wireless communication protocols, that are provided to the market today.... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100224960 - Embedded capacitor device and methods of fabrication: Embodiments of the present invention describe a semiconductor device having an embedded capacitor device and methods of fabricating the capacitor device. The capacitor device is formed between the passivation layers above the backend interconnect stack of a substrate. Fabricating the capacitor device between the passivation layers above the backend interconnect... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100224961 - Passivation of integrated circuits containing ferroelectric capacitors and hydrogen barriers: An integrated circuit that includes a logic region, a buffer region, and a ferroelectric capacitor region that contains ferroelectric capacitors. The integrated circuit also includes a hydrogen diffusion barrier film that overlies ferroelectric capacitors and also overlies a buffer region located between a ferroelectric capacitor region and a logic region.... Agent: Texas Instruments Incorporated

20100224959 - Semiconductor chip, transponder and method of manufacturing a transponder: A semiconductor chip (1, 91) for a transponder (3, 93) comprises a chip substrate (4) with a surface (5), chip terminals (6, 7) arranged on the surface (5), and a passivation layer (22) covering the surface (5) and completely covering the chip terminals (6, 7), so that an antenna (2,... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100224962 - Integrated circuit resistive devices including multiple interconnected resistance layers: A semiconductor device includes a semiconductor substrate comprising a cell region and a peripheral circuit region, a first resistance layer and a second resistance layer spaced apart from each other and sequentially stacked on the semiconductor substrate of the peripheral circuit region, a first plug connected to the first resistance... Agent: Myers Bigel Sibley & Sajovec

20100224963 - Compound semiconductor substrate, semiconductor device, and processes for producing them: A compound semiconductor substrate 10 according to the present invention is comprised of a Group III nitride and has a surface layer 12 containing a chloride of not less than 200×1010 atoms/cm2 and not more than 12000×1010 atoms/cm2 in terms of Cl and an oxide of not less than 3.0... Agent: Drinker Biddle & Reath (dc)

20100224964 - Epitaxially coated silicon wafer and method for producing an epitaxially coated silicon wafer: Epitaxially coated silicon wafers have a rounded and polished edge region and a region adjacent to the edge having a width of 3 mm on the front and rear sides, a surface roughness in edge region of 0.1-1.5 nm RMS relative to a spatial wavelength range of 10-80 μm, and... Agent: Brooks Kushman P.C.

20100224966 - Stress barrier structures for semiconductor chips: Stress barrier structures for semiconductor chips, and methods of fabrication thereof are described. In one embodiment, the semiconductor device includes a semiconductor substrate that includes active circuitry and an interconnect metallization structure over the active circuitry, wherein the interconnect metallization structure includes a layer of low-k insulating layer. A first... Agent: Slater & Matsil, L.L.P.

20100224965 - Through-silicon via structure and method for making the same: A through-silicon via structure includes a substrate with a first side and a second side, a through-silicon hole connecting the first side and the second side and filled with a conductive material, a passivation layer disposed on and contacting the first side and covering the through-silicon hole, and a protection... Agent: North America Intellectual Property Corporation

20100224967 - Silicon pillars for vertical transistors: In order to form a more stable silicon pillar which can be used for the formation of vertical transistors in DRAM cells, a multi-step masking process is used. In a preferred embodiment, an oxide layer and a nitride layer are used as masks to define trenches, pillars, and active areas... Agent: Knobbe Martens Olson & Bear LLP

20100224968 - High resistivity silicon wafer and method for manufacturing the same: This method for manufacturing a high resistivity silicon wafer includes pulling a single crystal such that the single crystal has a p-type dopant concentration at which a wafer surface resistivity becomes in a range of 0.1 to 10 kΩcm, an oxygen concentration Oi of 5.0×1017 to 20×1017 atoms/cm3 (ASTM F-121,... Agent: Greenblum & Bernstein, P.L.C

20100224969 - Electronic device and method of packaging an electronic device: An electronic device and a method of packaging an electronic device are disclosed. In one embodiment, the electronic device can include a first die. The electronic device can also include a dielectric layer defining a first opening. The first die can be disposed within the first opening. Further, the electronic... Agent: Larson Newman & Abel, LLP

20100224971 - Leadless integrated circuit package having high density contacts: A leadless integrated circuit (IC) package comprising an IC chip mounted on a metal leadframe and a plurality of electrical contacts electrically coupled to the IC chip. The IC chip, the electrical contacts, and a portion of the metal leadframe are covered with an encapsulation compound, with portions of the... Agent: Winstead PC

20100224970 - Leadless integrated circuit package having standoff contacts and die attach pad: A leadless integrated circuit (IC) package comprising an IC chip mounted on a die attach pad and a plurality of electrical contacts electrically connected to the IC chip. The IC chip, the electrical contacts, and the die attach pad are all covered with a molding material, with portions of the... Agent: Winstead PC

20100224972 - Leadless integrated circuit package having standoff contacts and die attach pad: A leadless integrated circuit (IC) package comprising an IC chip mounted on a die attach pad and a plurality of electrical contacts electrically connected to the IC chip. The IC chip, the electrical contacts, and the die attach pad are all covered with a molding material, with portions of the... Agent: Winstead PC

20100224973 - Semiconductor memory device and method of fabricating the same: Provided is a semiconductor device and method of fabricating the semiconductor memory device. The semiconductor device may be formed by forming a first welding groove along outside edges of one case of a pair of upper and lower cases, forming a first welding protrusion along outside edges of the other... Agent: Harness, Dickey & Pierce, P.L.C

20100224974 - Integrated circuit packaging system with patterned substrate and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a package substrate having a component side and a system side; depositing a solder resist layer on the component side of the package substrate; patterning groups of access openings and a die mount opening in the solder resist... Agent: Law Offices Of Mikio Ishimaru

20100224975 - Integrated circuit packaging system with a dual board-on-chip structure and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a first board-on-chip-structure having a first integrated circuit die mounted over a substrate and the substrate having a substrate cavity; mounting a second board-on-chip-structure over the first board-on-chip-structure, the second board-on-chip-structure having a second integrated circuit die mounted... Agent: Law Offices Of Mikio Ishimaru

20100224978 - Integrated circuit packaging system with flex tape and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; attaching a device to the substrate; providing interconnects on the substrate; and forming a flexible tape substantially conformal to the device and contacting the interconnects.... Agent: Law Offices Of Mikio Ishimaru

20100224976 - Method for embedding silicon die into a stacked package: Several embodiments of microelectronic configurations with logic components and associated methods of manufacturing are disclosed herein. In one embodiment, the configuration includes a substrate with a recess, a first die carried by the substrate wherein the die substantially covers the recess, and a logic component carried by the die in... Agent: Perkins Coie LLP Patent-sea

20100224977 - Semiconductor device and method for fabricating the same: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device may include a substrate including a cell area and a scribe lane area defining the cell area, at least one pad on the cell area, at least one through electrode penetrating the substrate and electrically... Agent: Harness, Dickey & Pierce, P.L.C

20100224979 - Stacked integrated circuit package system and method for manufacturing thereof: A method for manufacturing of a stacked integrated circuit package system includes: providing a base integrated circuit package having a base encapsulation with a cavity therein and a base interposer exposed by the cavity; mounting an intermediate integrated circuit package over the base interposer; and mounting a top integrated circuit... Agent: Law Offices Of Mikio Ishimaru

20100224980 - Hermetic packaging of integrated circuit components: A method for forming an integrated circuit includes transforming at least a portion of a first substrate layer to form a conductive region within the first substrate layer. An integrated circuit device is provided proximate an outer surface of the first substrate layer. The integrated circuit device transmits or receives... Agent: Baker Botts LLP

20100224981 - Routable array metal integrated circuit package: An integrated circuit assembly comprises an integrated circuit die, and a routable metal layer comprising metal traces linking a plurality of wire bond pads to a plurality of external connection pads such that the metal traces are routable under the die area. An electrically nonconductive adhesive layer couples the integrated... Agent: Schwegman, Lundberg & Woessner / Atmel

20100224985 - Chip-scale packaging with protective heat spreader: A semiconductor package can include a semiconductor die having an integrated circuit, a first die surface, and an opposite second die surface. A packaging can be attached to the die and have a holder surface opposite the first die surface. A heat spreader can be configured to cover the second... Agent: Fish & Richardson P.C.

20100224982 - Lead and lead frame for power package: A power device includes a semiconductor chip provided over a substrate, and a patterned lead. The patterned lead includes a raised portion located between a main portion and an end portion. At least part of the raised portion is positioned over the semiconductor chip at a larger height than both... Agent: Townsend And Townsend And Crew, LLP

20100224986 - Mounted body and method for manufacturing the same: A mounted body (100) of the present invention includes: a semiconductor element (10) having a surface (10a) on which element electrodes (12) are formed and a rear surface (10b) opposing the surface (10a); and a mounting board (30) on which wiring patterns (35) each having an electrode terminal (32) are... Agent: Hamre, Schumann, Mueller & Larson P.C.

20100224984 - Semiconductor device and stacked semiconductor device in which circuit board and semiconductor chip are connected by leads: A semiconductor device according to one embodiment has a wiring circuit board, a semiconductor chip, a die attach material and bumps. The semiconductor chip is mounted on the wiring circuit board. The die attach material is provided between the wiring circuit board and the semiconductor chip. A wiring layer is... Agent: Young & Thompson

20100224983 - Semiconductor package structure and manufacturing method thereof: A manufacturing method of a semiconductor package structure includes the following steps. Firstly, a carrier having an adhesion tape is provided. Next, a plurality of chips are disposed on the adhesion tape. Then, a molding compound is dispensed on the adhesion tape, so that the molding compound covers the chips.... Agent: Cooley LLP Attn: Patent Group

20100224989 - Microelectronic devices having intermediate contacts for connection to interposer substrates, and associated methods of packaging microelectronic devices with intermediate contacts: Microelectronic devices having intermediate contacts, and associated methods of packaging microelectronic devices with intermediate contacts, are disclosed herein. A packaged microelectronic device configured in accordance with one embodiment of the invention includes a microelectronic die attached to an interconnecting substrate. The microelectronic die includes an integrated circuit electrically coupled to... Agent: Perkins Coie LLP Patent-sea

20100224988 - Semiconductor package substrate, semiconductor package using the substrate, and method of manufacturing semiconductor package substrate: A semiconductor package substrate comprises a substrate core layer, and a land formed on one surface of the substrate core layer for mounting an external electrode terminal thereon. Then, a hole having a diameter smaller than that of the land is dug into the substrate core layer from a position... Agent: Foley And Lardner LLP Suite 500

20100224987 - Stress buffering package for a semiconductor component: The present invention relates to a stress buffering package for a semiconductor component, wherein a stress buffering means comprises individual stress buffering elements that do not influence the stress buffering effect from each other. Furthermore the invention relates a method for manufacturing a stress buffering package for a semiconductor component.... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100224990 - Semiconductor package having an internal cooling system: A semiconductor package having an internal cooling system is presented which includes a semiconductor chip and a through-electrode. The semiconductor chip has a circuit section. The through-electrode passes through an upper surface and a lower surface the semiconductor chip. The through-electrode is electrically connected with the circuit section of the... Agent: Ladas & Parry LLP

20100224991 - Integrated circuit heat spreader stacking system: An integrated circuit heat spreader stacking system includes: an integrated circuit on a substrate; a heat spreader having a heat sink dome; a stacking stand-off for the heat spreader; and the heat spreader mounted with the heat sink dome over the integrated circuit.... Agent: Law Offices Of Mikio Ishimaru

20100224992 - System and method for stacked die embedded chip build-up: An embedded chip package (ECP) includes a plurality of re-distribution layers joined together in a vertical direction to form a lamination stack, each re-distribution layer having vias formed therein. The embedded chip package also includes a first chip embedded in the lamination stack and a second chip attached to the... Agent: Ge Trading & Licensing

20100224993 - Forming sacrificial composite materials for package-on-package architectures and structures formed thereby: Methods of forming a microelectronic packaging structure are described. Those methods may include forming a solder paste comprising a sacrificial polymer on a substrate, curing the solder paste below a reflow temperature of the solder to form a solid composite hybrid bump on the conductive pads, forming a molding compound... Agent: Intel Corporation C/o Cpa Global

20100224994 - Low temperature metal to silicon diffusion and silicide wafer bonding: A method of bonding two members includes forming a metal pad on a first member and a silicon pad on the second member, and coupling the pads at a temperature and pressure that will not damage features of the members, such as integrated circuitry or MEMS devices, but is sufficient... Agent: Sunstein Kann Murphy & Timbers LLP

20100224996 - Methods of manufacturing copper interconnect systems: An integrated circuit (IC) may include a substrate, a first dielectric layer adjacent the substrate, and at least one trench in the first dielectric layer. The IC may also include a metal liner within the at least one trench, and a first conductive region including copper within the at least... Agent: Woodcock Washburn LLP

20100224995 - Semiconductor device having silicon-diffused metal wiring layer and its manufacturing method: In a semiconductor device, an insulating interlayer having a groove is formed on an insulating underlayer. A silicon-diffused metal layer including no metal silicide is buried in the groove. A metal diffusion barrier layer is formed on the silicon-diffused metal layer and the insulating interlayer.... Agent: Sughrue Mion, PLLC

20100224997 - Semiconductor device: A semiconductor device includes a first metal layer disposed on a semiconductor substrate; an insulating layer disposed on the first metal layer; and a second metal layer disposed on the insulating layer and having an electrode pad surface exposed to the outside, wherein a recess is disposed in the insulating... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100224998 - Integrated circuit with ribtan interconnects: An integrated circuit (IC) includes an interconnect system made of electrically conducting ribtan material. The integrated circuit includes a substrate, a set of circuit elements that are formed on the substrate, an interconnect system that interconnects the circuit elements. At least part of the interconnect system is made of a... Agent: Houst Consulting (kont)

20100224999 - Method for producing metallic interconnect lines: the ion implantation of the so-called invasion layer by an ion beam according to one of the previously defined orientations of the ion implantation beam (Di1, Di2, Di3).... Agent: Lariviere, Grubman & Payne, LLP

20100225001 - Manufacturing method of semiconductor device, semiconductor device, and electronic device: In a method for manufacturing a semiconductor device having a plate-shaped member, a semiconductor element, and a wiring board, the manufacturing method for the semiconductor device includes: a concave portion forming step (S101) of the plate-shaped member; a semiconductor element provisionally adhering step (S102) for provisionally adhering the semiconductor element... Agent: Drinker Biddle & Reath (dc)

20100225000 - Semiconductor device and method of manufacturing semiconductor device: A semiconductor device includes a semiconductor substrate including a wiring layer; electrode pads that are not provided on, above and below with the semiconductor substrate and are provided to be electrically connected with wiring lines included in the wiring layer; and a resin layer that is fixed to the semiconductor... Agent: Turocy & Watson, LLP

20100225006 - Chips having rear contacts connected by through vias to front contacts: A microelectronic unit is provided in which front and rear surfaces of a semiconductor element may define a thin region which has a first thickness and a thicker region having a thickness at least about twice the first thickness. A semiconductor device may be present at the front surface, with... Agent: Tessera Lerner David Et Al.

20100225003 - Method for manufacturing a semiconductor device and semiconductor device obtainable with such a method: A method for manufacturing a semiconductor device includes providing a patterned hard-mask layer. The hard-mask layer is provided on an exposed surface of one or more layers to be patterned of a semiconductor intermediate product. The hard-mask layer covers the exposed surface in covered areas of the one or more... Agent: Larson Newman & Abel, LLP

20100225004 - Semiconductor apparatus and method of manufacturing semiconductor apparatus: A semiconductor apparatus including a semiconductor substrate having a first principal surface on which an electric circuit is formed and a second principal surface opposed to the first principal surface, and a through hole that penetrates the first principal surface and the second principal surface, a multilayered wiring layer having... Agent: Scully Scott Murphy & Presser, PC

20100225005 - Semiconductor device: A semiconductor device includes a plurality of through vias extending through a substrate. The plurality of through vias are arranged dividedly in three or more via groups. Each of the via groups includes three or more of the through vias that are arranged in two dimensions.... Agent: Mcdermott Will & Emery LLP

20100225002 - Three-dimensional system-in-package architecture: A system and method for making semiconductor die connections with through-silicon vias (TSVs) are disclosed. A semiconductor die is manufactured with both via-first TSVs as well as via-last TSVs in order to establish low resistance paths for die connections between adjacent dies as well as for providing a low resistance... Agent: Slater & Matsil, L.L.P.

20100225007 - Integrated circuit packaging system with stacked die and method of manufacture thereof: A method of manufacture of an integrated circuit packaging system includes: forming a flip chip die, having a backside protrusion; mounting a wire bond die on the flip chip die, adjacent to the backside protrusion; and mounting an internal stacking module over the backside protrusion and the wire bond die.... Agent: Law Offices Of Mikio Ishimaru

20100225008 - Wire bond interconnection: A wire bond interconnection between a die pad and a bond finger includes a support pedestal at a bond site of the lead finger, a ball bond on the die pad, and a stitch bond on the support pedestal, in which a width of the lead finger at the bond... Agent: Law Offices Of Mikio Ishimaru

20100225009 - Integrated circuit assemblies with alignment features and devices and methods related thereto: A method of packaging an integrated circuit die including forming a mask window having a first aperture with a first set of alignment edges and forming an alignment feature on an uppermost surface of the integrated circuit die where the alignment feature has a second set of alignment edges. The... Agent: Schwegman, Lundberg & Woessner / Atmel

20100225010 - Composition for thermosetting silicone resin: The present invention relates to a composition for a thermosetting silicone resin, the composition including: (A) an organohydrogenpolysiloxane; (B) an alkenyl group-containing epoxy compound; (C) an alkenyl group-containing cyclic siloxane; and (D) a hydrosilylation catalyst, a thermosetting silicone resin composition obtained by reacting the composition and a production method thereof,... Agent: Sughrue-265550

20100225011 - System and method for integrated circuit fabrication: A system and method for integrated circuit fabrication is provided. A wafer holding system includes a wafer carrier that holds the wafer at a specified alignment, and a top ring disposed on a top surface of the wafer and of the wafer carrier. The top ring holds the wafer and... Agent: Slater & Matsil, L.L.P.

20100219391 - Layered resistance variable memory device and method of fabrication: The invention is related to methods and apparatus for providing a resistance variable memory element with improved data retention and switching characteristics. According to one embodiment of the invention, a resistance variable memory element is provided having at least one silver-selenide layer in between two glass layers, wherein at least... Agent: Thomas J. D'amico Dickstein Shapiro Morin & Oshinsky LLP

20100219392 - Nonvolatile semiconductor memory device and manufacturing method for same: A three-dimensional memory cell array of memory cells with two terminals having a variable resistive element is formed such that: one ends of memory cells adjacent in Z direction are connected to one of middle selection lines extending in Z direction aligned in X and Y directions; the other ends... Agent: Birch Stewart Kolasch & Birch

20100219393 - Connectible nanotube circuit: Carbon nanotube template arrays may be edited to form connections between proximate nanotubes and/or to delete undesired nanotubes or nanotube junctions.... Agent: Iv - Suiter Swantz PC Llo

20100219394 - Method for fabricating a low-resistivity ohmic contact to a p-type iii-v nitride semiconductor material at low temperature: One embodiment of the present invention provides a method for fabricating a group III-V nitride structure with an ohmic-contact layer. The method involves fabricating a group III-V nitride structure with a p-type layer. The method further involves depositing an ohmic-contact layer on the p-type layer without first annealing the p-type... Agent: Park, Vaughan & Fleming LLP

20100219395 - Optical semiconductor device and method of manufacturing the same: Devices and techniques related to UV light-emitting devices that can be implemented in ways that improve the light-emitting efficiency of an UV light-emitting device using a group III nitride semiconductor.... Agent: Fish & Richardson, PC

20100219396 - Mechanism for forming a remote delta doping layer of a quantum well structure: A method of fabricating a quantum well device includes forming a diffusion barrier on sides of a delta layer of a quantum well to confine dopants to the quantum well.... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100219399 - Block copolymer: m

20100219398 - Bottom emission type organic electroluminescent panel: Provided is a bottom emission type organic EL panel capable of preventing or delaying loss of light emission from an end portion of the light emission area and reduction of the light emission area in an organic EL element. This organic electro luminescence panel includes an organic electro luminescence element... Agent: Lucas & Mercanti, LLP

20100219401 - Deposition of organic layers: A method for depositing one or more organic layers onto a substrate, which includes: transferring the one or more layers from a depositing surface of a stamp to the substrate by bringing the layer coated depositing surface of the stamp into contact with the substrate, and the use of either... Agent: Reinhart Boerner Van Deuren S.c. Attn: Linda Kasulke, Docket Coordinator

20100219405 - Novel arylamine polymer, method for producing the same, ink composition, film, electronic device, organic thin-film transistor, and display device: A polymer containing a repeating unit expressed by General Formula (I): General Formula (I) where Ar1 represents a substituted or unsubstituted aromatic hydrocarbon group; Ar2 and Ar3 each independently represent a divalent group of a substituted or unsubstituted aromatic hydrocarbon group; and R1 and R2 each independently represent a hydrogen... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100219404 - Organic el device: An organic EL device includes: an anode, a cathode and an organic thin-film layer interposed between the anode and the cathode, in which the organic thin-film layer includes: an emitting layer containing a host material and a phosphorescent material; and a hole transporting layer provided adjacent to the anode relative... Agent: Darby & Darby P.C.

20100219400 - Organic electroluminescent device: Provided is an organic electroluminescence device, including: an anode; a cathode; and organic thin film layers provided between the anode and the cathode, in which: the organic thin film layers have a light emitting layer, and have a hole injecting layer and a hole transporting layer, or a hole injecting/transporting... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100219403 - Organic light-emitting diodes comprising carbene-transition metal complex emitters, and at least one compound selected from disilylcarbazoles, disilyldibenzofurans, disilyldibenzothiophenes, disilyldibenzophospholes, disilyldibenzothiophene s-oxides and d: The present invention relates to an organic light-emitting diode comprising an anode An and a cathode Ka and a light-emitting layer E which is arranged between the anode An and the cathode Ka and comprises at least one carbene complex and if appropriate at least one further layer, where the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100219407 - Organic metal complex, and organic light emitting device and display apparatus using the same: e

20100219409 - Polythiophenes and devices thereof: wherein R represents a side chain, m represents the number of R substituents; A is a divalent linkage; x, y and z represent, respectively, the number of Rm substituted thienylenes, unsubstituted thienylenes, and divalent linkages A, respectively, in the monomer segment subject to z being 0 or 1, and n... Agent: Fay Sharpe / Xerox - Rochester

20100219408 - Sensor matrix with semiconductor components: The invention relates to a sensor matrix (1) with semiconductor components and a process for producing such a device, which sensor matrix comprises a laminar carrier layer (3), a first (4) and at least one second (10) electrode arrangement and a component arrangement (6). The first electrode arrangement (4) is... Agent: Collard & Roe, P.C.

20100219402 - Thin film transistor and method for producing the same: The present invention provides a method of manufacturing a thin film transistor of a top-contact structure with suppressed deterioration by a process which is easy and suitable for increase in area without damaging an organic semiconductor pattern. The organic semiconductor pattern is formed on a substrate. An electrode material film... Agent: K&l Gates LLP

20100219397 - Transition metal complex compound and organic electroluminescent device using same: Disclosed is a transition metal complex compound having a specific structure including a crosslinked stricture. Further, disclosed is an organic electroluminescence device including an organic thin film formed of one or more layers including at least a light-emitting layer, the organic thin film layer being interposed between a pair of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100219406 - Use of acridine derivatives as matrix materials and/or electron blockers in oleds: The present invention relates to the use of (hetero)aryl-substituted acridine derivatives as matrix materials in a light-emitting layer of organic light-emitting diodes (OLEDs) and/or in a blocking layer for electrons in organic light-emitting diodes. The present invention further relates to a light-emitting layer which comprises at least one emitter material... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100219410 - Semiconductor device and manufacturing method thereof: An object is to reduce to reduce variation in threshold voltage to stabilize electric characteristics of thin film transistors each using an oxide semiconductor layer. An object is to reduce an off current. The thin film transistor using an oxide semiconductor layer is formed by stacking an oxide semiconductor layer... Agent: Robinson Intellectual Property Law Office, P.C.

20100219411 - Semiconductor device having a metal oxide channel: A semiconductor device includes a metal oxide channel and methods for forming the same. The metal oxide channel includes indium, gallium, and zinc.... Agent: Hewlett-packard Company Intellectual Property Administration

20100219412 - Display device with improved pixel light emission and manufacturing method of the same: A display device with pixels capable of uniform light emission and a method of making the display device are presented. A display device has a plurality of TFTs, a protection layer formed on the TFTs, and a plurality of pixel electrodes formed on the protection layer and electrically connected to... Agent: Innovation Counsel LLP

20100219413 - Method for manufacturing semiconductor device and method for manufacturing display device: An object is to provide a method for manufacturing a highly-reliable semiconductor device with an improved material use efficiency and with a simplified manufacturing process. The method includes the steps of forming a conductive layer over a substrate, forming a light-transmitting layer over the conductive layer, and selectively removing the... Agent: Robinson Intellectual Property Law Office, P.C.

20100219414 - Thin film transistor array panel: A thin film transistor array panel, according to an embodiment of the present invention, includes a first data line, a second data line neighboring the first data line, a transistor disposed in a region between the first data line and the second data line, and a pixel electrode disposed close... Agent: Innovation Counsel LLP

20100219415 - Transistor, fabricating method thereof and flat panel display therewith: A transistor includes a substrate, an active region including a source region, a channel region, and a drain region which are crystallized using an SGS crystallization method and are formed on the substrate so that a grain size of a first annealed portion and a second annealed portion are different... Agent: Stein Mcewen, LLP

20100219416 - Method of improving surface morphology of (ga,al,in,b)n thin films and devices grown on nonpolar or semipolar (ga,al,in,b)n substrates: A method for improving the growth morphology of (Ga,Al,In,B)N thin films on nonpolar or semipolar (Ga,Al,In,B)N substrates, wherein a (Ga,Al,In,B)N thin film is grown directly on a nonpolar or semipolar (Ga,Al,In,B)N substrate or template and a portion of the carrier gas used during growth is comprised of an inert gas.... Agent: Gates & Cooper LLP Howard Hughes Center

20100219418 - Diamond led devices and associated methods: LED devices incorporating diamond materials and methods for making such devices are provided. One such method may include forming epitaxially a substantially single crystal SiC layer on a substantially single crystal Si wafer, forming epitaxially a substantially single crystal diamond layer on the SiC layer, doping the diamond layer to... Agent: Thorpe North & Western, LLP.

20100219417 - Semiconductor device and method for manufacturing same: A semiconductor device and a method of manufacturing the same, to appropriately determine an impurity concentration distribution of a field relieving region and reduce an ON-resistance. The semiconductor device includes a substrate, a first drift layer, a second drift layer, a first well region, a second well region, a current... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100219419 - Semiconductor element and method for manufacturing the same: Provided is a semiconductor element which can suppress deterioration of element characteristics even when a semiconductor element section includes a plurality of directions having different thermal expansion coefficients within an in-plane direction. A semiconductor laser element (the semiconductor element) is provided with the semiconductor element section, which includes a direction... Agent: Ditthavong Mori & Steiner, P.C.

20100219420 - Fk module and method for the production thereof: A module and method of its production in which areal electronic components are formed. The module includes (a) a cover electrode covering the electronic components; (b) a flexibly deformable substrate; (c) a base electrode formed on the substrate; and (d) an optically active layer faulted on the base electrode. The... Agent: Fay Kaplun & Marcin, LLP

20100219421 - Method and system for electrically coupling a chip to chip package: A chip and a chip package can transmit information to each other by using a set of converters capable of communicating with each other through the emission and reception of electromagnetic signals. Both the chip and the chip package have at least one such converter physically disposed on them. Each... Agent: Dorsey & Whitney LLP Intellectual Property Department

20100219422 - Photo-coupler: A photo-coupler is provided. The photo-coupler comprises a light emitting chip, a light-sensing chip, a light-transmissive inner encapsulant package and an outer package. Both the light emitting chip and the light-sensing chip face the same direction, while the light-sensing chip receives a light beam emitted by the light emitting chip.... Agent: Patterson Thuente Christensen Pedersen, P.A.

20100219425 - Light emitting device having a plurality of light emitting cells connected in series and method of fabricating the same: Disclosed are a light emitting device having a plurality of light emitting cells connected in series and a method of fabricating the same. The light emitting device includes a buffer layer formed on a substrate. A plurality of rod-shaped light emitting cells are located on the buffer layer to be... Agent: H.c. Park & Associates, PLC

20100219426 - Light emitting device having vertically stacked light emitting diodes: Disclosed is a light emitting device having vertically stacked light emitting diodes. It comprises a lower semiconductor layer of a first conductive type positioned on a substrate, a semiconductor layer of a second conductive type on the lower semiconductor layer of a first conductive type, and an upper semiconductor layer... Agent: H.c. Park & Associates, PLC

20100219423 - Light receiving or light emitting semiconductor module: Multiple semiconductor elements in a semiconductor module in which multiple spherical light receiving or emitting semiconductor elements are installed can easily be retrieved, reused, or repaired. In a semiconductor module 60, two segment modules 61 are serially arranged in a storage casing 62. The segment modules 61 are each formed... Agent: Jordan And Hamburg LLP

20100219424 - Organic el display panel and method of manufacturing the same: An organic EL display panel is provided which includes: a substrate which includes a plurality of luminescent regions which are arranged side by side in a specific direction and run in parallel to one another; a bank formed over the substrate, the bank defining a plurality of coating regions in... Agent: Greenblum & Bernstein, P.L.C

20100219427 - Light-emitting apparatus: Provided is a light-emitting apparatus in which light extraction efficiency of a light-emitting device is improved and viewing angle dependency of an emission color is reduced. The light-emitting apparatus includes a cavity structure and a periodic structure. When guided-wave light is diffracted by the periodic structure in a direction that... Agent: Fitzpatrick Cella Harper & Scinto

20100219429 - Top-emitting oled device with light-scattering layer and color-conversion: A top-emitting OLED device, comprising: one or more OLEDs formed on a substrate; a light-scattering layer formed over the one or more OLEDs; a transparent cover; one or more color filters formed on the transparent cover; a color-conversion material layer formed over the color filters, or formed over or integral... Agent: Morgan Lewis & Bockius LLP

20100219428 - Warm white light emitting apparatus and back light module comprising the same: A warm white light emitting apparatus includes a first light emitting diode (LED)-phosphor combination to generate a base light that is white or yellowish white and a second LED-phosphor combination to generate a Color Rendering Index (CRI) adjusting light. The base light and the CRI adjusting light together make a... Agent: H.c. Park & Associates, PLC

20100219430 - Light emitting system, light emitting apparatus and forming method thereof: A light emitting system, a light emitting apparatus and the forming method thereof, the light emitting system comprising a plurality of light emitting units (100) and a frame for connecting the light emitting units. Each light emitting unit comprises a substrate (102), one or a plurality of chips (104) disposed... Agent: Quintero Law Office, PC

20100219432 - Light emitting device and method for fabricating the same: Disclosed is a light emitting device. The light emitting device comprises a conductive substrate, an insulating layer on the conductive substrate, a plurality of light emitting device cells on the insulating layer, a connection layer electrically interconnecting the light emitting device cells, a first contact section electrically connecting the conductive... Agent: Birch Stewart Kolasch & Birch

20100219431 - Multi-junction led: A light source and method for making the same are disclosed. The light source includes a substrate and a light emitting structure that is deposited on the substrate. A barrier divides the light emitting structure into first and second segments that are electrically isolated from one another. A serial connection... Agent: The Law Offices Of Calvin B. Ward

20100219440 - Inverted led structure with improved light extraction: A light source and method for fabricating the same are disclosed. The light source includes a substrate and a light emitting structure. The substrate has a first surface and a second surface, the second surface including a curved, convex surface with respect to the first surface of the substrate. The... Agent: The Law Offices Of Calvin B. Ward

20100219434 - Light emitting device: A light emitting device is provided. The light emitting device may include a reflective layer having a prescribed pattern of at least one shape having prescribed thickness, width and periodicity. The light emitting device may also include a light emitting layer formed on the reflective layer. The prescribed periodicity may... Agent: Ked & Associates, LLP

20100219435 - Light emitting device: Provided is a light emitting device. The light emitting device comprises a body, a light emitting diode on the body, a resin layer on the light emitting diode, and a primer layer containing a metal material on the resin layer.... Agent: Birch Stewart Kolasch & Birch

20100219433 - Light emitting devices: Light emitting devices conformally covered by a luminescent material layer are presented. A light emitting device includes a semiconductor light emitting die attached to a substrate. At least one bond pad is disposed on the semiconductor light emitting die. A luminescent material layer conformally covers the semiconductor light emitting die,... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100219441 - Light emitting diode package structure: An LED package structure and an LED packaging method are disclosed. The LED package structure includes a substrate, an LED unit and a transparent holding wall. The LED unit is electrically connected and located on the surface of the substrate. The transparent holding wall that corresponds to the LED unit... Agent: Rosenberg, Klein & Lee

20100219437 - Nitride semiconductor light emitting diode: A nitride semiconductor light emitting diode includes a p-type layer 103 made of a p-type nitride semiconductor, a light emission layer 102 provided on a lower surface of the p-type layer 103, an n-type layer 101 made of an n-type nitride semiconductor provided on a lower surface of the light... Agent: Mcdermott Will & Emery LLP

20100219439 - Semiconductor light emitting device: Provided is a semiconductor light emitting device. The semiconductor light emitting device comprises a substrate, a first semiconductor layer on substrate, an air-gap part disposed in at least portion between the substrate and the first semiconductor layer, and a plurality of compound semiconductor layers comprising a first conductive type semiconductor... Agent: Birch Stewart Kolasch & Birch

20100219436 - Semiconductor light-emitting device and method for producing semiconductor light-emitting device: The present invention provides a semiconductor light-emitting device that includes a compound semiconductor layer formed by laminating a first clad layer, a light-emitting layer and a second clad layer, a plurality of first ohmic electrodes formed on the first clad layer, a plurality of second ohmic electrodes formed on the... Agent: Sughrue Mion, PLLC

20100219438 - Semiconductor light-emitting element and method for manufacturing the same: A semiconductor light-emitting device comprises: a semiconductor substrate; a semiconductor layer structure on the semiconductor substrate, including an active layer and a waveguide ridge; an electrode in contact with all of a top surface of the waveguide ridge; and an insulating film coating side faces of the waveguide ridge, side... Agent: Leydig Voit & Mayer, Ltd

20100219443 - Led packaging structure with blind hole welding device: The present invention provides a LED packaging structure, and more particularly to an innovative one designed with blind hole welding device. It at least comprises: a packaging body, which is provided with a wiring substrate; metal layers are separately arranged at both sides for coating the wiring substrate; the metal... Agent: Shui-chou Chou

20100219444 - Manufacturing method of mounting part of semiconductor light emitting element, manufacturing method of light emitting device, and semiconductor light emitting element: A manufacturing method of a mounting part of a semiconductor light emitting element comprising: preparing a semiconductor light emitting element including an electrode which has a surface, and a board which has a surface; forming a plurality of bump material bodies on at least one of the surface of the... Agent: Mcginn Intellectual Property Law Group, PLLC

20100219442 - Semiconductor light emitting device and method for manufacturing thereof: Provided is a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device includes a light emitting structure, an insulating substrate, a first electrode, a second electrode, and a conductive supporting substrate. The light emitting structure includes a first conductive semiconductor layer, an active... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100219445 - Group iii nitride semiconductor light-emitting device, method for manufacturing the same, and lamp: A buffer layer 12 composed of at least a Group III nitride compound is laminated on a substrate 11 composed of sapphire, and an n-type semiconductor layer 14, a light-emitting layer 15, and a p-type semiconductor layer 16 are laminated in a sequential manner on the buffer layer 12. The... Agent: Sughrue Mion, PLLC

20100219446 - High speed igbt: An IGBT with almost no tail during turning-off is formed by connection of both the base and the emitter of the BJT of the IGBT at the bottom of the chip to two regions in an area of the top surface of the chip. The two regions keep non-depleted even... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20100219447 - Semiconductor device: An n+-emitter layer arranged under an emitter electrode is formed of convex portions arranged at predetermined intervals and a main body coupled to the convex portions. A convex portion region is in contact with the emitter electrode, and a p+-layer doped more heavily than a p-base layer is arranged at... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100219448 - Semiconductor device and semiconductor integrated circuit device for driving plasma display using the semiconductor device: The output circuit uses an IGBT incorporating a normal latch-up operation measure and the ESD clamp circuit uses an IGBT that can more easily latch up than the output circuit device which has the latch-up prevention layer lowered in impurity density or removed.... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100219449 - Method and apparatus for heterojunction barrier diode detector for ultrahigh sensitivity: The disclosure relates to a zero-bias heterojunction diode detector with varying impedance. The detector includes a substrate supporting a Schottky structure and an Ohmic contact layer. A metallic contact layer is formed over the Ohmic layer. The Schottky structure comprises a plurality of barrier layers and each of the plurality... Agent: Snell & Wilmer L.L.P. (teledyne)

20100219450 - Asymmetric source/drain junctions for low power silicon on insulator devices: A semiconductor device includes a buried insulator layer formed on a bulk substrate; a first type semiconductor material formed on the buried insulator layer, and corresponding to a body region of a field effect transistor (FET); a second type of semiconductor material formed over the buried insulator layer, adjacent opposing... Agent: Cantor Colburn LLP - IBM Fishkill

20100219451 - Field effect transistor and method of manufacturing the same: A p-type nitride compound semiconductor layer is formed on a buffer formed on a substrate. An n-type contact region is formed by ion implantation under a source electrode and a drain electrode. An electric-field reducing layer made of an n-type nitride compound semiconductor is formed on the p-type nitride compound... Agent: Kubotera & Associates, LLC

20100219452 - Gan high electron mobility transistor (hemt) structures: A GaN HEMT structure having: a first III-N layer on GaN; a source electrode in contact with a first surface portion the first III-N layer disposed over a first region in the GaN layer; a drain electrode in contact with a second surface portion of the first III-N layer disposed... Agent: Raytheon Company C/o Daly, Crowley, Mofford & Durkee, LLP

20100219453 - Nanotube device: A device includes a nanotube source electrode located on a surface of a substrate between nanotube gate and nanotube drain electrodes.... Agent: Harrington & Smith

20100219454 - Field-effect transistor and method of manufacturing the same: A field-effect transistor with improved moisture resistance without an increase in gate capacitance, and a method of manufacturing the field-effect transistor are provided. The field-effect transistor includes: a T-shaped gate electrode on a semiconductor layer; and a first highly moisture-resistant protective film including one of an insulating film and an... Agent: Leydig Voit & Mayer, Ltd

20100219456 - Forming integrated circuits with replacement metal gate electrodes: In a metal gate replacement process, a stack of at least two polysilicon layers or other materials may be formed. Sidewall spacers may be formed on the stack. The stack may then be planarized. Next, the upper layer of the stack may be selectively removed. Then, the exposed portions of... Agent: Trop, Pruner & Hu, P.C.

20100219455 - Iii-nitride semiconductor field effect transistor: An active layer of a first conductive-type includes a channel area. A first contact area and a second contact area of a second conductive-type are formed at positions across the channel area. A source electrode is formed on the first contact area. A drain electrode is formed on the second... Agent: Kubotera & Associates, LLC

20100219457 - Solid-state imaging device: It is an object to provide an image sensor having a sufficiently-large ratio of a surface area of a light-receiving section to an overall surface area of one pixel. This object is achieved by a solid-state imaging device comprising: a signal line formed on a substrate; an island-shaped semiconductor arranged... Agent: Brinks Hofer Gilson & Lione

20100219458 - Semiconductor device and a method of manufacturing the same: The data retention characteristics of a nonvolatile memory circuit are improved. In a memory cell array on a main surface of a semiconductor substrate, a floating gate electrode for accumulating charges for information is arranged. The floating gate electrode is covered with a cap insulating film and a pattern of... Agent: Miles & Stockbridge PC

20100219459 - Method for manufacturing a non-volatile memory, non-volatile memory device, and an integrated circuit: A method of manufacturing a non-volatile memory device, including providing at least one control gate layer on a substrate. A passage may be created between the at least one control gate layer and the substrate. In the passage at least one filling layer may be provided. A floating gate structure... Agent: Freescale Semiconductor, Inc. Law Department

20100219460 - Semiconductor device and method for manufacturing the same: A semiconductor device including a semiconductor substrate, a tunnel insulation film provided on the surface of the semiconductor substrate, charge trap states at which an electron potential energy is higher than a Fermi level of the semiconductor substrate being provided at part of the tunnel insulation film at least in... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100219461 - Structure with pn clamp regions under trenches: A structure that includes a rectifier further comprises a semiconductor region of a first conductivity type, and trenches that extend into the semiconductor region. A dielectric layer lines lower sidewalls of each trench but is discontinuous along a bottom of each trench. A silicon region of a second conductivity type... Agent: Townsend And Townsend And Crew, LLP

20100219462 - Mos-gated power devices, methods, and integrated circuits: MOS-gated devices, related methods, and systems for vertical power and RF devices including an insulated trench and a gate electrode. A body region is positioned so that a voltage bias on the gate electrode will cause an inversion layer in the body region. Permanent electrostatic charges are included in said... Agent: Groover & Associates

20100219464 - Production method for semiconductor device: Disclosed is a semiconductor device production method, which comprises the steps of: forming a pillar-shaped first-conductive-type semiconductor layer on a planar semiconductor layer; forming a second-conductive-type semiconductor layer in a portion of the planar semiconductor layer underneath the pillar-shaped first-conductive-type semiconductor layer; forming a gate dielectric film and a gate... Agent: Brinks Hofer Gilson & Lione

20100219463 - Quasi-vertical structure for high voltage mos device: A semiconductor device provides a high breakdown voltage and a low turn-on resistance. The device includes: a substrate; a buried n+ layer disposed in the substrate; an n-epi layer disposed over the buried n+ layer; a p-well disposed in the n-epi layer; a source n+ region disposed in the p-well... Agent: Lowe Hauptman Ham & Berner, LLP

20100219465 - Semiconductor device: A semiconductor device has a substrate, a source region formed on the surface portion of the substrate, a first insulating layer formed on the substrate, a gate electrode formed on the first insulating layer, a second insulating layer formed on the gate electrode, a body section connected with the source... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100219466 - Semiconductor device with vertical channel transistor: In a high speed vertical channel transistor, a pillar structure is formed over a substrate, a gate electrode surrounds an outer wall of a lower portion of the pillar structure; and a word line extends in a direction to partially contact an outer wall of the gate electrode. The word... Agent: Townsend And Townsend And Crew, LLP

20100219469 - Mask rom cell structure and method of fabricating the same: A mask read-only memory (ROM) cell structure includes buried gate electrodes, common source regions under the gate electrodes, common drain regions extending between upper portions of adjacent ones of the gate electrodes, and two vertical channel regions on opposite sides, respectively, of each of the gate electrodes. The channel regions... Agent: Volentine & Whitt PLLC

20100219468 - Power device structures and methods: Vertical power devices which include an insulated trench containing insulating material and a gate electrode, and related methods. A body region is positioned so that a voltage bias on the gate electrode will cause an inversion layer in the body region. A layer of permanent charge, at or near the... Agent: Groover & Associates

20100219467 - Semiconductor device having saddle fin transistor and manufacturing method of the same: The present invention discloses a transistor having the saddle fin structure. The saddle fin transistor of the present invention has a structure in which a landing plug contact region, particularly, a landing plug contact region on an isolation layer is elevated such that the landing plug contact SAC (Self Aligned... Agent: Ampacc Law Group

20100219470 - Semiconductor device having a saddle fin shaped gate and method for manufacturing the same: A semiconductor device having a saddle fin gate and a method for manufacturing the same are presented. The semiconductor device includes a semiconductor substrate, an isolation structure, and gates. The semiconductor substrate is defined with first grooves in gate forming areas. The isolation structure is formed in the semiconductor substrate... Agent: Ladas & Parry LLP

20100219471 - Quasi-resurf ldmos: A semiconductor device can include a drift region, at least a portion of the drift region located laterally between a drain region and a source region. The drift region can include a first layer having a first doping concentration and a second layer having a second higher doping concentration than... Agent: Schwegman, Lundberg & Woessner, P.A.

20100219472 - Semiconductor device and method of manufacturing the same: In a method of manufacturing a high withstanding voltage MOSFET, a region to be doped with impurities and a region to be doped with no impurity are provided when ion implantation of the impurities is performed in the channel forming region, for controlling a threshold voltage. The region to be... Agent: Bruce L. Adams, Esq Adams & Wilks

20100219473 - Method for fabricating semiconductor device: Disclosed herein is a fabrication method of a semiconductor device to order to increase an operation liability of the semiconductor device. A method for fabricating a semiconductor device comprises forming a buried-type wordline in an active region defined on a SOI substrate, forming a silicon connection region for connecting an... Agent: Ampacc Law Group

20100219474 - Transistor comprising an embedded semiconductor alloy in drain and source regions extending under the gate electrode: A strain-inducing semiconductor alloy may be formed on the basis of cavities that may extend deeply below the gate electrode structure, which may be accomplished by using a sequence of two etch processes. In a first etch process, the cavity may be formed on the basis of a well-defined lateral... Agent: Williams, Morgan & Amerson

20100219475 - Integration of semiconductor alloys in pmos and nmos transistors by using a common cavity etch process: Different strain-inducing semiconductor alloys may be incorporated into the drain and source areas of different transistors in sophisticated semiconductor devices by at least patterning the corresponding cavities in a common manufacturing sequence. Thus, the etch process may be performed on the basis of a high degree of uniformity and the... Agent: Advanced Mirco Devices, Inc. C/o Williams, Morgan & Amerson

20100219476 - Electrostatic protection device for semiconductor circuit: The electrostatic protection device includes a semiconductor substrate having a well formed therein. At least two sets of transistor fingers, for example the NMOS type, are spaced apart from each other. Each set of the MOS fingers includes multiple gates arranged in parallel to each other in one direction, and... Agent: Ladas & Parry LLP

20100219477 - Method for the production of mos transistors: The invention relates to a method for the production of both MOS transistors with extremely low leakage currents at the pn junctions and logic/switching transistors, whose gates are laterally defined by spacers in a p-substrate or a p-well in an n-substrate. The aim of the invention is to provide a... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20100219480 - Field effect transistor, integrated circuit element, and method for manufacturing the same: A field effect transistor of an embodiment of the present invention includes, a semiconductor substrate containing Si atoms; a protruding structure formed on the semiconductor substrate; a channel region formed in the protruding structure and containing Ge atoms; an under channel region formed under the channel region in the protruding... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100219485 - Formation of raised source/drain stuctures in nfet with embedded sige in pfet: A structure and method for forming raised source/drain structures in a NFET device and embedded SiGe source/drains in a PFET device. We provide a NFET gate structure over a NFET region in a substrate and PFET gate structure over a PFET region. We provide NFET SDE regions adjacent to the... Agent: HorizonIPPte Ltd

20100219481 - Method for manufacturing a dual work function semiconductor device and the semiconductor device made thereof: A method for manufacturing a dual work function device is disclosed. In one aspect, the process includes a first and second region in a substrate. The method includes forming a first transistor in the first region which has a first work function. Subsequently, a second transistor is formed in the... Agent: Knobbe Martens Olson & Bear LLP

20100219479 - Mos device and method of fabricating a mos device: The invention provides a three-dimensional stacked fin metal oxide semiconductor (SF-MOS) device (10,30) comprising a protrusion or fin structure with a plurality of stacked semiconductor regions (3,5,12), in which a second semiconductor region (5,12) is separated from a first semiconductor region (3,5) by an isolation region (4,11). A gate isolation... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100219478 - Mosfet, method of fabricating the same, cmosfet, and method of fabricating the same: The present invention provides an NMOSFET including a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, and a first gate electrode formed on the gate insulating film. The first gate electrode is composed of silicide of a metal M, and at least one element selected as an... Agent: Young & Thompson

20100219484 - Semiconductor devices and methods of manufacture thereof: Methods of forming transistors and structures thereof are disclosed. A preferred embodiment comprises a semiconductor device including a workpiece, a gate dielectric disposed over the workpiece, and a thin layer of conductive material disposed over the gate dielectric. A layer of semiconductive material is disposed over the thin layer of... Agent: Slater & Matsil LLP

20100219482 - Semiconductor storage device: It is intended to achieve a sufficiently-small SRAM cell area and a stable operation margin in a Loadless 4T-SRAM comprising a vertical transistor SGT. In a static type memory cell made up using four MOS transistors, each of the MOS transistor constituting the memory cell is formed on a planar... Agent: Brinks Hofer Gilson & Lione

20100219483 - Semiconductor storage device: It is intended to achieve a sufficiently-small SRAM cell area and a stable operation margin in a CMOS 6T-SRAM comprising a vertical transistor SGT. In a static type memory cell made up using six MOS transistors, each of the MOS transistor constituting the memory cell is formed on a planar... Agent: Brinks Hofer Gilson & Lione

20100219486 - Method for containing a silicided gate within a sidewall spacer in integrated circuit technology: A method of forming an integrated circuit includes providing a semiconductor substrate and forming a gate over the semiconductor substrate. A gate sidewall spacer is formed around the gate and a resist is deposited on the gate sidewall spacer with the gate sidewall spacer and the gate exposed. A portion... Agent: Law Offices Of Mikio Ishimaru

20100219487 - Method for manufacturing a sensor component and sensor component: A method for manufacturing a sensor component and a sensor component. The sensor component has a semiconductor substrate and a metal substrate. The semiconductor substrate and the metal substrate are bonded together with the aid of a low-temperature process. A bonding material containing metal particles is applied in a first... Agent: Kenyon & Kenyon LLP

20100219488 - Silicon structure, method for manufacturing the same, and sensor chip: A silicon structure of the present invention is provided with a silicon substrate (1) to become a base, and a plurality of fibrous projections (2) made of silicon dioxide and directly joined to a silicon-made surface (1a) of the silicon substrate (1). By arbitrarily constructing an area where these fibrous... Agent: Mcdermott Will & Emery LLP

20100219489 - Nanowire sensor device: The invention concerns a sensor device, of nanowire type, comprising at least one nanowire comprising a first conductive region (2) and a second region (4) in insulator material, this second region not occupying the entire thickness of the nanowire, and a current being able to circulate in the nanowire from... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100219490 - Semiconductor sensor and method of manufacturing the same: A semiconductor sensor has a first semiconductor layer as a base, an insulating layer formed on the first semiconductor layer, and a second semiconductor layer formed on the insulating layer. A recess is formed from a bottom surface of the first semiconductor layer up to a top surface of the... Agent: Osha Liang L.L.P.

20100219492 - Low switching field low shape sensitivity mram cell: Disclosed is a Magnetic Tunnel Junction (MTJ) stack usable in a nonvolatile magnetic memory array of MTJ stacks, the MTJ stack comprising: a) a fixed ferromagnetic layer having its magnetic moment fixed in a preferred direction in the presence of an applied magnetic field caused by a current; b) an... Agent: Hahn And Moodley, LLP

20100219491 - Magnetic tunnel junction device and fabrication: A magnetic tunneling junction device and fabrication method is disclosed. In a particular embodiment, the method includes depositing a capping material on a free layer of a magnetic tunneling junction structure to form the capping layer and oxidizing a portion of the capping material to form a layer of oxidized... Agent: Qualcomm Incorporated

20100219493 - Method of forming a magnetic tunnel junction device: A method of forming a magnetic tunnel junction device is disclosed that includes forming a trench in a substrate, the trench including a first sidewall, a second sidewall, a third sidewall, a fourth sidewall, and a bottom wall. The method includes depositing a first conductive material within the trench proximate... Agent: Qualcomm Incorporated

20100219494 - Sub-mm wireless ionizing radiation detector: One embodiment of a radiation sensing capacitor is presented. The radiation sensing capacitor may include a silicon layer and an insulator layer coupled to the silicon layer. The radiation sensing capacitor may also include a silicon-insulator interface region coupling the silicon layer to the insulator layer and a plurality of... Agent: Fulbright & Jaworski L.L.P.

20100219495 - Photosensitizing chip package & manufacturing method thereof: A photosensitizing chip package construction and manufacturing method thereof is comprised of photosensitizing chips constructed on one side of a wafer using a bonding layer; a color attachment array being disposed over those photosensitizing chips; a glass substrate provided with weir and covered up over the color attachment array; a... Agent: Liu & Liu

20100219496 - Wafer arrangement and a method for manufacturing the wafer arrangement: The wafer arrangement (100) provided comprises a first wafer (101), which comprises an integrated circuit and a recess (105). The wafer arrangement further comprises a portion of a second wafer (103), which comprises a carrier portion and a protrusion (107), the protrusion comprising an active component or actively controlled component... Agent: Altera Law Group, LLC

20100219497 - Photoelectric conversion device and manufacturing method thereof: The present invention, in a photoelectric conversion device in which a pixel including a photoelectric conversion device for converting a light into a signal charge and a peripheral circuit including a circuit for processing the signal charge outside a pixel region in which the pixel are disposed on the same... Agent: Fitzpatrick Cella Harper & Scinto

20100219500 - Method for manufacturing direct bonded soi wafer and direct bonded soi wafer manufactured by the methond: A direct bonded SOI wafer having an entire buried oxide film layer covered and not exposed is manufactured by: (A) forming a laminated body by laminating a semiconductor wafer and a support wafer via an oxide film; and (B) forming a thin-film single crystal silicon layer on the support wafer... Agent: Greenblum & Bernstein, P.L.C

20100219498 - Method for manufacturing non-volatile semiconductor memory device, and non-volatile semiconductor memory device: An isolation oxide film whose upper surface is higher than a surface of a substrate is formed in the substrate. A silicon oxide film is formed on the substrate between the isolation oxide films. A self-aligned polysilicon film is formed on the silicon oxide film between the isolation oxide films.... Agent: Mcdermott Will & Emery LLP

20100219499 - Semiconductor device and manufacturing method of the same: An excessive metallic film on a device isolation region is prevented from contributing to silicidation in an end of a source-drain diffusion layer region to thereby form a silicide film with uniform film thickness. There are sequentially conducted a step of forming a device isolation region 3 in a substrate... Agent: Mr. Jackson Chen

20100219501 - Trench isolation implantation: Embodiments of the disclosure include a shallow trench isolation structure having a dielectric material with energetic species implanted to a predetermined depth of the dielectric material. Embodiments further include methods of fabricating the trench structures with the implant of energetic species to the predetermined depth. In various embodiments the implant... Agent: Brooks, Cameron & Huebsch , PLLC

20100219503 - Chip capacitive coupling: A method of creating a semiconductor chip having a substrate, a doped semiconductor material abutting the substrate and a device pad at an outer side of the doped semiconductor material involves creating a via through at least a portion of the substrate, the via having a periphery and a bottom... Agent: Foley & Lardner LLP

20100219502 - Mim decoupling capacitors under a contact pad: An integrated circuit structure includes one or more external contact pads with decoupling capacitors, such as metal-insulator-metal (MIM) capacitors, formed directly thereunder. In an embodiment, the decoupling capacitors are formed below the first metallization layer, and in another embodiment, the decoupling capacitors are formed in the uppermost inter-metal dielectric layer.... Agent: Slater & Matsil, L.L.P.

20100219504 - Four-terminal gate-controlled lvbjts: An integrated circuit structure includes a well region of a first conductivity type, an emitter of a second conductivity type opposite the first conductivity type over the well region, a collector of the second conductivity type over the well region and substantially encircling the emitter, and a base contact of... Agent: Slater & Matsil, L.L.P.

20100219505 - Nitride crystal with removable surface layer and methods of manufacture: A nitride crystal or wafer with a removable surface layer comprises a high quality nitride base crystal, a release layer, and a high quality epitaxial layer. The release layer has a large optical absorption coefficient at wavelengths where the base crystal is substantially transparent and may be etched under conditions... Agent: Townsend And Townsend And Crew, LLP

20100219510 - Method for fabricating high density pillar structures by double patterning using positive photoresist: A method of making a semiconductor device includes forming a first photoresist layer over an underlying layer, patterning the first photoresist layer into a first photoresist pattern, wherein the first photoresist pattern comprises a plurality of spaced apart first photoresist features located over the underlying layer, and etching the underlying... Agent: Sandisk Corporation C/o Foley & Lardner LLP

20100219507 - Process for producing semiconductor device: According to the invention, a process for producing a semiconductor device using an adhesive sheet for a spacer, comprising preparing an adhesive sheet having a spacer layer provided with an adhesive layer on at least one surface thereof as the adhesive sheet for a spacer, a step of sticking the... Agent: Knobbe Martens Olson & Bear LLP

20100219508 - Semiconductor device: A semiconductor device includes a semiconductor substrate on which an internal circuit is formed in a central position an insulating layer formed over the semiconductor substrate, and a moisture-resistant ring formed by a metal plug embedded in the insulating layer, the moisture-resistant ring surrounding the internal circuit, the moisture-resistant ring... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100219506 - Systems and methods of laser texturing and crystallization of material surfaces: The surface of a material is textured and crystallized in a single step by exposing the surface to pulses from an ultrafast laser. The laser treatment causes pillars to form on the treated surface. These pillars provide for greater light absorption. The crystallization of the material provides for higher electric... Agent: University Of Virginia Patent Foundation

20100219509 - Tiled substrates for deposition and epitaxial lift off processes: Embodiments of the invention generally relate to epitaxial lift off (ELO) films and methods for producing such films. Embodiments provide a method to simultaneously and separately grow a plurality of ELO films or stacks on a common support substrate which is tiled with numerous epitaxial growth substrates or surfaces. Thereafter,... Agent: Patterson & Sheridan, L.L.P.

20100219511 - Carbon nanotube-solder composite structures for interconnects, process of making same, packages containing same, and systems containing same: A carbon nanotube (CNT) array is patterned on a substrate. The substrate can be a microelectronic die, an interposer-type structure for a flip-chip, a mounting substrate, or a board. The CNT array is patterned by using a patterned metallic seed layer on the substrate to form the CNT array by... Agent: Intel Corporation C/o Cpa Global

20100219512 - Method for forming porous insulating film and semiconductor device: In a method where at least cyclic organosiloxane raw material 101 is supplied to a reaction chamber and an insulating film is formed by plasma vapor deposition method, above-mentioned problem is solved by a method for a forming porous insulating film using the mixed gas of a cyclic organosiloxane raw... Agent: Mcginn Intellectual Property Law Group, PLLC

20100219513 - Integrated circuit structure and a method of forming the same: An integrated circuit structure is disclosed. The integrated circuit structure includes a first package substrate including a radiating element, the radiating element having a radiating element connection extending from the radiating element. The integrated circuit structure further includes a first chip positioned adjacent to the radiating element connection, the first... Agent: Cahn & Samuels LLP

20100219514 - Semiconductor device: A semiconductor device includes: a first region, a second region and a third region surrounding the second region; an integrated circuit including an active element in the first region and provided in and above a first substrate; an antenna which is provided in the second region, connected to the integrated... Agent: Turocy & Watson, LLP

20100219515 - Lead frame: A lead frame includes a plurality of leads electrically connected to a semiconductor chip and a lead lock including a base layer disposed over the plurality of the leads and formed of a material having a coefficient of thermal expansion similar to that of inner leads. An adhesive layer is... Agent: Brinks Hofer Gilson & Lione

20100219516 - Power management integrated circuit: An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.... Agent: Intel Corporation C/o Cpa Global

20100219519 - Complete power management system implemented in a single surface mount package: A complete power management system implemented in a single surface mount package. The system may be drawn to a DC to DC converter system and includes, in a leadless surface mount package, a driver/controller, a MOSFET transistor, passive components (e.g., inductor, capacitor, resistor), and optionally a diode. The MOSFET transistor... Agent: Vishay/siliconix C/o Murabito, Hao & Barnes LLP

20100219520 - Lead frame: A lead frame includes a plurality of leads electrically connected to a semiconductor chip and a lead lock including a base layer disposed over the plurality of the leads and formed of a material having a coefficient of thermal expansion similar to that of inner leads. An adhesive layer is... Agent: Brinks Hofer Gilson & Lione

20100219517 - Method for manufacturing semiconductor device, semiconductor device and molding die: Provided is a method for manufacturing a semiconductor device in which movement of an island in resin sealing is prevented. A molding die includes an upper die and a lower die. The upper and lower dies are fitted together to form cavities and runners. In the lower die, a pod... Agent: Morrison & Foerster LLP

20100219518 - Quad flat non-leaded package: A quad flat non-leaded package including a leadframe, a chip, a plurality of first bonding wires and a molding compound is provided. The leadframe includes a plurality of first leads, and each first lead has a first portion and a second portion that extend along an axis. The length of... Agent: J C Patents

20100219521 - Window type semiconductor package: A window-type semiconductor package is revealed, primarily comprising a substrate with an interconnection channel, a chip on the substrate, a die-attach adhesive between the chip and the substrate, and an encapsulant filling the interconnection channel. A first solder mask formed on the top surface of the substrate has a specific... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100219522 - Semiconductor device and method of manufacturing the same, and electronic apparatus: A first sealing resin seals a side surface of an electronic component and a side surface of a conductive member. A second sealing resin is provided on the first sealing resin, and seals an electrode pad and an electrode pad forming surface of the electronic component and a part of... Agent: Drinker Biddle & Reath (dc)

20100219523 - Stackable integrated circuit package system: A stackable integrated circuit package system includes: a substrate having a first side and a second side opposite the first side, the substrate having a cavity provided therein; a first integrated circuit die in the cavity with a first interconnect extending out from the cavity without connection and a second... Agent: Law Offices Of Mikio Ishimaru

20100219524 - Chip scale package and method of fabricating the same: A chip scale package (CSP) package and method of fabricating the same are provided. The fabricating method includes the following steps. First, a substrate is provided. Next, a chip is disposed on the front surface of the substrate and electrically connected to the substrate. Then, a thermal conductive paste is... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100219525 - Semiconductor device: Disclosed is a semiconductor device having improved heat dissipation efficiency. The semiconductor device includes a silicon interposer having a first surface and a second surface opposite the first surface. A plurality of semiconductor chips are provided on the first surface side of the silicon interposer. The silicon interposer has a... Agent: Rabin & Berdo, PC

20100219526 - Flexible microelectronics adhesive: A curable thermal interface material is provided comprising a functionalized elastomer and a filler. Preferred materials comprise an epoxidized polybutadiene cured with an iodonium catalyst and a filler comprising silver and/or aluminum oxide.... Agent: Lord Corporation Patent & Legal Services

20100219528 - Electromigration-resistant flip-chip solder joints: A semiconductor device contact structure practically eliminating the copper diffusion into the solder as well as the current crowding at the contact with the subsequent electromigration in the solder. A column-like electroplated copper stud (108) is on each contact pad. The stud is sized to provide low, uniform electrical resistance... Agent: Texas Instruments Incorporated

20100219527 - Metallization system of a semiconductor device including metal pillars having a reduced diameter at the bottom: In a metallization system of a complex semiconductor device, metal pillars, such as copper pillars, may be formed in a nail-like configuration in order to reduce the maximum mechanical stress acting on the metallization system while providing a required contact surface for connecting to the package substrate. The nail-like configuration... Agent: Advanced Mirco Devices, Inc. C/o Williams, Morgan & Amerson

20100219530 - Contact structure of a semiconductor device: A method for fabricating a contact of a semiconductor device includes the steps of forming a dielectric layer having a contact hole on a semiconductor substrate, forming an out-gassing barrier layer comprising a poly-silicon layer to cover at least inner walls of the contact hole in order to prevent undesired... Agent: Marshall, Gerstein & Borun LLP

20100219529 - Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnects: Described is a method and apparatus for forming interconnects with a metal-metal oxide electromigration barrier and etch-stop. In one embodiment of the invention, the method includes depositing a metal layer on the top of a planarized interconnect layer, the interconnect layer having an interlayer dielectric (ILD) with a top that... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100219531 - Method of forming a low resistance semiconductor contact and structure therefor: In one embodiment, silicide layers are formed on two oppositely doped adjacent semiconductor regions. A conductor material is formed electrically contacting both of the two silicides.... Agent: Mr. Jerry Chruma Semiconductor Components Industries, L.L.C.

20100219536 - Connecting terminal, semiconductor package, wiring board, connector, and microcontactor: A connecting terminal, a semiconductor package, a wiring board, a connector, and a microcontactor that can achieve a stable contact with a contact target are provided. To achieve the object and to establish an electrical connection to a contact target by making a physical contact with the contact target, there... Agent: Edwards Angell Palmer & Dodge LLP

20100219535 - Method for producing a semiconductor component: A method for producing a semiconductor component with an easily solderable contact structure comprising the provision of a semiconductor substrate of a planar design with a first side, a second side, a surface normal standing vertically thereon, a dielectric passivation layer arranged on at least one of the sides and... Agent: Mcglew & Tuttle, PC

20100219534 - Microstructure device including a metallization structure with self-aligned air gaps and refilled air gap exclusion zones: In a sophisticated metallization system, self-aligned air gaps may be provided in a locally selective manner by using a radiation sensitive material for filling recesses or for forming therein the metal regions. Consequently, upon selectively exposing the radiation sensitive material, a selective removal of exposed or non-exposed portions may be... Agent: Advanced Mirco Devices, Inc. C/o Williams, Morgan & Amerson

20100219533 - Multilayered wiring structure, and method for manufacturing multilayered wiring: Provided is a wiring of the Damascene structure for preventing the TDDB withstand voltage degradation and for keeping the planarity to prevent the degradation of a focus margin. A trench wiring (213) is formed in an interlayer insulating film, which is composed of a silicon carbide-nitride film (205), a SiOCH... Agent: Sughrue Mion, PLLC

20100219532 - Semiconductor device: A semiconductor device includes: a first semiconductor chip having an upper face on which at least one first electrode pad is formed; a second semiconductor chip provided above the first semiconductor chip and having an upper face on which at least one second electrode pad is formed; a conductive film... Agent: Mcdermott Will & Emery LLP

20100219537 - Semiconductor device: A first semiconductor chip and a second semiconductor chip which form a stack are mounted on a module substrate by deflecting a centre position of the semiconductor chips from the module substrate. In the side where the distance from the edge of the deflected semiconductor chip to the edge of... Agent: Mattingly & Malur, P.C.

20100219538 - Semiconductor device and method of manufacturing the same: A semiconductor device comprises a semiconductor layer including a plurality of paralleled linear straight sections extending in a first direction. The layer also includes a plurality of connecting sections each having a width in the first direction sufficient to form a wire-connectable contact therein and arranged to connect between adjacent... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.