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Active solid-state devices (e.g., transistors, solid-state diodes) July category listing 07/10

20100187492 - Multi-bit memory device having reristive material layers as storage node and methods of manufacturing and operating the same: Provided are a multi-bit memory device having resistive material layers as a storage node, and methods of manufacturing and operating the same. The memory device includes a substrate, a transistor formed on the substrate, and a storage node coupled to the transistor, wherein the storage node includes: a lower electrode... Agent: Harness, Dickey & Pierce, P.L.C

20100187493 - Semiconductor storage device and method of manufacturing the same: Disclosed is a semiconductor storage device including a first electrode formed by being embedded in an insulating film formed on a substrate, a second electrode formed to be opposed to the first electrode, a storage layer formed between the first electrode and the second electrode, the storage layer being on... Agent: Rader Fishman & Grauer PLLC

20100187498 - Nanowire light emitting device and method of manufacturing the same: The invention provides a nanowire light emitting device and a manufacturing method thereof. In the light emitting device, first and second conductivity type clad layers are formed and an active layer is interposed therebetween. At least one of the first and second conductivity type clad layers and the active layer... Agent: Mcdermott Will & Emery LLP

20100187494 - Nitride semiconductor-based light emitting devices: A nitride semiconductor-based light emitting device is provided. The nitride semiconductor-based light emitting device is formed of a nitride semiconductor having a wurtzite lattice structure with the Ga face. The device has a substrate, a buffer layer, a first p-type contact layer, a second p-type contact layer, a first hole... Agent: Rabin & Berdo, PC

20100187497 - Semiconductor device: A semiconductor device includes an underlying layer, and a light emitting layer which is formed on the underlying layer and in which a barrier layer made of InAlGaN and a quantum well layer made of InGaN are alternately stacked.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100187495 - Semiconductor light emitting device and method of manufacturing the same: A semiconductor light emitting device and a method of manufacturing the same are provided. The semiconductor light emitting device comprises a first semiconductor layer emitting electrons, a second semiconductor layer emitting holes, and an active layer emitting light by combination of the electrons and holes. At least one of the... Agent: Birch Stewart Kolasch & Birch

20100187496 - Strain balanced light emitting devices: A strain balanced active-region design is disclosed for optoelectronic devices such as light-emitting diodes (LEDs) and laser diodes (LDs) for better device performance. Lying below the active-region, a lattice-constant tailored strain-balancing layer provides lattice template for the active-region, enabling balanced strain within the active-region for the purposes of 1) growing... Agent: J C Patents

20100187500 - Carbon structures bonded to layers within an electronic device: An OLED electronic device contains a fullerene chemically bonded to a hole transport layer. The bonding of the fullerene to the hole transport layer improves device lifetime and prevents migration of the fullerene to adjacent layers where deleterious effects may result.... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20100187499 - Method for epitaxial growth and epitaxial layer structure using the method: There are provided a method for epitaxial growth capable of securing stable optical and electrical characteristics by minimizing defects produced in a second epitaxial layer when growing the second epitaxial layer on a first epitaxial layer having defects formed therein, and an epitaxial layer structure using the method. The method... Agent: Jae Y. Park

20100187501 - Solid-state imaging device, method for manufacturing solid-state imaging device, and imaging apparatus: A solid-state imaging device includes a first electrode, a second electrode disposed opposing to the first electrode, and a photoelectric conversion layer, which is disposed between the first electrode and the second electrode and in which narrow gap semiconductor quantum dots are dispersed in a conductive layer, wherein one electrode... Agent: Sonnenschein Nath & Rosenthal LLP

20100187502 - Enclosed nanotube structure and method for forming: A semiconductor device and associated method for forming. The semiconductor device comprises an electrically conductive nanotube formed over a first electrically conductive member such that a first gap exists between a bottom side the electrically conductive nanotube and a top side of the first electrically conductive member. A second insulating... Agent: Schmeiser, Olsen & Watts

20100187503 - Semiconductor device and manufacturing method thereof: A semiconductor device includes an NMISFET region. The NMISFET region includes a Ge nano wire having a triangular cross section along a direction perpendicular to a channel current direction, wherein two of surfaces that define the triangular cross section of the Ge nano wire are (111) planes, and the other... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100187508 - Anthracene compounds for luminescent applications: This invention relates to anthracene derivatives that are useful in electroluminescent applications. It also relates to electronic devices in which the active layer includes such an anthracene derivative.... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20100187511 - Aromatic amine derivative and organic electroluminescent device using the same: An aromatic amine derivative having ring structures on the both sides of central double bond structure, an organic electroluminescence device including the aromatic amine derivative, and an organic electroluminescence material-containing solution including the aromatic amine derivative as one of organic electroluminescence materials and a solvent, the organic electroluminescence device having... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100187505 - Benzanthracene derivatives for organic electroluminescent devices: The present invention relates to the compounds of the formula (1) and to organic electroluminescent devices, in particular blue-emitting devices, in which these compounds are used as host material or dopant in the emitting layer and/or as hole-transport material and/or as electron-transport material.... Agent: Connolly Bove Lodge & Hutz, LLP

20100187521 - Blue organic light emitting device: A blue organic light emitting device is provided. The blue organic light emitting device comprises a first electrode; a second electrode; and an organic layer including an electron transport layer between the first electrode and the second electrode, wherein the electron transport layer includes a material having an energy gap... Agent: Robert E. Bushnell & Law Firm

20100187504 - Diamine derivatives and organic electronic device using the same: The present invention relates to a new diamine derivative, and an organic electronic device using the same. The diamine derivative according to the present invention can serve as a hole injecting, hole transporting, electron injecting, electron transporting, or light emitting material in an organic electronic device including an organic light... Agent: Mckenna Long & Aldridge LLP

20100187506 - Electroactive materials: In the Formulae: Ar1 is a single bond or an arylene; Ar2 is an aryl group; Ar3 is a single bond or an arylene; R1 is selected from H, D, aryl groups, alkyl groups, silyl groups, siloxane groups, fluoroalkyl groups, alkoxy groups, and fluoroalkoxy groups, or the two R1 groups... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20100187507 - Electroactive materials:

20100187510 - Electronic device including 1,7-phenanthroline derivative:

20100187520 - Light emitting device material and light emitting device: Disclosed is a light emitting device material characterized by containing a specific fluorine compound. This light emitting device material enables to obtain a light emitting device having high luminous efficiency, excellent color purity and excellent durability. Also disclosed is a light emitting device using such a light emitting device material.... Agent: Ratnerprestia

20100187519 - Material for organic electroluminescent element, and organic electroluminescent element: A material for an organic electroluminescence device including at least one of compounds shown by the following formula (Ia), (Ib), (IIa), (IIb), (III), (IVa) or (IVb):... Agent: Darby & Darby P.C.

20100187522 - Method of forming an organic light-emitting display with black matrix: A method of forming an organic light-emitting display (OLED) includes the steps of providing a substrate, forming a black matrix on the substrate, forming a buffer layer on the black matrix, forming an active layer on the buffer layer, simultaneously patterning the black matrix and the buffer layer, and forming... Agent: Austin Rapp & Hardman

20100187518 - Method of producing organic light emitting device: m

20100187517 - Organic el device: An organic EL device includes: an anode; a cathode and an organic thin-film layer provided between the anode and the cathode. The organic thin-film layer includes: a fluorescent-emitting layer containing a fluorescent host and a fluorescent dopant; and a phosphorescent-emitting layer containing a first phosphorescent host and a first phosphorescent... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100187513 - Organic electroluminescence element: An organic electroluminescence element includes an anode and a transparent electrode cathode. An organic luminescent layer is located between the anode and the cathode. An electron injection layer is located between the cathode and the organic luminescent layer, and includes at least one of an alkali metal and an alkali... Agent: Greenblum & Bernstein, P.L.C

20100187516 - Organic semiconductor device and method for manufacturing organic semiconductor device:

20100187514 - Organic thin film transistor and organic thin film light- emitting transistor: An organic thin film transistor including a substrate having thereon at least three terminals of a gate electrode, a source electrode and a drain electrode, an insulator layer and an organic semiconductor layer, with a current between a source and a drain being controlled upon application of a voltage to... Agent: Millen, White, Zelano & Branigan, P.C.

20100187512 - Polycyclic ring assembly compound and organic electroluminescent device employing the same: Polycyclic ring assembly compound which has a specific flexible partial structure, i.e., a structure containing an aromatic ring in which adjacent carbon atoms have, bonded thereto, an aromatic ring group of another kind and an aliphatic group or aromatic ring group. Also provided are: a polymer constituted of repeating units... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100187515 - Use of a precursor of an n-dopant for doping an organic semiconductive material, precursor and electronic or optoelectronic component: Use of a precursor of an n-dopant for doping an organic semiconductive material, as a blocking layer, as a charge injection layer, as an electrode material, as a storage material or as a semiconductor material itself in electronic or optoelectronic components, the precursor being selected from the following formulae 1-3c:... Agent: Sutherland Asbill & Brennan LLP

20100187509 - Vinylphenoxy polymers: e

20100187523 - Semiconductor device and method for manufacturing the same: An object is to provide a semiconductor device including a thin film transistor which includes an oxide semiconductor layer and has high electric characteristics. An oxide semiconductor layer including SiOx is used in a channel formation region, and in order to reduce contact resistance with source and drain electrode layers... Agent: Robinson Intellectual Property Law Office, P.C.

20100187524 - Semiconductor device and method for manufacturing the same: A manufacturing method of a semiconductor device of the present invention includes the steps of forming a stacked body in which a semiconductor film, a gate insulating film, and a first conductive film are sequentially stacked over a substrate; selectively removing the stacked body to form a plurality of island-shaped... Agent: Robinson Intellectual Property Law Office, P.C.

20100187528 - Guard ring extension to prevent reliability failures: An embodiment of the present invention is a technique to prevent reliability failures in semiconductor devices. A trench is patterned in a polyimide layer over a guard ring having a top metal layer. A passivation layer is etched at bottom of the trench. A capping layer is deposited on the... Agent: Intel Corporation C/o Cpa Global

20100187525 - Implementing tamper evident and resistant detection through modulation of capacitance: A method and tamper detection circuit for implementing tamper and anti-reverse engineering evident detection in a semiconductor chip, and a design structure on which the subject circuit resides are provided. A capacitor is formed with the semiconductor chip including the circuitry to be protected. A change in the capacitor value... Agent: Ibm Corporation RochesterIPLaw Dept 917

20100187526 - Semiconductor device and method for manufacturing same: A semiconductor device semiconductor device allowing for use of a test circuit that withstands only low voltages and has a small circuit area. A high-voltage operational circuit, which is operated at a high voltage, is connected to first and second pads. A multiplexer used to test the high-voltage operational circuit... Agent: Onda Techno Intl. Patent Attys.

20100187527 - Tamper-resistant semiconductor device and methods of manufacturing thereof: The invention relates to a tamper-resistant semiconductor device comprising a substrate (5) comprising an electronic circuit arranged on a first side thereof. An electrically-conductive protection layer (50, 50a, 50b) is arranged on a second side of the substrate (5) opposite to the first side. At least three through-substrate electrically-conductive connections... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100187529 - Laser-irradiated thin films having variable thickness: A crystalline film includes a first crystalline region having a first film thickness and a first crystalline grain structure; and a second crystalline region having a second film thickness and a second crystalline grain structure. The first film thickness is greater than the second film thickness and the first and... Agent: Wilmerhale/columbia University

20100187530 - Photoconductors for mid-/far-ir detection: An infrared photodiode structure is provided. The infrared photodiode structure includes a doped semiconductor layer having ions of certain conductivity. An active photodetecting region is positioned on the doped semiconductor layer for detecting an infrared light signal. The active photodetecting region includes one or more amorphous semiconductor materials so as... Agent: Gauthier & Connors, LLP

20100187531 - Pixel structure: A pixel structure including a gate, a gate dielectric layer, a patterned semiconductor layer having a channel area disposed above the gate, a patterned dielectric layer having an etching-stop layer disposed above the gate and a number of bumps, a patterned metal layer having a reflective pixel electrode, a source... Agent: Jianq Chyun Intellectual Property Office

20100187534 - Semiconductor device and manufacturing method thereof: An object of the present invention to provide a semiconductor device manufactured in short time by performing the step of forming the thin film transistor and the step of forming the photoelectric conversion layer in parallel, and to provide a manufacturing process thereof. According to the present invention, a semiconductor... Agent: Robinson Intellectual Property Law Office, P.C.

20100187533 - Thin film transistor array panel for a liquid crystal display: A plurality of gate lines formed on an insulating substrate, each gate line including a pad for connection to an external device; a plurality of data lines intersecting the gate lines and insulated from the gate lines, each data line including a pad for connection to an external device; and... Agent: F. Chau & Associates, LLC

20100187532 - Thin-film transistor array substrate, method of manufacturing the same, and liquid crystal display device: A thin-film transistor array substrate includes a source line that is formed above a gate insulating layer covering a gate line, a semiconductor layer that is formed on the gate insulating layer and placed in a substantially whole area below a drain electrode, in a substantially whole area below a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100187535 - Manufacturing method of thin film transistor and manufacturing method of display device: To provide a method for manufacturing a thin film transistor and a display device using a small number of masks, a thin film transistor is manufactured in such a manner that a first conductive film, an insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film... Agent: Fish & Richardson P.C.

20100187536 - Array substrate for liquid crystal display and method for fabricating the same: A method for fabricating an array substrate for a liquid crystal display (LCD) is provided. A semiconductor layer and a transparent lower electrode formed on a substrate is provided and covered by a first dielectric layer serving as a gate dielectric layer and a capacitor dielectric layer. A gate electrode... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100187538 - Thin film transistor array panel and method for manufacturing the same: A thin film transistor array panel according to the present invention includes: an insulation substrate having a display area and a peripheral area; a plurality of thin film transistors disposed in the display area; a plurality of gate lines connected to the thin film transistors; a plurality of data lines... Agent: H.c. Park & Associates, PLC

20100187537 - Thin film transistor array substrate and method for manufacturing the same: A thin film transistor array structure and a method for manufacturing the same are provided. The thin film transistor array structure comprises a substrate, including a transition area and a pad area. A patterned first metal layer is formed on the substrate, wherein the patterned first metal layer includes a... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100187539 - Compound semiconductor epitaxial wafer and fabrication method thereof: The present invention provides a compound semiconductor epitaxial wafer and a fabrication method thereof, a first silicon buffer layer is deposited on a metal substrate, and then a second compound semiconductor buffer layer is deposited on the first silicon buffer layer, and a third compound semiconductor buffer layer is deposited... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100187541 - Doped aluminum nitride crystals and methods of making them: Fabrication of doped AlN crystals and/or AlGaN epitaxial layers with high conductivity and mobility is accomplished by, for example, forming mixed crystals including a plurality of impurity species and electrically activating at least a portion of the crystal.... Agent: Goodwin Procter LLP Patent Administrator

20100187540 - Group iii nitride substrate, epitaxial layer-provided substrate, methods of manufacturing the same, and method of manufacturing semiconductor device: A group III nitride substrate on which an epitaxially grown layer of good quality can be formed, and a method of manufacturing the same are obtained. A GaN substrate is one of the following: a group III nitride substrate, wherein the number of atoms of an acid material per square... Agent: Drinker Biddle & Reath (dc)

20100187542 - Semiconductor light emitting element and method for manufacturing the same: A method for manufacturing a semiconductor light emitting element from a wafer in which a gallium nitride compound semiconductor has been laminated on a sapphire substrate having an orientation flat, comprises of: laminating a semiconductor layer on a first main face of the sapphire substrate having an off angle θ... Agent: GlobalIPCounselors, LLP

20100187544 - Fabricating a gallium nitride layer with diamond layers: In one aspect, a method includes fabricating a gallium nitride (GaN) layer with a first diamond layer having a first thermal conductivity and a second diamond layer having a second thermal conductivity greater than the first thermal conductivity. The fabricating includes using a microwave plasma chemical vapor deposition (CVD) process... Agent: Raytheon Company C/o Daly, Crowley, Mofford & Durkee, LLP

20100187543 - Method for manufacturing silicon carbide semiconductor device and the silicon carbide semiconductor device: Silicon carbide semiconductor device includes trench, in which connecting trench section is connected to straight trench section. Straight trench section includes first straight trench and second straight trench extending in parallel to each other. Connecting trench section includes first connecting trench perpendicular to straight trench section, second connecting trench that... Agent: Rossi, Kimms & Mcdowell LLP.

20100187545 - Selectively doped semi-conductors and methods of making the same: The present invention is generally directed to methods of selectively doping a substrate and the resulting selectively doped substrates. The methods include doping an epilayer of a substrate with the selected doping material to adjust the conductivity of either the epilayers grown over a substrate or the substrate itself. The... Agent: Dority & Manning, P.A.

20100187547 - Image display apparatus: An image display apparatus displaying an image by selectively emitting light from a plurality of semiconductor light emitting elements being regularly arranged, includes a substrate; a first conductive wiring layer being formed on the substrate and supplying a first electric potential; a second conductive wiring layer supplying a second electric... Agent: Rabin & Berdo, PC

20100187548 - Light emitting device, method of manufacturing the same and monolithic light emitting diode array: A light emitting device including: at least one light emitting stack including first and second conductivity type semiconductor layers and an active layer disposed there between, the light emitting stack having first and second surfaces and side surfaces interposed between the first and second surfaces; first and second contacts formed... Agent: Mcdermott Will & Emery LLP

20100187546 - Vertical geometry light emitting diode package aggregate and production method of light emitting device using the same: There are provided a vertical geometry light emitting diode package aggregate useful for the production of a light emitting device having a vertical geometry light emitting diode as the light source, the light emitting device satisfying requirements in terms of current capacity flowed for light emission, dissipation of heat generated... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100187549 - Light emitting diode package: A light emitting diode (LED) package includes a substrate, a plurality of LED chips, and a plurality of electrode pairs. The LED chips are disposed on the substrate, and each of the LED chips is electrically isolated from one another. The electrode pairs are disposed on the substrate, and each... Agent: Jianq Chyun Intellectual Property Office

20100187555 - (al,ga,in)n and zno direct wafer bonded structure for optoelectronic applications, and its fabrication method: An (Al, Ga, In)N and ZnO direct wafer bonded light emitting diode (LED), wherein light passes through electrically conductive ZnO. Flat and clean surfaces are prepared for both the (Al, Ga, In)N and ZnO wafers. A wafer bonding process is then performed between the (Al, Ga, In)N and ZnO wafers,... Agent: Gates & Cooper LLP Howard Hughes Center

20100187552 - Hybrid white organic light emitttng device and method of manufacturing the same: Provided are a hybrid white organic light emitting diode (OLED) and a method of fabricating the same. A HOMO level difference between a fluorescent emission layer and an electron transport layer in an organic emission layer (OLED) becomes higher than that between the other layers or a LUMO level difference... Agent: Ampacc Law Group

20100187554 - Light emitting device having vertical structure and method for manufacturing the same: A light emitting device having a vertical structure and a method for manufacturing the same, which are capable of increasing light extraction efficiency, are disclosed. The method includes forming a light extraction layer on a substrate, forming a plurality of semiconductor layers on the light extraction layer, forming a first... Agent: Mckenna Long & Aldridge LLP

20100187556 - Light emitting device package and method for manufacturing the same: A light emitting device package capable of emitting uniform white light and a method for manufacturing the same are disclosed. The light emitting device package includes a package body, an electrode formed on at least one surface of the package body, a light emitting device mounted on the package body,... Agent: Mckenna Long & Aldridge LLP

20100187550 - Light emitting diode: In a preferred embodiment, a light emitting device comprising: a polar template; a p-type layer grown on the polar template; the p-type layer having a first polarization vector; the first polarization vector having a first projection relative to a growth direction; an n-type layer grown on the p-type layer; the... Agent: U S Army Research Laboratory Attn: Rdrl-loc-i

20100187553 - Light emitting diode package structure and method thereof: An LED package structure includes a carrier substrate, a reflector and an LED chip. The reflector is disposed on the carrier substrate and includes a base, a magnesium fluoride layer and a cerium dioxide layer. The base has an opening to expose a part of the carrier substrate. The magnesium... Agent: Jianq Chyun Intellectual Property Office

20100187551 - Liglight emitting diode package structure: An LED package structure includes a carrier, a housing, an LED chip, a encapsulant and a surface treatment layer. The housing is disposed on the carrier and has an upper surface, wherein the housing and the carrier together form a chip-containing cavity. The LED chip is disposed on the carrier... Agent: Jianq Chyun Intellectual Property Office

20100187561 - Electronic device: An electronic device includes a carrier, a surface mounting device, and solders. The carrier has a plurality of bonding pads, and at least one of the bonding pads has a notch, such that the bonding pad has a necking portion adjacent to the notch. The surface mounting device is disposed... Agent: Jianq Chyun Intellectual Property Office

20100187557 - Light sensor using wafer-level packaging: The present invention provides systems, devices and methods for fabricating miniature low-power light sensors. With the present invention, a light sensitive component, such as a diode, is fabricated on the front side of a silicon wafer. Connectivity from the front side of the wafer to the back side of the... Agent: North Weber & Baugh LLP

20100187562 - Light-emitting device package structure and manufacturing method thereof: A light-emitting device package structure includes a leadframe, a light-emitting device disposed on the leadframe, a plurality of wires electrically connecting the leadframe and the light-emitting device, and an encapsulant covering the light-emitting device, the wires and a part of the leadframe. The encapsulant has a gas space therein, and... Agent: North America Intellectual Property Corporation

20100187560 - Method for bonding metal surfaces, method for producing an object having cavities, object having cavities, structure of a light emitting diode: A method for bonding two partially form-fitting surfaces of two metal bodies which contain the same metal is carried out by generating a first layer on the surface of a first one of the two bodies, the first layer containing a mixture of the metal and the oxide of the... Agent: Perman & Green, LLP

20100187563 - Semiconductor device and production method therefor: An object of the invention is to provide a method for producing a conductive member having low electrical resistance, and the conductive member is obtained using a low-cost stable conductive material composition that does not contain an adhesive. A method for producing a semiconductor device in which silver or silver... Agent: Birch Stewart Kolasch & Birch

20100187558 - Semiconductor light emitting device and method of fabricating the same: Provided are a semiconductor light emitting device and a method of fabricating the same. The semiconductor light emitting device comprises: a light emitting structure comprising a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, and a second conductive semiconductor layer on the active layer; a... Agent: Birch Stewart Kolasch & Birch

20100187559 - Semiconductor light emitting device and method of fabricating the same: Provided is a semiconductor light emitting device and a method of fabricating the same. The semiconductor light emitting device comprises: a first conductive semiconductor layer; an active layer on the first conductive semiconductor layer; a second conductive semiconductor layer on the active layer; a second electrode part on the second... Agent: Birch Stewart Kolasch & Birch

20100187564 - Method and apparatus for providing a patterned electrically conductive and optically transparent or semi-transparent layer over a lighting semiconductor device: A light emitting diode (“LED”) using an electrical conductive and optical transparent or semi-transparent layer to improve overall light output is disclosed. The device includes a first conductive layer, an active layer, a second conductive layer, an electrical conductive and optical transparent or semi-transparent layer, and electrodes. In one embodiment,... Agent: James M. Wu Jw Law Group

20100187565 - Semiconductor light emitting element and wafer: There are provided a semiconductor light emitting element which allows an improvement in light extraction efficiency without increasing the number of fabrication steps, and a wafer. In a semiconductor light emitting element 1 formed by laminating a compound semiconductor layer 3 on a single crystal substrate, and dividing the single... Agent: Mcdermott Will & Emery LLP

20100187566 - Insulated gate bipolar transistor (igbt) electrostatic discharge (esd) protection devices: Insulated gate bipolar transistor (IGBT) electrostatic discharge (ESD) protection devices are presented. An IGBT-ESD device includes a semiconductor substrate and patterned insulation regions disposed on the semiconductor substrate defining a first active region and a second active region. A high-V N-well is formed in the first active region of the... Agent: Quintero Law Office, PC

20100187567 - Semiconductor device: A semiconductor device includes a semiconductor substrate having a first surface and a second surface. A main region and a sensing region are formed on the first surface side of the semiconductor substrate. A RC-IGBT is formed in the main region and a sensing element for passing electric currents proportional... Agent: Posz Law Group, PLC

20100187568 - Epitaxial methods and structures for forming semiconductor materials: Methods and structures for producing semiconductor materials, substrates and devices with improved characteristics are disclosed. Structures and methods for forming reduced strain structures include forming a plurality of substantially strain-relaxed island structures and utilizing such island structures for subsequent further growth of strain-relaxed substantial continuous layers of semiconductor material.... Agent: Traskbritt, P.C.

20100187569 - Hetero-structure field effect transistor, integrated circuit including a hetero-structure field effect transistor and method for manufacturing a hetero-structure field effect transistor: A hetero-structure field effect transistor (HFET). The HFET may include a first contact and a second contact and a hetero-junction structure. The hetero-junction structure may include a first layer made from a first semiconductor material and a second layer made from a second semiconductor material. An interface at which the... Agent: Freescale Semiconductor, Inc. Law Department

20100187570 - Heterojunction transistors having barrier layer bandgaps greater than channel layer bandgaps and related methods: A heterojunction transistor may include a channel layer comprising a Group III nitride, a barrier layer comprising a Group III nitride on the channel layer, and an energy barrier comprising a layer of a Group III nitride including indium on the channel layer such that the channel layer is between... Agent: Myers Bigel Sibley & Sajovec, P.A.

20100187571 - Semiconductor device and manufacturing method thereof: An object of the present invention is to provide a semiconductor resistive element having excellent linearity. A semiconductor device according to the present invention includes a HBT which is formed on a GaAs substrate and includes a group III-V compound semiconductor, and a semiconductor resistive element made of at least... Agent: Greenblum & Bernstein, P.L.C

20100187572 - Suspended mono-crystalline structure and method of fabrication from a heteroepitaxial layer: Methods of fabricating a suspended mono-crystalline structure use annealing to induce surface migration and cause a surface transformation to produce the suspended mono-crystalline structure above a cavity from a heteroepitaxial layer provided on a crystalline substrate. The methods include forming a three dimensional (3-D) structure in the heteroepitaxial layer where... Agent: Hewlett-packard Company Intellectual Property Administration

20100187573 - Semiconductor integrated circuit: Disclosed herein is a semiconductor integrated circuit including: a plurality of standard cells including a transistor having a gate electrode and arranged in combination with each other; a metallic wiring layer interconnecting the standard cells to form a desired circuit; and a plurality of reserve cells having a gate electrode,... Agent: Rader Fishman & Grauer PLLC

20100187574 - Memory cell for modification of revision identifier in an integrated circuit chip: A memory cell for reducing the cost and complexity of modifying a revision identifier (ID) or default register values associated with an integrated circuit (IC) chip, and a method for manufacturing the same. The cell, which may be termed a “Meta-Memory Cell” (MMCEL), is implemented on metal layers only and... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20100187575 - Semiconductor element and a method for producing the same: Some embodiments comprise a plurality of fins, wherein at least a first fin of the plurality of fins comprises a different fin width compared to a fin width of another fin of the plurality of fins. At least a second fin of the plurality of fins comprises a different crystal... Agent: Slater & Matsil LLP

20100187576 - Method of processing resist, semiconductor device, and method of producing the same: A surface component film (2) is etched using a resist (3) as a mask, and the surface component film (2) is patterned according to the shape of an aperture (3a). This results in a step portion (4) having the same shape as the aperture (3a), with the sidewall (4a) of... Agent: Kratz, Quintos & Hanson, LLP

20100187577 - Schottky diode: Improved Schottky diodes (20) with reduced leakage current and improved breakdown voltage are provided by building a JFET (56) into the diode, serially located in the anode-cathode current path (32). The gates of the JFET (56) formed by doped regions (38, 40) placed above and below the diode's current path... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20100187578 - Stress enhanced transistor devices and methods of making: Stress enhanced transistor devices and methods of fabricating the same are disclosed. In one embodiment, a transistor device comprises: a gate conductor spaced above a semiconductor substrate by a gate dielectric, wherein the semiconductor substrate comprises a channel region underneath the gate conductor and recessed regions on opposite sides of... Agent: Cantor Colburn LLP - IBM Fishkill

20100187579 - Transistor devices and methods of making: In an embodiment, a method of fabricating a transistor device comprises: providing a semiconductor topography comprising a gate conductor disposed above a semiconductor substrate between a pair of dielectric spacers; anisotropically etching exposed regions of the semiconductor substrate on opposite sides of the dielectric spacers to form recessed regions in... Agent: Cantor Colburn LLP - IBM Fishkill

20100187580 - Method and structure of monolithically integrated infrared sensing device: Protection for infrared sensing device, and more particularly, to a monolithically integrated uncooled infrared sensing device using IC foundry compatible processes. The proposed infrared sensing device is fabricated on a completed IC substrate. In an embodiment, the infrared sensing device has a single crystal silicon plate with an absorbing layer... Agent: Townsend And Townsend And Crew, LLP

20100187581 - Solid-state image sensing device and camera system using the same: A solid-state image sensing device includes a plurality of pixels. Each pixel has a photodiode, a first transistor, and a second transistor. The photodiode is constituted by a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first and second conductivity types are opposite to each other. The first transistor... Agent: Fitzpatrick Cella Harper & Scinto

20100187582 - Solid-state imaging device having transmission gates which pass over part of photo diodes when seen from the thickness direction of the semiconductor substrate: A solid-state imaging device having a plurality of image pixels arranged along a main surface of a semiconductor substrate, wherein each of the plurality of image pixels includes a photodiode that converts incident light into an electric charge and a transmission gate that is formed so as to have a... Agent: Mcdermott Will & Emery LLP

20100187583 - Reconfigurable electric circuitry and method of making same: A reconfigurable electric circuit includes first and second crystalline material layers positioned adjacent to each other and forming a first interface, and a first ferroelectric layer positioned adjacent to the first crystalline material layer and having ferroelectric domains applying an electric field to regions of the first interface to induce... Agent: Pietragallo Gordon Alfano Bosick & Raspanti, LLP

20100187584 - Semiconductor device and method for fabricating the same: A semiconductor device includes an interlayer insulating film having an opening, an adhesion layer formed on at least a side wall of the opening, a lower electrode formed on a bottom surface of the opening and at least a side surface of the adhesion layer, a capacitor insulating film made... Agent: Mcdermott Will & Emery LLP

20100187585 - Spin mos field effect transistor and tunneling magnetoresistive effect element using stack having heusler alloy: A spin MOS field effect transistor includes a source electrode and a drain electrode each having a structure obtained by stacking an impurity diffusion layer, a (001)-oriented MgO layer and a Heusler alloy. The impurity diffusion layer is formed in a surface region of a semiconductor layer. The (001)-oriented MgO... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100187586 - Soi device and method for its fabrication: A silicon on insulator (SOI) device is provided. The device includes an MOS capacitor coupled between voltage busses and formed in a monocrystalline semiconductor layer overlying an insulator layer and a semiconductor substrate. The device includes at least one electrical discharge path for discharging potentially harmful charge build up on... Agent: Ingrassia Fisher & Lorenz, P.C. (gf)

20100187587 - Memory cell structure and method for fabrication thereof: A memory cell includes a substrate, an access transistor and a storage capacitor. The access transistor comprising a gate stack disposed on the substrate, and a first and second diffusion region located on a first and second opposing sides of the gate stack. The storage capacitor comprises a first capacitor... Agent: HorizonIPPte Ltd

20100187589 - Devices and methods for preventing capacitor leakage: Devices and methods for preventing capacitor leakage caused by sharp tip. The formation of sharp tip is avoided by a thicker bottom electrode which fully fills a micro-trench that induces formation of the sharp tip. Alternatively, formation of the sharp tip can be avoided by recessing the contact plug to... Agent: Birch Stewart Kolasch & Birch

20100187588 - Semiconductor memory device including a cylinder type storage node and a method of fabricating the same: Provided is a semiconductor memory device including cylinder type storage nodes and a method of fabricating the semiconductor memory device. The semiconductor memory device includes: a semiconductor substrate including switching devices; a recessed insulating layer including storage contact plugs therein, wherein the storage contact plugs are electrically connected to the... Agent: F. Chau & Associates, LLC

20100187591 - Non-volatile semiconductor memory device and method of manufacturing the same: A non-volatile semiconductor memory device includes: a cell array including a plurality of first wirings, a plurality of second wirings that intersects the plurality of first wirings, and memory cells that are formed at intersections of the first wirings and the second wirings and are connected between the first and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100187590 - Semiconductor device including metal insulator semiconductor transistor: A semiconductor device includes a plurality of metal insulator semiconductor (MIS) transistors. The plurality of MIS transistors each includes a gate electrode formed above a channel region of a semiconductor substrate via a gate insulating film and source/drain regions formed on both sides of the channel region. The gate electrode... Agent: Mcginn Intellectual Property Law Group, PLLC

20100187592 - High performance flash memory devices: Disclosed herein is a flash memory device comprising: a wafer; a gate oxide layer disposed upon the wafer; a floating gate disposed upon the gate oxide layer, the wafer, or a combination thereof; the floating gate comprising a flat floating gate portion and a generally rectangular floating gate portion disposed... Agent: Cantor Colburn LLP - IBM Fishkill

20100187593 - Nand flash memory and method for manufacturing the same: A memory cell of NAND flash memory has a floating gate electrode taking a pillared shape formed on the first element region via a gate insulation film; diffusion layers formed in regions located on both sides of the floating gate electrode in the first element region; an IPD film formed... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100187594 - Semiconductor memory and method of manufacturing the same: A semiconductor memory includes a semiconductor substrate, a buried insulating film formed on a part of an upper surface of the semiconductor substrate, and a semiconductor layer formed on another part of the upper surface of the semiconductor substrate. Each of the memory cell transistors comprises a first-conductivity-type source region,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100187595 - Nonvolatile memory devices and methods of manufacturing the same: Nonvolatile memory devices and related methods of manufacturing the same are provided. A nonvolatile memory device includes a tunneling layer on a substrate, a floating gate on the tunneling layer, an inter-gate dielectric layer structure on the floating gate, and a control gate on the inter-gate dielectric layer structure. The... Agent: Myers Bigel Sibley & Sajovec

20100187597 - Method of forming spaced-apart charge trapping stacks: Methods are provided for fabricating memory devices. A method comprises fabricating charge-trapping stacks overlying a silicon substrate and forming bit line regions in the substrate between the charge trapping stacks. Insulating elements are formed overlying the bit line regions between the stacks. The charge-trapping stacks are etched to form two... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20100187596 - Self-aligned double patterning for memory and other microelectronic devices: A method for transferring a pattern to one or more microelectronic layers. A first mask layer, having a patterned feature, and a second mask layer, having another patterned feature, are formed. The first mask layer and the second mask layer are at least partially covered with a film, and openings... Agent: Darby/spansion C/o Darby & Darby P.C.

20100187601 - Semiconductor device: A hermetic compressor includes a closed vessel for storing lubricating oil, an electric-driving element, and a compressing element driven by the electric-driving element. The compressing element includes a cylinder block forming a compression chamber, a piton that reciprocates inside the compression chamber, and an oiling device for supplying the lubricating... Agent: Brinks Hofer Gilson & Lione

20100187599 - Semiconductor device and manufacturing method of the same: Disclosed herein is a semiconductor device including: a first conductivity type semiconductor base body; a first conductivity type pillar region; second conductivity type pillar regions; element and termination regions provided in the first and second conductivity type pillar regions, transistors being formed in the element region, and no transistors being... Agent: Robert J. Depke Lewis T. Steadman

20100187600 - Semiconductor device and method of producing the same: It is an object to provide an SGT production method capable of obtaining a structure for reducing a resistance of a gate, a desired gate length, desired source and drain configurations and a desired diameter of a pillar-shaped semiconductor. The object is achieved by a semiconductor device production method which... Agent: Brinks Hofer Gilson & Lione

20100187598 - Semiconductor device having switching element and method for fabricating semiconductor device having switching element: There is provided a semiconductor device having a switching element, including a first semiconductor layer including a first, second and third surfaces, a first electrode connected to the first semiconductor layer, a plurality of second semiconductor layers selectively configured on the first surface, a third semiconductor layer configured on the... Agent: Patterson & Sheridan, L.L.P.

20100187602 - Methods for making semiconductor devices using nitride consumption locos oxidation: Semiconductor devices and methods for making such devices using nitride consumption LOCOS oxidation are described. The semiconductor devices contain a planar field oxide structure that has been grown using a nitride layer as an oxidation mask. Once the field oxide structure has been grown, the nitride mask is not etched... Agent: Kenneth E. Horton Kirton & Mcconkle

20100187603 - Semiconductor device: The semiconductor device includes an element region (51) and a junction termination region (52). The element region includes: a first semiconductor region (2) of a first conductivity type; a second semiconductor region (4) of a second conductivity type; a third semiconductor region (10) of the first conductivity type; a trench... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100187604 - Semiconductor device: A semiconductor device includes a semiconductor substrate of a first conductivity type, a first semiconductor region of the first conductivity type on the semiconductor substrate, and a plurality of second semiconductor regions of a second conductivity type disposed separately in the first semiconductor region. A difference between a charge quantity... Agent: Patterson & Sheridan, L.L.P.

20100187605 - Monolithic semiconductor switches and method for manufacturing: One aspect is monolithic semiconductor switches and method for manufacturing. One embodiment provides one semiconductor die with a first and a second FET. One of source/drain of the first FET and one of source/drain of the second FET are electrically coupled to at least one contact area at a first... Agent: Dicke, Billig & Czaja

20100187606 - Semiconductor device that includes ldmos transistor and manufacturing method thereof: A manufacturing method of a semiconductor device including an LDMOS transistor includes: a process (a) of forming a first conductive well diffusion layer in the semiconductor substrate; a process (b) of sequentially forming a gate insulator film, a gate conductive film, and a photoresist film on a region on the... Agent: Mcdermott Will & Emery LLP

20100187607 - Low cost fabrication of double box back gate silicon-on-insulator wafers with built-in shallow trench isolation in back gate layer: A semiconductor wafer structure for manufacturing integrated circuit devices includes a bulk substrate; a lower insulating layer formed on the bulk substrate, the lower insulating layer formed from a pair of separate insulation layers having a bonding interface therebetween; an electrically conductive layer formed on the lower insulating layer, the... Agent: Cantor Colburn LLP-ibm Yorktown

20100187608 - Semiconductor device: Provided is a semiconductor device comprising: a PW layer formed at a surface of a semiconductor substrate; an NW layer formed at the surface of the semiconductor substrate to be in contact with the PW layer; a p+ base layer formed at the surface of the semiconductor substrate in the... Agent: Brinks Hofer Gilson & Lione/seiko Instruments Inc.

20100187609 - Boosting transistor performance with non-rectangular channels: Roughly described, the invention includes layouts and masks for an integrated circuit, in which the diffusion shape for a transistor includes a transversely extending jog on one or both transversely opposite sides, the jog having inner and outer corners, at least one of which is located relative to the gate... Agent: Synopsys, Inc. C/o Haynes Beffel & Wolfeld LLP

20100187632 - Channelized gate level cross-coupled transistor device with complimentary pairs of cross-coupled transistors defined by physically separate gate electrodes within gate electrode level: A semiconductor device includes first and second p-type diffusion regions, and first and second n-type diffusion regions that are each electrically connected to a common node. Conductive features are each defined within any one gate level channel that is uniquely associated with and defined along one of a number of... Agent: Martine Penilla & Gencarella, LLP

20100187630 - Channelized gate level cross-coupled transistor device with connection between cross-coupled transistor gate electrodes made utilizing interconnect level other than gate electrode level: A semiconductor device includes first and second p-type diffusion regions, and first and second n-type diffusion regions that are each electrically connected to a common node. Conductive features are each defined within any one gate level channel that is uniquely associated with and defined along one of a number of... Agent: Martine Penilla & Gencarella, LLP

20100187631 - Channelized gate level cross-coupled transistor device with constant gate electrode pitch: A semiconductor device includes first and second p-type diffusion regions, and first and second n-type diffusion regions that are each electrically connected to a common node. A gate electrode level region is formed in accordance with a virtual grate defined by virtual lines that extend in only a first parallel... Agent: Martine Penilla & Gencarella, LLP

20100187634 - Channelized gate level cross-coupled transistor device with cross-coupled transistors defined on four gate electrode tracks with crossing gate electrode connections: A semiconductor device includes conductive features that are each defined within any one gate level channel that is uniquely associated with and defined along one of a number of parallel gate electrode tracks. The conductive features form gate electrodes of first and second PMOS transistor devices, and first and second... Agent: Martine Penilla & Gencarella, LLP

20100187633 - Channelized gate level cross-coupled transistor device with cross-coupled transistors defined on two gate electrode tracks with crossing gate electrode connections: A semiconductor device includes conductive features that are each defined within any one gate level channel that is uniquely associated with and defined along one of a number of parallel gate electrode tracks. The conductive features form gate electrodes of first and second PMOS transistor devices, and first and second... Agent: Martine Penilla & Gencarella, LLP

20100187626 - Channelized gate level cross-coupled transistor device with direct electrical connection of cross-coupled transistors to common diffusion node: Each of first and second PMOS transistors, and first and second NMOS transistors has a respective diffusion terminal with a direct electrical connection to a common node, and has a respective gate electrode defined within any one gate level channel. Each gate level channel is uniquely associated with and defined... Agent: Martine Penilla & Gencarella, LLP

20100187628 - Channelized gate level cross-coupled transistor device with overlapping pmos transistors and non-overlapping nmos transistors relative to direction of gate electrodes: First and second PMOS transistors are defined over first and second p-type diffusion regions. First and second NMOS transistors are defined over first and second n-type diffusion regions. Each diffusion region is electrically connected to a common node. Gate electrodes are formed from conductive features that are each defined within... Agent: Martine Penilla & Gencarella, LLP

20100187627 - Channelized gate level cross-coupled transistor device with overlapping pmos transistors and overlapping nmos transistors relative to direction of gate electrodes: A semiconductor device includes a cross-coupled transistor configuration formed by first and second PMOS transistors defined over first and second p-type diffusion regions, and by first and second NMOS transistors defined over first and second n-type diffusion regions, with each diffusion region electrically connected to a common node. Gate electrodes... Agent: Martine Penilla & Gencarella, LLP

20100187611 - Contacts in semiconductor devices: Mask sets, layout design, and methods for forming contacts in devices are described. In one embodiment, a semiconductor device includes a plurality of contacts disposed over a substrate, the plurality of contacts being disposed as rows and columns on an orthogonal grid, each row of the plurality of contacts is... Agent: Slater & Matsil LLP

20100187622 - Linear gate level cross-coupled transistor device with complimentary pairs of cross-coupled transistors defined by physically separate gate electrodes within gate electrode level: A semiconductor device includes first and second p-type diffusion regions, and first and second n-type diffusion regions that are each electrically connected to a common node. Each of a number of conductive features within a gate electrode level region is fabricated from a respective originating rectangular-shaped layout feature having a... Agent: Martine Penilla & Gencarella, LLP

20100187620 - Linear gate level cross-coupled transistor device with connection between cross-coupled transistor gate electrodes made utilizing interconnect level other than gate electrode level: A semiconductor device includes first and second p-type diffusion regions, and first and second n-type diffusion regions that are each electrically connected to a common node. Each of a number of conductive features within a gate electrode level region is fabricated from a respective originating rectangular-shaped layout feature having a... Agent: Martine Penilla & Gencarella, LLP

20100187621 - Linear gate level cross-coupled transistor device with constant gate electrode pitch: A semiconductor device includes first and second p-type diffusion regions, and first and second n-type diffusion regions that are each electrically connected to a common node. A gate electrode level region is formed in accordance with a virtual grate defined by virtual lines that extend in only a first parallel... Agent: Martine Penilla & Gencarella, LLP

20100187625 - Linear gate level cross-coupled transistor device with cross-coupled transistors defined on four gate electrode tracks with crossing gate electrode connections: A semiconductor device includes conductive features within a gate electrode level region that are each fabricated from respective originating rectangular-shaped layout features having its centerline aligned parallel to a first direction. The conductive features form gate electrodes of first and second PMOS transistor devices, and first and second NMOS transistor... Agent: Martine Penilla & Gencarella, LLP

20100187624 - Linear gate level cross-coupled transistor device with cross-coupled transistors defined on three gate electrode tracks with crossing gate electrode connections: A semiconductor device includes conductive features within a gate electrode level region that are each fabricated from respective originating rectangular-shaped layout features having its centerline aligned parallel to a first direction. The conductive features form gate electrodes of first and second PMOS transistor devices, and first and second NMOS transistor... Agent: Martine Penilla & Gencarella, LLP

20100187623 - Linear gate level cross-coupled transistor device with cross-coupled transistors defined on two gate electrode tracks with crossing gate electrode connections: A semiconductor device includes conductive features within a gate electrode level region that are each fabricated from a respective originating rectangular-shaped layout feature having a centerline aligned parallel to a first direction. The conductive features form gate electrodes of first and second PMOS transistor devices, and first and second NMOS... Agent: Martine Penilla & Gencarella, LLP

20100187619 - Linear gate level cross-coupled transistor device with different width pmos transistors and different width nmos transistors: A semiconductor device includes first and second p-type diffusion regions, and first and second n-type diffusion regions that are each electrically connected to a common node. Each of a number of conductive features within a gate electrode level region is fabricated from a respective originating rectangular-shaped layout feature, with a... Agent: Martine Penilla & Gencarella, LLP

20100187615 - Linear gate level cross-coupled transistor device with direct electrical connection of cross-coupled transistors to common diffusion node: Each of first and second PMOS transistors, and first and second NMOS transistors has a respective diffusion terminal with a direct electrical connection to a common node, and has a respective gate electrode formed from an originating rectangular-shaped layout feature. Centerlines of the originating rectangular-shaped layout features are aligned to... Agent: Martine Penilla & Gencarella, LLP

20100187617 - Linear gate level cross-coupled transistor device with non-overlapping pmos transistors and overlapping nmos transistors relative to direction of gate electrodes: First and second p-type diffusion regions, and first and second n-type diffusion regions are formed in a semiconductor device. Each diffusion region is electrically connected to a common node. Gate electrodes of cross-coupled transistors are defined to extend over the diffusion regions in only a first parallel direction, with each... Agent: Martine Penilla & Gencarella, LLP

20100187618 - Linear gate level cross-coupled transistor device with overlapping pmos transistors and non-overlapping nmos transistors relative to direction of gate electrodes: A semiconductor device includes a cross-coupled transistor configuration formed by first and second PMOS transistors defined over first and second p-type diffusion regions, and by first and second NMOS transistors defined over first and second n-type diffusion regions, with each diffusion region electrically connected to a common node. Gate electrodes... Agent: Martine Penilla & Gencarella, LLP

20100187616 - Linear gate level cross-coupled transistor device with overlapping pmos transistors and overlapping nmos transistors relative to direction of gate electrodes: A semiconductor device includes a cross-coupled transistor configuration formed by first and second PMOS transistors defined over first and second p-type diffusion regions, and by first and second NMOS transistors defined over first and second n-type diffusion regions, with each diffusion region electrically connected to a common node. Gate electrodes... Agent: Martine Penilla & Gencarella, LLP

20100187613 - Method of setting a work function of a fully silicided semiconductor device, and related device: A method of setting a work function of a fully silicided semiconductor device, and related device. At least some of the illustrative embodiments are methods comprising forming a gate stack over a semiconductor substrate (the gate stack comprising a dielectric layer, a silicide layer on the dielectric layer that defines... Agent: Texas Instruments Incorporated

20100187636 - Method to increase strain enhancement with spacerless fet and dual liner process: A semiconductor structure and a method of fabricating the same in which strain enhancement is achieved for both nFET and pFET devices is provided. In particular, the present invention provides at least one spacerless FET for stronger strain enhancement and defect reduction. The at least one spacerless FET can be... Agent: Scully, Scott, Murphy & Presser, P.C.

20100187614 - Selective nitridation of gate oxides: A method of fabricating a semiconductor structure. The method includes forming a first feature of a first active device and a second feature of a second active device, introducing a first amount of nitrogen into the first feature of the first active device, and introducing a second amount of nitrogen... Agent: Roberts Mlotkowski Safran & Cole, P.C. Intellectual Property Department

20100187612 - Semiconductor device and method of manufacturing the same: A semiconductor device according to an embodiment of the present invention includes an N-type transistor formed in a first region on a substrate, and a P-type transistor formed in a second region on the substrate. The device includes the substrate, a first gate insulation film formed on the substrate in... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100187635 - Semiconductor device comprising nmos and pmos transistors with embedded si/ge material for creating tensile and compressive strain: By forming a substantially continuous and uniform semiconductor alloy in one active region while patterning the semiconductor alloy in a second active region so as to provide a base semiconductor material in a central portion thereof, different types of strain may be induced, while, after providing a corresponding cover layer... Agent: Williams, Morgan & Amerson

20100187610 - Semiconductor device having dual metal gates and method of manufacture: A semiconductor device includes: a semiconductor substrate; a PFET formed on the substrate, the PFET includes a SiGe layer disposed on the substrate, a high-K dielectric layer disposed on the SiGe layer, a first metallic layer disposed on the high-k dielectric layer, a first intermediate layer disposed on the first... Agent: International Business Machines Corporation Dept. 18g

20100187629 - Tensile strain source using silicon/germanium in globally strained silicon: By embedding a silicon/germanium mixture in a silicon layer of high tensile strain, a moderately high degree of tensile strain may be maintained in the silicon/germanium mixture, thereby enabling increased performance of N-channel transistors on the basis of silicon/germanium material. In other regions, the germanium concentration may be varied to... Agent: Advanced Mirco Devices, Inc. C/o Williams, Morgan & Amerson

20100187637 - Bipolar device compatible with cmos process technology: The present invention discloses a bipolar device. An emitter is formed in a semiconductor substrate. A collector is laterally spaced from the emitter in the substrate. A gate terminal is formed on the substrate, defining a space between the emitter and the collector. An extrinsic base is formed on the... Agent: Duane Morris LLP (tsmc)IPDepartment

20100187638 - Anti-fuse cell and its manufacturing process: An anti-fuse cell includes a standard MOS transistor of an integrated circuit, with source (7) and drain (8) regions covered with a metal silicide layer (12, 13), and at least one track (24) of a resistive layer at least partially surrounding said MOS transistor, and adapted to pass a heating... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100187639 - Semiconductor device and fabrication method: A semiconductor device has a semiconductor substrate in which first and second wells are formed. The substrate and wells are of the same conductivity type, but the second well has a higher impurity concentration than the first well. High-voltage MOS transistors are formed in the first well, and a low-voltage... Agent: Rabin & Berdo, PC

20100187640 - Insulated gate semiconductor device: A two-layer electrode structure is provided. A protection diode is provided not to overlap a gate pad portion. Cells and a first one of source electrode layers can be provided below the gate pad portion, so that the differences in resistance among various points in the source electrode layers can... Agent: Morrison & Foerster LLP

20100187641 - High performance mosfet: A semiconductor structure which exhibits high device performance and improved short channel effects is provided. In particular, the present invention provides a metal oxide semiconductor field effect transistor (MOFET) that includes a low dopant concentration within an inversion layer of the structure; the inversion layer is an epitaxial semiconductor layer... Agent: Scully, Scott, Murphy & Presser, P.C.

20100187642 - Semiconductor component and method of manufacture: A semiconductor component that includes a field plate and a semiconductor device and a method of manufacturing the semiconductor component. A body region is formed in a semiconductor material that has a major surface. A gate trench is formed in the epitaxial layer and a gate structure is formed on... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100187644 - Manufacturing method of semiconductor device: The transistor characteristics of a MIS transistor provided with a gate insulating film formed to contain oxide with a relative dielectric constant higher than that of silicon oxide are improved. After a high dielectric layer made of hafnium oxide is formed on a main surface of a semiconductor substrate, the... Agent: Miles & Stockbridge PC

20100187643 - Method for tuning the threshold voltage of a metal gate and high-k device: A metal gate and high-k dielectric device includes a substrate, an interfacial layer on top of the substrate, a high-k dielectric layer on top of the interfacial layer, a metal film on top of the high-k dielectric layer, a cap layer on top of the metal film and a metal... Agent: International Business Machines Corporation Dept. 18g

20100187645 - Semiconductor device and method for fabricating the same: A semiconductor device includes: a semiconductor substrate; a source region and a drain region formed in the upper part of the semiconductor substrate so as to be spaced; a channel region formed in a part of the semiconductor substrate between the source region and the drain region; a first dielectric... Agent: Mcdermott Will & Emery LLP

20100187646 - Ultra low pressure sensor and method of fabrication of same: A sensor including: a backplate of electrically conductive or semi-conductive material, the backplate including a plurality of backplate holes; a diaphragm of electrically conductive or semi-conductive material that is connected to, and insulated from the backplate, the diaphragm defining a flexible member and an air gap associated with the flexible... Agent: Townsend And Townsend And Crew, LLP

20100187647 - High density photodiodes: The present invention is a front-side contact, back-side illuminated (FSC-BSL) photodiode arrays and front-side illuminated, back-side contact (FSL-BSC) photodiode arrays having improved characteristics, including high production throughput, low-cost manufacturing via implementation of batch processing techniques; uniform, as well as high, photocurrent density owing to presence of a large continuous homogeneous,... Agent: Patentmetrix

20100187648 - Photoelectic conversion device and manufacturing method: A photoelectric conversion device is provided which is capable of improving the light condensation efficiency without substantially decreasing the sensitivity. The photoelectric conversion device has a first pattern provided above an element isolation region formed between adjacent two photoelectric conversion elements, a second pattern provided above the element isolation region... Agent: Fitzpatrick Cella Harper & Scinto

20100187649 - Charge reservoir structure: The present invention relates to a process for preparing semiconductor on insulator type structures that include a semiconductor layer of a donor substrate, an insulator layer and a receiver substrate. The process includes bonding of the donor substrate onto the receiver substrate, with at least one of the substrates being... Agent: Winston & Strawn LLP Patent Department

20100187650 - Insulated well with a low stray capacitance for electronic components: A structure including at least one electronic component formed in a semiconductor stack comprising a heavily-doped buried silicon layer of a first conductivity type extending on a lightly-doped silicon substrate of a second conductivity type and a vertical insulating trench surrounding the component. The trench penetrates, into the silicon substrate,... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20100187651 - Integrated circuit package and method of forming the same: Aspects of the invention are directed towards an integrated circuit package and method of forming the same, and more particularly to a redistributed chip packaging for an integrated circuit. The integrated circuit package includes an integrated circuit having a protective material on at least a portion of the integrated circuit.... Agent: Stmicroelectronics, Inc.

20100187652 - Method and structures of monolithically integrated esd suppression device: This present invention relates in general to protection of integrated circuit chips, and more particularly, to a micromachined suppression device for protecting integrated circuit chips from electrostatic discharges. The proposed ESD suppression device consists of conductive pillars are dispersed in a dielectric material. The gaps between each pillar behave like... Agent: Townsend And Townsend And Crew, LLP

20100187653 - Semiconductor device: A conventional semiconductor device has a problem that an on-current of a parasitic transistor flows through a surface portion of a semiconductor layer and thus a semiconductor element undergoes thermal breakdown. In a semiconductor device according to the present invention, a protection element is formed with use of an isolation... Agent: Morrison & Foerster LLP

20100187655 - Integrated circuit capacitors having composite dielectric layers therein containing crystallization inhibiting regions and methods of forming same: Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second... Agent: Myers Bigel Sibley & Sajovec

20100187654 - Semiconductor device having capacitor and method of fabricating the same: A semiconductor device having a capacitor and a method of fabricating the same may be provided. A method of fabricating a semiconductor device may include forming an etch stop layer and a mold layer sequentially on a substrate, patterning the mold layer to form a mold electrode hole exposing a... Agent: Harness, Dickey & Pierce, P.L.C

20100187656 - Bipolar junction transistors and methods of fabrication thereof: Design and methods for fabricating bipolar junction transistors are described. In one embodiment, a semiconductor device includes a first fin comprising a first emitter region, a first base region, and a first collector region. The first emitter region, the first base region, and the first collector region form a bipolar... Agent: Slater & Matsil, L.L.P.

20100187657 - Bipolar transistor with base-collector-isolation without dielectric: The disclosed invention provides a method for the fabrication of a bipolar transistor having a collector region comprised within a semiconductor body separated from an overlying base region by one or more isolation cavities (e.g., air gaps) filled with low permittivity gas. In particular, a multilayer base-collector dielectric film is... Agent: Eschweiler & Associates LLC

20100187658 - Multi-material hard mask or prepatterned layer for use with multi-patterning photolithography: A method of fabricating integrated circuits is described. A multi-material hard mask is formed on an underlying layer to be patterned. In a first patterning process, portions of the first material of the hard mask are etched, the first patterning process being selective to etch the first material over the... Agent: Cooper & Dunham, LLP

20100187659 - Semiconductor device and method for manufacturing semiconductor device: An inventive semiconductor device includes a semiconductor chip having a passivation film, and a sealing resin layer provided over the passivation film for sealing a front side of the semiconductor chip. The sealing resin layer extends to a side surface of the passivation film to cover the side surface.... Agent: Rabin & Berdo, PC

20100187660 - Method to create soi layer for 3d-stacking memory array: A 3-D stacked semiconductor device is formed by forming a trench is formed through a top surface in a dielectric layer to expose the crystalline silicon layer having a (100) crystal plane, such that the trench walls are parallel to a <100> direction. Epitaxial silicon is grown between the trench... Agent: Cool Patent, P.C. C/o Cpa Global

20100187661 - Sintered silicon wafer: Provided is a sintered silicon wafer, wherein the ratio [I(220)/I(111) . . . (1)] of intensity of a (220) plane and intensity of a (111) plane measured by X-ray diffraction is 0.5 or more and 0.8 or less, and the ratio [I(311)/I(111) . . . (2)] of intensity of a... Agent: Howson & Howson LLP

20100187662 - Method for forming silicon film, method for forming pn junction and pn junction formed using the same: A method for forming a silicon film may be performed using a microheater including a substrate and a metal pattern spaced apart from the substrate. The silicon film may be formed on the metal pattern by applying a voltage to the metal pattern of the microheater to heat the metal... Agent: Harness, Dickey & Pierce, P.L.C

20100187664 - Electrical connectivity for circuit applications: According to example configurations herein, a leadframe includes a connection interface. The connection interface can be configured for attaching an electrical circuit to the leadframe. The leadframe also can include a conductive path. The conductive path in the leadframe provides an electrical connection between a first electrical node of the... Agent: Barry W. Chapin, Esq. Chapin Intellectual Property Law, LLC

20100187663 - Method for manufacturing a semiconductor component and structure therefor: A semiconductor component having wetable leadframe lead surfaces and a method of manufacture. A leadframe having leadframe leads is embedded in a mold compound. A portion of at least one leadframe lead is exposed and an electrically conductive material is formed on the exposed portion. The mold compound is separated... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100187665 - Integral metal structure with conductive post portions: A plurality of FPGA dice is disposed upon a semiconductor substrate. In order to supply the immense power required by the plurality of FPGA dice, power is routed through the semiconductor substrate vertically from thick metal layers and large integral metal structures located on the other side of the semiconductor... Agent: Imperium Patent Works

20100187666 - Lead frame and method of manufacturing semiconductor device: A lead frame includes a welding portion to be welded to other lead frame, and a frame, wherein the welding portion has an island portion provided like an island, and a plurality of connection members which connect the island portion and the frame with each other; and one connection member... Agent: Sughrue Mion, PLLC

20100187667 - Bonded microelectromechanical assemblies: A MEMS device is described that has a body with a component bonded to the body. The body has a main surface and a side surface adjacent to the main surface and smaller than the main surface. The body is formed of a material and the side surface is formed... Agent: Fish & Richardson P.C.

20100187668 - Novel build-up package for integrated circuit devices, and methods of making same: A device is disclosed which includes, in one illustrative example, an integrated circuit die having an active surface and a molded body extending around a perimeter of the die, the molded body having lips that are positioned above a portion of the active surface of the die. Another illustrative example... Agent: Perkins Coie LLP Patent-sea

20100187669 - Process for packaging components, and packaged components: A wafer level packaging process for packaging components is provided. The process includes permanently connecting a functional side of a base substrate to a covering substrate at wafer level so that a plurality of functional regions on the functional side are in each case packaged to form a wafer level... Agent: Charles N.j. Ruggiero Ohlandt, Greeley, Ruggiero & Perle, L.L.P.

20100187671 - Forming seal ring in an integrated circuit die: The formation of a seal ring in a semiconductor integrated circuit (IC) die is described. Through-silicon vias (TSVs) are typically formed in a semiconductor IC die to facilitate the formation of a three dimensional (3D) stacking die structure. The TSVs may be utilized to provide electrical connections between components in... Agent: Slater & Matsil, L.L.P.

20100187670 - On-chip heat spreader: A three dimensional (3D) stacked chip structure with chips having on-chip heat spreader and method of forming are described. A 3D stacked chip structure comprises a first die having a first substrate with a dielectric layer formed on a front surface. One or more bonding pads and a heat spreader... Agent: Slater & Matsil, L.L.P.

20100187673 - Adhesive tape and semiconductor package using the same: Provided is an adhesive tape which adheres two members to each other and decreases problems that may occur due to contraction and expansion of the adhered members when the temperature of the adhered two members changes. The adhesive tape includes: a base film having insulating properties; and an adhesive agent... Agent: Sughrue Mion, PLLC

20100187672 - Electronic apparatus and circuit board: According to an aspect of the present invention, there is provided an electronic apparatus including: a housing; a circuit board that is housed in the housing; a semiconductor package that includes a first surface on which solder balls are provided and a second surface opposite to the first surface and... Agent: Knobbe Martens Olson & Bear LLP

20100187674 - Package substrate structure and chip package structure and manufacturing process thereof: A chip package structure includes a substrate, chips and an elastic element. The substrate has a first surface, a second surface, a first patterned metal layer on the first surface and a second patterned metal layer on the second surface, wherein the substrate is suitable for being clipped between an... Agent: Jianq Chyun Intellectual Property Office

20100187675 - Semiconductor device and method of manufacturing the same: This semiconductor device is a semiconductor device in which a semiconductor element is flip-chip mounted onto a circuit substrate and the semiconductor element is covered and sealed with a sealing resin. A recess portion is formed in the sealing resin on a surface opposite to the mounting surface of the... Agent: Hamre, Schumann, Mueller & Larson P.C.

20100187676 - Cube semiconductor package composed of a plurality of stacked together and interconnected semiconductor chip modules: A cube semiconductor package includes one or more stacked together and interconnected semiconductor chip modules. The cube semiconductor package includes a semiconductor chip module and connection members. The semiconductor chip module includes a semiconductor chip which has a first and second surface, side surfaces, bonding pads, through-electrodes and redistribution lines.... Agent: Ladas & Parry LLP

20100187678 - Semiconductor device and method of manufacturing the same: In a structure of a semiconductor device, a Si chip and a metal leadframe are jointed by metallic bond via a porous joint layer made of high conductive metal, having a three-dimensional network structure and using Ag as a bonding material, and a film containing Zn oxide or Al oxide... Agent: Brundidge & Stanger, P.C.

20100187679 - Semiconductor device and method of manufacturing the same: As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining... Agent: Mcdermott Will & Emery LLP

20100187677 - Wafer level package and method of manufacturing the same: A method of manufacturing a wafer level package can include: forming an indentation, by etching one side of a semiconductor chip, on one side of which a chip pad is formed; forming a rewiring pattern, which is electrically connected with the chip pad and which includes a post pad having... Agent: Mcdermott Will & Emery LLP

20100187680 - Heat radiator: A radiator includes: an insulating substrate, a heating element or a semiconductor chip is mounted; and a heat sink that is provided the insulating substrate through a stress relaxation member that has a stress absorbing space, in which the heat sink dissipates heat from the semiconductor chip. The insulating substrate,... Agent: Oliff & Berridge, PLC

20100187681 - Silicon substrate having through vias and package having the same: The present invention relates to a silicon substrate having through vias and a package having the same. The silicon substrate includes a substrate body, a plurality of through vias and at least one heat dissipating area. The substrate body has a surface, and the material of the substrate body is... Agent: Mccracken & Frank LLP

20100187683 - 3-d ics equipped with double sided power, coolant, and data features: Three dimensional integrated circuits with double sided power, coolant, and data features and methods of constructing same are provided. According to some embodiments, an integrated circuit package can generally comprise one or more semiconductor wafers and opposing end substrates. The semiconductor wafers can each have a top exterior surface and... Agent: Troutman Sanders LLP/marco/ga Tech Ryan A. Schneider, Esq.

20100187682 - Electronic package and method of assembling the same: An electronic package (200) comprises a substrate (201), a first carrier layer arrangement (211) adapted to dissipate heat from at least one chip (217) mounted thereon, and a heat exchanger (221) mounted on the first carrier layer arrangement. The first carrier layer arrangement comprises at least one internal microchannel (213),... Agent: Altera Law Group, LLC

20100187685 - Semiconductor device: Disclosed is a semiconductor device suppressed in decrease of reliability. The semiconductor device comprises an electrode pad portion (2) formed on the upper surface of a semiconductor substrate (1), a passivation layer (3) so formed on the upper surface of the semiconductor substrate (1) as to overlap a part of... Agent: Fish & Richardson P.C.

20100187686 - Semiconductor package comprising alignment memers: A semiconductor package comprising alignment members is provided. The semiconductor package includes a semiconductor die, first connection terminals disposed on a first surface of the semiconductor die, and a tape substrate including a substrate portion, and second connection terminals disposed on the substrate portion and disposed corresponding to the first... Agent: Volentine & Whitt PLLC

20100187684 - System and method for 3d integrated circuit stacking: A method and system of stacking and aligning a plurality of integrated circuits. The method includes the steps of providing a first integrated circuit having at least one funnel-shaped socket, providing a second integrated circuit, aligning at least one protrusion on the second integrated circuit with the at least one... Agent: Slater & Matsil, L.L.P.

20100187691 - Chip package without core and stacked chip package structure: A chip package including a base, a chip, a molding compound and a plurality of outer terminals is provided. The base is essentially consisted of a patterned circuit layer having a first surface and a second surface opposite to each other and a solder mask disposed on the second surface,... Agent: J C Patents

20100187692 - Chip package without core and stacked chip package structure: A chip package including a base, a chip, a molding compound and a plurality of outer terminals is provided. The base is essentially consisted of a patterned circuit layer having a first surface and a second surface opposite to each other and a solder mask disposed on the second surface,... Agent: J C Patents

20100187688 - Reduced bottom roughness of stress buffering element of a semiconductor component: The present invention relates to a stress buffering package (49) for a semiconductor component, with a semiconductor substrate (52); an I/O pad (54), electrically connected to the semiconductor substrate (52); a stress buffering element (74) for absorbing stresses, electrically connected to the I/O pad (54); an underbump metallization (70), electrically... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100187689 - Semiconductor chips including passivation layer trench structure: An integrated circuit including an active region a passive region and a cut line in the passive region includes a passivation layer that includes an outer nitride layer over an oxide layer. The integrated circuit also includes a crack stop below the passivation layer and in the passive region, and... Agent: Cantor Colburn LLP - IBM Fishkill

20100187690 - Semiconductor device: A semiconductor device includes a wiring substrate having connection pads. A first semiconductor chip is mounted on the wiring substrate. A second semiconductor chip is stacked on the first semiconductor chip in a step-like shape. Electrode pads of the first semiconductor chip are electrically connected to the connection pads of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100187687 - Underbump metallization structure: A system and method for forming an underbump metallization (UBM) is presented. A preferred embodiment includes a raised UBM which extends through a passivation layer so as to make contact with a contact pad while retaining enough of the passivation layer between the contact pad and the UBM to adequately... Agent: Slater & Matsil, L.L.P.

20100187693 - Diffusion barrier layers: Provided are methods and apparatuses for depositing barrier layers for blocking diffusion of conductive materials from conductive lines into dielectric materials in integrated circuits. The barrier layer may contain copper. In some embodiments, the layers have conductivity sufficient for direct electroplating of conductive materials without needing intermediate seed layers. Such... Agent: Weaver Austin Villeneuve & Sampson LLP - Novl Attn.: Novellus Systems, Inc.

20100187695 - Out-of-plane spring structures on a substrate: A structure has at least one structure component formed of a first material residing on a substrate, such that the structure is out of a plane of the substrate. A first coating of a second material then coats the structure. A second coating of a non-oxidizing material coats the structure... Agent: Marger Johnson & Mccollom/parc

20100187694 - Through-silicon via sidewall isolation structure: A system and method for an improved through-silicon via isolation structure is provided. An embodiment comprises a semiconductor device having a substrate with electrical circuitry formed thereon. One or more dielectric layers are formed over the substrate, and an opening is etched into the structure extending from a surface of... Agent: Slater & Matsil, L.L.P.

20100187697 - Electronic device package and method for fabricating the same: An embodiment of the present invention provides an electronic device package, which includes a chip having a first surface and an opposite second surface and a trench extending into a body of the chip along a direction from the second surface to the first surface, wherein a bottom portion of... Agent: Liu & Liu

20100187696 - Semiconductor component and method of manufacture: A semiconductor component that includes a contact landing pad and a method for manufacturing the semiconductor component. A trench having sidewalls is formed in a semiconductor material and a dielectric material is formed on the sidewalls of the trench. An electrically conductive material is formed on the sidewalls and fills... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100187698 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a first wiring layer, a first interlayer insulating film over the first wiring layer, a second wiring layer crossing the first wiring layer and provided on the first interlayer insulating film, a second interlayer insulating film over the second wiring layer, and a via conductor electrically... Agent: Young & Thompson

20100187699 - Semiconductor integrated circuit device: There is provided a layout structure of a semiconductor integrated circuit capable of preventing the thinning of a metal wiring line close to a cell boundary and wire breakage therein without involving increases in the amount of data for OPC correction and OPC process time. In a region interposed between... Agent: Mcdermott Will & Emery LLP

20100187700 - Method and apparatus for manufacturing an electronic module, and electronic module: A substrate which has at least one component, such as a semiconductor chip, arranged on it is manufactured from a film made of plastic material laminated onto a surface of the substrate and of the at least one component, where the surface has at least one contact area. First, the... Agent: Staas & Halsey LLP

20100181545 - Non-volatile memory cell and fabrication method thereof: A non-volatile memory cell and the fabrication method thereof are provided. The non-volatile memory cell comprises a top electrode, a bottom electrode and an oxide layer disposed between the top electrode and the bottom electrode. The oxide layer comprises a relatively low oxygen content layer adjacent to the bottom electrode,... Agent: Volpe And Koenig, P.C.

20100181546 - Nonvolatile semiconductor memory and manufacturing method thereof: A nonvolatile semiconductor memory using carbon related films as variable resistance films includes bottom electrodes formed above a substrate, buffer layers formed on the bottom electrodes and each formed of a film containing nitrogen and containing carbon as a main component, variable resistance films formed on the buffer layers and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100181547 - Semiconductor device and method of manufacturing the same: A semiconductor device includes: diffusion layers formed at the front surface of a substrate; low-resistance parts formed at the front surfaces of the diffusion layers so as to have resistance lower than the diffusion layer; and rear contact electrodes passing through the substrate from the rear surface of the substrate... Agent: Rader Fishman & Grauer PLLC

20100181548 - Solid-state memory and semiconductor device: A solid memory may include a recording layer including Ge, Sb and Te as major components. The recording layer may include a superlattice. The recording layer may include multi-layers each having a parent phase showing a phase transformation in solid-states, the phase transformation causing change in electrical property of the... Agent: Morrison & Foerster LLP

20100181549 - Phase-changeable random access memory devices including barrier layers and metal silicide layers: A PRAM device may include an insulating interlayer, a diode, a metal silicide layer, a barrier spacer, an outer spacer, a lower electrode, a phase-changeable layer and an upper electrode. The insulating interlayer may be formed on a substrate. The insulating interlayer may have a contact hole. The diode may... Agent: Myers Bigel Sibley & Sajovec

20100181550 - Manufacture method for zno based semiconductor crystal and light emitting device using same: A manufacture method for zinc oxide (ZnO) based semiconductor crystal includes providing a substrate having a Zn polarity plane; and reacting at least zinc (Zn) and oxygen (O) on the Zn polarity plane of said substrate to grow ZnO based semiconductor crystal on the Zn polarity plane of said substrate... Agent: Masao Yoshimura, Chen Yoshimura LLP

20100181551 - Quantum dot transistor: One or more quantum dots are used to control current flow in a transistor. Instead of being disposed in a channel between source and drain, the quantum dot (or dots) are vertically separated from the source and drain by an insulating layer. Current can tunnel between the source/drain electrodes and... Agent: Lumen Patent Firm

20100181552 - Method and apparatus for infrared detection and display: Embodiments of the subject invention relate to a method and apparatus for infrared (IR) detection. Organic layers can be utilized to produce a phototransistor for the detection of IR radiation. The wavelength range of the IR detector can be modified by incorporating materials sensitive to photons of different wavelengths. Quantum... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100181562 - Light-emitting element, light-emitting device, and electronic device: A light-emitting element includes a first electrode, a first light-emitting layer formed over the first electrode, a second light-emitting layer formed on and in contact with the first light-emitting layer to be in contact therewith, and a second electrode formed over the second light-emitting layer. The first light-emitting layer includes... Agent: Cook Alex Ltd

20100181555 - Material for organic electroluminescent device, organic electroluminescent device, and organic electroluminescent display: wherein Y1 to Y4 are independently a carbon atom or a nitrogen atom; R1 to R4 are independently hydrogen, an alkyl group, an aryl group, a heterocycle, a halogen atom, a fluoroalkyl group or a cyano group; and R1 and R2, or R3 and R4 may be bonded together to... Agent: Darby & Darby P.C.

20100181554 - Organic el display panel: The present invention relates to an organic EL display panel having an organic light emitting layer having a uniform film thickness. The organic EL display panel of the present invention includes: a substrate; linear banks placed on the substrate and defining a linear region on the substrate; and at least... Agent: Greenblum & Bernstein, P.L.C

20100181559 - Organic el display panel and manufacturing method thereof: Disclosed is an organic EL display panel which includes: a substrate; a linear first bank which is disposed over the substrate and defines a linear region; a second bank which defines two or more pixel regions arranged in the linear region; a pixel electrode disposed in the pixel region; a... Agent: Greenblum & Bernstein, P.L.C

20100181553 - Organic electroluminescent device material and organic electroluminescent device: Disclosed is an organic electroluminescent device (organic EL device) that utilizes phosphorescence and is improved in luminous efficiency and fully secured of driving stability. The organic EL device comprises an anode, an organic layer containing a hole-transporting layer, a light-emitting layer, and an electron-transporting layer, and a cathode piled one... Agent: Birch Stewart Kolasch & Birch

20100181560 - Organic electroluminescent element, display, and electronic apparatus: An organic electroluminescent element includes an electron-transport layer composed of a heterocyclic compound, a negative electrode composed of a metal material, and a transition-metal-complex layer arranged between the electron-transport layer and the negative electrode.... Agent: Sonnenschein Nath & Rosenthal LLP

20100181556 - Organic electronic device with low-reflectance electrode: There is provided an organic electronic device including an anode; a hole injection layer; a hole transport layer; a photoactive layer including a plurality of first subpixels, a plurality of second subpixels and a plurality of third subpixels; an electron transport layer including an electron transport material and an n-dopant,... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20100181557 - Organic light emitting diode and manufacturing method thereof: An organic light emitting diode (OLED) and a manufacturing method thereof are provided. The OLED includes a substrate, and a first electrode serving as an anode, an organic material layer, a second electrode serving as a cathode, and a sealing layer are formed on the substrate in sequence, and the... Agent: J C Patents

20100181561 - Organic light-emitting device: An organic light emitting device with improved light emitting efficiency, the organic light emitting device includes a substrate, a first electrode arranged on the substrate, a second electrode arranged to face the first electrode, an organic light-emitting layer arranged between the first electrode and the second electrode, an electron transport... Agent: Robert E. Bushnell & Law Firm

20100181558 - Semiconductor device, semiconductor device manufacturing method and image display device: A semiconductor device comprises a resin film having a through hole; and a semiconductor element comprising a gate electrode disposed on the inner wall of the through hole, an insulating layer that covers the gate electrode within the through hole, an organic semiconductor disposed on the insulating layer within the... Agent: Wenderoth, Lind & Ponack L.L.P.

20100181563 - Thin film transistor, method of manufacturing the same, and flat panel display device having the same: A thin film transistor using an oxide semiconductor as an active layer, and its method of manufacture. The thin film transistor includes: a substrate; an active layer formed of an oxide semiconductor; a gate insulating layer formed of a dielectric on the active layer, the dielectric having an etching selectivity... Agent: Robert E. Bushnell & Law Firm

20100181566 - Electrode structure, device comprising the same and method for forming electrode structure: An electrode structure comprises a semiconductor junction comprising an n-type semiconductor layer and a p-type semiconductor layer; a hole exnihilation layer on the p-type semiconductor layer; and a transparent electrode layer on the hole exnihilation layer. The electrode structure further comprises a conductive layer between the hole exnihilation layer and... Agent: Fenwick & West LLP

20100181564 - Functional material for printed electronic components: The invention relates to a printable precursor comprising an organometallic zinc complex which contains at least one ligand from the class of the oximates and is free from alkali metals and alkaline-earth metals, for electronic components and to a preparation process. The invention furthermore relates to corresponding printed electronic components,... Agent: Millen, White, Zelano & Branigan, P.C.

20100181565 - Semiconductor device and manufacturing method thereof: A semiconductor device including a thin film transistor which includes an oxide semiconductor layer and has high electric characteristics and reliability. Film deposition is performed using an oxide semiconductor target containing an insulator (an insulating oxide, an insulating nitride, silicon oxynitride, aluminum oxynitride, or the like), typically SiO2, so that... Agent: Robinson Intellectual Property Law Office, P.C.

20100181568 - Integrated circuits on a wafer and methods for manufacturing integrated circuits: Integrated circuits (1) on a wafer comprise a wafer substrate (2), a plurality of integrated circuits (1) formed lattice-like in rows and columns on the wafer substrate (2), and first and second saw lines (4, 5) separating the integrated circuits (1). The first saw lines (4) run parallel and equidistant... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100181567 - Semiconductor device including bonding pads and semiconductor package including the semiconductor device: Provided is a semiconductor device that may prevent a test pad planned not to be wire bonded from being wire bonded. The semiconductor device may include a bonding pad planned to be wire bonded and a test pad planned not to be wire bonded, and a passivation layer including a... Agent: Harness, Dickey & Pierce, P.L.C

20100181569 - Display device and manufacturing method of the same: A display device for preventing misalignment of data lines and pixel electrodes, and a manufacturing method of the display device are provided. The display device includes an insulation substrate, line wiring formed on the insulation substrate, an organic insulating pattern covering the top surface and side surfaces of a portion... Agent: Cantor Colburn, LLP

20100181570 - Display device and method for manufacturing the same: An active matrix substrate in which variations in output characteristics of photodiodes are reduced, and a display device using this active matrix substrate, are provided. An active matrix substrate (1) having an n-TFT (20), a p-TFT (30), and a photodiode (10) is used. The photodiode (10) includes a p-layer (7),... Agent: Nixon & Vanderhye, PC

20100181571 - Laminate structure, electronic device, and display device: A laminate structure is disclosed that has a region having high surface free energy and a region having low surface free energy that are well separated, has high adhesiveness between an underlying layer and a conductive layer, and can be formed easily with low cost. The laminate structure includes a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100181572 - Thin film transistor array panel: A data line and an amorphous silicon pattern are formed on a substrate. The first electrode pattern is extended from the data line and overlaps an edge of the amorphous silicon pattern. The second electrode pattern is made of the same metal as the first electrode pattern and overlaps the... Agent: Innovation Counsel LLP

20100181573 - Gated co-planar poly-silicon thin film diode: A diode has a first contact of a material having a first conductivity type, a second contact of a material having a second conductivity type arranged co-planarly with the first contact, a channel arranged co-planarly between the first and second contacts, a gate arranged adjacent the channel, and a voltage... Agent: Marger Johnson & Mccollom/parc

20100181575 - Semiconductor device provided with thin film transistor and method for manufacturing the semiconductor device: A semiconductor device includes at least one thin-film transistor 116, which includes: a crystalline semiconductor layer 120 including a region 110 to be a channel region and source and drain regions 113; a gate electrode 107 for controlling the conductivity of the region 110 to be a channel region; a... Agent: Birch Stewart Kolasch & Birch

20100181574 - Thin film transistor devices with different electrical characteristics and method for fabricating the same: A system for displaying images. The system includes a thin film transistor (TFT) device including a first insulating layer covering a first region and a second region of a substrate. A first polysilicon active layer is disposed in the first region and between the substrate and the first insulating layer.... Agent: Liu & Liu

20100181576 - Epitaxial structure having low defect density: An epitaxial structure having a low defect density includes: a base layer; a first epitaxial layer having a plurality of concentrated defect groups, and an epitaxial surface that has a plurality of first recesses corresponding in position to the concentrated defect groups, the sizes of the first recesses being close... Agent: Whyte Hirschboeck Dudek S C Intellectual Property Department

20100181577 - Nitride semiconductor substrate: There is provided a nitride semiconductor substrate. The nitride semiconductor substrate comprises a substrate, a patterned epitaxy layer, a protective layer and a gallium nitride semiconductor layer. The patterned epitaxy layer is disposed on the substrate, wherein the patterned epitaxy layer comprises a pier structure and the patterned epitaxy layer... Agent: Jianq Chyun Intellectual Property Office

20100181578 - Package structure: A package structure is described. A light emitting element and a light sensing element are disposed on a substrate, and are both wrapped by a package layer. Meanwhile, the light emitting element and the light sensing element are separated by a trench of the package layer, such that lights generated... Agent: Morris Manning Martin LLP

20100181579 - Assembly structure of a light-emitting diode light source and a power supply interface: The present invention discloses an light emitting diode (LED) light source and an interface for providing power to the LED. The LED light source includes an LED unit and a second coupling unit. The LED unit includes a base, one or more LED, and a first coupling unit. The LED... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100181580 - Light emitting apparatus: A light emitting apparatus including a light emitting element of a gallium nitride based semiconductor and a light converter absorbing a part of primary light emitted from the light emitting element to emit secondary light with a longer wavelength than the primary light, the light converter includes, as a red... Agent: Nixon & Vanderhye, PC

20100181581 - Type ii broadband or polychromatic leds: An LED is provided comprising two or more light-emitting Type II interfaces wherein at least two of the Type II interfaces differ in transition energy by at least 5%, or more typically by at least 10%, and wherein at least one of the Type II interfaces is within a pn... Agent: 3m Innovative Properties Company

20100181582 - Light emitting devices with phosphor wavelength conversion and methods of manufacture thereof: A light emitting device comprises: a package (low temperature co-fired ceramic) having a plurality of recesses (cups) in which each recess houses at least one LED chip and at least one phosphor material applied as coating to the light emitting light surface of the LED chips, wherein the phosphor material... Agent: Fliesler Meyer LLP

20100181583 - Radiation-emitting semiconductor chip: A radiation-emitting semiconductor chip is specified, comprising a semiconductor body (3) having an n-conducting region (4) and a p-conducting region (5), the semiconductor body having a hole barrier layer containing a material from the material system InyGa1-x-yAlxN.... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100181589 - Chip package structure and method for fabricating the same: The invention provides a chip package structure and method for fabricating the same. The chip package structure includes a carrier substrate. A plurality of isolated conductive layers is disposed on the carrier substrate. At least one chip is disposed on the carrier substrate, wherein the chip has a plurality of... Agent: Wen Liu Liu & Liu

20100181585 - Illumination system comprising a compound with low thermal expansion coefficient: The invention relates to an illumination system with a material having a low or negative thermal expansion coefficient in order to compensate for the thermal expansion of the further materials present in the illumination system.... Agent: Philips Intellectual Property & Standards

20100181584 - Laser lift-off with improved light extraction: A light emitting device includes a stack of semiconductor layers defining a light emitting pn junction and a dielectric layer disposed over the stack of semiconductor layers. The dielectric layer has a refractive index substantially matching a refractive index of the stack of semiconductor layers. The dielectric layer has a... Agent: Fay Sharpe LLP

20100181591 - Led illumination device using diffraction member: An object of this invention is to provide an LED illumination device that can substitute for a fluorescent light and obtain uniform light with high efficiency. The LED illumination device comprises an LED with a thin-plate-shaped semiconductor element body transmitting the light generated in a PN junction area in a... Agent: Alleman Hall Mccoy Russell & Tuttle LLP

20100181587 - Led packaging structure and fabricating method thereof: A LED (light emitting diode) packaging structure includes a base, a LED chip, a gel-blocking structure and a phosphor layer. The LED chip disposed on the base and electrically connected to the base. The LED chip having a substrate and a semiconductor layer formed on the substrate. The gel-blocking structure... Agent: Bacon & Thomas, PLLC

20100181586 - Light emitting device: A light emitting device That includes a first photonic crystal structure having a reflective layer and non-metal pattern elements on the reflective layer, a second conductive semiconductor layer on both the reflective layer and the non-metal pattern elements, an active layer on the second conductive semiconductor layer, and a first... Agent: Birch Stewart Kolasch & Birch

20100181590 - Light-emitting diode illuminating apparatus: The invention provides a light-emitting diode illuminating apparatus. The light-emitting diode illuminating apparatus includes a carrier, a substrate, a light-emitting diode die, and a micro-lens assembly. The carrier includes a top surface and a bottom surface. A first recess is formed on the top surface of the carrier. A second... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100181592 - Semiconductor device and method of manufacturing same: A FET is formed on a semiconductor substrate, a curved surface having a radius of curvature is formed on an upper end of an insulation, a portion of a first electrode is exposed corresponding to the curved surface to form an inclined surface, and a region defining a luminescent region... Agent: Cook Alex Ltd

20100181588 - Semiconductor light emitting device: Disclosed is a semiconductor light emitting device. The semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and an active layer disposed therebetween, and a surface plasmon layer disposed between the active layer and at least one of the n-type and p-type semiconductor layers, including metallic... Agent: Mcdermott Will & Emery LLP

20100181593 - Led chip package: A LED chip package including a two-phase-flow heat transfer device, at least one LED chip, a metal lead frame and a package material. The two-phase-flow heat transfer device has at least one flat surface. The LED chip is directly or indirectly bonded or adhered to the flat surface of the... Agent: Bacon & Thomas, PLLC

20100181594 - Semiconductor chip assembly with post/base heat spreader and cavity over post: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The semiconductor device extends into a cavity in the adhesive, is electrically connected to the conductive trace and is thermally connected to the heat spreader. The heat spreader includes a post and a... Agent: David M. Sigmond

20100181595 - Group iii nitride semiconductor light-emitting device: The inventive Group III nitride semiconductor light-emitting device comprises a substrate; and a Group III nitride semiconductor layer including a light-emitting layer, stacked on the substrate, wherein the side face of the Group III nitride semiconductor layer is tilted with respect to the normal line of the major surface of... Agent: Sughrue Mion, PLLC

20100181596 - Semiconductor device and manufacturing method thereof: A high voltage horizontal IGBT, which is an aspect of a semiconductor device relating to the present invention, has a buffer region formed in an SOI substrate and extending from a surface of the SOI substrate to a surface of a buried oxide film. An interface between the buffer region... Agent: Mcdermott Will & Emery LLP

20100181597 - Protection device of programmable semiconductor surge suppressor having deep-well structure: A protection device of programmable semiconductor surge suppressor having deep-well structure is provided comprising one, two or four protection units, each of which is composed of a PN-junction diode, a PNPN-type thyristor and a NPN-type triode connected with each other. It is characterized in that in the diode area on... Agent: Oliff & Berridge, PLC

20100181599 - Semiconductor device and method for fabricating the same: A semiconductor device includes a substrate, a gate formed over the substrate, a gate spacer provided against first and second sidewalls of the gate, and a source/drain region formed in the substrate proximate to the gate spacer. The source/drain region includes first and second epitaxial layers including Ge, wherein the... Agent: Townsend And Townsend And Crew, LLP

20100181598 - Semiconductor device and method of manufacturing semiconducer device: Etch block layers having an etching rate smaller than that of a first semiconductor forming a semiconductor substrate are formed on the sidewalls of device isolation grooves by applying oblique ion implantation of Ox, N, or C to the semiconductor substrate including the first semiconductor. Embedded layers including a second... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100181600 - Programmable transistor array design methodology: A method of designing integrated circuits includes providing a first chip and a second chip identical to each other. Each of the first chip and the second chip includes a base layer including a Logic Transistor Unit (LTU) array. The LTU array includes LTUs identical to each other and arranged... Agent: Slater & Matsil, L.L.P.

20100181601 - Silicon based opto-electric circuits: A semiconductor structure, comprising: a substrate; a seed layer over an upper surface of the substrate; a semiconductor layer disposed over the seed layer; a transistor device in the semiconductor layer; wherein the substrate has an aperture therein, such aperture extending from a bottom surface of the substrate and terminating... Agent: Raytheon Company C/o Daly, Crowley, Mofford & Durkee, LLP

20100181602 - Solid-state image sensor, method of manufacturing the same, and image pickup apparatus: Disclosed is a solid-state image sensor including a photoelectric converter, a charge detector, and a transfer transistor. The photoelectric converter stores a signal charge that is subjected to photoelectric conversion. The charge detector detects the signal charge. The transfer transistor transfers the signal charge from the photoelectric converter to the... Agent: Lerner, David, Littenberg, Krumholz & Mentlik

20100181603 - Metal semiconductor field effect transistor (mesfet) silicon-on-insulator structure having partial trench spacers: In one embodiment, a metal-semiconductor field effect transistor (MESFET) comprises a first silicon layer, an insulator layer formed on the first silicon layer, and a second silicon layer formed on the insulator layer. A gate region, a source region, and a drain region are formed in the second silicon layer.... Agent: Honeywell/s&s Patent Services

20100181604 - Structure and method for flexible sensor array: A method of forming a sensor array. The method includes depositing a source/drain contact layer; depositing a semiconductor layer on the source/drain contact layer; and patterning the source/drain contact layer and the semiconductor layer substantially simultaneously, wherein the patterned semiconductor layer forms part of a sensor of the sensor array.... Agent: Marger Johnson & Mccollom/parc

20100181605 - Data storage device having self-powered semiconductor device: Provided is a data storage device. The data storage device includes an interface, a buffer controller, a memory controller, a non-volatile memory, and a self-powered semiconductor device adjacent to and electrically connected to the buffer controller. The self-powered semiconductor device includes a semiconductor chip and a rechargeable micro-battery attached to... Agent: Volentine & Whitt PLLC

20100181606 - Semiconductor device: Provided is a semiconductor device having a high switching speed. A semiconductor device (20) is provided with an n-type epitaxial layer (2) having a plurality of trenches (3) arranged at prescribed intervals (b); an embedded electrode (5) formed on an inner surface of the trench (3) through a silicon oxide... Agent: Fish & Richardson P.C.

20100181607 - Increasing the surface area of a memory cell capacitor: Methods and apparatuses to increase a surface area of a memory cell capacitor are described. An opening in a second insulating layer deposited over a first insulating layer on a substrate is formed. The substrate has a fin. A first insulating layer is deposited over the substrate adjacent to the... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100181608 - Flash memory device and method manufacturing the same: According to the present disclosure, a flash memory device includes a semiconductor substrate that includes selection transistor regions and a memory cell region defined between the selection transistor region, first isolation layers formed in the selection transistor regions, and second isolation layers formed in the memory cell region. The second... Agent: Marshall, Gerstein & Borun LLP

20100181609 - Flash memory device and method of manufacturing the same: Disclosed herein are flash memory devices and methods of making the same. According to one embodiment, a flash memory device includes first trenches formed in a semiconductor substrate and arranged in parallel, second trenches discontinuously formed in the semiconductor substrate and arranged between the first trenches, first isolation structures respectively... Agent: Marshall, Gerstein & Borun LLP

20100181610 - Non-volatile memory device and method for fabricating non-volatile memory device: Provided are nonvolatile memory devices with a three-dimensional structure and methods of fabricating the same. The nonvolatile memory device includes conductive patterns three-dimensionally arranged on a semiconductor substrate, semiconductor patterns that extend from the semiconductor substrate and intersect one-side walls of the conductive patterns, charge storage layers interposed between the... Agent: Myers Bigel Sibley & Sajovec

20100181611 - Dielectric structure in nonvolatile memory device and method for fabricating the same: A dielectric structure in a nonvolatile memory device and a method for fabricating the same are provided. The dielectric structure includes: a first oxide layer; a first high-k dielectric film formed on the first oxide layer, wherein the first high-k dielectric film includes one selected from materials with a dielectric... Agent: Ip & T Law Firm PLC

20100181612 - Nonvolatile semiconductor memory device and method for manufacturing same: A nonvolatile semiconductor memory device includes: forming a stacked body by alternately stacking a plurality of interlayer insulating films and a plurality of control gate electrodes; forming a through-hole extending in a stacking direction in the stacked body; etching a portion of the interlayer insulating film facing the through-hole via... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100181615 - Semiconductor device: There is provided a semiconductor device in which an upper main electrode region of a 3D pillar SGT includes a selective epitaxial growth semiconductor film, at least two adjacent 3D pillar SGTs are interconnected in parallel with each other by joining the selective epitaxial growth semiconductor films together, thereby the... Agent: Young & Thompson

20100181614 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a semiconductor pillar, an insulator, and an electrode. The semiconductor pillar has a semiconductor portion outwardly extending. The insulator extends along the semiconductor pillar. The insulator has an insulating portion outwardly extending along the semiconductor portion. The electrode extends along the insulator. The insulator is between... Agent: Sughrue Mion, PLLC

20100181613 - Semiconductor memory devices: A semiconductor memory device includes first and second active pillar structures protruding at an upper part of a substrate, buried bit lines each extending in a first direction, and first gate patterns and second gate patterns each extending in a second direction. The first and second active pillar structures occupy... Agent: Volentine & Whitt PLLC

20100181616 - Semiconductor device and method of manufacturing the same: A semiconductor device where a plurality of DMOS transistors formed in a distributed manner on a semiconductor substrate can operate without being destroyed and a method of manufacturing the same. The on/off threshold voltage of a DMOS transistor at the innermost position from among three or more DMOS transistors formed... Agent: Rabin & Berdo, PC

20100181617 - Method for forming a patterned thick metallization atop a power semiconductor chip: A method is disclosed for forming a patterned thick metallization atop a semiconductor chip wafer. The method includes fabricating a nearly complete semiconductor chip wafer ready for metallization; depositing a bottom metal layer of sub-thickness TK1 together with its built-in alignment mark using a hot metal process; depositing a top... Agent: Chein-hwa S. Tsao

20100181618 - Extended drain transistor and method of manufacturing the same: An extended drain transistor (100) comprising a substrate (101), a gate (103) formed on the substrate (100), the gate (103) having a first side wall (104) and a second side wall (105) opposing the first side wall (104), an extended drain (106) implanted in a surface portion of the substrate... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100181619 - Method of forming a field effect transistor: A method of forming a field effect transistor comprises providing a substrate comprising a biaxially strained layer of a semiconductor material. A gate electrode is formed on the biaxially strained layer of semiconductor material. A raised source region and a raised drain region are formed adjacent the gate electrode. Ions... Agent: Williams, Morgan & Amerson

20100181620 - Structure and method for forming programmable high-k/metal gate memory device: A method of fabricating a memory device is provided that may begin with forming a layered gate stack overlying a semiconductor substrate and patterning a metal electrode layer stopping on the high-k gate dielectric layer of the layered gate stack to provide a first metal gate electrode and a second... Agent: Scully, Scott, Murphy & Presser, P.C.

20100181621 - Signal and power supply integrated esd protection device: An integrated circuit, design structures and methods of forming the integrated circuit which includes a signal pad ESD coupled to an I/O signal pad and a power supply ESD coupled to a source VDD. The signal pad ESD and the power supply ESD are integrated in a single ESD structure.... Agent: Roberts Mlotkowski Safran & Cole, P.C. Intellectual Property Department

20100181622 - Semiconductor device and method for manufacturing the same: A semiconductor device of one embodiment of the present invention includes a substrate; isolation layers, each of which is formed in a trench formed on the substrate and has an insulating film and a conductive layer; a semiconductor layer of a first conductivity type for storing signal charges, formed between... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100181623 - Semiconductor device having dummy bit line structure: A semiconductor device includes a substrate having a cell area including a memory cell region and a dummy cell region, gate structures formed in the cell region, an insulating interlayer formed on the substrate to cover the gate structures, plugs formed through the insulating interlayer, bit lines contacting the plugs... Agent: Volentine & Whitt PLLC

20100181626 - Methods for forming nmos and pmos devices on germanium-based substrates: A semiconductor structure includes a germanium substrate having a first region and a second region. A first silicon cap is over the first region of the germanium substrate. A second silicon cap is over the second region of the germanium substrate, wherein a first thickness of the first silicon cap... Agent: Slater & Matsil, L.L.P.

20100181624 - Semiconductor device and manufacturing method of the same: A semiconductor device includes a gate electrode line provided to extend from an N-type area through a device isolation area to a P-type area, and source/drain diffused regions formed in N-type and P-type areas. The gate electrode line includes a first silicide region which configures a P-type MOSFET gate electrode... Agent: Young & Thompson

20100181625 - Semiconductor device and method of fabricating the same: A semiconductor device according to one embodiment includes: a semiconductor layer formed on a semiconductor substrate; a gate electrode formed on the semiconductor layer via a gate insulating film; an impurity diffusion suppression layer formed between the semiconductor substrate and the semiconductor layer and including a C-containing Si-based crystal containing... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100181627 - Semiconductor device and method for manufacturing: A semiconductor device and method for manufacturing. One embodiment provides a semiconductor device including an active cell region and a gate pad region. A conductive gate layer is arranged in the active cell region and a conductive resistor layer is arranged in the gate pad region. The resistor layer includes... Agent: Dicke, Billig & Czaja

20100181628 - Semiconductor device: Prevention of disconnection of a bonding wire resulting from adhesive interface delamination between a resin and a leadframe, and improvement of joint strength of the resin and the leadframe are achieved in a device manufactured by a low-cost and simple processing. A boss is provided on a source lead by... Agent: Brundidge & Stanger, P.C.

20100181629 - Method of forming an integrated circuit: A method includes forming a source, a drain, and a disposable gate (38) of the first transistor; forming a source, a drain, and a disposable gate of the second transistor; removing the disposable gates of the first transistor and the second transistor; forming a photoresist layer over the first transistor... Agent: Freescale Semiconductor, Inc. Law Department

20100181630 - Direct contact between high-k/metal gate and wiring process flow: A low resistance contact is formed to a metal gate or a transistor including a High-K gate dielectric in a high integration density integrated circuit by applying a liner over a gate stack, applying a fill material between the gate stacks, planarizing the fill material to support high-resolution lithography, etching... Agent: Whitham, Curtis & Christofferson, P.C.

20100181631 - Fabrication of mems based cantilever switches by employing a split layer cantilever deposition scheme: Embodiments discussed herein generally disclose novel alternative methods that can be employed to overcome the gradient stress formed in refractory materials to be used for thin film MEMS cantilever switches. The use of a ‘split layer’ cantilever fabrication method, as described herein enables thin film MEMS cantilever switches to be... Agent: Patterson & Sheridan, L.L.P.

20100181633 - Magnetic memory device: A magnetic memory device includes a magnetic tunnel junction (MTJ) structure and an electrode embedded in a dielectric structure. The MTJ structure includes a free layer. The electrode is formed of silicon-germanium and is electrically connected to the MTJ. The electrode heats the free layer to reduce the coercive force... Agent: F. Chau & Associates, LLC

20100181632 - Magnetic tunnel junction device and memory device including the same: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared by the following steps. A single-crystalline MgO (001) substrate 11 is prepared. An epitaxial Fe(001) lower electrode (a first electrode) 17 with the thickness of 50... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20100181634 - Method and structure for reducing cross-talk in image sensor devices: Provided is a method of fabricating an image sensor device. The method includes providing a semiconductor substrate having a front side and a back side, forming a first isolation structure at the front side of the semiconductor substrate, thinning the semiconductor substrate from the back side, and forming a second... Agent: David M. O'dell Haynes And Boone, LLP

20100181635 - Method and structure for reducing cross-talk in image sensor devices: Provided is a method of fabricating an image sensor device. The method includes providing a semiconductor substrate having a front side and a back side, forming a first isolation structure at the front side of the semiconductor substrate, thinning the semiconductor substrate from the back side, and forming a second... Agent: David M. O'dell Attorney For Applicants

20100181636 - Optical device, solid-state imaging device, and method of manufacturing optical device: An optical device includes the following structures. An optical element includes a light-receiving element at an upper surface of the optical element. A transparent member is disposed on the upper surface to cover the light-receiving element. A case includes a bottom wall, a side wall protruding from an outer edge... Agent: Greenblum & Bernstein, P.L.C

20100181637 - Solid-state image pickup device and method of manufacturing the same: A method of manufacturing a solid-state image pickup device according to an embodiment includes forming first and second holes in a semiconductor substrate, forming insulating films on surfaces of the first and second holes, forming a contact and an alignment mark by embedding a conducting material in the first and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100181638 - Method of forming an isolation structure: Provided is a method of fabricating a semiconductor device that includes providing a semiconductor substrate having a front side and a back side, forming a first circuit and a second circuit at the front side of the semiconductor substrate, bonding the front side of the semiconductor substrate to a carrier... Agent: David M. O'dell Haynes And Boone, LLP

20100181640 - Semiconductor device: Provided is a semiconductor device about which the reliability thereof is certainly kept even when a void is generated in a buried film in its trench. A rectangular element formation region is formed in a silicon layer. A trench having a predetermined width is formed to surround the element formation... Agent: Mcdermott Will & Emery LLP

20100181639 - Semiconductor devices and fabrication methods thereof: A semiconductor device is provided. The semiconductor device comprises an epitaxial layer disposed on a semiconductor substrate, a plurality of electronic devices disposed on the epitaxial layer and a trench isolation structure disposed between the electric devices. The trench isolation structure comprises a trench in the epitaxial layer and the... Agent: Quintero Law Office, PC

20100181641 - Semiconductor device and method for manufacturing: A semiconductor and method for manufacturing a semiconductor device. In one embodiment the method includes providing a semiconductor substrate with a first substrate surface and at least one trench having at least one trench surface. The trench extends from the first substrate surface into the semiconductor substrate. The trench has... Agent: Dicke, Billig & Czaja

20100181642 - Wafer-level flip chip package with rf passive element/ package signal connection overlay: A packaged integrated circuit includes an integrated circuit having a Radio Frequency (RF) passive element formed therein and a wafer level chip scale flip chip package that contains the integrated circuit. The wafer level chip scale flip chip package includes at least one dielectric layer isolating a top metal layer... Agent: Garlick Harrison & Markison

20100181643 - Efuse with partial sige layer and design structure therefor: A fuse includes a fuse link region, a first region and a second region. The fuse link region electrically connects the first region to the second region. A SiGe layer is disposed only in the fuse link region and the first region.... Agent: International Business Machines Corporation Dept. 18g

20100181644 - Ic package with capacitors disposed on an interposal layer: An integrated circuit (IC) package with a plurality of chip capacitors placed on a surface of a die is disclosed. The chip capacitors may be placed on top of the die with an interposal substrate layer. Placing chip capacitors on top of the die may reduce the size of the... Agent: Martine Penilla & Gencarella, LLP

20100181645 - Semiconductor arrangement with trench capacitor and method for its manufacture: The invention relates to a semiconductor arrangement and method for production thereof, wherein the semiconductor arrangement is provided with an integrated circuit arranged on a substrate. The integrated circuit is structured on the front face of the substrate and at least one capacitor is connected to the integrated circuit, wherein... Agent: Schwegman, Lundberg & Woessner, P.A.

20100181647 - Semiconductor device and manufacturing method thereof: In this invention, the film thicknesses of an upper barrier film of a lower electrode of a capacitive element and an upper barrier film of a metallic interconnect layer formed in the same layer as this is made thicker than the film thicknesses of upper barrier films of other metallic... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100181646 - Semiconductor device and method for fabricating the same: The present invention relates to a semiconductor and manufacturing method thereof, in which a nano tube structure is vertically grown to form a lower electrode of a cell region and a via contact of peripheral circuit region. Therefore, capacitance of the lower electrode is secured without an etching process for... Agent: Ampacc Law Group

20100181648 - Localized synthesis and self-assembly of nanostructures: Systems and methods for local synthesis of silicon nanowires and carbon nanotubes, as well as electric field assisted self-assembly of silicon nanowires and carbon nanotubes, are described. By employing localized heating in the growth of the nanowires or nanotubes, the structures can be synthesized on a device in a room... Agent: John P. O'banion O'banion & Ritchey LLP

20100181649 - Polysilicon pillar bipolar transistor with self-aligned memory element: Memory cells having memory elements self-aligned with the emitters of bipolar junction transistor access devices are described herein, as well as methods for manufacturing such devices. A memory device as described herein comprises a plurality of memory cells. Memory cells in the plurality of memory cells include a bipolar junction... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20100181650 - Semiconductor integrated circuit device and a method for manufacturing a semiconductor integrated circuit device: With a general wafer level package process, in order to prevent corrosion of an aluminum type pad electrode in a scribe region in a plating process, the pad electrode is covered with a pad protective resin film at the same layer as an organic type protective film in a product... Agent: Miles & Stockbridge PC

20100181651 - Sealed semiconductor device: A sealed semiconductor device having reduced delamination of the sealing layer in high temperature, high humidity conditions is disclosed. The semiconductor device includes a substrate and a stack of device layers on the substrate sealed with a sealing layer. The upper surface of a street area of the substrate is... Agent: Pequignot + Myers LLC

20100181653 - Method for recycling a substrate, laminated water fabricating method and suitable recycled donor substrate: The invention relates to a method for recycling a substrate with a step-like residue in a first region of its surface, in particular along the edge of the substrate, which protrudes with respect to the surface of a remaining second region of the substrate, and wherein the first region comprises... Agent: Traskbritt, P.C.

20100181652 - Systems and methods for stiction reduction in mems devices: Systems and methods for reducing stiction between elements of a microelectromechanical systems (MEMS) device during anodic bonding. The MEMS device includes a substrate cover with an optional conductor on its interior surface and the cover is anchored to a first portion of a sensing element. The MEMS device further includes... Agent: Honeywell/blg Patent Services

20100181654 - Manufacturing method of semiconductor device, insulating film for semiconductor device, and manufacturing apparatus of the same: An object to provide an insulating film for a semiconductor device, which has characteristics of low permittivity, a low leak current, and high mechanical strength, undergoes small time-dependent change of these characteristics, and has excellent water resistance, and to provide a manufacturing apparatus of the same, and a manufacturing method... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100181655 - Establishing a uniformly thin dielectric layer on graphene in a semiconductor device without affecting the properties of graphene: A method and semiconductor device for forming a uniformly thin dielectric layer on graphene. A metal or semiconductor layer is deposited on graphene which is located on the surface of a dielectric layer or on the surface of a substrate. The metal or semiconductor layer may act as a nucleation... Agent: Winstead, P.C.

20100181656 - Methods of eliminating pattern collapse on photoresist patterns: A stabilizing solution for treating photoresist patterns and methods of preventing profile abnormalities, toppling and resist footing are disclosed. The stabilizing solution comprises a non-volatile component, such as non-volatile particles or polymers, which is applied after the photoresist material has been developed. By treating the photoresist with the solution containing... Agent: Dickstein Shapiro LLP

20100181657 - Nonvolatile memory cell comprising a reduced height vertical diode: A nonvolatile memory cell includes: a rail-shaped first conductor formed at a first height above a substrate; a rail-shaped second conductor formed above the first conductor; and a vertically oriented first pillar comprising a p-i-n first diode; wherein the first pillar is disposed between the second conductor and the first... Agent: Dugan & Dugan, PC

20100181659 - Lead frames with improved adhesion to plastic encapsulant: A lead frame and an electronic package having improved adhesion between the lead frame and an encapsulating plastic material is disclosed. The lead frame can be pre plated having an outer layer comprising a precious metal such as palladium or gold to which is adhered a self-assembled monolayer (SAM), such... Agent: William J. Uhl

20100181658 - Semiconductor device which exposes die pad without covered by interposer and its manufacturing method: A semiconductor device, includes a lead frame including a die pad of which back side surface is exposed to the back side of a package, as well as a plurality of land terminals, a resin filled between the die pad and each of the land terminals so as to enable... Agent: Mcginn Intellectual Property Law Group, PLLC

20100181660 - Multi-chip semiconductor package: Semiconductor packages that contain multiple stacked chips and methods for making such semiconductor packages are described. The semiconductor packages contain a full land pad array and multiple chips that are stacked vertically. Some of the chips are separated by routing leads which are connected to the land pad array. The... Agent: Kenneth E. Horton Kirton & Mcconkle

20100181661 - Semiconductor device: A semiconductor device includes a chip unit mounted on a wiring board. The chip unit includes of semiconductor chips having electrode pads and an interposer having test pads exposed and electrode pads wired from the test pads. The semiconductor chips and the interposer are stacked in a step-like shape so... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100181662 - Stackable layer containing ball grid array package: Layers suitable for stacking in three dimensional, multi-layer modules are formed by interconnecting a ball grid array electronic package to an interposer layer which routes electronic signals to an access plane. The layers are under-filled and may be bonded together to form a stack of layers. The leads on the... Agent: Foley & Lardner LLP

20100181664 - Integrated circuit chip package module: An integrated circuit (IC) package module includes a carrier, an IC chip, a number of wires, a number of pins, a seal member, and a thermal conductor. The IC chip is attached on a top surface of the carrier. The number of pins is connected to the IC chip via... Agent: PCe Industry, Inc. Att. Steven Reiss

20100181663 - Low compressive force, non-silicone, high thermal conducting formulation for thermal interface material and package: An improved thermal interface material for semiconductor devices is provided. More particularly, low compressive force, non-silicone, high thermal conductivity formulations for thermal interface material is provided. The thermal interface material comprises a composition of non-silicone organics exhibiting thermal conductivity of approximately 5.5 W/mK or greater and a compressed bond-line thickness... Agent: Roberts Mlotkowski Safran & Cole, P.c Intellectual Property Department

20100181665 - System and method of achieving mechanical and thermal stability in a multi-chip package: A system and method system for achieving mechanical and thermal stability in a multi-chip package. The system utilizes a lid and multiple thermal interface materials. The method includes utilizing a lid on a multi-chip package and utilizing multiple thermal interface materials on the multi-chip package.... Agent: Roberts Mlotkowski Safran & Cole, P.c Intellectual Property Department

20100181666 - Semiconductor device having lead free solders between semiconductor chip and frame and gabrication method thereof: A semiconductor device includes a semiconductor chip having a current path between a first principal surface and a second principal surface opposite from the first principal surface, a first conductive frame having an opposite region to the first principal surface, and a second conductive frame electrically connected via electrical connection... Agent: Mcginn Intellectual Property Law Group, PLLC

20100181667 - Semiconductor device mounted structure and its manufacturing method, semiconductor device mounting method, and pressing tool: While bumps formed on pads of a semiconductor chip and a board having a sheet-like seal-bonding use resin stuck on its surface are set face to face, the bumps and the board are pressed to each other with a tool, thereby forming a semiconductor chip mounted structure in which the... Agent: Wenderoth, Lind & Ponack L.L.P.

20100181668 - Semiconductor device and electronic apparatus equipped with the semiconductor device: A semiconductor device comprises an IC chip body and a package substrate that has thereon many external electrodes arranged in a two-dimensional grid configuration. Groups of signal lines that are likely to emit noise (noisy signal lines) are separated and spaced apart from groups of signal lines that are susceptible... Agent: Hogan Lovells US LLP

20100181669 - Semiconductor device and method for manufacturing the same: In order to improve a bonding reliability of a semiconductor device, in the semiconductor device, the wiring patterns on the substrate surface and the connection electrodes are electrically connected by face-down mounting. The connection electrodes are formed on the connecting surface of the semiconductor element and made from a conductive... Agent: Nixon & Vanderhye, PC

20100181670 - Contact structure for a semiconductor and method for producing the same: A semiconductor component comprising a substrate with a first side and a second side a multi-layer contact structure arranged on at least one side of the substrate, the contact structure exhibiting a barrier layer to prevent the diffusion of ions from the side of barrier layer opposite to the substrate... Agent: Mcglew & Tuttle, PC

20100181671 - Semiconductor devices and methods of manufacturing the same: A semiconductor device can include an insulation layer on that is on a substrate on which a plurality of lower conductive structures are formed, where the insulation layer has an opening. A barrier layer is on a sidewall and a bottom of the opening of the insulation layer, where the... Agent: Myers Bigel Sibley & Sajovec

20100181673 - Method for fabricating semiconductor device and semiconductor device: A method for fabricating a semiconductor device, includes forming a dielectric film above a substrate; forming an opening in the dielectric film; forming a first film containing a metal whose energy for forming silicide thereof is lower than that of Cu silicide inside the opening; forming a second film that... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100181672 - Method of fabricating semiconductor device for reducing parasitic capacitance between bit lines and semiconductor device fabricated thereby: In a method of fabricating a semiconductor device capable of reducing parasitic capacitance between bit lines and a semiconductor device fabricated by the method, the semiconductor device includes a semiconductor substrate having buried contact landing pads and direct contact landing pads. A lower interlayer insulating layer is disposed on the... Agent: Mills & Onello LLP

20100181674 - Electrical contacts for cmos devices and iii-v devices formed on a silicon substrate: A semiconductor structure having a substrate, a seed layer over the substrate; a silicon layer disposed on the seed layer; a transistor device in the silicon layer; a III-V device disposed on the seed layer; and a plurality of electrical contacts, each one of the electrical contacts having a layer... Agent: Raytheon Company C/o Daly, Crowley, Mofford & Durkee, LLP

20100181675 - Semiconductor package with wedge bonded chip: A semiconductor package with wedge bonded chip. One embodiment provides a semiconductor chip, a wire bond and a metal element. The chip includes a bond pad with a copper layer. The wire bond is wedge bonded to the bond pad and ball bonded to the metal element.... Agent: Dicke, Billig & Czaja

20100181676 - Substrate bonding with metal germanium silicon material: A method that in one embodiment is useful in bonding a first substrate to a second substrate includes forming a layer including metal over the first substrate. The layer including metal in one embodiment surrounds a semiconductor device, which can be a micro electromechanical system (MEMS) device. On the second... Agent: Freescale Semiconductor, Inc. Law Department

20100181679 - 3d integration of vertical components in reconstituted substrates: A reconstituted electronic device including: a first face and a second face; a plurality of individual chips placed perpendicular to the faces, each individual chip carrying, on one of its surfaces, at least one component, tracks, and a connection mechanism that are flush with one or other of the faces... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100181681 - Semiconductor device and manufacturing method of the same: With a recent shrinking semiconductor process, insulating layers formed between interconnect layers are becoming thin. To avoid parasitic capacitance between them, materials of a low dielectric constant have been used for an insulating layer in a multilevel interconnect. Low-k materials, however, have low strength compared with the conventional insulating layers.... Agent: Miles & Stockbridge PC

20100181680 - Semiconductor device and manufacturing method of the semiconductor device: A semiconductor device includes: a mounted body in which a wiring pattern is formed on a first main surface; a semiconductor chip mounted on the surface of the mounted body on which the wiring pattern is formed; an underfill material which is filled between the mounted body and the semiconductor... Agent: Sonnenschein Nath & Rosenthal LLP

20100181677 - Structure with self aligned resist layer on an insulating surface and method of making same: A structure is provided with a self-aligned resist layer on an insulator surface and non-lithographic method of fabricating the same. The non-lithographic method includes applying a resist on a structure comprising at least one of interconnects formed in an insulator material. The method further comprises exposing the resist to energy... Agent: Roberts Mlotkowski Safran & Cole, P.c Intellectual Property Department

20100181678 - Structure with self aligned resist layer on an interconnect surface and method of making same: A structure is provided with a self-aligned resist layer on a surface of metal interconnects for use in forming air gaps in an insulator material and method of fabricating the same. The non-lithographic method includes applying a resist on a structure comprising at least one metal interconnect formed in an... Agent: Roberts Mlotkowski Safran & Cole, P.c Intellectual Property Department

20100181684 - Resin composition, filling material, insulating layer and semiconductor device: A resin composition of the present invention is used for forming a filling material which fills at least a through-hole of a semiconductor substrate, the through-hole extending through the semiconductor substrate in a thickness direction thereof and having a conductive portion therein. The resin composition is composed of: a resin... Agent: Smith, Gambrell & Russell

20100181682 - Semiconductor device and manufacturing method thereof: A method of manufacturing a semiconductor device, includes forming an insulating film of a material having a low relative dielectric constant on a substrate, forming an SiOCH film on the insulating film in a chamber, forming an SiO2 film continuously on the SiOCH film by reducing a carbon concentration therein... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100181683 - Via definition for semiconductor die: A semiconductor die includes a first set of metal lines and a second set of metal lines. The first set of metal lines and the second set of metal lines are placed in alternate planes and are orthogonal to each other. A via is used to connect a first metal... Agent: Onda Techno Intl. Patent Attys.

20100181685 - Integrated clock and power distribution: An integrated clock and power distribution network in a semiconductor device includes assigning a first tile to a location on a placement grid corresponding to a top metal layer. An orientation is assigned to the first tile relative to the top metal layer placement grid. The first tile is placed... Agent: Osha Liang LLP/oracle

20100181686 - Semiconductor device: A semiconductor device 1 is equipped with a first substrate 3 on which a first semiconductor chip 2 is mounted, a second substrate 5 on which a second semiconductor chip 4 is mounted, and connecting sections 6 that electrically connect the first substrate 3 and the second substrate 5. The... Agent: Smith, Gambrell & Russell

20100181687 - Semiconductor device including single circuit element: A semiconductor device includes a chip. The chip includes a single circuit element formed in a semiconductor substrate, a first metal layer on a first face of the semiconductor substrate, and a second metal layer on a second face of the semiconductor substrate opposite the first face. The first metal... Agent: Dicke, Billig & Czaja

20100181688 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a semiconductor chip, and an encapsulation resin which covers and encapsulates the semiconductor chip, the semiconductor chip having a recess formed in the surficial portion thereof; the recess having, on the deeper side than a predetermined portion thereof, a portion having a larger width than the... Agent: Foley And Lardner LLP Suite 500

20100176364 - Electronic device, and method of manufacturing an electronic device: An electronic device (100), the electronic device (100) comprising a substrate (101), a convertible structure (102) arranged on and/or in the substrate (101), being convertible between at least two states by heating and having different electrical properties in different ones of the at least two states, wherein the convertible structure... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100176362 - Polysilicon plug bipolar transistor for phase change memory: Memory devices and methods for manufacturing are described herein. A memory device described herein includes a plurality of memory cells. Memory cells in the plurality of memory cells comprise respective bipolar junction transistors and memory elements. The bipolar junction transistors are arranged in a common collector configuration and include an... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20100176363 - Variable resistance element and semiconductor device provided with the same: A variable resistance element includes: a first electrode; a variable resistance material layer formed on the first electrode; and a second electrode formed on this variable resistance material layer. The variable resistance material layer is made of an uncrystallized material including a transition metal oxide, which is an oxide of... Agent: Mr. Jackson Chen

20100176365 - Resistance variable memory devices and methods of fabricating the same: A resistance variable memory device includes at least one bottom electrode, a first insulating layer containing a trench which exposes the at least one bottom electrode, and a resistance variable material layer including respective first and second portions located on opposite sidewalls of the trench, respectively, where the first and... Agent: Volentine & Whitt PLLC

20100176367 - Memory cell having dielectric memory element: Some embodiments include apparatus and methods having a memory cell with a first electrode, a second electrode, and a dielectric located between the first and second electrodes. The dielectric may be configured to allow the memory cell to form a conductive path in the dielectric from a portion of a... Agent: Schwegman, Lundberg & Woessner/micron

20100176366 - Nonvolatile memory cell including carbon storage element formed on a silicide layer: A nonvolatile memory cell includes a storage element, the storage element comprising a carbon material, a steering element located in series with the storage element, and a metal silicide layer located adjacent to the carbon material. A method of making a device includes forming a metal silicide over a silicon... Agent: Sandisk Corporation C/o Foley & Lardner LLP

20100176368 - Method of manufacturing semiconductor memory device, and semiconductor memory device: A method of manufacturing semiconductor memory device comprises forming a first wiring layer and a memory cell layer above a semiconductor substrate; forming a plurality of first trenches extending in a first direction in the first wiring layer and the memory cell layer, thereby forming first wirings and separating the... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100176373 - Fabrication method of nitride semiconductor light emitting device and nitride semiconductor light emitting device thereby: A method for fabricating a nitride semiconductor light emitting device, and a nitride semiconductor light emitting device fabricated thereby are provided. The method includes: forming a first conductive nitride semiconductor layer on a substrate; forming an active layer on the first conductive nitride semiconductor layer; forming a second conductive nitride... Agent: Birch Stewart Kolasch & Birch

20100176370 - Light-emitting device and method for manufacturing the same: A light-emitting device includes an n-type silicon thin film (2), a silicon thin film (3), and a p-type silicon thin film (4). The silicon thin film (3) is formed on the n-type silicon thin film (2) and the p-type silicon thin film (4) is formed on the silicon thin film... Agent: Foley & Lardner LLP

20100176372 - Nitride semiconductor light emitting diode: A nitride semiconductor light emitting diode (LED) is disclosed. The nitride semiconductor LED can include an active layer formed between an n-type nitride layer and a p-type nitride layer, where the active layer includes two or more quantum well layers and quantum barrier layers formed in alternation, and the quantum... Agent: Mcdermott Will & Emery LLP

20100176371 - Semiconductor diodes fabricated by aspect ratio trapping with coalesced films: A photonic device comprises a substrate and a dielectric material including two or more openings that expose a portion of the substrate, the two or more openings each having an aspect ratio of at least 1. A bottom diode material comprising a compound semiconductor material that is lattice mismatched to... Agent: Slater & Matsil, L.L.P.

20100176369 - Metalized silicon substrate for indium gallium nitride light-emitting diodes: A light emitting diode having a metallized silicon substrate including a silicon base, a buffer layer disposed on the silicon base, a metal layer disposed on the buffer layer, and light emitting layers disposed on the metal layer. The buffer layer can be AlN, and the metal layer ZrN. The... Agent: Bose Mckinney & Evans LLP

20100176375 - Diode-based devices and methods for making the same: In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an... Agent: Slater & Matsil, L.L.P.

20100176374 - Nitride semiconductor device: A nitride semiconductor device according to an aspect of the invention may include: first and second conductive nitride semiconductor layers; and an active layer having a DH structure located between the first and second conductive nitride semiconductor layers, and including a single quantum well structure active layer having the single... Agent: Mcdermott Will & Emery LLP

20100176376 - Copolymer and polymer light emitting device using the same: (wherein, Y is —O—, —S— or —C(═O)—. Ar1 represents an aryl group optionally having a substituent or a monovalent heterocyclic group optionally having a substituent, and there is no substituent connected to atoms of the ring of Ar1, the atoms being adjacent an atom of Ar1 connected to a nitrogen... Agent: Sughrue Mion, PLLC

20100176390 - Electroluminescent efficiency: An organic light emitting device is provided. The device has an anode, a cathode, and an emissive layer disposed between the anode and the cathode. The emissive layer further includes a molecule of Formula I (shown below) wherein an alkyl substituent at position R′5 results in high efficiency and operational... Agent: Kenyon & Kenyon LLP

20100176378 - Fabrication method for organic light emitting device and organic light emitting device fabricated by the same method: The present invention relates to a method for producing an organic light emitting device, comprising a step of sequentially forming on a substrate a first electrode formed of a metal, one or more organic material layers including a light emitting layer, and a second electrode, which comprises a step of... Agent: Mckenna Long & Aldridge LLP

20100176386 - Luminescent metal complexes for organic electronic devices: The present invention relates to auxiliary ligands for luminescent metal complexes, particularly emitter complexes having such auxiliary ligands, and particularly light-emitting devices, and particularly organic light-emitting devices (OLED) having metal complexes, which have the auxiliary ligands according to the invention.... Agent: Connolly Bove Lodge & Hutz, LLP

20100176391 - Organic el element and a method for manufacturing the organic el element: A dense cathode electrode layer having a step coverage is to be formed on an electron injection layer. The electron injection layer in which fine particles of an electron injection material is dispersed in an organic thin film having an electron transport property is formed by vapor co-depositing the electron... Agent: Kratz, Quintos & Hanson, LLP

20100176385 - Organic functional device and manufacturing method therefor: An organic functional device (1; 40; 50) comprising a substrate (2) having a first electrode layer (3) and at least a first substrate shunt structure (6), at least a first organic functional layer (7) provided on top of the first electrode layer (3), a second, transparent electrode layer (8) arranged... Agent: Philips Intellectual Property & Standards

20100176389 - Organic light emitting diode and method of manufacturing the same: Provided are an organic light emitting diode and a method of manufacturing the same. The organic light emitting diode adjusts an optical resonance thickness and prevents spectrum distortions without use of an auxiliary layer. The organic light emitting diode includes a first electrode that is optically reflective; a second electrode... Agent: Stein Mcewen, LLP

20100176382 - Organic light emitting diode display: An organic light emitting diode display device constructed with an organic light emitting element including a first electrode, an organic emission layer, and a second electrode sequentially laminated together, a transmittance control layer formed on the organic light emitting element, a selective reflective layer formed on the transmittance control layer,... Agent: Robert E. Bushnell & Law Firm

20100176383 - Organic light emitting display device and method of manufacturing the same: Disclosed is an organic light emitting display device and a method of manufacturing the same. The organic light emitting display device includes the thin film transistor of the drive unit that has the activation layer formed in a structure where the first oxide semiconductor layer and the second oxide semiconductor... Agent: Robert E. Bushnell & Law Firm

20100176384 - Organic luminescence transistor device and manufacturing method thereof: The invention is an organic luminescence transistor device including: a substrate; an assistance electrode layer provided on a side of an upper surface of the substrate; an insulation film provided on a side of an upper surface of the assistance electrode layer; a first electrode provided locally on a side... Agent: Oliff & Berridge, PLC

20100176380 - Organic photoelectric device and material used therein: The present invention relates to an organic photoelectric device and a material used therein. The organic photoelectric device includes a substrate, an anode disposed on the substrate, a hole transport layer (HTL) disposed on the anode, an emission layer disposed on the hole transport layer (HTL), and a cathode disposed... Agent: Lee & Morse, P.C.

20100176387 - Organic thin-film transistor and method for manufacturing the same: An organic thin-film transistor of the present invention has a gate electrode, a gate insulating film, a source electrode, a drain electrode, and an organic semiconductor layer provided above a substrate, and further has a thiol compound layer composed of a benzenethiol compound and provided on a surface of the... Agent: Birch Stewart Kolasch & Birch

20100176377 - Polymeric compound and polymeric electroluminescence element using the same:

20100176379 - Self-aligned organic thin film transistor and fabrication method thereof: The present invention relates to a self-aligned organic thin film transistor (TFT) and a fabrication method thereof. According to the present invention, a gate electrode is formed from a first conductive layer patterned on a substrate, a gate dielectric layer is formed on top of the substrate to cover the... Agent: Holme Roberts & Owen LLP

20100176381 - Semiconductor device and display device: It is an object to provide a display device in which an operational characteristic in a bottom gate type organic semiconductor thin film transistor can be maintained to a stable characteristic without receiving an influence of an electrode provided on an upper layer thereof, and a display with a high... Agent: Sonnenschein Nath & Rosenthal LLP

20100176388 - Thin film transistor, method of manufacturing the same and flat panel display device having the same: A thin film transistor which has a compound semiconductor including oxygen as an activation layer, a method of manufacturing the thin film transistor, and a flat panel display device having the thin film transistor, of which the thin film transistor comprises: a gate electrode formed on a substrate; an activation... Agent: Stein Mcewen, LLP

20100176395 - Cmos thin film transistor, method of fabricating the same and organic light emitting display device having the same: A CMOS thin film transistor arrangement including a PMOS poly-silicon thin film transistor having a top gate configuration and a NMOS oxide thin film transistor having an inverted staggered bottom gate configuration where both transistors share the same gate electrode. The shared gate electrode is used as a doping or... Agent: Robert E. Bushnell & Law Firm

20100176393 - Oxide semiconductor and thin film transistor including the same: Provided are an oxide semiconductor and a thin film transistor including the oxide semiconductor. The oxide semiconductor may be formed of indium (In) oxide and hafnium (Hf) and may be a channel material of the thin film transistor.... Agent: Harness, Dickey & Pierce, P.L.C

20100176394 - Thin film transistor and flat panel display device having the same: An oxide semiconductor thin film transistor and a flat panel display device incorporating the same oxide semiconductor thin film transistor. The thin film transistor includes a gate electrode formed on the substrate, a gate insulating layer formed on the substrate and covering the gate electrode, an oxide semiconductor layer formed... Agent: Robert E. Bushnell & Law Firm

20100176392 - Thin film transistor and method of manufacturing the same: A TFT includes a substrate, a source electrode and a drain electrode on the substrate, the source and drain electrodes separated from each other, an active layer on the substrate between the source electrode and the drain electrode, a cladding unit on side surfaces of the source electrode and the... Agent: Lee & Morse, P.C.

20100176396 - Probe, probe card, and method of production of probe: A probe comprises: a beam part having a Si layer composed of monocrystalline silicon; an interconnect part provided along the longitudinal direction of the beam part on one main surface of the beam part; a contact part provided at a front end part of the interconnect part and to be... Agent: Greenblum & Bernstein, P.L.C

20100176398 - Electronic device improved in heat radiation performance for heat generated from active element: An electronic device of the present invention includes a first substrate provided with a thin film active element, having a thickness of 200 μm or lower, and a second substrate formed with a high thermal conductivity portion. The second substrate is applied to one surface of the two surfaces of... Agent: Scully Scott Murphy & Presser, PC

20100176397 - Method for producing partial soi structures comprising zones connecting a superficial layer and a substrate:

20100176399 - Back-channel-etch type thin-film transistor, semiconductor device and manufacturing methods thereof: A back-channel-etch type TFT includes a gate electrode, an SiN film that is formed on the gate electrode, and an SiO film that is formed and patterned on the SiN film. The TFT further includes an polycrystalline semiconductor film that is formed and patterned on the SiO film in contact... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100176400 - Display device and electronic apparatus: A display device includes: a pixel array unit having pixels including a circuit configuration, in which a first electrode of an electro-optical element and a source electrode of a driving transistor are connected together, a gate electrode of the driving transistor and a source electrode or a drain electrode of... Agent: Rader Fishman & Grauer PLLC

20100176401 - X-ray detector and manufacturing method of the same: An X-ray detector includes a gate wire formed on a substrate, the gate wire including a gate line, a gate electrode, and a gate pad, a gate insulating layer formed on the gate wire, a data wire formed on the gate insulating layer, the data wire including a data line... Agent: F. Chau & Associates, LLC

20100176402 - Thin film transistor substrate, electronic apparatus, and methods for fabricating the same: A TFT substrate includes a substrate and at least a TFT disposed thereon. The TFT includes a semiconductor island and at least a gate. The semiconductor island has a source region, a drain region, and a channel region interposed therebetween. The semiconductor island has sub-grain boundaries. The gate corresponds to... Agent: Jianq Chyun Intellectual Property Office

20100176403 - Silicon carbide substrate, epitaxial wafer and manufacturing method of silicon carbide substrate: An SiC substrate includes the steps of preparing a base substrate having a main surface and made of SiC, washing the main surface using a first alkaline solution, and washing the main surface using a second alkaline solution after the step of washing with the first alkaline solution. The SiC... Agent: Drinker Biddle & Reath (dc)

20100176405 - Light emitting diode lighting package with improved heat sink: Improved lighting packages are described for light emitting diode (LED) lighting solutions having a wide variety of applications which seek to balance criteria such as heat dissipation, brightness, and color uniformity. The present approach includes a backing of thermally conductive material. The backing includes a cell structure. The cell structure... Agent: Priest & Goldstein PLLC

20100176404 - Method for fabricating high-power light-emitting diode arrays: One embodiment of the present invention provides a method for fabricating a high-power light-emitting diode (LED). The method includes etching grooves on a growth substrate, thereby forming mesas on the growth substrate. The method further includes fabricating indium gallium aluminum nitride (InGaAlN)-based LED multilayer structures on the mesas on the... Agent: Park, Vaughan & Fleming LLP

20100176406 - Nitride semiconductor light emitting device and method of manufacturing the same: A nitride semiconductor light emitting device is provided. The nitride semiconductor light emitting device includes a first nitride layer comprising at least N-type nitride layer. An insulating member is formed on the first nitride layer having a predetermined pattern. An active layer is formed in both sides of the insulating... Agent: Birch Stewart Kolasch & Birch

20100176411 - Fluorescent-lamp-type led lighting device: To provide a fluorescent-lamp-type LED lighting device that has a large amount of light intensity and that can replace a highly efficient existing lighting device, the fluorescent-lamp-type LED lighting device comprises an LED (3) comprising a thin plate-like semiconductor element body (31) that transmits light generated in a PN junction... Agent: Alleman Hall Mccoy Russell & Tuttle LLP

20100176416 - Light emitting device and method of manufacturing the same: A light emitting device and a method of manufacturing the same are disclosed. The light emitting device includes a buffer layer formed on a substrate, a nitride semiconductor layer including a first semiconductor layer, an active layer, and a second semiconductor layer, which are sequentially stacked on the buffer layer,... Agent: Birch Stewart Kolasch & Birch

20100176415 - Light emitting device with improved light extraction efficiency: A light emitting device having a high degree of light extraction efficiency includes a substrate, and a light emitting structure disposed on one surface of the substrate, the substrate having an internal reformed region where the index of refraction differs from the remainder the substrate. The ratio of the depth... Agent: Volentine & Whitt PLLC

20100176413 - Light-emitting diode device including a multi-functional layer: A light-emitting diode device includes: a substrate; a light-emitting layered structure formed on the substrate; a multi-functional layer having a first main portion and formed on the light-emitting layered structure for spreading current laterally and for reflecting light emitted from the light-emitting layered structure; and first and second electrodes electrically... Agent: Marsh, Fischmann & Breyfogle LLP

20100176408 - Light-emitting diode with high lighting efficiency: The invention discloses a light-emitting diode, including a substrate, a first conductive type semiconductor layer, a second conductive type semiconductor layer, a light-emitting layer and plural laminated structures. The first conductive type semiconductor layer, the light-emitting layer and the second conductive type semiconductor layer are formed on the substrate in... Agent: Birch Stewart Kolasch & Birch

20100176407 - Method for manufacturing light emitting diode package and package structure thereof: The present invention relates to a method for forming a package structure for a light emitting diode (LED) and the LED package structure thereof. By employing the same sawing process to cut through the trenches of the leadframe, the package units are singulated and different lead portions are simultaneously separated... Agent: J C Patents

20100176412 - Organic el device and method of manufacturing the same: An organic EL device includes an insulative film, a first pixel electrode and a second pixel electrode which are disposed on the insulative film, a first light emission layer which is commonly disposed above the first pixel electrode and the second pixel electrode, a second light emission layer which is... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100176414 - Packaging structure of light-emitting components: The present invention provides a packaging structure of light-emitting components, comprising at least a light-emitting component, at least a connection wire, a base, at least a reflection surface, and an insulator, and characterized in that: the light-emitting component produces a light source and corresponding heat energy; the connection wire is... Agent: Rosenberg, Klein & Lee

20100176410 - Semiconductor light emitting device: A wiring electrode is provided on a mount substrate. A light emitting element is provided on the wiring electrode to connect electrically with the wiring electrode and is configured to emit a blue to ultraviolet light. A reflective film is provided above the light emitting element to cover the light... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100176409 - White or ultraviolet leds containing a getter system: LEDs (30) are described containing a getter system comprising a getter material (13) and a metallic part (10), in which the getter material is optically shielded from the metallic part.... Agent: Steinfl & Bruno

20100176417 - Light emitting diode package structure and method for fabricating the same: A light emitting diode and method for fabricating the same are provided. The light emitting diode comprises a lead frame. A first material body is formed on the lead frame, wherein the first material body comprises a tip, an inner surface and an outer surface. A second material body is... Agent: Quintero Law Office, PC

20100176418 - Gallium nitride-based compound semiconductor light emitting device: The inventive gallium nitride-based compound semiconductor light emitting device comprises a substrate and a gallium nitride-based compound semiconductor layer stacked on the substrate, wherein on at least one lateral surface of the light emitting device, the bottom (substrate side) of the semiconductor layer is a reverse taper inclined 5 to... Agent: Sughrue Mion, PLLC

20100176419 - Light-emitting diode with high lighting efficiency: The invention discloses a light-emitting diode. In an embodiment, the light-emitting diode includes a substrate, a first doping type semiconductor layer, a second doping type semiconductor layer, a light-emitting layer and plural laminated structures. The first doping type semiconductor layer, the light-emitting layer and the second doping type semiconductor layer... Agent: Birch Stewart Kolasch & Birch

20100176420 - Mesa heterojunction phototransistor and method for making same: A two-terminal mesa phototransistor and a method for making it are disclosed. The photo transistor has a mesa structure having a substantially planar semiconductor surface. In the mesa structure is a first semiconductor region of a first doping type, and a second semiconductor region of a second doping type opposite... Agent: Volpe And Koenig, P.C.

20100176421 - Damascene contacts on iii-v cmos devices: A method for manufacturing a III-V CMOS device is disclosed. The device includes a first and second main contact and a control contact. In one aspect, the method includes providing the control contact by using damascene processing. The method thus allows obtaining a control contact with a length of between... Agent: Knobbe Martens Olson & Bear LLP

20100176422 - Semiconductor memory device and manufacturing method thereof: A semiconductor memory device includes a semiconductor substrate; a memory cell array on the semiconductor substrate, the memory cell array comprising a plurality of memory cells capable of electrically storing data; a sense amplifier configured to detect the data stored in at least one of the memory cells; a cell... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100176423 - Solid-state image sensor and method for producing the same: A floating diffusion (331) is created substantially at center of the light-receiving surface of an embedded photodiode (31), with a gate electrode of a transfer transistor (32) surrounding the floating diffusion. The concentration (or depth) of impurities in a p+-type semiconductor region, n-type semiconductor region or p-well region is changed... Agent: Sughrue Mion, PLLC

20100176424 - Doping of semiconductor fin devices: A semiconductor structure includes of a plurality of semiconductor fins overlying an insulator layer, a gate dielectric overlying a portion of said semiconductor fin, and a gate electrode overlying the gate dielectric. Each of the semiconductor fins has a top surface, a first sidewall surface, and a second sidewall surface.... Agent: Slater & Matsil, L.L.P.

20100176426 - Transistor and method of manufacturing the same: A method of manufacturing a transistor (300), the method comprising forming a gate (101) on a substrate (102), forming a spacer (201) on lateral side walls of the gate (101) and on an adjacent portion (202) of the substrate (102), modifying material of the spacer (201) so that the modified... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100176425 - Transistor with wire source and drain: m

20100176427 - Hardmask manufacture in ferroelectric capacitors: A method of manufacturing a semiconductor device. The method comprises fabricating a ferroelectric capacitor. The capacitor's fabrication includes forming conductive and ferroelectric material layers on a semiconductor substrate, forming a hardmask layer on the conductive and ferroelectric material layers, forming an organic bottom antireflective coating layer on the hardmask layer,... Agent: Texas Instruments Incorporated

20100176429 - Mram with storage layer and super-paramagnetic sensing layer: An MRAM is disclosed that has a MTJ comprised of a ferromagnetic layer with a magnetization direction along a first axis, a super-paramagnetic (SP) free layer, and an insulating layer formed therebetween. The SP free layer has a remnant magnetization that is substantially zero in the absence of an external... Agent: Saile Ackerman LLC

20100176428 - Spin field effect logic devices: Provided are spin field effect logic devices, the logic devices including: a gate electrode; a channel formed of a magnetic material above the gate electrode to selectively transmit spin-polarized electrons; a source on the channel; and a drain and an output electrode on the channel outputting electrons transmitted from the... Agent: Harness, Dickey & Pierce, P.L.C

20100176430 - Semiconductor device with reduced parasitic inductance: The present invention provides a technology for reducing the parasitic inductance of the main circuit of a power source unit. In a non-insulated DC-DC converter having a circuit in which a power MOSFET for high side switch and a power MOSFET for low side switch are connected in series, the... Agent: Townsend And Townsend And Crew, LLP

20100176431 - Capacitor insulating film, capacitor, and semiconductor device: A capacitor insulating film for use as an insulating film sandwiched between two electrodes is made of a crystal containing a hafnium element in a titanium site in place of a part of titanium elements contained in a crystal of a strontium titanate or barium strontium titanate.... Agent: Young & Thompson

20100176432 - Memory cells, methods of forming dielectric materials, and methods of forming memory cells: Some embodiments include memory cells. The memory cells may include a tunnel dielectric material, a charge-retaining region over the tunnel dielectric material, crystalline ultra-high k dielectric material over the charge-retaining region, and a control gate material over the crystalline ultra-high k dielectric material. Additionally, the memory cells may include an... Agent: Wells St. John P.s.

20100176433 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a pair of select gate structures which are opposed to each other and which are formed in a select transistor formation area, each of the select gate structures including a gate insulating film formed on a semiconductor substrate and a gate electrode formed on the gate... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100176434 - Data storage structure, memory device and process for fabricating memory device: A memory device is described, including a substrate, data storage structures over the substrate, control gates over the data storage structures, and a dielectric layer between the data storage structures and the control gates, wherein each data storage structure includes a lower part and an upper part narrower than the... Agent: J C Patents

20100176436 - Memory devices: A memory device is provided. The memory device includes a first control gate, a second control gate, a plurality of first charge storage elements, a plurality of second charge storage elements and a semiconductor. The plurality of first charge storage elements is beside the first control gate, and each of... Agent: Jianq Chyun Intellectual Property Office

20100176435 - Semiconductor memory device and manufacturing method therefor: First gate electrodes of memory cell transistors are formed in series with each other on a semiconductor substrate. A second gate electrode of a first selection transistor is formed adjacent to one end of the first electrodes. A third gate electrode of a second selection transistor is formed adjacent to... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100176438 - Depletion-mode charge-trapping flash device: A memory device includes a plurality of semiconductor lines, such as body-tied fins, on a substrate. The lines including buried-channel regions doped for depletion mode operation. A storage structure lies on the plurality of lines, including tunnel insulating layer on the channel regions of the fins, a charge storage layer... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20100176437 - Memory array and method for manufacturing and operating the same: The invention provides a memory array. The memory array comprises a substrate, a plurality of word lines, a charge trapping structure, a plurality of trench channels and a plurality of bit lines. The word lines are located over the substrate and the word lines are parallel to each other. The... Agent: J C Patents

20100176439 - Non-volatile semiconductor memory device and method of manufacturing the same: The charge retention characteristics of a non-volatile memory, particularly, a MONOS-type non-volatile memory is improved. In a non-volatile memory cell including a tunnel silicon oxide film (107), a silicon nitride film (104) serving as a charge storage film, a silicon oxide film (105), and a gate electrode (108) which are... Agent: Miles & Stockbridge PC

20100176440 - Semiconductor device and method for manufacturing same: A semiconductor device includes: a first layer; a second layer; a columnar structural unit; and a side portion. The second layer is provided on a major surface of the first layer. The columnar structural unit is conductive and aligned in the first layer and the second layer to pass through... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100176441 - Semiconductor memory device and manufacturing method therefor: In a nonvolatile semiconductor memory device of the method which enables a single cell to store more than or equal to 2-bit information, it is possible to prevent wire failure and ensure high operation reliability. The nonvolatile semiconductor memory device 200 includes a trench 203 having a round wall portion... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100176442 - Structures containing titanium silicon oxide: A dielectric containing a titanium silicon oxide film disposed in an integrated circuit and a method of fabricating such a dielectric provide a dielectric for use in a variety of electronic devices. Embodiments include a dielectric containing a titanium silicon oxide film arranged as one or more monolayers. Embodiments include... Agent: Schwegman, Lundberg & Woessner/micron

20100176443 - Semiconductor device: Provided is a semiconductor device in which on-resistance is largely reduced. In a region (2a) of an N type epitaxial layer (2) of the semiconductor device 20, each region between neighboring trenches (3) is blocked with a depletion layer (14) formed around a trench (3) so that a current passage... Agent: Fish & Richardson P.C.

20100176444 - Power mosfet and method of fabricating the same: A power MOSFET including a substrate of first conductivity type, an epitaxial layer of first conductivity type on the substrate, a body layer of second conductivity type in the epitaxial layer, a first insulating layer, a second insulating layer, a first conductive layer and two source regions of first conductivity... Agent: Jianq Chyun Intellectual Property Office

20100176445 - Metal schemes of trench mosfet for copper bonding: A trench MOSFET with improved metal schemes is disclosed. The improved contact structure applies a buffer layer to minimize the bonding damage to semiconductor when bonding copper wire upon front source and gate metal without additional cost.... Agent: Bacon & Thomas, PLLC

20100176448 - Intergrated trench mosfet with trench schottky rectifier: An integrated circuit comprising trench MOSFET having trenched source-body contacts and trench Schottky rectifier having trenched anode contacts is disclosed. By employing the trenched contacts in trench MOSFET and trench Schottky rectifier, the integrated circuit is able to be shrunk to achieve low specific on-resistance for trench MOSFET, and low... Agent: Bacon & Thomas, PLLC

20100176446 - Mosfet with source contact in trench and integrated schottky diode: A trench semiconductor power device with integrated Schottky diode is disclosed. P+ regions and n+ source regions are alternately arranged in mesa and on top of trench sidewall along stripe source-body contact area between two adjacent trenches. By employing this structure, cell density increased remarkably without increasing contact resistance because... Agent: Bacon & Thomas, PLLC

20100176447 - Semiconductor device: Provided is a semiconductor device in which on-resistance is largely reduced. The semiconductor device includes an n type epitaxial layer (2) in which each region between neighboring trenches (3) becomes a channel (9), and a plurality of embedded electrodes (5) each of which is formed on an inner surface of... Agent: Fish & Richardson P.C.

20100176449 - Semiconductor device and method for manufacturing same: A semiconductor device, includes: a semiconductor layer including a first semiconductor region of a first conductivity type and a second semiconductor region of the first conductivity type, the second semiconductor region having a first conductivity type impurity concentration lower than a first conductivity type impurity concentration of the first semiconductor... Agent: Turocy & Watson, LLP

20100176450 - Structure and method of forming a transistor with asymmetric channel and source/drain regions: A semiconductor structure is described. The structure includes a semiconductor substrate having a conductive gate abutting a gate insulator for controlling conduction of a channel region; and a source region and a drain region associated with the conductive gate, where the source region includes a first material and the drain... Agent: International Business Machines Corporation Dept. 18g

20100176451 - Semiconductor: A memory device includes an insulation layer, an active pattern, a gate insulation layer and a gate electrode. The insulation layer is formed on a substrate. The active pattern is formed on the insulation layer, and includes two protrusions and a recess between the protrusions. The active pattern includes a... Agent: F. Chau & Associates, LLC

20100176452 - Lateral drain mosfet with improved clamping voltage control: A lateral MOSFET having a substrate, first and second epitaxial layers grown on the substrate and a gate electrode formed on a gate dielectric which in turn is formed on a top surface of the second epitaxial layer. The second epitaxial layer comprises a drain region which extends to a... Agent: Hiscock & Barclay, LLP

20100176453 - Low cost fabrication of double box back gate silicon-on-insulator wafers with built-in shallow trench isolation in back gate layer: A semiconductor wafer structure for manufacturing integrated circuit devices includes a bulk substrate; a lower insulating layer formed on the bulk substrate, the lower insulating layer formed from a pair of separate insulation layers having a bonding interface therebetween; an electrically conductive layer formed on the lower insulating layer, the... Agent: Cantor Colburn LLP-ibm Yorktown

20100176456 - Semiconductor device and method for manufacturing the same: A semiconductor device includes a semiconductor substrate including a P-type semiconductor region, and an N channel MOSFET formed in the P-type semiconductor region, the N channel MOSFET including an insulating film of silicon oxide film or silicon oxynitride film formed on the semiconductor substrate, a gate insulating film including hafnium... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100176454 - Semiconductor device and method of manufacture: A method is provided of manufacturing a semiconductor device comprising a first, n-type field effect transistor (1) and a second, p-type field effect transistor (2). The method comprises depositing a gate dielectric layer over a substrate; depositing a gate metal layer (22) over the gate dielectric layer, depositing a solid... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100176457 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a first insulated-gate field-effect transistor which is disposed on a semiconductor substrate having an element formation plane in a (110) plane direction, and which has a channel length direction in a <−110> direction, a second insulated-gate field-effect transistor which is disposed on the semiconductor substrate, has... Agent: Turocy & Watson, LLP

20100176455 - Semiconductor device having insulated gate field effect transistors and method of fabricating the same: A CMOSFET is composed of a P-channel MOSFET and an N-channel MOSFET formed on a silicon substrate. The P-channel MOSFET is formed a first gate insulating film, a first hafnium layer and a first gate electrode which are stacked on the silicon substrate. The N-channel MOSFET is formed a second... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100176458 - Semiconductor device and method of manufacturing the same: A gate insulating film is formed on a main surface of a substrate in which an element isolation region is formed. A metal film is formed on the gate insulating film. A silicon film is formed on the metal film. A gate electrode of a MIS transistor composed of a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100176459 - Assembly of nanoscaled field effect transistors: The present invention relates to vertical nanowire transistors with a wrap-gated geometry. The threshold voltage of the vertical nanowire transistors is controlled by the diameter of the nanowire, the doping of the nanowire, the introduction of segments of heterostructures in the nanowire, the doping in shell-structures surrounding the nanowire, tailoring... Agent: Foley And Lardner LLP Suite 500

20100176460 - Semiconductor device and method of fabricating the same: A semiconductor device according to one embodiment includes: a semiconductor substrate having first and second regions; a first transistor comprising a first gate insulating film and a first gate electrode thereon in the first region on the semiconductor substrate, the first gate insulating film comprising a first interface layer containing... Agent: Turocy & Watson, LLP

20100176462 - Method of simultaneously siliciding a polysilicon gate and source/drain of a semiconductor device, and related device: A method of simultaneously siliciding a polysilicon gate and source/drain of a semiconductor device, and related device. At least some of the illustrative embodiments are methods comprising forming a gate stack over a semiconductor substrate (the gate stack comprising a first polysilicon layer, a first nitride layer, and a second... Agent: Texas Instruments Incorporated

20100176461 - Semiconductor device and method for manufacturing the same: A method for easily manufacturing a semiconductor device in which variation in thickness or disconnection of a source electrode or a drain electrode is prevented is proposed. A semiconductor device includes a semiconductor layer formed over an insulating substrate; a first insulating layer formed over the semiconductor layer; a gate... Agent: Nixon Peabody, LLP

20100176463 - Semiconductor device and manufacturing method of the same: In order to provide a technique capable of executing an etching process using a dry etching method and a wet etching method in combination with high processing dimensional accuracy, an interlayer insulating film 13, an etching stopper film 14, interlayer insulating films 15 and 18 and a surface protection film... Agent: Mattingly & Malur, P.C.

20100176464 - Sensor die structure: A sensor is implemented in an integrated circuit. The sensor includes one or more sensor pads that are provided at or near a surface of the integrated circuit. One or more integrated circuit components such as a sense amplifier are provided in the integrated circuit die adjacent the sensor pads.... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20100176465 - Method of epitaxially growing piezoresistors: A method of forming a device with a piezoresistor is disclosed herein. In one embodiment, the method includes providing a substrate, etching a trench in the substrate to form a vertical wall, growing a piezoresistor layer epitaxially on the vertical wall, and separating the vertical wall from an underlying layer... Agent: Maginot, Moore & Beck, LLP Chase Tower

20100176466 - Semiconductor device and method of making the same: A semiconductor device includes a sensor member and a cap member. The sensor member has a surface and includes a first sensing section. The first sensing section includes first and second portions that are located on the surface side of the sensor member and electrically insulated from each other. The... Agent: Posz Law Group, PLC

20100176467 - Semiconductor package: A semiconductor package includes a chip base material; a capacitor formed on the base material; and a cover formed over the base material to cover the capacitor, and having a side portion and an upper portion. The base material is provided with a bonding pattern connecting the base material and... Agent: Mcdermott Will & Emery LLP

20100176468 - Microelectromechanical apparatus and method for producing the same: A microelectromechanical apparatus (X) includes a microelectromechanical component (10), an insulating substrate (21), a through via (22c) disposed in the insulating substrate (21), a sealing member (30) and a conductive connecting member (40). The microelectromechanical device (10) has a semiconductor substrate (11), a microelectromechanical system (12) and an electrode (13)... Agent: Hogan Lovells US LLP

20100176469 - Micromechanical component and method for producing a micromechanical component: A micromechanical component includes a substrate that has a front side and a backside, the front side having a functional pattern, which functional pattern is electrically contacted to the backside in a contact region. The substrate has at least one contact hole in the contact region, which extends into the... Agent: Kenyon & Kenyon LLP

20100176471 - Magnetic element with storage layer materials: According to an embodiment of the invention, a magnetic tunnel junction (MTJ) element includes a reference ferromagnetic layer, a storage ferromagnetic layer, and an insulating layer. The storage ferromagnetic layer includes a CoFeB sub-layer coupled to a CoFe sub-layer and/or a NiFe sub-layer through a non-magnetic sub-layer. The insulating layer... Agent: Qualcomm Incorporated

20100176472 - Nonvolatile magnetic memory device: A nonvolatile magnetic memory device having a magnetoresistance-effect element includes: (A) a laminated structure having a recording layer in which an axis of easy magnetization is oriented in a perpendicular direction; (B) a first wiring line electrically connected to a lower part of the laminated structure; and (C) a second... Agent: Sonnenschein Nath & Rosenthal LLP

20100176470 - Novel free layer/capping layer for high performance mram mtj: An MTJ MRAM cell and its method of formation are described. The cell includes a composite free layer having the general form (Ni88Fe12)1-xCo100x—Ni92Fe8 with x between 0.05 and 0.1 that provides low magnetization and negative magnetostriction. The magnetostriction can be tuned to a low value by a multilayer capping layer... Agent: Saile Ackerman LLC

20100176474 - Back-lit image sensor and method of manufacture: A backside-illuminated image sensor includes photoelectric converters disposed in a front-side of a substrate and arranged to define pixels, back-side interlayer dielectric patterns disposed on the back-side of the substrate over the photoelectric converters, color filters arranged over the back-side interlayer dielectric patterns, and micro-lenses arranged over the color filters,... Agent: Volentine & Whitt PLLC

20100176473 - Imaging photodetection device: An imaging photodetection device includes a plurality of photodetectors (6) arrayed on a substrate (5) one-dimensionally or two-dimensionally, a low refractive index transparent layer (12) formed above the plural photodetectors, and a plurality of columnar or plate-like high refractive index transparent sections (13) embedded in the low refractive index transparent... Agent: Hamre, Schumann, Mueller & Larson P.C.

20100176475 - Optical device and method for fabricating the same: An optical device according to an aspect of the present invention includes: a semiconductor substrate layer including a plurality of elements; at least one optical component which is formed at the first principal surface side of the semiconductor substrate layer and transmits incident light of desired wavelength; and an interconnect... Agent: Greenblum & Bernstein, P.L.C

20100176476 - Optical device, solid-state imaging device, and method: An optical device including: an optical element including a light-receiving unit as a part of a top surface; a transparent member deposited on the optical element to cover the light-receiving unit; and a sealant formed to seal around the transparent member. The transparent member includes: a first protrusion formed in... Agent: Greenblum & Bernstein, P.L.C

20100176477 - Negative feedback avalanche diode: A single-photon avalanche detector is disclosed that is operable at wavelengths greater than 1000 nm and at operating speeds greater than 10 MHz. The single-photon avalanche detector comprises a thin-film resistor and avalanche photodiode that are monolithically integrated such that little or no additional capacitance is associated with the addition... Agent: Demont & Breyer, LLC

20100176478 - Semiconductor device and method for manufacturing the same: Provided are a novel method and a novel structure for bringing a Ge or SiGe compound and a metal into ohmic contact with each other. A semiconductor device is provided with a portion composed of only i) Ge or SiGe compound, ii) a metal, and iii) an insulator or a... Agent: Christensen, O'connor, Johnson, Kindness, PLLC

20100176479 - Method of fabricating a semiconductor device: A method of fabricating a semiconductor device including depositing a hardmask layer on a layer of the semiconductor device, selectively etching a pattern of continuous lines in the hardmask layer, depositing an antireflective coating over remaining portions of the hardmask layer, depositing a photoresist layer on the antireflective coating, patterning... Agent: Dicke, Billig & Czaja

20100176480 - Semiconductor device, method for manufacturing the same, and multilayer substrate having the same: A method for manufacturing a semiconductor device includes: preparing a wafer formed of a SOI substrate; forming a circuit portion in a principal surface portion; removing a support substrate of the SOI substrate; fixing an insulation member on a backside of a semiconductor layer so as to be opposite to... Agent: Posz Law Group, PLC

20100176482 - Low cost fabrication of double box back gate silicon-on-insulator wafers with subsequent self aligned shallow trench isolation: A semiconductor substrate structure for manufacturing integrated circuit devices includes a bulk substrate; a lower insulating layer formed on the bulk substrate, the lower insulating layer formed from a pair of separate insulation layers having a bonding interface therebetween; an electrically conductive layer formed on the lower insulating layer; an... Agent: Cantor Colburn LLP-ibm Yorktown

20100176481 - Memory device and manufacturing method thereof: A memory device and a manufacturing method thereof are provided. The manufacturing method of memory device includes the following steps. Firstly, a substrate having a substrate surface is provided. Next, at least two memory units separated via a space are formed on the substrate. Then, an insulating layer covering the... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100176483 - Fuse element and semiconductor integrated circuit with the same: A fuse element according to the present invention and a semiconductor integrated circuit with the fuse element include interconnects and a via connected to a region for connecting the interconnects. A first angle between a first side surface of the via and the connect region is smaller than a second... Agent: Young & Thompson

20100176484 - Esd protection device, composite electronic component of the same, manufacturing method of composite substrate, and manufacturing method of esd protection device: The present invention provides an ESD protection device and the like having improved durability against repeated use. The ESD protection device includes a base 2 having an insulating surface 2a, electrodes 3a and 3b disposed on the insulating surface 2a and facing but spaced apart from each other, and a... Agent: Oliff & Berridge, PLC

20100176485 - storage capacitor having an increased aperture ratio and method of manufacturing the same: Disclosed is a method of manufacturing a storage capacitor having increased aperture ratio: providing a substrate having a metal layer disposed thereon, and said metal layer is covered correspondingly with a first dielectric layer and a second dielectric layer in sequence; forming a photoresist layer with a uniform thickness to... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100176487 - Electronic component with reactive barrier and hermetic passivation layer: An electronic component is provided on a substrate. A thin-film capacitor is attached to the substrate, the thin-film capacitor includes a pyrochlore or perovskite dielectric layer between a plurality of electrode layers, the electrode layers being formed from a conductive thin-film material. A reactive barrier layer is deposited over the... Agent: Paratek Docket

20100176486 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a memory cell region and a peripheral circuit region. The memory cell region includes a first region and a second region surrounding the first region. The first region includes a plurality of first electrodes, a plurality of first support portions, and a second support portion. The... Agent: Mcginn Intellectual Property Law Group, PLLC

20100176488 - Semiconductor memory device and method for manufacturing same: A semiconductor memory device includes a word line interconnect layer having a plurality of word lines extending in a word line direction and a bit line interconnect layer having a plurality of bit lines extending in a bit line direction alternately stacked on a silicon substrate. A variable resistance film... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100176489 - Microelectromechanical systems structures and self-aligned harpss fabrication processes for producing same: Disclosed are one-port and two-port microelectromechanical structures including variable capacitors, switches, and filter devices. High aspect-ratio micromachining is used to implement low-voltage, large value tunable and fixed capacitors, and the like. Tunable capacitors can move in the plane of the substrate by the application of DC voltages and achieve greater... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100176490 - Methods of forming relaxed layers of semiconductor materials, semiconductor structures, devices and engineered substrates including same: Methods of fabricating relaxed layers of semiconductor materials include forming structures of a semiconductor material overlying a layer of a compliant material, and subsequently altering a viscosity of the compliant material to reduce strain within the semiconductor material. The compliant material may be reflowed during deposition of a second layer... Agent: Traskbritt, P.C.

20100176491 - Epitaxially coated silicon wafer and method for producing epitaxially coated silicon wafers: Silicon wafers polished on their front sides are individually placed on a susceptor in an epitaxy reactor and firstly pretreated under a hydrogen atmosphere, and secondly with addition of an etching medium with a flow rate of 1.5-5 slm to the hydrogen atmosphere, the hydrogen flow rate being 1-100 slm... Agent: Brooks Kushman P.C.

20100176492 - Method for forming a pattern on a semiconductor using an organic hard mask: A composition for the organic hard mask includes a polyamic acid compound, and a method for forming a pattern is used in a manufacturing process of semiconductor devices by coating the composition for organic hard mask film on an underlying layer, and depositing a second hard mask film with a... Agent: Marshall, Gerstein & Borun LLP

20100176493 - Method of splitting a substrate: A process for splitting a semiconductor substrate having an identification notch on its periphery, by creating a weakened zone in the substrate by implanting atomic species into the substrate while the substrate is held in place on a portion of its periphery during the implanting; and splitting the substrate along... Agent: Winston & Strawn LLP Patent Department

20100176494 - Through-silicon via with low-k dielectric liner: A semiconductor substrate having a through-silicon via with an air gap interposed between the through-silicon via and the semiconductor substrate is provided. An opening is formed partially through the semiconductor substrate. The opening is first lined with a first liner and then the opening is filled with a conductive material.... Agent: Slater & Matsil, L.L.P.

20100176495 - Low cost fabrication of double box back gate silicon-on-insulator wafers: A semiconductor wafer structure for integrated circuit devices includes a bulk substrate; a lower insulating layer formed on the bulk substrate; an electrically conductive layer formed on the lower insulating layer; an upper insulating layer formed on the electrically conductive layer, the upper insulating layer formed from a pair of... Agent: Cantor Colburn LLP-ibm Yorktown

20100176496 - Material for forming exposure light-blocking film, multilayer interconnection structure and manufacturing method thereof, and semiconductor device: (where R1, R2 and R3 may be the same or different, at least one of R1, R2 and R3 represents a hydrogen atom and the others represent any one of an alkyl group, alkenyl group, cycloalkyl group and aryl group which are optionally substituted, and n is an integer of... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100176497 - Integrated circuit package-on-package stacking system: An integrated circuit package-on-package stacking system includes a leadframe interposer including: a leadframe having a lead; a molded base on a portion of the lead for only supporting the lead; and the leadframe interposer singulated from the leadframe, wherein the lead is bent to support a stack-up height.... Agent: Law Offices Of Mikio Ishimaru

20100176498 - Power module package having excellent heat sink emission capability and method for manufacturing the same: A power module package includes a power circuit element, a control circuit element, a lead frame, an aluminum oxide substrate having a heat sink and an insulation layer, and a sealing resin. The control circuit element is electrically connected with the power circuit element to control chips within the power... Agent: Hiscock & Barclay, LLP

20100176500 - Semiconductor device: A semiconductor device includes a plurality of electrodes formed on a semiconductor chip, and a plurality of wires each connecting each of the electrodes to an inner lead, and each having a plurality of bending points. A first wire of the plurality of the wires has a slope extending upwardly... Agent: Mcdermott Will & Emery LLP

20100176499 - Semiconductor device with lead frame having lead terminals with wide portions of trapezoidal cross section: A semiconductor device in which a semiconductor chip, a lead frame and metal wires for electrically connecting the lead frame are sealed with sealing resin. The lead frame has a plurality of lead terminal portions, a supporting portion for supporting the semiconductor chip, and hanging lead portions supporting the supporting... Agent: Rabin & Berdo, PC

20100176501 - Method and apparatus for stacked die package with insulated wire bonds: A semiconductor package has a substrate with a plurality of contact pads. A first semiconductor die is mounted to the substrate. First bond wires are formed between each of the center-row contact pads of the first semiconductor die and the substrate contact pads. The first bond wires include an electrically... Agent: Robert D. Atkins

20100176502 - Wafer level vertical diode package structure and method for making the same: A wafer level vertical diode package structure includes a first semiconductor layer, a second semiconductor layer, an insulative unit, a first conductive structure, and a second conductive structure. The second semiconductor layer is connected with one surface of the first semiconductor layer. The insulative unit is disposed around a lateral... Agent: Rosenberg, Klein & Lee

20100176505 - Power semiconductor module and fabrication method thereof: An elastic printed board is provided so that stress applied by the silicon gel is absorbed by the printed board. Further, the printed board is formed to be so narrow that the stress can escape. On the other hand, the wires on which a high voltage is applied are patterned... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100176504 - Semiconductor device: A semiconductor device including: a semiconductor member having thereon a plurality of interconnect pads: and a mounting member having a plurality of electrode terminals electrically and mechanically connected to the respective interconnect pads for mounting the semiconductor chip on the mounting member, the electrode terminals forming a plurality of I/O... Agent: Scully Scott Murphy & Presser, PC

20100176503 - Semiconductor package system with thermal die bonding: A semiconductor package system includes providing a substrate having a plurality of thermal vias extending through the substrate. A solder mask is positioned over the plurality of thermal vias. A plurality of thermally conductive bumps is formed on at least some of the plurality of thermal vias using the solder... Agent: Law Offices Of Mikio Ishimaru

20100176507 - Semiconductor-based submount with electrically conductive feed-throughs: A submount for a micro-component includes a semiconductor substrate having a cavity defined in a front-side of the substrate in which to mount the micro-component. The submount also includes a thin silicon membrane portion at a bottom of the cavity and thicker frame portions adjacent to sidewalls of the cavity.... Agent: Fish & Richardson P.C.

20100176506 - Thermoelectric 3d cooling: The invention comprises a 3D chip stack with an intervening thermoelectric coupling (TEC) plate. Through silicon vias in the 3D chip stack transfer electronic signals among the chips in the 3D stack, power the TEC plate, as well as distribute heat in the stack from hotter chips to cooler chips.... Agent: International Business Machines Corporation Dept. 18g

20100176508 - Semiconductor device package and method of assembly thereof: A semiconductor die package includes: an assembly including a semiconductor die, a clip structure attached to an upper surface of the semiconductor die, and a heat sink attached to an upper surface of the clip structure; and a molding material partially encapsulating the assembly, wherein an upper surface of the... Agent: Texas Instruments Incorporated

20100176510 - Fusible i/o interconnection systems and methods for flip-chip packaging involving substrate-mounted stud bumps: A semiconductor device has a semiconductor die with bond pads formed on a surface of the semiconductor die. A UBM is formed over the bond pads of the semiconductor die. A fusible layer is formed over the UBM. The fusible layer can be tin or tin alloy. A substrate has... Agent: Robert D. Atkins

20100176509 - Semiconductor device and method of fabricating the same: A semiconductor device includes: a mount body; a semiconductor chip mounted on the mount body via projecting connecting terminals; and a filling resin filled between the mount body and the semiconductor chip to seal the connecting terminals, the filling resin being retained inside the semiconductor chip in such a way... Agent: Robert J. Depke Lewis T. Steadman

20100176511 - Semiconductor device with a line and method of fabrication thereof: A semiconductor device includes an interlayer insulation film, an underlying line provided in the interlayer insulation film, a liner film overlying the interlayer insulation film, an interlayer insulation film overlying the liner film. The underlying line has a lower hole and the liner film and the interlayer insulation film have... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100176512 - Structure and method for back end of the line integration: An improved semiconductor structure consists of interconnects in an upper interconnect level connected to interconnects in a lower interconnect level through use of a conductive protrusion located at the bottom of a via opening in an upper interconnect level, the conductive protrusion extends upward from bottom of the via opening... Agent: International Business Machines Corporation Dept. 18g

20100176513 - Structure and method of forming metal interconnect structures in ultra low-k dielectrics: A metal interconnect structure in ultra low-k dielectrics is described having a capped interconnect layer; an interconnect feature with a contact via and a contact line formed in a dielectric layer, where the via is partially embedded into the interconnect layer; and a thin film formed on the dielectric layer... Agent: International Business Machines Corporation Dept. 18g

20100176514 - Interconnect with recessed dielectric adjacent a noble metal cap: The invention comprises a copper interconnect structure that includes a noble metal cap with dielectric immediately adjacent the copper/noble metal cap interface recessed from the noble metal cap.... Agent: International Business Machines Corporation Dept. 18g

20100176515 - Contact pad supporting structure and integrated circuit: The invention provides a contact pad supporting structure. The contact pad supporting structure includes an underlying first conductive plate and an overlying second conductive plate, wherein the first and second conductive plates are separated by a first dielectric layer. A plurality of circular ring-shaped via plug groups comprising a plurality... Agent: Quintero Law Office, PC

20100176516 - Substrate having optional circuits and structure of flip chip bonding: The present invention relates to a substrate having optional circuits and a structure of flip chip bonding. The substrate includes a substrate body, at least one substrate pad, a first conductive trace and a second conductive trace. The substrate body has a surface. The substrate pad is disposed on the... Agent: Mccracken & Frank LLP

20100176517 - Electronic device: Differences in contraction forces of a sealing resin can be alleviated and strain on a package can be reduced even when electronic components are unevenly positioned on a substrate. An electronic device (100) includes a substrate 102, electronic components (104, 108) mounted on one face of the substrate 102, and... Agent: Mcginn Intellectual Property Law Group, PLLC

20100171089 - Dielectric layers and memory cells including metal-doped alumina: A method of forming (and an apparatus for forming) a metal-doped aluminum oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process.... Agent: Mueting, Raasch & Gebhardt, P.A.

20100171086 - Integrated circuit memory with single crystal silicon on silicide driver and manufacturing method: A memory device includes a diode driver and a data storage element, such as an element comprising phase change memory material, and in which the diode driver comprises a silicide element on a silicon substrate with a single crystal silicon node on the silicide element. The silicide element separates the... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20100171088 - Resistance variable memory device with sputtered metal-chalcogenide region and method of fabrication: A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a chalcogenide glass region is provided with a plurality of alternating tin chalcogenide and metal layers proximate thereto. The method of forming the device comprises sputtering the alternating tin chalcogenide and metal layers.... Agent: Dickstein Shapiro LLP

20100171087 - Semiconductor device and process for producing the same: In a semiconductor device including a phase change memory element whose memory layer is formed of a phase change material of M (additive element)-Ge (germanium)-Sb (antimony)-Te (tellurium), both of high heat resistance and stable data retention property are achieved. The memory layer has a fine structure with a different composition... Agent: Mattingly & Malur, P.C.

20100171090 - Semiconductor phase-change memory device: A semiconductor phase-change memory device comprises a data line disposed on a semiconductor substrate and a data storage structure disposed under the data line and having a concave portion extending in a direction along the data line. A data contact structure is configured to contact the data storage structure, and... Agent: Mills & Onello LLP

20100171091 - Memory array for increased bit density and method of forming the same: A memory array having a plurality of resistance variable memory units and method for forming the same are provided. Each memory unit includes a first electrode, a resistance variable material over the first electrode, and a first second-electrode over the resistance variable material. The first second-electrode is associated with the... Agent: Dickstein Shapiro LLP

20100171092 - Method for controlling optic interband transition of carbon nanotubes, the carbon nanotubes resulting therefrom and devices that comprise the carbon nanotubes: A new single optical interband transition occurs at the corresponding p-doping state of the carbon nanotubes in the VIS-NIR region when the degree of p-doping of carbon nanotubes is increased beyond a certain degree. P-doped carbon nanotubes to exhibit the new single optical interband transition in the VIS-NIR region may... Agent: Cantor Colburn, LLP

20100171093 - Controlled growth of a nanostructure on a substrate, and electron emission devices based on the same: The present invention provides for an array of nanostructures grown on a conducting substrate. The array of nanostructures as provided herein is suitable for manufacturing electronic devices such as an electron beam writer, and a field emission device.... Agent: Fish & Richardson P.C.

20100171094 - Light-emitting semiconductor apparatus: A light-emitting semiconductor apparatus includes a light-emitting structure, a reflective structure, and a carrier. The light-emitting structure includes a first type semiconductor layer, a second type semiconductor layer, and a light-emitting layer positioned between the first type semiconductor layer and the second type semiconductor layer. The reflective structure has a... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100171096 - Segmented nanowires displaying locally controllable properties: Vapor-liquid-solid growth of nanowires is tailored to achieve complex one-dimensional material geometries using phase diagrams determined for nanoscale materials. Segmented one-dimensional nanowires having constant composition display locally variable electronic band structures that are determined by the diameter of the nanowires. The unique electrical and optical properties of the segmented nanowires... Agent: Brookhaven Science Associates/ Brookhaven National Laboratory

20100171095 - Super sensitive uv detector using polymer functionalized nanobelts: An ultraviolet light sensor includes an elongated metal oxide nanostructure, a layer of an ultraviolet light-absorbing polymer, a current source and a current detector. The elongated metal oxide nanostructure has a first end and an opposite second end. The layer of an ultraviolet light-absorbing polymer is disposed about at least... Agent: Bryan W. Bockhop, Esq. Bockhop & Associates, LLC

20100171097 - Detection device and method for manufacturing the same: A method for manufacturing a detection device includes the steps of providing bonding bumps on at least one of a light-receiving element array and a read-out circuit multiplexer, fixing a bump height adjusting member for adjusting the heights of the bumps to the light-receiving element array and/or the read-out circuit... Agent: Venable LLP

20100171098 - Pressure detection apparatus, josephson device, and superconducting quantum interference device that include superconductor thin film that undergoes transition from superconductor to insulator by pressure: A pressure detection apparatus (30) detects, among a plurality of superconductor thin films (11 to 14) having different critical pressures at which a transition from a superconductor to an insulator occurs, the superconductor thin films (12 to 14) that have undergone the transition to the insulator with ammeters (242, 252,... Agent: Foley & Lardner LLP

20100171099 - Carbon nanotube transistor structure: A carbon nanotube transistor structure includes a number of carbon nanotubes extending vertically in a substrate material. A drain electrode of the transistor is connected to the carbon nanotubes at a first depth position, and a source electrode for the transistor structure connected to the carbon nanotubes at a second... Agent: Aka Chan LLP

20100171103 - Ferro-electric device and modulatable injection barrier: Described is a modulatable injection barrier and a semiconductor element comprising same. More particularly, the invention relates to a two-terminal, non-volatile programmable resistor. Such a resistor can be applied in non-volatile memory devices, and as an active switch e.g. in displays. The device comprises, in between electrode layers, a storage... Agent: Leydig Voit & Mayer, Ltd

20100171102 - Fluorine-containing polycyclic aromatic compound, fluorine-containing polymer, organic thin film and organic thin film device: wherein in formula (I), Ar1 and Ar2 each independently represent an aromatic hydrocarbon group having at least six carbon atoms or a heterocyclic group having at least four carbon atoms; R1, R2, R3 and R4 each independently represent a hydrogen atom, a halogen atom, or a monovalent group; R5 and... Agent: Sughrue Mion, PLLC

20100171112 - Light-emitting element, light-emitting device and an electronic device: The present invention provides a light-emitting element including an electron-transporting layer and a hole-transporting layer between a first electrode and a second electrode; and a first layer and a second layer between the electron-transporting layer and the hole-transporting layer, wherein the first layer includes a first organic compound and an... Agent: Cook Alex Ltd

20100171113 - Light-emitting material comprising orthometalated iridium complex, light-emitting device, high efficiency red light-emitting device, and novel iridium complex: e

20100171110 - Method for manufacturing semiconductor device and semiconductor device: Method for manufacturing a semiconductor device, which may include (a) forming a coating film on a substrate by applying a coating liquid including a polymer conductive material dissolved in an insulating solvent on the substrate after the step (a); (b) heat-treating the coating film; and (c) forming, before or after... Agent: Cantor Colburn, LLP

20100171114 - Method of forming a crossed wire molecular device including a self-assembled molecular layer: A method of forming a crossed wire molecule device comprising a plurality of bottom electrodes, a plurality of top electrodes crossing the bottom electrodes at a non-zero angle, and a self-assembled molecular film chemically bonded to a surface of each of the bottom electrodes is provided. The self-assembled molecular film... Agent: Hewlett-packard Company Intellectual Property Administration

20100171109 - Organic el device: An organic EL device includes: an anode for injecting holes; a phosphorescent-emitting layer; a fluorescent-emitting layer; and a cathode for injecting electrons. The phosphorescent-emitting layer contains a phosphorescent host and a phosphorescent dopant for phosphorescent emission. The fluorescent-emitting layer contains a fluorescent host and a fluorescent dopant for fluorescent emission.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100171104 - Organic electroluminescence device and display using the device: An organic EL device comprising an anode, a cathode, and an organic layer composed of at least two layers including a hole transporting layer and a light emitting layer, wherein at least one of the anode and the cathode is transparent or semitransparent, the organic layer, is disposed in contact... Agent: Sughrue Mion, PLLC

20100171115 - Organic electroluminescence display and method of producing same: There is provided an organic electroluminescence display includes a lower electrode formed on a substrate, a device separation film formed on the lower electrode, an organic compound layer formed on the device separation film and including a light emission layer, and an upper electrode formed on the organic compound layer,... Agent: Fitzpatrick Cella Harper & Scinto

20100171111 - Organic electroluminescent device: L represents a divalent linking group, Q1 and Q2 each independently represents an aromatic or aliphatic heterocycle coordinated to Pt through a nitrogen atom, X1 represents a 6-membered ring containing one or more nitrogen atoms, Q1, Q2, and X1 each independently may have a substituent, X2 represents a sulfur atom,... Agent: Sughrue-265550

20100171101 - Organic electroluminescent element, method of manufacturing organic electroluminescent element, lighting device, and display device: An objective in the present invention is to provide an organic EL element exhibiting high emission efficiency and long lifetime, together with a lighting device and a display device thereof. In the present invention, disclosed is an organic electroluminescent element comprising a support substrate provided thereon an anode and a... Agent: Cantor Colburn, LLP

20100171105 - Organic light emitting diode display: An organic light emitting diode display includes a substrate, a thin film transistor on the substrate and including a gate electrode, a source electrode, and a drain electrode, a planarization layer on the thin film transistor and having a contact hole exposing a portion of one of the drain electrode... Agent: Christie, Parker & Hale, LLP

20100171106 - Organic light emitting diode display: An organic light emitting diode display including: a substrate; a plurality of pixel electrodes formed on the substrate; a pixel defining layer formed on the substrate, having openings exposing the pixel electrodes; a plurality of spacers disposed on the pixel defining layer; organic emission layers formed on the pixel electrodes;... Agent: Stein Mcewen, LLP

20100171107 - Organic light emitting diode display: An organic light emitting diode display including: a substrate; pixel electrodes formed on the substrate; a pixel defining layer having openings exposing the plurality of pixel electrodes, formed on the substrate; spacers formed on the pixel defining layer; organic emission layers formed on the pixel electrodes; a common electrode formed... Agent: Stein Mcewen, LLP

20100171116 - Organic metal complexs derivative and organic light emitting device using the same: The present invention relates to an organometallic complex derivative containing both 8-hydroxy-2-methylquinolato ligand and another ligand containing either Deutrium or Fluorine. The compound can be used for an organic material layer of an organic electronic device or an organic light emitting device.... Agent: Mckenna Long & Aldridge LLP

20100171100 - Polymeric material and polymeric luminescent element: A luminescent or charge-transporting polymer which has in the backbone optionally substituted fluorenediyl groups as repeating units and further has a functional side chain comprising at least one functional group selected from the group consisting of a hole-injection/transporting group containing one or more heteroatoms other than nitrogen or two or... Agent: Sughrue Mion, PLLC

20100171108 - Use of n,n'-bis(1,1-dihydroperfluoro-c3-c5-alkyl)-perylene-3,4:9,10- tetracarboxylic diimides: The present invention relates to the use of N,N′-bis(1,1-dihydroperfluoro-C3-C5-alkyl)perylene-3,4:9,10-tetracarboxylic diimides as charge transport materials or exciton transport materials.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100171117 - Semiconductor device and method for manufacturing the same, and electric device: It is an object of the present invention to simplify steps needed to process a wiring in forming a multilayer wiring. In addition, when a droplet discharging technique or a nanoimprint technique is used to form a wiring in a contact hole having a comparatively long diameter, the wiring in... Agent: Nixon Peabody, LLP

20100171118 - Junction field-effect transistor having insulator-isolated source/drain regions and fabrication method therefor: Junction field-effect transistors (JFETs) having insulator-isolated source/drain regions and fabrication methods therefor are disclosed here. In SOI JFETs and bulk silicon JFETs having junction isolated source and drain regions from the body region, the junction leakage current is one of the leakage components of the off-state leakage current and consequently... Agent: Perkins Coie LLP

20100171119 - Stacked photoelectric conversion device: A stacked photoelectric conversion device of the present invention comprises a first photoelectric conversion layer, a second photoelectric conversion layer and a third photoelectric conversion layer stacked in this order from a light entrance side, each photoelectric conversion layer having a p-i-n junction and formed of a silicon based semiconductor,... Agent: Nixon & Vanderhye, PC

20100171120 - Display and method for manufacturing display: In the case of forming switching elements and light sensor elements over the same substrate, an increase in the film thickness of active layers in an attempt to enhance the sensitivity of the light sensor elements would adversely affect the characteristics of the switching elements (TFTs). In a configuration of... Agent: Sonnenschein Nath & Rosenthal LLP

20100171121 - Thin film array panel and manufacturing method thereof: A thin film array panel is provided, which includes: a plurality of signal lines including contact parts for contact with an external device; a plurality of thin film transistors connected to the signal lines; an insulating layer formed on the signal lines and the thin film transistors; and a plurality... Agent: Cantor Colburn, LLP

20100171122 - Photoelectric conversion device, electro-optic device, and electronic device: The photoelectric conversion device includes: a photoelectric conversion element in which a first electrode, a photoelectric conversion layer, and a second electrode are stacked in this order; and a thin film transistor (TFT) connected to the first electrode of the photoelectric conversion element via a contact hole, wherein the photoelectric... Agent: Oliff & Berridge, PLC

20100171123 - Display apparatus and manufacturing method thereof: A display apparatus includes a gate electrode, a first insulating layer pattern formed over the gate electrode, a second insulating layer pattern formed over the first insulating layer pattern, exposing a portion of the first insulating layer, a semiconductor film pattern formed over the second insulating layer pattern and over... Agent: Innovation Counsel LLP

20100171126 - In situ dopant implantation and growth of a ill-nitride semiconductor body: In one embodiment a method enabling in situ dopant implantation during growth of a III-nitride semiconductor body, comprises establishing a growth environment for the III-nitride semiconductor body in a composite III-nitride chamber having a dopant implanter and a growth chamber, growing the III-nitride semiconductor body in the growth chamber, and... Agent: Farjami & Farjami LLP

20100171124 - Low-defect density gallium nitride semiconductor structures and fabrication methods: A low-defect gallium nitride structure including a first gallium nitride layer comprising a plurality of gallium nitride columns etched into the first gallium nitride layer and a first dislocation density; and a second gallium nitride layer that extends over the gallium nitride columns and comprises a second dislocation density, wherein... Agent: U S Army Research Laboratory Attn: Rdrl-loc-i

20100171125 - Thin film light emitting diode: Light emitting LEDs devices comprised of LED chips that emit light at a first wavelength, and a thin film layer over the LED chip that changes the color of the emitted light. For example, a blue LED chip can be used to produce white light. The thin film layer beneficially... Agent: Mckenna Long & Aldridge LLP

20100171127 - Optically coupled device and method of manufacturing the same: An optically coupled device includes a light emitting element and a light receiving element which are electrically isolated from each other, and an optical waveguide allowing therethrough transmission of light from the light emitting element to the light receiving element, wherein the optical waveguide is covered with an encapsulation resin... Agent: Young & Thompson

20100171128 - Photodetector and display device provided with the same: Provided are a photodetector capable of suppressing variations in the output characteristics among photodiodes, and a display device provided with the photodetector. A display device in use has an active matrix substrate (20) including a transparency base substrate (2), a plurality of active elements and a photodetector. The photodetector includes... Agent: Nixon & Vanderhye, PC

20100171129 - Active matrix substrate, electrophoretic display apparatus, and electronic device: An active matrix substrate includes a substrate; a plurality of data lines provided on the substrate; a plurality of scanning lines provided to cross the data lines on the substrate when seen in a plan view; a thin film transistor that is electrically connected to one of the plurality of... Agent: Advantedge Law Group, LLC

20100171130 - Semiconductor device and fabrication method: A semiconductor device comprising a plurality of regions of semiconductor material forming a junction at an interface there-between, the junction including a depletion region having a width which varies spatially in at least one direction along the depletion region. Without limitation, the spatial variation in depletion region width is provided... Agent: Nixon & Vanderhye, PC

20100171131 - Electro-optical device and electronic apparatus: An electro-optical device includes a first light shielding film; a transistor element formed on the first light shielding film to overlap the first light shielding film; a second light shielding film formed on the transistor element to overlap the transistor element and electrically connected to an input terminal of the... Agent: Workman Nydegger 1000 Eagle Gate Tower

20100171132 - Light emitting device and method for fabricating the same: A light-emitting device is provided. The light-emitting device comprises a light-emitting layer having a first quaternary clad layer with a first material having a first composition ratio and a second material having a second composition ratio, a second quaternary clad layer with a third material having a third composition ratio... Agent: Husch Blackwell Sanders LLP

20100171133 - Capsular micro light-emitting device and method for manufacturing the same: The present invention provides a capsular micro light-emitting device and a method for manufacturing the same. The capsular micro light-emitting device includes a light emitting part having at least a light emitting layer 13 and constituting one pixel, a capsular encapsulation layer 17 for individually encapsulating the light emitting part,... Agent: Sughrue Mion, PLLC

20100171139 - Light emitting device: a first lead including a recess in one end portion, the recess including a first bottom surface with the light emitting element bonded thereto, at least one of a through hole and a notch, and a light shielding portion capable of suppressing leakage of emitted light from the light emitting... Agent: Turocy & Watson, LLP

20100171138 - Light emitting device and electronic device: Thinned and highly reliable light emitting elements are provided. Further, light emitting devices in which light emitting elements are formed over flexible substrates are manufactured with high yield. One light emitting device includes a flexible substrate, a light emitting element formed over the flexible substrate, and a resin film covering... Agent: Cook Alex Ltd

20100171137 - Light emitting device and layered light emitting device: A light emitting device includes a support part, a first cladding layer formed above the support part, an active layer formed above the first cladding layer, a second cladding layer formed above the active layer, and a reflective part formed above the support part and separated from the active layer.... Agent: Harness, Dickey & Pierce, P.L.C

20100171136 - Light emitting diode and method of fabricating the same: The present invention provides a method of fabricating a light emitting diode, which comprises the steps of forming a compound semiconductor layer on a substrate, the compound semiconductor layer including a lower semiconductor layer, an active layer and an upper semiconductor layer; and scratching a surface of the substrate by... Agent: H.c. Park & Associates, PLC

20100171134 - Optical converter and manufacturing method thereof and light emitting diode: The present invention relates to an optical converter and a manufacturing method thereof and a light emitting diode. An optical converter for a light emitting diode includes two substrates, in which, a annular first cavity wall is arranged between the two substrates, and an airtight space filled with an optical... Agent: Wolf Greenfield & Sacks, P.C.

20100171135 - Optoelectronic semiconductor body and method for producing the same: The invention relates to an opto-electronic semiconductor body having a semiconductor layer sequence (2) comprising an active layer (23) suitable for generating electromagnetic radiation and a first and a second electrical connection layer (4, 6), wherein the semiconductor body is intended for the emission of electromagnetic radiation from a front... Agent: Slater & Matsil, L.L.P.

20100171140 - Semiconductor light emitting device: There is provided a semiconductor light emitting device that minimizes reflection or absorption of emitted light, maximizes luminous efficiency with the maximum light emitting area, enables uniform current spreading with a small area electrode, and enables mass production with high reliability and high quality. A semiconductor light emitting device according... Agent: Mcdermott Will & Emery LLP

20100171141 - Semiconductor light emitting device: A semiconductor light emitting device includes a silicon substrate, a p-type semiconductor layer provided on the silicon substrate, a n-type semiconductor layer provided on the silicon substrate, the n-type semiconductor layer adjoining the p-type semiconductor layer, and a light emitting section formed at a p-n homojunction between the p-type semiconductor... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100171142 - Embedding type solder point-free combination structure of led beads with substrate or lamp body: This invention relates to an embedding type solder point-free combination structure of LED beads with substrate or lamp body, in which the LED chip is packaged on the embedded heat conductive socket to form embedding type LED beads without soldering for electric conduction, and the embedding type LED beads are... Agent: Rosenberg, Klein & Lee

20100171145 - Led package methods and systems: Methods and systems are provided for LED modules that include an LED die integrated in an LED package with a submount that includes an electronic component for controlling the light emitted by the LED die. The electronic component integrated in the s submount may include drive hardware, a network interface,... Agent: Philips Intellectual Property & Standards

20100171144 - Light emitting device package and manufacturing method thereof: Provided is a light emitting device package. The light emitting device package comprises a housing, first and second lead frames, and a light emitting device. The housing comprises a front opening and side openings. The first and second lead frames pass through the housing to extend to an outside. A... Agent: Birch Stewart Kolasch & Birch

20100171143 - Light emitting diode package: There is provided an LED package having high heat dissipation efficiency. An LED package according to an aspect of the invention may include: a package body including a first groove portion being recessed into the package body and provided as a mounting area on the top of the package body;... Agent: Mcdermott Will & Emery LLP

20100171147 - Method of manufacturing organic electroluminescent device and organic electroluminescent device: An organic electroluminescent device, which, on a substrate, has a plurality of first electrodes, and a second electrode opposing the plurality of first electrodes. The organic electroluminescent device also including a light-emitting functional layer between the second electrode and one of the first electrodes and a buffering layer that covers... Agent: Oliff & Berridge, PLC

20100171146 - Optical semiconductor-sealing composition: The present invention provides an optical semiconductor encapsulating composition comprising (A) an epoxy compound, (B) a carboxylic anhydride curing agent, (C) a curing accelerator, and (D) surface-coated silica particles having an average particle diameter of 5 to 50 nm in which 0.2 to 3 mmol of a silane coupling agent... Agent: Birch Stewart Kolasch & Birch

20100171148 - Semiconductor devices: A device comprises a first sub-collector formed in an upper portion of a substrate and a lower portion of a first epitaxial layer and a second sub-collector formed in an upper portion of the first epitaxial layer and a lower portion of a second epitaxial layer. The device further comprises... Agent: Roberts Mlotkowski Safran & Cole, P.C. Intellectual Property Department

20100171149 - Symmetrical bi-directional semiconductor esd protection device: A 2-terminal (i.e., anode, cathode) symmetrical bidirectional semiconductor electrostatic discharge (ESD) protection device is disclosed. The symmetrical bidirectional semiconductor ESD protection device design comprises a first and second shallow wells symmetrically spaced apart from a central floating well. Respective shallow wells comprise a first and second highly doped contact implant... Agent: Texas Instruments Incorporated

20100171150 - Methods of fabricating transistors including dielectrically-supported gate electrodes and related devices: Transistors are fabricated by forming a protective layer having a first opening extending therethrough on a substrate, forming a dielectric layer on the protective layer having a second opening extending therethrough that is wider than the first opening, and forming a gate electrode in the first and second openings. A... Agent: Myers Bigel Sibley & Sajovec, P.A.

20100171151 - Heterojunction bipolar transistor and manufacturing method thereof: An HBT according to this invention includes: a sub-collector layer; a collector layer formed on the sub-collector layer and the base layer including a first collector layer, a second collector layer, a third collector layer, and a fourth collector layer. The first collector layer is formed on the sub-collector layer,... Agent: Greenblum & Bernstein, P.L.C

20100171152 - Integrated circuit incorporating decoders disposed beneath memory arrays: A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells. The cell in an N level array may be formed with N+1 masking steps plus masking steps needed for contacts. Maximum... Agent: Zagorin O'brien Graham LLP (023)

20100171153 - Method and structure of monolithically integrated pressure sensor using ic foundry-compatible processes: A monolithically integrated MEMS pressure sensor and CMOS substrate using IC-Foundry compatible processes. The CMOS substrate is completed first using standard IC processes. A diaphragm is then added on top of the CMOS. In one embodiment, the diaphragm is made of deposited thin films with stress relief corrugated structure. In... Agent: Townsend And Townsend And Crew, LLP

20100171155 - Body-biased silicon-on-insulator junction field-effect transistor having a fully depleted body and fabrication method therefor: Silicon-on-insulator JFET having a body bias and a fully depleted body and fabrication methods therefore are disclosed. SOI JFETs offer leakage advantages over bulk silicon JFETs. However, some SOI JFETs have poor switching characteristics (e.g., high switch on time), and have poor leakage performance at high temperatures. The techniques herein... Agent: Perkins Coie LLP

20100171154 - Silicon-on-insulator junction field-effect transistor having a fully depleted body and fabrication method therefor: Silicon-on-insulator JFET (SOI JFET) having a fully depleted body and fabrication methods therefor. SOI JFETs offer leakage advantages over bulk silicon JFETs. However, some SOI JFETs have poor switching characteristics (e.g., high switch on time). The devices and techniques include a fully-depleted body SOI-JFET, with improved switching characteristic over partially-depleted... Agent: Perkins Coie LLP

20100171156 - Method for forming semiconductor contacts: In one embodiment of the invention, contact patterning may be divided into two or more passes which may allow designers to control the gate height critical dimension relatively independent from the contact top critical dimension.... Agent: Trop, Pruner & Hu, P.C.

20100171157 - Image sensor with compact pixel layout: Solid-state image sensors, specifically image sensor pixels, which have three or four transistors, high sensitivity, low noise, and low dark current, are provided. The pixels have separate active regions for active components, row-shared photodiodes and may also contain a capacitor to adjust the sensitivity, signal-to-noise ratio and dynamic range. The... Agent: Mcandrews Held & Malloy, Ltd

20100171158 - Method of forming ferromagnetic material, transistor and method of manufacturing the same: The present invention provides a method of forming a ferromagnetic material, characterized by including: forming a magnetic element layer 20 on a semiconductor layer 16 formed on an inhibition layer 14; and forming a ferromagnetic layer of a Heusler alloy layer 26 on the inhibition layer 14 by heat treatment... Agent: Oliff & Berridge, PLC

20100171159 - Layout of semiconductor device: A layout of a semiconductor device is disclosed, which forms one transistor in one active region to reduce the number of occurrences of a bridge encountered between neighboring layers, thereby improving characteristics of the semiconductor device. Specifically, the landing plug connected to the bit line contact is reduced in size,... Agent: Ampacc Law Group

20100171160 - Semiconductor memory: A semiconductor memory includes a DRAM having, as seen in planar view, a first bit line and a second bit line formed on a first active area, a first cell contact formed on the first active area, and a first capacitor contact formed on the first cell contact and which... Agent: Young & Thompson

20100171161 - Double-implant nor flash memory structure and method of manufacturing the same: In a method of manufacturing a double-implant NOR flash memory structure, a phosphorus ion implantation process is performed, so that a P-doped drain region is formed in a semiconductor substrate between two gate structures to overlap with a highly-doped drain (HDD) region and a lightly-doped drain (LDD) region. Therefore, the... Agent: Schmeiser Olsen & Watts

20100171162 - Non-volatile semiconductor storage device and method of manufacturing the same: Each of memory strings comprising: a first semiconductor layer having a pair of columnar portions extending in a vertical direction to a substrate and a joining portion formed to join lower ends of the pair of columnar portions; an electric charge accumulation layer formed to surround a side surface of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100171163 - Three-dimensional semiconductor devices including select gate patterns having different work function from cell gate patterns: A three-dimensional semiconductor device includes a vertical channel pattern on the substrate, a plurality of cell gate patterns and a select gate pattern stacked on the substrate along the sidewall of the vertical channel pattern, a charge storage pattern between the vertical channel pattern and the cell gate pattern and... Agent: Myers Bigel Sibley & Sajovec

20100171164 - Nonvolatile semiconductor memory device and method of manufacturing the same: A nonvolatile semiconductor memory device including a semiconductor substrate having a semiconductor layer and an insulating material provided on a surface thereof, a surface of the insulating material is covered with the semiconductor layer, and a plurality of memory cells provided on the semiconductor layer, the memory cells includes a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100171167 - Gated semiconductor device and method of fabricating same: A method for fabricating a gated semiconductor device, and the device resulting from performing the method. In a preferred embodiment, the method includes forming a hard mask for use in gate formation on one or more layers of alternately insulating and conducting material that have been formed on a substrate.... Agent: Steven H. Slater Slater & Matsil, L.L.P.

20100171165 - Non-volatile memory: A non-volatile memory including a substrate, two first conductive layers, a second conductive layer, a first dielectric layer, a second dielectric layer and two heavily doped regions is provided. The substrate has at least two isolation structures therein and an active region between the isolation structures. The first conductive layers... Agent: J C Patents

20100171166 - Non-volatile memory device and method of fabricating the same: A non-volatile memory device and a method of fabricating the same are provided. The method can include disposing an isolation layer on a semiconductor substrate. The isolation layer may protrude from the main surface of the semiconductor substrate and define an active region. In a recess defined by the protrusion... Agent: Myers Bigel Sibley & Sajovec

20100171168 - Non-volatile memory device and method of manufacturing the same: A non-volatile memory device includes an active region in which a channel of a transistor is formed in a substrate, element isolation films defining the active region and formed on the substrate at both sides of the channel at a height lower than an upper surface of the active region,... Agent: Stanzione & Kim, LLP

20100171169 - Nonvolatile semiconductor memory device, semiconductor device and manufactoring method of nonvolatile semiconductor memory device: A nonvolatile semiconductor memory device includes a gate portion formed by laminating a tunnel insulating film, floating gate electrode, inter-poly insulating film and control gate electrode on a semiconductor substrate, and source and drain regions formed on the substrate. The tunnel insulating film has a three-layered structure having a silicon... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100171170 - Semiconductor device having reduced sub-threshold leakage: A semiconductor device fabricated in the semiconductor substrate includes a FinFET transistor having opposed source and drain pillars, and a fin interposed between the source and drain pillars. A cavity is formed in the semiconductor substrate extending at least partially between the fin and the semiconductor substrate. The cavity may... Agent: Dorsey & Whitney LLP Intellectual Property Department

20100171172 - Semiconductor device and method for manufacturing the same: A semiconductor device, includes a semiconductor layer of a second conductive type, a first diffused region of a first conductive type formed in the semiconductor layer, a second diffused region of the second conductive type selectively formed in the first diffused region, a trench formed in the semiconductor layer, a... Agent: Mcginn Intellectual Property Law Group, PLLC

20100171171 - Trench mosfet device with low gate charge and the manfacturing method thereof: A method for manufacturing trench MOSFET device with low gate charge includes the steps of providing a substrate of first conductivity type; forming an epitaxial layer of first conductivity type on the substrate; forming a body region of second conductivity type in the epitaxial layer, the body region extends downwards... Agent: Rosenberg, Klein & Lee

20100171173 - Trench mosfet with improved source-body contact: A trench MOSFET with improved source-body contact structure is disclosed. The improved contact structure can enlarge the P+ area below to wrap the sidewalls and bottom of source-body contact within P-body region to further enhance the avalanche capability. On the other hand, one of the embodiments disclosed a wider tungsten... Agent: Bayshore Patent Group, LLC

20100171174 - Semiconductor device and method of manufacturing the same: A gate trench 13 is formed in a semiconductor substrate 10. The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14. A portion of the gate electrode 16 protrudes from the semiconductor substrate 10, and a sidewall 24 is formed over a... Agent: Miles & Stockbridge PC

20100171175 - Structure for high voltage/high current mos circuits: A semiconductor structure for high voltage/high current MOS circuits is provided, including a deep N-well (NMD), a P-well (PW) disposed within NWD, a plurality of field oxide regions (FOX), a plurality of doping regions, including both N+ regions and P+ regions, disposed within NWD and PW, a gate (G) connected... Agent: Lin & Associates Intellectual Property, Inc.

20100171176 - Integrated circuitry and methods of forming a semiconductor-on-insulator substrate: Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures... Agent: Wells St. John P.s.

20100171177 - Semiconductor device: The present invention has for its purpose to provide a technique capable of reducing planar dimension of the semiconductor device. An input/output circuit is formed over the semiconductor substrate, a grounding wiring and a power supply wiring pass over the input/output circuit, and a conductive layer for a bonding pad... Agent: Miles & Stockbridge PC

20100171179 - Full periphery multi-gate transistor with ohmic strip: A full periphery multi-gate transistor with ohmic strip is disclosed. The multi-gate transistor comprises a substrate, a multi-layer structure, a source finger, a drain finger, and a gate. The gate is formed between the source finger and the drain finger, and then a conduction channel is formed between the source... Agent: Morris Manning Martin LLP

20100171178 - Semiconductor devices including dual gate structures and methods of forming such semiconductor devices: Semiconductor devices including dual gate structures and methods of forming such semiconductor devices are disclosed. For example, semiconductor devices are disclosed that include a first gate stack that may include a first conductive gate structure formed from a first material, and a second gate stack that may include a dielectric... Agent: Trask Britt, P.C./ Micron Technology

20100171180 - Method for pfet enhancement: A semiconductor process and apparatus includes forming PMOS transistors (90) with enhanced hole mobility in the channel region by forming a hydrogen-rich silicon nitride layer (91, 136) on or adjacent to sidewalls of the PMOS gate structure as either a hydrogen-rich implant sidewall spacer (91) or as a post-silicide hydrogen-rich... Agent: Hamilton & Terrile, LLP - Freescale

20100171181 - Method of forming a semiconductor device having an epitaxial source/drain: A method of forming a semiconductor device includes forming a device isolation region in a silicon substrate to define an nMOS region and a pMOS region. A p-well is formed in the nMOS region and an n-well in the pMOS region. Gate structures are formed over the p-well and n-well,... Agent: F. Chau & Associates, LLC

20100171182 - Method of forming a semiconductor device having selective stress relaxation of etch stop layer: A strained semiconductor device includes a first plurality of transistors spaced with a first gate pitch, a second plurality of transistors spaced with a second gate pitch greater than the first gate pitch, and an etch stop layer disposed on the first and second pluralities of transistors. The etch stop... Agent: F. Chau & Associates, LLC

20100171183 - Method of manufacturing semiconductor device carrying out ion implantation before silicide process: An N-type source region and an N-type drain region of N-channel type MISFETs are implanted with ions (containing at least one of F, Si, C, Ge, Ne, Ar and Kr) with P-channel type MISFETs being covered by a mask layer. Then, each gate electrode, source region and drain region of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100171184 - Semiconductor device: A semiconductor device includes a semiconductor substrate, an nMISFET formed on the substrate, the nMISFET including a first dielectric formed on the substrate and a first metal gate electrode formed on the first dielectric and formed of one metal element selected from Ti, Zr, Hf, Ta, Sc, Y, a lanthanoide... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100171185 - Semiconductor devices and methods of manufacture thereof: Semiconductor devices and methods of manufacture thereof are disclosed. A preferred embodiment comprises a method of forming a barrier layer. The method of forming the barrier layer includes providing a workpiece, forming a first material layer over the workpiece, the first material layer comprising a nitride-based metal compound. A second... Agent: Slater & Matsil LLP

20100171186 - System and method for metal-oxide-semiconductor field effect transistor: System and method for metal-oxide-semiconductor field effect transistor. In a specific embodiment, the invention provides a field effect transistor (FET), which includes a substrate material, the substrate material being characterized by a first conductivity type, the substrate material including a first portion, a second portion, and a third portion, the... Agent: Townsend And Townsend And Crew, LLP

20100171187 - Formation of high-k gate stacks in semiconductor devices: A method of forming a high-K gate stack for a MOSFET device to control the threshold voltage for the MOSFET device. A first high-K metallic oxide layer is formed on a semiconductor substrate. At least one composite layer is then formed directly on the first layer. The composite layer is... Agent: Ibm Corporation, T.j. Watson Research Center

20100171188 - Integrated circuit device with single crystal silicon on silicide and manufacturing method: A silicide element separates a single crystal silicon node from an underlying silicon substrate, and is capable of acting as a conductive element for interconnecting devices on the device. The single crystal silicon node can act as one terminal of a diode, and a second semiconductor node on top of... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20100171189 - Electronic device package and fabrication method thereof: The invention provides an electronic device package and fabrication method thereof. The electronic device package includes a sensor chip. An upper surface of the sensor chip comprises a sensing film. A covering plate having an opening structure covers the upper surface of the sensor chip. A cavity is between the... Agent: Liu & Liu

20100171190 - Electromagnetic radiation sensor and metod of manufacture: A method of forming a semiconductor sensor in one embodiment includes providing a substrate, forming a reflective layer on the substrate, forming a sacrificial layer on the reflective layer, forming an absorber layer with a thickness of less than about 50 nm on the sacrificial layer, forming an absorber in... Agent: Maginot, Moore & Beck, LLP Chase Tower

20100171191 - Image sensor and method of fabricating the same: An image sensor includes at least one photoelectric conversion device formed in a silicon substrate, at least one lens formed on one side of the photoelectric conversion device and configured to collect light, a dielectric layer formed on the other side of the photoelectric conversion device and a reflective pattern... Agent: F. Chau & Associates, LLC

20100171192 - Reflowable camera module with improved reliability of solder connections: A reflowable camera module has a set of solder joints formed on a bottom surface of the camera module that provide electrical signal and power connections between the camera module and a printed circuit substrate. The solder joints are susceptible to failure caused by shear forces, particularly in corner regions.... Agent: Curtis A. Vock Lathrop & Gage LLP

20100171193 - Semiconductor device: This invention provides a semiconductor device, which is used to manufacture two lateral high-voltage devices on the same substrate, where the voltages between maximum voltage terminals and minimum voltage terminals of the two devices have not too much difference. Both devices are formed on two different surface regions with a... Agent: Mcgarry Bair PC

20100171194 - Semiconductor device and method of forming an inductor on polymer matrix composite substrate: A semiconductor device has a first insulating layer formed over a first surface of a polymer matrix composite substrate. A first conductive layer is formed over the first insulating layer. A second insulating layer is formed over the first insulating layer and first conductive layer. A second conductive layer is... Agent: Robert D. Atkins

20100171195 - Thin film silicon wafer and method for manufacturing the same: Provided are a thin film silicon wafer having high gettering capability, a manufacturing method therefor, a multi-layered silicon wafer formed by laminating the thin film silicon wafers, and a manufacturing method therefor. The thin film silicon wafer is manufactured by: forming one or more gettering layers immediately below a device... Agent: Rader Fishman & Grauer PLLC

20100171196 - Electrically shielded through-wafer interconnect: Through-Wafer Interconnections allow for the usage of cost-effective substrates for detector chips. According to an exemplary embodiment of the present invention, detecting element for application in an examination apparatus may be provided, comprising a wafer with a sensitive region and a coaxial through-wafer interconnect structure. This may reduce the susceptibility... Agent: Philips Intellectual Property & Standards

20100171197 - Isolation structure for stacked dies: An isolation structure for stacked dies is provided. A through-silicon via is formed in a semiconductor substrate. A backside of the semiconductor substrate is thinned to expose the through-silicon via. An isolation film is formed over the backside of the semiconductor substrate and the exposed portion of the through-silicon via.... Agent: Slater & Matsil, L.L.P.

20100171198 - Method for manufacturing semiconductor device, semiconductor device, semiconductor manufacturing apparatus and storage medium: A method for manufacturing a semiconductor device includes steps of:(a) forming a thin film containing a phenyl group and silicon on a substrate while obtaining a plasma by activating an organic silane gas containing a phenyl group and silicon and nitrogen as not original component but unavoidable impurity and exposing... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100171199 - Production method of semiconductor device, semiconductor device, and exposure apparatus: m

20100171200 - Semiconductor chip package: A semiconductor chip package includes a main board; a ceramic substrate having a cavity within which at least one chip is electrically mounted, the cavity being placed at a lower portion of the ceramic substrate facing the main board; and a conductive shielding layer provided with a predetermined thickness on... Agent: Mcdermott Will & Emery LLP

20100171201 - Chip on lead with small power pad design: Embodiments of a semiconductor device and method provide a quad flat no-lead semiconductor package which can have an arrangement of both chip-on-lead (COL) style leads and a die pad for supporting a die, and can also provide non-COL leads, both COL leads and a leadframe power pad, COL leads which... Agent: Texas Instruments Incorporated

20100171202 - Method of securely data protecting arrangement for electronic device: A method of securely data protection for an electronic device includes the steps of: enclosing a core circuit module of the electronic within a protection element to form a protection circuit surrounding the core circuit module; operatively linking a detective circuit between the protection element and the core circuit module;... Agent: David And Raymond Patent Firm

20100171206 - Package-on-package device, semiconductor package, and method for manufacturing the same: A semiconductor package includes: (1) a substrate including an upper surface and a lower surface opposite to the upper surface; (2) a chip mounted and electrically connected to the upper surface of the substrate; (3) an interposer mounted on the chip and electrically connected to the upper surface of the... Agent: Cooley LLP Attn: Patent Group

20100171203 - Robust tsv structure: A die includes a seal-ring structure below a substrate. The seal-ring structure is disposed around at least one substrate region. At least one means for substantially preventing ion diffusion into the substrate region. The at least one means is coupled with the seal-ring structure.... Agent: Lowe Hauptman Ham & Berner, LLP

20100171208 - Semiconductor device: A semiconductor device which has a plurality of semiconductor chips stacked on a substrate. The semiconductor device includes semiconductor chip 2, semiconductor chip 3a stacked on substrate 4 together with semiconductor chip 2, and having a foot print larger than semiconductor chip 2, through electrode 22 extending through semiconductor chip... Agent: Foley And Lardner LLP Suite 500

20100171209 - Semiconductor device and method for manufacturing the same: A semiconductor device having stacked semiconductor chips is provided wherein alignment of even thin semiconductor chips of a large warpage is easy and thus high assembling accuracy and high reliability are ensured. Semiconductor chips having hollow through-silicon via electrodes each formed with a tapered portion are melt-joined using solder balls... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100171210 - Semiconductor device, stacked semiconductor device and interposer substrate: A semiconductor device has a semiconductor element; an interposer substrate having a wiring pattern electrically connected to the semiconductor element and an insulating substrate formed with the wiring pattern; a connection layer for adhering between the semiconductor element and the interposer substrate; and a solder ball external terminal arranged on... Agent: Foley And Lardner LLP Suite 500

20100171205 - Stackable semiconductor device packages: In one embodiment, a semiconductor device package includes: (1) a substrate unit; (2) connecting elements disposed adjacent to a periphery of the substrate unit and extending upwardly from an upper surface of the substrate unit; (3) a semiconductor device disposed adjacent to the upper surface of the substrate unit and... Agent: Cooley LLP Attn: Patent Group

20100171207 - Stackable semiconductor device packages: In one embodiment, a manufacturing method includes: (1) applying a first electrically conductive material to an upper surface of a substrate to form first conductive bumps; (2) electrically connecting a semiconductor device to the upper surface of the substrate; (3) applying a molding material to form a molded structure covering... Agent: Cooley LLP Attn: Patent Group

20100171204 - Three-dimensional package: A three-dimensional package includes a carrier, a first die mounted on a first surface of the carrier, and a second die stacked on the first die. The first die includes first bond pads and second bond pads juxtaposed in separate two rows within a central region of the first die.... Agent: North America Intellectual Property Corporation

20100171211 - Semiconductor device: A semiconductor device is provided by the present invention. The semiconductor device includes a semiconductor die, and the semiconductor die includes a die core having at least two bond pads with voltage level equivalent to each other and electrically connected to each other via at least a bond wire, and... Agent: North America Intellectual Property Corporation

20100171212 - Semiconductor package structure with protection bar: A semiconductor package structure includes a carrier, a chip or multi-chips mounted on a top surface of the carrier, a molding compound encapsulating the top surface and the chips, a plurality of solder balls distributed on a bottom surface of the carrier, and a protection bar formed of thermosetting plastic... Agent: North America Intellectual Property Corporation

20100171213 - Semiconductor device having a liquid cooling module: A semiconductor device comprises a mounting substrate, a semiconductor element provided above said mounting substrate, a package substrate provided above said mounting substrate with said semiconductor element therebetween and electrically connected to said semiconductor element via a primary connecting bump, a liquid cooling module cooling said semiconductor element by a... Agent: Sughrue Mion, PLLC

20100171214 - Marking method for semiconductor device and semiconductor device provided with markings: A marking method is provided for putting markings on the surface of a packaged semiconductor device. The semiconductor device includes a semiconductor chip and a resin package for covering the semiconductor chip. The method includes the steps of forming a groove in the obverse surface of the resin package, and... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20100171215 - Method of producing optoelectronic components and optoelectronic component: A method of producing optoelectronic components is indicated, in which a plurality of semiconductor bodies, each with a semiconductor layer sequence, are provided. In addition, a component carrier assembly with a plurality of connection pads is provided. The semiconductor bodies are positioned relative to the component carrier assembly. An electrically... Agent: Slater & Matsil, L.L.P.

20100171216 - Electronic device and electronic apparatus: An electronic device includes a semiconductor device and a wiring substrate having a wiring pattern. The semiconductor device includes: a semiconductor chip having an electrode; a convex-shaped resin protrusion provided on a surface of the semiconductor chip, the surface having the electrode; and wiring having a plurality of electrical coupling... Agent: Harness, Dickey & Pierce, P.L.C

20100171217 - Through-wafer interconnects for photoimager and memory wafers: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and... Agent: Perkins Coie LLP Patent-sea

20100171218 - Semiconductor device and method for fabricating the same: A semiconductor device includes a first substrate formed with a through silicon via reaching the back surface thereof, and a second substrate electrically connected to the first substrate via the through silicon via, and bonded to the back surface of the first substrate. A taper angle of a sidewall of... Agent: Mcdermott Will & Emery LLP

20100171219 - Extended liner for localized thick copper interconnect: A dielectric layer overlies a semiconductor substrate. The substrate has components and appropriate contacts formed therein. The dielectric layer electrically insulates the substrate and components from overlying conductive interconnect layers. A barrier layer is arranged over the dielectric layer to isolate the interconnect layers from other structures. A copper layer... Agent: Stmicroelectronics, Inc.

20100171220 - Reducing resistivity in interconnect structures of integrated circuits: An integrated circuit structure having improved resistivity and a method for forming the same are provided. The integrated circuit structure includes a dielectric layer, an opening in the dielectric layer, an oxide-based barrier layer directly on sidewalls of the opening, and conductive materials filling the remaining portion of the opening.... Agent: Slater & Matsil, L.L.P.

20100171221 - Semiconductor device and manufacturing method thereof: The present invention relates to a semiconductor device and its manufacturing method including the steps of: forming a first semiconductor element layer having a first wiring over a substrate; forming a second semiconductor element layer having a second wiring and fixed to a first structure body having a first sheet-like... Agent: Robinson Intellectual Property Law Office, P.C.

20100171222 - High reliability au alloy bonding wire and semiconductor device of same: [Solution Means] Au alloy bonding wire comprising: 0.02-0.3 mass % Ag, total amount of 10-200 mass ppm at least one element of Ge and/or Si, and/or total amount of 10-200 mass ppm at least one element of Al and/or Cu, with residual of Au. Moreover, Al and/or Al alloy pad... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100171224 - Three dimensional structure memory: A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit... Agent: Michael J. Ure

20100171225 - Three dimensional structure memory: A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit... Agent: Michael J. Ure

20100171223 - Through-silicon via with scalloped sidewalls: A semiconductor device having one or more through-silicon vias (TSVs) is provided. The TSVs are formed such that sidewalls of the TSVs have a scalloped surface. In an embodiment, the sidewalls of the TSVs are sloped wherein a top and bottom of the TSVs have different dimensions. The TSVs may... Agent: Slater & Matsil, L.L.P.

20100171226 - Ic having tsv arrays with reduced tsv induced stress: An integrated circuit (IC) includes a substrate having a top side having active circuitry thereon including a plurality of metal interconnect levels including a first metal interconnect level and a top metal interconnect level, and a bottom side. At least one TSV array includes a plurality of TSVs. The TSVs... Agent: Texas Instruments Incorporated

20100171227 - Method of producing a via in a reconstituted substrate: A method of producing an electronic connection device, including: a) formation, in a plane of a support substrate, of at least one first contact element and, in a direction approximately perpendicular to the plane, of at least one second contact element having a first end in electrical contact with the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100171228 - Integrated circuit package system and method of manufacture thereof: A method of manufacture of an integrated circuit package system includes forming a substrate with a device thereover, forming an encapsulation having a planar top surface to cover the device and the substrate spanning to an extraction side of the encapsulation, and forming a recess in the encapsulation from the... Agent: Law Offices Of Mikio Ishimaru

20100163818 - Forming a carbon passivated ovonic threshold switch: By making an ovonic threshold switch using a carbon interfacial layer having a thickness of less than or equal to ten percent of the thickness of the associated electrode, cycle endurance may be improved. In some embodiments, a glue layer may be used between the carbon and the chalcogenide of... Agent: Seed Intellectual Property Law Group PLLC

20100163824 - Modulation of resistivity in carbon-based read-writeable materials: In a first aspect, a method of forming a memory cell is provided that includes (1) forming a metal-insulator-metal (“MIM”) stack above a substrate, the MIM stack including a carbon-based switching material having a resistivity of at least 1×104 ohm-cm; and (2) forming a steering element coupled to the MIM... Agent: Dugan & Dugan, PC

20100163822 - Ovonic threshold switch film composition for tslags material: A chalcogenide alloy that optimizes operating parameters of an ovonic threshold switch includes an atomic percentage of arsenic in the range of 9 to 39, an atomic percentage of germanium in the range of 10 and 40, an atomic percentage of silicon in the range of 5 and 18, an... Agent: Seed Intellectual Property Law Group PLLC

20100163820 - Phase change memory device having a reduced contact area and method for manufacturing the same: A phase change memory device having a reduced contact area and a method for manufacturing the same is presented. The phase change random access memory device includes a bottom electrode contact pattern layer, and at least one phase change pattern layer formed on a sidewall of the bottom electrode contact... Agent: Ladas & Parry LLP

20100163819 - Resistive memory device and method for fabricating the same: A resistive memory device and a fabrication method thereof are provided. The fabrication method includes: providing a substrate; forming a lower electrode over the substrate; forming a variable resistive material layer over the lower electrode; forming an ion implantation region to a predetermined depth from a surface of the variable... Agent: Ip & T Law Firm PLC

20100163823 - Resistive random access memory: A resistive memory device includes a first electrode, a resistive oxidation structure and a second electrode. The resistive oxidation structure has sets of oxidation layers stacked on the first electrode. Each set is made up of a first metal oxide layer and a second metal oxide layer which is disposed... Agent: Volentine & Whitt PLLC

20100163817 - Self-heating phase change memory cell architecture: A method for manufacturing a phase change memory includes forming a phase change memory cell by forming a phase change layer between two switching layers. The phase change layer is separated from thermal heat sinks, such as the bitline or wordline, by the switching layers.... Agent: Seed Intellectual Property Law Group PLLC

20100163821 - Vertical diode and method for manufacturing same and semiconductor memory device: In a vertical diode, an N+-type layer, an N−-type layer, and a P+-type layer are stacked in this order on a lower electrode film, and an upper electrode film is provided thereon. The effective impurity concentration of the N−-type layer is lower than the effective impurity concentrations of the N+-type... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100163829 - Conductive bridging random access memory device and method of manufacturing the same: A conductive bridging random access memory (CBRAM) device and a method of manufacturing the same are provided. The CBRAM device includes a first electrode layer, a dielectric layer, a solid electrolyte layer, a second electrode layer and a metal layer. The solid electrolyte layer is located on the first electrode... Agent: Jianq Chyun Intellectual Property Office

20100163831 - Deposited semiconductor structure to minimize n-type dopant diffusion and method of making: A microelectronic structure including a layerstack is provided, the layerstack including: (a) a first layer including semiconductor material that is very heavily n-doped before being annealed, having a first-layer before-anneal dopant concentration, the first layer being between about 50 and 200 angstroms thick, wherein the first layer is above a... Agent: Dugan & Dugan, PC

20100163825 - Forming phase change memories with a breakdown layer sandwiched by phase change memory material: A phase change memory cell may be formed with a pair of chalcogenide phase change layers that are separated by a breakdown layer. The breakdown layer may be broken down prior to use of the memory so that a conductive breakdown point is defined within the breakdown layer. In some... Agent: Seed Intellectual Property Law Group PLLC

20100163827 - Forming phase change memory cells: Small phase change memory cells may be formed by forming a segmented heater over a substrate. A stop layer may be formed over the heater layer and segmented with the heater layer. Then, sidewall spacers may be formed over the segmented heater to define an aperture between the sidewall spacers... Agent: Seed Intellectual Property Law Group PLLC

20100163826 - Method for active pinch off of an ovonic unified memory element: A method of manufacturing a phase change memory (PCM) includes forming a pinch plate layer transversely to a PCM layer that is insulated from the pinch plate layer by a dielectric layer. Biasing the pinch plate layer causes a depletion region to form in the PCM layer. During a read... Agent: Seed Intellectual Property Law Group PLLC

20100163828 - Phase change memory devices and methods for fabricating the same: A phase change memory device is provided, including a semiconductor substrate with a first conductive semiconductor layer disposed thereover, wherein the first conductive semiconductor layer has a first conductivity type. A first dielectric layer is disposed over the semiconductor substrate. A second conductive semiconductor layer having a second conductivity type... Agent: Quintero Law Office, PC

20100163830 - Phase-change random access memory capable of reducing thermal budget and method of manufacturing the same: A phase-change random access memory (PRAM) is presented which can ensure the integrity of the electrical characteristics of driving transistors even when the PRAM is with a high temperature SEG fabrication process because the fabrication time is minimized. A method of manufacturing the PRAM includes the following steps. After preparing... Agent: Ladas & Parry LLP

20100163834 - Contact structure, method of manufacturing the same, phase changeable memory device having the same, and method of manufacturing phase changeable memory device: A contact structure, a method of manufacturing the same, a phase-changeable memory device having the same, and a method of manufacturing the phase-changeable memory device are described. The phase-changeable memory device includes: an upper electrode, a bit line, and a bit line contact unit. The upper electrode is on a... Agent: Ladas & Parry LLP

20100163833 - Electrical fuse device based on a phase-change memory element and corresponding programming method: A fuse device has a fuse element provided with a first terminal and a second terminal and an electrically breakable region, which is arranged between the first terminal and the second terminal and is configured to undergo breaking as a result of the supply of a programming electrical quantity, thus... Agent: Seed Intellectual Property Law Group PLLC

20100163832 - Self-aligned nano-cross-point phase change memory: One embodiment is a phase change memory that includes a heater element transversely contacting a storage element of phase change material. In particular, an end of the storage element contacts an end of the heater element. A first pair of dielectric spacers is positioned on opposite sides of the first... Agent: Seed Intellectual Property Law Group PLLC

20100163835 - Controlling the circuitry and memory array relative height in a phase change memory feol process flow: A CMOS logic portion embedded with a PCM portion is recessed by a gate structure height as measured by a thickness of a gate oxide and a polysilicon gate to provide planarity of the CMOS logic portion with the PCM portion is described.... Agent: Gerbera/bstz Blakely Sokoloff Taylor & Zafman LLP

20100163836 - Low-volume phase-change material memory cell: A memory device includes a memory array comprising a plurality of storage locations disposed above a plurality of generally parallel lines, where each storage location comprises a programmable material disposed on a sidewall of a conductive element.... Agent: Goodwin Procter LLP Patent Administrator

20100163837 - Gunn diode: A Gunn diode includes an active layer having a top and a bottom, a first contact layer disposed adjacent to the top of the active layer, a second contact layer disposed adjacent to the bottom of the active layer, wherein the first and second contact layers are more heavily doped... Agent: Leydig, Voit And Mayer

20100163838 - Method of isolating nanowires from a substrate: A method is provided. The method includes forming a plurality of nanowires on a top surface of a substrate and forming an oxide layer adjacent to a bottom surface of each of the plurality of nanowires, wherein the oxide layer is to isolate each of the plurality of nanowires from... Agent: Intel Corporation C/o Cpa Global

20100163839 - Semiconductor substrate for growth of an epitaxial semiconductor device: A semiconductor substrate includes: a base layer; a sacrificial layer that is formed on a base layer and that includes a plurality of spaced apart sacrificial film regions and a plurality of first passages each of which is defined between two adjacent ones of the sacrificial film regions. Each sacrificial... Agent: Dickstein Shapiro LLP

20100163840 - Nitride nanowires and method of producing such: The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source... Agent: Foley And Lardner LLP Suite 500

20100163841 - Nano-hetero structure and method of fabricating the same: A nano-hetero structure is provided. The nano-hetero structure includes at least one nano-semiconductor base and a plurality of metal nanoparticles attached on the surface of nano-semiconductor base.... Agent: Jianq Chyun Intellectual Property Office

20100163842 - Multiple-gate transistors with reverse t-shaped fins: A method of forming an integrated circuit structure includes forming a first insulation region and a second insulation region in a semiconductor substrate and facing each other; and forming an epitaxial semiconductor region having a reversed T-shape. The epitaxial semiconductor region includes a horizontal plate including a bottom portion between... Agent: Slater & Matsil, L.L.P.

20100163848 - Buffer structure for semiconductor device and methods of fabrication: Embodiments of the present invention describe a semiconductor device having an buffer structure and methods of fabricating the buffer structure. The buffer structure is formed between a substrate and a quantum well layer to prevent defects in the substrate and quantum well layer due to lattice mismatch. The buffer structure... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100163849 - Double pass formation of a deep quantum well in enhancement mode iii-v devices: A quantum well is formed for a deep well III-V semiconductor device using double pass patterning. In one example, the well is formed by forming a first photolithography pattern over terminals on a material stack, etching a well between the terminals using the first photolithography patterning, removing the first photolithography... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100163844 - Fabrication method of electronic devices based on aligned high aspect ratio nanoparticle networks: A layer of high aspect ratio nanoparticles is disposed on a surface of a substrate under the influence of an electrical field applied on the substrate. To create the electrical field, a voltage is applied between a pair of electrodes arranged near the substrate or on the substrate, and the... Agent: Ware Fressola Van Der Sluys & Adolphson, LLP

20100163846 - Nano-tube mosfet technology and devices: This invention discloses a semiconductor power device disposed in a semiconductor substrate and the semiconductor substrate has a plurality of trenches. Each of the trenches is filled with a plurality of epitaxial layers of alternating conductivity types constituting nano tubes functioning as conducting channels stacked as layers extending along a... Agent: Bo-in Lin

20100163847 - Quantum well mosfet channels having uni-axial strain caused by metal source/drains, and conformal regrowth source/drains: Embodiments described include straining transistor quantum well (QW) channel regions with metal source/drains, and conformal regrowth source/drains to impart a uni-axial strain in a MOS channel region. Removed portions of a channel layer may be filled with a junction material having a lattice spacing different than that of the channel... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100163843 - Room temperature-operating single-electron device and the fabrication method thereof: The present invention relates to a room temperature-operating single-electron device and a fabrication method thereof, and more particularly, to a room temperature-operating single-electron device in which a plurality of metal silicide dots formed serially is used as multiple quantum dots, and a fabrication method thereof.... Agent: Akerman Senterfitt

20100163850 - Thin film transistor and method of fabricating the same: A thin film transistor includes: a silicon nanowire on a substrate, the silicon nanowire having a central portion and both side portions of the central portion; a gate electrode on the central portion; and a source electrode and a drain electrode spaced apart from the source electrode on the both... Agent: Mckenna Long & Aldridge LLP

20100163845 - Tunnel field effect transistor and method of manufacturing same: A TFET includes a source region (110, 210), a drain region (120, 220), a channel region (130, 230) between the source region and the drain region, and a gate region (140, 240) adjacent to the channel region. The source region contains a first compound semiconductor including a first Group III... Agent: Intel Corporation C/o Cpa Global

20100163859 - Light emitting device and electronic apparatus: A light emitting device which is capable of suppressing deterioration by diffusion of impurities such as moisture, oxygen, alkaline metal and alkaline earth metal, and concretely, a flexible light emitting device which has light emitting element formed on a plastic substrate. On the plastic substrate, disposed are two layers and... Agent: Nixon Peabody, LLP

20100163852 - Material for light-emitting device and light-emitting device: The present invention provides a light emitting device material which enables a light emitting device having high efficiency and excellent chromatic purity and durability using a light emitting device material containing a pyrene compound represented by formula (1), wherein any one of R1 to R10 is a group represented by... Agent: Kubovcik & Kubovcik

20100163857 - Material for organic photoelectric device, and organic photoelectric device including the same: A material for an organic photoelectric device includes a compound represented by the following Formula 1:... Agent: Lee & Morse, P.C. Suite 500

20100163855 - Method of fabricating polysilicon, thin film transistor, method of fabricating the thin film transistor, and organic light emitting diode display device including the thin film transistor: A thin film transistor, a method of fabricating the thin film transistor, and an organic light emitting diode (OLED) display device equipped with the thin film transistor of which the thin film transistor includes a substrate, a buffer layer disposed on the substrate, a first semiconductor layer and a second... Agent: Stein Mcewen, LLP

20100163856 - Method of fabricating polysilicon, thin film transistor, method of fabricating the thin film transistor, and organic light emitting diode display device including the thin film transistor: A thin film transistor, a method of fabricating the thin film transistor, and an organic light emitting diode (OLED) display device including the thin film transistor, the thin film transistor including: a substrate; a buffer layer formed on the substrate; a first semiconductor layer disposed on the buffer layer; a... Agent: Stein Mcewen, LLP

20100163851 - Organic based device and method for manufacture thereof: A device comprising a first transparent and electrically conductive layer (102), a second electrically conductive layer (104), and a functional layer (103) comprising at least one organic layer, sandwiched between said first and second conductive layers and to form a functional organic stack. At least one via (110) is arranged... Agent: Philips Intellectual Property & Standards

20100163853 - Organic electroluminescent device: d

20100163854 - Organic light emitting device: An organic light emitting device (OLED) including: a substrate; a first electrode; a second electrode facing the first electrode; a first blue light emitting layer, a green light emitting layer, a red light emitting layer, and a second blue light emitting layer all interposed between the first electrode and the... Agent: Christie, Parker & Hale, LLP

20100163858 - Switching element and method for manufacturing the same: A problem of a switching element using for the active layer a carbon nanotube (CNT) dispersion film that can be manufactured at low temperature has been that sufficient electrical contact and thermal conductivity between the CNTs and the source and drain electrode surfaces are not obtained. The switching element of... Agent: Mr. Jackson Chen

20100163865 - Display device and manufacturing method thereof: A display device includes a first wiring functioning as a gate electrode formed over a substrate, a gate insulating film formed over the first wiring, a second wiring and an electrode layer provided over the gate insulating film, and a high-resistance oxide semiconductor layer formed between the second wiring and... Agent: Eric Robinson

20100163861 - Method and apparatus for optically transparent transistor: A method and apparatus for an optically transparent field effect transistor on a substrate. The gate electrode, the dielectric, the semiconducting layer, the source electrode, and the drain electrode are optically transparent layers of nanoparticles that are formed using one or more graphic arts printing processes. The dielectric layer is... Agent: Motorola, Inc.

20100163864 - Semiconductor device: An object of the present invention is to increase the light emission efficiency of a ZnO-based optical semiconductor device. An optical semiconductor device B has a structure which includes n-type Zn1-zMgzO (barrier layer) 11/Zn1-zMgxO (active layer) 15/p-type Zn1-yMgyO (barrier layer) 17, and light is emitted from the active layer 15.... Agent: Fish & Richardson, PC

20100163866 - Semiconductor device and manufacturing method thereof: One of factors that increase the contact resistance at the interface between a first semiconductor layer where a channel is formed and source and drain electrode layers is a film with high electric resistance formed by dust or impurity contamination of a surface of a metal material serving as the... Agent: Eric Robinson

20100163868 - Semiconductor device and manufacturing method thereof: A semiconductor device which includes a thin film transistor having an oxide semiconductor layer and excellent electrical characteristics is provided. Further, a method for manufacturing a semiconductor device in which plural kinds of thin film transistors of different structures are formed over one substrate to form plural kinds of circuits... Agent: Eric Robinson

20100163867 - Semiconductor device, method for manufacturing the same, and electronic device having the same: In a thin film transistor including an oxide semiconductor, an oxide cluster having higher electrical conductance than the oxide semiconductor layer is formed between the oxide semiconductor layer and a gate insulating layer, whereby field effect mobility of the thin film transistor can be increased and increase of off current... Agent: Eric Robinson

20100163860 - Semiconductor thin film, method for manufacturing the same, thin film transistor, and active-matrix-driven display panel: Disclosed is a semiconductor thin film which can be formed at a relatively low temperature even on a flexible resin substrate. Since the semiconductor thin film is stable to visible light and has high device characteristics such as transistor characteristics, in the case where the semiconductor thin film is used... Agent: Millen, White, Zelano & Branigan, P.C.

20100163863 - Thin film field effect transistor and display: A thin film field effect transistor includes at least: a substrate; and a gate electrode, a gate insulating layer, an active layer, a source electrode and a drain electrode, and a protective layer provided on the substrate in this order from the substrate side. The active layer is a layer... Agent: Solaris Intellectual Property Group, PLLC

20100163862 - Thin film transistor array substrate and method of fabricating the same: A method of fabricating a thin film transistor array substrate is presented. The method entails forming a gate interconnection line on an insulating substrate, forming a gate insulating layer on the gate interconnection line, forming a semiconductor layer and a data interconnection line on the semiconductor layer, sequentially forming multiple... Agent: Innovation Counsel LLP

20100163869 - Bonding inspection structure: A bonding inspection structure is provided. The bonding inspection structure includes at least a elastic bump located on a substrate. At least an opening is formed in the top portion of the elastic bump. An inspection area of the top portion of the elastic bump is larger than an area... Agent: Jianq Chyun Intellectual Property Office

20100163871 - Method for indexing dies comprising integrated circuits: An embodiment of a method for indexing a plurality of die obtainable from a material wafer comprising a plurality of stacked material layers is disclosed. Each die is obtained in a respective position of the wafer; the plurality of dies is obtained by means of a manufacturing process performed in... Agent: Graybeal Jackson LLP

20100163870 - Structure and method for testing mems devices: A method for determining the presence of a sacrificial layer under a structure. The method includes providing at least one structure arranged above a substrate having a major surface lying in a plane, the at least one structure being clamped at at least one side. The method further includes exerting... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20100163872 - Bipolar junction transistor and method of manufacturing the same: A bipolar junction transistor and a method of manufacturing a bipolar junction transistor are disclosed. An exemplary bipolar junction transistor includes a second conductivity type base region in a first conductivity type substrate, step-shaped recesses in the base region, a polysilicon layer doped with a first conductivity type impurity in... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20100163873 - Photo-voltaic cell device and display panel: A photo-voltaic cell device includes a first electrode, an N-type doped silicon-rich dielectric layer, a P-type doped silicon-rich dielectric layer, and a second electrode. The N-type doped silicon-rich dielectric layer is disposed on the first electrode, and the N-type doped silicon-rich dielectric layer is doped with an N-type dopant. The... Agent: Jianq Chyun Intellectual Property Office

20100163874 - Driver circuit and semiconductor device: The silicon nitride layer 910 formed by plasma CVD using a gas containing a hydrogen compound such as silane (SiH4) and ammonia (NH3) is provided on and in direct contact with the oxide semiconductor layer 905 used for the resistor 354, and the silicon nitride layer 910 is provided over... Agent: Eric Robinson

20100163878 - Active matrix displays and other electronic devices having plastic substrates: A method of manufacturing a thin film electronic device comprises applying a plastic coating to a rigid carrier substrate using a wet casting process, the plastic coating forming a plastic substrate and comprising a transparent plastic material and a UV absorbing additive. Thin film electronic elements are formed over the... Agent: Philips Intellectual Property & Standards

20100163881 - Array substrate for electrophoresis type display device and method of manufacturing the same, method of repairing a line of the same: An array substrate for an electrophoresis type display device includes a plurality of gate lines on a substrate; a gate insulating layer on the plurality of gate lines; a plurality of data lines on the gate insulating layer and crossing the plurality of gate lines to define a plurality of... Agent: Morgan Lewis & Bockius LLP

20100163879 - Array substrate for liquid crystal display device and method of fabricating the same: A method of fabricating a liquid crystal display device includes: a first step of attaching a polarizing plate to an outer surface of a liquid crystal panel; a second step of attaching a tape carrier package (TCP) to the liquid crystal panel; a third step of coating a resin onto... Agent: Mckenna Long & Aldridge LLP

20100163877 - Display device: A display has a glass substrate provided with a transparent conducting film, thin-film transistors, and an aluminum alloy wiring film electrically connecting the thin-film transistors to the transparent conducting film. The aluminum alloy wiring film is a layered structure having a first layer (X) of an aluminum alloy comprising at... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100163883 - Manufacturing method of electro line for liquid crystal display device: A manufacturing method of an electro line for a liquid crystal display device includes depositing a barrier layer made of a conducting material on a substrate, depositing a copper layer (Cu) on the barrier layer, wet-etching the Cu layer using a first etchant, and dry-etching the barrier layer using a... Agent: Mckenna Long & Aldridge LLP

20100163875 - Pixel performance improvement by use of a field shield: A pixel cell (100) and method for making the same for an active matrix display includes a pixel pad (110) and a thin film field effect transistor (106) which selectably couples a signal to activate/deactivate the pixel pad. A field shield (112) is formed on an insulating layer (102) and... Agent: Leydig Voit & Mayer, Ltd

20100163876 - Reflective tft substrate and method for manufacturing reflective tft substrate: A reflective TFT substrate which can be operated for a prolonged period of time due to the presence of a protective insulating film, is free from occurrence of crosstalk, and is capable of significantly reducing manufacturing cost by decreasing the production steps in the production process. A reflective TFT substrate... Agent: Millen, White, Zelano & Branigan, P.C.

20100163880 - Thin film transistor array panel and method for manufacturing the same: A thin film transistor array panel comprises a repair line disposed in a peripheral area of a display area and being configured to repair when at least one of a gate line and a data line are disconnected, and a detour line disposed in the peripheral area and comprising at... Agent: H.c. Park & Associates, PLC

20100163882 - Thin film transistor array substrate for an x-ray detector and method of fabricating the same: A thin film transistor (TFT) array substrate for an X-ray detector and a method of fabricating the same are provided. The TFT array substrate includes a substrate, a gate line formed on the substrate, a data line crossing the gate line, a thin film transistor including a gate electrode, a... Agent: Innovation Counsel LLP

20100163884 - Switching device structure of active matrix display: A switching device structure of active matrix display is provided. The switching device structure includes a substrate, a plurality of switching-device gate connection lines disposed on the substrate along a first direction and a plurality of switching devices disposed on the substrate along the first direction. Each switching device includes... Agent: North America Intellectual Property Corporation

20100163885 - Thin film transistor, method of fabricating the same, and organic light emitting diode display device including the thin film transistor: A thin film transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate and including source and drain regions, each having a first metal catalyst crystallization region and a second metal catalyst crystallization region, and a channel region having the second metal catalyst crystallization region, a gate electrode... Agent: Stein Mcewen, LLP

20100163886 - Gallium nitride compound semiconductor light-emitting device, method of manufacturing the same, and lamp including the same: The present invention provides a gallium nitride compound semiconductor light-emitting device that prevents an increase in the specific resistance of a p-type semiconductor layer due to hydrogen annealing and reduces the specific resistance of a translucent conductive oxide film to lower a driving voltage Vf, a method of manufacturing the... Agent: Sughrue Mion, PLLC

20100163887 - Light emitting device having a plurality of non-polar light emitting cells and a method of fabricating the same: The present invention relates to a light emitting device having a plurality of non-polar light emitting cells and a method of fabricating the same. Nitride semiconductor layers are disposed on a Gallium Nitride substrate having an upper surface. The upper surface is a non-polar or semi-polar crystal and forms an... Agent: H.c. Park & Associates, PLC

20100163888 - Manufacturing process of a power electronic device integrated in a semiconductor substrate with wide band gap and electronic device thus obtained: An embodiment of a process for manufacturing an electronic device on a semiconductor body of a material with wide forbidden bandgap having a first conductivity type. The process comprises the steps of: forming, on the semiconductor body, a first mask having a first window and a second window above a... Agent: Graybeal Jackson LLP

20100163889 - Optical modulator with pixelization patterns: Provided is an optical modulator having pixelization patterns. The optical modulator includes an optical-electric (O-E) conversion element converting input optical images to current signals using the photoelectric effect, and an electric-optical (E-O) conversion element that emits light using the current signals transferred from the O-E conversion element. Trenches are formed... Agent: Sughrue Mion, PLLC

20100163890 - Led lighting device: An LED lighting device comprising an integral body comprising a dielectric thermally conductive polymer has an electrically conductive material directly attached to, or at least in part is molded within the body and forms a circuit pattern. Two or more LED die each having at least a portion thereof being... Agent: Factor & Lake, Ltd

20100163891 - Light emitting diode: An LED includes a substrate, two LED dies mounted on the substrate, an encapsulant molded on the substrate and sealing the two LED dies, and two phosphors contained within the encapsulant and surrounding the two LED dies, respectively. The two phosphors are distributed on the two LED dies in same... Agent: PCe Industry, Inc. Att. Steven Reiss

20100163892 - Led device and method of packaging the same: A light emitting diode (LED) device including a transparent substrate, a plurality of LED chips, a circuit, and a transparent encapsulant is provided. The LED chips are fixed on the transparent substrate, and utilized for radiating at least a light beam. The circuit is disposed on the transparent substrate and... Agent: North America Intellectual Property Corporation

20100163893 - Semiconductor light emitting device: The semiconductor light emitting device comprises a second electrode layer; a light emitting structure comprising a plurality of compound semiconductor layers under the second electrode layer; at least one dividing groove that divides inner areas of the lower layers of the light emitting structure into a plurality of areas; and... Agent: Birch Stewart Kolasch & Birch

20100163894 - Group iii nitride-based compound semiconductor light-emitting device: In the Group III nitride-based compound semiconductor light-emitting device of the invention, an non-light-emitting area is formed in a light-emitting layer. In a light-emitting diode where light is extracted on the side of an n-layer, an outer wiring trace portion and an inner wiring trace portion of an n-contact electrode... Agent: Mcginn Intellectual Property Law Group, PLLC

20100163907 - Chip level package of light-emitting diode: The application discloses a light-emitting diode chip level package structure including: a permanent substrate having a first surface and a second surface; a first electrode on the first surface; a second electrode on the second surface; an adhesive layer on where the first surface of the permanent substrate is not... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100163911 - Electrode structures for leds with increased active area: An electrode structure is disclosed for enhancing the brightness and/or efficiency of an LED. The electrode structure can have a metal electrode and an optically transmissive thick dielectric material formed intermediate the electrode and a light emitting semiconductor material. The electrode and the thick dielectric cooperate to reflect light from... Agent: Haynes And Boone, LLPIPSection

20100163897 - Flexible light source device and fabrication method thereof: A flexible light source device including a substrate, a light emitting device, a molding compound, a dielectric layer, and a metal line is provided. The substrate has a first surface, a second surface opposite to the first surface, and a first opening. The light emitting device is disposed on the... Agent: Jianq Chyun Intellectual Property Office

20100163913 - Lamp and method of producing a lamp: A method of producing a lamp, including: mounting light emitting junctions in respective receptacles; mounting the receptacles on a curved support structure so as to form a three-dimensional array; and placing the light emitting junctions in electrical connection with the support structure.... Agent: Knobbe Martens Olson & Bear LLP

20100163895 - Light emitting device: Provided is a compound light emitting device which facilitates easy connection of power supply lines, and has a high emission intensity in-plane uniformity. The light emitting device includes a first-conduction-type cladding layer, active layer structure, and second-conduction-type cladding layer each containing a III-V compound semiconductor. The first-conduction-type cladding layer and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100163902 - Light emitting device: Disclosed is a light emitting device. The light emitting device includes a light emitting structure comprising an active layer to generate first light, a first conductive semiconductor layer on the active layer, and a second conductive semiconductor layer on the active layer so that the active layer is disposed between... Agent: Birch Stewart Kolasch & Birch

20100163914 - Light emitting device: A light emitting device, in which an encapsulation resin is disposed at a space confined between an optical member and a mounting substrate. This encapsulation resin is possibly made free from a void-generation therein. In this light emitting device, the optical member can be precisely positioned. An electrode disposed outside... Agent: Edwards Angell Palmer & Dodge LLP

20100163900 - Light emitting device having plurality of non-polar light emitting cells and method of fabricating the same: Disclosed are a light emitting device having a plurality of non-polar light emitting cells and a method of fabricating the same. This method comprises preparing a first substrate of sapphire or silicon carbide having an upper surface with an r-plane, an a-plane or an m-plane. The first substrate has stripe-shaped... Agent: H.c. Park & Associates, PLC

20100163908 - Light emitting device having vertical structrue and method for manufacturing the same: A light emitting device having a vertical structure and a method for manufacturing the same, which are capable of damping impact generated during a substrate separation process and achieving an improvement in mass productivity, are disclosed. The light emitting device includes a semiconductor layer having a multilayer structure, a first... Agent: Mckenna Long & Aldridge LLP

20100163905 - Light emitting device package: A light emitting device package and a method for manufacturing the same are provided. The light emitting device package comprises a package body including a cavity disposed at an upper portion. The light emitting device package includes an insulating layer disposed on a surface of the package body. The light... Agent: Birch Stewart Kolasch & Birch

20100163906 - Light emitting device with air bars and method of manufacturing the same: Disclosed are a light emitting device having at least one air bar capable of improving light extracting efficiency and a method of manufacturing the same. With the present invention, there is provided a method of manufacturing a light emitting device including a semiconductor layer(s) having an air-bar layer(s) with a... Agent: Dilworth & Barrese, LLP

20100163910 - Light emitting diode: An LED chip (1) grown on an electrically insulating substrate (4) comprises a lower current-distributing layer (5) of a first conductivity type, a first electrode (2), a vertical layer structure (5, 6, 7), the last two being formed on the lower current-distributing layer horizontally separated from each other, the vertical... Agent: Fay Sharpe LLP

20100163898 - Light emitting diode apparatus: A light emitting diode apparatus comprises a substrate having a circuit pattern, a reflection layer disposed on the substrate, at least one light emitting element disposed on the reflection layer, a reflector disposed around the at least one light emitting element, a sealing material formed over the at least one... Agent: Wpat, PC Intellectual Property Attorneys

20100163909 - Manufacturing method and structure of light-emitting diode with multilayered optical lens: A manufacturing method and a structure of a light-emitting diode (LED) with a multilayered optical lens are provided. The manufacturing method includes the steps of: providing an LED chip; forming at least one inner protective layer covering the LED chip and its wire connecting points; and forming an outer protective... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20100163896 - Nitride red phosphors and white light emitting diode using rare-earth-co-doped nitride red phosphors: Disclosed are nitride red phosphors and white light emitting diodes using the same. More particularly, the present invention provides a nitride red phosphor with easily controlled composition of phosphor fraction and improved uniformity and color gamut thereof, a method for preparation thereof, a white light emitting diode with excellent color... Agent: Baker & Hostetler LLP

20100163901 - Nitride semiconductor light emitting element: In a nitride semiconductor light emitting element, a light transmitting substrate has an upper surface on which a nitride semiconductor layer including at least a light emitting layer is formed. On the upper surface of the light transmitting substrate, recess regions and rise regions are formed. One of each of... Agent: Morrison & Foerster LLP

20100163912 - Nitride-based semiconductor light emitting device and method of manufacturing the same: A nitride-based semiconductor light emitting device having an improved structure in which light extraction efficiency is improved and a method of manufacturing the same are provided. The nitride-based semiconductor light emitting device comprises an n-clad layer, an active layer, and a p-clad layer, which are sequentially stacked on a substrate,... Agent: Buchanan, Ingersoll & Rooney PC

20100163903 - Semiconductor light emitting device: A semiconductor light emitting device is provided. The semiconductor light emitting device comprises a plurality of compound semiconductor layers including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer, and a layer of the plurality of compound semiconductor layers comprising a roughness comprising a sapphire... Agent: Birch Stewart Kolasch & Birch

20100163904 - Semiconductor light-emitting device and light-emitting device package having the same: Provided are a semiconductor light-emitting device and a light-emitting device package having the same. The semiconductor light-emitting device comprises a light-emitting structure, a first electrode unit, and a second electrode layer. The light-emitting structure comprises a plurality of compound semiconductor layers having a rounded side surface at an outer edge.... Agent: Ked & Associates, LLP

20100163899 - White light emitting device: A white light emitting device is disclosed. The white light emitting device includes a blue light emitting diode (LED) including a plurality of active layers generating different peak wavelengths, and phosphors emitting yellow light when excited by light emitted from the blue LED. The white light emitting device ensures enhanced... Agent: Mcdermott Will & Emery LLP

20100163916 - Full-cover light-emitting diode light bar and method for manufacturing the same: In a full-cover light-emitting diode light bar that can withstand a large bending deformation, a first lead and a second lead are juxtaposed with a distance. An insulating layer having a slot is formed on the first lead and the second lead via a hot pressing process. A crystal-receiving section... Agent: Hdls Patent & Trademark Services

20100163918 - Led package: The present invention relates to an LED package including a lead frame including a chip attaching portion with at least one LED chip attached thereto and a plurality of terminal portions each having a width narrower than the chip attaching portion, and a housing for supporting the lead frame. The... Agent: H.c. Park & Associates, PLC

20100163917 - Light-emitting diode light bar and method for manufacturing the same: In a light-emitting diode light bar of a light-emitting device, a first lead and a second lead are juxtaposed with a distance. A light-emitting diode crystal has a first electrode and a second electrode. Then, the first electrode is electrically fixed to the first lead. The second electrode is electrically... Agent: Hdls Patent & Trademark Services

20100163919 - Lighting device: Provided is a lighting device which includes a lead frame embedded in a glass material and has high reliability. The lighting device has a structure in which a light emitting element is mounted in a recess portion formed on a surface of a glass substrate and a sealing material is... Agent: Bruce L. Adams, Esq Adams & Wilks

20100163921 - Semiconductor chip assembly with aluminum post/base heat spreader and silver/copper conductive trace: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The heat spreader is aluminum and includes a post and a base. The post extends upwardly... Agent: David M. Sigmond

20100163920 - Semiconductor light emitting device: A semiconductor light emitting device (A) includes a resin package (5), a semiconductor light emitting element (4), a first lead (1A) and a second lead (1B). The resin package (5) has an upper surface and a bottom surface, and has translucency. The semiconductor light emitting element (4) is covered with... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20100163915 - Thin-film semiconductor component and component assembly: A thin-film semiconductor component having a carrier layer and a layer stack which is arranged on the carrier layer, the layer stack containing a semiconductor material and being provided for emitting radiation, wherein a heat dissipating layer provided for cooling the semiconductor component is applied on the carrier layer. A... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100163922 - Insulated gate semiconductor device: By integrating a diode and a resistor connected in parallel into the same chip as an IGBT and connecting a cathode of the diode to a gate of the IGBT, the value of dv/dt can be limited to a predetermined range inside the chip of the IGBT without a deterioration... Agent: Morrison & Foerster LLP

20100163923 - Semiconductor device and method of manufacturing the same: A semiconductor device may include a semiconductor substrate having a first deep N well and/or a second deep N well, a first isolation layer over a first deep N well, and/or a first P well over a first deep N well. A semiconductor device may include an NMOS transistor over... Agent: Sherr & Vaughn, PLLC

20100163924 - Lateral silicon controlled rectifier structure: A lateral silicon controlled rectifier structure includes a P-type substrate; an N-well region in the P-type substrate; a first P+ doped region in the N-well region and being connected to an anode; a P-well region in the P-type substrate and bordering upon the N-well region; a first N+ doped region... Agent: North America Intellectual Property Corporation

20100163925 - Avalanche photodiode: In an electron-injection type APD, it is necessary to prevent a dark current increase and to secure the life time of the device. It is demanded to improve reliability of the APD with a lower production cost. With the InP buffer layer having an n-type doping region on the inside... Agent: Workman Nydegger 1000 Eagle Gate Tower

20100163926 - Modulation-doped multi-gate devices: Modulation-doped multi-gate devices are generally described. In one example, an apparatus includes a semiconductor substrate having a surface, one or more buffer films coupled to the surface of the semiconductor substrate, a first barrier film coupled to the one or more buffer films, a multi-gate fin coupled to the first... Agent: Cool Patent, P.C. C/o Cpa Global

20100163927 - Apparatus and methods for forming a modulation doped non-planar transistor: Embodiments of an apparatus and methods for providing three-dimensional complementary metal oxide semiconductor devices comprising modulation doped transistors are generally described herein. Other embodiments may be described and claimed.... Agent: Intel Corporation C/o Cpa Global

20100163928 - Compound semiconductor device and manufacturing method of the same: An i-GaN layer (electron transit layer), an n-GaN layer (compound semiconductor layer) formed over the i-GaN layer (electron transit layer), and a source electrode, a drain electrode and a gate electrode formed over the n-GaN layer (compound semiconductor layer) are provided. A recess portion is formed inside an area between... Agent: Fujitsu Management Services Of America, Inc.

20100163929 - Compound semiconductor device and manufacturing method thereof: A compound semiconductor device includes a carrier transit layer formed over a substrate; a carrier supply layer formed over the carrier transit layer; a first metal film and a second metal film formed over the carrier supply layer; a first Al comprising film formed over the first metal film; a... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100163930 - Semiconductor device and its manufacturing method: As illustrated in FIG. 1B, a first insulating layer 103 is formed. Then, as illustrated in FIG. 1C, a photolithography process is carried out to form a photoresist pattern 104. Subsequently, as illustrated in FIG. 1D, dry etching is applied to the first insulating layer 103. Then, as illustrated in... Agent: Birch Stewart Kolasch & Birch

20100163931 - Group iii-v nitride layer and method for producing the same: There is disclosed a hexagonal Group III-V nitride layer exhibiting high quality crystallinity capable of improving the properties of a semiconductor device such as a light emitting element. This nitride layer is a Group III-V nitride layer belonging to hexagonal crystal formed by growth on a substrate having a different... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100163932 - Image sensor and method for manufacturing thereof: An image sensor may include a readout circuit formed over a first substrate made of InSb, the first substrate including a pixel part and a periphery part. A wiring and interlayer dielectric layer may be formed over the first substrate including the readout circuit. A photodiode may be formed over... Agent: Sherr & Vaughn, PLLC

20100163933 - Antiblooming imaging apparatus, systems, and methods: Apparatus, systems, and methods are described to assist in reducing dark current in an active pixel sensor. In various embodiments, a potential barrier arrangement is configured to block the flow of charge carriers generated outside a photosensitive region. In various embodiments, a potential well-potential barrier arrangement is formed to direct... Agent: Schwegman, Lundberg & Woessner/micron

20100163934 - Method for fabricating a junction field effect transistor and the junction field effect transistor itself: A method for fabricating a junction field effect transistor includes the steps of the type I semiconductor at the base thereof being doped with the type II semiconductor to form a type II well with a hole; then, a drive-in process of the type II semiconductor is performed to allow... Agent: G. Link Co., Ltd.

20100163935 - Semiconductor device and method of manufacturing the same: In a junction FET of a normally-off type, a technique capable of achieving both of improvement of a blocking voltage and reduction of an ON resistance is provided. In a junction FET using silicon carbide as a substrate material, impurities are doped to a vicinity of a p-n junction between... Agent: Miles & Stockbridge PC

20100163936 - Structure and method for fabrication of field effect transistor gates with or without field plates: A method for fabrication of a field effect transistor gate, with or without field plates, includes the steps of defining a relatively thin Schottky metal layer by a lithography/metal liftoff or metal deposition/etch process on a semiconductor surface. This is followed by depositing a dielectric passivation layer over the entire... Agent: Bae Systems

20100163938 - Method for forming silicide in semiconductor device: A method of forming a silicide in a semiconductor device includes: forming a poly gate on and/or over the upper portion of a silicon substrate having an active area and an STI formed therein; forming a spacer wall on and/or over both sidewalls of the poly gate; forming source/drain by... Agent: Sherr & Vaughn, PLLC

20100163937 - Methods of forming nickel sulfide film on a semiconductor device: Embodiments of the present invention describe a method of forming nickel sulfide layer on a semiconductor device. A nickel sulfide layer is formed on a substrate by alternatingly exposing the substrate to a nickel-containing precursor and a sulfur-containing precursor.... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100163939 - Transistor device comprising an embedded semiconductor alloy having an asymmetric configuration: In sophisticated semiconductor devices, an asymmetric transistor configuration may be obtained on the basis of a strain-inducing semiconductor alloy. To this end, strain relaxation implantation processes may be performed at the drain side according to some illustrative embodiments, while, in other cases, the deposition of the strain-inducing alloy may be... Agent: Williams, Morgan & Amerson

20100163942 - Cmos image sensor having double gate insulator therein and method for manufacturing the same: A method for manufacturing a CMOS image sensor includes: preparing a semiconductor substrate incorporating therein a p-type epitaxial layer by epitaxially growing up an upper portion of the semiconductor substrate; forming a pixel array in one predetermined location of the semiconductor substrate, the pixel array having a plurality of transistors... Agent: Mcandrews Held & Malloy, Ltd

20100163940 - Image sensor and method for manufacturing the same: Provided are an image sensor and a method for manufacturing the same. The image sensor comprises a photodiode, a floating diffusion region, a reset transistor, and a drive transistor. The photodiode generates photocharges. The floating diffusion region accumulates the photocharges. The reset transistor has a source connected to the floating... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100163941 - Image sensor and method for manufacturing the same: An image sensor and a method for manufacturing the same that includes readout circuitry, an electrical junction region, an interconnection, an image sensing device, and an infrared filter. The readout circuitry and the electrical junction region are formed in a first substrate and are electrically connected to each other. The... Agent: Sherr & Vaughn, PLLC

20100163943 - Semiconductor memory device: A memory includes a first interlayer on transistors; a first and second plugs connected to the transistor; ferroelectric capacitors; a second interlayer covering a side surface of the capacitor; a local interconnection connecting the second plug to the upper electrode, wherein two upper electrodes adjacent to each other on the... Agent: Knobbe Martens Olson & Bear LLP

20100163944 - Semiconductor memory device and manufacturing method therefor: A semiconductor memory device includes a switching transistor provided on a semiconductor substrate; an interlayer dielectric film on the switching transistor; a contact plug in the interlayer dielectric film; a ferroelectric capacitor above the contact plug and the interlayer dielectric film, the ferroelectric capacitor comprising a lower electrode, a ferroelectric... Agent: Knobbe Martens Olson & Bear LLP

20100163945 - Embedded memory cell and method of manufacturing same: An embedded memory cell includes a semiconducting substrate (110), a transistor (120) having a source/drain region (121) at least partially embedded in the semiconducting substrate, and a capacitor (130) at least partially embedded in the semiconducting substrate. The capacitor includes a first electrode (131) and a second electrode (132) that... Agent: Intel Corporation C/o Cpa Global

20100163948 - Integrated circuit having efficiently packed decoupling capacitors: An integrated circuit includes a substrate having a semiconducting surface (605) and a plurality of standard cells arranged in a plurality of rows including at least a first row (610) and a second row (615) immediately above the first row. The first row (610) include at least a first decap... Agent: Texas Instruments Incorporated

20100163947 - Method for fabricating pip capacitor: A PIP capacitor and methods thereof. A method of fabricating a PIP capacitor may include forming a field oxide film over a silicon substrate to define a device isolating region and/or an active region. A method of fabricating a PIP capacitor may include forming a lower polysilicon electrode having doped... Agent: Sherr & Vaughn, PLLC

20100163946 - Semicondcutor device having vertical gate and method for fabricating the same: A method for fabricating a semiconductor device includes forming buried bit lines separated from each other by a trench in a substrate, forming a plurality of first pillar holes that expose a top surface of the substrate, forming first active pillars buried in the first pillar holes, forming a gate... Agent: Ip & T Law Firm PLC

20100163950 - Power device with monolithically integrated rc snubber: A semiconductor structure includes a power transistor monolithically integrated with a RC snubber in a die. The power transistor includes body regions extending in a silicon region, gate electrodes insulated from the body region by a gate dielectric, source regions extending in the body regions, the source and the body... Agent: Townsend And Townsend And Crew, LLP

20100163949 - Vertical metal-insulator-metal (mim) capacitor using gate stack, gate spacer and contact via: A semiconductor structure including a vertical metal-insulator-metal capacitor, and a method for fabricating the semiconductor structure including the vertical metal-insulator-metal capacitor, each use structural components from a dummy metal oxide semiconductor field effect transistor located and formed over an isolation region located over a semiconductor substrate. The dummy metal oxide... Agent: Scully, Scott, Murphy & Presser, P.C.

20100163951 - Flash memory device and manufacturing method of the same: A flash memory device is disclosed including: a device isolation layer and an active area formed on a semiconductor substrate in which a source plate and a bit line area are defined; a memory gate formed over the active area of the bit line area; a control gate formed on... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100163952 - Flash cell with integrated high-k dielectric and metal-based control gate: A semiconductor device is described having an integrated high-k dielectric layer and metal control gate. A method of fabricating the same is described. Embodiments of the semiconductor device include a high-k dielectric layer disposed on a floating gate. The high-k dielectric layer defines a recess. A metal control gate is... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100163954 - Flash memory device and method for manufacturing the same: Disclosed are a dual bit type NROM flash memory device and a method for manufacturing the same using a self-aligned scheme. The flash memory device includes a plurality of bit lines buried in a substrate in one direction while being spaced apart from each other at a regular interval; floating... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100163953 - Semiconductor device and method of manufacturing the same: Disclosed are a semiconductor device and a method of manufacturing the same. The semiconductor device includes a first polysilicon pattern formed on a semiconductor substrate, a second polysilicon pattern formed at a lateral side of the first polysilicon pattern such that the second polysilicon pattern extends to a height higher... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100163956 - Eeprom device and method of manufacturing the same: An EEPROM device may have, at the region where the control gate is formed, a gate oxide layer having a relatively smaller thickness than the gate oxide layer of the tunneling region by removing the gate oxide layer, at a predetermined thickness, at the region where the control gate is... Agent: Sherr & Vaughn, PLLC

20100163957 - Nonvolatile semiconductor memory device including memory cells formed to have double-layered gate electrodes: A nonvolatile semiconductor memory device includes a plurality of floating gate electrodes respectively formed above a semiconductor substrate with first insulating films disposed therebetween, and a control gate electrode formed above the plurality of floating gate electrodes with a second insulating film disposed therebetween. In each of the plurality of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100163955 - Semiconductor memory device and manufacturing method of semiconductor memory device: A semiconductor memory device is provided including: a spacer shaped floating gate formed on a semiconductor substrate; a dielectric layer spacer formed at one side wall of the floating gate; a third oxide layer formed over the floating gate and the dielectric layer; and a control gate formed over the... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100163958 - Single-poly eeprom cell and method for fabricating the same: A single-poly EEPROM cell and a method for fabricating the same include a single floating gate formed in a single body; first and second read transistors sharing the single floating gate; and a control gate spaced apart from the first and second read transistors and overlapped with the floating gate.... Agent: Sherr & Vaughn, PLLC

20100163959 - Etch stop structures for floating gate devices: Etch stop structures for floating gate devices are generally described. In one example, a floating gate device includes a semiconductor substrate having a surface on which one or more floating gate devices are formed, a tunnel dielectric coupled with the surface of the semiconductor substrate, a floating gate structure coupled... Agent: Cool Patent, P.C. C/o Cpa Global

20100163960 - Flash memory device and method of manufacturing the same: Disclosed is a flash memory device and a method of manufacturing the same. The flash memory device includes a floating gate formed on a semiconductor substrate, a select gate self-aligned on one sidewall of the floating gate, and an ONO pattern interposed between the floating gate and the select gate.... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100163961 - Method for manufacturing semiconductor flash memory and flash memory cell: A semiconductor flash memory includes a tunnel oxide film formed over a semiconductor substrate, a first spacer composed of polysilicon formed over the semiconductor substrate including the tunnel oxide film, a second spacer composed of an insulating material formed at sidewalls of the first spacer, a dielectric film formed at... Agent: Sherr & Vaughn, PLLC

20100163962 - Printed non-volatile memory: A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20100163965 - Flash memory device and manufacturing method of the same: Disclosed are a flash memory device and a method for manufacturing the same. The flash memory device includes a floating gate including adjacent first and second floating gates on a substrate; first and second select gates respectively on the first and second floating gates; an insulating layer between the first... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100163966 - Flash memory device and manufacturing method of the same: Disclosed are a flash memory device and a method for manufacturing the same. The flash memory device includes first and second memory gates on a substrate; a floating poly between the first and second memory gates; first and second select gates at respective outer sides of the first and second... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100163967 - Flash memory device and method of fabricating the same: A flash memory device and a method for fabricating the same are disclosed. The flash memory device includes an ONO layer on a substrate, polysilicon gates on the ONO layer, a gate oxide layer on the substrate, the ONO layer and the polysilicon gates, and a low temperature oxide layer... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20100163964 - Method for manufacturing flash memory device: A method of manufacturing a flash memory device and devices thereof, which may be capable of preventing damage to a gate. A method of manufacturing a flash memory device may include preparing a semiconductor substrate having an active region defined by a device separator. A method of manufacturing a flash... Agent: Sherr & Vaughn, PLLC

20100163963 - Nonvolatile memory device and method of fabricating the same: There is provided a nonvolatile memory device having a tunnel dielectric layer formed over a substrate, the charge capturing layer formed over the tunnel dielectric layer and including a combination of at least one charge storage layer and at least one charge trap layer, a charge blocking layer formed over... Agent: Lowe Hauptman Ham & Berner, LLP

20100163968 - Semiconductor memory device having insulation patterns and cell gate patterns: Semiconductor memory devices and methods of forming semiconductor memory devices are provided. The methods may include forming insulation layers and cell gate layers that are alternately stacked on a substrate, forming an opening by successively patterning through the cell gate layers and the insulation layers, and forming selectively conductive barriers... Agent: Myers Bigel Sibley & Sajovec

20100163969 - Flash memory device and manufacturing method the same: A flash memory device and a method of manufacturing a flash memory device. A flash memory device may include an isolation layer and/or an active area over a semiconductor substrate, a memory gate formed over an active area, a control gate formed over a semiconductor substrate including a memory gate,... Agent: Sherr & Vaughn, PLLC

20100163971 - Dielectric punch-through stoppers for forming finfets having dual fin heights: A semiconductor structure includes a semiconductor substrate having a first portion and a second portion. A first Fin field-effect transistor (FinFET) is formed over the first portion of the semiconductor substrate, wherein the first FinFET includes a first fin having a first fin height. A second FinFET is formed over... Agent: Slater & Matsil, L.L.P.

20100163970 - Trigate transistor having extended metal gate electrode: A trigate device having an extended metal gate electrode comprises a semiconductor body having a top surface and opposing sidewalls formed on a substrate, an isolation layer formed on the substrate and around the semiconductor body, wherein a portion of the semiconductor body remains exposed above the isolation layer, and... Agent: Intel Corporation C/o Cpa Global

20100163972 - Multi-drain semiconductor power device and edge-termination structure thereof: An embodiment of a semiconductor power device provided with: a structural body made of semiconductor material with a first conductivity, having an active area housing one or more elementary electronic components and an edge area delimiting externally the active area; and charge-balance structures, constituted by regions doped with a second... Agent: Graybeal Jackson LLP

20100163973 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a P-type substrate 1, an N-type buried layer 2, a P-type buried layer 3, N-type epitaxial layers 4, P-type diffusion layers 6, P-type diffusion layers 8, P-type diffusion layers 11, first electrodes formed on the P-type diffusion layers 11, N-type diffusion layers 9, P-type diffusion layers... Agent: Turocy & Watson, LLP

20100163974 - Semiconductor device with vertical channel transistor and method for fabricating the same: A method for fabricating a semiconductor device including a vertical channel transistor includes providing a substrate including a semiconductor pillar, forming a gate electrode surrounding the semiconductor pillar, forming an impurity region for a bit line by doping impurities into the substrate and forming a device isolation trench by etching... Agent: Ip & T Law Firm PLC

20100163976 - Semiconductor device having saddle fin transistor and method for fabricating the same: A method for fabricating a semiconductor device includes forming a pad nitride layer that exposes an isolation region over a cell region of a semiconductor substrate; forming a trench in the isolation region of the semiconductor substrate; forming an isolation layer within the trench; etching an active region of the... Agent: Marshall, Gerstein & Borun LLP

20100163975 - Trench metal oxide semiconductor field effect transistor (mosfet) with low gate to drain coupled charges (qgd) structures: A trenched semiconductor power device includes a plurality of trenched gates surrounded by source regions near a top surface of a semiconductor substrate encompassed in body regions. The trenched semiconductor power device further comprises tilt-angle implanted body dopant regions surrounding a lower portion of trench sidewalls for reducing a gate-to-drain... Agent: Bo-in Lin

20100163977 - Semiconductor device and method for fabricating the same: A method for fabricating a semiconductor device includes forming a trench in a substrate, forming a gate electrode buried over the trench to form a buried gate pattern, etching portions of the substrate on both sides of the buried gate pattern to a certain depth, performing an ion implantation process... Agent: Ip & T Law Firm PLC

20100163978 - Method for manufacturing an integrated power device on a semiconductor substrate and corresponding device: An embodiment of a method for manufacturing a power device being integrated on a semiconductor substrate comprising at least the steps of making, in the semiconductor substrate, at least a trench having sidewalls and a bottom, covering the sidewalls and the bottom of said at least one trench with a... Agent: Graybeal Jackson LLP

20100163980 - Semiconductor device and method of manufacturing the same: A semiconductor device includes an isolation layer formed on and/or over a semiconductor substrate to define an isolation layer, a drift area formed in an active area separated by the isolation layer, a pad nitride layer pattern formed in a form of a plate on the drift area, and a... Agent: Sherr & Vaughn, PLLC

20100163981 - Semiconductor device and method of manufacturing the same: A semiconductor device includes: an active region defined by a device isolation layer on and/or over a substrate; a second conductive well on and/or over the active region; an extended drain formed at one side of the second conductive well; a gate electrode on and/or over the second conductive well... Agent: Sherr & Vaughn, PLLC

20100163982 - Semiconductor device for high voltage and method for manufacturing the same: A semiconductor device which may be for a high voltage and a method of manufacturing the same. A semiconductor device may include a first conductivity-type well formed on and/or over a substrate, a second conductivity-type drift region formed on and/or over a first conductivity-type well, an isolation layer formed on... Agent: Sherr & Vaughn, PLLC

20100163979 - True csp power mosfet based on bottom-source ldmos: A semiconductor package may comprise a semiconductor substrate, a MOSFET device having a plurality cells formed on the substrate, and a source region common to all cells disposed on a bottom of the substrate. Each cell comprises a drain region on a top of the semiconductor device, a gate to... Agent: Joshua D. Isenberg Jdi Patent

20100163983 - Semiconductor device and method for fabricating the same: Semiconductor devices and methods for fabricating the same are disclosed. The semiconductor device includes gate electrodes having sidewall spacers on a semiconductor substrate, double diffusion drain regions in the semiconductor substrate adjacent to the sidewall spacers, double diffusion junction regions aligned with the gate electrodes, and source/drain regions in the... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20100163984 - Lateral double diffused metal oxide semiconductor: Disclosed are lateral double diffused metal oxide semiconductor (LDMOS) transistors having a uniform threshold voltage and methods for manufacturing the same. The methods include forming a polysilicon layer over the semiconductor substrate including a shallow trench isolation region, etching a portion of the polysilicon layer over an active region, implanting... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20100163985 - Semiconductor and method for manufacturing the same: A semiconductor includes a high voltage region formed in a substrate, first and second drift regions formed in the high voltage region, an isolation layer in the high voltage region, a gate formed on and/or over the first and second drift regions, and a drain and a source formed in... Agent: Sherr & Vaughn, PLLC

20100163986 - Semiconductor device and method for fabricating the same: A semiconductor device and a method of manufacturing a semiconductor device. A method may include forming a first well by injecting first conduction type impurity ions on and/or over a semiconductor substrate, forming an extended drain region overlapped with a region of said first well by injecting second conduction type... Agent: Sherr & Vaughn, PLLC

20100163987 - Semiconductor device: Semiconductor device including semiconductor layer, first impurity region on surface layer portion of semiconductor layer, body region at interval from first impurity region, second impurity region on surface layer portion of body region, field insulating film at interval from second impurity region, gate insulating film on surface of the semiconductor... Agent: Rabin & Berdo, PC

20100163988 - High voltage (>100v) lateral trench power mosfet with low specific-on-resistance: In one aspect, a lateral MOS device is provided. The lateral MOS device includes a gate electrode disposed at least partially in a gate trench to apply a voltage to a channel region, and a drain electrode spaced from the gate electrode, and in electrical communication with a drift region... Agent: Wolf Greenfield & Sacks, P.C.

20100163990 - Lateral double diffused metal oxide semiconductor device: Disclosed is a lateral double diffused metal oxide semiconductor (LDMOS) device and methods of making the same. The LDMOS device may include a semiconductor substrate comprising a buried region and a first well region, a gate on the semiconductor substrate, a body region in the first well region and a... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20100163991 - Laterally double-diffused metal oxide semiconductor, and method for fabricating the same: A laterally double-diffused metal oxide semiconductor (LDMOS) and a method for fabrication thereof includes a well region formed in a semiconductor substrate having an active region defined by device isolation layers, a body region formed over the well region, a drain region spaced from the body region at a constant... Agent: Sherr & Vaughn, PLLC

20100163992 - Semiconductor device and method for fabricating the same: A semiconductor device includes a high voltage first conduction type well in a semiconductor substrate, a second conduction type body in the high voltage first conduction type well, a source region in the second conduction type body, a trench in the high voltage first conduction type well, a first isolation... Agent: Sherr & Vaughn, PLLC

20100163989 - Semiconductor structure and fabrication method thereof: A method for fabrication of a semiconductor device is provided. A first type doped body region is formed in a first type substrate. A first type heavily-doped region is formed in the first type doped body region. A second type well region and second type bar regions are formed in... Agent: Quintero Law Office, PC

20100163993 - Method of fabricating a semiconductor on insulator device having a frontside substrate contact: A method of forming a substrate contact in a semiconductor device, comprising the steps of providing a semiconductor base substrate (2) having a buried oxide (BOX) layer (4) and a thin active semiconductor layer (103) on the BOX layer (4), forming a trench (104) in the active semiconductor layer (103)... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100163995 - Semiconductor device with cooling element: Some embodiments discussed herein include a semiconductor having a source region, a drain region and an array of fins operatively coupled to a gate region controlling current flow through the fins between the source region and the drain region. The semiconductor also has at least one cooling element formed at... Agent: Infineon Technologies Ag Patent Department

20100163994 - Soi device with a buried insulating material having increased etch resistivity: In SOI devices, the PN junction of circuit elements, such as substrate diodes, is formed in the substrate material on the basis of the buried insulating material that provides increased etch resistivity during wet chemical cleaning and etch processes. Consequently, undue exposure of the PN junction formed in the vicinity... Agent: Advanced Mirco Devices, Inc. C/o Williams, Morgan & Amerson

20100163996 - Method for manufacturing cmos circuits and cmos circuits manufactured thereof: A method of manufacturing transistors of a first and second type on a substrate includes producing doped semiconductor areas with a first conductivity type in eventual contact areas of a first type of transistors, depositing a first intrinsic semiconductor layer over an entire surface, activating dopants in the semiconductor areas... Agent: Striker, Striker & Stenby

20100163997 - Epitaxial deposition-based processes for reducing gate dielectric thinning at trench edges and integrated circuits therefrom: A method of fabricating an integrated circuit (IC) and ICs therefrom including a plurality of Metal Oxide Semiconductor (MOS) transistors having reduced gate dielectric thinning and corner sharpening at the trench isolation/semiconductor edge for gate dielectric layers generally 500 to 5,000 Angstroms thick. The method includes providing a substrate having... Agent: Texas Instruments Incorporated

20100163999 - Semiconductor element and method of manufacturing the same: A semiconductor element according to embodiments may include: a semiconductor substrate, a first oxide layer pattern formed over the semiconductor substrate, and a first polysilicon pattern formed over the first oxide layer pattern, wherein the substrate, the first oxide layer pattern and the first polysilicon pattern define a recess formed... Agent: Sherr & Vaughn, PLLC

20100164000 - Strained transistor and method for forming the same: According to one embodiment, a semiconductor substrate is provided having at least two transistor regions formed therein. Overlying the channel regions is a gate dielectric and transistor gate electrodes overly the gate dielectric and are positioned overlying the channel regions. Source and drain regions are formed on either side of... Agent: Stmicroelectronics, Inc.

20100163998 - Trench isolation comprising process having multiple gate dielectric thicknesses and integrated circuits therefrom: A method of fabricating an integrated circuit (IC) including a first plurality of MOS transistors having a first gate dielectric having a first thickness in first regions, and a second plurality of MOS transistors having a second gate dielectric having a second thickness in second regions, wherein the first thickness<the... Agent: Texas Instruments Incorporated

20100164002 - Dual salicide integration for salicide through trench contacts and structures formed thereby: Methods and associated structures of forming a microelectronic device are described. Those methods may include forming an NMOS silicide on an NMOS source/drain contact area, forming a first contact metal on the NMOS silicide, polishing the first contact metal to expose a top surface of a PMOS source/drain region, and... Agent: Intel Corporation C/o Cpa Global

20100164006 - Gate dielectric first replacement gate processes and integrated circuits therefrom: A method for fabricating a CMOS integrated circuit (IC) and ICs therefrom includes the steps of providing a substrate having a semiconductor surface, wherein the semiconductor surface has PMOS regions for PMOS devices and NMOS regions for NMOS devices. A gate dielectric layer is formed on the PMOS regions and... Agent: Texas Instruments Incorporated

20100164001 - Implant process for blocked salicide poly resistor and structures formed thereby: Methods and associated structures of forming a microelectronic device are described. Those methods may include implanting an exposed p type silicon portion of a substrate with a carbon species, wherein endcap regions of a blocked salicide resistor and a p type structure that are both disposed on the exposed p... Agent: Intel Corporation C/o Cpa Global

20100164008 - Method for integration of replacement gate in cmos flow: Semiconductor devices and fabrication methods are provided, in which metal transistor replacement gates are provided for CMOS transistors. The process provides dual or differentiated work function capability (e.g., for PMOS and NMOS transistors) in CMOS processes.... Agent: Texas Instruments Incorporated

20100164009 - Method of manufacturing dual gate semiconductor device: The method involves providing a semiconductor substrate comprising first and second regions in which different conductive metal-oxide semiconductor (MOS) transistors are to be formed. A gate dielectric layer above the semiconductor substrate sequentially forming a first metallic conductive layer and a second metallic conductive layer on and above the gate... Agent: Harness, Dickey & Pierce, P.L.C

20100164004 - Methods for reducing gate dielectric thinning on trench isolation edges and integrated circuits therefrom: A method of fabricating an integrated circuit (IC) including a plurality of MOS transistors and ICs therefrom include providing a substrate having a silicon including surface, and forming a plurality of dielectric filled trench isolation regions in the substrate, wherein the silicon including surface forms trench isolation active area edges... Agent: Texas Instruments Incorporated

20100164003 - Multiple indium implant methods and devices and integrated circuits therefrom: An integrated circuit (IC) includes at least one NMOS transistor, wherein the NMOS transistor includes a substrate having a semiconductor surface, and a gate stack formed in or on the surface including a gate electrode on a gate dielectric, wherein a channel region is located in the semiconductor surface below... Agent: Texas Instruments Incorporated

20100164005 - Selective wet etch process for cmos ics having embedded strain inducing regions and integrated circuits therefrom: A method for fabricating a CMOS integrated circuit (IC) and ICs therefrom includes providing a substrate having a semiconductor surface including PMOS regions for PMOS devices and NMOS regions for NMOS devices. A gate stack including a gate electrode layer is formed on a gate dielectric layer in or on... Agent: Texas Instruments Incorporated

20100164007 - Semiconductor device and method of manufacturing same: The threshold voltage of a second nMIS transistor is greater than the threshold voltage of a first nMIS transistor and the sum of the concentration of lanthanum atom and the concentration of magnesium atom in a second nMIS high-k film included in the second nMIS transistor is lower than the... Agent: Mcdermott Will & Emery LLP

20100164010 - Semiconductor device for improving channel mobility: A semiconductor device includes a substrate, a gate electrode formed on the substrate, a source region and a drain region formed in the substrate, the source region and the drain region formed located on the both side of the gate electrode, a first insulating film formed on the substrate, the... Agent: SprinkleIPLaw Group

20100164011 - Techniques for enabling multiple vt devices using high-k metal gate stacks: Techniques for combining transistors having different threshold voltage requirements from one another are provided. In one aspect, a semiconductor device comprises a substrate having a first and a second nFET region, and a first and a second pFET region; a logic nFET on the substrate over the first nFET region;... Agent: Michael J. Chang, LLC

20100164012 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a semiconductor substrate including a CMOS region and a bipolar region, a first N well and a first P well in the CMOS region, a PMOS device in the first N well and an NMOS device in the first P well, a deep P well in... Agent: Sherr & Vaughn, PLLC

20100164013 - Random personalization of chips during fabrication: Disclosed are embodiments of a method for randomly personalizing chips during fabrication, a personalized chip structure and a design structure for such a personalized chip structure. The embodiments use electronic device design and manufacturing processes to randomly or pseudo-randomly create a specific variation in one or more instances of a... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20100164014 - Reduction of threshold voltage variation in transistors comprising a channel semiconductor alloy by reducing deposition non-uniformities: A threshold adjusting semiconductor material, such as a silicon/germanium alloy, may be provided selectively for one type of transistors on the basis of enhanced deposition uniformity. For this purpose, the semiconductor alloy may be deposited on the active regions of any transistors and may subsequently be patterned on the basis... Agent: Advanced Mirco Devices, Inc. C/o Williams, Morgan & Amerson

20100164015 - Semiconductor device: When MOS transistors having a plurality of threshold voltages in which a source and a drain form a symmetrical structure are mounted on the same substrate, electrically-symmetrical characteristics is provided with respect to an exchange of the source and the drain in each MOS transistor. A MOS transistor having a... Agent: Mattingly & Malur, P.C.

20100164016 - Adjusting of strain caused in a transistor channel by semiconductor material provided for threshold adjustment: The threshold voltage of a sophisticated transistor may be adjusted by providing a specifically designed semiconductor alloy in the channel region of the transistor, wherein a negative effect of this semiconductor material with respect to inducing a strain component in the channel region may be reduced or over-compensated for by... Agent: Williams, Morgan & Amerson

20100164017 - Semiconductor device and method for fabricating the same: The semiconductor device of the present invention includes: a gate insulating film formed on a semiconductor region of a first conductivity type; a gate electrode formed on the gate insulating film; and a channel doped layer of the first conductivity type formed in the semiconductor region beneath the gate electrode.... Agent: Mcdermott Will & Emery LLP

20100164018 - High-voltage metal-oxide-semiconductor device: A high-voltage MOS transistor includes a gate overlying an active area of a semiconductor substrate; a drain doping region pulled back away from an edge of the gate by a distance L; a first lightly doped region between the gate and the drain doping region; a source doping region in... Agent: North America Intellectual Property Corporation

20100164019 - Method of manufacturing nonvolatile memory device: A method of manufacturing a nonvolatile memory (NVM) device having a memory gate and a selection gate. A method of manufacturing a NVM device may include a spacer poly formed on and/or over a surface of a substrate including a memory gate. A method of manufacturing a NVM device may... Agent: Sherr & Vaughn, PLLC

20100164021 - Method of manufacturing semiconductor device: A method of manufacturing a semiconductor device may include implanting fluorine ions into a portion of a poly gate region on a semiconductor substrate; forming a gate oxide film over the semiconductor substrate such that the gate oxide film is thicker in the fluorine-implanted region; forming the poly gate over... Agent: Sherr & Vaughn, PLLC

20100164020 - Transistor with an embedded strain-inducing material having a gradually shaped configuration: In a transistor, a strain-inducing semiconductor alloy, such as silicon/germanium, silicon/carbon and the like, may be positioned very close to the channel region by providing gradually shaped cavities which may then be filled with the strain-inducing semiconductor alloy. For this purpose, two or more “disposable” spacer elements of different etch... Agent: Advanced Mirco Devices, Inc. C/o Williams, Morgan & Amerson

20100164022 - Pmos transistor and method of manufacturing the same: A technique for manufacturing a PMOS transistor may be capable of lowering the electrostatic capacitance of a transistor so as to improve the operation characteristics of a PMOS device. A donor wafer may be bonded onto a wafer having a tunnel oxide film formed thereon, and patterning is performed so... Agent: Sherr & Vaughn, PLLC

20100164024 - High aspect ratio all sige capacitively coupled mems devices: A method that includes forming an opening between at least one first electrode and a second electrode by forming a recess in a first electrode layer, the recess having sidewalls that correspond to a surface of the at least one first electrode, forming a first sacrificial layer on the sidewalls... Agent: Stmicroelectronics, Inc.

20100164023 - Micromechanical component and corresponding production method: A micromechanical component having a conductive substrate, a first conductive layer provided above the substrate and that forms, above a cavity provided in the substrate, an elastically deflectable diaphragm region of monocrystalline silicon and an adjacent peripheral region, a circuit trace level provided above the first conductive layer in a... Agent: Kenyon & Kenyon LLP

20100164025 - Method and structure of monolithetically integrated micromachined microphone using ic foundry-compatiable processes: A monolithically integrated MEMS and CMOS substrates provided by an IC-foundry compatible process. The CMOS substrate is completed first using standard IC processes. A diaphragm with stress relief corrugated structure is then fabricated on top of the CMOS. Air vent holes are then etched in the CMOS substrate. Finally, the... Agent: Townsend And Townsend And Crew, LLP

20100164026 - Premold housing having integrated vibration isolation: A premold housing for accommodating a chip structure in which a part of the housing that is connected to the chip structure is connected in a manner that permits elastic deflection to another part of the housing which is attached to the supporting structure bearing the entire housing, the two... Agent: Kenyon & Kenyon LLP

20100164027 - method for producing a component, and sensor element: A method for producing a component having at least one diaphragm formed in the upper surface of the component, which diaphragm spans a cavity, and having at least one access opening to the cavity from the back side of the component, at least one first diaphragm layer and the cavity... Agent: Kenyon & Kenyon LLP

20100164028 - Semiconductor pressure sensor: A semiconductor pressure sensor includes a cavity disposed in one silicon substrate of a SOI substrate having two silicon substrates bonded to each other with an oxide film therebetween and a diaphragm formed from the other silicon substrate and the oxide film, wherein the oxide film, bordering the cavity, of... Agent: Brinks Hofer Gilson & Lione

20100164036 - Back side illumination image sensor and method for manufacturing the same: Disclosed are a back side illumination image sensor and a method for manufacturing the same. The back side illumination image sensor includes an isolation region and a pixel area on a front side of a first substrate; a photo detector and a readout circuitry on the pixel area; an interlayer... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100164035 - Back side illuminaton image sensor and method for manufacturing the same: A back side illumination image sensor according to an embodiment includes: a device isolation region and a pixel region that are on a front side of a first substrate; a light sensor and a readout circuit that are on the pixel region; an interlayer dielectric layer and a metal line... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100164030 - Chip carrier bearing large silicon for high performance computing and related method: Embodiments of the present invention provide a system and method for manufacturing integrated circuit (IC) chip packages. In one embodiment, the integrated circuit (IC) chip package can include an IC chip and a substrate coupled to the IC chip. The substrate can include a glass fiber re-enforced epoxy core, a... Agent: Carey, Rodriguez, Greenberg & Paul, LLP Steven M. Greenberg

20100164029 - Graded order-sorting filter for hyperspectral imagers and methods of making the same: A graded order-sorting filter for hyperspectral imagers and methods of making the same are provided. The graded order-sorting filter includes a substrate wafer having a first side and a second side and is formed of a material that is substantially transparent to light photons. The graded order-sorting filter also includes... Agent: Teledyne Attn: David Zoetewey, D014, A15

20100164038 - Image sensor: Embodiments relate to an image sensor and a method of manufacturing the image sensor. An image sensor according to the embodiment includes: silicon patterns that are formed on a flexible substrate; a device isolation pattern that is formed between the silicon patterns; a circuit layer that is formed on the... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100164034 - Image sensor and fabrication method thereof: An image sensor and a method of fabricating an image sensor. A method of fabricating an image sensor may include forming a plurality of photodiodes on and/or over a semiconductor substrate, a filter array including color filters arranged corresponding to upper parts of photodiodes, a plurality of hydrophilic lenses arranged... Agent: Sherr & Vaughn, PLLC

20100164031 - Image sensor and manufacturing method thereof: An image sensor and a manufacturing method thereof are provided. The image sensor according to an embodiment includes: a semiconductor substrate where a light receiving device is formed for each pixel; a dielectric layer formed on the semiconductor substrate; and a metal layer formed in the dielectric layer and including... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100164033 - Image sensor and method for manufacturing the same: An image sensor and a method of manufacturing an image sensor. An image sensor may include a semiconductor substrate which may include a readout circuitry. An image sensor may include an interlayer dielectric over a semiconductor substrate, and/or a first metal pattern over an interlayer dielectric. An interconnection may penetrate... Agent: Sherr & Vaughn, PLLC

20100164039 - Image sensor and method for manufacturing the same: An image sensor includes a photodiode arranged over a semiconductor substrate, a core layer for an optical waveguide, to allow incident light to move toward the photodiode, the core layer being arranged over the photodiode, a clad layer for the optical waveguide, having a lower refractive index than the core... Agent: Sherr & Vaughn, PLLC

20100164037 - Method for manufacturing image sensor: A method of manufacturing an image sensor. A method of manufacturing an image sensor may include forming a circuit area including a circuitry on and/or over a semiconductor substrate having a pixel area and/or a peripheral area, provided with a photodiode. A method may include forming a metal interconnection layer,... Agent: Sherr & Vaughn, PLLC

20100164040 - Microlens structure for image sensors: A microlens structure and a method of fabrication thereof are provided. The method comprises forming a layer of microlens material over a substrate, which has photo-sensitive elements formed therein. The microlens material, which comprises a photo-resist material, is exposed in accordance with a desired pattern a plurality of times. The... Agent: Slater & Matsil, L.L.P.

20100164032 - Semiconductor optical sensor element and method of producing the same: A method of producing a semiconductor optical sensor element includes the steps of: forming an oxide film on a silicon carbide substrate; forming a gate electrode layer on the oxide film; patterning the gate electrode layer to form a gate electrode; and processing thermally the gate electrode layer or the... Agent: Kazunao Kubotera Kubotera & Associates, LLC

20100164041 - Back side illuminaton image sensor and method for manufacturing the same: A back side illumination image sensor according to an embodiment includes: a photosensitive device and a readout circuit on the front side of a first substrate; an interlayer dielectric layer on the front side of the first substrate; a metal line on the interlayer dielectric layer; a pad having a... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100164042 - Backside-illuminated (bsi) image sensor with backside diffusion doping: Embodiments of a process comprising forming a pixel on a front side of a substrate, thinning the substrate, depositing a doped silicon layer on a backside of the thinned substrate, and diffusing a dopant from the doped silicon layer into the substrate. Embodiments of an apparatus comprising a pixel formed... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100164044 - Image sensor and manufacturing method thereof: An image sensor includes first to fourth image sensing sections symmetrically aligned in a form of a 2×2 matrix, first to fourth pixel arrays aligned in the first to fourth image sensing sections, respectively, in adjacent to each other, and first to fourth peripheral circuit parts aligned at peripheral portions... Agent: Sherr & Vaughn, PLLC

20100164045 - Imager method and apparatus employing photonic crystals: An image sensor and a method of forming an image sensor. The image sensor includes an array of pixel cells at a surface of a substrate. Each pixel cell has a photo-conversion device. At least one a micro-electro-mechanical system (MEMS) element including a photonic crystal structure is provided over at... Agent: Dickstein Shapiro LLP

20100164043 - Method for fabricating cmos image sensor: A method of forming a CMOS image sensor and a CMOS image sensor. A method of forming a CMOS image sensor may include forming a plurality of photodiodes on and/or over a semiconductor substrate at regular intervals, forming an interlayer insulating film on and/or over an entire surface of a... Agent: Sherr & Vaughn, PLLC

20100164046 - Image sensor and method for manufacturing the same: An image sensor and a method for manufacturing the same are provided. The image sensor can include a semiconductor substrate, an interlayer dielectric, a second doped layer, a first doped layer, an ohmic contact layer, and metal contacts. The semiconductor substrate can have a pixel region and a peripheral region... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100164047 - Image sensor and method for manufacturing the same: An image sensor includes a semiconductor substrate, an interconnection and an interlayer dielectric, an image sensing device, a trench, a buffer layer, a barrier pattern, a via hole, and a metal contact. The semiconductor substrate includes a readout circuitry. The interconnection and an interlayer dielectric layer are formed on and/or... Agent: Sherr & Vaughn, PLLC

20100164048 - Method for fabricating a semiconductor substrate and semiconductor substrate: The disclosure provides a method for fabricating a semiconductor substrate comprising the steps of: providing a semiconductor on insulator type substrate, providing a diffusion barrier layer and providing a second semiconductor layer. By providing the diffusion barrier layer, it becomes possible to suppress diffusion from the highly doped first semiconductor... Agent: Edwards Angell Palmer & Dodge LLP

20100164049 - Image sensor and method for manufacturing the same: Provided are an image sensor and a method for manufacturing the same. The image sensor comprises an active region including a photodiode region, a transistor region, and an active pattern; a photodiode; and a plurality of transistors. The active region is formed on a substrate. The active region is defined... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100164050 - Robust structure for hvpw schottky diode: A high-voltage Schottky diode including a deep P-well having a first width is fanned on the semiconductor substrate. A doped P-well is disposed over the deep P-well and has a second width that is less than the width of the deep P-well. An M-type guard ring is formed around the... Agent: Duane Morris LLP (tsmc)IPDepartment

20100164051 - Semiconductor device having saddle fin-shaped channel and method for manufacturing the same: A semiconductor device includes a semiconductor substrate with an isolation layer formed in the semiconductor substrate to delimit active regions. Recess patterns for gates are defined in the active regions and the isolation layer. Gate patterns are formed in and over the recess patterns for gates, and a gate spacer... Agent: Ladas & Parry LLP

20100164052 - High power integrated circuit device: An integrated circuit (IC) includes a substrate having a semiconducting surface, a first array of devices on and in the semiconducting surface including first and second coacting current conducting nodes, a plurality of layers disposed on the substrate and including at a electrically conductive layers and dielectric layer, and a... Agent: Texas Instruments Incorporated

20100164053 - Semiconductor device: A semiconductor device includes a semiconductor wafer in which semiconductor chip forming regions and a scribe region located between the semiconductor chip forming regions are formed, a plurality of semiconductor chip circuit portions provided over the semiconductor wafer, a plurality of first conductive layers, provided in each of the semiconductor... Agent: Young & Thompson

20100164054 - Semiconductor device and method for manufacturing the same: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device can include a semiconductor substrate including a trench, a first oxide layer in the trench, a second oxide layer filled in the trench to form an insulating layer, and a silicon nitride layer interposed between... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100164055 - Semiconductor device manufacturing method, semiconductor device and wafer: A deep isolation trench extending from the main surface of a substrate to a desired depth is formed on the substrate with an insulating film in buried in it to form a through isolation portion. Subsequently, after a MOSFET is formed on the main surface of the substrate, an interlayer... Agent: Mccormick, Paulding & Huber LLP

20100164056 - Microelectronic assemblies with improved isolation voltage performance: Embodiments of microelectronic assemblies are provided. First and second semiconductor devices are formed over a substrate having a first dopant type at a first concentration. First and second buried regions having a second dopant type are formed respectively below the first and second semiconductor devices with a gap therebetween. At... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20100164057 - Precursors for silicon dioxide gap fill: A full fill trench structure comprising a microelectronic device substrate having a high aspect ratio trench therein and a full filled mass of silicon dioxide in the trench, wherein the silicon dioxide is of a substantially void-free character and has a substantially uniform density throughout its bulk mass. A corresponding... Agent: Intellectual Property / Technology Law

20100164058 - Chip package with stacked inductors: A semiconductor chip package with inductors includes a substrate, a semiconductor chip, an inductor and an insulator cover. The substrate has an active surface with a patterned circuit thereon. The inductor disposes on the active surface of the substrate. The semiconductor chip stacks over the inductor and electrically interconnects with... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100164060 - Inductor for semiconductor device and method for fabricating the same: An inductor for a semiconductor device and a method for fabricating the same includes a wafer, a first metal pad formed on the wafer and having a surface exposed from the surface of the wafer, a second metal pad formed on the wafer and having a surface exposed from the... Agent: Sherr & Vaughn, PLLC

20100164059 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a semiconductor substrate; an insulating film formed over the semiconductor substrate, there being formed in the insulating film a trench that in a sectional view has a stepped shape; and a wiring formed in the trench, wherein the wiring includes, a main portion with a first... Agent: Fujitsu Management Services Of America, Inc.

20100164064 - Capacitor and method for manufacturing the same: A capacitor and methods for manufacturing the capacitor are disclosed. The method may include forming a first electrode on a substrate, forming a dielectric layer on the first electrode, the dielectric layer having a first silicon oxide (SiO2) layer, a zirconium-doped hafnium oxide (Zr-doped HfO2) layer and a second silicon... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20100164067 - Capacitor element and semiconductor device: A semiconductor device includes a capacitor element including a first comb-shaped interconnection formed over a substrate and including a first comb tooth, a second comb-shaped interconnection formed over the substrate and including a second comb tooth opposed to the first comb tooth, and a first electrode and a second electrode... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100164065 - Capacitor of semiconductor device and method for manufacturing the same: A capacitor of a semiconductor device and a method for manufacturing the same includes a lower metal layer on and/or over a semiconductor substrate; an insulating layer formed on and/or over the lower metal layer with step difference; and an upper electrode on and/or over the insulating layer pattern, wherein... Agent: Sherr & Vaughn, PLLC

20100164066 - Integrated capacitor having a non-uniform thickness: An embodiment of an electronic device integrated in a chip of semiconductor material and an embodiment of a corresponding production method are proposed. The electronic device includes a capacitor having a first conductive plate, a second conductive plate, and an insulating layer for insulating the first plate from the second... Agent: Graybeal Jackson LLP

20100164062 - Method of manufacturing through-silicon-via and through-silicon-via structure: A method of manufacturing through-silicon-via (TSV) and a TSV structure are provided. The TSV structure includes a silicon substrate, an annular capacitor, a conductive through-via, a layer of low-k material, and a bump. The annular capacitor is within the silicon substrate and constituted of a first conductive layer, a capacitor... Agent: Jianq Chyun Intellectual Property Office

20100164063 - Mim capacitor and method for fabricating the same: A MIM capacitor may include a plurality of lower electrodes over a semiconductor substrate. A plurality of insulators may be formed over the lower electrodes, with each insulator having a thickness which is different from the thickness of at least one other insulator among the plurality of insulators. Upper electrodes... Agent: Sherr & Vaughn, PLLC

20100164061 - Semiconductor chip, semiconductor mounting module, mobile communication device, and process for producing semiconductor chip: A semiconductor chip comprising a capacitor capable of effectively controlling the voltage drop of an LSI is provided. A semiconductor substrate is provided with an element electrode having at least its surface constituted of an aluminum electrode. The surface of the aluminum electrode is roughened. An oxide film is provided... Agent: Mcdermott Will & Emery LLP

20100164068 - Semiconductor structures for biasing devices: Semiconductor structures with high impedances for use in biasing for applying voltage bias to part of a device. The semiconductor structure comprises a continuous structure having a plurality of regions of a first semiconductor type (n type or p type) material arranged alternately with at least one region of the... Agent: Dickstein Shapiro LLP

20100164069 - Reducing high-frequency signal loss in substrates: An integrated circuit structure includes a semiconductor substrate of a first conductivity type; and a depletion region in the semiconductor substrate. A deep well region is substantially enclosed by the depletion region, wherein the deep well region is of a second conductivity type opposite the first conductivity type. The depletion... Agent: Slater & Matsil, L.L.P.

20100164070 - Group iii nitride semiconductor crystal substrate and semiconductor device: A group III nitride semiconductor crystal substrate has a diameter of at least 25 mm and not more than 160 mm. The resistivity of the group III nitride semiconductor crystal substrate is at least 1×10−4 Ω·cm and not more than 0.1 Ω·cm. The resistivity distribution in the diameter direction of... Agent: Drinker Biddle & Reath (dc)

20100164071 - Silicon wafer and method for producing the same: Silicon wafers having excellent voltage resistance characteristics of an oxide film and high C-mode characteristics are derived from single crystal silicon ingots doped with nitrogen and hydrogen, characterized in that a plurality of voids constituting a bubble-like void aggregates are present ≧50% relative to total voids; a V1 region having... Agent: Brooks Kushman P.C.

20100164073 - Electrical passivation of silicon-containing surfaces using organic layers: Electrical structures and devices may be formed and include an organic passivating layer that is chemically bonded to a silicon-containing semiconductor material to improve the electrical properties of electrical devices. In different embodiments, the organic passivating layer may remain within finished devices to reduce dangling bonds, improve carrier lifetimes, decrease... Agent: Joseph R. Baker, Apc Gavrilovich, Dodd & Lindsey LLP

20100164072 - Plasma cvd apparatus, method for forming thin film and semiconductor device: A plasma CVD apparatus including a reaction chamber including an inlet for supplying a compound including a borazine skeleton, a feeding electrode, arranged within the reaction chamber, for supporting a substrate and being applied with a negative charge, and a plasma generating mechanism, arranged opposite to the feeding electrode via... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100164074 - Dielectric separator layer: The present invention describes a method including: providing a substrate; stacking interlevel dielectric layers over said substrate, and separating said interlevel dielectric layers with a dielectric separator layer.... Agent: Intel Corporation C/o Cpa Global

20100164075 - Trench forming method and structure: An electrical structure and method of forming. The method includes providing a semiconductor structure comprising a semiconductor substrate, a buried oxide layer (BOX) formed over the semiconductor substrate, and a silicon on insulator layer (SOI) formed over and in contact with the BOX layer. The SOI layer comprises shallow trench... Agent: Schmeiser, Olsen & Watts

20100164077 - Semiconductor device and method of manufacturing same: A first magnetic shield material is disposed over a die pad via a first die attach film. Then, a semiconductor chip is mounted over the first magnetic shield material via a second die attach film. Furthermore, a second magnetic shield material is disposed over the semiconductor chip via a third... Agent: Miles & Stockbridge PC

20100164076 - Stacked semiconductor package: A semiconductor package includes a wire board, a plurality of semiconductor chips configured to be stacked over the wire board and to be electrically coupled with the wire board, and at least one shielding unit configured to be formed between the plurality of semiconductor chips and to be maintained at... Agent: Ip & T Law Firm PLC

20100164078 - Package assembly for semiconductor devices: Semiconductor packages and methods for making and using such semiconductor packages are described. The semiconductor packages contain a dual gauge heat sink exposed on an upper part of the package, a leadframe containing a gate lead and an exposed drain pad on a lower part of the package, and a... Agent: Kenneth E. Horton Kirton & Mcconkle

20100164079 - Method of manufacturing an assembly and assembly: The assembly (100) comprises a laterally limited semiconductor substrate region (15) in which an electrical element (20) is defined. Thereon, an interconnect structure (21) is present. This is provided, at its first side (101) with contact pads (25,26) for coupling to an electric device (30), and at its second side... Agent: Philips Intellectual Property & Standards

20100164080 - Semiconductor device: A semiconductor device includes a circuit base including an inner lead portion and an outer lead portion. The inner lead portion has a plurality of inner leads. At least part of the inner leads is routed inside a chip mounting area. On both upper and lower surfaces of the circuit... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100164082 - Manufacturing method for semiconductor devices and semiconductor device: The reliability of a photosensor-type semiconductor device is enhanced. The sealing step in a manufacturing process for the semiconductor device is carried out as described below. A molding die having an upper die and a lower die is prepared and a film is arranged between the upper die and the... Agent: Miles & Stockbridge PC

20100164081 - Micro-optical device packaging system: According to one embodiment, a micro-optical device includes an electro-optical circuit and an annular frame disposed on a surface of a substrate. The electro-optical circuit has an active region that is encapsulated by a window and an interconnect region adjacent at least one edge of the electro-optical circuit. The annular... Agent: Texas Instruments Incorporated

20100164085 - Multi-die building block for stacked-die package: A multi-die building block for a stacked-die package is described. The multi-die building block includes a flex tape having a first surface and a second surface, each surface including a plurality of electrical traces. A first die is coupled, through a first plurality of interconnects, to the plurality of electrical... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100164083 - Protective thin film coating in chip packaging: A protective thin film coating for device packaging. A dielectric thin film coating is formed over die and package substrate surfaces prior to applying a molding compound. The protective thin film coating may reduce moisture penetration from the bulk molding compound or the interface between the molding compound and the... Agent: Gerbera/bstz Blakely Sokoloff Taylor & Zafman LLP

20100164086 - Semiconductor device and manufacturing method thereof: This invention is directed to offer a package type semiconductor device that can realize a smaller size device and its manufacturing method as well as a small stacked layer type semiconductor device and its manufacturing method. A device component 1 and a pad electrode 4 electrically connected with the device... Agent: Morrison & Foerster LLP

20100164084 - Semiconductor device and semiconductor package including the same: Provided is a semiconductor device capable of removing a power ground grid noise using a small area. The semiconductor device includes a first chip including at least one decoupling capacitor; and a second semiconductor chip stacked over the first semiconductor chip, including internal circuits.... Agent: Ip & T Law Firm PLC

20100164087 - Semiconductor device having a stacked chip structure: A semiconductor device is formed by mutually connecting a first semiconductor chip with second and third semiconductor chips arranged side by side, with the active surface of the first chip faced to those of the second and third chip. Both the second and third semiconductor chips have functional elements on... Agent: Rabin & Berdo, PC

20100164088 - Semiconductor package, manufacturing method thereof and ic chip: A package may include a lower unit package and an upper unit package. Each of the unit packages may include a circuit substrate having a lower surface and an upper surface. Wire bonding pads may be provided of the lower surface of the circuit substrate, and chip bonding pads may... Agent: Muir Patent Consulting, PLLC

20100164089 - Non-conductive planarization of substrate surface for mold cap: Consistent with an example embodiment, there is a method for fabricating a semiconductor package having a substrate. The method comprises defining an encapsulation boundary on a surface of the substrate; the encapsulation boundary is divided into a molding region and a non-molding region. Over the substrate, a plurality of conductive... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100164090 - Semiconductor package apparatus and manufacturing method thereof: A semiconductor package apparatus includes a first semiconductor chip bonded onto a substrate of which metal wire turning upward; and a second semiconductor chip conductively bonded onto the first semiconductor chip in a vertical direction such that a metal wire of the second semiconductor chip and the metal wire of... Agent: Sherr & Vaughn, PLLC

20100164091 - System-in-package packaging for minimizing bond wire contamination and yield loss: A system-in-package (SiP) package is provided. In one embodiment, the SiP package comprises a substrate having a first surface and a second surface opposite the first surface, the substrate having a set of bond wire studs on bond pads formed on the second surface thereof; a first semiconductor chip having... Agent: Birch Stewart Kolasch & Birch

20100164092 - Semiconductor process, and silicon substrate and chip package structure applying the same: A semiconductor process is provided. First, a silicon base is provided. Next, a surface of the silicon base is partially exposed and at least a stair structure is formed on the silicon base by etching the surface of the silicon base. The stair structure has a first notch with a... Agent: J C Patents

20100164093 - Heat dissipation in temperature critical device areas of semiconductor devices by heat pipes connecting to the substrate backside: By providing heat dissipation elements or heat pipes in temperature critical areas of a semiconductor device, enhanced performance, reliability and packing density may be achieved. The heat dissipation elements may be formed on the basis of standard manufacturing techniques and may be positioned in close proximity to individual transistor elements... Agent: Williams, Morgan & Amerson

20100164094 - Multi-chip package memory device: Provided is a multi-chip package memory device. The multi-chip package memory device may include a transmission memory chip and a plurality of memory chips that are stacked on the transmission memory chip. The transmission memory chip may include a temporary storage unit, and may transmit a received command or received... Agent: Myers Bigel Sibley & Sajovec

20100164095 - Semiconductor device and method for manufacturing of same: A method for manufacturing a semiconductor device, includes: forming a first metal layer on a semiconductor substrate, the semiconductor substrate including a diffusion layer; forming an insulating layer having an opening on the first metal layer; forming a second metal layer on the first metal layer in the opening of... Agent: Patterson & Sheridan, L.L.P.

20100164100 - Bump-on-lead flip chip interconnection: A semiconductor device has a semiconductor die with a plurality of bumps formed over the die. A substrate has a plurality of conductive traces formed on the substrate. Each trace has an interconnect site for mating to the bumps. The interconnect sites have parallel edges along a length of the... Agent: Robert D. Atkins

20100164097 - Semiconductor device and method of confining conductive bump material during reflow with solder mask patch: A semiconductor device has a semiconductor die with die bump pads and substrate with trace lines having integrated bump pads. A solder mask patch is formed interstitially between the die bump pads or integrated bump pads. The solder mask patch contains non-wettable material. Conductive bump material is deposited over the... Agent: Robert D. Atkins

20100164098 - Semiconductor device including a cost-efficient chip-package connection based on metal pillars: In sophisticated semiconductor devices, a chip-package interconnect structure may be established on the basis of a metal pillar without using a solder bump material in the package. In this case, the complexity of the manufacturing process for forming the wiring system of the package may be significantly reduced, while also... Agent: Advanced Mirco Devices, Inc. C/o Williams, Morgan & Amerson

20100164099 - Semiconductor integrated circuit device: A semiconductor integrated circuit device includes plural circuit units each having plural logic circuits; and plural power terminals supplying power source from outside to the semiconductor integrated circuit device, in which the plural circuit units each having plural logic circuits have common packaging design with each other, and lengths in... Agent: Staas & Halsey LLP

20100164096 - Structures and methods for improving solder bump connections in semiconductor devices: Structures with improved solder bump connections and methods of fabricating such structures are provided herein. The structure includes a via formed in a dielectric layer to expose a contact pad and a capture pad formed in the via and over the dielectric layer. The capture pad has openings over the... Agent: Roberts Mlotkowski Safran & Cole, P.C. Intellectual Property Department

20100164101 - Ball land structure having barrier pattern: Disclosed is a ball land structure suitable for use with a semiconductor package. The ball land structure includes a ball land and a barrier on a core. The barrier may be configured to connect to the ball land so as to form a barrier hole between an edge of the... Agent: Harness, Dickey & Pierce, P.L.C

20100164102 - Isolated germanium nanowire on silicon fin: The present invention describes a method of and an apparatus for providing a wafer, the wafer including Silicon; etching trenches in the wafer to form Silicon fins; filling Silicon Oxide in the trenches; planarizing the Silicon Oxide; recessing the Silicon Oxide to a first thickness to form exposed Silicon pedestals... Agent: Intel Corporation C/o Cpa Global

20100164103 - Semiconductor device: A semiconductor device includes: a semiconductor layer composed of one of GaAs based semiconductor, InP-based semiconductor, and GaN-based semiconductor; a first silicon nitride film that is provided on the semiconductor layer, and of which an end portion is in contact with a surface of the semiconductor layer; a protective film... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100164106 - Cmp slurry composition for barrier polishing for manufacturing copper interconnects, polishing method using the composition, and semiconductor device manufactured by the method: Provided is a CMP slurry composition for barrier polishing for manufacturing copper interconnects, the composition including abrasive particles, a copper surface protective agent, a copper corrosion inhibitor, an oxidizing agent, and a pH adjustor, wherein the abrasive particles are non-spherical colloidal silica having a ratio of an average primary particle... Agent: Summa, Additon & Ashe, P.A.

20100164108 - Integrating a bottomless via to promote adsorption of antisuppressor on exposed copper surface and enhance electroplating superfill on noble metals: A method for forming a copper interconnect is described. An opening in a dielectric layer disposed on a substrate is formed. A barrier layer is formed on the opening. A seed layer is formed on the barrier layer. The seed layer includes a noble metal copper alloy, the copper having... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100164105 - Semiconductor device and method of manufacturing the same: An object is to prevent a failure, such as a wiring separation or a crack, in an insulating film under a copper wire, in a semiconductor device formed by wire-bonding the copper wire on a portion above the copper wiring. A semiconductor device according to the present invention includes a... Agent: Morrison & Foerster LLP

20100164107 - Semiconductor device having multilayered interconnection structure formed by using cu damascene method, and method of fabricating the same: Disclosed are a semiconductor device having a multilayered interconnection structure formed by using a Cu damascene method, and a method of fabricating the same. A Cu interconnection is buried on a first barrier metal layer in a trench formed in the surface of an insulating film. An interlayer dielectric film... Agent: Foley And Lardner LLP Suite 500

20100164104 - Structures and methods for improving solder bump connections in semiconductor devices: Structures with improved solder bump connections and methods of fabricating such structures are provided herein. The method includes forming an upper wiring layer in a dielectric layer and depositing one or more dielectric layers on the upper wiring layer. The method further includes forming a plurality of discrete trenches in... Agent: Roberts Mlotkowski Safran & Cole, P.C. Intellectual Property Department

20100164109 - Backside metal treatment of semiconductor chips: An integrated circuit structure includes a semiconductor substrate having a front side and a backside. A through-silicon via (TSV) penetrates the semiconductor substrate. The TSV has a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is over the backside of the semiconductor substrate and... Agent: Slater & Matsil, L.L.P.

20100164110 - Metal silicide nanowires and methods for their production: The present invention provides metal silicide nanowires, including metallic, semiconducting, and ferromagnetic semiconducting transition metal silicide nanowires. The nanowires are grown using either chemical vapor deposition (CVD) or chemical vapor transport (CVT) on silicon substrates covered with a thin silicon oxide film, the oxide film desirably having a thickness of... Agent: Whyte Hirschboeck Dudek S.c./warf Intellectual Property Department

20100164111 - Interconnect structure with improved dielectric line to via electromigration resistant interfacial layer and method of fabricating same: Interconnect structures having improved electromigration resistance are provided that include a metallic interfacial layer (or metal alloy layer) that is present at the bottom of a via opening. The via opening is located within a second dielectric material that is located atop a first dielectric material that includes a first... Agent: Scully, Scott, Murphy & Presser, P.C.

20100164112 - Semiconductor device: A semiconductor device includes a semiconductor layer, an electrode pad that is composed of Au and is provided on the semiconductor layer, a silicon nitride film provided on the semiconductor layer and the electrode pad so that an end portion of the silicon nitride film is located, and a metal... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100164113 - Method for forming copper wiring in semiconductor device: A method for forming copper wirings in a semiconductor device may include depositing a lower insulating film over a semiconductor substrate; forming vias in the lower insulating film; depositing tungsten over the entire surface of upper portion of the lower insulating film so that the vias are gap-filled with the... Agent: Sherr & Vaughn, PLLC

20100164115 - Semiconductor chip package: A device and/or method relating to semiconductor technology. A semiconductor chip package may include dual line type input/output (I/O) pads. A semiconductor chip package may include a core area. A semiconductor chip package may include input/output (I/O) pads arranged on and/or over an outside of a core area, which may... Agent: Sherr & Vaughn, PLLC

20100164114 - Wire structure of semiconductor device and method for manufacturing the same: forming over the semiconductor substrate a stack of a first insulation layer, an etch stop layer, and a second insulation layer, and forming a contact hole penetrating the stack. Further, the method includes forming over the second insulation layer a first mask layer, the first mask layer comprising a filler... Agent: Marshall, Gerstein & Borun LLP

20100164116 - Electromigration resistant via-to-line interconnect: A liner-to-liner direct contact is formed between an upper metallic liner of a conductive via and a lower metallic liner of a metal line below. The liner-to-liner contact impedes abrupt electromigration failures and enhances electromigration resistance of the metal interconnect structure. The at least one dielectric material portion may include... Agent: Scully, Scott, Murphy & Presser, P.C.

20100164123 - Local silicidation of via bottoms in metallization systems of semiconductor devices: Electromigration behavior in complex metallization systems of semiconductor devices may be enhanced at critical areas between a metal line and a via by locally forming a copper/silicon compound. In some illustrative embodiments, the formation of the copper/silicon compound may be combined with other treatments for cleaning the exposed surface areas... Agent: Williams, Morgan & Amerson

20100164121 - Metallization system of a semiconductor device comprising extra-tapered transition vias: In a metallization system of a semiconductor device, a transition via may be provided with an increased degree of tapering by modifying a corresponding etch sequence. For example, the resist mask for forming the via opening may be eroded once or several times in order to increase the lateral size... Agent: Advanced Mirco Devices, Inc. C/o Williams, Morgan & Amerson

20100164118 - Method for fabricating semiconductor device including metal contact: A method for fabricating a semiconductor device includes: forming first landing metal contacts over a substrate; forming a plurality of bit lines over the first landing metal contacts, the bit lines insulated from the first landing metal contacts by an inter-layer insulation layer; forming second landing metal through-hole contacts passing... Agent: Ip & T Law Firm PLC

20100164122 - Method of forming conductive layer and semiconductor device: Provided are a method of forming a conductive layer on an inner portion of a through-electrode in which uniform adhesion property of plating in the inner portion of a through-hole is enhanced and a tact time is short, and a semiconductor device. The method of forming a conductive layer includes:... Agent: Fitzpatrick Cella Harper & Scinto

20100164119 - Semiconductor device and method of manufacturing the same: A method of manufacturing a semiconductor device, includes steps of forming an organic insulating film over a semiconductor substrate, irradiating an electron beam to a surface of the organic insulating film, forming recesses in the organic insulating film, forming a conductive material over the organic insulating film and in the... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100164120 - Through-hole electrode substrate and method of manufacturing the same: A through-hole electrode substrate related to an embodiment of the present invention is arranged with a semiconductor substrate having a plurality of through-holes, an insulating layer formed with an insulating material on the inner walls of the plurality of through-holes and on at least one surface of the semiconductor substrate,... Agent: Pearne & Gordon LLP

20100164117 - Through-silicon via with air gap: A semiconductor substrate having a through-silicon via with an air gap interposed between the through-silicon via and the semiconductor substrate is provided. An opening is formed partially through the semiconductor substrate. The opening is first lined with a liner and then the opening is filled with a conductive material. A... Agent: Slater & Matsil, L.L.P.

20100164124 - Method and apparatus for multi-chip packaging: A method and apparatus are provided for multi-chip packaging. A multi-chip package (100) includes a substrate (105) and a plurality of semiconductor dice (110, 120, 130). A first semiconductor die (110) is physically coupled to an upper face of the substrate (105), the first semiconductor die (110) being a smallest... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20100164125 - Method of evaluating the flame retardancy of sealing resin and test sample for evaluation of flame retardancy: A method of evaluating the flame retardancy of a sealing resin comprises a step of fusion cutting a heating element by causing the heating element to generate heat by the passage of electric current to a test sample of a molded body of the sealing resin including the heating element... Agent: Turocy & Watson, LLP

20100164126 - Resin composition, resin spacer film, and semiconductor device: The present invention provides a resin composition. The resin composition is used for a resin spacer provided in a semiconductor device. The semiconductor device comprises of a substrate, a semiconductor element mounted on an interposer so as to face the substrate, and the resin spacer provided between the substrate and... Agent: Smith, Gambrell & Russell

20100164127 - Epoxy resin composition for photosemiconductor element encapsulation and cured product thereof, and photosemiconductor device using the same: The present invention relates to an epoxy resin composition for photosemiconductor element encapsulation, the epoxy resin composition including the following components (A) to (D): (A) an epoxy resin having two or more epoxy groups in one molecule thereof, (B) an acid anhydride curing agent, (C) a curing accelerator, and (D)... Agent: Sughrue-265550