Active solid-state devices (e.g., transistors, solid-state diodes) patents - Monitor Patents
FreshPatents.com Logo    FreshPatents.com icons
Monitor Keywords Patent Organizer File a Provisional Patent Browse Inventors Browse Industry Browse Agents



USPTO Class 257  |  Browse by Industry: Previous - Next | All     monitor keywords
04/2010 | Recent  |  14: Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | 13: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | 12: Dec | Nov | Oct | Sep | Aug | July | June | May | April | Mar | Feb | Jan | 11: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | 10: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan |  | 09: Dec | Nov | Oct | Sep | Aug | Jl | Jn | May | Apr | Mar | Fb | Jn |  | 2008 | 2007 |

Active solid-state devices (e.g., transistors, solid-state diodes) April category listing, related patent applications 04/10

Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.
  
04/29/2010 > patent applications in patent subcategories. category listing, related patent applications

20100102289 - Nonvolatile resistive memory devices: Nonvolatile resistive memory devices are disclosed. In some embodiments, the memory devices comprise multilayer structures including electrodes, one or more resistive storage layers, and separation layers. The separation layers insulate the resistive storage layers to prevent charge leakage from the storage layers and allow for the use of thin resistive... Agent: Intellectual Property Group Seagate Technology Files

20100102291 - Carbon-based memory elements exhibiting reduced delamination and methods of forming the same: A method of forming a reversible resistance-switching metal-insulator-metal (“MIM”) stack is provided, the method including forming a first conducting layer comprising a degenerately doped semiconductor material, and forming a carbon-based reversible resistance-switching material above the first conducting layer. Other aspects are also provided.... Agent: Dugan & Dugan, PC

20100102290 - Silicon based nanoscale crossbar memory: The present application describes a crossbar memory array. The memory array includes a first array of parallel nanowires of a first material and a second array of parallel nanowires of a second material. The first and the second array are oriented at an angle with each other. The array further... Agent: James D. Stevens Reising Ethington P.C.

20100102292 - Semiconductor device using graphene and method of manufacturing the same: A semiconductor graphene is used for a channel layer, and a metal graphene is used for electrode layers for a source, a drain, and a gate which serve as interconnections as well. An oxide is used for a gate insulating layer. The channel layer and the electrode layers are located... Agent: Sughrue Mion, PLLC

20100102293 - Iii/v-semiconductor: The invention relates to a monolithic integrated semiconductor structure comprising a carrier layer on the basis of doped Si or doped GaP and a III/V semiconductor disposed thereupon and having the composition GaxInyNaAsbPcSbd, wherein x=70-100 mole-%, y=0-30 mole-%, a=0.5-15 mole-%, b=67.5-99.5 mole-%, c=0-32.0 mole-% and d=0-15 mole-%, wherein the total... Agent: Mayer & Williams PC

20100102295 - Light emitting device: This invention discloses a light-emitting device comprising a semiconductor stack layer having an active layer of a multiple quantum well (MQW) structure comprising alternate stack layers of quantum well layers and barrier layers, wherein the barrier layers comprise at least one doped barrier layer and one undoped barrier layer. The... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100102294 - Organic light emitting diode with nano-dots and fabrication method thereof: An organic light emitting diode (OLED) with nano-dots and a fabrication method thereof are disclosed. The OLED apparatus comprises a substrate, a first electrically conductive layer, a first emission-auxiliary layer, an emissive layer, a second emission-auxiliary layer and a second electrically conductive layer. Its fabrication method is described below. Nano-dots... Agent: Wpat, PC Intellectual Property Attorneys

20100102296 - Semiconductor device: A semiconductor device has an active layer, a first semiconductor layer of first conductive type, an overflow prevention layer disposed between the active layer and the first semiconductor layer, which is doped with impurities of first conductive type and which prevents overflow of electrons or holes, a second semiconductor layer... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100102297 - Gallium nitride-based epitaxial wafer and method of producing gallium nitride-based semiconductor light-emitting device: A source gas flows through a flow channel 23 of a metal-organic vapor phase epitaxy reactor 21. The source gas is fed in a direction across a main surface 25a of a susceptor 25. GaN substrates 27a to 27c are placed on the susceptor main surface 25a. An off-angle monotonically... Agent: Venable LLP

20100102298 - Schottky barrier quantum well resonant tunneling transistor: A semiconductor transistor device includes one or more conductive base regions, a first semiconductor barrier region, a second semiconductor barrier region, a conductive emitter region, and a conductive collector region. The first semiconductor barrier region or the second semiconductor barrier region has a dimension smaller than 100 Å. A first... Agent: Xin Wen

20100102300 - Active matrix optical device: An active matrix organic optical device comprising a plurality of organic thin film transistors and a plurality of pixels disposed on a common substrate, wherein a common bank layer is provided for the organic thin film transistors and the pixels, the common bank layer defining a plurality of wells, wherein... Agent: Marshall, Gerstein & Borun LLP

20100102304 - Inverted organic photosensitive devices: The present disclosure relates to organic photosensitive optoelectronic devices grown in an inverted manner. An inverted organic photosensitive optoelectronic device of the present disclosure comprises a reflective electrode, an organic donor-acceptor heterojunction over the reflective electrode, and a transparent electrode on top of the donor-acceptor heterojunction.... Agent: Mcdermott Will & Emery LLP

20100102305 - Materials for electroluminescence and the utilization thereof: The present invention relates to organic semiconductors which contain structural units L=X and in addition structural units which emit light from the triplet state. The materials according to the invention are more soluble and easier to synthesise and are therefore more suitable for use in organic light-emitting diodes than comparative... Agent: Connolly Bove Lodge & Hutz, LLP

20100102302 - Organic electroluminescence device: An organic electroluminescence device which can prevent the deterioration thereof attributed to moisture by preventing a desiccant from influencing organic electroluminescence elements is provided. The organic electroluminescence device includes: first and second substrates which are arranged to face each other in an opposed manner with a gap therebetween; organic electroluminescence... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100102301 - Organic light emitting display device: An organic light emitting display device. The organic light emitting display device includes a substrate having a pixel region in which pixels are formed and a non-pixel region in which a light sensor is formed, an insulating film formed on the substrate, a first electrode formed on the insulating film... Agent: Robert E. Bushnell & Law Firm

20100102299 - Organic semiconductor composite, organic transistor material and organic field effect transistor: The present invention provides an organic semiconductor composite containing a certain thiophene compound and carbon nanotubes, which can be formed into a film by a coating process such as an inkjet process, has high charge mobility and can maintain a high on/off ratio even in air, an organic transistor material... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20100102303 - Organic semiconductor, photoelectric conversion device, imaging device and novel compounds: wherein each of R11, R12, R13, R14 and R15 independently represents a hydrogen atom or a substituent, and each of a pair of R11 and R12 and a pair of R12 and R13 may combine to form a ring, B1 represents a ring structure containing at least one nitrogen atom,... Agent: Sughrue-265550

20100102306 - Multi-level memory cell and manufacturing method thereof: A multi-level memory cell having a bottom electrode, a first dielectric layer, a plurality of memory material layers, a plurality of second dielectric layers, and an upper electrode is provided. The bottom electrode is disposed in a substrate. The first dielectric layer is disposed on the substrate and has an... Agent: Jianq Chyun Intellectual Property Office

20100102315 - Method for manufacturing semiconductor device: An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor,... Agent: Eric Robinson

20100102307 - Method of zinc oxide film grown on the epitaxial lateral overgrowth gallium nitride template: A growth method is proposed for high quality zinc oxide comprising the following steps: (1) growing a gallium nitride layer on a sapphire substrate around a temperature of 1000° C.; (2) patterning a SiO2 mask into stripes oriented in the gallium nitride <1 100> or <11 20> direction; (3) growing... Agent: Schwabe Williamson & Wyatt Pacwest Center, Suite 1900

20100102310 - Organic electroluminescence device and manufacturing method thereof: To provide an organic electroluminescence element including a structure that facilitates manufacturing of a large scale organic EL panel and a manufacturing method thereof, the organic electroluminescence element includes: an anode; a cathode; an organic luminescent layer located between the anode and the cathode; and a hole injection layer located... Agent: Greenblum & Bernstein, P.L.C

20100102311 - Oxide semiconductor, thin film transistor, and display device: An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with a reduced off current. A solution is to employ an oxide semiconductor whose composition is... Agent: Eric Robinson

20100102312 - Oxide semiconductor, thin film transistor, and display device: An object is to control composition and a defect of an oxide semiconductor. Another object is to increase field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with off current suppressed. The oxide semiconductor is represented by InMO3(ZnO)n (M is one or a plurality... Agent: Eric Robinson

20100102308 - Programmable resistive memory cell with oxide layer: Programmable metallization memory cells include an electrochemically active electrode and an inert electrode and an ion conductor solid electrolyte material between the electrochemically active electrode and the inert electrode. An electrically insulating oxide layer separates the ion conductor solid electrolyte material from the electrochemically active electrode.... Agent: Campbell Nelson Whipps, LLC

20100102313 - Semiconductor device and method for manufacturing the same: As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, a problem of higher manufacturing cost, because it is difficult to mount an IC chip including a driver... Agent: Eric Robinson

20100102314 - Semiconductor device and method for manufacturing the same: As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, there occurs a problem that it is difficult to mount an IC chip including a driver circuit for... Agent: Eric Robinson

20100102309 - Zno-based semiconductor element: To solve the foregoing problems, provided is a ZnO-based semiconductor element having an entirely novel function distinct from hitherto, using a ZnO-based semiconductor and organic matter for an active role. An organic electrode 2 is formed on a ZnO-based semiconductor 1, and an Au film 3 is formed on the... Agent: Rabin & Berdo, PC

20100102318 - Semiconductor device, semiconductor module, and electronic apparatus including process monitoring pattern overlapping with i/o pad: A semiconductor device includes a process monitoring pattern overlapping with an input/output (I/O) pad. The semiconductor device may include a semiconductor substrate having a cell array region and a peripheral circuit array region, and a plurality of process monitoring patterns disposed in the peripheral circuit array region. The semiconductor device... Agent: Lee & Morse, P.C.

20100102317 - Semiconductor wafer, semiconductor device, semiconductor module and electronic apparatus including guard ring patterns and process monitoring pattern: A semiconductor wafer includes semiconductor chip areas on a semiconductor substrate, the semiconductor chip areas having thereon semiconductor circuit patterns and inner guard ring patterns surrounding the semiconductor circuit patterns; and scribe lanes on the semiconductor substrate between the semiconductor chip areas, the scribe lanes having thereon outer guard ring... Agent: Lee & Morse, P.C.

20100102316 - Test structure for charged particle beam inspection and method for fabricating the same: A test structure and a method for fabricating the same are disclosed. The test structure includes a plurality of sampling lines over a substrate located between a plurality of a first grounding lines and a plurality of a second grounding lines. The sampling lines are selectively electrically coupled to the... Agent: Rosenberg, Klein & Lee

20100102319 - Spin injection device having semiconductor-ferromagnetic-semiconductor structure and spin transistor: A spin injection device and spin transistor including a spin injection device. A spin injection device includes different semiconductor materials and a spin-polarizing ferromagnetic material there between. The semiconductor materials may have different crystalline structures, e.g., a first material can be polycrystalline or amorphous silicon, and a second material can... Agent: VistaIPLaw Group LLP

20100102320 - Display device: A display device is provided. The display device includes a substrate, a light blocking member formed on the substrate as a plurality of light blocking portions separated from each other, a thin film transistor including a gate line, a data line, and a semiconductor layer formed on the light blocking... Agent: H.c. Park & Associates, PLC

20100102322 - Display device and method of manufacturing the same: The display device having a thin film transistor formed on a substrate including a display portion is provided. The thin film transistor including: a gate electrode; a gate insulating film formed so as to cover the gate electrode; a semiconductor laminated film formed on top the gate insulating film so... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100102321 - Radiation-sensitive composition, method of forming silica-based coating film, silica-based coating film, apparatus and member having silica-based coating film and photosensitizing agent for insulating film: e

20100102323 - Directionally annealed silicon film having a (100)-normal crystallographical orientation: A method is provided for forming a directionally crystallized (100)-normal crystallographic orientation silicon (Si) film. The method provides a substrate including Si. An amorphous Si (a-Si) layer is formed overlying the substrate, and a silicon oxide cap layer is formed overlying the a-Si layer. In response to scanning a laser... Agent: Sharp Laboratories Of America, Inc. C/o Law Office Of Gerald Maliszewski

20100102324 - Switching element and manufacturing method thereof: Disclosed is a switching element provided with a gate dielectric film and an active layer disposed in contact with the gate dielectric film. The active layer includes carbon nanotubes, and the gate dielectric film includes non-conjugated polymer containing an aromatic ring in a side chain.... Agent: Mr. Jackson Chen

20100102325 - Vacuum channel transistor and diode emitting thermal cathode electrons, and method of manufacturing the vacuum channel transistor: Provided are a transistor and a method of manufacturing the transistor, and more particularly, a vacuum channel transistor emitting thermal cathode electrons and a method of manufacturing the vacuum channel transistor. The vacuum channel transistor includes: a motherboard; a micro heater member having a thin-film structure formed on the motherboard;... Agent: Rabin & Berdo, PC

20100102326 - Gallium nitride-based compound semiconductor light-emitting device: An object of the present invention is to provide a gallium nitride-based compound semiconductor light-emitting device having a positive electrode which comprises a first electrode and an over-coating layer covering the side surfaces and upper surface of the first electrode provided on a p-type semiconductor layer, the over-coating layer tending... Agent: Sughrue Mion, PLLC

20100102329 - Light-emitting device having light-emitting elements with a shared electrode: A light-emitting device operating on a high drive voltage and a small drive current. LEDs (1) are two-dimensionally formed on an insulating substrate (10) of e.g., sapphire monolithically and connected in series to form an LED array. Two such LED arrays are connected to electrodes (32) in inverse parallel. Air-bridge... Agent: H.c. Park & Associates, PLC

20100102330 - Nitride semiconductor device having oxygen-doped n-type gallium nitride freestanding single crystal substrate: Otherwise, oxygen can be doped into a gallium nitride crystal by preparing a C-plane gallium nitride seed crystal or a three-rotationally symmetric plane foreign material seed crystal, supplying material gases including gallium, nitrogen and oxygen to the C-plane gallium nitride seed crystal or the three-rotationally symmetric foreign seed crystal, growing... Agent: Smith, Gambrell & Russell

20100102328 - Nitride semiconductor substrate: A nitride semiconductor substrate is featured in comprising: a GaN semiconductor layer grown on a base layer, which has a substantially triangular cross-section along the thickness direction thereof, a periodic stripe shapes, and uneven surfaces arranged on the stripes inclined surfaces; and an overgrown layer composed of AlGaN or InAlGaN... Agent: Drinker Biddle & Reath (dc)

20100102327 - Semiconductor device and passive component integration in a semiconductor package: According to one exemplary embodiment, a semiconductor package includes a substrate having lower and upper surfaces. The semiconductor package further includes at least one passive component coupled to first and second conductive pads on the upper surface of the substrate. The semiconductor package further includes at least one semiconductor device... Agent: Farjami & Farjami LLP

20100102332 - Method of forming an ohmic contact on a p-type 4h-sic substrate: A method of forming an Ohmic contact on a P-type 4H—SiC and an Ohmic contact formed by the same are provided. A method of forming an Ohmic contact on a P-type 4H—SiC substrate including a deposition step of successively depositing a 1 to 60 nm thick first Al layer, Ti... Agent: Gifford, Krass, Sprinkle,anderson & Citkowski, P.c

20100102331 - Ohmic electrode for sic semiconductor, method of manufacturing ohmic electrode for sic semiconductor, semiconductor device, and method of manufacturing semiconductor device: An ohmic electrode for SiC semiconductor that contains Si and Ni or an ohmic electrode for SiC semiconductor that further contains Au or Pt in addition to Si and Ni is provided. In addition, a method of manufacturing the ohmic electrode for SiC semiconductor, a semiconductor device including the ohmic... Agent: Venable LLP

20100102333 - Organic light emitting display and fabricating method thereof: An organic light emitting display includes an insulating substrate having a first area, a second area, and a third area, an organic layer located in the second area, a pixel electrode located on the organic layer in the first area and the second area, and a partition wall including an... Agent: F. Chau & Associates, LLC

20100102336 - Light emitting diode for ac operation: The present invention discloses a light emitting diode (LED) including a plurality of light emitting cells arranged on a substrate. The LED includes half-wave light emitting units each including at least one light emitting cell, each half-wave light emitting unit including first and second terminals respectively arranged at both ends... Agent: H.c. Park & Associates, PLC

20100102337 - Light emitting diode for ac operation: The present invention discloses a light emitting diode (LED) including a plurality of light emitting cells arranged on a substrate. The LED includes half-wave light emitting units each including at least one light emitting cell, each half-wave light emitting unit including first and second terminals respectively arranged at both ends... Agent: H.c. Park & Associates, PLC

20100102334 - Lighting device: The present invention relates to lighting device (10). The lighting device comprises a light guide plate (12), and at least one array of light emitting diodes (LEDs) (14), which LEDs are accommodated in holes arranged in the light guide plate, wherein each hole has: at least two side facets (18)... Agent: Philips Intellectual Property & Standards

20100102335 - Organic el display and method of manufacturing the same: The present invention provides an organic EL display and a method of manufacturing the same capable of assuring excellent electric connection between an auxiliary wiring and a second electrode without using large-scale equipment. The organic EL display includes: a plurality of pixels each having, in order from a substrate side,... Agent: Sonnenschein Nath & Rosenthal LLP

20100102338 - Iii-nitride semiconductor light emitting device: The present disclosure relates to a III-nitride semiconductor light-emitting device including a substrate, a plurality of III-nitride semiconductor layers including a first nitride semiconductor layer formed over the substrate and having a first conductivity type, a second nitride semiconductor layer formed over the first nitride semiconductor layer and having a... Agent: Harness, Dickey, & Pierce, P.l.c

20100102343 - Display device: A display device is provided with a pair of a first electrode and a second electrode, at least one electrode of the first and second electrodes being transparent or translucent and a phosphor layer provided as being sandwiched between the first electrode and the second electrode, and at least one... Agent: Mcdermott Will & Emery LLP

20100102352 - Iii-nitride semiconductor light emitting device: The present disclosure relates to a III-nitride semiconductor light-emitting device including a substrate with a scattering zone formed therein, and a plurality of III-nitride semiconductor layers including a first III-nitride semiconductor layer formed over the substrate and having a first conductivity type, a second III-nitride semiconductor layer formed over the... Agent: Harness, Dickey, & Pierce, P.l.c

20100102353 - Iii-nitride semiconductor light emitting device: The present disclosure relates to a III-nitride semiconductor light-emitting device including a substrate, a plurality of III-nitride semiconductor layers positioned on the substrate and including an active layer which generates light by recombination of electrons and holes, and a surface scattering the light generated in the active layer, the scattering... Agent: Harness, Dickey, & Pierce, P.l.c

20100102348 - Lead frame unit, package structure and light emitting diode device having the same: A package structure is adapted for mounting at least one light emitting diode (LED) die. The package structure includes an insulating housing, and a lead frame unit including two spaced-apart conductive bodies. Each of the conductive bodies has opposite first and second conductive terminals spaced-apart from each other along an... Agent: Rosenberg, Klein & Lee

20100102344 - Led device and illuminating apparatus: White LED device 20 includes LED chip 13 mounted on substrate 1 made of metal, sealing resin 11 that seals LED chip 13; and glass member 12 formed on sealing resin 11. Glass member 12 contains phosphor 22 and thermal conductivity of sealing resin 11 is lower than that of... Agent: Mr. Jackson Chen

20100102345 - Light emitting device package and light unit having the same: Disclosed is an LED package. The LED package comprises a body comprising a cavity at one side thereof, at least one of lead frames comprising a bottom frame and a sidewall frame in the cavity, and a light emitting device electrically connected with the lead frames.... Agent: Birch Stewart Kolasch & Birch

20100102339 - Light emitting diode and led chip thereof: A light emitting diode includes a base, a first and second conductive members through the base and a light emitting diode chip on the base. The light emitting diode chip includes an upper surface, a bottom surface, a first sidewall and a second sidewall. The first sidewall and the second... Agent: PCe Industry, Inc. Att. Steven Reiss

20100102347 - Light-emitting diode: A light-emitting diode includes a substrate (12) having an upper surface, a lower surface, and a peripheral side surface, a pair of upper electrodes (13a, 13b) provided on upper surface portions of the substrate, at least one light emitting element (14) mounted one of the pair of upper electrodes, and... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw

20100102346 - Resonant cavity optical radiation emission device and process for manufacturing same: A device having an FET structure for the emission of an optical radiation integrated on a substrate of a semiconductor material, includes a first mirror, a second mirror of a dielectric type and an active layer comprising a main zone designed to be excited to generate the radiation. The device... Agent: Hogan & Hartson LLP

20100102350 - Semiconductor light emitting device: Disclosed is a semiconductor light emitting device. The semiconductor light emitting device comprises a light emitting structure comprising a plurality of compound semiconductor layers, an electrode layer on the light emitting structure, a conductive support member on the electrode layer, a conductive layer formed along a peripheral portion of an... Agent: Birch Stewart Kolasch & Birch

20100102341 - Semiconductor light emitting device and method for manufacturing the same: A semiconductor light emitting device includes: a transparent substrate including a first principal surface and a second principal surface opposite with the first principal surface, in which side surfaces between the first principal surface and the second principal surface are rough surfaces; and a semiconductor light emitting element that is... Agent: Rabin & Berdo, PC

20100102351 - Semiconductor light emitting device and method of manufacturing the same: The present disclosure relates to a semiconductor light-emitting device and a method of manufacturing the same, and more particularly, to a III-nitride semiconductor light-emitting device which improves external quantum efficiency by forming an irregular portion on a surface of a semiconductor layer by a protrusion formed on a substrate, and... Agent: Harness, Dickey, & Pierce, P.l.c

20100102340 - Semiconductor light emitting device, and backlight and display device comprising the semiconductor light emitting device: The present invention provides a semiconductor light emitting device comprising a light intensity difference reducing layer provided between an ultraviolet semiconductor light emitting element and a wavelength converting material layer, and a backlight and a display device comprising the semiconductor light emitting device. The semiconductor light emitting device is an... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100102342 - Semiconductor light-emitting device: A semiconductor light-emitting device (1) includes a substrate (2), an n-type semiconductor layer (3), a light-emitting layer (4), a p-type semiconductor layer (5), an n-side pad electrode (6), an n-side pad electrode (7), a p-side electrode (8), a reflecting layer (9), and a p-side pad electrode (10). The n-side pad... Agent: Rabin & Berdo, PC

20100102349 - Semiconductor light-emitting device: A semiconductor light emitting device (A) includes a semiconductor light emitting element (2) including a light emitting layer (22), a lead (1) formed with a reflector (11) that surrounds the semiconductor light emitting element (2), a light transmitting resin (4) covering the semiconductor light emitting element (2). The reflector (11)... Agent: Hamre, Schumann, Mueller & Larson, P.C.

20100102354 - Light emitting diode package: A light emitting diode (LED) package includes a circuit board and an LED chip. The circuit board has a top circuit layer and an insulating layer. The top circuit layer is disposed on the insulating layer, and the material of the insulating layer is selected from a group consisting of... Agent: Jianq Chyun Intellectual Property Office

20100102355 - Semiconductor light emitting device: Embodiments relate to a semiconductor light emitting device. The semiconductor light emitting device according to embodiments comprises a light emitting structure comprising a plurality of compound semiconductor layers; a first electrode under the light emitting structure; a second electrode layer on the light emitting structure; a first insulating layer between... Agent: Birch Stewart Kolasch & Birch

20100102356 - Semiconductor transistor having a stressed channel: A process is described for manufacturing an improved PMOS semiconductor transistor. Recesses are etched into a layer of epitaxial silicon. Source and drain films are deposited in the recesses. The source and drain films are made of an alloy of silicon and germanium. The alloy is epitaxially deposited on the... Agent: Intel Corporation C/o Cpa Global

20100102357 - Nitride semiconductor device: A nitride semiconductor device includes: a main semiconductor region comprising a first nitride semiconductor layer having a first band gap, and a second nitride semiconductor layer having a second band gap larger than the first band gap, a heterojunction being formed between the first nitride semiconductor layer and the second... Agent: Wilmerhale/dc

20100102359 - novel fabrication technique for high frequency, high power group iii nitride electronic devices: Fabrication methods of a high frequency (sub-micron gate length) operation of AlInGaN/InGaN/GaN MOS-DHFET, and the HFET device resulting from the fabrication methods, are generally disclosed. The method of forming the HFET device generally includes a novel double-recess etching and a pulsed deposition of an ultra-thin, high-quality silicon dioxide layer as... Agent: Dority & Manning, P.A.

20100102358 - Single voltage supply pseudomorphic high electron mobility transistor (phemt) power device and process for manufacturing the same: Disclosed herein is a pseudomorphic high electron mobility transistor (PHEMT) power device (1) including a semi-insulating substrate (2); an epitaxial substrate (3) formed on the semi-insulating substrate (2) a contact layer (19). The contact layer (19) includes a lightly doped contact layer (20) formed on the Schottky layer (18), and... Agent: The Belles Group, P.C.

20100102360 - Method for producing group iii nitride semiconductor and template substrate: The present invention provides a method for producing a Group III nitride semiconductor. The method includes forming a groove in a surface of a growth substrate through etching; forming a buffer film on the groove-formed surface of the growth substrate through sputtering; heating, in an atmosphere containing hydrogen and ammonia,... Agent: Mcginn Intellectual Property Law Group, PLLC

20100102361 - Vertical transistor and fabricating method thereof and vertical transistor array: A vertical transistor including a substrate, a gate, a base line and a gate dielectric layer is provided. The substrate includes a pillar protruding out of a surface of the substrate. The pillar includes a first doped region, a channel region and a second doped region from bottom to top.... Agent: Jianq Chyun Intellectual Property Office

20100102362 - Solid-state image pickup element, solid-state image pickup device and production method therefor: It is intended to provide a solid-state image pickup element capable of reducing an area of a read channel to increase a ratio of a surface area of a light-receiving section to the overall surface area of one pixel. The solid-state image pickup element comprises a first-conductive type planar semiconductor... Agent: Brinks Hofer Gilson & Lione

20100102363 - Air gap spacer formation: Miniaturized complex transistor devices are formed with reduced leakage and reduced miller capacitance. Embodiments include transistors having reduced capacitance between the gate electrode and source/drain contact, as by utilizing a low-K dielectric constant sidewall spacer material. An embodiment includes forming a gate electrode on a semiconductor substrate, forming a sidewall... Agent: Ditthavong Mori & Steiner, P.C.

20100102364 - Method for providing a self-aligned conductive structure: An embodiment according to the present invention comprises a method for providing a self-aligned conductive structure comprising providing a first structure on a surface, wherein the first structure comprises a first and a second layer, and providing an intermediate structure on the surface, wherein the intermediate structure at least partially... Agent: Slater & Matsil LLP

20100102365 - Semiconductor device: A semiconductor device includes a silicon substrate having a protrusion, a gate insulating film formed over an upper surface of the protrusion of the silicon substrate, a gate electrode formed over the gate insulating film, a source/drain region formed in the silicon substrate on the side of the gate electrode,... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100102367 - Image sensor and method of fabricating the same: A method of fabricating an image sensor. A method of fabricating an image sensor may include preparing a substrate including a pixel region and/or a logic region having transistors and/or gates. A method of fabricating an image sensor may include forming a first interlayer dielectric film on and/or over a... Agent: Sherr & Vaughn, PLLC

20100102366 - Integrated infrared and color cmos imager sensor: An integrated infrared (IR) and full color complementary metal oxide semiconductor (CMOS) imager array is provided. The array is built upon a lightly doped p doped silicon (Si) substrate. Each pixel cell includes at least one visible light detection pixel and an IR pixel. Each visible light pixel includes a... Agent: Sharp Laboratories Of America, Inc. C/o Law Office Of Gerald Maliszewski

20100102368 - Solid state imaging device and fabrication method for the same: A solid state imaging device and a fabrication method for the same, the solid state imaging device comprising: a circuit unit (30) formed on a substrate; and a photoelectric conversion unit (28) including a lower electrode layer (25) placed on the circuit unit (30), a compound semiconductor thin film (24)... Agent: Fish & Richardson P.C.

20100102369 - Ferroelectric memory with magnetoelectric element: A ferroelectric memory cell that has a magnetoelectric element between a first electrode and a second electrode, the magnetoelectric element comprising a ferromagnetic material layer and a multiferroic material layer with an interface therebetween. The magnetization orientation of the ferromagnetic material layer and the multiferroic material layer may be in-plane... Agent: Campbell Nelson Whipps, LLC

20100102370 - Non-volatile memory device and method of manufacturing non-volatile memory device: A non-volatile memory device including a ferroelectric capacitor is disclosed. A method of manufacturing a non-volatile memory device including a ferroelectric capacitor is also disclosed. A first electrode is formed on an insulating film provided on a semiconductor substrate. A first ferroelectric film is formed on the first electrode. The... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100102371 - Semiconductor devices including buried gate electrodes and isolation layers and methods of forming semiconductor devices including buried gate electrodes and isolation layers using self aligned double patterning: A semiconductor device, including a semiconductor substrate including isolations defining active regions of the semiconductor substrate, and a plurality of buried gate electrodes between a pair of the isolations, wherein each of the buried gate electrodes and the isolations includes a conductive layer and a capping layer.... Agent: Lee & Morse, P.C.

20100102372 - High performance one-transistor dram cell device and manufacturing method thereof: Provided are a high-performance one-transistor floating-body DRAM cell device and a manufacturing method thereof. The one-transistor floating-body DRAM cell device includes: a semiconductor substrate; a gate stack which is formed on the semiconductor substrate; a control electrode which is formed on the semiconductor substrate and surrounded by the gate stack;... Agent: The Nath Law Group

20100102373 - Trench memory with self-aligned strap formed by self-limiting process: A semiconductor structure is described. The structure includes a trench opening formed in a semiconductor substrate having a semiconductor-on-insulator (SOI) layer and a buried insulating (BOX) layer; and a filling material formed in the trench opening, the filling material forming a “V” shape within the trench memory cell, wherein the... Agent: International Business Machines Corporation Dept. 18g

20100102374 - Storage node of stack capacitor and fabrication method thereof: A storage node structure includes a substrate having thereon a conductive block region; an etching stop layer covering the conductive block region; a conductive layer penetrating the etching stop layer and electrically connecting the conductive block region; an annular shaped conductive spacer on sidewall of the conductive layer, wherein the... Agent: North America Intellectual Property Corporation

20100102376 - Atomic layer deposition processes for non-volatile memory devices: Embodiments of the invention provide memory devices and methods for forming such memory devices. In one embodiment, a method for fabricating a non-volatile memory device on a substrate is provided which includes depositing a first polysilicon layer on a substrate surface, depositing a silicon oxide layer on the first polysilicon... Agent: Patterson & Sheridan, LLP - - Appm/tx

20100102375 - Semiconductor device and manufacturing method thereof: This semiconductor device comprises a semiconductor substrate with a first impurity type; a plurality of active areas formed in the semiconductor substrate; an element isolation trench including a first trench part and a second trench part surrounding the plurality of active areas, the first trench part being extended from a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100102378 - Non-volatile memory device: A non-volatile memory device and a method of fabricating the same are disclosed. The method includes the steps of: providing a semiconductor substrate having isolation layers in an isolation region, a tunnel insulating layer formed between the isolation layers, and first electron charge layers formed between the isolation layers, wherein... Agent: Marshall, Gerstein & Borun LLP

20100102377 - Nonvolatile semiconductor memory device and method of fabricating the same: A nonvolatile semiconductor memory device includes a semiconductor substrate, a first insulating layer formed on the semiconductor substrate, a plurality of charge storage layers formed on the first insulating layer, a plurality of element isolation insulating films formed between the charge storage layers respectively, a second insulating layer formed on... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100102379 - Lateral diffused metal oxide semiconductor device: A LDMOS device includes a substrate of a first conductivity type, a deep well region of a second conductivity type, two body regions of the first conductivity type, a body connection region of the first conductivity type, two source regions of the second conductivity type, a drain region of the... Agent: J C Patents

20100102380 - Method of producing precision vertical and horizontal layers in a vertical semiconductor structure: The present invention relates to providing layers of different thickness on vertical and horizontal surfaces (15, 20) of a vertical semiconductor device (1). In particular the invention relates to gate electrodes and the formation of precision layers (28) in semiconductor structures comprising a substrate (10) and an elongated structure (5)... Agent: Foley And Lardner LLP Suite 500

20100102381 - Power semiconductor device: A power semiconductor device according to an embodiment of the present invention includes a first semiconductor layer of a first conductivity type, second semiconductor layers of the first conductivity type and third semiconductor layers of a second conductivity type, which are formed on the first semiconductor layer, have stripe shapes... Agent: Patterson & Sheridan, L.L.P.

20100102384 - Metal oxide semiconductor (mos) transistors having a recessed gate electrode: A metal oxide semiconductor (MOS) includes an isolation layer disposed in a semiconductor substrate to define an active region. A source region and a drain region are disposed on both sides of the active region such that a first direction is defined from the source region to the drain region.... Agent: Myers Bigel Sibley & Sajovec

20100102383 - Semiconductor device: An inventive semiconductor device includes: a body region of a second conductivity type provided on the drift region of a first conductivity type in a semiconductor layer; a trench extending from a surface of the body region in the semiconductor layer with its bottom located in the drift region; a... Agent: Rabin & Berdo, PC

20100102382 - Trench gate type transistor and method of manufacturing the same: The invention provides a trench gate type transistor in which the gate leakage current is prevented and the gate capacitance is reduced. A trench is formed in an N− type semiconductor layer. A thin silicon oxide film is formed on a region of the N− type semiconductor layer for the... Agent: Morrison & Foerster LLP

20100102385 - Semiconductor devices including transistors having recessed channels: Semiconductor devices including an isolation layer on a semiconductor substrate are provided. The isolation layer defines an active region of the semiconductor substrate. The device further includes an upper gate electrode crossing over the active region and extending to the isolation layer and lower active gate electrode. The lower active... Agent: Myers Bigel Sibley & Sajovec

20100102386 - Lateral double-diffused metal oxide semiconductor (ldmos) transistors: Methods of making, structures, devices, and/or applications for lateral double-diffused metal oxide semiconductor (LDMOS) transistors are disclosed. In one embodiment, an LDMOS transistor can include: (i) an n-doped deep n-well (DNW) region on a substrate; (ii) a gate oxide and a drain oxide between a source region and a drain... Agent: Michael C. Stephens, Jr.

20100102387 - Semicoductor device: An inventive semiconductor device includes a semiconductor layer, a source region provided in a surface layer portion of the semiconductor layer, a drain region provided in the surface of the semiconductor layer in spaced relation from the source region, a gate insulation film provided in opposed relation to a portion... Agent: Rabin & Berdo, PC

20100102388 - Ldmos transistor having elevated field oxide bumps and method of making same: A low Rdson LDMOS transistor having a shallow field oxide region that separates a gate electrode of the transistor from a drain diffusion region of the transistor. The shallow field oxide region is formed separate from the field isolation regions (e.g., STI regions) used to isolate circuit elements on the... Agent: Bever Hoffman & Harms, LLP 901 Campisi Way

20100102389 - Finfet with two independent gates and method for fabricating the same: A FinFET (100) comprises a fin-shaped layer-section (116) of a single-crystalline active semiconductor layer (104) extending on an insulating substrate layer (106) along a longitudinal fin direction between, a source layer-section (122), and a drain layer-section (124) of the single-crystalline active semiconductor layer (104). Furthermore, two separate gate-electrode layers (138.1,... Agent: Wilson & Ham

20100102392 - Electrostatic discharge protection circuit and integrated circuit device including electrostatic discharge protection circuit: An ESD protection circuit including a first electrostatic discharge protection circuit provided between first power supply wiring and first ground wiring; a second ESD protection circuit provided between second power supply wiring and second ground wiring; a third ESD protection circuit provided between the first ground wiring and the second... Agent: Fujitsu Patent Center C/o Cpa Global

20100102390 - Gated diode with increased voltage tolerance: In a gated diode ESD protection structure, the gate is biased to a voltage higher than ground and gate size is reduced while ensuring adequate spacing between p+ and n+ regions of the diode by blocking at least one of n-lightly doped region and p-lightly doped region.... Agent: Vollrath & Associates

20100102391 - Split-gate esd diodes with elevated voltage tolerance: In a gated diode ESD protection structure, the gate is split into two parts to divide the total reverse voltage between two gate regions.... Agent: Vollrath & Associates

20100102393 - Metal gate transistors: An integrated circuit that includes a substrate having first and second active regions is disclosed. A first transistor of a first type and a second transistor of a second type are disposed in the first and second active regions respectively. Each transistor includes a gate stack having a metal gate... Agent: HorizonIPPte Ltd

20100102395 - Semiconductor device and manufacturing method thereof: Provided is a semiconductor device capable of having a single metal/dual high-k structure with a good shape and having flat band voltages suited for nMOS and pMOS, respectively. The semiconductor device according to the one embodiment of the present invention has a first conductivity type MOSFET and a second conductivity... Agent: Mcdermott Will & Emery LLP

20100102394 - Semiconductor device and method of manufacturing the same: It is to enhance a current increasing effect by increasing a stress applied on a channel of a transistor. The invention is characterized by comprising: side wall insulating films 33 and 53 formed on a semiconductor substrate 11 with trenches 39 and 59 which are formed by removing dummy gates;... Agent: Sonnenschein Nath & Rosenthal LLP

20100102396 - Semiconductor device and manufacturing method thereof: In order that a top surface of a gate electrode does not have sharp portions, ends of the top surface of the gate electrode are rounded before refractory metal is deposited for silicidation. This reduces intensive application of film stresses which are generated in heat treatment, enabling formation of a... Agent: Mcdermott Will & Emery LLP

20100102397 - Transistor, semiconductor device including a transistor and methods of manufacturing the same: A transistor, a semiconductor device including the transistor and methods of manufacturing the same are provided, the transistor including a threshold voltage adjusting layer contacting a channel layer. A source electrode and a drain electrode contacting may be formed opposing ends of the channel layer. A gate electrode separated from... Agent: Harness, Dickey & Pierce, P.L.C

20100102398 - Material removing processes in device formation and the devices formed thereby: Devices having voids are producible by employing an electrochemical corrosion process. For example, an electrically conductive region is formed to have a surrounding chemically distinct region. Such formation is possible through conventional semiconductor processing techniques such as a copper damascene process. The surrounded conducting material is configured to be in... Agent: Hitt Gaines, PC Lsi Corporation

20100102399 - Methods of forming field effect transistors and devices formed thereby: Methods of forming field effect transistors include forming a first gate electrode on a semiconductor substrate and forming insulating spacers on sidewalls of the first gate electrode. At least a portion of the first gate electrode is then removed from between the insulating spacers to thereby expose inner sidewalls of... Agent: Myers Bigel Sibley & Sajovec

20100102400 - Low-k isolation spacers for conductive regions: A multi-component low-k isolation spacer for a conductive region in a semiconductor structure is described. In one embodiment, a replacement isolation spacer process is utilized to enable the formation of a two-component low-k isolation spacer adjacent to a sidewall of a gate electrode in a MOS-FET device.... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100102401 - Semiconductor transistor having a stressed channel: A process is described for manufacturing an improved PMOS semiconductor transistor. Recesses are etched into a layer of epitaxial silicon. Source and drain films are deposited in the recesses. The source and drain films are made of an alloy of silicon and germanium. The alloy is epitaxially deposited on the... Agent: Intel Corporation C/o Cpa Global

20100102402 - Method of fabricating a transistor with semiconductor gate combined locally with a metal: A method of forming a field effect transistor comprising a gate formed on an insulating layer, the gate having, in a zone in contact with the insulating layer, a semiconducting central zone and lateral zones in the length of the gate, the method comprising forming a gate comprising a portion... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20100102403 - Method and apparatus for fabricating piezoresistive polysilicon by low-temperature metal induced crystallization: The present invention provides a method and apparatus for fabricating piezoresistive polysilicon on a substrate by low-temperature metal induced crystallization by: (1) providing the substrate having a passivation layer; (2) performing, at or near room temperature in a chamber without breaking a vacuum or near-vacuum within the chamber, the steps... Agent: Chalker Flores, LLP

20100102406 - Magnetic stack design: A magnetic stack having a free layer having a switchable magnetization orientation, a reference layer having a pinned magnetization orientation, and a barrier layer therebetween. The stack includes an annular antiferromagnetic pinning layer electrically isolated from the free layer and in physical contact with the reference layer. In some embodiments,... Agent: Campbell Nelson Whipps, LLC

20100102404 - Magnetic tunnel junction and method of fabrication: In a particular embodiment, a method of forming a magnetic tunnel junction (MTJ) device includes applying a dielectric layer to a surface, applying a metal layer to the dielectric layer, and adding a cap layer on the dielectric layer. The method also includes forming a magnetic tunnel junction (MTJ) stack... Agent: Qualcomm Incorporated

20100102407 - Magnetoresistive element and method of manufacturing the same: A magnetoresistive element includes a stacked structure including a fixed layer having a fixed direction of magnetization, a recording layer having a variable direction of magnetization, and a nonmagnetic layer sandwiched between the fixed layer and the recording layer, a first protective film covering a circumferential surface of the stacked... Agent: Knobbe Martens Olson & Bear LLP

20100102405 - St-ram employing a spin filter: A memory cell that includes a first electrode layer; a spin filter layer that includes a material that has exchange splitting in the conduction band; and a magnetic layer, wherein the magnetization of the second magnetic layer can be effected by the torque of electrons tunneling through, wherein the spin... Agent: Campbell Nelson Whipps, LLC

20100102408 - Electron tube: An electron tube of the present invention includes: a vacuum vessel including a face plate portion made of synthetic silica and having a surface on which a photoelectric surface is provided, a stem portion arranged facing the photoelectric surface and made of synthetic silica, and a side tube portion having... Agent: Drinker Biddle & Reath (dc)

20100102409 - Image sensor element and image sensor: An image sensor element is provided according to an embodiment which comprises image sensor element portions sensitive to at least partially different wavelength ranges.... Agent: Edwards Angell Palmer & Dodge LLP

20100102410 - Light sensor: A light sensor includes an element forming region having a light detection region. The element forming region excluding the light detection region is covered with a conductive film having a light shielding property, and the light detection region is covered with a conductive film having a light transmissive property. A... Agent: Osha Liang L.L.P.

20100102411 - Photodetector for backside-illuminated sensor: A backside-illuminated sensor including a semiconductor substrate. The semiconductor substrate has a front surface and a back surface. A plurality of pixels are formed on the front surface of the semiconductor substrate. At least one pixel includes a photogate structure. The photogate structure has a metal gate that includes a... Agent: Haynes And Boone, LLPIPSection

20100102412 - Germanium photodetector and method of fabricating the same: Provided is a germanium photodetector having a germanium epitaxial layer formed without using a buffer layer and a method of fabricating the same. In the method, an amorphous germanium layer is formed on a substrate. The amorphous germanium layer is heated up to a high temperature to form a crystallized... Agent: Ampacc Law Group

20100102413 - Lithographic apparatus, device manufacturing method and position control method: A lithographic apparatus includes a support configured to support a patterning device, the patterning device configured to pattern a beam of radiation to form a patterned beam of radiation; a positioning device configured to move the support in a first direction; a measurement device configured to measure a relative position... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20100102414 - Semiconductor device: The present invention aims at providing a semiconductor device that can prevent quality degradation of a signal caused by noise, reduce a malfunction of a circuit caused by latch-up, and secure favorable isolation, and the semiconductor device includes: a first layer with a resistivity higher than 10·cm and lower than... Agent: Greenblum & Bernstein, P.L.C

20100102415 - Methods for selective permeation of self-assembled block copolymers with metal oxides, methods for forming metal oxide structures, and semiconductor structures including same: Methods of forming metal oxide structure and methods of forming metal oxide patterns on a substrate using a block copolymer system formulated for self-assembly are disclosed. The metal oxide structures and patterns may be used, for example, as a mask for sublithographic patterning during various stages of semiconductor device fabrication.... Agent: Trask Britt, P.C./ Micron Technology

20100102416 - Integrated circuit packages incorporating an inductor and methods: Integrated circuit packages incorporating an inductor and methods for their fabrication. The lead frame used in packaging the integrated circuit includes a first area for receiving the integrated circuit, and a second area having a plurality of connections from one side to the other side of the lead frame, thereby... Agent: Maxim/bstz Blakely Sokoloff Taylor & Zafman LLP

20100102417 - Vapor deposition method for ternary compounds: Embodiments provide a method for depositing or forming titanium aluminum nitride materials during a vapor deposition process, such as atomic layer deposition (ALD) or plasma-enhanced ALD (PE-ALD). In some embodiments, a titanium aluminum nitride material is formed by sequentially exposing a substrate to a titanium precursor and a nitrogen plasma... Agent: Patterson & Sheridan, LLP - - Appm/tx

20100102418 - Bipolar device having improved capacitance: The invention, in one aspect, provides a semiconductor device that comprises a collector located in a semiconductor substrate and an isolation region located under the collector, wherein a peak dopant concentration of the isolation region is separated from a peak dopant concentration of the collector that ranges from about 0.9... Agent: Hitt Gaines, PC Lsi Corporation

20100102419 - Epitaxy-level packaging (elp) system: An epitaxy-level packaging grows an epitaxial film and transfers it to an assembly substrate. The film growth and transfer are made using an epitaxy lateral overgrowth technique. The formed epitaxial film on an assembly substrate can be further processed to form devices such as solar cell, light emitting diode, and... Agent: Law Office Of J. Nicholas Gross, Prof. Corp.

20100102420 - Semiconductor device and method for manufacturing the same: To provide a semiconductor device in which an interval between first wells can be shortened by improving a separation breakdown voltage between the first wells and a method for manufacturing the same. A semiconductor device includes a first conductivity type semiconductor substrate 1, second conductivity type first wells 2 and... Agent: Sughrue Mion, PLLC

20100102421 - Integrated circuit chip with seal ring structure: An integrated circuit chip includes an analog and/or RF circuit block and a seal ring structure surrounding the analog and/or RF circuit block. The seal ring structure comprises a continuous outer seal ring and an inner seal ring, wherein the inner seal ring comprises a gap that is situated in... Agent: North America Intellectual Property Corporation

20100102422 - Semiconductor device: A method of fabricating a semiconductor device includes depositing a mask of low melting point material on a surface of the semiconductor device; depositing a layer to be structured relative to the mask; and removing the mask of low melting point material.... Agent: Dicke, Billig & Czaja

20100102423 - Semiconductor device manufacturing method, semiconductor device, and wiring board: A semiconductor device manufacturing method includes (a) bonding a first surface of a metal plate to a substrate, (b) forming a plurality of metal posts that are arranged in vertical and lateral directions in a plan view and include a first metal post and a second metal post, by partially... Agent: Oliff & Berridge, PLC

20100102424 - Semiconductor device and fabrication method therefor: The present invention provides a semiconductor device and a fabrication method therefor, the semiconductor device including a first semiconductor chip disposed on a substrate, a first sealing resin sealing the first semiconductor chip, a built-in semiconductor device disposed on the first sealing resin, and a second sealing resin sealing the... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20100102425 - Ultra wideband system-on-package and method of manufacturing the same: This research discloses an ultra wideband system-on-package (SoP). The SoP includes a package body; a first integrated circuit mounted on the package body; a first signal transmission unit connected to the first integrated circuit; a signal via connected to the first signal transmission unit and including a slab line and... Agent: Ampacc Law Group

20100102426 - Dual face package and method of manufacturing the same: Disclosed herein is a dual face package and a method of manufacturing the same. The dual face package includes a semiconductor substrate including a through-electrode connected to a die pad disposed on one side of the semiconductor substrate, and a lower redistribution layer disposed on another side thereof and connected... Agent: Staas & Halsey LLP

20100102428 - Semiconductor package: A semiconductor package that includes a first semiconductor device mounted on a package substrate and includes an inactive surface having a cavity and an active surface opposite to the inactive surface, a second semiconductor device that is disposed on the active surface and electrically connected to the first semiconductor device,... Agent: Stanzione & Kim, LLP

20100102427 - Semiconductor packaging device: A semiconductor packaging device is provided. Semiconductor package groups, a side retainer wall, and a filling layer may be located on a base plate. The side retainer wall may be located around the semiconductor package groups. The filling layer may be located between the side retainer wall and the semiconductor... Agent: Stanzione & Kim, LLP

20100102433 - Apparatus for use in semiconductor wafer processing for laterally displacing individual semiconductor devices away from one another: A chip-scale or wafer-level package, having passivation layers on substantially all surfaces thereof to form a hermetically sealed package, is provided. The package may be formed by disposing a first passivation layer on the passive or back side surface of a semiconductor wafer. The semiconductor wafer may be attached to... Agent: Trask Britt, P.C./ Micron Technology

20100102429 - Flip-chip package structure with block bumps and the wedge bonding method thereof: A flip-chip block structure with block bumps comprises a die, a substrate, a first block bump, and a second block bump. The die comprises an active side and a backside, a first die pad and a second die pad are disposed on the active surface, and an electrode layer is... Agent: Rosenberg, Klein & Lee

20100102431 - Power module and inverter for vehicles: According to the present invention, a power module in which the thermal stress between a semiconductor chip and a substrate is relaxed by liquefaction of a solder layer, by which the semiconductor chip is positioned on the substrate, such that generation of cracks between the semiconductor chip and the substrate... Agent: Sughrue Mion, PLLC

20100102434 - Semiconductor memory device having improved voltage transmission path and driving method thereof: Provided are a semiconductor memory device and a method of driving the device which can improve a noise characteristic of a voltage signal supplied to a memory cell of the device. The semiconductor memory device includes a first semiconductor chip and one or more second semiconductor chips stacked on the... Agent: Muir Patent Consulting, PLLC

20100102430 - Semiconductor multi-chip package: A semiconductor multichip package includes a substrate having a top surface on which a bonding pad is formed, and a bottom surface opposing the top surface, on which an external connection terminal electrically connected with the bonding pad is formed, a first semiconductor chip mounted on a region of the... Agent: Mcdermott Will & Emery LLP

20100102432 - Semiconductor package: A semiconductor package has an interconnection substrate including a first conductive lead and a second longer conductive lead, and a semiconductor chip including a first cell region, a second cell region, a first conductive pad electrically connected to the first cell region and a second conductive pad electrically connected to... Agent: Volentine & Whitt PLLC

20100102435 - Method and apparatus for reducing semiconductor package tensile stress: A semiconductor package is provided having reduced tensile stress. The semiconductor package includes a package substrate and a semiconductor die. The semiconductor die is coupled electrically and physically to the package substrate and includes a stress relieving layer incorporated therein. The stress relieving layer has a predetermined structure and a... Agent: Ingrassia Fisher & Lorenz, P.C. (gf)

20100102437 - Semiconductor package and manufacturing method thereof: A semiconductor package includes a semiconductor substrate having a semiconductor device arranged on one surface thereof; a cap substrate having one surface that opposes the one surface of the semiconductor substrate via a gap; a spacer that is arranged between the one surface of the semiconductor substrate and the one... Agent: Sughrue Mion, PLLC

20100102436 - Shrink package on board: A method of forming a device is disclosed. The method includes providing a printed circuit board substrate having a die attach region on a first surface of the substrate. The method also includes attaching a die to a die attach region. The die is electrically coupled to first land pads... Agent: HorizonIPPte Ltd

20100102438 - Semiconductor device and method of manufacturing the same: A semiconductor device includes: a substrate having first and second surfaces, the first surface comprising first and second regions; a first semiconductor chip covering the first region; a first seal covering the second region and the first semiconductor chip; and a second seal covering the second surface.... Agent: Mcginn Intellectual Property Law Group, PLLC

20100102439 - Semiconductor device with protective screen: A multi-layer substrate has a front face with external pads. An integrated-circuit chip is positioned inside of the multi-layer substrate. An electronic and/or electric component is also positioned inside of the substrate above the integrated-circuit chip. An electrical connection network is formed in the multi-layer substrate to selectively connect the... Agent: Gardere Wynne Sewell LLP Intellectual Property Section

20100102440 - High density three dimensional semiconductor die package: A semiconductor package is disclosed including a plurality semiconductor die mounted on stacked and bonded layers of substrate, for example polyimide tape used in tape automated bonding processes. The tape may have a plurality of repeating patterns of traces and contact pads formed thereon. The traces each include aligned interconnect... Agent: Vierra Magen/sandisk Corporation

20100102441 - Semiconductor device: Between a logic LSI (4) arranged on one side of a DRAM (1) and jointed to the DRAM and a radiating member (6) arranged on the other side of the DRAM (1) for irradiating the heats of the DRAM (1) and the logic LSI (4), there is disposed a heat... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100102442 - Heat spreader having single layer of diamond particles and associated methods: A heat spreader is presented which can provide effective thermal management in a cost effective manner. The heat spreader includes a plurality of diamond particles arranged in a single layer surrounded by a metallic mass. The metallic mass cements the diamond particles together. The layer of diamond particles is a... Agent: Thorpe North & Western, LLP.

20100102443 - High-frequency semiconductor device: An example of a high-frequency semiconductor device includes two unit semiconductor devices. Each of the two unit semiconductor devices has a ground substrate, a high-frequency semiconductor element, an input-side matching circuit, an output-side matching circuit, a side wall member, an input terminal, and an output terminal. The ground substrate has... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100102444 - Wafer level package using stud bump coated with solder: A method of fabricated a wafer level package is described. In one embodiment, the method includes fabricating at least one active device on a semiconductor wafer that has not been singulated, with the active device having a plurality of bonding pads exposed at an upper surface of the wafer. Prior... Agent: Townsend And Townsend And Crew, LLP

20100102445 - Wiring substrate, solid-state imaging apparatus using the same, and manufacturing method thereof: In one embodiment, a miniaturized solid-state imaging apparatus includes a body having a cavity for mounting a semiconductor chip therein. The body has an overhanging portion extending toward the cavity. Further, a lead is disposed within the body. The lead has one end exposed through a top surface of the... Agent: F. Chau & Associates, LLC

20100102446 - Semiconductor electronic component and semiconductor device using the same: The present invention provides: a chip-on-chip type semiconductor electronic component in which a circuit surface of a first semiconductor chip and a circuit surface of a second semiconductor chip are opposed to each other, wherein the distance X between the first semiconductor chip and the second semiconductor chip is 50... Agent: Ditthavong Mori & Steiner, P.C.

20100102447 - Substrate of window ball grid array package and method for making the same: The present invention relates to a substrate of a window ball grid array package and a method for making the same. The substrate includes a core layer, a first conductive layer, a second conductive layer, at least one window and at least one via. The window includes a first through... Agent: Mccracken & Frank LLP

20100102449 - Semiconductor device and method for fabricating the same: In a semiconductor device including: an insulating film (6) formed over a substrate (1); a buried metal interconnect (10) formed in the insulating film (6); and a barrier metal film (A1) formed between the insulating film (6) and the metal interconnect (10), the barrier metal film (A1) includes a metal... Agent: Mcdermott Will & Emery LLP

20100102448 - Semiconductor device and method of fabricating the same: A semiconductor device according to one embodiment includes: a semiconductor element formed on a semiconductor substrate; a metal wiring formed above the semiconductor element; an amorphous silicon film formed above the semiconductor element, the amorphous silicon film being insulated from the metal wiring; and a metal diffusion blocking film formed... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100102450 - Zinc oxide based composites and methods for their fabrication: A transparent, electrically conductive composite includes a layer of molybdenum oxide or nickel oxide deposited on a layer of zinc oxide layer. The molybdenum component exists in a mixed valence state in the molybdenum oxide. The nickel component exists in a mixed valence state in the nickel oxide. The composite... Agent: The Eclipse Group LLP

20100102452 - Method for fabricating semiconductor device and semiconductor device: A method for fabricating a semiconductor device, includes forming a dielectric film above a substrate; forming a cap film, in which pores are formed, on the dielectric film; forming an opening in the cap film and the dielectric film; depositing a conductive material inside the opening; and forming a diffusion... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100102451 - Semiconductor device and method for manufacturing the same: A trench is formed by a process which removes a damage layer formed on a sidewall of a low dielectric constant layer, a process which forms a second protection insulating layer by a chemical vapor deposition (CVD) technique and forms a second concave portion by covering a sidewall of the... Agent: Young & Thompson

20100102456 - Semiconductor device and method of forming double-sided through vias in saw streets: A semiconductor device is made by creating a gap between semiconductor die on a wafer. An insulating material is deposited in the gap. A first portion of the insulating material is removed from a first side of the semiconductor wafer to form a first notch. The first notch is less... Agent: Robert D. Atkins

20100102455 - Semiconductor device and method of manufacturing the same: A semiconductor device includes: a first layer; a second layer above the first layer; first and second multi-layered structures; and a supporter. The first and second multi-layered structures extend from the first layer to connect to the second layer. The supporter extends from the first layer to connect to the... Agent: Young & Thompson

20100102454 - Semiconductor device and method of manufacturing the semiconductor device: When an etch stopper film is stacked on a pad electrode in which an opening is provided and a through electrode is embedded in a through hole formed in a semiconductor substrate, a distal end of the through electrode penetrates a part of the pad electrode via the opening and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100102453 - Three-dimensional integrated circuit stacking-joint interface structure: A system, a structure and a method of manufacturing stacked semiconductor substrates is presented. A first substrate includes a first side and a second side. A through substrate via (TSV) protrudes from the first side of the first substrate. A first protruding portion of the TSV has a conductive protective... Agent: Slater & Matsil, L.L.P.

20100102457 - Hybrid semiconductor chip package: Various apparatus and method of packaging semiconductor chips are disclosed. In one aspect, a method of manufacturing is provided that includes placing a semiconductor chip package into a mold. The semiconductor chip package includes a substrate that has a side and a first semiconductor chip coupled to the side in... Agent: Timothy M Honeycutt Attorney At Law

20100102458 - Semiconductor package system with cavity substrate and manufacturing method therefor: A method of manufacturing a semiconductor package system includes: providing a first substrate; providing a second substrate having a cavity, the second substrate being attached to the first substrate; connecting the first substrate to the second substrate using an interconnect, the interconnect being in the cavity; and attaching a semiconductor... Agent: Law Offices Of Mikio Ishimaru

20100102459 - Semiconductor device: The semiconductor device includes: a semiconductor chip; a die pad for holding the semiconductor chip; a lead; and a sealing resin material for sealing the semiconductor chip, the die pad and an inner portion of the lead. The die pad has an upset portion protruding upward to form a flat... Agent: Mcdermott Will & Emery LLP

20100102460 - Semiconductor device and manufacturing method thereof: A semiconductor device and its manufacturing method are offered to increase the number of semiconductor devices obtained from a semiconductor wafer while simplifying a manufacturing process. After forming a plurality of pad electrodes in a predetermined region on a top surface of a semiconductor substrate, a supporter is bonded to... Agent: Morrison & Foerster LLP

20100102461 - Semiconductor device and method of manufacturing the same: A semiconductor device including a substrate, a semiconductor chip mounted on the substrate, and an encapsulation resin encapsulating the semiconductor chip, wherein the encapsulation resin contains a first resin region composed of a first resin composition, a second resin region composed of a second resin composition, and a mixed layer... Agent: Mcginn Intellectual Property Law Group, PLLC

  
04/22/2010 > patent applications in patent subcategories. category listing, related patent applications

20100096609 - Phase change memory device having a layered phase change layer composed of multiple phase change materials and method for manufacturing the same: A phase change memory device that has a layered phase change layer composed of multiple phase change materials is presented. The device includes a semiconductor substrate, an interlayer dielectric layer, a high-temperature crystallization phase change, a low-temperature crystallization phase change layer, and an upper electrode. The interlayer dielectric layer formed... Agent: Ladas & Parry LLP

20100096610 - Phase-change material memory cell: A memory cell includes a current-steering device, a phase-change material disposed thereover, and a heating element and/or a cooling element.... Agent: Goodwin Procter LLP Patent Administrator

20100096612 - Phase change memory device having an inversely tapered bottom electrode and method for manufacturing the same: A phase change memory device having an inversely tapered bottom electrode and a method for forming the same is presented. The phase change memory device includes a semiconductor substrate, an insulation layer, a bottom electrode contact and a phase change pattern. The insulation layer includes a bottom electrode contact hole... Agent: Ladas & Parry LLP

20100096613 - Semiconductor device: A phase change memory is formed of a plug buried within a through-hole in an insulating film formed on a semiconductor substrate, an interface layer formed on the insulating film in which the plug is buried, a recording layer formed of a chalcogenide layer formed on the interface layer, and... Agent: Miles & Stockbridge PC

20100096611 - Vertically integrated memory structures: A device including a transistor that includes a source region; a drain region; and a channel region, wherein the channel region electrically connects the source region and the drain region along a channel axis; and a memory cell, wherein the memory cell is disposed adjacent the drain region so that... Agent: Campbell Nelson Whipps, LLC

20100096616 - Light-emitting and light-detecting optoelectronic device: An exemplary optoelectronic device includes a substrate and an epitaxial structure formed on the optoelectronic device. The epitaxial structure includes an N-type semiconductor layer, a P-type semiconductor layer, a multi-quantum-well layer and an undoped semiconductor layer. The multi-quantum-well layer is arranged between the N-type semiconductor layer and the P-type semiconductor... Agent: PCe Industry, Inc. Att. Steven Reiss

20100096615 - Light-emitting device: A light-emitting device includes a group III nitride semiconductor layer of a multilayer structure consisting of a group III nitride semiconductor having a major surface defined by a nonpolar plane or a semipolar plane and having at least an n-type layer and a p-type layer. A surface of the group... Agent: Rabin & Berdo, PC

20100096614 - Light-emitting diode and method of manufacturing the same: A light-emitting diode and a method of manufacturing the light-emitting diode are provide, the light-emitting diode including a lower electrode on a substrate, a template layer on the lower electrode. The template layer may have a plurality of open regions. A plurality of nano-dashes may be formed in the plurality... Agent: Harness, Dickey & Pierce, P.L.C

20100096617 - Transparent polarized light-emitting device: A transparent directional polarized light-emitting device includes a transparent anode and a transparent cathode, a radiation-emitting layer between the anode and the cathode, an optically active reflective layer with a reflection band that matches a chirality and at least partially encompasses a wavelength band of radiation emitted from the radiation-emitting... Agent: Fish & Richardson P.C.

20100096618 - Doping of nanostructures: A catalyst particle for use in growth of elongated nanostructures, such as e.g. nanowires, is provided. The catalyst particle comprises a catalyst compound for catalyzing growth of an elongated nanostructure comprising a nanostructure material without substantially dissolving in the nanostructure material and at least one dopant element for doping the... Agent: Knobbe Martens Olson & Bear LLP

20100096619 - electronic devices using carbon nanotubes having vertical structure and the manufacturing method thereof: Provided are an electronic device to which vertical carbon nanotubes (CNTs) are applied and a method of manufacturing the same. The method of manufacturing an electronic device having a vertical CNT includes the steps of: (a) preparing a substrate on which a silicon source is formed; (b) forming a first... Agent: Rabin & Berdo, PC

20100096623 - Forming electrodes to small electronic devices having self-assembled organic layers: In one embodiment of the invention, a method of fabricating a SAM device comprises the steps of: (a) providing a substrate having a top surface and a first metal electrode disposed on the top surface, (b) annealing the first metal electrode, (c) forming a SAM layer on a major surface... Agent: Michael J. Urbano

20100096627 - Light-emitting device and method for manufacturing the same: A light-emitting element is disclosed that can drive at a low driving voltage and that has a longer lifetime than the conventional light-emitting element, and a method is disclosed for manufacturing the light-emitting element. The disclosed light-emitting element includes a plurality of layers between a pair of electrodes; and at... Agent: Eric Robinson

20100096622 - Organic electroluminescence element: An organic EL element which has no layer that prevents penetration of holes and electrons to the counter electrode. The organic EL element includes: an anode, a hole injecting and transporting layer formed on the anode, a light emitting layer formed on the hole injecting and transporting layer, an electron... Agent: Ladas & Parry LLP

20100096624 - Organic electroluminescent device and display using same: An organic electroluminescent device (1) including: an emitting layer (14) between a pair of electrodes that are an anode (12) and a cathode (17), and a suppressing layer arranged between an electrode and the emitting layer (14), the suppressing layer regulating the amount of electrons or holes supplied to the... Agent: Steptoe & Johnson LLP

20100096625 - Organic field-effect transistor and method of fabricating this transistor: This organic field effect transistor comprises a semiconductor layer made of an organic semiconductor material. The mobility μlsup of the charge carriers in the first portion of the semiconductor layer is X times greater than the mobility μinf of the charge carriers in the second portion of the semiconductor layer,... Agent: Burr & Brown

20100096626 - Organic light emitting device: An organic light emitting device includes a transistor having gate, source, and drain electrodes, and first electrode connected to one of the source or drain electrodes. The device also includes an emitting layer positioned on the first electrode and a second electrode positioned on the emitting layer. Each of the... Agent: Ked & Associates, LLP

20100096620 - Organic thin film transistor and method of fabricating the same: A method of fabricating an organic thin film transistor is provided. The method includes forming a source, a drain and a gate on a substrate and forming a dielectric layer to isolate the gate from the source and isolate the gate from the drain. An organic active material layer is... Agent: Jianq Chyun Intellectual Property Office

20100096621 - Organic transistor and manufacture method thereof: [SOLVING MEANS] An organic transistor includes a substrate 1, a gate electrode 2 formed on the substrate 1, a gate insulating layer formed on the gate electrode 2, a source electrode 4 and a drain electrode 5 formed on the gate insulating layer 3, an organic semiconductor layer 6 provided... Agent: Wenderoth, Lind & Ponack, L.L.P.

20100096628 - Multi-layered memory apparatus including oxide thin film transistor: Provided is a multi-layered memory apparatus including an oxide thin film transistor. The multi-layered memory apparatus includes an active circuit unit and a memory unit formed on the active circuit unit. A row line and a column line are formed on memory layers. A selection transistor is formed at a... Agent: Harness, Dickey & Pierce, P.L.C

20100096629 - Multi-chip module for automatic failure analysis: The invention provides a multi-chip module. In one embodiment, the multi-chip module comprises a serial flash die and a primary die, and the primary die comprises a built-in self-test controller and a serial flash controller. The built-in self-test controller generates a write command to write first data to a memory... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100096630 - Bottom-gate thin film transistor and method of fabricating the same: A bottom-gate thin film transistor includes a gate electrode, a gate insulating layer and a microcrystalline silicon layer. The gate electrode is disposed on a substrate. The gate insulating layer is made up of silicon nitride and disposed on the gate electrode and the substrate. The microcrystalline silicon layer is... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100096631 - Thin film transistor and method for manufacturing the same: A thin film transistor includes, over a substrate having an insulating surface, a gate insulating layer covering a gate electrode; a semiconductor layer which includes a plurality of crystalline regions in an amorphous structure and which forms a channel formation region, in contact with the gate insulating layer; a semiconductor... Agent: Nixon Peabody, LLP

20100096632 - Display device and manufacturing method thereof: A second insulation layer which is formed by stacking a plurality of layers made of different materials in a mutually contact manner is formed such that the second insulation layer covers a source region and a drain region and also covers a gate electrode from above. A first contact hole... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100096633 - Flexible light-emitting device, electronic device, and method for manufacturing flexible-light emitting device: It is an object to provide a flexible light-emitting device with long lifetime in a simple way and to provide an inexpensive electronic device with long lifetime using the flexible light-emitting device. A flexible light-emitting device is provided, which includes a substrate having flexibility and a light-transmitting property with respect... Agent: Eric Robinson

20100096634 - Panel structure, display device including same, and methods of manufacturing panel structure and display device: Provided may be a panel structure, a display device including the panel structure, and methods of manufacturing the panel structure and the display device. Via holes for connecting elements of the panel structure may be formed by performing one process. For example, via holes for connecting a transistor and a... Agent: Harness, Dickey & Pierce, P.L.C

20100096636 - Thin film transistor array having storage capacitor: A thin film transistor array comprising a substrate, a plurality of scan lines, a plurality of data lines, a plurality of thin film transistors, a plurality of common lines, a plurality of top electrodes, a plurality of connection lines and a plurality of pixel electrodes is provided. Wherein, each thin... Agent: Jianq Chyun Intellectual Property Office

20100096635 - Thin film transistor array panel including assistant lines: Improved thin film transistor array panels are provided. In one embodiment, a panel includes a plurality of gate lines, data lines, and a plurality of switching elements connected to the gate lines and the data lines. An interlayer insulating layer is formed between the gate lines and the data lines.... Agent: Innovation Counsel LLP

20100096637 - Thin film transistor and manufacturing method thereof: Off current of a thin film transistor is reduced, and on current of the thin film transistor is increased, and variation in electric characteristics is reduced. As a structure of semiconductor layers which form a channel formation region of a thin film transistor, a first semiconductor layer including a plurality... Agent: Nixon Peabody, LLP

20100096639 - Active matrix substrate: The active-matrix substrate (100) of the present invention satisfies d2>d1 and d2+A1/2>d3+L1/2, where d1 is the length of the shortest line segment that connects together a channel region (134) and a gettering region (112) as measured by projecting the line segment onto a line that connects together the channel region... Agent: Nixon & Vanderhye, PC

20100096638 - Thin film transistor substrate, method of manufacturing the same, and display apparatus having the same: A thin film transistor substrate that includes a substrate, first and second gate electrodes that are formed on the substrate, a gate insulating layer that is formed on the first and second gate electrodes, a first semiconductor and a second semiconductor that are formed on the gate insulating layer, and... Agent: F. Chau & Associates, LLC

20100096640 - Self-assembled heterogeneous integrated optical analysis system: Optical analysis system fluidically self-assembled using shape-coded freestanding optoelectronic components and a template having shape-coded recessed binding sites connected by an embedded interconnect network. Also includes methods of manufacture and use for optical analyses.... Agent: Christensen, O'connor, Johnson, Kindness, PLLC

20100096641 - Light emitting device and method for manufacturing the same: A light emitting device according to an embodiment is provided. The light emitting device comprises a second electrode layer, a third conductive semiconductor layer comprising a schottky contact region and an ohmic contact region on the second electrode layer, a second conductive semiconductor layer on the third conductive semiconductor layer,... Agent: Birch Stewart Kolasch & Birch

20100096645 - Display device and manufacturing method thereof: A manufacturing method of a display device and a display device which can reduce the number of times that an insulation substrate is put into a CVD device and is taken out from the CVD device are provided. The manufacturing method of a display device includes the steps of forming... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100096644 - Light emitting device package and light emitting apparatus: Disclosed are a light emitting device package and a light emitting apparatus. The light emitting device package comprises a package body comprising a light emitting surface inclined at an oblique angle with respect to a bottom surface, a plurality of lead electrodes in the package body, and at least one... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100096642 - Packaging struture for high power light emitting diode(led) chip: The present invention relates to a packaging structure for high-power light emitting diode (LED) chip, comprising a metal plate, insulators and a cover plate. The metal plate comprises a containing slot and isolating slots formed on the surface by working, and the insulators can be embedded in the isolating slot.... Agent: Brilliant Technology Co., Ltd.

20100096646 - Semiconductor light emitting device and light emitting apparatus having thereof: Embodiments relate to a semiconductor light emitting device and a light emitting apparatus comprising the same. The semiconductor light emitting device according to embodiments comprises a plurality of light emitting cells comprising a plurality of compound semiconductor layers; a plurality of ohmic contact layers on the light emitting cells; a... Agent: Birch Stewart Kolasch & Birch

20100096643 - Semiconductor light source for illuminating a physical space including a 3-dimensional lead frame: The present invention is a semiconductor light source 100 for illuminating physical spaces including a lead frame with multiple facets 101. Each facet can have one or more semiconductor light emitting devices 108, such as LEDs, located on it. The light source is disclosed in threaded 100, surface mounted 400,... Agent: Geoffrey E. Dobbin, Patent Attorney

20100096648 - Ac light emitting diode and method for fabricating the same: The present invention relates to an AC light emitting diode. An object of the present invention is to provide an AC light emitting diode wherein various designs for enhancement of the intensity of light, prevention of flickering of light or the like become possible, while coming out of a unified... Agent: H.c. Park & Associates, PLC

20100096647 - Light output device: A light output device comprises a substrate arrangement comprising first and second light transmissive substrates (1,2) and an electrode arrangement (3a,3b) sandwiched between the substrates. A plurality of light source devices (4) are integrated into the structure of the substrate arrangement and connected to the electrode arrangement. The electrode arrangement... Agent: Philips Intellectual Property & Standards

20100096651 - Iii-nitride semiconductor light emitting device: The present disclosure relates to a III-nitride semiconductor light-emitting device including a substrate with a first groove and a second groove formed therein, the substrate including a first surface and a second surface opposite to the first surface, a plurality of III-nitride semiconductor layers including a first semiconductor layer formed... Agent: Harness, Dickey, & Pierce, P.l.c

20100096650 - Nitride semiconductor light emitting element: Provided is a nitride semiconductor light emitting element capable of producing an emission spectrum having two peaks with stable ratio of emission peak intensity. The nitride semiconductor light emitting 1 comprises an active layer 12 disposed between an n-type nitride semiconductor layer 11 and a p-type nitride semiconductor layer 13.... Agent: Birch Stewart Kolasch & Birch

20100096649 - Semiconductor light emitting device and manufacturing method therefor: A semiconductor light emitting device of double hetero junction includes an active layer and clad layers. The clad layers include an n-type layer and p-type layer. The clad layers sandwich the active layer. A band gap energy of the clad layers is larger than that of the active layer. The... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20100096656 - Cationic conjugated polyelectrolyte electron injection layers altered with counter anions having oxidative properties: Counter anions having oxidative properties alter the performance of solution processed multilayer polymer light emitting diodes (PLEDs) that use cationic conjugated polyelectrolytes (CPEs) as electron injection layers (EILs). In some versions, PLEDs with poly(2-methoxy-5-(2′-ethylhexyloxy)-1,4-phenylene vinylene) (MEH-PPV) emissive layers and cationic CPE EILs are altered with halide counter anions to exhibit... Agent: Berliner & Associates

20100096653 - Light emitting diode package: A side-view type light emitting diode package for emitting light, emitted from a light emitting diode chip, toward a side surface is disclosed. The side-view type light emitting diode package comprises a package body having an opening portion for exposing the light emitting diode chip in a light emitting direction;... Agent: H.c. Park & Associates, PLC

20100096657 - Light-emitting device having a patterned surface: The disclosure provides a light-emitting device comprising a substrate, an intermediate layer formed on the substrate, a first doped semiconductor layer with first conductivity-type formed on the intermediate layer, a second doped semiconductor layer with second conductivity-type formed on the first doped semiconductor layer, an active layer formed between the... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100096654 - Light-emitting display device: The light-emitting display device comprises first and second thin film transistors. The first thin film transistor includes a first gate electrode; a first oxide semiconductor film; and a first electrode and a second electrode which are electrically connected to the first oxide semiconductor film. The second thin film transistor includes... Agent: Eric Robinson

20100096652 - Semiconductor light emitting device: The present invention provides a semiconductor light emitting device including a conductive substrate, a first electrode layer, an insulating layer, a second electrode layer, a second semiconductor layer, an active layer, and a first semiconductor layer which are sequentially stacked, wherein an area where the first electrode layer and the... Agent: Mcdermott Will & Emery LLP

20100096655 - Top emission type organic electroluminescent device and method of fabricating the same: An organic electroluminescent device includes a first substrate including a plurality of pixel regions; a thin film transistor on the first substrate and in each pixel region; a second substrate facing the first substrate; an organic electroluminescent diode on the second substrate and connected to the thin film transistor; a... Agent: Morgan Lewis & Bockius LLP

20100096661 - Light emitting diode module: Provided an LED module comprising a metallic thin film having a flexibility; a circuit pattern printed on the metallic thin film so as to be insulated from the metallic thin film; one or more LEDs mounted on the metallic thin film on which the circuit pattern is not formed; wire... Agent: Mcdermott Will & Emery LLP

20100096662 - Semiconductor chip assembly with post/base heat spreader and signal post: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The heat spreader includes a thermal post and a base. The thermal post extends upwardly from... Agent: David M. Sigmond

20100096659 - Semiconductor device and method of manufacturing the same: The invention is directed to providing a smaller semiconductor device having a light emitting element with a low manufacturing cost and a method of manufacturing the same. An adhesive layer 9 and conductive pastes 10a, 10b are selectively applied to a front surface of a semiconductor substrate 6. Then, a... Agent: Morrison & Foerster LLP

20100096660 - Semiconductor light emitting device: Disclosed are a semiconductor light emitting device. The semiconductor light emitting device comprises a light emitting structure comprising a plurality of compound semiconductor layers, a passivation layer at the outside of the light emitting structure, a first electrode layer on the light emitting structure, and a second electrode layer under... Agent: Birch Stewart Kolasch & Birch

20100096658 - Structure of light emitting diode: An improved structure of light emitting diode comprises that a copper clad laminate is made with a rectangular type slot thereon and a ring type slot on the outside boundary to enclose the rectangular type slot, while side wall of the slot form a natural guide angle with the surface... Agent: Stuart D. Frenkel Frenkel & Associates, P.C.

20100096663 - Photosensitive resin and process for producing microlens: A material for a microlens having heat resistance, high resolution and high light-extraction efficiency is provided. A positive resist composition comprises an alkali-soluble polymer (A) containing a unit structure having an aromatic fused ring or a derivative thereof, and a compound (B) having an organic group which undergoes photodecomposition to... Agent: Oliff & Berridge, PLC

20100096664 - Semiconductor device: A semiconductor device includes: a first semiconductor layer; a first electrode provided on a first surface side of the first semiconductor layer; a first insulating layer; and a second semiconductor layer. The first insulating layer is provided between the first semiconductor layer and the first electrode and configured to constrict... Agent: Patterson & Sheridan, L.L.P.

20100096665 - Ingaassbn photodiode arrays: Embodiments of detectors made using lattice matched photoabsorbing layers are disclosed. A photodiode apparatus in accordance with one or more embodiments of the present invention comprises an indium phosphide substrate, and a photoabsorbing region comprising at least an indium gallium arsenide antimonide nitride (InGaAsSbN) layer, wherein the InGaAsSbN layer has... Agent: Gates & Cooper LLP Howard Hughes Center

20100096666 - Laminar structure on a semiconductor substrate: The monocrystalline γ-Al2O3 film 6 is formed on the silicon substrate 4 which is the lowermost layer of an MFMIS structure 2. On the monocrystalline γ-Al2O3 film 6, there is formed an electrically conductive oxide in the form of a LaNiO3 film 8 as a lower electrode. On the LaNiO3... Agent: Oliff & Berridge, PLC

20100096668 - High voltage durability iii-nitride semiconductor device: A high voltage durability III-nitride semiconductor device comprises a support substrate including a first silicon body, an insulator body over the first silicon body, and a second silicon body over the insulator body. The high voltage durability III-nitride semiconductor device further comprises a III-nitride semiconductor body characterized by a majority... Agent: Farjami & Farjami LLP

20100096667 - Semiconductor device: There is provided a technique for reducing the occurrence of higher harmonics which occur from a field effect transistor, particularly a field effect transistor configuring a switching element of an antenna switch. In a transistor having a meander structure, the gate width of a partial transistor closest to a gate... Agent: Mattingly & Malur, P.C.

20100096669 - Memory cell array comprising wiggled bit lines: An integrated circuit including a memory cell array comprises transistors being arranged along parallel active area lines, bitlines, the bitlines being arranged so that an individual one intersects a plurality of the active area lines to form bitline-contacts, respectively, the bitlines being formed as wiggled lines, wordlines being arranged so... Agent: Edell, Shapiro & Finnan, LLC

20100096670 - Semiconductor device with interface circuit and method of configuring semiconductor devices: Methods and devices yielding an improved semiconductor device with interface circuit are disclosed. Configuring a semiconductor with parallel device features reduces process variation (e.g., lithographically-induced process variation or other defects). Embodiments of the present invention provide semiconductor devices with I/O cell device features (e.g., I/O gates or core gates) laid... Agent: SprinkleIPLaw Group

20100096671 - Cell of semiconductor device having gate electrode conductive structures formed from rectangular shaped gate electrode layout features and at least eight transistors: A cell of a semiconductor device includes a substrate portion formed to include a plurality of diffusion regions, including at least one p-type diffusion region and at least one n-type diffusion region separated from each other by one or more non-active regions. The cell includes a gate electrode level including... Agent: Martine Penilla & Gencarella, LLP

20100096672 - Self-aligned, integrated circuit contact: Embodiments concern contacts for use in integrated circuits, which have a reduced likelihood of shorting to unrelated portions of an overlying conductive layer due to contact misalignment. Embodiments for forming the integrated circuit include performing a first etching process to pattern the conductive layer, where the etching compound used in... Agent: Schwegman, Lundberg & Woessner/micron

20100096673 - Semiconductor device structure having enhanced performance fet device: A method for making a semiconductor device structure, includes: providing a substrate; forming on the substrate: a first layer below and second layers on a gate with spacers, source and drain regions adjacent to the gate, silicides on the gate and source and drain regions; disposing a stress layer over... Agent: Scully, Scott, Murphy & Presser, P.C.

20100096674 - Methods and systems of thick semiconductor drift detector fabrication: Gray-tone lithography technology is used in combination with a reactive plasma etching operation in the fabrication method and system of a thick semiconductor drift detector. The thick semiconductor drift detector is based on a trench array, where the trenches in the trench array penetrate the bulk with different depths. These... Agent: Naval Research Laboratory Associate Counsel (patents)

20100096675 - Backside illuminated cmos image sensor with photo gate pixel: A pixel for a CMOS photo sensor with increased full well capacity is disclosed. The pixel having a photosensitive element, a photo gate, potential well and a readout circuit. The photosensitive element having a front side and a back side, for releasing charge when light strikes the back side of... Agent: Teledyne Attn: David Zoetewey, D014, A15

20100096676 - Photoelectric conversion device, method of manufacturing photoelectric conversion device, and image pickup system: p

20100096677 - Backside-illuminated solid-state image pickup device: Provided is a backside-illuminated solid-state image pickup device capable of allowing peripheral circuits to produce stable waveforms and thereby achieving image characteristics with less noise, the device including: a first-conductivity-type semiconductor layer having a first principal surface and a second principal surface opposed to the first principal surface and also... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100096679 - Fet, ferroelectric memory device, and methods of manufacturing the same: Disclosed herein are a field-effect transistor (FET), a ferroelectric memory device, and methods of manufacturing the same. The FET and the ferroelectric memory device in accordance with the present invention include: a substrate 1; source and drain regions 2 and 3 formed on the substrate; a channel layer 4 formed... Agent: Sean Liam Kelleher KelleherIPPLLC

20100096678 - Nanostructured barium strontium titanate (bst) thin-film varactors on sapphire: Varactor shunt switches based on a nonlinear dielectric tunability of BaxSr(1−x)TiO3 (BST) thin-film on a sapphire substrates are presented. Nanostructured BST thin-films with dielectric tunability as high as 4.3:1 can be obtained on sapphire substrates, with very low loss-tangents below 0.025 at zero-bias and 20 GHz. The large capacitance of... Agent: Dinsmore & Shohl LLP

20100096681 - Cell structure for a semiconductor memory device and method of fabricating the same: In a 6F2 cell structure of a memory device and a method of fabricating the same, the plurality of active regions may have a first area at both end portions and a second area at a central portion. A portion of a bit-line contact pad may be positioned on the... Agent: Harness, Dickey & Pierce, P.L.C

20100096680 - Oc dram cell with increased sense margin: A memory device and method of making the memory device. The memory device comprises a storage transistor at a surface of a substrate. The storage transistor comprises a body portion between first and second source/drain regions, wherein the source/drain regions are regions of a first conductivity type. The storage transistor... Agent: Trask Britt, P.C./ Micron Technology

20100096682 - Non-volatile semiconductor storage device and method of manufacturing the same: A non-volatile semiconductor storage device has a memory string including a plurality of electrically rewritable memory cells connected in series. The non-volatile semiconductor storage device also has a protruding layer formed to protrude upward with respect to a substrate. The memory string includes: a plurality of first conductive layers laminated... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100096686 - Electronic device including trenches and discontinuous storage elements: An electronic device can include a substrate including a first trench having a first bottom and a first wall. The electrode device can also include a first gate electrode within the first trench and adjacent to the first wall and overlying the first bottom of the first trench, and a... Agent: Larson Newman & Abel, LLP

20100096684 - Semiconductor device and its manufacture method: A semiconductor device includes non-volatile memory cells and a peripheral circuit including field effect transistors having an insulated gate. The semiconductor device has memory cells with a high retention ability and field effect transistors having an insulated gate with large drive current. The semiconductor device has a semiconductor substrate (1)... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100096685 - Strained semiconductor device and method of making same: In a method of making a semiconductor device, a gate dielectric is formed over the semiconductor body. A floating gate is formed over the gate dielectric, an insulating region over the floating gate, and a control gate over the insulating region. The gate dielectric, floating gate, insulating region, and control... Agent: Slater & Matsil LLP

20100096683 - Structure of semiconductor device: A structure of a semiconductor device including a substrate and a patterned layer is provided. The patterned layer being patterned to have an open area and a dense area is disposed on the substrate. The patterned layer includes, in the dense area, a first pattern adjacent to the open area... Agent: J C Patents

20100096689 - Non-volatile memory device including nitrogen pocket implants and methods for making the same: In a non-volatile memory structure, the source/drain regions are surrounded by a nitrogen-doped region. As a result, an interface between the substrate and the charge trapping layer above the nitrogen-doped region is passivated by a plurality of nitrogen atoms. The nitrogen atoms can improve data retention, and performance of cycled... Agent: Baker & Mckenzie LLP Patent Department

20100096688 - Non-volatile memory having charge trap layer with compositional gradient: A flash memory device and method of forming a flash memory device are provided. The flash memory device includes a silicon nitride layer having a compositional gradient in which the ratio of silicon to nitrogen varies through the thickness of the layer. The silicon nitride layer having a compositional gradient... Agent: Ashok K. Janah

20100096687 - Non-volatile memory having silicon nitride charge trap layer: A flash memory device and methods of forming a flash memory device are provided. The flash memory device includes a doped silicon nitride layer having a dopant comprising carbon, boron or oxygen. The doped silicon nitride layer generates a higher number and higher concentration of nitrogen and silicon dangling bonds... Agent: Ashok K. Janah

20100096690 - Semiconductor device with increased channel area: A semiconductor device includes an active region defining at least four surfaces, the four surfaces including first, second, third, and fourth surfaces, a gate insulation layer formed around the four surfaces of the active region, and a gate electrode formed around the gate insulation layer and the four surfaces of... Agent: Townsend And Townsend And Crew, LLP

20100096691 - Semiconductor device having vertically aligned pillar structures that have flat side surfaces and method for manufacturing the same: A semiconductor device having vertically aligned transistors made from pillar structures that have flat side surfaces is presented. The semiconductor device includes a semiconductor substrate, spacers, and gates. The semiconductor substrate has lo pillar structures that have flat side surfaces. The spacers are on sidewalls only on the upper portions... Agent: Ladas & Parry LLP

20100096692 - Semiconductor device: A semiconductor device of the invention includes: a super junction structure of an n-type pillar layer and a p-type pillar layer; a base layer provided on the p-type pillar layer; a source layer selectively provided on a surface of the base layer; a gate insulating film provided on a portion... Agent: Patterson & Sheridan, L.L.P.

20100096694 - Planar extended drain transistor and method of producing the same: A planar extended drain transistor (100) is provided which comprises a control gate (102), a drain region (109), a channel region (107), and a drift region (108), wherein the drift region (108) is arranged between the channel region (107) and the drain region (109). Furthermore, the control gate (102) is... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100096693 - Semiconductor device with vertical gate and method for fabricating the same: A semiconductor device includes a substrate; a plurality of active pillars formed over the substrate; bulb-type trenches, each of the bulb-type trenches formed inside the substrate between the active pillars; buried bit lines, each of the buried bit lines being formed on a sidewall of a respective one of the... Agent: Ip & T Law Firm PLC

20100096695 - High stress film: A semiconductor device that includes a substrate having an active region prepared with a transistor is presented. The semiconductor device includes a stress structure adjacent to the substrate. The stress structure includes a dielectric layer having nanocrystals embedded therein. The nanocrystals induce a first or a second stress on a... Agent: HorizonIPPte Ltd

20100096696 - Semiconductor device including field effect transistor for use as a high-speed switching device and a power device: A body layer of a first conductivity type is formed on a semiconductor substrate, and a source layer of a second conductivity type is formed in a surface region of the body layer. An offset layer of the second conductivity type is formed on the semiconductor substrate, and a drain... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100096697 - High voltage device having reduced on-state resistance: A semiconductor device includes a semiconductor substrate, a source region and a drain region formed in the substrate, a gate structure formed on the substrate disposed between the source and drain regions, and a first isolation structure formed in the substrate between the gate structure and the drain region, the... Agent: Haynes And Boone, LLPIPSection

20100096698 - Stress enhanced transistor: Stress enhanced MOS transistors are provided. A semiconductor device is provided that comprises a semiconductor-on-insulator structure, a gate insulator layer, a source region, a drain region and a conductive gate overlying the gate insulator layer. The semiconductor-on-insulator structure comprises: a substrate, a semiconductor layer, and an insulating layer disposed between... Agent: Ingrassia Fisher & Lorenz, P.C. (amd)

20100096699 - Prevention of plasma induced damage arising from etching of crack stop trenches in multi-layered low-k semiconductor devices: A method of fabricating a semiconductor device begins by forming a lower interconnection dielectric on a substrate and forming at least one active or passive device in the lower interconnection dielectric. An etch stop layer is formed on the lower interconnection dielectric and an interconnect stack layer is formed on... Agent: Mayer & Williams PC

20100096700 - Method for fabricating asymmetric double-gate transistors by which asymmetric and symmetric double-gate transistors can be made on the same substrate: A method for fabricating a microelectronic device with one or several asymmetric and symmetric double-gate transistors on the same substrate.... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100096701 - Semiconductor device and method of manufacturing the same: A method of manufacturing a semiconductor device and a semiconductor device manufactured by the method, the method comprising: (a) forming a buffer layer on a semiconductor substrate; (b) patterning the buffer layer in a first direction to form buffer layer patterns having lateral surfaces and being spaced from each other... Agent: Marshall, Gerstein & Borun LLP

20100096702 - Semiconductor device and method of fabricating the same: A semiconductor device including a substrate, a high voltage device, a medium voltage device and a low voltage device is provided. The substrate includes a high voltage circuit area, a medium voltage circuit area and a low voltage circuit area. The high voltage device, the medium voltage device and the... Agent: J C Patents

20100096703 - Semiconductor device and manufacturing method thereof: Flexibility for the design of the pattern layout of the gate lead-out electrode and the source electrode is enhanced without increasing the chip thickness of the semiconductor device. A semiconductor device includes a cell region where plural transistor cells are arranged and a gate finger region different from a region... Agent: Mcginn Intellectual Property Law Group, PLLC

20100096704 - Suspended nanochannel transistor structure and method for fabricating the same: The present invention discloses a suspended nanochannel transistor structure and a method for fabricating the same. The transistor structure of the present invention comprises a substrate; a side gate formed on the substrate; a dielectric layer covering the substrate and the side gate; a suspended nanochannel formed beside the lateral... Agent: Rosenberg, Klein & Lee

20100096705 - Implantation method for reducing threshold voltage for high-k metal gate device: The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a high-k dielectric layer over a semiconductor substrate, forming a capping layer over the high-k dielectric layer, forming a metal layer over the capping layer, forming a semiconductor layer over the metal layer, performing an... Agent: Haynes And Boone, LLPIPSection

20100096707 - Method for forming insulation film: In a process involving the formation of an insulating film on a substrate for an electronic device, the insulating film is formed on the substrate surface by carrying out two or more steps for regulating the characteristic of the insulating film involved in the process under the same operation principle.... Agent: Crowell & Moring LLP Intellectual Property Group

20100096706 - Semiconductor transistors having high-k gate dielectric layers, metal gate electrode regions, and low fringing capacitances: A semiconductor structure. The structure includes (i) a semiconductor substrate which includes a channel region, (ii) first and second source/drain regions on the semiconductor substrate, (iii) a gate dielectric region, and (iv) a gate electrode region, (v) a plurality of interconnect layers on the gate electrode region, and (vi) first... Agent: Schmeiser, Olsen & Watts

20100096708 - Chip module for installing in sensor chip cards for fluidic applications and method for producing a chip module of this type: A plate-shaped chip supporting body has a number of write/read contacts for exchanging data with an external chip card. A number of corresponding terminal panels which are electrically connected to the write/read contacts of the front flat side, are arranged on the opposite rear side of the chip supporting body.... Agent: Staas & Halsey LLP

20100096710 - Semiconductor fingerprint apparatus with flat touch surface: In a fingerprint apparatus, fingerprint sensing members disposed on a silicon substrate detect skin textures of a finger placed thereon to generate electric signals. A set of integrated circuits formed on the substrate processes the electric signals. First bonding pads are disposed on the substrate and electrically connected to the... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100096709 - Uncooled ir detector arrays based on nanoelectromechanical systems: We describe the use of a high-quality-factor torsional resonator of microscale dimensions. The resonator has a paddle that is supported by two nanoscale torsion rods made of a very low thermal conductivity material, such as amorphous (“a-”) silicon. The body of the torsion paddle is coated with an infrared-absorbing material... Agent: Milstein Zhang & Wu LLC

20100096712 - Hermetic sealing and electrical contacting of a microelectromechanical structure, and microsystem (mems) produced therewith: Disclosed are methods and microsystems for vertically through-plating (6) cover plates (5) for microsystem components (2, 2a) by means of a conductive solder glass (8). Said methods and microsystems make it possible to simplify through-plating, reduce the failure rate, and increase reliability.... Agent: Stevens & Showalter LLP

20100096713 - Mems package and packaging method thereof: Provided are a Micro Electro-Mechanical System (MEMS) package and a method of packaging the MEMS package. The MEMS package includes: a MEMS device including MEMS structures formed on a substrate, first pad electrodes driving the MEMS structures, first sealing parts formed at an edge of the substrate, and connectors formed... Agent: Ampacc Law Group

20100096711 - Microelectromechanical system microphone package: An MEMS microphone package includes a substrate, a cover, a plurality of conductive members, and an insulative adhesive. The cover is mounted to the substrate. The conductive members are disposed between the substrate and the cover. Each of the conductive members can be a golden wire, a conductive bump, or... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw

20100096714 - Method of manufacturing mems sensor and mems sensor: A method of manufacturing an MEMS sensor according to the present invention includes the steps of: forming a first sacrificial layer on one surface of a substrate; forming a lower electrode on the first sacrificial layer; forming a second sacrificial layer made of a metallic material on the first sacrificial... Agent: Rabin & Berdo, PC

20100096715 - Magnetic random access memory: A magnetic recording layer 10 of an MRAM has a first magnetization fixed region 11, a second magnetization fixed region 12 and a magnetization switching region 13. The magnetization switching region 13 has reversible magnetization and overlaps with a pinned layer. The first magnetization fixed region 11 is connected to... Agent: Mr. Jackson Chen

20100096716 - Spin-transfer torque magnetic random access memory having magnetic tunnel junction with perpendicular magnetic anisotropy: A spin-torque transfer memory random access memory (STTMRAM) element includes a fixed layer formed on top of a substrate and a a tunnel layer formed upon the fixed layer and a composite free layer formed upon the tunnel barrier layer and made of an iron platinum alloy with at least... Agent: Ipxlaw Group LLP

20100096717 - Electronic device and process for manufacturing electronic device: To reduce cracks in a functional unit of a semiconductor element in a process for manufacturing an electronic device, a frame member surrounds a functional unit and an optically-transparent layer is formed on a wafer. A resin layer is formed by injecting resin into a cavity of an encapsulating metallic... Agent: Young & Thompson

20100096718 - Backside illuminated image sensor: A backside illuminated image sensor includes a substrate, a backside passivation layer disposed on backside of the substrate, and a transparent conductive layer disposed on the backside passivation layer.... Agent: Mcandrews Held & Malloy, Ltd

20100096719 - Methods of forming fine patterns in integrated circuit devices: A method of fabricating an integrated circuit device includes forming first and second mask structures on respective first and second regions of a feature layer. Each of the first and second mask structures includes a dual mask pattern and an etch mask pattern thereon having an etch selectivity relative to... Agent: Myers Bigel Sibley & Sajovec

20100096720 - Soi substrate and method for manufacturing the same: To provide an SOI substrate having a high mechanical strength, and a method for manufacturing the SOI substrate, a single crystal semiconductor substrate is irradiated with accelerated ions so that an embrittled region is formed in a region at a predetermined depth from a surface of the single crystal semiconductor... Agent: Eric Robinson

20100096721 - Semiconductor device production method and semiconductor device: A semiconductor device production method according to the present invention includes the steps of: forming a LOCOS oxide film in a surface of a silicon layer by a LOCOS method; forming an impurity region in the silicon layer by introducing an impurity into the silicon layer; and sequentially removing parts... Agent: Rabin & Berdo, PC

20100096722 - Fuse in a semiconductor device and method for fabricating the same: The present invention relates to a fuse in a semiconductor device and method for fabricating the same. An oxide film is formed on sidewalls of a barrier metal layer in a bottom portion of a fuse pattern, thereby preventing the barrier metal layer from being exposed. As a result, the... Agent: Marshall, Gerstein & Borun LLP

20100096723 - Semiconductor device: A semiconductor device includes an electric fuse and first and second large area wirings for applying a voltage to the electric fuse. The electric fuse includes a fuse unit which includes an upper-layer fuse wiring, a lower-layer fuse wiring, and a via connecting the upper-layer fuse wiring and the lower-layer... Agent: Mcginn Intellectual Property Law Group, PLLC

20100096724 - Semiconductor device: A semiconductor device (200) includes an electric fuse (100) including: an upper layer fuse interconnect (112) formed on a substrate (not shown); a lower layer fuse interconnect (122); and a via (130) which is connected to one end of the upper layer fuse interconnect (112) and connects the upper layer... Agent: Mcginn Intellectual Property Law Group, PLLC

20100096725 - Semiconductor package with embedded spiral inductor: In some embodiments, the semiconductor package includes a substrate having multiple layers, from a first layer to a final layer, a die coupled to the first layer, an electrical connector such as a solder ball coupled to the final layer, and a spiral trace disposed and electrically coupled between the... Agent: Morgan Lewis & Bockius LLP/rambus Inc.

20100096726 - Metal capacitor and method of making the same: A method of making a metal capacitor includes the following steps. A dielectric layer having a metal interconnection and a capacitor electrode is provided. Then, a treatment is performed to increase the dielectric constant of the dielectric layer surrounding the capacitor electrode. The treatment can be UV radiation, a plasma... Agent: North America Intellectual Property Corporation

20100096727 - Semi-conductor substrate and method of masking layer for producing a free-standing semi-conductor substrate by means of hydride-gas phase epitaxy: The process according to the invention for the manufacture of a semiconductor substrate comprises the following process steps: providing a starting substrate, forming a mask layer with a multitude of openings on the starting substrate, growing at least one semiconductor substrate, wherein the mask layer is laterally overgrown by at... Agent: Foley And Lardner LLP Suite 500

20100096728 - Nitride semiconductor sustrate and method of fabricating the same.: A nitride semiconductor substrate includes a front surface, a rear surface on an opposite side to the front surface, and a first edge portion including a chamfered edge on the front surface. A ratio of an average surface roughness of the front surface to an average surface roughness of the... Agent: Mcginn Intellectual Property Law Group, PLLC

20100096729 - Geometry and design for conformal electronics: A method of forming a three-dimensional electronic device includes forming at least one electronic device on a two-dimensional, flexible substrate, the electronic device being formed according to a three-dimensional structure, cutting the two-dimensional, flexible substrate, the cuts being located to allow the two-dimensional substrate to be shaped, the cuts having... Agent: Marger Johnson & Mccollom/parc

20100096730 - Passivation technique: A method of semiconductor wafer fabrication. The wafer is fabricated by receiving a semiconductor wafer having a substrate layer and at least one processed layer, cutting a trench into the wafer, wherein the trench penetrates through the at least one processed layer and only partially through the thickness of the... Agent: Greenberg Traurig, LLP

20100096731 - Semiconductor device and method of forming stepped-down rdl and recessed thv in peripheral region of the device: A semiconductor die has a peripheral region around the die. An insulating layer is formed over the semiconductor die. A portion of the insulating layer and peripheral is removed to form a recess around the semiconductor die. A conductive layer is deposited over the insulating layer and recess. The conductive... Agent: Robert D. Atkins

20100096732 - Semiconductor integrated circuit device: Interconnections are formed over an interlayer insulating film which covers MISFETQ1 formed on the principal surface of a semiconductor substrate, while dummy interconnections are disposed in a region spaced from such interconnections. Dummy interconnections are disposed also in a scribing area. Dummy interconnections are not formed at the peripheries of... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100096733 - Process for fabricating a substrate comprising a deposited buried oxide layer: A process for fabricating a substrate that includes a buried oxide layer for the production of electronic components or the like. The process includes depositing an oxide layer or a nitride layer on either of a donor or receiver substrate, and bringing the donor and receiver substrates into contact; conducting... Agent: Winston & Strawn LLP Patent Department

20100096734 - Thermally improved semiconductor qfn/son package: A semiconductor device without cantilevered leads uses conductive wires (120) to connect the chip terminals to the leads (110), and a package compound (140) to encapsulate the chip surface (101a) with the terminals, the wires, and the lead surfaces with the attached wires. The chip surface (101b) opposite the terminals... Agent: Texas Instruments Incorporated

20100096735 - Clamping assembly: A clamping assembly for clamping a lead frame with pre-attached semiconductor device, comprising of: a first member, to hold the lead frame, said first member having a surface profile in contact with a surface profile of the semiconductor device, a second member for allowing the mounting of the first member... Agent: Schwegman, Lundberg & Woessner, P.A.

20100096736 - Semiconductor device and manufacturing method thereof: A structure capable of changing the characteristic value of an element after the formation of the element in order to prevent the increase of the manufacturing cost and delay in the delivery of a product. A plurality of diodes is connected in series. Then, a part of the plurality of... Agent: Cook Alex Ltd

20100096741 - Chip-stacked package structure and method for manufacturing the same: A chip stacked package structure and applications are provided. The chip-stacked package structure includes a main substrate, a baseboard substrate, and a molding compound. The main substrate has a substrate and a first chip. The substrate has a first surface and a second surface opposite to the first surface. The... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100096738 - Ic die having tsv and wafer level underfill and stacked ic devices comprising a workpiece solder connected to the tsv: A method of forming integrated circuit (IC) die configured for attachment to another die or a package substrate, and stacked IC devices therefrom. At least one IC die having a top semiconductor surface and a bottom surface and at least one through substrate via (TSV) including a tip protruding beyond... Agent: Texas Instruments Incorporated

20100096737 - Stackable semiconductor assemblies and methods of manufacturing such assemblies: Stacked semiconductor devices and assemblies including attached lead frames are disclosed herein. One embodiment of a method of manufacturing a semiconductor assembly includes forming a plurality of first side trenches to a first intermediate depth in a molded portion of a molded wafer having a plurality of dies arranged in... Agent: Perkins Coie LLP Patent-sea

20100096739 - Stacked semiconductor module: A stacked semiconductor module is made by stacking a second semiconductor device having a second semiconductor chip mounted to the top surface of a second semiconductor substrate above the top surface of a first semiconductor device having a first semiconductor chip mounted to a first semiconductor substrate. The top surface... Agent: Mcdermott Will & Emery LLP

20100096740 - Stacked type chip package structure: A stacked type chip package structure including a backplate, a circuit substrate, a first chip, a second chip, and a conductive film is provided. The backplate comprises a circuit layer. The circuit substrate is disposed on the backplate, and has an upper surface and an opposite lower surface. Besides, the... Agent: Jianq Chyun Intellectual Property Office

20100096742 - Cut-out heat slug for integrated circuit device packaging: In a package, a heat slug, encapsulated by molding compound, encases an integrated circuit device (IC). In an example embodiment, a semiconductor package structure comprises a substrate having conductive traces and pad landings. The conductive traces have pad landings. An IC is mounted on the substrate. The IC has bonding... Agent: Haynes And Boone, LLPIPSection

20100096743 - Input/output package architectures, and methods of using same: A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O... Agent: Intel Corporation C/o Cpa Global

20100096744 - Printed wiring board and method for manufacturing the same: Embodiments of the present invention provide a printed wiring board in which solder bumps of a mounted semiconductor chip are less prone to be ruptured. The printed wiring board includes a coreless substrate which includes: a dielectric layer having a main surface and a connecting pad embedded in the dielectric... Agent: International Business Machines Corporation Dept. 18g

20100096745 - Bonded wafer structure and method of fabrication: A method of packaging electronics comprises providing a first wafer and providing a second wafer. The method also comprises depositing a polymer material over a surface of the first wafer; and selectively removing a portion of the polymer from the first wafer to create a void in the polymer. The... Agent: Kathy Manke Avago Technologies Limited

20100096746 - Package module structure of compound semiconductor devices and fabricating method thereof: A compound semiconductor device package module structure includes a heat dissipation film, a dielectric layer, a plurality of compound semiconductor dies, means for mounting the compound semiconductor dies on the heat dissipation film, and a transparent encapsulation material. The dielectric layer includes a plurality of openings formed on the heat... Agent: Wpat, PC Intellectual Property Attorneys

20100096747 - Semiconductor device and method of manufacturing the same: A semiconductor device includes: a substrate; a semiconductor chip with a surface facing down mounted on the substrate; a reinforcement material provided on the substrate in a peripheral region of a region on which the semiconductor chip is mounted; and a heat sink coupled to the semiconductor chip via a... Agent: Rader Fishman & Grauer PLLC

20100096748 - Combined semiconductor apparatus with semiconductor thin film: A combined semiconductor apparatus includes a semiconductor substrate having an integrated circuit, a planarized region formed in a surface of the semiconductor substrate, and a semiconductor thin film including at least one semiconductor device and bonded on the planarized region. A surface of the semiconductor thin film, in which the... Agent: Rabin & Berdo, PC

20100096749 - Semiconductor package and manufacturing method thereof: Disclosed are a semiconductor package and a manufacturing method thereof. The semiconductor package can include a semiconductor substrate, having one surface on which a conductive pad is formed; an insulating layer, being formed on one surface of the semiconductor substrate; a metal post, penetrating through the conductive pad, the semiconductor... Agent: Mcdermott Will & Emery LLP

20100096750 - Packaging substrate: A packaging substrate is disclosed, which comprises: a substrate body, wherein a surface thereof has a plurality of conductive pads and a solder mask disposed on the surface and having a plurality of openings to expose the conductive pads; dielectric rings disposed on the inner walls of the openings and... Agent: Bacon & Thomas, PLLC

20100096751 - Semiconductor device: A semiconductor device, includes: an organic multilayer wiring substrate having an inner conductive layer; a semiconductor element mounted and connected on one surface of the wiring substrate; and a plurality of solder balls disposed on the other surface in a grid array. A defect portion is formed at an area... Agent: Turocy & Watson, LLP

20100096752 - Semiconductor device: A semiconductor device according to an aspect of the present invention comprises a package board having first and second surfaces, first external terminals on the first surface which are arranged in matrix, and second external terminals on the first surface which are arranged apart from the first external terminals. Each... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100096754 - Semiconductor package, semiconductor module, and method for fabricating the semiconductor package: Provided is a semiconductor package, a semiconductor module and a method for fabricating the semiconductor package. The method provides a substrate including a bonding pad. The method forms a dielectric layer for exposing the bonding pad on the substrate. The method forms a redistribution line which is electrically connected to... Agent: Harness, Dickey & Pierce, P.L.C

20100096753 - Through-silicon via structures providing reduced solder spreading and methods of fabricating the same: A microelectronic device structure as provided herein includes a conductive via having a body portion extending into a substrate from an upper surface thereof and a connecting portion laterally extending along the upper surface of the substrate. The connecting portion includes a recess therein opposite the upper surface of the... Agent: Myers Bigel Sibley & Sajovec

20100096755 - Wiring structure and method for fabricating the same: A wiring structure has a silicon layer, a backing layer provided on the silicon layer, the backing layer comprising a copper alloy containing a manganese, and a copper layer provided on the backing layer, and a diffusion barrier layer having an electrical conductivity, the diffusion barrier layer being provided at... Agent: Mcginn Intellectual Property Law Group, PLLC

20100096756 - Semiconductor device and method of manufacturing the same: A semiconductor device has a multilayer interconnection including a copper interconnection film formed in a predetermined area within an insulating film, a liner film, and a high-melting-point metal film. The copper interconnection film is polycrystalline, and crystal grains occupying 40% or more of an area of a unit interconnection surface... Agent: Mr. Jackson Chen

20100096758 - Electric power semiconductor device: An electric power semiconductor device including first and second circuit patterns formed on main surfaces of first and second insulating substrates, respectively, first and second semiconductor chips mounted on the first and second circuit patterns, respectively, a multilayer electrode plate assembly disposed between the first and second insulating substrates, having... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100096757 - Method and system for distributing clock signals on non manhattan semiconductor integrated circuits: The present invention introduces methods, systems, and architectures for routing clock signals in an integrated circuit layout. The introduced clock signal clock signal structures are rendered with non Manhattan routing. In a first embodiment, the traditional recursive H clock signal structure is rendered after transforming the coordinates system such that... Agent: Adeli & Tollen, LLP

20100096760 - Bond pad design with reduced dishing effect: An integrated circuit structure includes a semiconductor chip, which further includes a first surface; and a patterned bond pad exposed through the first surface. The patterned bond pad includes a plurality of portions electrically connected to each other, and at least one opening therein. The integrated circuit further includes a... Agent: Slater & Matsil, L.L.P.

20100096759 - Semiconductor substrates with unitary vias and via terminals, and associated systems and methods: Semiconductor substrates with unitary vias and via terminals, and associated systems and methods are disclosed. A representative method in accordance with a particular embodiment includes forming a blind via in a semiconductor substrate, applying a protective layer to a sidewall surface of the via, and forming a terminal opening by... Agent: Perkins Coie LLP Patent-sea

20100096761 - Semiconductor substrate for build-up packages: The present invention provides techniques to fabricate build-up single or multichip modules. In one embodiment, this is accomplished by dispensing die-attach material in one or more pre-etched cavities on a substrate. A semiconductor die is then placed over each pre-etched cavity including the die-attach material by urging a slight downward... Agent: Schwegman, Lundberg & Woessner/micron

  
04/15/2010 > patent applications in patent subcategories. category listing, related patent applications

20100090189 - Nanoscale electrical device: A device consists a disordered relaxation insulator or/and a polyamorphous solid between two or more electrodes. Invented devices can perform passive, logic and memory functions in an electronic integrated circuit.... Agent: Semyon D. Savransky

20100090187 - Resistive memory device: Disclosed is a resistive memory device. In the resistive memory device, at least one variable resistance region and at least one switching device may be horizontally apart from each other, rather than being disposed on the same vertical axis. At least one intermediate electrode, which electrically connects the at least... Agent: Harness, Dickey & Pierce, P.L.C

20100090188 - Semiconductor device: A semiconductor device is comprised of a semiconductor substrate, conductive layers stacked above the semiconductor substrate, which is comprised of a conductive polysilicon, and a metal layer provided above the conductive layers. Both ends of the conductive layers have stairsteps respectively. The conductive layers are connected in series by a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100090191 - Cross point memory arrays, methods of manufacturing the same, masters for imprint processes, and methods of manufacturing masters: A cross point memory array includes a structure in which holes are formed in an insulating layer and a storage node is formed in each of the holes. The storage node may include a memory resistor and a switching structure. The master for an imprint process used to form the... Agent: Harness, Dickey & Pierce, P.L.C

20100090190 - Phase change memory device having dielectric layer for isolating contact structure formed by growth, semiconductor device having the same, and methods for manufacturing the devices: A phase change memory device includes a semiconductor substrate having an impurity region and an interlayer dielectric applying a tensile stress formed on the semiconductor substrate and having contact holes exposing the impurity region. Switching elements are formed in the contact holes; and sidewall spacers interposed between the switching elements... Agent: Ladas & Parry LLP

20100090192 - Method for controlled formation of the resistive switching material in a resistive switching device and device obtained thereof: For improved scalability of resistive switching memories, a cross-point resistive switching structure is disclosed wherein the plug itself is used to store the resistive switching material and where the top electrode layer is self-aligned to the plug using, for example, chemical-mechanical-polishing (CMP) or simply mechanical-polishing.... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20100090194 - Multi-bit phase-change random access memory (pram) with diameter-controlled contacts and methods of fabricating and programming the same: A phase-change random-access memory (PRAM) device includes a chalcogenide element, the chalcogenide element comprising a material which can assume a crystalline state or an amorphous state upon application of a heating current. A first contact is connected to a first region of the chalcogenide element and has a first cross-sectional... Agent: Mills & Onello LLP

20100090193 - Nonvolatile memory element array and manufacturing method thereof: A lower electrode (22) is provided on a semiconductor chip substrate (26). A lower electrode (22) is covered with a first interlayer insulating layer (27) from above. A first contact hole (28) is provided on the lower electrode (22) to penetrate through the first interlayer insulating layer (27). A low-resistance... Agent: Mcdermott Will & Emery LLP

20100090195 - Quantum dot optoelectronic devices with enhanced performance: An optoelectronic device is disclosed which includes a quantum dot layer including plurality of quantum dots which do not have capping layers. This optoelectronic device may be a quantum dot light-emitting device, which includes (1) a substrate which is transparent or translucent, (2) an anode electrical conducting layer which is... Agent: Reed Smith, LLP Attn: Patent Records Department

20100090196 - Optical semiconductor device and manufacturing method of the same: A side barrier is provided between columnar dots each constituted by directly stacking respective quantum dots in seven or more layers. Out of respective side barrier layers composing the side barrier, each of the lower side barrier layers (four layers of the undermost layer to the fourth layer from the... Agent: Kratz, Quintos & Hanson, LLP

20100090197 - Method of manufacturing semiconductor nanowire sensor device and semiconductor nanowire sensor device manufactured according to the method: Provided are a method of manufacturing a semiconductor nanowire sensor device and a semiconductor nanowire sensor device manufactured according to the method. The method includes preparing a first conductive type single crystal semiconductor substrate, forming a line-shaped first conductive type single crystal pattern from the first conductive type single crystal... Agent: Lahive & Cockfield, LLP Floor 30, Suite 3000

20100090198 - Nanowire field effect junction diode: A nanowire field effect junction diode constructed on an insulating transparent substrate that allows form(s) of radiation such as visual light, ultraviolet radiation; or infrared radiation to pass. A nanowire is disposed on the insulating transparent substrate. An anode is connected to a first end of the nanowire and a... Agent: George Mason University Office Of Technology Transfer, Msn 5g5

20100090205 - Active matrix display apparatus: An active matrix display apparatus including a transistor 20, a storage capacitor 30 and a light-emitting element 40, which are formed on a substrate 10. The transistor 20 has a source electrode 21, a drain electrode 22 and a gate electrode 23. The storage capacitor 30 has a multilayered structure... Agent: Fitzpatrick Cella Harper & Scinto

20100090210 - Compound having thiol anchoring group, method of synthesizing the same, and molecular electronic device having molecular active layer formed using the compound: Provided are an electron donor-azo-electron acceptor compound having a thiol-based anchoring group, a method of synthesizing the compound, and a molecular electronic device having a molecular active layer formed of the compound. The compound for forming a molecular electronic device includes an azo compound that has a dinitrothiophene group and... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100090207 - Electroluminescent organic semiconductor element and a method for repair of an electroluminescent organic semiconductor element: An electroluminescent organic semiconductor element includes a substrate and a first electrode arranged on the substrate. The semiconductor element additionally contains a second electrode and at least one organic layer, which is arranged between the first electrode and the second electrode. The organic layer is a layer that generates light... Agent: Slater & Matsil, L.L.P.

20100090211 - Manufacturing method of semiconductor device and semiconductor device: A method of manufacturing a semiconductor device includes steps of forming a gate electrode over a light-transmitting substrate, forming a gate insulating layer containing an inorganic material over the gate electrode and the substrate, forming an organic layer containing a photopolymerizable reactive group over the gate insulating layer, polymerizing selectively... Agent: Nixon Peabody, LLP

20100090212 - Memory cell: A memory cell comprising a metal-insulator-semiconductor (MIS) structure is disclosed using a homogeneous carrier trapping layer interposed between a semiconductor layer and the gate electrode of a transistor structure so that the operation voltage is reduced and the manufacturing is simplified with lowered cost. The MIS structure comprises: a gate... Agent: Jianq Chyun Intellectual Property Office

20100090209 - Organic el display apparatus: Provided is an organic EL display apparatus which can be driven at a low voltage and in which a red-light-emitting device uses a phosphorescent material, a green-light-emitting device uses a delayed fluorescent material, and the same material is used in the hole transport layers of the respective devices.... Agent: Fitzpatrick Cella Harper & Scinto

20100090203 - Organic light-emitting element, organic light-emitting transistor, and light-emitting display device: An organic light-emitting element comprises a large number of unit pixels each at least composed of a base, an auxiliary electrode, a first insulating layer to cover at least the auxiliary electrode, a charge injection layer on the first insulating electrode, laminated bodies each consisting of a first electrode and... Agent: Posz Law Group, PLC

20100090204 - Organic semiconductor element and manufacture method thereof: [Solving Means] An organic semiconductor element includes a gate electrode 2 formed on a substrate 1, a gate insulating layer 3 formed on the gate electrode 2, a source electrode 4 and a drain electrode 5 formed on the gate insulating layer 3, and an organic semiconductor layer 6 placed... Agent: Wenderoth, Lind & Ponack, L.L.P.

20100090199 - Organic semiconductor film forming method, organic semiconductor film and organic thin film transistor: A method for forming an organic semiconductor film having a high carrier mobility is provided by having an average volatilization rate of a solvent within a prescribed range during a step of drying, at the time of applying a coating solution, which includes an organic semiconductor material and a non-halogen... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100090200 - Organic thin film transistors: m

20100090201 - Organic thin film transistors: A thin film transistor having an improved gate dielectric layer is disclosed. The gate dielectric layer comprises a poly(hydroxyalkyl acrylate-co-acrylonitrile) based polymer. The resulting gate dielectric layer has a high dielectric constant and can be crosslinked. Higher gate dielectric layer thicknesses can be used to prevent current leakage while still... Agent: Fay Sharpe / Xerox - Rochester

20100090202 - Organic transistor element, its manufacturing method, organic light-emitting transistor, and light-emitting display device: In a method for manufacturing an organic transistor element, an electrode is subjected to wet etching into a predetermined pattern on an organic semiconductor layer. In the process for performing wet etching on the electrode so as to obtain a predetermined pattern, an etching liquid containing a dopant of the... Agent: Posz Law Group, PLC

20100090206 - Polymer light-emitting device, polymer compound, composition, liquid composition, and conductive thin film:

20100090208 - Thin film transistor substrate, method of manufacturing the same, and display apparatus having the same: In a method of manufacturing a thin film transistor substrate, a semiconductor pattern is formed on a substrate, a first etch stop layer and a second etch stop layer are sequentially formed on the semiconductor pattern, and the second etch stop layer and the first etch stop layer are sequentially... Agent: F. Chau & Associates, LLC

20100090213 - One-time programmable devices including chalcogenide material and electronic systems including the same: A method of programming a one-time programmable device is provided. A switching device disposed in a substrate is turned on and a program current is applied to a fuse electrically connected to the switching device, thereby cutting the fuse. The fuse includes a first electrode electrically connected to the switching... Agent: Myers Bigel Sibley & Sajovec

20100090216 - Electronic semiconductor device based on copper nickel and gallium-tin-zinc-copper-titanium p and n-type oxides, their applications and corresponding manufacture process: The present invention corresponds to the use of p and n-type oxide semiconductors based on copper nickel (OCux Niy, with 0<x<3; 0<y<3) or multicomponent Gallium-Tin-Zinc-Copper-Titanium oxide, designated here after as GSZTCO, in different molar compositions, having an amorphous or crystalline structure and with the electrical characteristics of a donor or... Agent: Cermak Kenealy Vaidya & Nakajima LLP

20100090214 - Oxide thin film and oxide thin film device: Provided are an oxide thin film doped with an n-type impurity, and an oxide thin film device. In an oxide thin film (2), as shown in FIG. 1(b), doped oxide layers (2a) doped with an n-type (electron-conductivity type) impurity and undoped oxide layers (2b) not doped with an n-type impurity... Agent: Rabin & Berdo, PC

20100090218 - Sealed device: A sealed device having a substrate, a device having a semiconductor or electroconductive layer comprising zinc and oxygen, and a gas-barrier laminate comprising an organic region and an inorganic region can protect the device from deterioration by water vapor.... Agent: Birch Stewart Kolasch & Birch

20100090217 - Semiconductor device and manufacturing method thereof: Electric characteristics and reliability of a thin film transistor are impaired by diffusion of an impurity element into a channel region. The present invention provides a thin film transistor in which aluminum atoms are unlikely to be diffused to an oxide semiconductor layer. A thin film transistor including an oxide... Agent: Eric Robinson

20100090215 - Thin film transistor and method for preparing the same: The present invention relates to a thin film transistor and a method of manufacturing the same. More particularly, the present invention relates to a thin film transistor that includes a zinc oxide material including Si as a channel material of a semiconductor layer, and a method of manufacturing the same.... Agent: Mckenna Long & Aldridge LLP

20100090219 - Method for fabrication of semiconductor device: A method of fabrication of a semiconductor device having low resistance in an interconnection line and the same coefficient of thermal expansion as a semiconductor substrate is disclosed. The method includes forming a nitride film over a semiconductor substrate including a bottom metal line and a top metal line connected... Agent: Sherr & Vaughn, PLLC

20100090220 - Thin film transistor and semiconductor device using the same: The present invention aims at providing a high-performance semiconductor device such as display, IC tag, sensor or the like at a low cost by using an organic thin film transistor most members of which can be formed by printing, as a switching element. The present invention relates to a thin... Agent: Mcdermott Will & Emery LLP

20100090221 - Distortion tolerant processing: A method of manufacturing an integrated circuit (IC) for driving a flexible display includes depositing a pattern of spatially non-repetitive features in a first layer on a flexible substrate, said pattern of spatially non-repetitive features not substantially regularly repeating in both of two orthogonal directions (x,y) in the plane of... Agent: Knobbe Martens Olson & Bear LLP

20100090222 - Thin film transistor; method of manufacturing same; and organic light emitting device including the thin film transistor: A thin film transistor according to one or more embodiments of the present invention includes: an insulation substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode; a semiconductor formed on the gate insulating layer and having a pair of openings facing each... Agent: Haynes And Boone, LLPIPSection

20100090223 - Semiconductor device and manufacturing method thereof: The present invention provides a semiconductor device in which a bottom-gate TFT or an inverted stagger TFT arranged in each circuit is suitably constructed in conformity with the functionality of the respective circuits, thereby attaining an improvement in the operating efficiency and reliability of the semiconductor device. In the structure,... Agent: Nixon Peabody, LLP

20100090224 - Thin film transistor, method of fabricating the same, and organic light emitting diode display device having the thin film transistor: A thin film transistor (TFT), a method of fabricating the same, and an organic light emitting diode (OLED) display device having the TFT, the TFT includes a substrate, a protection layer disposed on the substrate, a buffer layer disposed on the protection layer, a semiconductor layer disposed on the buffer... Agent: Stein Mcewen, LLP

20100090225 - Nitride semiconductor device: A nitride semiconductor device includes: a main semiconductor region comprising a first nitride semiconductor layer having a first band gap, and a second nitride semiconductor layer having a second band gap larger than the first band gap, a heterojunction being formed between the first nitride semiconductor layer and a the... Agent: Wilmerhale/dc

20100090228 - Boron aluminum nitride diamond heterostructure: A heterostructure having a heterojunction comprising: a diamond layer; and a boron aluminum nitride (B(x)Al(1-x)N) layer disposed in contact with a surface of the diamond layer, where x is between 0 and 1.... Agent: Raytheon Company C/o Daly, Crowley, Mofford & Durkee, LLP

20100090226 - Diamond uv-ray sensor: A diamond UV sensor is provided which includes a photoconductive or Schottky optical sensor element having two-terminal electrodes and detects light irradiating a light-receiving portion according to the changes in electrical resistance or photo-induced current of the material of the light-receiving portion. The sensor element includes diamond having a surface... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100090227 - Method for the formation of a gate oxide on a sic substrate and sic substrates and devices prepared thereby: Methods are provided for improving inversion layer mobility and providing low defect density in a semiconductor device based upon a silicon carbide (SiC) substrate. More specifically, embodiments of the present method provide for the formation of a gate oxide on a silicon carbide substrate comprising oxidizing the substrate with a... Agent: General Electric Company Global Research

20100090229 - Semiconductor light emitting apparatus and method for producing the same: A light emitting apparatus can have a front luminous intensity distribution having a sharp difference at the interface between the light emitting area and the surrounding non-light emitting area (outer environment) so as to suppress or prevent light color unevenness. The semiconductor light emitting apparatus can include a substrate, a... Agent: Cermak Kenealy Vaidya & Nakajima LLP

20100090230 - Crystal silicon element and method for fabricating same: It is an object of the present invention to provide a crystal silicon element emitting a desired visible light at high efficiency, by markedly enhancing the crystallinity of the nano Si. A p-type single crystal silicon substrate 10, a thick silicon oxide film 17a and a thin silicon oxide film... Agent: Birch Stewart Kolasch & Birch

20100090231 - Led package module: An LED package module according to an aspect of the invention may include: a substrate having predetermined electrodes thereon; a plurality of LED chips mounted onto the substrate, separated from each other at predetermined intervals, and electrically connected to the electrodes; a first color resin portion molded around at least... Agent: Mcdermott Will & Emery LLP

20100090232 - Polychromatic led and method for manufacturing the same: A wavelength conversion layer is formed on a surface of a light emitting device for transforming a portion of light emitted from the light emitting device into light of a different wavelength. The transformed light is mixed with the untransformed light, and thus the light emitting device can emit light... Agent: Wpat, PC Intellectual Property Attorneys

20100090233 - Side-view surface mount white led: A light emitting diode is disclosed. The diode includes a package support and a semiconductor chip on the package support, with the chip including an active region that emits light in the visible portion of the spectrum. Metal contacts are in electrical communication with the chip on the package. A... Agent: Summa, Additon & Ashe, P.A.

20100090234 - Light emitting device having light extraction structure and method for manufacturing the same: A nitride-based light emitting device capable of achieving an enhancement in emission efficiency and an enhancement in reliability is disclosed. The light emitting device includes a semiconductor layer, and a light extracting layer arranged on the semiconductor layer and made of a material having a refractive index equal to or... Agent: Birch Stewart Kolasch & Birch

20100090239 - Ceramic package structure of high power light emitting diode and manufacturing method thereof: A ceramic package structure of a high power light emitting diode comprises a light emitting diode die, a ceramic substrate, at least two conductive rods, and an electrical conductive film. The ceramic substrate comprises a first surface and a second surface opposite the first surface. A reflecting cup is disposed... Agent: Wpat, PC Intellectual Property Attorneys

20100090241 - Emissive layer patterning for oled: An organic light emitting device is provided. The device includes an anode, a cathode, and an organic emissive stack disposed between the anode and the cathode. The device may be a “pixel” in a display, capable of emitting a wide variety of colors through the use of independently addressable “sub-pixels,”... Agent: Townsend And Townsend And Crew, LLP

20100090244 - Light emitting device: A light emitting device includes a transparent substrate having first and second surfaces, a semiconductor layer provided on the first surface, a first light emission layer provided on the semiconductor layer and emitting first ultraviolet light including a wavelength corresponding to an energy larger than a forbidden bandwidth of a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100090242 - Light emitting device having light extraction structure and method for manufacturing the same: A nitride-based light emitting device capable of achieving an enhancement in emission efficiency and an enhancement in reliability is disclosed. The light emitting device includes a semiconductor layer, and a light extracting layer arranged on the semiconductor layer and made of a material having a refractive index equal to or... Agent: Birch Stewart Kolasch & Birch

20100090243 - Light emitting device having light extraction structure and method for manufacturing the same: A nitride-based light emitting device capable of achieving an enhancement in emission efficiency and an enhancement in reliability is disclosed. The light emitting device includes a semiconductor layer, and a light extracting layer arranged on the semiconductor layer and made of a material having a refractive index equal to or... Agent: Birch Stewart Kolasch & Birch

20100090236 - Light emitting element, method for manufacturing the light emitting element, optical element and method for manufacturing the optical element: Fine asperities are simply formed in the surface of a light emission surface to improve an luminous efficiency of a light emitting element. An LED element 10 is prepared as an example of a luminous body, and a thermally deformable heat mode recording material layer 12 is formed in the... Agent: Young & Thompson

20100090235 - Light-emitting diode device and method for fabricating the same: A light-emitting diode (LED) device is disclosed. The LED device includes a semiconductor substrate with a light-emitting diode chip disposed thereon. At least two isolated outer wiring layers are disposed on the bottom surface of the semiconductor substrate and are electrically connected to the light-emitting diode chip, serving as input... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100090240 - Photoelectrochemical etching for chip shaping of light emitting diodes: A photoelectrochemical (PEC) etch is performed for chip shaping of a device comprised of a III-V semiconductor material, in order to extract light emitted into guided modes trapped in the III-V semiconductor material. The chip shaping involves varying an angle of incident light during the PEC etch to control an... Agent: Gates & Cooper LLP Howard Hughes Center

20100090237 - Semiconductor light emitting device: A semiconductor light emitting device and corresponding method of manufacture, where the semiconductor light emitting device includes a light emitting structure, a second electrode layer, an insulating layer, and a protrusion. The light emitting structure comprises a second conductive semiconductor layer, an active layer under the second conductive semiconductor layer,... Agent: Birch Stewart Kolasch & Birch

20100090238 - White organic electroluminescent device: A high-efficiency, white organic electroluminescent device has such a structure that its emission layer is obtained by laminating sub-emission layers of red, green, and blue, respectively. The green sub-emission layer contacting a hole transport layer has a delayed fluorescent material, and the red sub-emission layer has a phosphorescent light emitting... Agent: Fitzpatrick Cella Harper & Scinto

20100090245 - Light emitting diode package and method of making the same: The light emitting diode package of the present invention uses photosensitive materials to form phosphor encapsulations or a phosphor layer, which can be fabricated by means of semiconductor processes in batch. Also, the concentration of phosphors in individual regions can be accurately and easily controlled by a laser printing process... Agent: North America Intellectual Property Corporation

20100090247 - Surface treatment method of group iii nitride semiconductor, group iii nitride semiconductor, manufacturing method of the same and group iii nitride semiconductor structure: There is provided a surface treatment method of a group III nitride semiconductor including: providing a group III nitride semiconductor including a first surface having a group III polarity and a second surface opposing the first surface and having a nitrogen polarity; and irradiating a laser beam onto the second... Agent: Mcdermott Will & Emery LLP

20100090246 - Vertical nitride-based light emitting diode and method of manufacturing the same: Provided is a vertical nitride-based LED including a first electrode; a first nitride semiconductor layer that is disposed on the first electrode; an active layer that is disposed on the first nitride semiconductor layer; a second nitride semiconductor layer that is disposed on the active layer; an ohmic contact pattern... Agent: Mcdermott Will & Emery LLP

20100090248 - Semiconductor device having igbt and fwd on same substrate: A semiconductor device includes: a semiconductor substrate; an IGBT element including a collector region; a FWD element including a cathode region adjacent to the collector region; a base layer on the substrate; multiple trench gate structures including a gate electrode. The base layer is divided by the trench gate structures... Agent: Posz Law Group, PLC

20100090249 - Compound semiconductor lamination, method for manufacturing the same, and semiconductor device: The present invention relates to a compound semiconductor lamination that enables an InSb film to be formed on an Si substrate and enables development of applications to magnetic sensors, such as Hall elements, magneto-resistance elements, etc., optical devices, such as infrared sensors, etc., and electronic devices, such as transistors, etc.,... Agent: Morgan Lewis & Bockius LLP

20100090250 - Semiconductor device: A semiconductor device includes: a semiconductor layer; at least one electrode formed on a semiconductor layer to be in contact with the semiconductor layer; and a passivation film covering the semiconductor layer and at least part of the top surface of the electrode to protect the semiconductor layer and formed... Agent: Mcdermott Will & Emery LLP

20100090251 - Surface treatment and passivation of aigan/gan hemt: In the preferred embodiments, a method to reduce gate leakage and dispersion of group III-nitride field effect devices covered with a thin in-situ SiN layer is provided. This can be obtained by introducing a second passivation layer on top of the in-situ SiN-layer, in combination with cleaning of the in-situ... Agent: Knobbe Martens Olson & Bear LLP

20100090252 - Semiconductor integrated circuit device: To provide a semiconductor integrated circuit device advantageous against EM and ESD. A plurality of I/O cells; a power wire formed of a plurality of interconnect layers over the above-described I/O cells; a bonding pad formed in an upper layer of the power wire and in a position corresponding to... Agent: Miles & Stockbridge PC

20100090253 - Programmable power management using a nanotube structure: Programmable power management using a nanotube structure is disclosed. In one embodiment, a method includes coupling a nanotube structure of an integrated circuit to a conductive surface when a command is processed, and enabling a group of transistors of the integrated circuit based on the coupling the nanotube structure to... Agent: Lsi Logic Corporation

20100090254 - Biosensor and manufacturing method thereof: Provided is a biosensor which can detect a specific biomaterial by an interaction between target molecules and probe molecules, and a manufacturing method thereof. The biosensor includes: a first conductive semiconductor substrate; a second conductive doping layer formed on the semiconductor substrate; an electrode formed on top of both opposite... Agent: Ampacc Law Group

20100090255 - Electronic component: An electronic component includes at least one electrode and at least one gas-sensitive region on a substrate. The gas-sensitive region is coated by at least one electrically conductive, gas-sensitive layer, and the electrode contacts the gas-sensitive layer. At least a part of the at least one electrode covers a part... Agent: Kenyon & Kenyon LLP

20100090258 - Semiconductor device: Provided is a semiconductor device which can reduce on-resistance by improving hole mobility of a channel region. A trench gate type MOSFET (semiconductor device) is provided with a p+-type silicon substrate whose crystal plane of a main surface is a (110) plane; an epitaxial layer formed on the silicon substrate;... Agent: Fish & Richardson P.C.

20100090257 - Semiconductor device, and its manufacturing method: A channel is formed at a recessed portion or a projecting portion of a substrate, and a gate insulating film is formed so as to have first to third insulating regions along the channel. Each of the gate insulating films of the first and third insulating regions has a first... Agent: Mr. Jackson Chen

20100090256 - Semiconductor structure with stress regions: A semiconductor structure with stress regions includes a substrate defining a first and a second device zone; a first and a second stress region formed in each of the first and second device zones to yield stress different in level; and a barrier plug separating the two device zones from... Agent: Schmeiser, Olsen & Watts

20100090259 - Lateral junction field-effect transistor: On a p− epitaxial layer, an n-type epitaxial layer and a gate region are formed in this order. A gate electrode is electrically connected to the gate region, and a source electrode and a drain electrode are spaced apart from each other with the gate electrode sandwiched therebetween. A control... Agent: Venable LLP

20100090260 - Integrated circuit layout pattern for cross-coupled circuits: A circuit 32 is provided comprising a first diffusion region 34 and a parallel second diffusion region 36. A sequence of N gate layers 40, 42, 46 is provided with a first and an Nth of these gate layers covering different respective ones of the diffusion regions 34, 36 whilst... Agent: Nixon & Vanderhye P.C.

20100090261 - Magnetic stack with laminated layer: A magnetic stack with a multilayer free layer having a switchable magnetization orientation, the free layer comprising a first ferromagnetic portion and a second ferromagnetic portion with an electrically conducting non-magnetic intermediate layer between the first portion and the second portion. The magnetic stack also includes a first ferromagnetic reference... Agent: Campbell Nelson Whipps, LLC

20100090262 - Spin transistor, programmable logic circuit, and magnetic memory: A spin transistor includes a non-magnetic semiconductor substrate having a channel region, a first area, and a second area. The channel region is between the first and the second areas. The spin transistor also includes a first conductive layer located above the first area and made of a ferromagnetic material... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100090263 - Memory devices including semiconductor pillars: One embodiment relates to an integrated circuit that includes a memory array of pillars arranged in rows and columns. The pillars are separated from one another by row trenches and column trenches. The column trenches include a pair of parallel column trenches. A first trench of the pair includes two... Agent: Eschweiler & Associates LLC

20100090264 - Interconnect structure for semiconductor devices: One embodiment relates to an integrated circuit formed on a semiconductor body having interconnect between source/drain regions of a first and second transistor. The interconnect includes a metal body arranged underneath the surface of the semiconductor body. A contact element establishes electrical contact between the metal body and the source/drain... Agent: Eschweiler & Associates LLC

20100090265 - High density nanodot nonvolatile memory: A nanodot nonvolatile memory element comprises a substrate having a source and a drain region formed therein, and an insulating layer formed on the substrate. The insulating layer contains a nanocrystalline floating gate of approximately three to six nanometers in diameter formed at a distance of approximately two to five... Agent: Schwegman, Lundberg & Woessner, P.A.

20100090266 - Semiconductor device having controllable transistor threshold voltage: A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This floating gate opposes a diffusion layer serving as a control gate via a gate oxide film and is capacitively coupled with... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20100090267 - Nonvolatile memory devices and methods of forming the same: Nonvolatile memory devices and methods of forming the same are provided, the nonvolatile memory devices may include first regions and second regions which extend in a first direction and are alternately disposed in a semiconductor substrate along a second direction crossing the first direction. Buried doped lines are formed at... Agent: Harness, Dickey & Pierce, P.L.C

20100090268 - Semiconductor device and memory: A memory applicable to an embedded memory is provided. The memory includes a substrate, a gate, a charge-trapping gate dielectric layer, a source, and a drain. The gate is disposed above the substrate. The charge-trapping gate dielectric layer is disposed between the gate and the substrate. The source and the... Agent: J C Patents

20100090271 - Power switching semiconductor devices including rectifying junction-shunts: A semiconductor device includes a drift layer having a first conductivity type and a body region adjacent the drift layer. The body region has a second conductivity type opposite the first conductivity type and forms a p-n junction with the drift layer. The device further includes a contactor region in... Agent: Myers Bigel Sibley & Sajovec, P.A.

20100090269 - Transistor structure having a trench drain: A semiconductor device is formed having a trench adjacent to a current carrying region of the device. The trench is formed having a depth greater than the depth of a tub region of the device. Increasing the trench depth moves a region of higher field strength from the tub region... Agent: Hvvi Semiconductors, Inc.

20100090270 - Trench mosfet with short channel formed by pn double epitaxial layers: A power MOS device includes double epitaxial (P/N) structure is disclosed for reduction of channel length and better avalanche capability. In some embodiments, the power MOS device further includes an arsenic Ion implantation area underneath each rounded trench bottom to further enhance breakdown voltage and further reduce Rds, and the... Agent: Bayshore Patent Group, LLC

20100090272 - Transistor structure having a conductive layer formed contiguous in a single deposition: A semiconductor device is formed having a pedestal. The pedestal includes at least two dielectric layers. The pedestal has a sidewall and a major surface. A conductive layer is formed overlying the pedestal. A vertical portion of the conductive layer adjacent to the sidewall of the pedestal is a gate... Agent: Hvvi Semiconductors, Inc.

20100090273 - Transistor structure having dual shield layers: A semiconductor device is formed having lower gate to drain capacitance. A trench (80) is formed adjacent to a drain (20) of the semiconductor device. Trench (80) has a sidewall surface (100) and a surface (90). A doped region (110) is implanted through the sidewall surface (100) of trench (80).... Agent: Hvvi Semiconductors, Inc.

20100090274 - Trench mosfet with shallow trench contact: A trench MOSFET element with shallow trench contact is disclosed. This shallow trench contact structure has some advantages: blocking the P+ underneath trench contact from lateral diffusion to not touch to channel region when a larger trench contact CD is applied; avoiding the trench gate contact etching through poly and... Agent: Bayshore Patent Group, LLC

20100090275 - Transistor structure having an active region and a dielectric platform region: A semiconductor device is formed having lower gate-to-drain capacitance. The semiconductor device having an active region (1300) and a dielectric platform region (1310). A trench (80) is formed adjacent to a drain (20) of the semiconductor device to a first depth. The etch process for forming trench (80) etches the... Agent: Hvvi Semiconductors, Inc.

20100090276 - Shielded gate trench (sgt) mosfet devices and manufacturing processes: This invention discloses a semiconductor power device that includes a plurality of power transistor cells surrounded by a trench opened in a semiconductor substrate. At least one of the cells constituting an active cell has a source region disposed next to a trenched gate electrically connecting to a gate pad... Agent: Bo-in Lin

20100090277 - Lateral trench fets (field effect transistors): A semiconductor structure and associated method of formation. The semiconductor structure includes a semiconductor substrate, a first doped transistor region of a first transistor and a first doped Source/Drain portion of a second transistor on the semiconductor substrate, a second gate dielectric layer and a second gate electrode region of... Agent: Schmeiser, Olsen & Watts

20100090278 - High-voltage transistor with high current load capacity and method for its production: An isolation area (10) is provided over a drift region (12) with a spacing (d) to a contact area (4) provided for a drain connection (D). The isolation area is used as an implantation mask, in order to produce a dopant profile of the drift region in which the dopant... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100090279 - Method for fabricating a transistor using a soi wafer: Embodiments relate to a method for fabricating a transistor by using a SOI wafer. A gate insulation layer and a first gate conductive layer on a silicon-on-insulator substrate of a substrate to form a first gate conductive pattern, a gate insulation layer pattern, and a silicon layer pattern. A device... Agent: Sherr & Vaughn, PLLC

20100090280 - Transistors, semiconductor memory cells having a transistor and methods of forming the same: Transistors, semiconductor memory cells having a transistor and methods of forming the same are provided, the transistors may include a semiconductor substrate having a first semiconductor region. A gate pattern may be disposed on the first semiconductor region. Spacer patterns may each be disposed on a sidewall of the gate... Agent: Harness, Dickey & Pierce, P.L.C

20100090281 - Field effect transistor with metal-semiconductor junction: A MOSFET transistor comprising a substrate of semiconductor material having a source junction connected to a source electrode, a drain junction connected to a drain electrode, and a gate layer connected to a gate electrode, the source junction or the drain junction being a metal-semiconductor junction.... Agent: Bryan W. Bockhop, Esq. Bockhop & Associates, LLC

20100090282 - Semiconductor integrated circuit: The semiconductor integrated circuit has so-called SOI type first MOS transistors (MNtk, MPtk) and second MOS transistors (MNtn, MPtn). The first MOS transistors have a gate isolation film thicker than that the second MOS transistors have. The first and second MOS transistors constitute a power-supply-interruptible circuit (6) and a power-supply-uninterrupted... Agent: Miles & Stockbridge PC

20100090283 - Electro static discharge protection device: A semiconductor device for protecting against an electro static discharge is disclosed. In one embodiment, the semiconductor device includes a first low doped region disposed in a substrate, a first heavily doped region disposed within the first low doped region, the first heavily doped region comprising a first conductivity type,... Agent: Slater & Matsil LLP

20100090284 - Metal-oxide-semiconductor device: A metal-oxide-semiconductor device includes a substrate, a gate on the substrate, a source in the substrate and adjacent to one side of the gate, a drain in the substrate and adjacent to another side of the gate, a gate channel in the substrate and under the gate, and a gate... Agent: North America Intellectual Property Corporation

20100090287 - Electronic device with a gate electrode having at least two portions: A transistor structure of an electronic device can include a gate dielectric layer and a gate electrode. The gate electrode can have a surface portion between the gate dielectric layer and the rest of the gate electrode. The surface portion can be formed such that another portion of the gate... Agent: Larson Newman & Abel, LLP

20100090285 - Integrated circuit with a contact structure including a portion arranged in a cavity of a semiconductor structure: An integrated circuit includes a contact structure with a buried first and a protruding second portion. The buried first portion is arranged in a cavity formed in a semiconductor structure and is in direct contact with the semiconductor structure. The protruding second portion is arranged above the main surface of... Agent: Edell, Shapiro & Finnan, LLC

20100090286 - Vertical-type semiconductor device and method of manufacturing the same: A vertical-type semiconductor device includes a semiconductor substrate having a cell region and a peripheral circuit region, a wordline structure on the cell region of the semiconductor substrate, the wordline structure including a plurality of wordlines stacked on top of each other, a semiconductor structure through the wordline structure, a... Agent: Lee & Morse, P.C.

20100090288 - Method of forming source and drain of a field-effect-transistor and structure thereof: A semiconductor fabrication method involving the use of eSiGe is disclosed. The eSiGe approach is useful for applying the desired stresses to the channel region of a field effect transistor, but also can introduce complications into the semiconductor fabrication process. Embodiments of the present invention disclose a two-step fabrication process... Agent: International Business Machines Corporation Dept. 18g

20100090289 - Semiconductor devices having faceted silicide contacts, and related fabrication methods: The disclosed subject matter relates to semiconductor transistor devices and associated fabrication techniques that can be utilized to form silicide contacts having an increased effective size, relative to conventional silicide contacts. A semiconductor device fabricated in accordance with the processes disclosed herein includes a layer of semiconductor material and a... Agent: Ingrassia Fisher & Lorenz, P.C. (amd)

20100090290 - Semiconductor device having reduced standby leakage current and increased driving current and method for manufacturing the same: A semiconductor device includes a semiconductor substrate having an active region which includes a gate forming zone and an isolation region; an isolation layer formed in the isolation region of the semiconductor substrate to expose side surfaces of a portion of the active region including the gate forming zone, such... Agent: Ladas & Parry LLP

20100090291 - Transistor structure having reduced input capacitance: A semiconductor device having reduced input capacitance is disclosed. The semiconductor device includes a pedestal region having a gate overlying a sidewall of the pedestal region and gate interconnect overlying a major surface of the pedestal region. The pedestal region includes a conductive shield layer (260). The conductive shield layer... Agent: Hvvi Semiconductors, Inc.

20100090292 - Semiconductor device and method of manufacturing same: A method of manufacturing a semiconductor device, comprises: forming a high dielectric gate insulating film in an nMIS formation region and a pMIS formation region of a semiconductor substrate; forming a first metal film on the high dielectric gate insulating film, the first metal film; removing the first metal film... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100090293 - Self-aligned nano field-effect transistor and its fabrication: Our invention discloses a self-aligned-gate structure for nano FET and its fabrication method. One dimension semiconductor material is used as conductive channel, whose two terminals are source and drain electrodes. Gate dielectric grown by ALD covers the area between source electrode and drain electrode, opposite sidewalls of source electrode and... Agent: Wpat, PC

20100090294 - Tailoring nitrogen profile in silicon oxynitride using rapid thermal annealing with ammonia under ultra-low pressure: A method of forming a dielectric film that includes nitrogen. The method includes incorporating nitrogen into a dielectric film using a nitridation gas and a rapid thermal annealing process, wherein an ultra-low pressure of equal to or less than about 10 Torr is used for the rapid thermal annealing process.... Agent: Applied Materials/bstz Blakely Sokoloff Taylor & Zafman LLP

20100090295 - Folded lead-frame packages for mems devices: The MEMS package comprises a first and a second pre-molded lead-frame substrate, at least one of them having a cavity formed by plastic sidewalls along its periphery. The first and second pre-molded lead-frame substrates are interconnected with metal leads. At least one MEMS device is attached to one of the... Agent: Saile Ackerman LLC

20100090297 - Pressure sensor and method for manufacturing the pressure sensor: A pressure sensor of the present invention includes a lower substrate which has an insulating layer having a through-hole penetrating from one side to the other side, and an active layer formed to have a uniform thickness on the insulating layer and having a portion facing the through-hole as an... Agent: Rabin & Berdo, PC

20100090296 - Wafer assembly comprising mems wafer with polymerized siloxane attachment surface: A wafer assembly comprises a wafer having a MEMS layer formed on a frontside and a polymer coating covering the MEMS layer. A holding means is releasably attached to the polymer coating so that the wafer assembly facilitates performance of backside operations on a backside of the wafer. The polymer... Agent: Silverbrook Research Pty Ltd

20100090299 - Flexible electronics for pressure device and fabrication method thereof: A pressure device of flexible electronics capable for sensing a large area includes flexible films, electrodes, sensing blocks, and bumps. The flexible films are disposed with intervals and define two spaces. The electrodes and the sensing blocks are disposed on the flexible films and are in a space. The bumps... Agent: Jianq Chyun Intellectual Property Office

20100090298 - Mems diaphragm: A microelectromechanical system (MEMS) diaphragm is provided. The MEMS diaphragm includes a first conductive layer, a second conductive layer and a dielectric layer. The first conductive layer is disposed on a substrate and having a plurality of openings. The dimenisons of the openings are gradually reduced toward the edge of... Agent: J C Patents

20100090301 - Magnetic stack with oxide to reduce switching current: A magnetic stack having a ferromagnetic free layer, a metal oxide layer that is antiferromagnetic at a first temperature and non-magnetic at a second temperature higher than the first temperature, a ferromagnetic pinned reference layer, and a non-magnetic spacer layer between the free layer and the reference layer. During a... Agent: Campbell Nelson Whipps, LLC

20100090300 - Mram cells including coupled free ferromagnetic layers for stabilization: A free ferromagnetic data storage layer of an MRAM cell is coupled to a free ferromagnetic stabilization layer, which stabilization layer is directly electrically coupled to a contact electrode, on one side, and is separated from the free ferromagnetic data storage layer, on an opposite side, by a spacer layer.... Agent: Intellectual Property Group Seagate Technology Files

20100090302 - Resonator: A method of making a resonator, preferably a nano-resonator, includes starting with a FINFET structure with a central bar, first and second electrodes connected to the central bar, and third and fourth electrodes on either side of the central bar and separated from the central bar by gate dielectric. The... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100090304 - Bonding process for cmos image sensor: The present disclosure provides a method of making an integrated circuit (IC). The method includes forming an electric device on a front side of a substrate; forming a top metal pad on the front side of the substrate, the top metal pad being coupled to the electric device; forming a... Agent: Haynes And Boone, LLPIPSection

20100090303 - Soi substrate and method for producing the same, solid-state image pickup device and method for producing the same, and image pickup apparatus: A SOI substrate includes a silicon substrate, a silicon oxide layer arranged on the silicon substrate, a silicon layer arranged on the silicon oxide layer, a gettering layer arranged in the silicon substrate, and a damaged layer formed of an impurity-doped region arranged in the silicon oxide layer.... Agent: Sonnenschein Nath & Rosenthal LLP

20100090305 - Image sensor and method for manufacturing thereof: An image sensor and a method for manufacturing an image sensor. An image sensor may include a readout circuitry which may be formed on and/or over a first substrate. An image sensor may include an interlayer dielectric layer formed on and/or over a first substrate. An image sensor may include... Agent: Sherr & Vaughn, PLLC

20100090306 - Two terminal multi-channel esd device and method therefor: In one embodiment, a two terminal multi-channel ESD device is configured to include a zener diode and a plurality of P-N diodes.... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20100090307 - Manufacturing method of semiconductor device and semiconductor device: A structure obtaining a desired integrated circuit by sticking together a plurality of semiconductor substrates and electrically connecting integrated circuits formed on semiconductor chips of the respective semiconductor substrates is provided, and a penetrating electrode penetrating between a main surface and a rear surface of each of the semiconductor substrates... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100090309 - Capacitors, dielectric structures, and methods of forming dielectric structures: Some embodiments include dielectric structures. The structures include first and second portions that are directly against one another. The first portion may contain a homogeneous mixture of a first phase and a second phase. The first phase may have a dielectric constant of greater than or equal to 25, and... Agent: Wells St. John P.s.

20100090308 - Metal-oxide-metal capacitors with bar vias: Metal-oxide-metal capacitors with bar vias are provided for integrated circuits. The capacitors may be formed in the interconnect layers of integrated circuits. Stacked bar vias and metal lines in the interconnect layers may be connected to form conductive vertical plates that span multiple interconnect layers. The capacitors with bar vias... Agent: Treyz Law Group

20100090310 - Bipolar transistor and method for fabricating the same: A bipolar transistor includes an isolation layer formed in a bipolar region on a semiconductor substrate, a conductive film formed over an upper portion of the isolation layer, n+ and p+ junction regions formed within the conductive film, a first silicide film formed over portions of an upper boundary of... Agent: Sherr & Vaughn, PLLC

20100090311 - Growth of low dislocation density group-iii nitrides and related thin-film structures: Methods of growing Group-III nitride thin-film structures having reduced dislocation density are provided. Methods in accordance with the present invention comprise growing a Group-III nitride thin-film material while applying an ion flux and preferably while the substrate is stationary or non-rotating substrate. The ion flux is preferably applied as an... Agent: Kagan Binder, PLLC

20100090313 - Iii-v compound crystal and semiconductor electronic circuit element: Favorable-quality III-V crystals are easily obtained at low cost without causing cracks, even when using a variety of substrates, and can be used to manufacture semiconductor devices with good quality and at high yields. The III-V crystals are characterized by the following properties: the carrier concentration, resistivity, and dislocation density... Agent: Judge Patent Associates

20100090312 - Nitride semiconductor structure and method for manufacturing the same: A nitride semiconductor substrate and a method for manufacturing the same are provided. The nitride semiconductor substrate includes an epitaxy substrate, a nitride pillar layer, a nitride semiconductor layer, and a mask layer. The nitride pillar layer includes a plurality of first patterned arranged pillars and a plurality of second... Agent: J C Patents

20100090314 - Final polishing method for silicon single crystal wafer and silicon single crystal wafer: The present invention provides a final polishing method for a silicon single crystal wafer that performs final polishing with a polishing rate being set to 10 nm/min or below at a final polishing step as a final step among a plurality of polishing steps for polishing the silicon single crystal... Agent: Oliff & Berridge, PLC

20100090315 - Film forming method, film forming apparatus, storage medium and semiconductor device: Provided is a film forming method comprising: placing a substrate on a loading portion inside a processing chamber; supplying a gas for generating plasma, which is excited by microwaves, into the processing chamber; evacuating an inside of the processing chamber; supplying a C5F8 gas into the processing chamber; supplying microwaves... Agent: Cantor Colburn, LLP

20100090316 - Wafer with design printed therein: A printed wafer. A design is printed within a peripheral portion of the wafer. The peripheral portion of the wafer is between an outer boundary of an active portion of the wafer and an outer boundary of the wafer. The design may be a copy of a portion of a... Agent: Schmeiser, Olsen & Watts

20100090318 - Backside connection to tsvs having redistribution lines: An integrated circuit structure includes a semiconductor substrate including a front side and a backside. A through-silicon via (TSV) penetrates the semiconductor substrate, and has a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is over the backside of the semiconductor substrate and connected... Agent: Slater & Matsil, L.L.P.

20100090319 - Bond pad connection to redistribution lines having tapered profiles: An integrated circuit structure includes a semiconductor substrate having a front side and a backside. A through-silicon via (TSV) penetrates the semiconductor substrate, wherein the TSV has a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is formed over the backside of the semiconductor... Agent: Slater & Matsil, L.L.P.

20100090317 - Interconnect structures and methods: Interconnect structures and methods are disclosed. In one embodiment, an interconnect structure includes a via extendable through a workpiece from a first side of the workpiece to a second side of the workpiece. The via is partially filled with a conductive material and has sidewalls. The interconnect structure includes a... Agent: Slater & Matsil, L.L.P.

20100090320 - Structure and method for device-specific fill for improved anneal uniformity: Disclosed are embodiments of a wafer that incorporates fill structures with varying configurations to provide uniform reflectance. Uniform reflectance is achieved by distributing across the wafer fill structures having different semiconductor materials such that approximately the same ratio and density between the different semiconductor materials is achieved within each region... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20100090321 - High-k etch stop layer of reduced thickness for patterning a dielectric material during fabrication of transistors: By providing a high-k dielectric etch stop material as an etch stop layer for patterning an interlayer dielectric material, enhanced performance and higher flexibility may be achieved since, for instance, an increased amount of highly stressed dielectric material may be positioned more closely to the respective transistors due to the... Agent: Advanced Mirco Devices, Inc. C/o Williams, Morgan & Amerson

20100090322 - Packaging systems and methods: Packaging systems and methods for semiconductor devices are disclosed. In one embodiment, a packaging system includes a first plate having a first coefficient of thermal expansion (CTE). An integrated circuit is mountable to the first plate. The packaging system includes a second plate coupleable over the first plate over the... Agent: Slater & Matsil, L.L.P.

20100090323 - Composite type semiconductor device spacer sheet, semiconductor package using the same, composite type semiconductor device manufacturing method, and composite type semiconductor device: The present invention provides a spacer sheet for a complex type semiconductor device provided between the semiconductor packages of a complex type semiconductor device formed by laminating plural semiconductor packages, comprising through holes of an array corresponding to electrodes which can be provided onto a substrate of one semiconductor package... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100090325 - Semiconductor device: In order to solve a problem of increased noise accompanying increased area of a return path in a stacked package structure, provided is a semiconductor device which is formed in a stacked package such as a PoP package, which realizes low noise without changing a package size. An additional power... Agent: Young & Thompson

20100090327 - Semiconductor device with improved resin configuration: A semiconductor device comprises a wiring substrate including a wiring pattern; a semiconductor chip installed on the wiring substrate, including a plurality of pads formed on a surface of the semiconductor chip, which opposes the wiring substrate; a first resin layer covering over a part of the wiring pattern within... Agent: Harness, Dickey & Pierce, P.L.C

20100090324 - Semiconductor package having solder ball which has double connection structure: A semiconductor package having a solder ball having a double connection structure which reduces a total height of a package on package (POP). The semiconductor package includes a first semiconductor package in which a semiconductor device is mounted on a lower surface of a first substrate, and a through hole... Agent: Stanzione & Kim, LLP

20100090326 - Stack package: A stack package may include a substrate having first and second faces opposite each other and an opening formed therein. The first semiconductor chip may be mounted on the first face of the substrate and include a through electrode in the middle region of the first semiconductor chip that is... Agent: Harness, Dickey & Pierce, P.L.C

20100090328 - Power semiconductor module with a hermetically tight circuit arrangement and method for producing such a module: A power semiconductor module comprising a substrate, a circuit formed thereon and having a plurality of conductor tracks that are electrically insulated from one another and power semiconductor components arranged on the conductor tracks. The latter are connected in a circuit-conforming manner by a connection device, which has an alternating... Agent: Cohen, Pontani, Lieberman & Pavane LLP

20100090329 - High-power device having thermocouple embedded therein and method for manufacturing the same: Provided is a high-power device having a thermocouple (thermoelectric couple) for measuring the temperature of a transistor constituting a high-power device. The high-power device includes a heating element, a thermocouple formed adjacent to the heating element, and a dielectric body formed between the heating element and the thermocouple.... Agent: Ladas & Parry LLP

20100090332 - Ceramic chip assembly: A ceramic chip assembly is provided. The ceramic chip assembly includes a ceramic base, a plurality of external electrodes, a pair of cylindrical metal lead wires, and an insulating protection material. The ceramic base has electrical characteristics of a semiconductor. The pair of external electrodes is oppositely formed on both... Agent: Locke Lord Bissell & Liddell LLP Attn: Michael Ritchie, Docketing

20100090330 - Semiconductor device and method of manufacturing the same: Provided is a thin semiconductor device using a thin metal wire and having a low top portion. The semiconductor device of the present invention has a structure in which a bonding pad 55 of a semiconductor chip 54 and an electrode 53B are connected to each other via a thin... Agent: Attn: Stephen B. Parker (wpd) Westerman, Hattori, Daniels & Adrian, LLP

20100090331 - Semiconductor die package including multiple dies and a common node structure: A semiconductor die package capable of being mounted to a motherboard is disclosed. The semiconductor die package includes a substrate, and a first semiconductor die mounted on the substrate, where the first semiconductor die includes a first vertical device comprising a first input region and a first output region at... Agent: Townsend And Townsend And Crew, LLP

20100090334 - Electronic part manufacturing method: The objective of this invention is to prevent the generation of defects pertaining to placement of solder balls on the terminal placement parts of the electronic part main body. The solder ball 1 has spherical core 2 and coating layer 3 that covers core 2. The coating layer 3 contains... Agent: Texas Instruments Incorporated

20100090333 - Semiconductor device, manufacturing method thereof, and manufacturing method of semiconductor module: An improvement is achieved in the mounting reliability of a semiconductor device. A semiconductor chip is mounted over an upper surface of a wiring substrate. A plurality of solder balls are disposed individually over a plurality of lands formed on a lower surface of the wiring substrate. The plural lands... Agent: Mattingly & Malur, P.C.

20100090335 - Semiconductor package for discharging heat and method for fabricating the same: A semiconductor package for quickly discharging heat and a method for fabricating the same are disclosed. The semiconductor package includes a semiconductor package module having a first insulation member and at least one fluid passage passing through the insulation member. Circuit patterns are formed on a first face of the... Agent: Ladas & Parry LLP

20100090336 - Semiconductor element cooling structure: A semiconductor element cooling structure includes first and second semiconductor elements; a heat sink having a mounting surface on which the semiconductor elements are mounted and a cooling medium channel formed inside, through which a cooling medium for cooling the semiconductor elements flows; and a protruded portion provided at a... Agent: Sughrue Mion, PLLC

20100090337 - System and method for multi-layer global bitlines: A system and method for manufacturing a semiconductor device including multi-layer bitlines. The location of the bitlines in multiple layers provides for increased spacing and increased width thereby overcoming the limitations of the pitch dictated by the semiconductor fabrication process used. The bitlines locations in multiple layers thus allows the... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20100090338 - Microelectronic devices including multiple through-silicon via structures on a conductive pad and methods of fabricating the same: A microelectronic structure includes a conductive pad on a substrate. The conductive pad includes first and second openings extending therethrough. A first conductive via on the conductive pad extends through the first opening in the conductive pad into the substrate. A second conductive via on the conductive pad adjacent the... Agent: Myers Bigel Sibley & Sajovec

20100090339 - Structures and methods for wafer packages, and probes: This document describes the fabrication and use of multilayer ceramic substrates, having one or more levels of internal thick film metal conductor patterns, wherein any or all of the metal vias intersecting one or both of the major surface planes of the substrates, extend out of the surface to be... Agent: Tue Nguyen

20100090340 - Drawn dummy fecap, via and metal structures: An integrated circuit containing hydrogen permeable dummy vias configured in a linear or rectangular array and symmetrically positioned over a component in the integrated circuit. An integrated circuit containing matching components with identical layouts and hydrogen permeable dummy vias in identical configurations over the matching components. A process of forming... Agent: Texas Instruments Incorporated

20100090341 - Nano-patterned active layers formed by nano-imprint lithography: Patterned active layers formed by nano-imprint lithography for use in devices such as photovoltaic cells and hybrid solar cells. One such photovoltaic cell includes a first electrode and a first electrically conductive layer electrically coupled to the first electrode. The first conductive layer has a multiplicity of protrusions and recesses... Agent: Molecular Imprints

20100090342 - Metal line formation through silicon/germanium soaking: A method for forming interconnect structure includes providing a substrate; forming a low-k dielectric layer over the substrate; forming an opening in the low-k dielectric layer; after the step of forming the opening, performing a silicon/germanium soaking process to exposed surfaces of the low-k dielectric layer; and after the silicon/germanium... Agent: Slater & Matsil, L.L.P.

20100090343 - Interconnect structure for semiconductor devices: A cap layer for a copper interconnect structure formed in a first dielectric layer is provided. In an embodiment, the cap layer may be formed by an in-situ deposition process in which a process gas comprising germanium, arsenic, tungsten, or gallium is introduced, thereby forming a copper-metal cap layer. In... Agent: Slater & Matsil, L.L.P.

20100090344 - Semiconductor device: A semiconductor device includes an insulating film formed on a semiconductor substrate, a contact wiring formed in the insulating film, a protective film formed on the contact wiring and the insulating film, an opening portion formed in the protective film, the contact wiring being exposed through the opening portion, and... Agent: Mcdermott Will & Emery LLP

20100090345 - Direct growth of metal nanoplates on semiconductor substrates: Metal nanoplates are grown on n-type and p-type semiconductor wafer substrates through galvanic reactions between substantially pure aqueous metal solutions and the substrates. The morphology of the resulting metal nanoplates that protrude from the substrate can be tuned by controlling the concentration of the metal solution and the reaction time... Agent: Foley & Lardner LLP

20100090347 - Apparatus and method for contact formation in semiconductor devices: The present disclosure is directed to the preparation of a semiconductor substrate, and metallization of a contact area on the substrate to produce a contact in a semiconductor device. The method includes pre-treating the substrate by ultra fast laser treatment of a contact area, and depositing an interconnect metal layer... Agent: Pepper Hamilton LLP

20100090346 - Integration of self-aligned trenches in-between metal lines: The present invention provides an improved method of forming air cavities to overcome IC via-misalignment issues. The method of forming air cavity trenches in-between metal lines of an integrated circuit includes the steps of partially removing (42) an intertrack dielectric deposited on an interconnect structure surface to control the height... Agent: Fleit Gibbons Gutman Bongini & Bianco P.l.

20100090349 - Methods of forming fine patterns in the fabrication of semiconductor devices: In a method of forming a semiconductor device, a feature layer is provided on a substrate and a mask layer is provided on the feature layer. A portion of the mask layer is removed in a first region of the semiconductor device where fine features of the feature layer are... Agent: Mills & Onello LLP

20100090348 - Single-sided trench contact window: An integrated circuit is manufactured from a semiconductor substrate having trenches with first and second sidewalls facing each other and a conductive line arranged in a bottom region of the trenches. At least the bottom region of the trenches is lined with an insulative material between the conductive line and... Agent: Coats & Bennett/qimonda

20100090351 - Electro component package: An electro component package is disclosed. The electro component package in accordance with an embodiment of the present invention includes a first package substrate having a first chip mounted on an upper surface thereof, the first chip having a through-via formed therein; a second package substrate being separated from the... Agent: Mcdermott Will & Emery LLP

20100090350 - Multi-chip package system incorporating an internal stacking module with support protrusions: The present invention provides a multi-chip package system that includes: providing a package substrate; attaching a base semiconductor die to the package substrate; connecting an interconnect between the base semiconductor die and the package substrate; and encapsulating at least portions of the package substrate, the base semiconductor die, and the... Agent: Law Offices Of Mikio Ishimaru

20100090352 - Flip-chip substrate and method of manufacturing the same: There is provided a flip-chip substrate which is flip-chip connected to electrode terminals provided on one surface of an electronic component. The flip-chip substrate includes: mounting pads which are exposed to a surface of the flip-chip substrate on which the electronic component is mounted and each of which comprises a... Agent: Rankin, Hill & Clark LLP

20100090353 - Pad structure of semiconductor integrated circuit apparatus: A pad structure of a semiconductor integrated circuit apparatus includes a semiconductor substrate upon which circuit patterns forming a device are disposed, a pad disposed on an uppermost part of the semiconductor substrate, and a plurality of fixing parts, each disposed along opposing edge portions of the pad to fix... Agent: Baker & Mckenzie LLP Patent Department

  
04/08/2010 > patent applications in patent subcategories. category listing, related patent applications

20100084624 - Dielectric mesh isolated phase change structure for phase change memory: A method for manufacturing a memory device, and a resulting device, is described using silicon oxide doped chalcogenide material. A first electrode having a contact surface; a body of phase change memory material in a polycrystalline state including a portion in contact with the contact surface of the first electrode,... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20100084626 - Electronic device comprising a convertible structure, and a method of manufacturing an electronic device: An electronic device (100) comprises a substrate (101), a first electrode (102) formed at least partially on the substrate (101), a second electrode (103) formed at least partially on the substrate (101), a convertible structure (104) connected between the first electrode (102) and the second electrode (103), and a spacer... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100084625 - Memory device: An electrical device includes a first electrode and a second electrode. A first active material is between the first electrode and second electrode. A second active material is between the first electrode and second electrode. A nonlinear electrode material is disposed between the first electrode and the second electrode. The... Agent: Honigman Miller Schwartz & Cohn LLP

20100084627 - Negative differential resistance polymer devices and circuits incorporating same: A device includes: a first electrical contact; a second electrical contact; a semiconducting or semimetallic organic layer disposed at least partially between the first and second electrical contacts; and a tunneling barrier layer disposed at least partially between the semiconducting or semimetallic organic layer and the first electrical contact. The... Agent: Fay Sharpe LLP

20100084628 - Branched nanowire and method for fabrication of the same: Disclosed herein are a branched nanowire having parasitic nanowires grown at a surface of the branched nanowire, and a method for fabricating the same. The branched nanowire may be fabricated in a fractal form and seeds of the parasitic nanowires may be formed by thermal energy irradiation and/or a wet-etching... Agent: Cantor Colburn, LLP

20100084629 - Quantum dot-metal oxide complex, method of preparing the same, and light-emitting device comprising the same: Provided is a quantum dot-metal oxide complex including a quantum dot and a metal oxide forming a 3-dimensional network with the quantum dot. In the quantum dot-metal oxide complex, the quantum dot is optically stable without a change in emission wavelength band and its light-emitting performance is enhanced.... Agent: Mcdermott Will & Emery LLP

20100084630 - Apparatus and method of detecting electromagnetic radiation: A high speed and miniature detection system, especially for electromagnetic radiation in the GHz and THz range comprises a semiconductor structure having a 2D charge carrier layer or a quasi 2D charge carrier layer with incorporated single or multiple defects, at least first and second contacts to the charge carrier... Agent: Greenberg Traurig LLP (la)

20100084631 - Phase-controlled field effect transistor device and method for manufacturing thereof: A phase controllable field effect transistor device is described. The device provides first and second scattering sites disposed at either side of a conducting channel region, the conducting region being gated such that on application of an appropriate signal to the gate, energies of the electrons in the channel region... Agent: Seed Intellectual Property Law Group PLLC

20100084632 - Nanostructure insulated junction field effect transistor: A novel nanostructure device operating in Junction Field Effect Transistor (JFET) mode is provided that avoids the majority of the carriers that interact with the interface (e.g. surface roughness, high-k scattering).... Agent: Knobbe Martens Olson & Bear LLP

20100084633 - Spin transistor using double carrier supply layer structure: A spin transistor includes a semiconductor substrate including a channel layer having a 2-dimensional electron gas structure and upper and lower cladding layers disposed respectively in upper and lower sides of the channel layer; ferromagnetic source and drain electrodes formed on the semiconductor substrate and disposed spaced apart from each... Agent: Renner Otto Boisselle & Sklar, LLP

20100084645 - Composite material, and light emitting element and light emitting device using the composite material: An object is to provide a light emitting element with low drive voltage which contains an organic compound and an inorganic compound. One feature of a light emitting element of the present invention is to include a layer containing a light emitting material between a pair of electrodes, in which... Agent: Eric Robinson

20100084636 - Composition for photosensitive organic dielectric material and application thereof: A composition for photosensitive dielectric material is provided. The composition includes 4 to 10 percent by weight of a polymer material, 1.5 to 10 percent by weight of a crosslinking agent, 0.32 to 2 percent by weight of a photoacid generator (PAG) and 78 to 94.18 percent by weight of... Agent: Jianq Chyun Intellectual Property Office

20100084644 - Display substrate method of manufacturing the same: A display substrate includes a base substrate, a barrier pattern, a source electrode, a drain electrode, a semiconductor layer, an insulating layer, and a gate electrode. The barrier pattern protrudes from the base substrate. The source and gate electrodes are formed adjacent to opposite sides of the barrier pattern on... Agent: Innovation Counsel LLP

20100084639 - Electric organic component and method for the production thereof: An electric organic component and a method for the production thereof is disclosed. The component includes a substrate, a first electrode, a first electrically semiconductive layer on the first electrode, an organic functional layer on the first electrically semiconductive layer and a second electrode on the organic functional layer. The... Agent: Slater & Matsil, L.L.P.

20100084647 - Electroluminescent devices including organic eil layer: An OLED device comprises a cathode, an anode, and has therebetween a light emitting layer (LEL) comprising a phosphorescent emitting compound disposed in a host comprising a mixture of at least one electron transporting co-host which is a benzophenone derivative with a spiro substituent and at least one hole transporting... Agent: Raymond L. Owens Patent Legal Staff

20100084646 - Light-emitting element and display device:

20100084641 - Method for manufacturing an organic light emitting device as well as such a device:

20100084634 - Nano-crystal diamond film, manufacturing method thereof, and device using nano-crystal diamond film: A nano-crystal diamond film synthesized on a substrate and containing, as a major component, nano-crystal diamond having a grain diameter from 1 nm to less than 1000 nm. This nano-crystal diamond film can be formed on a substrate by means of a plasma CVD method using a raw material gas... Agent: Staas & Halsey LLP

20100084642 - Organic el device: An organic EL device includes an array substrate including an insulating substrate and an organic EL element which is disposed above the insulating substrate, a sealing substrate which is disposed on that side of the array substrate, which faces the organic EL element, and is attached to the array substrate,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100084637 - Organic transistor and method for fabricating the same: The present invention provides an organic transistor that includes an organic semiconductor layer containing a material having conductive particles and an organic semiconductor polymer chemically bonded to each other and a method of producing the same.... Agent: Mckenna Long & Aldridge LLP

20100084640 - Polymer having unit obtained by condensation of difluorocyclopentanedione ring and aromatic ring, organic thin film using the same, and organic thin film device: e

20100084635 - Recording level gauge type organic light emitting diode: Diode for which one of the conducting layers presents a suitable surface resistance so that when a power supply voltage is applied between a connection element and this conducting layer and the other conducting layer, a potential distribution is generated at the surface of this resisting conducting layer which is... Agent: Robert D. Shedd, Patent Operations Thomson Licensing LLC

20100084638 - Thin film transistor: A method of making a top-gate organic thin film transistor, comprising forming source and drain contacts on a substrate; oxidizing portions of the source and drain contacts; depositing an organic semiconductor layer to form a bridge between the oxidized portions of the source and drain contacts; depositing a gate insulating... Agent: Marshall, Gerstein & Borun LLP

20100084643 - Thin film transistor, method for manufacturing thin film transistor, and electronic apparatus: A thin film transistor includes an insulating layer formed from an organic material, an oxide material, or a silicon based material, a source electrode and a drain electrode disposed on the insulating layer by using an electrically conductive oxide material, a self-organized film covering exposed surfaces of the insulating layer,... Agent: K&l Gates LLP

20100084650 - Display device: A pixel portion and a driver circuit driving the pixel portion are formed over the same substrate. At least a part of the driver circuit is formed using an inverted staggered thin film transistor in which an oxide semiconductor layer is used and a channel protective layer is provided over... Agent: Eric Robinson

20100084651 - Display device: With an increase in the definition of a display device, the number of pixels is increased, and thus the numbers of gate lines and signal lines are increased. Due to the increase in the numbers of gate lines and signal lines, it is difficult to mount an IC chip having... Agent: Eric Robinson

20100084652 - Display device: A display device including an oxide semiconductor, a protective circuit and the like having appropriate structures and a small occupied area is necessary. The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first oxide semiconductor layer which is over... Agent: Eric Robinson

20100084653 - Display device: The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first wiring layer and a second wiring layer which are over the gate insulating film and whose end portions overlap with the gate electrode; and an oxide semiconductor layer which... Agent: Eric Robinson

20100084654 - Display device: In order to take advantage of the properties of a display device including an oxide semiconductor, a protective circuit and the like having appropriate structures and a small occupied area are necessary. The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate... Agent: Eric Robinson

20100084655 - Field effect transistor and process for production thereof: A field effect transistor has a gate electrode, gate-insulating layer, a channel and a source and drain electrodes connected electrically to the channel, the channel comprising an oxide semiconductor, the source electrode or the drain electrode comprising an oxynitride.... Agent: Fitzpatrick Cella Harper & Scinto

20100084648 - Light-emitting apparatus and production method thereof: Provided is a method of producing a light-emitting apparatus having a field effect transistor for driving an organic EL device, the field effect transistor including an oxide semiconductor containing at least one element selected from In and Zn, the method including the steps of: forming a field effect transistor on... Agent: Fitzpatrick Cella Harper & Scinto

20100084649 - Oxide thin film transistor and method of fabricating the same: An oxide thin film transistor (TFT) and its fabrication method are disclosed. In a TFT of a bottom gate structure using amorphous zinc oxide (ZnO)-based semiconductor as an active layer, source and drain electrodes are formed, on which the active layer made of oxide semiconductor is formed to thus prevent... Agent: Brinks Hofer Gilson & Lione

20100084656 - Particle emission analysis for semiconductor fabrication steps: A structure and a method for operating the same. The method includes providing a detecting structure which includes N detectors. N is a positive integer. A fabrication step is simultaneously performed on the detecting structure and M product structures in a fabrication tool resulting in a particle-emitting layer on the... Agent: Schmeiser, Olsen & Watts

20100084657 - Thin film transistor array substrate: A thin film transistor array substrate includes a substrate having a display area and a peripheral area, a plurality of pixel units, a plurality of signal lines, and a testing circuit. The signal lines are electrically connected with the pixel units disposed in the display area. The testing circuit disposed... Agent: Jianq Chyun Intellectual Property Office

20100084658 - Display substrate and method of manufacturing the same: A display substrate having a low-resistance metallic layer and a method of manufacturing the display substrate. The gate conductors are extended in a first direction. The source conductors are extended in a second direction crossing the first direction including a lower layer of molybdenum or a molybdenum alloy, and an... Agent: Innovation Counsel LLP

20100084659 - Gate driver-on-array structure and display panel: A gate driver-on-array structure for using in a display panel including first conductive patterns, semiconductor patterns, second conductive patterns, third conductive patterns, first electrode line, and first connectors is provided. The first conductive patterns, the second conductive patterns, the semiconductor patterns and the third conductive patterns together form a plurality... Agent: Jianq Chyun Intellectual Property Office

20100084660 - Semiconductor structures: A semiconductor structure is provided. The semiconductor structure includes a substrate, a gate disposed thereon, an insulation layer disposed on the substrate and overlying the gate, a patterned semiconductor layer disposed on the insulation layer, a source and a drain disposed on the patterned semiconductor layer, a protective layer overlying... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100084661 - Display substrate, method of manufacturing the same, and display apparatus having the same: The present invention relates to a display substrate in which sound devices serving as speakers or a microphones are built, and the display substrate includes a substrate including a sound processing area and a display area, a plurality of sound devices arranged in the sound processing area, and a plurality... Agent: H.c. Park & Associates, PLC

20100084662 - Semiconductor structure processing using multiple laser beam spots overlapping lengthwise on a structure: Methods and systems use laser pulses to process a selected structure on or within a semiconductor substrate. The structure has a surface, a width, and a length. The laser pulses propagate along axes that move along a scan beam path relative to the substrate as the laser pulses process the... Agent: Electro Scientific Industries/stoel Rives, LLP

20100084663 - Silicon carbide zener diode: A silicon carbide Zener diode is a bipolar semiconductor device that has a mesa structure and includes a silicon carbide single crystal substrate of a first conductivity type, formed thereon, a silicon carbide conductive layer of a first conductivity type, and a silicon carbide conductive layer of a second conductivity... Agent: The Webb Law Firm, P.C.

20100084664 - Zinc sulfide substrates for group iii-nitride epitaxy and group iii-nitride devices: A semiconductor structure includes a substrate which may be formed from a ZnS single crystal of wurtzite (2H) structure with a predetermined crystal orientation, and which has a first surface and a second surface. The structure includes a layer of a group III-nitride crystalline material deposited as an epitaxial layer... Agent: Michaud-kinney Group LLP

20100084666 - Illuminating means: An illuminating means, including a radiation source for emitting electromagnetic radiation in the optical range, a support base, and an electrode arrangement with a first and at least a second electrode. The radiation source is disposed on the support base and connected by connecting wires to the electrode arrangement so... Agent: Edwards Angell Palmer & Dodge LLP

20100084667 - Semiconductor light source element for beam forming: A semiconductor light source element includes a substrate to which at least one semiconductor light source is mounted. An optical body is mounted to the substrate with its light receiving surface located adjacent the light emitting surface of the at least one semiconductor light source. The optical body has a... Agent: Magna International, Inc.

20100084665 - Solid state light sheet and encapsulated bare die semiconductor circuits: An electronically active sheet includes a bottom substrate having a bottom electrically conductive surface. A top substrate having a top electrically conductive surface is disposed facing the bottom electrically conductive surface. An electrical insulator separates the bottom electrically conductive surface from the top electrically conductive surface. At least one bare... Agent: Michaud-kinney Group LLP

20100084668 - Semiconductor color-tunable broadband light sources and full-color microdisplays: Methods and systems are provided that may be used to utilize and manufacture a light sources apparatus. A first light emitting diode emits light having a first wavelength, and a second light emitting diode for emitting light having a second wavelength. Each of the first and second light emitting diodes... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100084669 - Light emitting device and method for manufacturing same: A light emitting device and a method for manufacturing the same are provided. The light emitting device includes: a first substrate having electrical conductivity; a foundation layer; a bonded metal layer configured to bond one major surface of the foundation layer to the first substrate; a mask layer provided on... Agent: Turocy & Watson, LLP

20100084671 - Brightness enhancement method and apparatus of light emitting diodes: A light source with enhanced brightness includes an angle-selective optical filter and a light emitting diode (LED) having a high reflective layer. The angle-selective filter is located on the top surface of emitting diode to pass lights at specified angles. According to one embodiment, the angle-selective filter comprises index-alternating layers.... Agent: Ying Chen Chen Yoshimura LLP

20100084670 - Led chip with expanded effective reflection angles: An LED chip with enhanced effective reflection angles is revealed, primarily comprising an epitaxial substrate, a first reflection mirror on the epitaxial substrate, a second reflection mirror, a light-emitting mechanism, and a first electrode. The first reflection mirror consists of a plurality of first DBRs with a first paired thickness.... Agent: Yen Jung Sung

20100084679 - Light-emitting device: A light-emitting device having a substrate, a light-emitting stack, and a transparent connective layer is provided. The light-emitting stack is disposed above the substrate and comprises a first diffusing surface. The transparent connective layer is disposed between the substrate and the first diffusing surface of the light-emitting stack; an index... Agent: Bacon & Thomas, PLLC

20100084673 - Light-emitting semiconductor packaging structure without wire bonding: A light-emitting semiconductor packaging structure without wire bonding, including a heat conduction board, a light-emitting semiconductor chip bonded on the heat conduction board and a lead frame positioned around the chip. The lead frame has at least one connection section extending to upper side of the chip to connect with... Agent: Rosenberg, Klein & Lee

20100084678 - Luminescent diode chip: A luminescent diode chip includes a semiconductor body, which produces radiation of a first wavelength. A luminescence conversion element produces radiation of a second wavelength from the radiation of the first wavelength. An angular filter element reflects radiation that impinges on the angular filter element at a specific angle in... Agent: Slater & Matsil, L.L.P.

20100084677 - Oled or group of adjacent oleds with a light-extraction layer efficient over a large range of wavelengths: An organic light emitting diode comprises, between a bottom electrode and a top electrode, an organic light-emitting layer and a light-extraction enhancement layer made of a dielectric material. According to the invention, if nD, is the optical index of said dielectric material, and if λM is the center of the... Agent: Robert D. Shedd, Patent Operations Thomson Licensing LLC

20100084674 - Oled with color conversion: An OLED is thus specified which includes a layer construction comprising at least an anode, a cathode and a functional layer arranged in between, the layer construction being arranged on a substrate. At least one electrode, selected from the anode and cathode, is transmissive to the light emitted by the... Agent: Slater & Matsil, L.L.P.

20100084676 - Organic el display device and manufacturing method thereof: An organic EL display device forms an organic EL layer on a pixel portion by a transfer method without using a sophisticated optical system. A patterned light reflection layer is formed on a donor substrate. A light absorption layer is formed on the light reflection layer. An organic EL material... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100084672 - Organic electroluminescent element and method for producing the same: An organic EL device includes an organic luminescent layer between an anode and a cathode. The organic luminescent layer comprises at least two host materials and a dopant which is a luminescent compound. The at least two host materials are identical to or substantially identical to each other in the... Agent: Posz Law Group, PLC

20100084675 - Semiconductor light emitting apparatus: A semiconductor light emitting apparatus for emitting a desired colored light by coating the top surface thereof with a wavelength conversion member prevents the color unevenness from occurring due to the unevenness of the coating thickness of the wavelength conversion member. The semiconductor light emitting apparatus can include a semiconductor... Agent: Cermak Kenealy Vaidya & Nakajima LLP

20100084680 - Spontaneous/stimulated light emitting μ-cavity device: A light emitting device with a p-cavity including a first spacer of single crystal dielectric material and an active area including single crystal erbium dielectric material positioned on the first spacer. The erbium dielectric material and the single crystal dielectric material of the first spacer are substantially crystal lattice matched... Agent: Robert A. Parsons

20100084683 - Light emitting diode package and fabricating method thereof: A light emitting diode (LED) package is provided. The LED package includes a carrier, a package housing, a strength enhancement structure, an ESD protector and an LED chip. The carrier has a first surface and a second surface. The carrier includes a first electrode and a second electrode, wherein a... Agent: Jianq Chyun Intellectual Property Office

20100084682 - Ohmic electrode and method thereof, semiconductor light emitting element having this: There are provided an ohmic electrode, which includes a contact layer made of an Al alloy and formed on a nitride-based semiconductor layer functioning as a light emitting layer, a reflective layer made of Ag metal, formed on the contact layer and having some particles in-diffused to the semiconductor layer,... Agent: H.c. Park & Associates, PLC

20100084681 - Production process for surface-mounting ceramic led package, surface-mounting ceramic led package produced by said production process, and mold for producing said package: The present invention is related to a surface-mounting ceramic LED package and a method for its production comprising: layering a ceramic green sheet which has a hole and a second ceramic green sheet, inserting a mold with a groove to form a partition in the bottom of the ceramic green... Agent: E I Du Pont De Nemours And Company Legal Patent Records Center

20100084684 - Insulated gate bipolar transistor: Provided is an insulated gate bipolar transistor (IGBT) which occupies a small area and in which a thermal breakdown is suppressed. The IGBT includes: an n-type semiconductor layer (3); and a collector part formed in a surface portion of the n-type semiconductor layer (3). The collector part includes: an n-type... Agent: Mcginn Intellectual Property Law Group, PLLC

20100084686 - Assymetric hetero-doped high-voltage mosfet (ah2mos): An asymmetric heterodoped metal oxide (AH2MOS) semiconductor device includes a substrate and an insulated gate on the top of the substrate disposed between a source region and a drain region. On one side of the gate, heterodoped tub and source regions are formed. The tub region has dopants of a... Agent: Hiscock & Barclay, LLP

20100084685 - Semiconductor device and manufacturing method thereof: A semiconductor device includes an SiGe film formed on part of a semiconductor substrate and including a channel region and at least part of source/drain extension regions between which the channel region is positioned, source/drain contact regions formed in a surface area of the semiconductor substrate and brought into contact... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100084687 - Aluminum gallium nitride/gallium nitride high electron mobility transistors: Structures, devices and methods are provided for creating enhanced back barriers that improve the off-state breakdown and blocking characteristics in aluminum gallium nitride AlGaN/GaN high electron mobility transistors (HEMTs). In one aspect, selective fluorine ion implantation is employed when developing HEMTs to create the enhanced back barrier structures. By creating... Agent: Turocy & Watson, LLP

20100084688 - Enhancement-mode nitride transistor: A heterojunction for use in a transistor structure is provided. The heterojunction includes a barrier layer positioned beneath a gate region of the transistor structure. The barrier layer includes nitride-based semiconductor materials. A channel layer provides electrical conduction An intermediate layer near the barrier layer and including nitride-based semiconductor materials... Agent: Gauthier & Connors, LLP

20100084689 - Semiconductor device: A semiconductor device in accordance with an exemplary aspect of the present invention includes: an even number of transistor pairs; connection nodes connecting the n-type transistors and the p-type transistors of the transistor pairs; and inter-gate wiring lines connected to the connection nodes, each inter-gate wiring line connecting a gate... Agent: Young & Thompson

20100084690 - Cmos imager photodiode with enhanced capacitance: A pixel sensor cell having a semiconductor substrate having a surface; a photosensitive element formed in a substrate having a non-laterally disposed charge collection region entirely isolated from a physical boundary including the substrate surface. The photosensitive element comprises a trench having sidewalls formed in the substrate of a first... Agent: Scully, Scott, Murphy & Presser, P.C.

20100084691 - Semiconductor component with stress-absorbing semiconductor layer, and associated fabrication method: The invention relates to a semiconductor component with stress-absorbing semiconductor layer (SA) and an associated fabrication method, a crystalline stress generator layer (SG) for generating a mechanical stress being formed on a carrier material (1). An insulating stress transmission layer (2), which transmits the mechanical stress which has been generated... Agent: Brinks Hofer Gilson & Lione/infineon Infineon

20100084692 - Image sensor with low crosstalk and high red sensitivity: A color pixel array includes first, second, and third pluralities of color pixels each including a photosensitive region disposed within a first semiconductor layer. In one embodiment, a second semiconductor layer including deep dopant regions is disposed below the first semiconductor layer. The deep dopant regions each reside below a... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100084693 - Method of forming a semiconductor device and semiconductor device thereof: According to one embodiment of the present invention, a method of forming a semiconductor device is provided, the method including: forming a substrate; forming a first gate on the substrate; forming a mask layer on the substrate, the mask layer including a first window covering an area within which the... Agent: Viering, Jentschura & Partner

20100084694 - Image sensor module and method of manufacturing the same: An image sensor module includes a semiconductor chip. Photodiode units are disposed in an active region of the semiconductor chip to convert light into electric signals. Pads are disposed in a peripheral region formed around the active region and the pads are electrically connected to the photodiode units. A connecting... Agent: Ladas & Parry LLP

20100084695 - Method of fabricating cmos image sensor: A CMOS image sensor and a method of fabricating the same. The CMOS image sensor may minimize disappearance of electrons generated by light without transmission of electrons to a transfer gate. A method of manufacturing a CMOS image sensor may include forming a trench over an isolation region of a... Agent: Sherr & Vaughn, PLLC

20100084696 - Ferroelectric memory device: A ferroelectric memory device having plural memory cells, each composed of a memory cell transistor and a memory cell capacitor including a lower electrode that is independent for each memory cell capacitor, a ferroelectric layer formed on the lower electrode, and an upper electrode layer formed on the ferroelectric layer.... Agent: Wenderoth, Lind & Ponack L.L.P.

20100084697 - Novel capacitors and capacitor-like devices: A capacitor and capacitor-like device or any other device showing capacitive effects, including FETs, transmission lines, piezoelectric and ferroelectric devices, etc., with at least two electrodes, of which at least one electrode consists of or comprises a material or is generated as electron system, whose absolute value of the electronic... Agent: Mark D. Saralino (general) Renner, Otto, Boisselle & Sklar, LLP

20100084698 - Semiconductor device having plural dram memory cells and a logic circuit and method for manufacturing the same: A memory cell capacitor (C3) of a DRAM is formed by use of a MIM capacitor which uses as its electrode a metal wiring line of the same layer (M3) as metal wiring lines within a logic circuit (LOGIC), thereby enabling reduction of process costs. Higher integration is achievable by... Agent: Mattingly & Malur, P.C.

20100084699 - Flotox-type eeprom and method for manufacturing the same: A FLOTOX-TYPE EEPROM of the invention has a configuration wherein an N region 25 as an impurity region formed under a tunnel window 12 and a channel stopper region 19 formed under a LOCOS oxide film 18 are spaced apart by a predetermined distance Y. Therefore, the tunnel window 12... Agent: Rabin & Berdo, PC

20100084700 - Eeprom and method for manufacturing eeprom: An electrically erasable programmable read only memory (EEPROM) is disclosed. The EEPROM includes a tunneling region in a semiconductor substrate, a control gate region in the semiconductor substrate and separated from the tunneling region by a device isolating layer, a tunnel oxide layer in a trench in the semiconductor substrate... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20100084701 - Semiconductor device and a method of manufacturing the same: A semiconductor device having a nonvolatile memory is reduced in size. In an AND type flash memory having a plurality of nonvolatile memory cells having a plurality of first electrodes, a plurality of word lines crossing therewith, and a plurality of floating gate electrodes disposed at positions which respectively lie... Agent: Antonelli, Terry, Stout & Kraus, LLP

20100084702 - Nonvolatile semiconductor memory device and method of manufacturing the same: A nonvolatile semiconductor memory device comprises a memory cell configured to store data and a resistor element provided around the memory cell. The memory cell includes a charge storage layer provided above a substrate, a first semiconductor layer formed on a top surface of the charge storage layer via an... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100084703 - Semiconductor memory device including a stacked gate having a charge storage layer and a control gate, and method of manufacturing the same: A semiconductor memory device includes a source region, a drain region, a channel region, a charge storage layer, and a control gate electrode. The source region and drain region are formed separately from each other in a surface of a semiconductor substrate. The channel region is formed in the semiconductor... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100084704 - Devices containing permanent charge: An edge termination structure includes a final dielectric trench containing permanent charge. The final dielectric trench is surrounded by first conductivity type semiconductor material (doped by lateral outdiffusion from the trenches), which in turn is laterally surrounded by second conductivity type semiconductor material.... Agent: Groover & Associates

20100084707 - Polysilicon control etch-back indicator: This invention discloses a semiconductor wafer for manufacturing electronic circuit thereon. The semiconductor substrate further includes an etch-back indicator that includes trenches of different sizes having polysilicon filled in the trenches and then completely removed from some of the trenches of greater planar trench dimensions and the polysilicon still remaining... Agent: Bo-in Lin

20100084706 - Power semiconductor devices and methods of manufacture: A method for forming power semiconductor devices having an inter-electrode dielectric (IPD) layer inside a trench includes providing a semiconductor substrate with a trench, lining the sidewalls and bottom of the trench with a first layer of dielectric material, filling the trench with a first layer of conductive material to... Agent: Townsend And Townsend And Crew, LLP

20100084705 - Semiconductor devices having reduced gate-drain capacitance and methods for the fabrication thereof: Embodiments of a method for fabricating a semiconductor device having a reduced gate-drain capacitance are provided. In one embodiment, the method includes the steps of etching a trench in a semiconductor substrate utilizing an etch mask, widening the trench to define overhanging regions of the etch mask extending partially over... Agent: Ingrassia Fisher & Lorenz, P.C. (fs)

20100084708 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a first conductivity-type deep well formed in a substrate, a plurality of device isolation layers formed in the substrate in which the first conductivity-type deep well is formed, a second conductivity-type well formed on a portion of the first conductivity-type deep well between two of the... Agent: Sherr & Vaughn, PLLC

20100084710 - Capacitor-less dynamic random access memory (dram) devices: Dynamic random access memory (DRAM) devices including an insulating layer on a semiconductor substrate; a silicon layer on the insulating layer; an active region in the silicon layer; and a unit cell of a transistor on the active region are provided. The DRAM device does not include a capacitor.... Agent: Myers Bigel Sibley & Sajovec

20100084709 - Semiconductor device and method for manufacturing same: When a bulk silicon substrate and an SOI substrate are used separately, a board area is increased and so it is impossible to reduce the size of a semiconductor device as a whole. On the other hand, when an SOI-type MISFET and a bulk-type MISFET are formed on a same... Agent: Miles & Stockbridge PC

20100084711 - Electrostatic discharge projection semiconductor device and method for manufacturing the same: An electrical device, including a semiconductor device such an electrostatic discharge protection semiconductor device, and a method for manufacturing the same. An electrostatic discharge protection semiconductor device may include a substrate and a gate in and/or over the substrate. The gate may be multi-layered, and may include a gate oxide... Agent: Sherr & Vaughn, PLLC

20100084712 - Multiple spacer and carbon implant comprising process and semiconductor devices therefrom: An integrated circuit (IC) and multi-spacer methods for forming the same includes at least one metal-oxide semiconductor (MOS) transistor including a substrate having a semiconductor surface, a gate stack formed in or on the surface comprising a gate electrode on a gate dielectric, wherein a channel region is located in... Agent: Texas Instruments Incorporated

20100084714 - Dual polysilicon gate of a semiconductor device with a multi-plane channel: A dual polysilicon gate of a semiconductor device includes a substrate having a first region, a second region, and a third region, a channel region with a recessed structure formed in the first region of the substrate, a gate insulating layer formed over the substrate, a first polysilicon layer filled... Agent: Townsend And Townsend And Crew, LLP

20100084713 - Semiconductor device manufacturing method and semiconductor device: A second mask is provided so as to cover a second gate pattern and a first gate pattern is heated to a temperature at which a material gas containing a first metal thermally decomposes, polysilicon constituting the first gate pattern is reacted with the first metal for silicidation under the... Agent: Mcginn Intellectual Property Law Group, PLLC

20100084715 - Photo alignment mark for a gate last process: A semiconductor device is provided which includes a semiconductor substrate having a first region and a second region, the first and second regions being isolated from each other, a plurality of transistors formed in the first region, an alignment mark formed in the second region, the alignment mark having a... Agent: David M. O'dell Attorney For Applicants

20100084716 - Semiconductor device: Provided is a semiconductor device including a substrate, a gate insulating film which is formed on the substrate, and a gate electrode which is provided on the gate insulating film. The gate electrode includes a first metal silicide including a first metal material, and a second metal silicide including one... Agent: Mcginn Intellectual Property Law Group, PLLC

20100084717 - Semiconductor device: Provided is a semiconductor device in which occurrence of humps can be suppressed and variations in characteristics of the semiconductor device can be suppressed. The semiconductor device includes: an element isolation film (200) formed in a semiconductor layer, the element isolation film (200) defining an element formation region; a gate... Agent: Mcginn Intellectual Property Law Group, PLLC

20100084718 - Advanced metal gate method and device: The present disclosure provides a method of fabricating a semiconductor device that includes forming a high-k dielectric over a substrate, forming a first metal layer over the high-k dielectric, forming a second metal layer over the first metal layer, forming a first silicon layer over the second metal layer, implanting... Agent: Haynes And Boone, LLPIPSection

20100084719 - transistor performance with metal gate: The present disclosure provides a method for making a semiconductor device having metal gate stacks. The method includes forming a high k dielectric material layer on a semiconductor substrate; forming a metal gate layer on the high k dielectric material layer; forming a top gate layer on the metal gate... Agent: Haynes And Boone, LLPIPSection

20100084720 - Gate in semiconductor device and method of fabricating the same: A gate of a semiconductor device includes a substrate, and a polysilicon layer over the substrate, wherein the polysilicon layer is doped with first conductive type impurities having a concentration that decreases when receding from the substrate and counter-doped with second conductive type impurities having a concentration that increases when... Agent: Lowe Hauptman Ham & Berner, LLP

20100084722 - Method for manufacturing a micromechanical chip and a component having a chip of this type: In a method for manufacturing a micromechanical chip, a sacrificial layer and an epitaxy layer are initially applied to a semiconductor substrate to produce a layer stack. An opening is subsequently introduced into the epitaxy layer from the front side of the layer stack. In order to electrically insulate the... Agent: Kenyon & Kenyon LLP

20100084721 - Micro-electromechanical system microstructure: A micro-electromechanical system microstructure includes: a substrate adapted to support an electrode thereon; a suspension mechanism supported on the substrate; and a movable active part adapted to cooperate with the electrode to define a capacitor therebetween, and suspended on the substrate through the suspension mechanism so as to be movable... Agent: Whyte Hirschboeck Dudek S C Intellectual Property Department

20100084723 - Mems structure and method of manufacturing the same: An MEMS structure and a method of manufacturing the same are provided. The MEMS structure includes a substrate and at least one suspended microstructure located on the substrate. The suspended microstructure includes a plurality of metal layers, at least one dielectric layer, and at least one peripheral metal wall. The... Agent: Jianq Chyun Intellectual Property Office

20100084725 - Magnetic memory with asymmetric energy barrier: A magnetic tunnel junction cell includes a ferromagnetic reference layer, a ferromagnetic free layer, and a non-magnetic barrier layer separating the ferromagnetic reference layer from the ferromagnetic free layer. The magnetic tunnel junction cell has an asymmetric energy barrier for switching between a high resistance data state and a low... Agent: Campbell Nelson Whipps, LLC

20100084724 - Memory cell with stress-induced anisotropy: A magnetic memory element that has a stress-induced magnetic anisotropy. The memory element has a ferromagnetic free layer having a switchable magnetization orientation switchable, a ferromagnetic reference layer having a pinned magnetization orientation, and a non-magnetic spacer layer therebetween. The free layer may be circular, essentially circular or nearly circular.... Agent: Campbell Nelson Whipps, LLC

20100084727 - Printed wiring board, a method of manufacturing printed wiring board, a sensor module, and a sensing device: A printed wiring board on which a package to be arranged, including: a first layer that is relatively rigid; and a second layer that is relatively flexible and on which the package is to be soldered, wherein an area other than a package arrangement area of the second layer is... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100084728 - Solid-state imaging device and method for manufacturing the same: A solid-state imaging device according to the present invention includes light-receiving units formed on a surface in a substrate, a photo-shield film formed above the substrate and having openings above the light-receiving units, a light-transmissive insulating film formed above the photo-shield film and in the openings in the photo-shield film,... Agent: Greenblum & Bernstein, P.L.C

20100084726 - Wafer level packaging image sensor module having lens actuator and method of manfacturing the same: Disclosed herein is a wafer level packaging image sensor module, including a wafer including an image sensor, a circuit portion and a lower electrode on one side thereof, a lens actuator disposed on the lower electrode and made of electroactive polymer, an upper electrode disposed on the lens actuator, and... Agent: Staas & Halsey LLP

20100084729 - Integrated photodiode for semiconductor substrates: A substrate section that is at least partially fabricated to include contact elements and materials. The substrate section includes doped regions that have a heavily doped N-type region and a heavily doped P-type region adjacent to one another. An exterior surface of the substrate has a topography that includes a... Agent: Mahamedi Paradice Kreisman LLP

20100084730 - Front illuminated back side contact thin wafer detectors: The present invention is directed toward a detector structure, detector arrays, a method of detecting incident radiation, and a method of manufacturing the detectors. The present invention comprises several embodiments that provide for reduced radiation damage susceptibility, decreased affects of cross-talk, and increased flexibility in application. In one embodiment, the... Agent: Patentmetrix

20100084731 - Image sensor and method for fabricating the same: An image sensor includes a trench formed by a shallow trench isolation (STI) process, a channel stop layer formed over a substrate in the trench, an isolation structure filled in the trench, and a photodiode formed in the substrate adjacent to a sidewall of the trench. In more detail of... Agent: Mcandrews Held & Malloy, Ltd

20100084732 - Semiconductor device and method of manufacturing the same: Disclosed herein is a method of manufacturing a semiconductor device that is adapted to improve the production yield. The method generally includes etching a semiconductor substrate to form a trench, filling the trench with a conductive material, separating the filled conductive material to form a plurality of gate patterns and... Agent: Marshall, Gerstein & Borun LLP

20100084733 - Isolation layer of semiconductor device and manufacturing method thereof: A device isolation layer includes a semiconductor substrate defining an upper trench etched to a predetermined depth, a lower trench defined in the semiconductor substrate at a lower part of the upper trench, the lower trench having a smaller width than the upper trench, and an insulating oxide embedded in... Agent: Sherr & Vaughn, PLLC

20100084734 - Manufacturing method of semiconductor substrate and semiconductor device: To provide a semiconductor substrate in which a semiconductor element having favorable crystallinity and high performance can be formed. A single crystal semiconductor substrate having an embrittlement layer and a base substrate are bonded with an insulating layer interposed therebetween; the single crystal semiconductor substrate is separated along the embrittlement... Agent: Eric Robinson

20100084735 - Semiconductor assembly and method for forming seal ring: A method for forming a seal ring is disclosed. First, a substrate including a MEMS region, a logic region and a seal ring region is provided. Second, a trench is formed in the MEMS region and multiple recesses are formed in the seal ring region. An oxide fills the trench... Agent: North America Intellectual Property Corporation

20100084736 - Soi substrate contact with extended silicide area: A low resistance contact structure and method of making the structure. The structure includes a polysilicon contact through an upper silicon layer and buried oxide layer to a lower silicon layer of a silicon-on-insulation substrate. A region of the upper silicon layer surrounds the polysilicon contact and top surface of... Agent: Schmeiser, Olsen & Watts

20100084737 - Tunable semiconductor component provided with a current barrier: This invention pertains to a color coatings blender apparatus to be used for color composition customization for the application of color coatings on 2D and 3D surfaces. The apparatus is comprised of a main body and interchangeable inserts all with central blender chambers and primary and secondary ports, and interchangeable... Agent: Cr Miles, P.C. Craig R. Miles

20100084738 - Capacitance element, printed circuit board, semiconductor package, and semiconductor circuit: A capacitive element that can efficiently reduce high-frequency noise generated in a circuit is provided. A capacitive element 1 includes a capacitive formation portion 100, which is formed in the shape of a loop to separate the inside from the outside. The capacitive formation portion 100 includes an electrode 110,... Agent: Mr. Jackson Chen

20100084740 - Capacitor with zirconium oxide and method for fabricating the same: A capacitor with zirconium oxide and a method for fabricating the same are provided. The method includes: forming a storage node; forming a multi-layered dielectric structure on the storage node, the multi-layered dielectric structure including a zirconium oxide (ZrO2) layer and an aluminum oxide (Al2O3) layer; and forming a plate... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100084739 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a MIM capacitor that includes an insulating film and a first electrode and a second electrode which are formed in the same layer in the insulating film and are facing to each other with the insulating film interposed therebetween. The first electrode and the second electrode... Agent: Mcginn Intellectual Property Law Group, PLLC

20100084741 - Integrated circuit: According to an embodiment, an integrated circuit including a plurality of resistance changing memory cells is disclosed. Each memory cell includes a first electrode, a second electrode and resistance changing memory element arranged between the first electrode and the second electrode. A front surface area of an end section of... Agent: Slater & Matsil, L.L.P.

20100084742 - Method for manufacturing semiconductor epitaxial crystal substrate: The present invention provides a method for manufacturing a gallium nitride semiconductor epitaxial crystal substrate with a dielectric film which has a low gate leak current and negligibly low gate lag, drain lag, and current collapse characteristics. The method for manufacturing a semiconductor epitaxial crystal substrate is a method for... Agent: Fitch, Even, Tabin & Flannery

20100084743 - Method for reducing crystal defect of simox wafer and simox wafer: The method includes: a first step of colliding ions implanted from a surface of a SIMOX wafer into a silicon layer underneath a BOX layer against crystal defects to destroy the crystal defects; and a second step of heating the wafer obtained in the first step to recrystallize the silicon... Agent: Greenblum & Bernstein, P.L.C

20100084745 - Nitride semiconductor substrate: A nitride semiconductor substrate has a first surface forming a principal surface of the substrate. A first edge is formed by beveling at least a portion of an edge of the first surface of the substrate. A scattering region is formed in at least a portion of the first edge.... Agent: Mcginn Intellectual Property Law Group, PLLC

20100084746 - Process for producing laminated substrate and laminated substrate: A method of manufacturing a laminated substrate is provided. The method includes: forming an oxide film on at least a surface of a first substrate having a hardness of equal to or more than 150 GPa in Young's modulus, and then smoothing the oxide film; implanting hydrogen ions or rare... Agent: Masao Yoshimura

20100084744 - Thermal processing of substrates with pre- and post-spike temperature control: Provided are apparatuses and method for the thermal processing of a substrate surface, e.g., controlled laser thermal annealing (LTA) of substrates. The invention typically involves irradiating the substrate surface with first and second images to process regions of the substrate surface at a substantially uniform peak processing temperature along a... Agent: Peters Verny , L.L.P.

20100084747 - Zigzag pattern for tsv copper adhesion: A system and method for forming a TSV contact is presented. A preferred embodiment includes a TSV in contact with a portion of the uppermost metal layer of a semiconductor die. The interface between the TSV conductor and the contact pad is preferably characterized by a non-planar zigzag pattern that... Agent: Slater & Matsil, L.L.P.

20100084748 - Thin foil for use in packaging integrated circuits: Methods for minimizing warpage of a welded foil carrier structure used in the packaging of integrated circuits are described. Portions of a metallic foil are ultrasonically welded to a carrier to form a foil carrier structure. The ultrasonic welding helps define a panel in the metallic foil that is suitable... Agent: Beyer Law Group LLP/ Nsc

20100084749 - Package and fabricating method thereof: A package and a fabricating method thereof are provided. The package includes a lead frame, a chip and a sealant. The lead frame has a notch and a plurality of first notch-side leads, a plurality of first notch-side pads, a plurality of second notch-side leads and a plurality of second... Agent: Bacon & Thomas, PLLC

20100084750 - Module having a stacked passive element and method of forming the same: A module having a discrete passive element and a semiconductor device, and method of forming the same. In one embodiment, the module includes a patterned leadframe, a discrete passive element mounted on an upper surface of the leadframe, and a thermally conductive, electrically insulating material formed on an upper surface... Agent: Slater & Matsil, L.L.P.

20100084751 - Double broken seal ring: The amount of signal propagation and moisture penetration and corresponding reliability problems due to moisture penetration degradation in an IC can be reduced by fabricating two seal rings with non-adjacent gaps. In one embodiment, the same effect can be achieved by fabricating a wide seal ring with a channel having... Agent: Qualcomm Incorporated

20100084752 - Systems and methods for implementing a wafer level hermetic interface chip: Systems and methods for enabling hermetic sealing at the wafer level during fabrication of a microelectromechanical sensor (MEMS) device. The MEMS device has a specialized hermetic interface chip (HIC) that facilitates a stable hermetic sealing process. The HIC includes a plurality of vias in a substrate layer, a plurality of... Agent: Honeywell/fogg Patent Services

20100084753 - Multi-chip package: A multi-chip package is presented which includes a substrate, a lower semiconductor, an upper semiconductor chip, metal wires, an encapsulant, and mounting units. The substrate has electrode terminals on an upper surface and ball lands on a lower surface. The lower semiconductor chip is placed face-down on the substrate. The... Agent: Ladas & Parry LLP

20100084754 - Semiconductor package: A semiconductor package which includes a first substrate having a pre-designed pattern formed thereon; a first chip mounted by a flip chip method on one side of the first substrate; a support formed to a predetermined thickness on an edge of the first substrate; an interposer having an edge thereof... Agent: Staas & Halsey LLP

20100084757 - Conductive compositions and methods of using them: A conductive composition includes a mono-acid hybrid that includes an unprotected, single reactive group. The mono-acid hybrid may include substantially non-reactive groups elsewhere such that the mono-acid hybrid is functional as a chain terminator. Methods and devices using the compositions are also disclosed.... Agent: Lando & Anastasi, LLP

20100084759 - Die rearrangement package structure using layout process to form a compliant configuration: A die rearrangement package structure is provided, which includes a die that having an active surface and a bottom surface, and a plurality of pads is disposed on the active surface; a package body is provided to cover a die and the active surface being exposed; a polymer material with... Agent: Sinorica, LLC

20100084756 - Dual or multiple row package: A dual or multiple row package (300) is provided which comprises a first plurality of terminals (303, 304, 305) and a second plurality of terminals (306, 307), which first and second plurality of terminals are exposed outside the encapsulation at a first side of the package. The terminals of the... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100084755 - Semiconductor chip package system vertical interconnect: Stacked semiconductor chip package system vertical interconnects and related methods are disclosed. A preferred embodiment of the invention includes a first semiconductor chip with a surface bearing a plurality of first fusible metallic coupling elements. A second semiconductor chip has a plurality of second fusible metallic coupling elements. The first... Agent: Texas Instruments Incorporated

20100084758 - Semiconductor package: Provided is a semiconductor package including a mark pattern and a method of manufacturing the same. The semiconductor package may include at least one semiconductor chip including a circuit region, a protection layer covering the circuit region, a molding portion sealing the protection layer and the at least one semiconductor... Agent: Harness, Dickey & Pierce, P.L.C

20100084760 - Semiconductor device and method for manufacturing same: A semiconductor device includes: a semiconductor chip mounting substrate, a control circuit board, a power terminal holder and a semi-fixing member. The semiconductor chip mounting substrate includes a substrate, a semiconductor chip provided on a first major surface of the substrate, and a first and second semiconductor chip connection electrodes.... Agent: Patterson & Sheridan, L.L.P.

20100084761 - Semiconductor device and fabrication method of the same: A semiconductor device includes a mounting substrate, a plurality of semiconductor chips mounted on the mounting substrate, and a heat-dissipation area formed above the plurality of semiconductor chips. A distance between one of the plurality of semiconductor chips which generates a greatest amount of heat and the heat-dissipation area is... Agent: Mcdermott Will & Emery LLP

20100084762 - Memory card: Memory card (1) includes at least semiconductor chip (3), circuit board (2) with semiconductor chip (3) mounted on main surface (21), having at least rigidity reducing portion (23) formed in main surface (21) or in a linear region of surface (22) opposite to the main surface, and cover portion (71)... Agent: Mcdermott Will & Emery LLP

20100084764 - Carbon nanotube-reinforced solder caps, methods of assembling same, and chip packages and systems containing same: A carbon nanotube solder is formed on a substrate of an integrated circuit package. The carbon nanotube solder exhibits high heat and electrical conductivities. The carbon nanotube solder is used as a solder microcap on a metal bump for communication between an integrated circuit device and external structures.... Agent: Intel Corporation C/o Cpa Global

20100084763 - Metallic bump structure without under bump metallurgy and manufacturing method thereof: The metallic bump is directly formed on a semiconductor wafer's I/O pad without UBM. First, a zinc layer is formed on the I/O pad or an anti-oxidation layer of the I/O pad is selectively etched off. Then, an isolative layer and a copper foil are arranged sequentially in this order... Agent: Lin & Associates Intellectual Property, Inc.

20100084765 - Semiconductor package having bump ball: Disclosed is a semiconductor package having a bump ball as an external connection terminal, the bump ball including a core layer containing copper, a copper alloy, aluminum, an aluminum alloy or a combination thereof and a shell layer surrounding the core layer and containing tin, a tin alloy or a... Agent: Staas & Halsey LLP

20100084767 - Discontinuous/non-uniform metal cap structure and process for interconnect integration: An interconnect structure including a noble metal-containing cap that is present at least on some portion of an upper surface of at least one conductive material that is embedded within an interconnect dielectric material is provided. In one embodiment, the noble metal-containing cap is discontinuous, e.g., exists as nuclei or... Agent: Scully, Scott, Murphy & Presser, P.C.

20100084766 - Surface repair structure and process for interconnect applications: Semiconductor interconnect structures including a surface-repair material, e.g., a noble metal or noble metal alloy, that fills hollow-metal related defects located within a conductive material are provided. The filling of the hollow-metal related defects with the surface repair material improves the electromigration (EM) reliability of the structure as well as... Agent: Scully, Scott, Murphy & Presser, P.C.

20100084768 - Electronic component, a semiconductor wafer and a method for producing an electronic component: An electronic component includes a semiconductor substrate defined by a generally planar first face, a generally planar second face and side faces extending between the generally planar second face and the generally planar first face. The semiconductor substrate has a curved contour between the generally planar second face and the... Agent: Dicke, Billig & Czaja

20100084769 - Semiconductor device and dummy pattern arrangement method: A semiconductor device includes a plurality of wiring patterns arranged in a first wiring layer of the semiconductor device and extending in a first direction, and a plurality of dummy patterns arranged in the first wiring layer and extending in a second direction different from the first direction, wherein each... Agent: Young & Thompson

20100084770 - Semiconductor device which includes contact plug and embedded interconnection connected to contact plug: A semiconductor memory device includes: a first dielectric formed on top of a semiconductor substrate; a contact plug embedded in the first dielectric; a second dielectric formed on top of the first interlayer dielectric; an interconnection layer embedded in a groove formed in the second dielectric on top of the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100084771 - Flexible semiconductor package and method for fabricating the same: A flexible semiconductor package includes a flexible substrate. A data chip is disposed over the flexible substrate. The data chip includes a data storage unit for storing data and first bonding pads that are electrically connected to the data storage unit. A control chip is disposed over the flexible substrate.... Agent: Ladas & Parry LLP

20100084772 - Package and fabricating method thereof: A package and a fabricating method thereof are provided. The package includes a conductive layer, a chip, a plurality of first pads, a plurality of bonding wires and a sealant. The conductive layer has a die pad and includes a plurality of wires. A path of each wire is substantially... Agent: Bacon & Thomas, PLLC

20100084773 - Semiconductor device and method of bonding wires between semiconductor chip and wiring substrate: A wiring substrate and a semiconductor chip mounted on the wiring substrate are connected together via a bonding wire. The distance from each end of the semiconductor chip to a wire bond pad provided on the wiring substrate is smaller than the height of the semiconductor chip.... Agent: Young & Thompson

  
04/01/2010 > patent applications in patent subcategories. category listing, related patent applications

20100078616 - Nonvolatile memory device and manufacturing process thereof: A nonvolatile memory device has a first insulating layer, a variable resistance layer provided on the first insulating layer and having a variable resistance material, and a first electrode and second electrode electrically connected with the variable resistance layer. The variable resistance layer has a variable resistance region as a... Agent: Morrison & Foerster LLP

20100078615 - Semiconductor memory device: A semiconductor memory device includes a variable resistance element including a first electrode, a current path forming region, and a second electrode. The current path forming region includes a first region made of a variable resistance material whose resistivity changes by applying voltage, and a second region formed by doping... Agent: Mr. Jackson Chen

20100078617 - Method to reduce a via area in a phase change memory cell: A memory cell structure and method to form such structure. The method partially comprised of forming a via within an oxidizing layer, over the center of a bottom electrode. The method includes depositing a via spacer along the sidewalls of the via and oxidizing the via spacer. The via spacer... Agent: Law Office Of Ido Tuchman (yor)

20100078619 - Resistive memory cell and method for manufacturing a resistive memory cell: A resistive memory cell includes a structural layer, a pore in the structural layer, a selector, having a coupling terminal accommodated in the pore, and a storage element of a resistive memory material, arranged in the pore and electrically coupled to the coupling terminal of the selector. The storage element... Agent: Seed Intellectual Property Law Group PLLC

20100078618 - Self-assembly process for memory array: A method of making a device includes forming at least one anodizable metal layer over at least one of an electrode or a semiconductor device, forming a plurality of pores in the anodizable metal layer by anodization of the anodizable metal layer to expose a portion of the electrode or... Agent: Sandisk Corporation C/o Foley & Lardner LLP

20100078621 - Method to reduce reset current of pcm using stress liner layers: A memory cell structure and method for forming the same. The method includes forming a via within a dielectric layer. The via is formed over the center of an electrically conducting bottom electrode. The method includes depositing a stress liner along at least one sidewall of the via. The stress... Agent: Law Office Of Ido Tuchman (yor)

20100078622 - Nonvolatile memory device and method for manufacturing same: A nonvolatile memory device includes: a substrate; a stacked structure member including a plurality of dielectric films and a plurality of electrode films alternately stacked on the substrate and including a through-hole penetrating through the plurality of the dielectric films and the plurality of the electrode films in a stacking... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100078620 - Semiconductor device with thermally coupled phase change layers: Various embodiments of the present invention are generally directed to an apparatus and method associated with a semiconductor device with thermally coupled phase change layers. The semiconductor device comprises a first phase change layer selectively configurable in a relatively low resistance crystalline phase and a relatively high resistance amorphous phase,... Agent: Campbell Nelson Whipps, LLC

20100078624 - Nanowire light emitting device and method of manufacturing the same: The invention provides a nanowire light emitting device and a manufacturing method thereof. In the light emitting device, first and second conductivity type clad layers are formed and an active layer is interposed therebetween. At least one of the first and second conductivity type clad layers and the active layer... Agent: Mcdermott Will & Emery LLP

20100078625 - Opto-electronic device: The present application relates to an opto-electronic device. The opto-electronic device includes a first light-emitting structure and a second light-emitting structure. The first light-emitting structure is capable of generating a first light having a first wavelength. The second light-emitting structure is capable of generating a second light having a second... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100078623 - Semiconductor method and device: A method for enhancing operation of a bipolar light-emitting transistor includes the following steps: providing a bipolar light-emitting transistor having emitter, base, and collector regions; providing electrodes for coupling electrical signals with the emitter, base, and collector regions; and adapting the base region to promote carrier transport from the emitter... Agent: Martin Novack

20100078632 - Electronic element: The object is to fabricate a novel organic semiconductor element which can effectively utilize the main-chain conduction of a conjugated high molecular compound having semiconductor-like properties. Provided is an electronic element which contains, as components, a pair of electrodes which is formed on a substrate, a mesoporous film in which... Agent: Fitzpatrick Cella Harper & Scinto

20100078629 - Organic el display device: An organic EL display device includes a pixel electrode which is disposed in each of first to third organic EL elements, a first light emission layer which includes a first dopant material having a first absorbance peak, the first light emission layer extending over the first to third organic EL... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100078630 - Organic electroluminescence element, method for manufacturing the same, image display unit and illuminating device: In an organic electroluminescent element of the present invention, which has at least a hole transport layer having an inorganic compound and an organic luminescent layer between a first electrode and a second electrode on a substrate, a high light extraction efficiency can be obtained by reflecting light emitted from... Agent: Squire, Sanders & Dempsey L.L.P.

20100078631 - Organic light emitting diode display device: The OLED display device includes a first stack and a second stack that are separated from each other between an anode electrode and a cathode electrode, with a charge generation layer sandwiched between the first stack and the second stack, each of the first stack and the second stack having... Agent: Mckenna Long & Aldridge LLP

20100078627 - Organic light-emitting device: The organic light-emitting device of the present invention includes: a substrate; a plurality of organic light-emitting elements formed on the substrate; and an element isolation layer formed between the plurality of organic light-emitting elements, each of the elements having: on the substrate in mentioned order, a first electrode patterned for... Agent: Fitzpatrick Cella Harper & Scinto

20100078626 - P-type semiconductor material, semiconductor device, organic electroluminescent device, and method for manufacturing p-type semiconductor material: To provide a p-type semiconductor material having a band matching with a hole injection layer and suitable for an anode electrode that can be formed on a glass substrate or a polymer substrate, and to provide a semiconductor device. In the p-type semiconductor material, 1×1018 to 5×1020 cm−3 of Ag... Agent: Oliff & Berridge, PLC

20100078628 - Universal method for selective area growth of organic molecules by vapor deposition: A method for selective growth of organic molecules on a substrate is proposed. The method comprises: creating a pattern of nucleation sites for the organic molecules on the substrate; depositing of organic molecules at the nucleation sites by vapor deposition. An organic material based device obtained by performing the method... Agent: Sylke Law Offices, LLC

20100078633 - Insulated gate type transistor and display device: A transistor comprises an active layer of an oxide containing at least one element selected from In, Ga and Zn. The active layer is formed such that a desorption gas monitored as a water molecule by a temperature programmed desorption analysis is 1.4/nm3 or less.... Agent: Fitzpatrick Cella Harper & Scinto

20100078634 - Semiconductor device: One exemplary embodiment includes a semiconductor device. The semiconductor device can include a channel including one or more of a metal oxide including zinc-germanium, zinc-lead, cadmium-germanium, cadmium-tin, cadmium-lead.... Agent: Hewlett-packard Company Intellectual Property Administration

20100078635 - Semiconductor device: As the transfer between a processor LSI and a memory has been increasing year by year, there is a demand for increasing the traffic amount and reducing the power required for communication. With this being the condition, a method of stacking LSIs thereby reducing the communication distance is being contemplated.... Agent: Miles & Stockbridge PC

20100078636 - Semiconductor device with backside tamper protection: A tamper-resistant semiconductor device (5;20;30;40;50;60) which includes a plurality of electronic circuits formed on a circuitry side (6) of a substrate (7) having an opposite side which is a backside (8) of the semiconductor device, and comprises at least one light-emitting device (9a-f;21) and at least one light-sensing device (10a-f;22a-b)... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100078638 - Image sensor and method for fabricating the same: An image sensor and a method of fabricating an image sensor. An image sensor may include a readout circuitry arranged over a semiconductor substrate, an interlayer dielectric film provided with metal lines arranged over a semiconductor substrate, and/or a lower electrode arranged over a interlayer dielectric film such that a... Agent: Sherr & Vaughn, PLLC

20100078637 - Photoelectric conversion element, photoelectric conversion device, and image sensor: A photoelectric conversion element includes a light receiving layer that is formed of microcrystal semiconductor, a first semiconductor layer of a first conductive type that is formed on one face side of the light receiving layer, and a first intermediate layer that is interposed between the first semiconductor layer and... Agent: Oliff & Berridge, PLC

20100078639 - Thin film semiconductor device fabrication method and thin film semiconductor device: The present invention provides a method for making a thin film semiconductor device having a bottom-gate, bottom-contact-type thin film transistor structure finer in size with satisfactory characteristics, in which the interface between a gate insulating film and a thin film semiconductor layer can be maintained at satisfactory conditions without being... Agent: Sonnenschein Nath & Rosenthal LLP

20100078643 - Display device: In view of the problem that a reduced thickness of an EL film causes a short circuit between an anode and a cathode and malfunction of a transistor, the invention provides a display device that has a light emitting element including an electrode and an electroluminescent layer, a wire electrically... Agent: Eric Robinson

20100078641 - Display substrate, method of manufacturing the same, and display apparatus having the same: In a display substrate and a method of the display substrate, a bank pattern provided with openings formed therethrough is formed by an imprint method, and the openings are filled with a conductive material by an inkjet method to form a data line and a pixel electrode, in accordance with... Agent: Haynes And Boone, LLPIPSection

20100078642 - Layered structure and electron device that uses such a layered structure, fabrication process thereof, electron device array and display apparatus: A layered structure comprises a variable wettability layer including a material that changes a critical surface tension in response to energy provided thereto, the wettability changing layer including at least a high surface energy part of large critical surface tension and a low surface energy part of low critical surface... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100078640 - Thin film transistor backplane: A fabrication process for a device such as a backplane for a flat panel display includes depositing thin film layers on a substrate, forming a 3D template overlying the thin film layers, and etching the 3D template and the thin film layers to form gate lines and transistors from the... Agent: Hewlett-packard Company Intellectual Property Administration

20100078644 - Insulating film pattern, method for manufacturing the same, and method for manufacturing thin film transistor substrate using the same: In an insulating film pattern, a first pattern part is formed at one surface of the insulating film pattern to form a source electrode, a drain electrode, and a semiconductor layer of the thin film transistor. The first pattern part is recessed in one surface of the insulating film pattern.... Agent: H.c. Park & Associates, PLC

20100078645 - Semiconductor device comprising a buried poly resistor: An embedded or buried resistive structure may be formed by amorphizing a semiconductor material and subsequently re-crystallizing the same in a polycrystalline state, thereby providing a high degree of compatibility with conventional polycrystalline resistors, such as polysilicon resistors, while avoiding the deposition of a dedicated polycrystalline material. Hence, polycrystalline resistors... Agent: Williams, Morgan & Amerson

20100078646 - Display device: A display device including an active area having a plurality of pixels comprises an array substrate including a plurality of display elements disposed at said pixels respectively; a sealing substrate disposed to be opposed to said array substrate; and a seal member disposed between said array substrate and said sealing... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100078647 - Thin film transistor substrate and organic light emitting display having the same: In an organic light emitting display, a switching transistor includes an active pattern having a crystal structure grown at an angle of 0°±10° relative to a current flow direction, and a driving transistor includes an active pattern having a crystal structure grown at an angle of 90°±10° relative to a... Agent: Innovation Counsel LLP

20100078648 - Gallium nitride-based epitaxial wafer and method of fabricating epitaxial wafer: A gallium nitride-based epitaxial wafer for a nitride light-emitting device comprises a gallium nitride substrate having a primary surface, a gallium nitride-based semiconductor film provided on the primary surface of the gallium nitride substrate, and, an active layer provided on the gallium nitride-based semiconductor film, the active layer having a... Agent: Venable LLP

20100078649 - Light emitting element and light emitting device: A light emitting element which emits light of a wavelength, includes a substrate which is transparent to the wavelength of emitted light and includes a first surface and a second surface; a semiconductor layer stacked on the first surface; a first electrode which is reflective to the wavelength of emitted... Agent: Mcginn Intellectual Property Law Group, PLLC

20100078652 - Diamond electronic devices including a surface and methods for their manufacture: The present invention relates to a diamond electronic device comprising a functional surface formed by a planar surface of a single crystal diamond, the planar surface of the single crystal diamond having an Rq of less than 10 nm and at least one of the following characteristics: (a) the surface... Agent: Bryan Cave LLP

20100078651 - Electronic field effect devices and methods for their manufacture: Electronic field effect devices, and methods of manufacture of these electronic field effect devices are disclosed. In particular, there is disclosed an electronic field effect device which has improved electrical properties due to the formation of a highly mobile two-dimensional charge-carrier gas in a simple structure formed from diamond in... Agent: Bryan Cave LLP

20100078650 - Semiconductor device: A semiconductor device includes a semiconductor substrate made of silicon carbide and having a surface, a normal vector for the surface having an off angle with respect to a <0001> direction or a <000-1> direction, a semiconductor layer of a first conductivity type formed on the semiconductor substrate, a first... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100078654 - Semiconductor device and method of fabricating the same: A semiconductor device according to one embodiment includes: a first transistor comprising a first gate electrode formed on a semiconductor substrate via a first gate insulating film, a first channel region formed in the semiconductor substrate under the first gate insulating film, and first epitaxial crystal layers formed on both... Agent: Knobbe Martens Olson & Bear LLP

20100078653 - Transistor having a high-k metal gate stack and a compressively stressed channel: In a manufacturing flow for adapting the band gap of the semiconductor material with respect to the work function of a metal-containing gate electrode material, a strain-inducing material may be deposited to provide an additional strain component in the channel region. For instance, a layer stack with silicon/carbon, silicon and... Agent: Williams, Morgan & Amerson

20100078655 - Substrate structure with die embedded inside and dual build-up layers over both side surfaces and method of the same: The present invention comprises a first substrate with a die formed on a die metal pad, a first and a second wiring circuits formed on the surfaces of the first substrate. A second substrate has a die opening window for receiving the die, a third wiring circuit is formed on... Agent: Bacon & Thomas, PLLC

20100078656 - Light emitting device and method of fabricating the same: Disclosed are a light emitting device and a method of fabricating the same. The light emitting device comprises a substrate. A plurality of light emitting cells are disposed on top of the substrate to be spaced apart from one another. Each of the light emitting cells comprises a first upper... Agent: H.c. Park & Associates, PLC

20100078658 - Light emitting device and method of manufacturing the same: The present invention relates to a light emitting device and a method of manufacturing the light emitting device. According to the present invention, the light emitting device comprises a substrate, an N-type semiconductor layer formed on the substrate, and a P-type semiconductor layer formed on the N-type semiconductor layer, wherein... Agent: H.c. Park & Associates, PLC

20100078657 - Semiconductor light emitting device, light emitting module, lighting appartus, display element and manufacturing method of semiconductor light emitting device: An LED array chip (2), which is one type of a semiconductor light emitting device, includes an array of LEDs (6), a base substrate (4) supporting the array of the LEDs (6), and a phosphor film (48). The array of LEDs (6) is formed by dividing a multilayer epitaxial structure... Agent: Snell & Wilmer L.L.P. (panasonic)

20100078660 - Group iii nitride compound semiconductor light-emitting device and method for producing the same: An n-type layer of a light-emitting device has a structure in which a first n-type layer, a second n-type layer and a third n-type layer are sequentially laminated in this order on a sapphire substrate, and an n-electrode composed of V/Al is formed on the second n-type layer. The first... Agent: Mcginn Intellectual Property Law Group, PLLC

20100078659 - Light-emitting element: A light-emitting element includes a semiconductor laminated structure including a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type different from the first conductivity type and an active layer sandwiched by the first and second semiconductor layers, a first electrode on one... Agent: Mcginn Intellectual Property Law Group, PLLC

20100078666 - Electro-optical device, electronic apparatus, and transistor: An electro-optical device includes a substrate, a data line, and a transistor formed on the substrate and including (i) a semiconductor film having a channel region having a channel length according to one direction, first and second source/drain regions which are formed with the channel region interposed therebetween, and first... Agent: Advantedge Law Group, LLC

20100078664 - Led phosphor deposition: LED phosphor deposition for use with LEDs. In an aspect, a method is provided for forming an encapsulation. The method includes determining a geometric shape for the encapsulation, selecting a dam material, applying the dam material to a substrate to form a boundary defining a region having the geometric shape,... Agent: Haynes And Boone, LLPIPSection

20100078668 - Light emitting device: Provided is a light emitting device. The light emitting device comprises a body, a light emitting diode on the body, a resistor integrated on the body and configured to sense a temperature of the light emitting diode, and a plurality of metal layers on the body.... Agent: Birch Stewart Kolasch & Birch

20100078669 - Light emitting device and lead frame for the same: An LED according to the present invention includes a light-emitting chip emitting light, a chip-mounting portion on which the light-emitting chip is mounted, a light-reflecting layer formed on at least a portion of the chip-mounting portion and a gold plating layer formed on at least a portion of the light-reflecting... Agent: H.c. Park & Associates, PLC

20100078670 - Light emitting element with improved light extraction efficiency, light emitting device comprising the same, and fabricating method of the light emitting element and the light emitting device: Provided is a light emitting element, a light emitting device including the same, and fabrication methods of the light emitting element and light emitting device. The light emitting device comprises a substrate, a light emitting structure including a first conductive layer of a first conductivity type, a light emitting layer,... Agent: Mills & Onello LLP

20100078667 - Light-emitting diode: The present invention relates to a light-emitting diode (LED).The LED comprises an LED die, one or more metal pads, and a fluorescent layer. The characteristics of the present invention include that the metals pads are left exposed for the convenience of subsequent wiring and packaging processes. In addition, the LED... Agent: Sinorica, LLC

20100078661 - Machined surface led assembly: A substrate for an LED assembly can have a plurality of cups formed therein. At least one cup can be formed within another cup. The cups can be co-axial with respect to one another, for example. A machined surface of the substrate can enhance reflectivity of the LED assembly. A... Agent: Haynes And Boone, LLPIPSection

20100078662 - Non-global solder mask led assembly: A substrate for an LED assembly can have a plurality of cups formed therein. At least one cup can be formed within another cup. The cups can be co-axial with respect to one another, for example. A machined surface of the substrate can enhance reflectivity of the LED assembly. A... Agent: Haynes And Boone, LLPIPSection

20100078665 - Organic electroluminescence element and method for manufacturing thereof: One embodiment of the present invention is an organic electroluminescence element having a substrate, a first electrode formed on the substrate, an organic luminescent medium layer which includes an organic luminescent layer and is formed on the first electrode, a second electrode formed on the organic luminescent medium layer and... Agent: Squire, Sanders & Dempsey L.L.P.

20100078663 - Transparent solder mask led assembly: A substrate for an LED assembly can have a plurality of cups formed therein. At least one cup can be formed within another cup. The cups can be co-axial with respect to one another, for example. A machined surface of the substrate can enhance reflectivity of the LED assembly. A... Agent: Haynes And Boone, LLPIPSection

20100078672 - Group iii nitride semiconductor light-emitting device and production method therefor: Provided is a method for producing a Group III nitride semiconductor light-emitting device including a GaN substrate serving as a growth substrate, which method realizes processing of the GaN substrate to have a membrane structure at high reproducibility. In the production method, a stopper layer of AlGaN having an Al... Agent: Mcginn Intellectual Property Law Group, PLLC

20100078671 - Nitride based semiconductor light emitting device: A nitride based semiconductor light emitting device is revealed. The light emitting device includes a light emitting epitaxial layer, a P-type electrode and a N-type electrode. The P-type electrode and the N-type electrode are disposed on the light emitting epitaxial layer. The light emitting device features on that the N-type... Agent: Sinorica, LLC

20100078673 - Active semiconductor component with a reduced surface area: A semiconductor component in which the active junctions extend perpendicularly to the surface of a semiconductor chip substantially across the entire thickness thereof. The contacts with the regions to be connected are provided by conductive fingers substantially crossing the entire region with which a contact is desired to be established.... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20100078674 - Insulated gate bipolar transistor: A trench structure of an insulated gate bipolar transistor (IGBT) is formed as a trench net in a P region and extends into an N− layer. The trench net separates the P region into P wells and floating P layers. The P wells contact an emitter electrode while the floating... Agent: Townsend And Townsend And Crew, LLP

20100078675 - Circuit device: Provided is a circuit device having a configuration in which thermal interference between built-in elements is suppressed and being miniaturized in total size. A hybrid integrated circuit device of the present invention includes: a circuit substrate, a sealing resin and leads. The circuit substrate in its upper surface is incorporated... Agent: Morrison & Foerster LLP

20100078676 - Semiconductor device: The cell size is reduced and device reliability is improved for a semiconductor device including plural transistors making up a multi-channel output circuit. In a multi-channel circuit configuration, a group of transistors having a common function of plural channels are surrounded by a common trench for insulated isolation from another... Agent: Miles & Stockbridge PC

20100078677 - Semiconductor device: A semiconductor device comprises a semiconductor substrate having a first semiconductor region of a first semiconductor type, a second semiconductor region of a second conductivity type extended in the first semiconductor region, and a mesa area forming a slope along an outer circumference of the semiconductor substrate; a first electrode... Agent: Mcdermott Will & Emery LLP

20100078678 - Semiconductor electronic device and method of manufacturing the same: A semiconductor electronic device comprises a substrate; a buffer layer formed on said substrate, having two or more layers of composite layers in which a first semiconductor layer comprising nitride based compound semiconductor having smaller lattice constant and greater coefficient of thermal expansion than the substrate and a second semiconductor... Agent: Turocy & Watson, LLP

20100078679 - Light-receiving device and manufacturing method for a light-receiving device: Provided is a light-receiving device which has light-receiving sensitivity superior to that of a conventional Schottky diode type light-receiving device and also has sufficiently-strengthened junction of a Schottky electrode. A first contact layer formed of AlGaN and having conductivity, a light-receiving layer formed of AlGaN, and a second contact layer... Agent: Burr & Brown

20100078680 - Semiconductor sensor structures with reduced dislocation defect densities and related methods for the same: Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are... Agent: Amberwave System Corp.

20100078681 - Integrated circuit including a hetero-interface and self adjusted diffusion method for manufacturing the same: An integrated circuit including a hetero-interface and a manufacturing method thereof is disclosed. One embodiment includes forming a hetero-structure including a hetero-interface at a junction between a first region and a second region, and, thereafter introducing a material into the first region and at least up to the hetero-interface, wherein... Agent: Edell, Shapiro & Finnan, LLC

20100078682 - Power mosfet having a strained channel in a semiconductor heterostructure on metal substrate: A field effect transistor device having a strained semiconductor channel region overlying a heterostructure-semiconductor on a metal substrate includes a first semiconductor layer overlying a first metal layer. The first semiconductor layer has a first semiconductor material and a second semiconductor material in a relaxed heterostructure and is heavily doped.... Agent: Townsend And Townsend And Crew, LLP

20100078684 - Selective high-k dielectric film deposition for semiconductor device: Embodiments of the present invention describe a method of fabricating a III-V quantum well transistor with low current leakage and high on-to-off current ratio. A hydrophobic mask having an opening is formed on a semiconductor film. The opening exposes a portion on the semiconductor film where a dielectric layer is... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100078683 - Semiconductor device: A semiconductor device include: a nitride group semiconductor functional layer including a second nitride group semiconductor region on a first nitride group semiconductor region where a two-dimensional carrier gas layer is made, the second nitride group semiconductor region functioning as a barrier layer; a first main electrode electrically connected to... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100078685 - Semiconductor memory device: There is provided a semiconductor memory device including: a first wiring layer; a second wiring layer; a third wiring layer; a memory array region; a first gate array region being formed at a region at which the first wiring layer, the second wiring layer and the third wiring layer can... Agent: Volentine & Whitt PLLC

20100078686 - Image sensor and method for manufacturing the same: An image sensor and manufacturing method thereof are provided. The image sensor can include a readout circuitry, an interconnection, a second interlayer dielectric, an image sensing device, a contact plug, and a sidewall dielectric. The contact plug can electrically connect the first conductive type layer to the interconnection through a... Agent: Joon Hwang

20100078687 - Method for transistor fabrication with optimized performance: A semiconductor process and apparatus includes forming <100> channel orientation CMOS transistors (24, 34) with enhanced hole mobility in the NMOS channel region and reduced channel defectivity in the PMOS region by depositing a first tensile etch stop layer (51) over the PMOS and NMOS gate structures, etching the tensile... Agent: Hamilton & Terrile, LLP - Freescale

20100078688 - Nitride semiconductor device, nitride semiconductor package, and method for manufacturing nitride semiconductor device: A nitride semiconductor device of the present invention includes: a nitride semiconductor laminated structure including an n-type first layer, a second layer that is laminated on the first layer and contains a p-type impurity, and an n-type third layer laminated on the second layer, each layer of the nitride semiconductor... Agent: Rabin & Berdo, PC

20100078690 - Semiconductor integrated circuit device and a method for manufacturing a semiconductor integrated circuit device: In the present invention, in the pre-metal process, after forming the ozone TEOS film over an etch stop film, the ozone TEOS film is once etched back so as to expose the etch stop film over a gate structure, and, after that, a plasma TEOS film is formed over the... Agent: Miles & Stockbridge PC

20100078691 - Transistor with embedded si/ge material having enhanced across-substrate uniformity: In sophisticated semiconductor devices, a strain-inducing semiconductor alloy may be positioned close to the channel region by forming cavities on the basis of a wet chemical etch process, which may have an anisotropic etch behavior with respect to different crystallographic orientations. In one embodiment, TMAH may be used which exhibits,... Agent: Williams, Morgan & Amerson

20100078689 - Transistor with embedded si/ge material having reduced offset to the channel region: A strain-inducing semiconductor alloy may be formed on the basis of cavities which may have a non-rectangular shape, which may be maintained even during corresponding high temperature treatments by providing an appropriate protection layer, such as a silicon dioxide material. Consequently, a lateral offset of the strain-inducing semiconductor material may... Agent: Williams, Morgan & Amerson

20100078692 - Image sensor and method for manufacturing the same: Disclosed are an image sensor and a method for manufacturing the same. The image sensor includes a first pixel having a first photodiode and a first readout circuit and a second pixel having a second photodiode and a second readout circuit. The second pixel is aligned at one side of... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100078693 - Semiconductor device and method of manufacturing semiconductor device: The semiconductor device according to the present invention includes a ferroelectric film and an electrode stacked on the ferroelectric film. The electrode has a multilayer structure of an electrode lower layer in contact with the ferroelectric film and an electrode upper layer stacked on the electrode lower layer. The electrode... Agent: Rabin & Berdo, PC

20100078695 - Low leakage capacitors including portions in inter-layer dielectrics: An integrated circuit structure includes a semiconductor substrate including a first region and a second region; an insulation region in the second region of the semiconductor substrate; and an inter-layer dielectric (ILD) over the insulation region. A transistor is in the first region. The transistor includes a gate dielectric and... Agent: Slater & Matsil, L.L.P.

20100078694 - Semiconductor component having a drift zone and a drift control zone: A description is given of a normally on semiconductor component having a drift zone, a drift control zone and a drift control zone dielectric arranged between the drift zone and the drift control zone.... Agent: Dicke, Billig & Czaja

20100078697 - Semiconductor device including capacitor and method for manufacturing the same: A semiconductor device according to the present invention uses a capacitor including a capacitive insulating film sandwiched between an upper electrode and a lower electrode. The lower electrode of the capacitor is constructed by overlappingly connecting a plurality of electrode portions together. A lower electrode portion (plug type electrode) of... Agent: Foley And Lardner LLP Suite 500

20100078696 - Semiconductor memory device with power decoupling capacitors and method of fabrication: Provided is a semiconductor memory device including a capacitor structure extending over core and peripheral areas of a substrate. Respective portions of the capacitor structure function as memory cell capacitors in the core area and as first and second capacitors in the peripheral area. A combination of the first and... Agent: Volentine & Whitt PLLC

20100078698 - Vertical semiconductor device, dram device including the same: A vertical semiconductor device, a DRAM device, and associated methods, the vertical semiconductor device including single crystalline active bodies vertically disposed on an upper surface of a single crystalline substrate, each of the single crystalline active bodies having a first active portion on the substrate and a second active portion... Agent: Lee & Morse, P.C.

20100078699 - Nonvolatile semiconductor storage device: A silicide layer is formed at least in a part on an impurity diffusing layer to avoid a region on a gate electrode on a gate oxide film. Voltage is applied between the gate electrode and the impurity diffusing layer to destroy the gate oxide film.... Agent: Turocy & Watson, LLP

20100078700 - Semiconductor memory device: To realize a semiconductor memory device whose capacitance value per unit area in a memory cell is increased without increase in the area of the memory cell. The memory cell includes a transistor, a memory element, a first capacitor, and a second capacitor. The first capacitor includes a semiconductor film,... Agent: Cook Alex Ltd

20100078701 - Three-dimensional microelectronic devices including repeating layer patterns of different thicknesses: A vertical NAND flash memory device includes a substrate having a face and a string of serially connected flash memory cells on the substrate. A first flash memory cell is adjacent the face, and a last flash memory cell is remote from the face. The flash memory cells include repeating... Agent: Myers Bigel Sibley & Sajovec

20100078702 - Semiconductor storage device and method for manufacturing the same: A semiconductor storage device according to the present invention includes: a semiconductor substrate; an embedded insulator embedded in a trench formed in the semiconductor substrate and having an upper portion protruding above a top surface of the semiconductor substrate; a first insulating film formed on the top surface of the... Agent: Rabin & Berdo, PC

20100078705 - Non-volatile memory semiconductor device: One end of an electricity supply line ESL is arranged over a terminal end TE1 and the other end thereof is arranged over a terminal end TE2, and further, the central portion of the electricity supply line ESL is arranged over a dummy part DMY. That is, the terminal end... Agent: Miles & Stockbridge PC

20100078704 - Semiconductor storage element and manufacturing method thereof: A semiconductor storage element includes: a source region and a drain region provided in a semiconductor substrate; a tunnel insulating film provided on the semiconductor substrate between the source region and the drain region; a charge storage film provided on the tunnel insulating film; a block insulating film provided on... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100078703 - Split-gate non-volatile memory cell and method: A method is disclosed for making a non-volatile memory cell on a semiconductor substrate. A select gate structure is formed over the substrate. The control gate structure has a sidewall. An epitaxial layer is formed on the substrate in a region adjacent to the sidewall. A charge storage layer is... Agent: Freescale Semiconductor, Inc. Law Department

20100078706 - Nonvolatile semiconductor memory device and method of manufacturing nonvolatile semiconductor memory device: A nonvolatile semiconductor memory device (and method of forming same) includes a word gate provided above a channel region of a semiconductor substrate via an insulating layer, a control gate provided at a side of the word gate, and a charge storage layer provided by an ONO film between the... Agent: Mcginn Intellectual Property Law Group, PLLC

20100078708 - Mos transistor having an increased gate-drain capacitance: A MOS transistor having an increased gate-drain capacitance is described. One embodiment provides a drift zone of a first conduction type. At least one transistor cell has a body zone, a source zone separated from the drift zone by the body zone, and a gate electrode, which is arranged adjacent... Agent: Dicke, Billig & Czaja

20100078709 - Semiconductor device: In a conventional semiconductor device, protection of a to-be-protected element from a surge voltage is difficult because the to-be-protected element is turned on before a protection element due to variations in manufacturing conditions. In a semiconductor device of the present invention, a protection element and a MOS transistor have part... Agent: Morrison & Foerster LLP

20100078707 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a source metallization, a source region of a first conductivity type in contact with the source metallization, a body region of a second conductivity type which is adjacent to the source region. The semiconductor device further includes a first field-effect structure including a first insulated gate... Agent: Dicke, Billig & Czaja

20100078711 - Method of manufacturing integrated circuits including a fet with a gate spacer: A method of manufacturing integrated circuits including a FET with a gate spacer. One embodiment provides forming a lamella of a semiconductor material and two insulator structures on opposing sides of the lamella. The lamella is recessed. A fin is formed from a central portion of the lamella. The fin... Agent: Dicke, Billig & Czaja

20100078710 - Semiconductor component with a drift zone and a drift control zone: A semiconductor component has a drift zone and a drift control zone, a drift control zone dielectric, which is arranged in sections between the drift zone and the drift control zone, and has a first and a second connection zone, which are doped complementarily with respect to one another and... Agent: Dicke, Billig & Czaja

20100078712 - Semiconductor device and method of manufacturing the same: A semiconductor device includes a first semiconductor pillar, a first gate insulating film, a gate electrode, and a first contact. The first semiconductor pillar extends upwardly from a semiconductor substrate. The first gate insulating film covers side surfaces of the first semiconductor pillar. The gate electrode covers the first gate... Agent: Young & Thompson

20100078715 - Lateral dmos transistor and method for fabricating the same: A LDMOS transistor and a method for fabricating the same. A LDMOS transistor may include a P-type body region formed over a N-well. A LDMOS transistor may include a source region and a source contact region formed over a P-type body region. A LDMOS transistor may include a drain region... Agent: Sherr & Vaughn, PLLC

20100078716 - Semiconductor component and method for producing a semiconductor component: A semiconductor component comprises a semiconductor body with at least one protective trench in the semiconductor body. An insulation layer is situated at least at the bottom of the protective trench. An electrically conductive layer having a thickness D is formed on the insulation layer in the protective trench, wherein... Agent: Infineon Technologies Ag Patent Department

20100078713 - Semiconductor component structure with vertical dielectric layers: A method for producing a semiconductor structure and a semiconductor component are described.... Agent: Dicke, Billig & Czaja

20100078714 - Trench metal oxide-semiconductor transistor and fabrication method thereof: A fabrication method of a trench metal oxide-semiconductor (MOS) transistor is provided. After the gate trenches are formed in the epitaxial layer, impurities of a first conductive type are implanted into the epitaxial layer by using a blanket implantation process. A polysilicon pattern filling the gate trenches and covering a... Agent: Rosenberg, Klein & Lee

20100078717 - Vertical mos transistor and method therefor: In one embodiment, a vertical MOS transistor is formed without a thick field oxide and particularly without a thick field oxide in the termination region of the transistor.... Agent: Mr. Jerry Chruma Semiconductor Components Industries, L.L.C.

20100078718 - Semiconductor device and methods for producing a semiconductor device: A semiconductor device includes a semiconductor substrate, a trench, a buried insulated source electrode arranged in a bottom portion of the trench, a first gate electrode and a second gate electrode arranged in an upper portion of the trench and spaced apart from one another. A surface gate contact extends... Agent: Dicke, Billig & Czaja

20100078719 - Semiconductor device: A semiconductor device in which a desired device is formed, comprising a semiconductor substrate having a first impurity region of a first conductivity type provided around an edge of a region in which the desired device is formed, and a second impurity region of the first conductivity type provided in... Agent: Mcdermott Will & Emery LLP

20100078720 - Semiconductor device and method for manufacturing the same: There is provided a semiconductor device including a field effect transistor. The field effect transistor includes a p-type low concentration region formed over a surface of a substrate, an n-type drain-side diffusion region and an n-type source-side diffusion region formed over a surface of the p-type low concentration region, an... Agent: Mcginn Intellectual Property Law Group, PLLC

20100078721 - Semiconductor device: A field-effect transistor (142) includes a lowly p-doped region 110 formed on a surface of a substrate (102), an n-doped drain region 112 and n-doped source region 114 arranged on a surface of the lowly p-doped region 110, and a device isolation insulating film 132 and device isolation insulating film... Agent: Young & Thompson

20100078722 - Method for fabricating high-speed thin-film transistors: This invention provides methods for fabricating high speed TFTs from silicon-on-insulator and bulk single crystal semiconductor substrates, such as Si(100) and Si(110) substrates. The TFTs may be designed to have a maximum frequency of oscillation of 3 GHz, or better.... Agent: Whyte Hirschboeck Dudek S.c./warf Intellectual Property Department

20100078723 - Nonvolatile nanotube programmable logic devices and a nonvolatile nanotube field programmable gate array using same: Field programmable device (FPD) chips with large logic capacity and field programmability that are in-circuit programmable are described. FPDs use small versatile nonvolatile nanotube switches that enable efficient architectures for dense low power and high performance chip implementations and are compatible with low cost CMOS technologies and simple to integrate.... Agent: Wilmerhale/boston

20100078724 - Transistor-type protection device, semiconductor integrated circuit, and manufacturing method of the same: A transistor-type protection device includes: a semiconductor substrate; a well including a first-conductivity-type semiconductor formed in the semiconductor substrate; a source region including a second-conductivity-type semiconductor formed in the well; a gate electrode formed above the well via a gate insulating film at one side of the source region; a... Agent: Sonnenschein Nath & Rosenthal LLP

20100078726 - Semiconductor device: A semiconductor device includes a first semiconductor diffusion region of a first transistor, a second semiconductor diffusion region of a second transistor, and a third semiconductor diffusion region that connects the first and second semiconductor diffusion regions to each other.... Agent: Young & Thompson

20100078725 - Standard cell without od space effect in y-direction: An integrated circuit structure includes a semiconductor substrate; a first active region in the semiconductor substrate; and a second active region in the semiconductor substrate and of an opposite conductivity type than the first active region. A gate electrode strip is over the first and the second active regions and... Agent: Slater & Matsil, L.L.P.

20100078727 - Efuse and resistor structures and method for forming same in active region: A semiconductor fabrication process and apparatus are provided for forming passive devices, such as a fuse (93) or resistor (95), in an active substrate region (103) by using heavy ion implantation (30) and annealing (40) to selectively form polycrystalline structures (42, 44) from a monocrystalline active layer (103), while retaining... Agent: Hamilton & Terrile, LLP - Freescale

20100078728 - Raise s/d for gate-last ild0 gap filling: The present disclosure provides an integrated circuit having metal gate stacks. The integrated circuit includes a semiconductor substrate; a gate stack disposed on the semiconductor substrate, wherein the gate stack includes a high k dielectric layer and a first metal layer disposed on the high k dielectric layer; and a... Agent: David M. O'dell Haynes And Boone, LLP

20100078730 - Semiconductor device and manufacturing method thereof: A semiconductor device includes a gate electrode. The gate electrode includes a silicide layer obtained by siliciding porous silicon or organic silicon.... Agent: Mcdermott Will & Emery LLP

20100078729 - Semiconductor device and method of manufacturing the semiconductor device: A semiconductor device includes a transistor configuration including first and second gate electrodes, each of the first and second gate electrodes having at least a bottom layer and an upper layer including polycrystalline silicon grains, wherein the first gate electrode is a nMOS gate electrode formed in an nMOS region... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100078731 - Semiconductor device and method for manufacturing the same: A semiconductor device includes: an n-channel MIS transistor and a p-channel MIS transistor. An n-channel MIS transistor includes: a first gate insulating film having an amorphous layer or an epitaxial layer formed on a p-type semiconductor region between a first source/drain regions; and a first gate electrode having a stack... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100078732 - Semiconductor device: A high frequency/high output semiconductor device, which is excellent in heat resistance and by which an uneven operation is suppressed, is provided. A semiconductor device, include a semiconductor substrate, a plurality of unit cells connected in parallel with each other, each of the unit cells include a plurality of electric... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100078733 - Transistor performance improving method with metal gate: The present disclosure provides a method for making a semiconductor device having metal gate stacks. The method includes forming a high k dielectric material layer on a semiconductor substrate; forming a first metal layer on the high k dielectric material layer; forming a silicon layer on the first metal layer;... Agent: Haynes And Boone, LLPIPSection

20100078734 - Transistor performance improving method with metal gate: A first transistor and a second transistor are formed in a first element formation region, and a third transistor is formed in a second element formation region. The three transistors are of the same conductive type, and the first transistor and the second transistor have the same threshold voltage. A... Agent: Mcginn Intellectual Property Law Group, PLLC

20100078736 - Asymmetric transistor devices formed by asymmetric spacers and tilted implantation: An asymmetric transistor configuration is disclosed in which asymmetric extension regions and/or halo regions may be combined with an asymmetric spacer structure which may be used to further adjust the overall dopant profile of the asymmetric transistor.... Agent: Williams, Morgan & Amerson

20100078735 - Cmos device comprising nmos transistors and pmos transistors having increased strain-inducing sources and closely spaced metal silicide regions: In a CMOS manufacturing process flow, a cap layer formed on top of a gate electrode material may be maintained throughout the entire implantation sequence for defining the drain and source regions and may be removed during an etch process in which the width of a sidewall spacer structure may... Agent: Williams, Morgan & Amerson

20100078737 - High-voltage metal oxide semiconductor device and fabrication method thereof: A high-voltage metal oxide semiconductor device comprising a main body of a first conductivity type, a conductive structure, a first well of a second conductivity type, a source region of the first conductivity type, and a second well of the second conductivity type is provided. The conductive structure has a... Agent: Rosenberg, Klein & Lee

20100078738 - Method to maximize nitrogen concentration at the top surface of gate dielectrics: An integrated circuit having a gate dielectric layer (414, 614, 814) having an improved nitrogen profile and a method of fabrication. The gate dielectric layer is a graded layer with a significantly higher nitrogen concentration at the electrode surface than near the substrate surface. An amorphous silicon layer (406) may... Agent: Texas Instruments Incorporated

20100078740 - Microelectromechanical device provided with an anti-stiction structure, and corresponding anti-stiction method: An embodiment of a microelectromechanical device having a first structural element, a second structural element, which is mobile with respect to the first structural element, and an elastic supporting structure, which extends between the first and second structural elements to enable a relative movement between the first and second structural... Agent: Graybeal Jackson LLP

20100078739 - Vertical mount package for mems sensors: A vertical mount pre-molded type package for use with a MEMS sensor may be formed with a low moisture permeable molding material that surrounds a portion of the leadframes and forms a cavity in which one or multiple dies may be held. The package includes structures to reduce package vibration,... Agent: Sunstein Kann Murphy & Timbers LLP

20100078742 - Flux-closed stram with electronically reflective insulative spacer: Flux-closed spin-transfer torque memory having a specular insulative spacer is disclosed. A flux-closed spin-transfer torque memory unit includes a multilayer free magnetic element including a first free magnetic layer anti-ferromagnetically coupled to a second free magnetic layer through an electrically insulating and electronically reflective layer. An electrically insulating and non-magnetic... Agent: Campbell Nelson Whipps, LLC

20100078741 - Stram with compensation element: Spin-transfer torque memory having a compensation element is disclosed. The spin-transfer torque memory unit includes a synthetic antiferromagnetic reference element, a synthetic antiferromagnetic compensation element, a free magnetic layer between the synthetic antiferromagnetic reference element and the synthetic antiferromagnetic compensation element, and an electrically insulating and non-magnetic tunneling barrier layer... Agent: Campbell Nelson Whipps, LLC

20100078743 - Stram with electronically reflective insulative spacer: Spin-transfer torque memory having a specular insulative spacer is disclosed. The spin-transfer torque memory unit includes a free magnetic layer, a reference magnetic layer, an electrically insulating and non-magnetic tunneling barrier layer separating the free magnetic layer from the reference magnetic layer, an electrode layer, and an electrically insulating and... Agent: Campbell Nelson Whipps, LLC

20100078746 - Semiconductor device and method of manufacturing the same: A semiconductor device, an image sensor, and methods of manufacturing the same. A semiconductor device may include metal interconnections formed over a lower substrate, a hard mask formed over metal interconnections, and/or an insulating layer formed over a surface of a lower substrate. A semiconductor device may include an insulating... Agent: Sherr & Vaughn, PLLC

20100078745 - Solid-state imaging device, method for manufacturing solid-state imaging device, and electronic apparatus: A solid-state imaging device includes a light-receiving portion, which serves as a pixel, and a waveguide, which is disposed at a location in accordance with the light-receiving portion and which includes a clad layer and a core layer embedded having a refractive index distribution in the wave-guiding direction.... Agent: Sonnenschein Nath & Rosenthal LLP

20100078744 - Solid-state imaging device, method of manufacturing the same, and electronic apparatus: A solid-state imaging device includes light-sensing sections serving as pixels, and waveguides each including a core layer and a cladding layer, the waveguides each being disposed at a position corresponding to one of the light-sensing sections. A cross-sectional structure of the waveguide taken in the horizontal direction of an imaging... Agent: Sonnenschein Nath & Rosenthal LLP

20100078747 - Image sensing device and packaging method thereof: An image sensing device and a packaging method thereof is disclosed. The packaging method includes the steps of providing an adhesive layer; placing a substrate, having an opening, on the adhesive layer; disposing an image sensor within the opening on the adhesive layer; adding a filler between the image sensor... Agent: Bacon & Thomas, PLLC

20100078748 - Solid-state image pickup device and manufacturing method thereof: A solid-state image pickup device relating to the present invention has a specific gap in a part of a lattice-shaped light blocking film pattern or wiring pattern having an opening enclosing a light reception region. Peripheral circuits and wiring layers on a pixel may be used as the light blocking... Agent: Mcdermott Will & Emery LLP

20100078749 - Distance image sensor: In a range image sensor 8, when a first reverse bias voltage applied between a semiconductor substrate 11 and first semiconductor regions 13 is an H bias, first depleted layers A1 and A1 expanding from the p-n junctions of the first semiconductor regions 13 adjacent to each other expand and... Agent: Drinker Biddle & Reath (dc)

20100078750 - Image sensor and method for fabricating the same: An image sensor includes readout circuit arranged over a semiconductor substrate, an interlayer dielectric film covering the readout circuit and including metal lines, a buffer layer arranged over the interlayer dielectric film, a crystallized silicon layer arranged over the buffer layer, an ion-implantation layer to partition photodiode regions corresponding to... Agent: Sherr & Vaughn, PLLC

20100078751 - Image sensor and manufacturing method of image sensor: Disclosed are an image sensor and a method for manufacturing the same. The image sensor can include a readout circuitry on a first substrate; an interlayer dielectric layer including at least one metal and contact plug electrically connected to the readout circuitry; and an image sensing device formed on a... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100078752 - Image sensor and method for manufacturing the same: An image sensor and manufacturing method thereof are provided. The image sensor includes a readout circuitry, an electrical junction region, an interconnection, and an image sensing device. The readout circuitry can be disposed at a first substrate, and the electrical junction region can be electrically connected to the readout circuitry... Agent: Saliwanchik Lloyd & Saliwanchik A Professional Association

20100078753 - Flow sensor and method of fabrication: A method for forming a flow sensor having self-supported heat-carrying elements is disclosed. Self-supported heat-carrying elements are capable of operating with higher thermal efficiency, enabling lower power consumption and higher sensitivity, due to a lack of heat loss into a supporting membrane. Self-supported heat-carrying elements facilitate wider operating temperature range... Agent: Demont & Breyer, LLC

20100078754 - Guard ring structures and method of fabricating thereof: A guard ring structure for use in a semiconductor device. The guard ring structure includes a semiconductor layer stack having a first layer and a second layer on top of the first layer, gates structures formed in the first layer; and guard rings formed in the first layer. The second... Agent: Andrews Kurth LLP Intellectual Property Department

20100078755 - Semiconductor structure with an electric field stop layer for improved edge termination capability: An exemplary edge termination structure maintains the breakdown voltage of the semiconductor device after it has been sawed off the wafer and packaged by creating an electric field stop layer at a periphery of the semiconductor device. The electric field stop layer has a dopant concentration higher than that of... Agent: Andrews Kurth LLP Intellectual Property Department

20100078756 - Semiconductor device with semiconductor body and method for the production of a semiconductor device: A semiconductor device includes a semiconductor body with a front-sided surface. An active cell region with a semiconductor device structure and an edge region surrounding the active cell region are arranged in the semiconductor body. The front-sided surface of the semiconductor body includes a passivation layer over the edge region... Agent: Dicke, Billig & Czaja

20100078757 - Semiconductor device having recess gate and isolation structure and method for fabricating the same: Disclosed herein is a semiconductor device including an isolation structure and a recess gate and a method for fabricating the same. The method for fabricating a semiconductor device includes: forming a trench by selectively etching an isolation region of a semiconductor substrate to define an active region; forming a first... Agent: Marshall, Gerstein & Borun LLP

20100078758 - Miim diodes: A metal-insulator diode is disclosed. In one aspect, the metal-insulator diode comprises a first electrode comprising a first metal, a first region comprising a first insulating material, a second region comprising a second insulating material, and a second electrode comprising a second metal. The first region and the second region... Agent: Vierra Magen/sandisk Corporation

20100078759 - Miim diodes having stacked structure: A metal-insulator diode is disclosed. In one aspect, the metal-insulator diode comprises first and second electrode and first and second insulators arraigned as follows. An insulating region has a trench formed therein. The trench has a bottom and side walls. The first electrode, which comprises a first metal, is on... Agent: Vierra Magen/sandisk Corporation

20100078760 - Integrated circuit module with integrated passive device: A disclosed integrated circuit (IC) module includes an IC panel and multi level circuit structure, referred to as an IPD structure, overlying an upper surface of the IC panel. The IC panel includes an electrically conductive embedded ground plane (EGP), an integrated circuit (IC) die, and an encapsulating material. The... Agent: Fsi C/o Jackson Walker, L.L.P.

20100078761 - Semiconductor transformers: A planar transformer structure, which can be constructed in an integrated semiconductor circuit without using traditional metallic windings. To avoid large thermal expansion of metallic spiral windings and associated mechanical stress on a metal-semiconductor interface, it is suggested that highly doped semiconductor materials with or without silicides and salicides can... Agent: Stites & Harbison PLLC

20100078762 - Semiconductor device manufacturing method and semiconductor device: In a semiconductor device manufacturing method, an amorphous or microcrystalline metal oxide film is formed over a first metal film which is preferentially oriented along a predetermined crystal plane. After that, a ferroelectric film is formed by a MOCVD method. When the ferroelectric film is formed, the metal oxide film... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100078763 - Resistance-change memory having resistance-change element and manufacturing method thereof: A resistance-change memory includes an interlayer insulating film, a lower electrode layer, a fixed layer, a first insulating film, a recording layer, a second insulating film, a conducting layer and an interconnect. The interlayer insulating film is formed on a semiconductor substrate and has a step. The lower electrode layer... Agent: Knobbe Martens Olson & Bear LLP

20100078764 - Reducing shunt currents in a semiconductor body: A description is given of a concept for reducing shunt currents in a semiconductor body.... Agent: Slater & Matsil LLP

20100078765 - Power semiconductor: A power semiconductor component is described. One embodiment provides a semiconductor body having an inner zone and an edge zone. A base zone of a first conduction type is provided. The base zone is arranged in the at least one inner zone and the at least one edge zone. An... Agent: Dicke, Billig & Czaja

20100078766 - Nitride semiconductor and method for manufacturing thereof: A P-type nitride semiconductor and a method for manufacturing the same are provided. A nitride semiconductor includes a P-type nitride layer formed on a active layer, wherein the P-type nitride layer is a P-type nitride layer with the group 4 element doped.... Agent: Birch Stewart Kolasch & Birch

20100078767 - Silicon wafer and fabrication method thereof: Provided is a silicon wafer including: a first denuded zone formed with a predetermined depth from a top surface of the silicon wafer; and a bulk area formed between the first denuded zone and a backside of the silicon wafer, wherein the first denuded zone is formed with a depth... Agent: Morgan Lewis & Bockius LLP

20100078769 - Environmental die seal enhancement for wafer level chip scale packages: In a semiconductor device for use in a wafer level chip scale package (WLCSP) and a method for fabrication, an inner scribe seal is formed around a functional circuit area that does not extend all the way into the corners of the rectangular die, and an outer scribe seal follows... Agent: Texas Instruments Incorporated

20100078768 - Wafer cutting methods and packages using dice derived therefrom: A wafer-cutting process includes first cutting a semiconductive wafer along a first path at a given first cutting intensity including cutting across an intersection. The process also includes second cutting the semiconductive wafer along a second path at a given second cutting intensity. The second cutting intensity is diminished during... Agent: Intel Corporation C/o Cpa Global

20100078770 - Lock and key through-via method for wafer level 3 d integration and structures produced: A three dimensional device stack structure comprises two or more active device and interconnect layers further connected together using through substrate vias. Methods of forming the three dimensional device stack structure comprise alignment, bonding by lamination, thinning and post thinning processing. The via features enable the retention of alignment through... Agent: The Law Offices Of Robert J. Eichelburg

20100078771 - On-chip rf shields with through substrate conductors: Structures of a system on chip and methods of forming a system on chip are disclosed. In one embodiment, the system on a chip includes an RF component disposed on a first part of a substrate, a semiconductor component disposed on a second part of the substrate, the semiconductor component... Agent: Slater & Matsil LLP

20100078772 - Packaging technology: Metallised through silicon vias located in the scribe lanes between die are used to create an electrical connection between the front-side and the rear-side of a silicon die. One of the metallisation layers on the front-side of the die comprises portions which extend into the scribe lanes to form capture... Agent: Greenberg Traurig, LLP

20100078773 - Semiconductor device and method of forming semiconductor device: A semiconductor device includes a substrate, a semiconductor device structure over the substrate, an insulating film that covers the semiconductor device structure, and a stress-compensation film over the insulating film. The stress-compensation film has a first stress that compensates a second stress working to bend the substrate.... Agent: Mcginn Intellectual Property Law Group, PLLC

20100078774 - Semiconductor device with channel stop trench and method: A semiconductor device is provided which includes a semiconductor substrate having a first surface, an active area and a peripheral area. The semiconductor device further includes least one channel stop trench formed in the semiconductor substrate, wherein the channel stop trench extends from the first surface at least partially into... Agent: Dicke, Billig & Czaja

20100078775 - Semiconductor device with a charge carrier compensation structure and method for the production of a semiconductor device: A semiconductor device has a cell field with drift zones of a first type of conductivity and charge carrier compensation zones of a second type of conductivity complementary to the first type. An edge region which surrounds the cell field has a higher blocking strength than the cell field, the... Agent: Dicke, Billig & Czaja

20100078777 - On-chip radio frequency shield with interconnect metallization: Structure and method for fabricating a system on chip with an on-chip RF shield including interconnect metallization is described. In one embodiment, the system on chip includes an RF circuitry disposed on a first portion of a top surface of a substrate, and a semiconductor circuitry disposed on a second... Agent: Slater & Matsil LLP

20100078776 - On-chip rf shields with backside redistribution lines: Structures of a system on chip and methods of forming a system on chip are disclosed. In one embodiment, a method of fabricating the system on chip includes forming a through substrate opening from a back surface of a substrate, the through substrate opening disposed between a first and a... Agent: Slater & Matsil LLP

20100078778 - On-chip rf shields with front side redistribution lines: A system on chip comprising a RF shield is disclosed. In one embodiment, the system on chip includes a RF component disposed on a chip, first redistribution lines disposed above the system on chip, the first redistribution lines coupled to I/O connection nodes. The system on chip further includes second... Agent: Slater & Matsil LLP

20100078780 - Semiconductor device: A semiconductor device according to the present invention includes: a wiring; an interlayer insulating film formed over the wiring and having an opening reaching the wiring from a top surface thereof; an intra-opening metal film formed on the wiring inside the opening and made of a metal material that contains... Agent: Rabin & Berdo, PC

20100078779 - System on a chip with on-chip rf shield: Structures of a system on a chip are disclosed. In one embodiment, the system on a chip (SoC) includes an RF component disposed on a first part of a substrate, a semiconductor component disposed on a second part of the substrate, the semiconductor component and the RF component sharing a... Agent: Slater & Matsil LLP

20100078781 - Input/output package architectures, and methods of using same: A high-speed I/O trace is part of an I/O package architecture for an integrated circuit package substrate. The integrated circuit package substrate includes an integrated heat spreader footprint on a die-side and the I/O trace to couple with an IC device to be disposed inside the IHS footprint. The I/O... Agent: Intel Corporation C/o Cpa Global

20100078782 - Coating composition and a method of coating: A coating composition including a compound having a first molecular group or a first combination of atoms, the first molecular group or the first combination of atoms capable of bonding to an oxidizable metal or a metal oxide, and a second molecular group or a second combination of atoms, the... Agent: Dicke, Billig & Czaja

20100078784 - Device including a power semiconductor chip: A device including a power semiconductor chip. One embodiment provides a power semiconductor chip having a first electrode on a first surface and a second and a third electrode on a second surface opposite to the first surface. A leadframe includes a carrier and a first lead, the power semiconductor... Agent: Dicke, Billig & Czaja

20100078783 - Device including two mounting surfaces: A device including two mounting surfaces. One embodiment provides a power semiconductor chip and having a first electrode on a first surface and a second electrode on a second surface opposite to the first surface. A first external contact element and a second external contact element, are both electrically coupled... Agent: Dicke, Billig & Czaja

20100078785 - Lead frame and method of manufacturing the same: A lead frame includes a base material having a front surface for mounting of a semiconductor chip and a back surface for connection with an external board, and an Ni layer having a thick section and thin section. The thick section is formed on the back surface of the base... Agent: Edwards Angell Palmer & Dodge LLP

20100078786 - Wiring substrate with reinforcement: A wiring substrate assembly includes a resin wiring substrate and a reinforcement member. The resin wiring substrate does not have a core substrate, and includes a substrate main surface, a substrate back surface, a laminate structure comprised of resin insulation layers and conductive layers, and connection terminals disposed on the... Agent: Stites & Harbison PLLC

20100078787 - Semiconductor device: To provide a semiconductor device whose reliability is improved by increase in resistance to external stress and electrostatic discharge with reduction in thickness and size achieved. An IC chip provided with an integrated circuit and a resonant capacitor portion, an antenna provided over the IC chip, and a conductive blocking... Agent: Eric Robinson

20100078792 - Bond pad rerouting element, rerouted semiconductor devices including the rerouting element, and assemblies including the rerouted semiconductor devices: A rerouting element for a semiconductor device includes a dielectric film that carries conductive vias, conductive elements, and contact pads. The conductive vias are positioned at locations that correspond to the locations of bond pads of a semiconductor device with which the rerouting element is to be used. The conductive... Agent: Trask Britt, P.C./ Micron Technology

20100078788 - Package-on-package assembly and method: A package-on-package (PoP) assembly is provided. The package-on-package (PoP) assembly includes a first integrated circuit package and an anisotropic conductive film (ACF) disposed on a top surface of the first integrated circuit package, wherein the anisotropic conductive film comprises a plurality of conductive particles. The package-on-package (PoP) assembly also includes... Agent: Intel Corporation C/o Cpa Global

20100078790 - Semiconductor device: In a semiconductor device in which a plurality of memory LSIs and a plurality of processor LSIs are stacked, as the number of stacked layers increase, the communication distance of data between a memory LSI and a processor LSI will increase. Therefore, the parasitic capacitance and parasitic resistance of the... Agent: Miles & Stockbridge PC

20100078793 - Semiconductor device assemblies, electronic devices including the same and assembly methods: A semiconductor device is formed of two or more dice of similar dimensions and bond pad arrangements, in which bond pads are located in fields along less than three edges of the active surface of each die. A first die is attached to a substrate and subsequent die or dice... Agent: Trask Britt, P.C./ Micron Technology

20100078791 - Semiconductor package having ink-jet type dam and method of manufacturing the same: A semiconductor package includes a substrate which includes a chip mounting unit disposed on a first surface thereof and a pad forming unit disposed on an outer region of the chip mounting unit. The semiconductor package further includes a plurality of pads disposed on the pad forming unit of the... Agent: F. Chau & Associates, LLC

20100078789 - Semiconductor package system with through silicon via interposer: A semiconductor package system includes: providing a top package, a through silicon via interposer embedded in the top package; providing a bottom package having a bottom semiconductor die with a top connection adjacent the center active face thereof, a substrate interposer being embedded in the bottom package, the bottom semiconductor... Agent: Law Offices Of Mikio Ishimaru

20100078794 - Stacked die semiconductor device having circuit tape: A stacked die semiconductor package includes a first integrated circuit chip, a first circuit tape coupled to the first integrated circuit chip, a second integrated circuit chip coupled to the first circuit tape, and at least one component coupled to the first circuit tape. The at least one component may... Agent: Law Offices Of Mikio Ishimaru

20100078795 - Electronic device: The electronic device comprises a semiconductor substrate (10) with at a first side (1) a circuit of semiconductor elements (20). The substrate (10) is present between a carrier (40) and an encapsulation (70), so that the first side (1) of the substrate (10) faces the carrier (40). The circuit of... Agent: Philips Intellectual Property & Standards

20100078798 - Insulation covering structure for a semiconductor element with a single die dimension and a manufacturing method thereof: An insulation covering structure for a semiconductor element with a single die dimension includes: a semiconductor element with a single die dimension and an insulation covering layer. The semiconductor element has a front side surface, a rear side surface, a left side surface, a right side surface, a bottom surface,... Agent: Nikolai & Mersereau, P.A.

20100078799 - Microelectronic package with carbon nanotubes interconnect and method of making same: A method of forming a microelectronic package is provided. The method includes providing a silicon substrate having a plurality of carbon nanotubes disposed on a silicon layer and coupling the silicon substrate to a top surface of a packaging substrate, wherein the plurality of carbon nanotubes are coupled to a... Agent: Intel Corporation C/o Cpa Global

20100078796 - Semiconductor device: This application relates to a semiconductor device comprising multiple separate leads molded in a molded structure, and a chip attached to the molded structure over at least two of the multiple separate leads.... Agent: Infineon Technologies Ag Patent Department

20100078797 - System and method for pre-patterned embedded chip build-up: A system and method for forming an embedded chip package is disclosed. The embedded chip package includes a first chip portion having a plurality of pre-patterned re-distribution layers joined together to form a pre-patterned lamination stack, with the pre-patterned lamination stack having a die opening extending therethrough. The embedded chip... Agent: Ge Trading & Licensing

20100078801 - Chip package structure and fabricating method threrof: A chip package structure including a chip, a lead frame, first bonding wires and second bonding wires is provided. The chip has an active surface and chip bonding pads disposed thereon. The lead frame is fixed on the chip and the lead frame includes inner leads, at least one bus... Agent: J C Patents

20100078802 - Chip package structure and fabricating method threrof: A chip package structure including a chip, a lead frame, first bonding wires and second bonding wires is provided. The chip has an active surface and chip bonding pads disposed thereon. The lead frame is fixed on the chip and the lead frame includes inner leads, at least one bus... Agent: J C Patents

20100078800 - Low cost flexible substrate: A low cost flexible substrate is described which comprises a thin metal foil and a layer of solder mask. The metal foil layer is patterned to create tracks and lands for solder bonding and/or wirebonding and the layer of solder mask is patterned to create openings for solder bonding, wirebonding... Agent: Greenberg Traurig, LLP

20100078803 - Semiconductor flat package device and method for manufacturing the same: A semiconductor flat package device capable of attaining a favorable operation and ensuring a sufficient spreading quality of solder for the lead top end is provided. A semiconductor chip 1 is encapsulated by an encapsulation resin. At first, a lead is half-blanked on the side of the top end of... Agent: Young & Thompson

20100078804 - Apparatus with side mounted microchip: In accordance with one embodiment of the invention, a packaged microchip has 1) a base with a mounting surface having a given electrical interconnector, and 2) a microchip with a plurality of side surfaces, a top surface, a bottom surface, and a given electrical pad on at least one of... Agent: Sunstein Kann Murphy & Timbers LLP

20100078805 - Method and core materials for semiconductor packaging: A semiconductor package comprises a semiconductor substrate that may comprise a core. The core may comprise one or more materials selected from a group comprising ceramics and glass dielectrics. The package further comprises a set of one or more inner conductive elements that is provided on the core, a set... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100078806 - Microelectronic package with wear resistant coating: A microelectronic package is provided. The microelectronic package includes a semiconductor substrate and a die having a top surface and a bottom surface, wherein the bottom surface of the die is coupled to the semiconductor substrate. The microelectronic package also includes a nanomaterial layer disposed on the top surface of... Agent: Intel Corporation C/o Cpa Global

20100078807 - Power semiconductor module assembly with heat dissipating element: A power semiconductor module assembly is disclosed including a power semiconductor module comprising a load terminal electrically conductively joined to a contact conductor. Part of the heat materializing during operation of the power semiconductor module in the load terminal is dissipated by using a heat dissipating element.... Agent: Dicke, Billig & Czaja

20100078808 - Packaging having two devices and method of forming thereof: A method of forming a semiconductor package includes providing a carrier, attaching a first surface of a first device on the carrier, wherein the first surface comprises a first active surface of the first device, and attaching a second surface of a second device on the carrier. In one embodiment,... Agent: Freescale Semiconductor, Inc. Law Department

20100078809 - Semiconductor module with micro-buffers: The semiconductor module includes a plurality of memory die on a first side of a substrate and a plurality of buffer die on a second side of the substrate. Each of the memory die is disposed opposite and electrically coupled to one of the buffer die.... Agent: Morgan Lewis & Bockius LLP/rambus Inc.

20100078810 - Semiconductor apparatus, substrate design method, and substrate design apparatus: A semiconductor apparatus including: a substrate; and a semiconductor chip mounted on the substrate, wherein the substrate has plural holes, and the plural holes are provided such that the density on a substrate surface of the holes in a first area, which is an area of the substrate facing a... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100078811 - Method of producing semiconductor devices: A method of producing semiconductor devices. One embodiment provides producing at least two semiconductor chips. An encapsulation material is applied to the at least two semiconductor chips to form an encapsulation layer. The at least two semiconductor chips are separated from each other to obtain at least two separated semiconductor... Agent: Dicke, Billig & Czaja

20100078813 - Semiconductor module and method for manufacturing the semiconductor module: A semiconductor module includes a device mounting board and a semiconductor device mounted on the device mounting board. The device mounting board includes an insulating resin layer, a wiring layer provided on one main surface of the insulating layer, and a bump electrode which is electrically connected to the wiring... Agent: Mcdermott Will & Emery LLP

20100078812 - Window bga semiconductor package: A WBGA semiconductor package primarily comprises a substrate, a chip, a chip-bonding adhesive, a plurality of bonding wires electrically connecting the chip and the substrate, an encapsulant to encapsulate the chip and the bonding wires, and a plurality of external terminals disposed under the substrate. The substrate has a depression... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100078815 - Ruthenium interconnect with high aspect ratio and method of fabrication thereof: An electrically conductive interconnect is provided through an opening in a dielectric layer, electrically connecting two conductive layers. In one embodiment, the interconnect is formed by ruthenium entirely filling the opening in the dielectric layer. In another embodiment, an adhesion layer of titanium is provided in the opening prior to... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20100078814 - System and method for using porous low dielectric films: A system and method for manufacturing a semiconductor device including a low dielectric constant porous material layer. Ions are implanted into the low dielectric constant porous material layer which thereby provides the porous material layer with sufficient mechanical strength for withstanding semiconductor manufacturing processes. The ions implanted in the porous... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20100078816 - Display device and method of manufacturing the same: A display device includes a metal conductive layer formed on a substrate, a transparent electrode film formed on the substrate and joined to the metal conductive layer and an interlayer insulating film isolating the metal conductive layer and the transparent conductive film. The metal conductive layer has a lower aluminum... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100078818 - Diffusion barrier and adhesion layer for an interconnect structure: An interconnect structure is provided. The interconnect structure includes an interconnect opening formed within a dielectric material, a diffusion barrier on the dielectric material, where the diffusion barrier contains a compound from a thermal reaction between cobalt (Co) metal from at least a portion of a cobalt metal layer formed... Agent: Tokyo Electron U.s. Holdings, Inc.

20100078819 - Inter connection structure including copper pad and pad barrier layer, semiconductor device and electronic apparatus including the same: A semiconductor device including an interconnection structure including a copper pad, a pad barrier layer and a metal redistribution layer, an interconnection structure thereof and methods of fabricating the same are provided. The semiconductor device includes a copper pad disposed on a first layer, a pad barrier layer including titanium... Agent: Stanzione & Kim, LLP

20100078817 - Interconnect structure: One or more embodiments relate to a semiconductor device, comprising: a Si-containing layer; a barrier layer disposed over the Si-containing layer, the barrier layer comprising a compound including a metallic element; a metallic nucleation_seed layer disposed over the barrier layer, the nucleation_seed layer including the metallic element; and a metallic... Agent: Infineon Technologies Ag Patent Department

20100078820 - Semiconductor device and method of manufacturing the same: A metal barrier film which contains an additive element is formed on the side face and on the bottom of a trench formed in an insulating film; a seed film is formed over the metal barrier film; a plated layer (Cu film) is formed using the seed film as a... Agent: Young & Thompson

20100078821 - Metal cap layer with enhanced etch resistivity for copper-based metal regions in semiconductor devices: During the fabrication of sophisticated metallization systems of semiconductor devices, material deterioration of conductive cap layers may be significantly reduced by providing a noble metal on exposed surface areas after the patterning of the corresponding via openings. Hence, well-established wet chemical etch chemistries may be used while not unduly contributing... Agent: Williams, Morgan & Amerson

20100078823 - Contacts and vias of a semiconductor device formed by a hard mask and double exposure: A contact element may be formed on the basis of a hard mask, which may be patterned on the basis of a first resist mask and on the basis of a second resist mask, to define an appropriate intersection area which may represent the final design dimensions of the contact... Agent: Williams, Morgan & Amerson

20100078822 - Electronic device and method of manufacturing same: This application relates to a method of manufacturing a semiconductor device comprising: providing multiple chips each comprising contact elements on a first main face of each of the multiple chips, and a first layer applied to each of the first main faces of the multiple chips; placing the multiple chips... Agent: Infineon Technologies Ag Patent Department

20100078824 - Method for forming three-dimensional structure, method for manufacturing semiconductor device, and semiconductor device: A method for forming a three-dimensional structure comprises: a first step of dropping a liquid material containing a structure-forming material and a solvent onto a structure forming surface; and a second step of drying at least a part of the solvent in the dropped liquid material to form a deposit... Agent: Akerman Senterfitt

20100078825 - Method for fabricating interconnect structures for semiconductor devices: Described herein are methods for fabricating dual-damascene interconnect structures. In one embodiment, the interconnect structures are fabricated with a dual-damascene method having trenches then vias formed. The method includes novel liner depositions after the trench and via etches. The method includes etching trenches in a dielectric layer. Next, the method... Agent: Applied Materials/bstz Blakely Sokoloff Taylor & Zafman LLP

20100078827 - Multilayer wiring structure of semiconductor device, method of producing said multilayer wiring structure and semiconductor device to be used for reliability evaluation: A multilayer wiring structure of a semiconductor device having a stacked structure is arranged to restrain reliability degradation due to stress applied to the region of wiring between opposite upper and lower plugs. The rate of overlap of contact surface between upper plug and wiring on contact surface between lower... Agent: Mcdermott Will & Emery LLP

20100078826 - Substrate package with through holes for high speed i/o flex cable: An assembly of substrate packages interconnected with flex cables and a method of fabrication of the substrate package. The assembly allows input/output (I/O) signals to be speedily transmitted between substrate packages via flex cable and without being routed through the motherboard. Embodiments relate to a substrate package providing separable inter-package... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20100078830 - Adhesive tape and semiconductor device using the same: The present invention relates to an adhesive tape for electrically connecting semiconductor chips in a chip-on-chip type semiconductor device. The adhesive tape comprising: (A) 10 to 50 wt % of film forming resin; (B) 30 to 80 wt % of curable resin; and (C) 1 to 20 wt % of... Agent: Ditthavong Mori & Steiner, P.C.

20100078828 - Integrated circuit package system with mounting structure: An integrated circuit package system includes: providing a mountable structure having a contact pad and an inner pad; mounting an integrated circuit device having a linear through channel over the mountable structure with the linear through channel traversing between an integrated circuit device first side and an integrated circuit device... Agent: Law Offices Of Mikio Ishimaru

20100078829 - Stacked device conductive path connectivity: Various embodiments include apparatus and methods having circuitry to test continuity of conductive paths coupled to dice arranged in a stack.... Agent: Schwegman, Lundberg & Woessner/micron

20100078833 - Circuit device and method of manufacturing the same: Provided are a thin circuit device with show-through of thin metal wires prevented and a method of manufacturing the circuit device. A circuit device mainly includes: a substrate including a first substrate and second substrates; pads formed respectively on upper surfaces of the second substrates; a semiconductor element fixed on... Agent: Morrison & Foerster LLP

20100078831 - Integrated circuit package system with singulation process: An integrated circuit package system includes: providing a die attach pad; forming a package contact pad adjacent the die attach pad; attaching an integrated circuit over the die attach pad; attaching a die connector to the integrated circuit and the package contact pad; and forming an encapsulant over the die... Agent: Law Offices Of Mikio Ishimaru

20100078832 - Sensor node module: A method of manufacturing a sensor node module includes forming a protruding structure on a carrier. A sensor die is applied onto the protruding structure with an active sensing surface of the sensor die facing the carrier. The sensor die is encapsulated with mold material, wherein the protruding structure prevents... Agent: Dicke, Billig & Czaja

20100078834 - Semiconductor device and method of forming a protective layer on a backside of the wafer: A semiconductor device is made by forming solder bumps on a first side of a semiconductor wafer. A protective layer is formed on a second side of the semiconductor wafer opposite the first side. The protective layer can be adhesive paste, laminated film, spin-coated resin, epoxy based elastomer, organic rubbery... Agent: Quarles & Brady LLP

Previous industry: Fences
Next industry: Railway mail delivery


######

RSS FEED for 20140904: xml
Integrate FreshPatents.com into your RSS reader/aggregator or website to track weekly updates.
For more info, read this article.

######

Thank you for viewing Active solid-state devices (e.g., transistors, solid-state diodes) patents on the FreshPatents.com website. These are patent applications which have been filed in the United States. There are a variety ways to browse Active solid-state devices (e.g., transistors, solid-state diodes) patent applications on our website including browsing by date, agent, inventor, and industry. If you are interested in receiving occasional emails regarding Active solid-state devices (e.g., transistors, solid-state diodes) patents we recommend signing up for free keyword monitoring by email.



Results in 4.18196 seconds

PATENT INFO